Linear Technology LTC1405 Datasheet

Final Electrical Specifications

FEATURES

LTC1405

12-Bit, 5Msps,

Sampling ADC

January 2000

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DESCRIPTIO

■

5Msps Sample Rate

■

Low Power Dissipation: 115mW

■

Single 5V Supply or ±5V Supplies

■

Integral Nonlinearity Error <0.35LSB

■

Differential Nonlinearity <0.25LSB

■

71.3dB S/(N + D) and 85dB SFDR at Nyquist

■

100MHz Full-Power Bandwidth Sampling

■

±2.048V, ±1.024V and ±0.512V Bipolar Input Range

■

Input PGA

■

Out-of-Range Indicator

■

True Differential Inputs with 75dB CMRR

■

28-Pin Narrow SSOP Package

■

Pin-Compatible 10Msps Version (LTC1420)

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APPLICATIO S

■

Telecommunications

■

Digital Signal Processing

■

Multiplexed Data Acquisition Systems

■

High Speed Data Acquisition

■

Spectral Analysis

■

Imaging Systems

, LTC and LT are registered trademarks of Linear Technology Corporation.

The LTC®1405 is a 5Msps, 12-bit sampling A/D converter
that draws only 115mW from either single 5V or dual ±5V
supplies. This easy-to-use device includes a high dynamic
range sample-and-hold, a precision reference and a PGA
input circuit.

The LTC1405 has a flexible input circuit that allows full­scale input ranges of ±2.048V, ±1.024V and ±0.512V. The
input common mode range is rail-to-rail and a common
mode bias voltage is provided for single supply applica­tions. The input PGA has a digitally selectable 1x or 2x
gain.

Maximum DC specs include ±1LSB INL and ±1LSB DNL
over temperature. Outstanding AC performance includes

71.3dB S/(N + D) and 85dB SFDR at the Nyquist input
frequency of 2.5MHz.

The unique differential input sample-and-hold can acquire
single-ended or differential input signals up to its 100MHz
bandwidth. The 75dB common mode rejection allows
users to eliminate ground loops and common mode noise
by measuring signals differentially from the source. A
separate output logic supply allows direct connection to
3V components.

TYPICAL APPLICATIO

5V

GAIN

+

A

IN

S/H

–A

IN

V

CM

1µF

SENSE

V

REF

1µF

1µF

MODE SELECT

SS

0V OR –5V

U

5V

1µF

AV

DD

PIPELINED 12-BIT ADC

DIGITAL CORRECTION

LOGIC

2.5V

REFERENCE

2.048V

AGND

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the
interconnection of its circuits as described herein will not infringe on existing patent rights.

1µF

5V

DV

OV

DD

OUTPUT

BUFFERS

OGND

DGNDV

OPTIONAL 3V
LOGIC SUPPLY

1µF

DD

OF
D11 (MSB)

D0 (LSB)

5MHz CLK

1405 TA01

1.00

0.75

0.50

0.25
0

INL (LSBs)

–0.25
–0.50
–0.75
–1.00

0 1024 2048 3072 4096

However,

Typical INL Curve

CODE

1405 TA02

1

LTC1405

WW

W

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ABSOLUTE AXI U RATI GS

AVDD = DVDD = 0VDD = VDD (Notes 1, 2)

Supply Voltage (VDD)................................................. 6V

Negative Supply Voltage (VSS) ................................ –6V

Total Supply Voltage (VDD to VSS) ........................... 12V

Analog Input Voltage

(Note 3) .............................(VSS – 0.3V) to (VDD + 0.3V)

Digital Input Voltage

(Note 4) .............................(VSS – 0.3V) to (VDD + 0.3V)

Digital Output Voltage........(VSS – 0.3V) to (VDD + 0.3V)

Power Dissipation.............................................. 500mW

Operating Temperature Range

LTC1405C ...............................................0°C to 70°C

LTC1405I............................................ –40°C to 85°C

Storage Temperature Range................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec)..................300°C

UUW

PACKAGE/ORDER I FOR ATIO

TOP VIEW

1

+A

IN

2

–A

IN

3

V

CM

4

SENSE

5

V

REF

6

AGND

7

AV

DD

8

AGND

D11 (MSB)

Consult factory for Military grade parts.

9

10

D10

11

D9

12

D8

13

D7

14

D6

GN PACKAGE

28-LEAD PLASTIC SSOP

T

= 110°C, θJA = 110°C/W

JMAX

GAIN

28

OF

27

CLK

26

V

25

SS

DGND

24

DV

23

DD

OV

22

DD

OGND

21

D0

20

D1

19

D2

18

D3

17

D4

16

D5

15

ORDER PART

NUMBER

LTC1405CGN
LTC1405IGN

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CO VERTER CHARACTERISTICS

The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
With Internal 4.096V Reference. Specifications are guaranteed for both dual supply and single supply operation. (Note 5)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Resolution (No Missing Codes) ● 12 Bits
Integral Linearity Error (Note 7) ● ±0.35 ±1 LSB
Differential Linearity Error ● ±0.25 ±1 LSB
Offset Error (Note 8) ±5 12 LSB

● 16 LSB

Full-Scale Error ±10 30 LSB
Full-Scale Tempco I

A

U

LOG

IA

U
PUT

The ● denotes the specifications which apply over the full operating temperature range, otherwise

specifications are at TA = 25°C. Specifications are guaranteed for both dual supply and single supply operation. (Note 5)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

I
C

t

IN

IN

IN

ACQ

Analog Input Range (Note 9) V

– (–AIN)V

+A

IN

Analog Input Leakage Current ● ±10 µA
Analog Input Capacitance Between Conversions 12 pF

Sample-and-Hold Acquisition Time 50 ns

= 0 ±15 ppm/°C

OUT(REF)

= 4.096V (SENSE = 0V), GAIN = 5V ● ±2.048 V

REF

= 4.096V (SENSE = 0V), GAIN = 0V ● ±1.024 V

REF

= 2.048V (SENSE = V

V

REF

V

= 2.048V (SENSE = V

REF

External V
External V

During Conversions 6 pF

(SENSE = 5V), GAIN = 5V ● ±V

REF

(SENSE = 5V), GAIN = 0V ● ±V

REF

), GAIN = 5V ● ±1.024 V

REF

), GAIN = 0V ● ±0.512 V

REF

/2 V

REF

/4 V

REF

2

LTC1405

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AP
jitter

LOG

Sample-and-Hold Aperture Delay Time –250 ps
Sample-and-Hold Aperture Delay Time Jitter 0.6 ps

W

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IC

A

Full-Power Bandwidth 100 MHz
Input Referred Noise ±2.048V Input Range 0.22 LSB

A

specifications are at TA = 25°C. Specifications are guaranteed for both dual supply and single supply operation. (Note 5)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

t
t
CMRR Analog Input Common Mode Rejection Ratio –2.048V < (–AIN = +AIN) < 2.048V 75 dB

DY

otherwise specifications are at TA = 25°C. VDD = 5V, VSS = –5V, f
–AIN = 0V. (Note 6)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

S/(N + D) Signal-to-Noise Plus Distortion Ratio 1MHz Input Signal ● 69.0 71.6 dB

THD Total Harmonic Distortion 1MHz Input Signal, First 5 Harmonics ● –87 –78.5 dB

SFDR Peak Harmonic or Spurious Noise 1MHz Input Signal ● –89 –79.5 dB

IMD Intermodulation Distortion f

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IA

PUT

The ● denotes the specifications which apply over the full operating temperature range, otherwise

ACCURAC Y

The ● denotes the specifications which apply over the full operating temperature range,

= 5MHz, V

SAMPLE

2.5MHz Input Signal

2.5MHz Input Signal, First 5 Harmonics

2.5MHz Input Signal
= 29.37kHz, f

IN1

±1.024V Input Range, 2x Mode (SENSE = GAIN = 0V) 0.33 LSB

= 32.446kHz –80 dB

IN2

= 4.096V. +AIN = –0.1dBFS single ended input,

REF

● 68.7 71.3 dB

● –83 –77.0 dB

● –85 –78.0 dB

RMS
RMS

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I TER AL REFERE CE CHARACTERISTICS

TA = 25°C. Specifications are guaranteed for both dual supply and single supply operation. (Note 5)

PARAMETER CONDITIONS MIN TYP MAX UNITS

VCM Output Voltage I
VCM Output Tempco I
VCM Line Regulation 4.75V ≤ VDD ≤ 5.25V 0.6 mV/V

VCM Output Resistance 0.1mA ≤ I
V

Output Voltage SENSE = GND, I

REF

V

Output Tempco ±15 ppm/°C

REF

= 0 2.475 2.500 2.525 V

OUT

= 0 ±15 ppm/°C

OUT

–5.25V ≤ V

SENSE = V
SENSE = V

≤ –4.75V 0.03 mV/V

SS

 ≤ 0.1mA 8 Ω

OUT

= 0 4.096 V

OUT

, I

= 0 2.048 V

REF

OUT

DD

Drive V

External Reference

with V

REF

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DIGITAL I PUTS AND OUTPUTS

temperature range, otherwise specifications are at TA = 25°C. Specifications are guaranteed for both dual supply and single supply
operation. (Note 5)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

IH

V

IL

High Level Input Voltage V

V

Low Level Input Voltage VDD = 4.75V, VSS = 0V ● 0.8 V

V

The ● denotes the specifications which apply over the full operating

= 5.25V, VSS = 0V ● 2.4 V

DD

= 5.25V, VSS = –5V ● 3.5 V

DD

= 4.75V, VSS = –5V ● 1V

DD

3

LTC1405

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DIGITAL I PUTS AND OUTPUTS

temperature range, otherwise specifications are at TA = 25°C. Specifications are guaranteed for both dual supply and single supply
operation. (Note 5)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

I

IN

C

IN

V

OH

V

OL

I

SOURCE

I

SINK

POWER REQUIRE E TS

range, otherwise specifications are at TA = 25°C. Specifications are guaranteed for both dual supply and single supply operation.
(Note 5)

Digital Input Current VIN = 0V to V
Digital Input Capacitance 1.8 pF
High Level Output Voltage 0VDD = 4.75V, IO = –10µA 4.74 V

Low Level Output Voltage 0VDD = 4.75V, IO = 160µA 0.05 V

Output Source Current V
Output Sink Current V

U

W

The ● denotes the specifications which apply over the full operating temperature

The ● denotes the specifications which apply over the full operating

DD

= 4.75V, IO = –200µA ● 4.0 4.71 V

0V

DD

= 2.7V, IO = –10µA 2.6 V

0V

DD

0V

= 2.7V, IO = –200µA ● 2.3 V

DD

= 4.75V, IO = 1.6mA ● 0.10 0.4 V

0V

DD

= 2.7V, IO = 160µA 0.05 V

0V

DD

0V

= 2.7V, IO = 1.6mA ● 0.10 0.4 V

DD

= 0V 50 mA

OUT

= V

OUT

DD

● ±10 µA

35 mA

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

DD

V

SS

I

DD

I

SS

P

D

W

TI I G CHARACTERISTICS

Positive Supply Voltage (Note 10) 4.75 5.25 V
Negative Supply Voltage Dual Supply Mode –5.25 –4.75 V

Single Supply Mode 0 V
Positive Supply Current ● 23 28 mA
Negative Supply Current ● 0.8 1.2 mA
Power Dissipation ● 115 145 mW

U

The ● denotes the specifications which apply over the full operating temperature

range, otherwise specifications are at TA = 25°C. Specifications are guaranteed for both dual supply and single supply operation.
(Note 5)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

f

SAMPLE

t

CONV

t

ACQ

t

H

t

L

t

AD

Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.

Note 2: All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).

Note 3: When these pin voltages are taken below V
will be clamped by internal diodes. This product can handle input currents
greater than 100mA below VSS or above VDD without latchup.

Sampling Frequency ● 0.02 5 MHz
Conversion Time ● 150 180 ns
Acquisition Time ● 20 50 ns
CLK High Time (Note 9) ● 20 100 ns
CLK Low Time (Note 9) ● 20 100 ns
Aperture Delay of Sample-and-Hold –250 ps

they will be clamped

SS

without

DD

or above VDD, they

SS

Note 4: When these pin voltages are taken below V
by internal diodes. This product can handle input currents greater than
100mA below VSS without latchup. GAIN is not clamped to VDD. When CLK
is taken above V
can handle input currents of greater than 100mA above V
latchup.

Note 5: V
otherwise specified.

DD

, it will be clamped by an internal diode. The CLK pin

DD

= 5V, VSS = –5V or 0V, f

= 5MHz, tr = tf = 5ns unless

SAMPLE

4

ELECTRICAL CHARACTERISTICS

LTC1405

Note 6: Dynamic specifications are guaranteed for dual supply operation
with a single-ended +A
dynamic specifications, refer to the Typical Performance Characteristics.

Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.

input and –AIN grounded. For single supply

IN

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PI FU CTIO S

+AIN (Pin 1):
–AIN (Pin 2): Negative Analog Input.
VCM (Pin 3): 2.5V Reference Output.Optional input com-

mon mode for single supply operation. Bypass to GND
with a 1µF to 10µF ceramic.

SENSE (Pin 4): Reference Programming Pin. Ground
selects V
SENSE to VDD to drive V

V

(Pin 5): DAC Reference. Bypass to GND with a 1µF to

REF

10µF ceramic.
GND (Pin 6): DAC Reference Ground.

Positive Analog Input.

= 4.096V. Short to V

REF

REF

for 2.048V. Connect

REF

with an external reference.

Note 8: Bipolar offset is the offset voltage measured from –0.5LSB
when the output code flickers between 0000 0000 0000 and
1111 1111 1111.

Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.

OGND (Pin 21): Output Logic Ground. Tie to GND.
OVDD (Pin 22): Positive Supply for the Output Logic.

Connect to Pin 23 for 5V logic. If not shorted to Pin 23,
bypass to GND with a 1µF ceramic.

VDD (Pin 23): Analog 5V Supply. Bypass to GND with a 1µF
ceramic.

GND (Pin 24): Analog Power Ground.
VSS (Pin 25): Negative Supply. Can be –5V or 0V. If VSS is

not shorted to GND, bypass to GND with a 1µF ceramic.
CLK (Pin 26): Conversion Start Signal. This active high

signal starts a conversion on its rising edge.

VDD (Pin 7): Analog 5V Supply. Bypass to GND with a 1µF
to 10µF ceramic.

GND (Pin 8): Analog Power Ground.
D11 to D0 (Pins 9 to 20): Data Outputs. The output format

is two’s complement.

OF (Pin 27): Overflow Output. This signal is high when the
digital output is 011111111111 or 100000000000.

GAIN (Pin 28): Gain Select for Input PGA. 5V selects an
input gain of 1, 0V selects a gain of 2.

5