FEATURES
■
Wide Input Range: 5.5V to 60V
■
3A Peak Switch Current
■
Small Thermally Enhanced 16-Pin TSSOP Package
■
Constant 500kHz Switching Frequency
■
Saturating Switch Design: 0.1Ω
■
Peak Switch Current Maintained Over
Full Duty Cycle Range
■
Effective Supply Current: 2.5mA
■
Shutdown Current: 30µA
■
1.2V Feedback Reference Voltage
■
Easily Synchronizable
■
Cycle-by-Cycle Current Limiting
U
APPLICATIO S
■
Industrial and Automotive Power Supplies
■
Portable Computers
■
Battery Chargers
■
Distributed Power Systems
LT3431
High Voltage, 3A,
500kHz Step-Down
Switching Regulator
U
DESCRIPTIO
The LT®3431 is a 500kHz monolithic buck switching regulator that accepts input voltages up to 60V. A high efficiency
3A, 0.1Ω switch is included on the die along with all the necessary oscillator, control and logic circuitry. A current mode
architecture provides fast transient response and good loop
stability.
Special design techniques and a new high voltage process
achieve high efficiency over a wide input range. Efficiency
is maintained over a wide output current range by using the
output to bias the circuitry and by utilizing a supply boost
capacitor to saturate the power switch. Patented circuitry
maintains peak switch current over the full duty cycle range.
A shutdown pin reduces supply current to 30µA and the de-
vice can be externally synchronized from 580kHz to 700kHz
with logic level inputs.
The LT3431 is available in a thermally enhanced 16-pin
TSSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
5V, 2A Buck Converter
V
12V
(TRANSIENTS
TO 60V)
IN
2.2µF†
100V
CERAMIC
**
INCREASE INDUCTOR VALUE FOR LOAD CURRENTS ABOVE 2A
(SEE APPLICATIONS INFORMATION—MAXIMUM OUTPUT LOAD CURRENT)
†
UNITED CHEMI-CON THCS50EZA225ZT
3, 4
1, 8, 9, 16
BOOST
V
IN
LT3431
15
SHDN
14
SYNC
GND
1.5k
15nF
U
MMSD914TI
6
SW
BIAS
FB
V
C
11
220pF
2, 5
10
12
0.22µF
30BQ060
10µH**
15.4k
4.99k
V
OUT
5V
2A
47µF
CERAMIC
3431 TA01
Efficiency vs Load Current
100
= 12V
V
IN
L = 15µH
90
80
70
EFFICIENCY (%)
60
50
0
0.5
1.0
LOAD CURRENT (A)
V
= 5V
OUT
V
= 3.3V
OUT
1.5
2.0
2.5
3431 TA02
sn3431 3431fs
1
LT3431
WWWU
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
UU
W
(Note 1)
Input Voltage (VIN) ................................................. 60V
BOOST Pin Above SW ............................................ 35V
BOOST Pin Voltage ................................................. 68V
SYNC Voltage ........................................................... 7V
SHDN Voltage ........................................................... 6V
BIAS Pin Voltage .................................................... 30V
FB Pin Voltage/Current .................................. 3.5V/2mA
Operating Junction Temperature Range
LT3431EFE (Notes 8, 10) ................. –40°C to 125°C
LT3431IFE (Notes 8, 10) ................. –40°C to 125°C
Storage Temperature Range ................ –65°C to 150°C
TOP VIEW
1
GND
2
SW
3
V
IN
4
V
IN
5
SW
6
BOOST
7
NC
8
GND
FE PACKAGE
16-LEAD PLASTIC TSSOP
T
= 125°C, θJA = 45°C/W, θJC (PAD) = 10°C/W
JMAX
EXPOSED PAD MUST BE SOLDERED
TO GROUND PLANE
16
15
14
13
12
11
10
9
GND
SHDN
SYNC
NC
FB
V
C
BIAS
GND
ORDER PART
NUMBER
LT3431EFE
LT3431IFE
FE PART MARKING
3431EFE
3431IFE
Lead Temperature (Soldering, 10 sec)................. 300°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C.
VIN = 15V, VC = 1.5V, SHDN = 1V, BOOST open circuit, SW open circuit, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Reference Voltage (V
FB Input Bias Current ● –0.2 –1.5 µA
Error Amp Voltage Gain (Note 2) 200 475 V/V
Error Amp g
VC to Switch g
m
m
EA Source Current FB = 1V or V
EA Sink Current FB = 1.4V or V
VC Switching Threshold Duty Cycle = 0 0.8 V
VC High Clamp SHDN = 1V 2.1 V
Switch Current Limit VC Open, BOOST = VIN + 5V, FB = 1V or V
Switch On Resistance ISW = 2.5A, BOOST = VIN + 5V (Note 7) 0.1 0.14 Ω
Maximum Switch Duty Cycle FB = 1V or V
Switch Frequency VC Set to Give DC = 50% 460 500 540 kHz
fSW Line Regulation 5.5V ≤ VIN ≤ 60V ● 0.05 0.15 %/V
fSW Shifting Threshold Df = 10kHz 0.8 V
) 5.5V ≤ VIN ≤ 60V 1.204 1.219 1.234 V
REF
+ 0.2 ≤ VC ≤ VOH – 0.2 ● 1.195 1.243 V
V
OL
dl (VC) = ±10µA 1650 2200 3300 µMho
● 1000 4200 µMho
3.4 A/V
= 4.1V ● 125 275 450 µA
SENSE
= 5.7V ● 100 275 500 µA
SENSE
= 4.1V –40°C␣ ≤ Tj ≤ 25°C 3.0 5 6.5 A
SENSE
(Note 9) Tj = 125°C 2.5 4 5.5 A
● 0.18 Ω
= 4.1V 88 92 %
SENSE
● 80 %
● 430 500 570 kHz
2
sn3431 3431fs
LT3431
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C.
VIN = 15V, VC = 1.5V, SHDN = 1V, BOOST open circuit, SW open circuit, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input Voltage (Note 3) ● 4.6 5.5 V
Minimum Boost Voltage (Note 4) ISW ≤ 2.5A ● 1.8 3 V
Boost Current (Note 5) BOOST = VIN + 5V, ISW = 0.75A ● 25 50 mA
BOOST = VIN + 5V, ISW = 2.5A ● 75 120 mA
Input Supply Current (I
Bias Supply Current (I
Shutdown Supply Current SHDN = 0V, VIN ≤ 60V, SW = 0V, VC Open 30 100 µA
Lockout Threshold VC Open, ● 2.30 2.42 2.53 V
Shutdown Thresholds VC Open, Shutting Down ● 0.15 0.37 0.58 V
Minimum SYNC Amplitude ● 1.5 2.2 V
SYNC Frequency Range 580 700 kHz
SYNC Input Resistance 20 kΩ
) (Note 6) V
VIN
) (Note 6) V
BIAS
V
= 5V 1.5 2.2 mA
BIAS
= 5V 3.1 4.2 mA
BIAS
● 200 µA
Open, Starting Up ● 0.25 0.42 0.6 V
C
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Gain is measured with a VC swing equal to 200mV above the low
clamp level to 200mV below the upper clamp level.
Note 3: Minimum input voltage is not measured directly, but is guaranteed
by other tests. It is defined as the voltage where internal bias lines are still
regulated so that the reference voltage and oscillator remain constant.
Actual minimum input voltage to maintain a regulated output will depend
upon output voltage and load current. See Applications Information.
Note 4: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 5: Boost current is the current flowing into the BOOST pin with the
pin held 5V above input voltage. It flows only during switch on time.
Note 6: Input supply current is the quiescent current drawn by the input
pin when the BIAS pin is held at 5V with switching disabled. Bias supply
current is the current drawn by the BIAS pin when the BIAS pin is held at
5V. Total input referred supply current is calculated by summing input
supply current (I
= I
I
TOTAL
= 15V, V
With V
IN
) with a fraction of bias supply current (I
VIN
+ (I
VIN
OUT
)(V
BIAS
= 5V, I
OUT/VIN
= 1.5mA, I
VIN
)
= 3.1mA, I
BIAS
BIAS
TOTAL
):
= 2.5mA.
Note 7: Switch on resistance is calculated by dividing VIN to SW voltage by
the forced current (3A). See Typical Performance Characteristics for the
graph of switch voltage at other currents.
Note 8: The LT3431EFE is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3431IFE is guaranteed over the full –40°C to 125°C operating junction
temperature range.
Note 9: See Typical Performance Graph of Peak Switch Current Limit vs
Junction Temperature.
Note 10. This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
sn3431 3431fs
3
LT3431
JUNCTION TEMPERATURE (°C)
–50
250
200
150
100
12
6
0
25 75
3431 G03
–25 0
50 100 125
CURRENT (µA)
CURRENT REQUIRED TO FORCE SHUTDOWN
(FLOWS OUT OF PIN). AFTER SHUTDOWN,
CURRENT DROPS TO A FEW µA
AT 2.38V STANDBY THRESHOLD
(CURRENT FLOWS OUT OF PIN)
SHUTDOWN VOLTAGE (V)
0
0
INPUT SUPPLY CURRENT (µA)
50
100
150
200
250
300
0.1 0.2 0.3 0.4
3431 G06
0.5
VIN = 60V
V
IN
= 15V
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Switch Peak Current Limit
6
Tj = 25°C
5
TYPICAL
4
3
SWITCH PEAK CURRENT (A)
2
GUARANTEED MINIMUM
20 40
DUTY CYCLE (%)
Lockout and Shutdown
Thresholds
2.4
2.0
1.6
1.2
0.8
SHDN PIN VOLTAGE (V)
0.4
0
–25 125
–50
JUNCTION TEMPERATURE (°C)
LOCKOUT
START-UP
SHUTDOWN
0
25 75
60 80
50 100
3431 G01
3431 G04
1.234
1.229
1.224
1.219
1.214
FEEDBACK VOLTAGE (V)
1.209
1.204
1000
FB Pin Voltage and Current SHDN Pin Bias Current
2.0
1.5
CURRENT (µA)
VOLTAGE
1.0
CURRENT
0.5
–50
–25 0
JUNCTION TEMPERATURE (°C)
50 100 125
25 75
0
3431 G02
Shutdown Supply Current Shutdown Supply Current
40
V
= 0V
SHDN
35
30
25
20
15
10
INPUT SUPPLY CURRENT (µA)
5
0
0
10 20 30 40 50 60
INPUT VOLTAGE (V)
3431 G05
Error Amplifier Transconductance
2500
2000
1500
1000
500
TRANSCONDUCTANCE (µmho)
0
–50
4
0
JUNCTION TEMPERATURE (°C)
50 100
25 75–25 125
3431 G07
Error Amplifier Transconductance
3000
2500
2000
1500
V
GAIN (µMho)
1000
500
2 • 10
FB
ERROR AMPLIFIER EQUIVALENT CIRCUIT
R
LOAD
100 10k 100k 10M
PHASE
GAIN
R
–3
)(
= 50Ω
1k 1M
FREQUENCY (Hz)
OUT
200k
C
OUT
12pF
V
C
3431 G08
200
150
100
50
0
–50
625
500
PHASE (DEG)
375
250
OR FB CURRENT (µA)
125
SWITICHING FREQUENCY (kHz)
0
0 0.2
Frequency Foldback
0.4
0.6
VFB (V)
SWITCHING
FREQUENCY
FB PIN
CURRENT
0.8
1.0
sn3431 3431fs
1.2
3431 G09
SWITCH CURRENT (A)
0123
BOOST PIN CURRENT (mA)
3431 G12
90
80
70
60
50
40
30
20
10
0
UW
JUNCTION TEMPERATURE (°C)
–50
SWITCH MINIMUM ON TIME (ns)
400
500
600
25 75
3431 G15
300
200
–25 0
50 100 125
100
0
TYPICAL PERFOR A CE CHARACTERISTICS
Minimum Input Voltage
Switching Frequency BOOST Pin Current
575
with 5V Output
7.5
LT3431
550
525
500
475
FREQUENCY (kHz)
450
425
–50
0
–25 125
JUNCTION TEMPERATURE (°C)
25 75
VC Pin Shutdown Threshold
2.1
1.9
1.7
1.5
1.3
1.1
THRESHOLD VOLTAGE (V)
0.9
0.7
–50
–25 0
JUNCTION TEMPERATURE (°C)
25 75
50 100
3431 G10
50 100 125
3431 G13
7.0
6.5
6.0
INPUT VOLTAGE (V)
5.5
5.0
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
MINIMUM INPUT
VOLTAGE TO START
MINIMUM INPUT
VOLTAGE TO RUN
LOAD CURRENT (A)
3431 G11
Switch Voltage Drop
450
400
350
300
250
200
150
SWITCH VOLTAGE (mV)
100
50
0
0123
TJ = 25°C
SWITCH CURRENT (A)
TJ = 125°C
TJ = –40°C
3431 G14
Switch Minimum ON Time
vs Temperature
Switch Peak Current Limit
6.00
5.50
5.00
4.50
4.00
3.50
3.00
SWITCH PEAK CURRENT LIMIT (A)
2.50
–50
0
–25 125
JUNCTION TEMPERATURE (°C)
25 75
50 100
3431 G16
sn3431 3431fs
5
LT3431
U
UU
PI FU CTIO S
GND (Pins 1, 8, 9, 16): The GND pin connections act as
the reference for the regulated output, so load regulation
will suffer if the “ground” end of the load is not at the same
voltage as the GND pins of the IC. This condition will occur
when load current or other currents flow through metal
paths between the GND pins and the load ground. Keep the
paths between the GND pins and the load ground short
and use a ground plane when possible. The FE package has
an exposed pad that is fused to the GND pins. The pad
should be soldered to the copper ground plane under the
device to reduce thermal resistance. (See Applications
Information—Layout Considerations.)
SW (Pins 2, 5): The switch pin is the emitter of the on-chip
power NPN switch. This pin is driven up to the input pin
voltage during switch on time. Inductor current drives the
switch pin voltage negative during switch off time. Negative voltage is clamped with the external catch diode.
Maximum negative switch voltage allowed is –0.8V.
VIN (Pins 3, 4): This is the collector of the on-chip power
NPN switch. VIN powers the internal control circuitry when
a voltage on the BIAS pin is not present. High dI/dt edges
occur on this pin during switch turn on and off. Keep the
path short from the VIN pin through the input bypass
capacitor, through the catch diode back to SW. All trace
inductance in this path creates voltage spikes at switch off,
adding to the VCE voltage across the internal NPN.
BOOST (Pin 6): The BOOST pin is used to provide a drive
voltage, higher than the input voltage, to the internal bipolar NPN power switch. Without this added voltage, the
typical switch voltage loss would be about 1.5V. The additional BOOST voltage allows the switch to saturate and
voltage loss approximates that of a 0.1Ω FET structure.
NC (Pins 7, 13): No Connection.
supply. This architecture increases efficiency especially
when the input voltage is much higher than the output.
Minimum output voltage setting for this mode of operation
is 3V.
VC (Pin 11) The VC pin is the output of the error amplifier
and the input of the peak switch current comparator. It is
normally used for frequency compensation, but can also
serve as a current clamp or control loop override. VC sits
at about 0.9V for light loads and 2.1V at maximum load. It
can be driven to ground to shut off the regulator, but if
driven high, current must be limited to 4mA.
FB (Pin 12): The feedback pin is used to set the output
voltage using an external voltage divider that generates
1.22V at the pin for the desired output voltage. Three
additional functions are performed by the FB pin. When the
pin voltage drops below 0.6V, switch current limit is
reduced and the external SYNC function is disabled. Below
0.8V, switching frequency is also reduced. See Feedback
Pin Functions in Applications Information for details.
SYNC (Pin 14): The SYNC pin is used to synchronize the
internal oscillator to an external signal. It is directly logic
compatible and can be driven with any signal between
10% and 90% duty cycle. The synchronizing range is
equal to initial operating frequency up to 700kHz. See
Synchronizing in Applications Information for details.
SHDN (Pin 15): The SHDN pin is used to turn off the
regulator and to reduce input drain current to a few
microamperes. This pin has two thresholds: one at 2.38V
to disable switching and a second at 0.4V to force complete micropower shutdown. The 2.38V threshold functions as an accurate undervoltage lockout (UVLO); sometimes used to prevent the regulator from delivering power
until the input voltage has reached a predetermined level.
B
IAS (Pin 10): The BIAS pin is used to improve efficiency
when operating at higher input voltages and light load
current. Connecting this pin to the regulated output voltage forces most of the internal circuitry to draw its operating current from the output voltage rather than the input
6
If the SHDN pin functions are not required, the pin can
either be left open (to allow an internal bias current to lift
the pin to a default high state) or be forced high to a level
not to exceed 6V.
sn3431 3431fs
BLOCK DIAGRA
LT3431
W
The LT3431 is a constant frequency, current mode buck
converter. This means that there is an internal clock and
two feedback loops that control the duty cycle of the power
switch. In addition to the normal error amplifier, there is a
current sense amplifier that monitors switch current on a
cycle-by-cycle basis. A switch cycle starts with an oscillator pulse which sets the RS flip-flop to turn the switch on.
When switch current reaches a level set by the inverting
input of the comparator, the flip-flop is reset and the
switch turns off. Output voltage control is obtained by
using the output of the error amplifier to set the switch
current trip point. This technique means that the error
amplifier commands current to be delivered to the output
rather than voltage. A voltage fed system will have low
phase shift up to the resonant frequency of the inductor
and output capacitor, then an abrupt 180° shift will occur.
The current fed system will have 90° phase shift at a much
lower frequency, but will not have the additional 90° shift
until well beyond the LC resonant frequency. This makes
V
IN
3, 4
BIAS
SYNC
10
14
SHUTDOWN
COMPARATOR
2.9V BIAS
REGULATOR
+
0.4V
–
INTERNAL
V
CC
SLOPE COMP
ANTISLOPE COMP
500kHz
OSCILLATOR
Σ
it much easier to frequency compensate the feedback loop
and also gives much quicker transient response.
Most of the circuitry of the LT3431 operates from an
internal 2.9V bias line. The bias regulator normally draws
power from the regulator input pin, but if the BIAS pin is
connected to an external voltage equal to or higher than
3V, bias power will be drawn from the external source
(typically the regulated output voltage). This will improve
efficiency if the BIAS pin voltage is lower than regulator
input voltage.
High switch efficiency is attained by using the BOOST pin
to provide a voltage to the switch driver which is higher
than the input voltage, allowing switch to be saturated.
This boosted voltage is generated with an external
capacitor and diode. Two comparators are connected to
the shutdown pin. One has a 2.38V threshold for undervoltage lockout and the second has a 0.4V threshold for
complete shutdown.
R
LIMIT
–
+
CURRENT
COMPARATOR
BOOST
6
S
R
R
S
FLIP-FLOP
DRIVER
CIRCUITRY
R
SENSE
Q1
POWER
SWITCH
SHDN
5.5µA
2.38V
+
–
LOCKOUT
COMPARATOR
V
C(MAX)
CLAMP
FREQUENCY
FOLDBACK
×1
Q2
FOLDBACK
Q3
CURRENT
LIMIT
CLAMP
11
V
C
AMPLIFIER
g
= 2000µMho
m
ERROR
–
+
15
1.22V
2, 5
12
3431 F01
SW
FB
GND
1, 8, 9, 16
Figure 1. LT3431 Block Diagram
sn3431 3431fs
7
LT3431
WUUU
APPLICATIO S I FOR ATIO
FEEDBACK PIN FUNCTIONS
The feedback (FB) pin on the LT3431 is used to set output
voltage and provide several overload protection features.
The first part of this section deals with selecting resistors
to set output voltage and the second part talks about
foldback frequency and current limiting created by the FB
pin. Please read both parts before committing to a final
design.
The suggested value for the output divider resistor (see
Figure 2) from FB to ground (R2) is 5k or less, and a
formula for R1 is shown below. The output voltage error
caused by ignoring the input bias current on the FB pin is
less than 0.25% with R2 = 5k. A table of standard 1%
values is shown in Table 1 for common output voltages.
Please read the following if divider resistors are increased
above the suggested values.
RV
2122
()
=
R
1
Table 1
OUTPUT R1 % ERROR AT OUTPUT
VOLTAGE R2 (NEAREST 1%) DUE TO DISCREET 1%
(V) (k
3 4.99 7.32 +0.32
3.3 4.99 8.45 –0.43
5 4.99 15.4 –0.30
6 4.75 18.7 +0.40
8 4.47 24.9 +0.20
10 4.32 30.9 – 0.54
12 4.12 36.5 + 0.24
15 4.12 46.4 – 0.27
−
OUT
.
122
.
Ω
)(k
Ω
) RESISTOR STEPS
More Than Just Voltage Feedback
The feedback pin is used for more than just output voltage
sensing. It also reduces switching frequency and current
limit when output voltage is very low (see the Frequency
Foldback graph in Typical Performance Characteristics).
This is done to control power dissipation in both the IC and
in the external diode and inductor during short-circuit
conditions. A shorted output requires the switching regulator to operate at very low duty cycles, and the average
current through the diode and inductor is equal to the
short-circuit current limit of the switch (typically 4A for the
LT3431, folding back to less than 2A). Minimum switch on
time limitations would prevent the switcher from attaining
a sufficiently low duty cycle if switching frequency were
maintained at 500kHz, so frequency is reduced by about
5:1 when the feedback pin voltage drops below 0.8V (see
Frequency Foldback graph). This does not affect operation
with normal load conditions; one simply sees a gear shift
in switching frequency during start-up as the output
voltage rises.
In addition to lower switching frequency, the LT3431 also
operates at lower switch current limit when the feedback
pin voltage drops below 0.6V. Q2 in Figure 2 performs this
function by clamping the VC pin to a voltage less than its
normal 2.1V upper clamp level. This
foldback current limit
greatly reduces power dissipation in the IC, diode and inductor during short-circuit conditions. External synchronization is also disabled to prevent interference with foldback operation. Again, it is nearly transparent to the user
under normal load conditions. The only loads that may be
affected are current source loads which maintain full load
current with output voltage less than 50% of final value. In
these rare situations the feedback pin can be clamped above
0.6V with an external diode to defeat foldback current limit.
Caution:
clamping the feedback pin means that frequency
shifting will also be defeated, so a combination of high input voltage and dead shorted output may cause the LT3431
to lose control of current limit.
The internal circuitry which forces reduced switching
frequency also causes current to flow out of the feedback
pin when output voltage is low. The equivalent circuitry is
shown in Figure 2. Q1 is completely off during normal
operation. If the FB pin falls below 0.8V, Q1 begins to
conduct current and reduces frequency at the rate of
approximately 3.5kHz/µA. To ensure adequate frequency
foldback (under worst-case short-circuit conditions), the
external divider Thevinin resistance must be low enough
to pull 115µA out of the FB pin with 0.44V on the pin (R
≤ 3.8k).
The net result is that reductions in frequency and
DIV
current limit are affected by output voltage divider impedance. Although divider impedance is not critical, caution
should be used if resistors are increased beyond the
suggested values and short-circuit conditions can possibly occur with high input voltage.
High frequency pickup
sn3431 3431fs
8
WUUU
APPLICATIO S I FOR ATIO
LT3431
LT3431
TO FREQUENCY
ERROR
AMPLIFIER
SHIFTING
1.4V
+
1.2V
R3
1k
Q1
R4
2k
–
BUFFER
Q2
TO SYNC CIRCUIT
GND
V
C
Figure 2. Frequency and Current Limit Foldback
will increase and the protection accorded by frequency
and current foldback will decrease.
CHOOSING THE INDUCTOR
For most applications, the output inductor will fall into the
range of 5µH to 33µH. Lower values are chosen to reduce
physical size of the inductor. Higher values allow more
output current because they reduce peak current seen by
the LT3431 switch, which has a 3A limit. Higher values
also reduce output ripple voltage.
When choosing an inductor you will need to consider
output ripple voltage, maximum load current, peak inductor current and fault current in the inductor. In addition,
other factors such as core and copper losses, allowable
component height, EMI, saturation and cost should also
be considered. The following procedure is suggested as a
way of handling these somewhat complicated and conflicting requirements.
Output Ripple Voltage
Figure 3 shows a comparison of output ripple voltage for
the LT3431 using either a tantalum or ceramic output
capacitor. It can be seen from Figure 3 that output ripple
voltage can be significantly reduced by using the ceramic
output capacitor; the significant decrease in output ripple
voltage is due to the very low ESR of ceramic capacitors.
V
SW
10mV/DIV
L1
R1
FB
R2
= 12V 3431 F03
V
IN
V
= 5V
OUT
L = 10µH
+
1µs/DIV
C1
3431 F02
OUTPUT
5V
V
USING
OUT
47µF CERAMIC
OUTPUT
CAPACITOR
USING
V
OUT
100µF, 0.08Ω
TANTALUM
OUTPUT
CAPACITOR
Figure 3. LT3431 Output Ripple Voltage Waveforms.
Ceramic vs Tantalum Output Capacitors
Output ripple voltage is determined by ripple current
(I
) through the inductor and the high frequency
LP-P
impedance of the output capacitor. At high frequencies,
the impedance of the tantalum capacitor is dominated by
its effective series resistance (ESR).
Tantalum Output Capacitor
The typical method for reducing output ripple voltage
when using a tantalum output capacitor is to increase the
inductor value (to reduce the ripple current in the inductor). The following equations will help in choosing the
required inductor value to achieve a desirable output
ripple voltage level. If output ripple voltage is of less
sn3431 3431fs
9
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