LINEAR TECHNOLOGY LT3430, LT3430-1 Technical data
LT3430/LT3430-1
High Voltage, 3A,
200kHz/100kHz Step-Down
Switching Regulators
FEATURES
■
Wide Input Range: 5.5V to 60V
■
3A Peak Switch Current over All Duty Cycles
■
Constant Switching Frequency:
200kHz (LT3430)
100kHz (LT3430-1)
■
0.1Ω Switch Resistance
■
Current Mode
■
Effective Supply Current: 2.5mA
■
Shutdown Current: 30µA
■
1.2V Feedback Reference Voltage
■
Easily Synchronizable
■
Cycle-by-Cycle Current Limiting
■
Small, 16-Pin Thermally Enhanced TSSOP Package
APPLICATIONS
■
Industrial and Automotive Power Supplies
■
Portable Computers
■
Battery Chargers
■
Distributed Power Systems
DESCRIPTION
The LT®3430/LT3430-1 are monolithic buck switching
regulators that accept input voltages up to 60V. A high effi ciency 3A, 0.1Ω switch is included on the die along with
all the necessary oscillator, control and logic circuitry. A
current mode architecture provides fast transient response
and excellent loop stability.
Special design techniques and a new high voltage process
achieve high effi ciency over a wide input range. Effi ciency
is maintained over a wide output current range by using
the output to bias the circuitry and by utilizing a supply
boost capacitor to saturate the power switch. Patented
circuitry* maintains peak switch current over the full duty
cycle range. A shutdown pin reduces supply current to
30µA and a SYNC pin can be externally synchronized with
a logic level input from 228kHz to 700kHz for the LT3430
or from 125kHz to 250kHz for the LT3430-1.
The LT3430/LT3430-1 are available in a thermally enhanced
16-pin TSSOP package.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
*US Patent # 6498466
TYPICAL APPLICATION
5V, 2A Buck Converter
V
IN
5.5V*
TO 60V
4.7µF
100V
ONOFF
*FOR INPUT VOLTAGES BELOW 7.5V, SOME RESTRICTIONS MAY APPLY
** SEE LT3430-1 CIRCUIT IN APPLICATIONS INFORMATION SECTION
V
IN
SHDN
SYNC
GND
0.022µF
BOOST
LT3430**
3.3k
SW
BIAS
V
FB
C
220pF
3430 TA01
0.68µF
30BQ060
MMSD914TI
22µH
15.4k
4.99k
+
V
OUT
5V
2A
100µF 10V
SOLID
TANTALUM
Effi ciency vs Load Current
100
= 5V
V
OUT
90
80
70
EFFICIENCY (%)
60
50
0.5
0
1.0
LOAD CURRENT (A)
VIN = 12V
VIN = 42V
LT3430-1 L = 68µH
LT3430 L =27µH
1.5
2.0
2.5
3430 TA02
34301fa
1
LT3430/LT3430-1
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Input Voltage (VIN) .................................................. 60V
BOOST Pin Above SW (Note 11) .............................. 35V
BOOST Pin Voltage ................................................. 68V
SYNC Voltage ............................................................. 7V
⎯S⎯H⎯D⎯
N Voltage ............................................................ 6V
BIAS Pin Voltage ..................................................... 30V
FB Pin Voltage/Current .................................. 3.5V/2mA
Operating Junction Temperature Range
LT3430EFE (Notes 8, 10) .................. –40°C to 125°C
LT3430IFE (Notes 8, 10) .................. –40°C to 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec) ................ 300°C
PACKAGE/ORDER INFORMATION
TOP VIEW
1
GND
2
SW
3
V
IN
4
V
IN
SW
BOOST
NC
GND
16-LEAD PLASTIC TSSOP
T
= 125°C, θJA = 45°C/W, θJC = 10°C/W
JMAX
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
5
6
7
8
FE PACKAGE
17
ORDER PART NUMBER FE PART MARKING
LT3430EFE
LT3430IFE
LT3430EFE-1
LT3430IFE-1
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
GND
16
SHDN
15
SYNC
14
NC
13
FB
12
V
11
C
BIAS
10
GND
9
3430EFE
3430IFE
3430EFE-1
3430IFE-1
ELECTRICAL CHARACTERISTICS
The
temperature range, otherwise specifi cations are at T
= 25°C. VIN = 15V, VC = 1.5V, ⎯S⎯H⎯D⎯N = 1V, BOOST = Open Circuit,
J
●
denotes the specifi cations which apply over the full operating
SW = Open Circuit, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Reference Voltage (V
FB Input Bias Current
Error Amp Voltage Gain (Note 2) 200 400 V/V
Error Amp g
to Switch g
V
C
EA Source Current FB = 1V
EA Sink Current FB = 1.4V
VC Switching Threshold Duty Cycle = 0 0.9 V
High Clamp
V
C
Switch Current Limit V
Switch On Resistance I
Maximum Switch Duty Cycle (LT3430) FB = 1V
m
m
)V
REF
+ 0.2 ≤ VC ≤ VOH – 0.2
OL
5.5V ≤ V
dl (VC) = ±10µA
⎯S⎯H⎯D⎯
C
–40°C ≤ T
T
J
SW
≤ 60V
IN
N = 1V 2.1 V
Open, Boost = VIN + 5V, FB = 1V
≤ 25°C
J
= 125°C (Note 9)
= 2.5A, Boost = VIN + 5V (Note 7) 0.1 0.14
1.204
●
1.195
●
1650
●
1000
●
125 225 450 µA
●
100 225 500 µA
2.5
93
●
90
3
1.219 1.234
–0.2 –1.5 µA
2200 3300
3.4 A/V
96 %
1.243
4200
5
4
6.5
5.5
0.18
µMho
µMho
34301fa
V
A
A
Ω
Ω
%
2
LT3430/LT3430-1
ELECTRICAL CHARACTERISTICS
The
temperature range, otherwise specifi cations are at T
= 25°C. VIN = 15V, VC = 1.5V, ⎯S⎯H⎯D⎯N = 1V, BOOST = Open Circuit,
J
SW = Open Circuit, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Maximum Switch Duty Cycle (LT3430-1)
Switch Frequency (LT3430) V
Switch Frequency (LT3430-1)
f
Line Regulation 5.5V ≤ VIN ≤ 60V
SW
Shifting Threshold Df = 10kHz 0.8 V
f
SW
Minimum Input Voltage (Note 3)
Minimum Boost Voltage (Note 4) I
Boost Current (Note 5) Boost = V
Input Supply Current (I
Bias Supply Current (I
) (Note 6) V
VIN
) (Note 6) V
BIAS
Shutdown Supply Current
Lockout Threshold VC Open
Shutdown Threshold V
Minimum SYNC Amplitude 1.5 V
SYNC Frequency Range (LT3430) 228 700 kHz
SYNC Frequency Range (LT3430-1) 125 250 kHz
SYNC Input Resistance 20 kΩ
Set to Give DC = 50%
C
Boost = V
⎯S⎯H⎯D⎯
N = 0V, VIN ≤ 60V, SW = 0V, VC Open
Open, Shutting Down
C
V
Open, Starting Up
C
●
denotes the specifi cations which apply over the full operating
96
●
94
184
●
172
88
●
85
●
●
≤ 2.5A
SW
+ 5V, ISW = 0.75A
IN
+ 5V, ISW = 2.5A
IN
= 5V 1.5 2.2 mA
BIAS
= 5V 3.1 4.2 mA
BIAS
●
●
●
98 %
200
200
100
100
216
228
115
120
0.05 0.15 %/V
4.6 5.5 V
1.8 3 V
25
75
50
120
30 100
●
●
2.3 2.42 2.53 V
●
0.15
●
0.25
0.37
0.42
200
0.58
0.60
kHz
kHz
kHz
kHz
mA
mA
µA
µA
%
V
V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Gain is measured with a V
swing equal to 200mV above the low
C
clamp level to 200mV below the upper clamp level.
Note 3: Minimum input voltage is not measured directly, but is guaranteed
by other tests. It is defi ned as the voltage where internal bias lines are still
regulated so that the reference voltage and oscillator remain constant.
Actual minimum input voltage to maintain a regulated output will depend
upon output voltage and load current. See Applications Information.
Note 4: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 5: Boost current is the current fl owing into the BOOST pin with the
pin held 5V above input voltage. It fl ows only during switch on time.
Note 6: Input supply current is the quiescent current drawn by the input
pin when the BIAS pin is held at 5V with switching disabled. Bias supply
current is the current drawn by the BIAS pin when the BIAS pin is held
at 5V. Total input referred supply current is calculated by summing input
supply current (I
I
With V
TOTAL
IN
= I
= 15V, V
) with a fraction of bias supply current (I
VIN
+ (I
VIN
OUT
BIAS
= 5V, I
)(V
OUT/VIN
= 1.4mA, I
VIN
)
= 2.9mA, I
BIAS
BIAS
TOTAL
):
= 2.4mA.
Note 7: Switch on resistance is calculated by dividing V
to SW voltage
IN
by the forced current (3A). See Typical Performance Characteristics for the
graph of switch voltage at other currents.
Note 8: The LT3430EFE/LT3430EFE-1 are guaranteed to meet performance
specifi cations from 0°C to 125°C junction temperature. Specifi cations over
the –40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LT3430IFE/LT3430IFE-1 are guaranteed over the full –40°C to 125°C
operating junction temperature range.
Note 9: See Peak Switch Current Limit vs Junction Temperature graph in
the Typical Performance Characteristics section.
Note 10: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specifi ed maximum operating junction
temperature may impair device reliability.
Note 11: The maximum operational Boost-SW voltage is limited by
thermal and load current constraints. See ‘Boost Pin’ and ‘Thermal
Calculations’ in the Applications Information section.
34301fa
3
LT3430/LT3430-1
PHASE
(DEG)
TYPICAL PERFORMANCE CHARACTERISTICS
Switch Peak Current Limit FB Pin Voltage and Current
6
TJ = 25°C
5
TYPICAL
4
3
SWITCH PEAK CURRENT (A)
2
GUARANTEED MINIMUM
20 40 60 80
DUTY CYCLE (%)
3430 G01
1.234
1.229
1.224
1.219
1.214
FEEDBACK VOLTAGE (V)
1.209
1.204
1000
–50
VOLTAGE
CURRENT
–25 0
JUNCTION TEMPERATURE (°C)
25 75
50 100 125
3430 G02
2.0
1.5
CURRENT (µA)
1.0
0.5
0
⎯S⎯H⎯D⎯
N Pin Bias Current
250
CURRENT REQUIRED TO FORCE SHUTDOWN
(FLOWS OUT OF PIN). AFTER SHUTDOWN,
200
150
100
CURRENT (µA)
12
CURRENT DROPS TO A FEW µA
AT 2.38V STANDBY THRESHOLD
(CURRENT FLOWS OUT OF PIN)
6
0
–50
–25 0
JUNCTION TEMPERATURE (°C)
25 75
Lockout and Shutdown Threshold Shutdown Supply Current Shutdown Supply Current
2.4
2.0
1.6
1.2
0.8
SHDN PIN VOLTAGE (V)
0.4
0
–50
0
–25 125
JUNCTION TEMPERATURE (°C)
LOCKOUT
START-UP
SHUTDOWN
50 100
25 75
3430 G04
40
V
= 0V
SHDN
= 25°C
T
A
35
30
25
20
15
10
INPUT SUPPLY CURRENT (µA)
5
0
10 20 30 40 50 60
0
INPUT VOLTAGE (V)
3430 G05
300
TA = 25°C
250
200
150
100
INPUT SUPPLY CURRENT (µA)
50
0
0
VIN = 60V
0.1 0.2 0.3 0.4
SHUTDOWN VOLTAGE (V)
50 100 125
3430 G03
= 15V
V
IN
0.5
3430 G06
Error Amplifi er Transconductance Error Amplifi er Transconductance Frequency Foldback
TRANSCONDUCTANCE (µmho)
2500
2000
1500
1000
500
0
–50
0
JUNCTION TEMPERATURE (°C)
50 100
25 75–25 125
3430 G07
3000
2500
2000
1500
V
GAIN (µMho)
1000
500
2 • 10
FB
ERROR AMPLIFIER EQUIVALENT CIRCUIT
R
LOAD
= 25°C
T
A
100 10k 100k 10M
PHASE
GAIN
R
–3
)(
= 50Ω
1k 1M
FREQUENCY (Hz)
OUT
200k
C
12pF
OUT
V
C
3430 G08
200
150
100
50
0
–50
600
500
400
300
200
OR FB CURRENT (µA)
SWITICHING FREQUENCY (kHz)
100
0
0
T
A
= 25°C
4
FB PIN
CURRENT
0.5
3430-1
VFB (V)
3430
SWITCHING
FREQUENCY
1.0
1.5
3430 G09
34301fa
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Input Voltage with
Switching Frequency
230
220
210
200
190
FREQUENCY (kHz)
180
170
–50
0
–25 125
JUNCTION TEMPERATURE (°C)
2.1
1.9
1.7
1.5
1.3
1.1
THRESHOLD VOLTAGE (V)
0.9
0.7
–50
(LT3430)
50 100
25 75
3430 G10
Pin Shutdown Threshold Switch Voltage Drop
V
C
50 100 125
–25 0
25 75
JUNCTION TEMPERATURE (°C)
5V Output BOOST Pin Current
7.5
7.0
6.5
6.0
INPUT VOLTAGE (V)
5.5
5.0
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
3430 G13
MINIMUM INPUT
VOLTAGE TO START
MINIMUM INPUT
VOLTAGE TO RUN
LOAD CURRENT (A)
450
400
350
300
250
200
150
SWITCH VOLTAGE (mV)
100
50
0
0123
TA = 25°C
3430 G11
SWITCH CURRENT (A)
LT3430/LT3430-1
90
TA = 25°C
80
70
60
50
40
30
BOOST PIN CURRENT (mA)
20
10
0
0123
SWITCH CURRENT (A)
TJ = 125°C
TJ = 25°C
TJ = –40°C
3430 G14
3430 G12
Switch Peak Current Limit
6.0
5.5
5.0
4.5
4.0
3.5
SWITCH PEAK CURRENT LIMIT (A)
3.0
2.5
–50
0
–25 125
JUNCTION TEMPERATURE (°C)
25 75
50 100
3430 G16
Switch Minimum ON Time
vs Temperature
600
500
400
300
200
100
SWITCH MINIMUM ON TIME (ns)
0
–50
–25 0
JUNCTION TEMPERATURE (°C)
25 75
50 100 125
3430 G15
34301fa
5
LT3430/LT3430-1
PIN FUNCTIONS
GND (Pins 1, 8, 9, 16, 17): The GND pin connections act
as the reference for the regulated output, so load regulation
will suffer if the “ground” end of the load is not at the same
voltage as the GND pins of the IC. This condition will occur
when load current or other currents fl ow through metal
paths between the GND pins and the load ground. Keep the
paths between the GND pins and the load ground short and
use a ground plane when possible. The FE package has an
exposed pad that is fused to the GND pins. The pad (Pin
17) should be soldered to the copper ground plane under
the device to reduce thermal resistance. (See Applications
Information—Layout Considerations.)
SW (Pins 2, 5): The switch pin is the emitter of the on-chip
power NPN switch. This pin is driven up to the input pin
voltage during switch on time. Inductor current drives the
switch pin voltage negative during switch off time. Negative
voltage is clamped with the external catch diode. Maximum
negative switch voltage allowed is –0.8V.
(Pins 3, 4): This is the collector of the on-chip power
V
IN
NPN switch. V
a voltage on the BIAS pin is not present. High dI/dt edges
occur on this pin during switch turn on and off. Keep the
path short from the V
capacitor, through the catch diode back to SW. All trace
inductance in this path creates voltage spikes at switch
off, adding to the V
BOOST (Pin 6): The BOOST pin is used to provide a drive
voltage, higher than the input voltage, to the internal bipolar
NPN power switch. Without this added voltage, the typical
switch voltage loss would be about 1.5V. The additional
BOOST voltage allows the switch to saturate and voltage
loss approximates that of a 0.1Ω FET structure.
NC (Pins 7, 13): No Connection.
powers the internal control circuitry when
IN
pin through the input bypass
IN
voltage across the internal NPN.
CE
This architecture increases effi ciency especially when the
input voltage is much higher than the output. Minimum
output voltage setting for this mode of operation is 3V.
(Pin 11): The VC pin is the output of the error amplifi er
V
C
and the input of the peak switch current comparator. It is
normally used for frequency compensation, but can also
serve as a current clamp or control loop override. V
at about 0.9V for light loads and 2.1V at maximum load.
It can be driven to ground to shut off the regulator, but if
driven high, current must be limited to 4mA.
FB (Pin 12): The feedback pin is used to set the output
voltage using an external voltage divider that generates
1.22V at the pin for the desired output voltage. Three
additional functions are performed by the FB pin. When
the pin voltage drops below 0.6V, switch current limit is
reduced and the external SYNC function is disabled. Below
0.8V, switching frequency is also reduced. See Feedback
Pin Functions in Applications Information for details.
SYNC (Pin 14): The SYNC pin is used to synchronize the
internal oscillator to an external signal. It is directly logic
compatible and can be driven with any signal between 10%
and 90% duty cycle. The synchronizing range is 125kHz
to 250kHz for the LT3430-1 and 228kHz to 700kHz for the
LT3430. See Synchronizing in Applications Information
for details.
⎯S⎯H⎯D⎯
N (Pin 15): The ⎯S⎯H⎯D⎯N pin is used to turn off the
regulator and to reduce input drain current to a few microamperes. This pin has two thresholds: one at 2.38V to
disable switching and a second at 0.4V to force complete
micropower shutdown. The 2.38V threshold functions
as an accurate undervoltage lockout (UVLO); sometimes
used to prevent the regulator from delivering power until
the input voltage has reached a predetermined level.
sits
C
BIAS (Pin 10): The BIAS pin is used to improve effi ciency
when operating at higher input voltages and light load current. Connecting this pin to the regulated output voltage
forces most of the internal circuitry to draw its operating
current from the output voltage rather than the input supply.
6
⎯S⎯H⎯D⎯
If the
either be left open (to allow an internal bias current to lift
the pin to a default high state) or be forced high to a level
not to exceed 6V.
N pin functions are not required, the pin can
34301fa
BLOCK DIAGRAM
LT3430/LT3430-1
The LT3430/LT3430-1 are constant frequency, current
mode buck converters. This means that there is an internal clock and two feedback loops that control the duty
cycle of the power switch. In addition to the normal error
amplifi er, there is a current sense amplifi er that monitors
switch current on a cycle-by-cycle basis. A switch cycle
starts with an oscillator pulse which sets the R
fl ip-fl op
S
to turn the switch on. When switch current reaches a level
set by the inverting input of the comparator, the fl ip-fl op
is reset and the switch turns off. Output voltage control is
obtained by using the output of the error amplifi er to set
the switch current trip point. This technique means that the
error amplifi er commands current to be delivered to the
output rather than voltage. A voltage fed system will have
low phase shift up to the resonant frequency of the inductor
and output capacitor, then an abrupt 180° shift will occur.
The current fed system will have 90° phase shift at a much
lower frequency, but will not have the additional 90° shift
until well beyond the LC resonant frequency. This makes
V
IN
3, 4
BIAS
SYNC
10
14
SHUTDOWN
COMPARATOR
2.9V BIAS
REGULATOR
+
0.4V
–
INTERNAL
V
CC
SLOPE COMP
ANTISLOPE COMP
200kHz: LT3430
100kHz: LT3430-1
OSCILLATOR
Σ
it much easier to frequency compensate the feedback loop
and also gives much quicker transient response.
Most of the circuitry of the LT3430/LT3430-1 operates
from an internal 2.9V bias line. The bias regulator normally
draws power from the regulator input pin, but if the BIAS
pin is connected to an external voltage equal to or higher
than 3V, bias power will be drawn from the external source
(typically the regulated output voltage). This will improve
effi ciency if the BIAS pin voltage is lower than regulator
input voltage.
High switch effi ciency is attained by using the BOOST pin
to provide a voltage to the switch driver which is higher
than the input voltage, allowing switch to be saturated.
This boosted voltage is generated with an external capacitor and diode. Two comparators are connected to the
shutdown pin. One has a 2.38V threshold for undervoltage
lockout and the second has a 0.4V threshold for complete
shutdown.
R
LIMIT
–
+
CURRENT
COMPARATOR
BOOST
6
S
R
R
S
FLIP-FLOP
DRIVER
CIRCUITRY
R
SENSE
Q1
POWER
SWITCH
SHDN
5.5µA
2.38V
+
–
LOCKOUT
COMPARATOR
V
C(MAX)
CLAMP
FREQUENCY
FOLDBACK
×1
Q2
FOLDBACK
Q3
CURRENT
LIMIT
CLAMP
11
V
C
AMPLIFIER
= 2000µMho
g
m
ERROR
–
+
15
1.22V
2, 5
12
3430 F01
SW
FB
GND
1, 8, 9, 16, 17
Figure 1. LT3430/LT3430-1 Block Diagram
34301fa
7
LT3430/LT3430-1
APPLICATIONS INFORMATION
FEEDBACK PIN FUNCTIONS
The feedback (FB) pin on the LT3430/LT3430-1 is used to
set output voltage and provide several overload protection
features. The fi rst part of this section deals with selecting
resistors to set output voltage and the second part talks
about foldback frequency and current limiting created by
the FB pin. Please read both parts before committing to
a fi nal design.
The suggested value for the LT3430 output divider resistor
(see Figure 2) from FB to ground (R2) is 5k or less, and a
formula for R1 is shown below. For the LT3430-1, choose
the resistors so that the Thevinin resistance of the divider
at the feedback pin is 7.5kΩ. The output voltage error
caused by ignoring the input bias current on the FB pin
is less than 0.25% with R2 = 5k. A table of standard 1%
values is shown in Table 1 for common output voltages.
Please read the following if divider resistors are increased
above the suggested values.
.
122
R2
.
−
(NEAREST 1%)
R1
(kΩ)
% ERROR AT OUTPUT
DUE TO DISCREET 1%
RESISTOR STEPS
RV
2122
()
R
1
=
OUT
Table 1. *LT3430, **LT3430-1
OUTPUT
VOLTAGE
(V)
3* 4.99 7.32 +0.32
3.3* 4.99 8.45 –0.43
5* 4.99 15.4 –0.30
12* 4.12 46.4 –0.27
3** 12.7 18.7 +0.54
3.3** 12.1 20.5 –0.40
5** 10 30.9 –0.20
12** 8.25 73.2 +0.37
(kΩ)
More Than Just Voltage Feedback
The feedback pin is used for more than just output voltage
sensing. It also reduces switching frequency and current
limit when output voltage is very low (see the Frequency
Foldback graph in Typical Performance Characteristics).
This is done to control power dissipation in both the IC
and in the external diode and inductor during short-circuit conditions. A shorted output requires the switching
regulator to operate at very low duty cycles, and the
average current through the diode and inductor is equal
to the short-circuit current limit of the switch (typically
4A for the LT3430/LT3430-1, folding back to less than
2A). Minimum switch on time limitations would prevent
the switcher from attaining a suffi ciently low duty cycle if
switching frequency were maintained at 200kHz (100kHz
LT3430-1), so frequency is reduced by about 5:1 (3:1
LT3430-1) when the feedback pin voltage drops below
0.8V (see Frequency Foldback graph). This does not affect
operation with normal load conditions; one simply sees
a gear shift in switching frequency during start-up as the
output voltage rises.
In addition to lower switching frequency, the LT3430/
LT3430-1 also operate at lower switch current limit when
the feedback pin voltage drops below 0.6V. Q2 in Figure 2
performs this function by clamping the V
pin to a voltage
C
less than its normal 2.1V upper clamp level. This foldback
current limit greatly reduces power dissipation in the IC,
diode and inductor during short-circuit conditions. External
synchronization is also disabled to prevent interference
with foldback operation. Again, it is nearly transparent to
the user under normal load conditions. The only loads that
may be affected are current source loads which maintain
full load current with output voltage less than 50% of
fi nal value. In these rare situations the feedback pin can
be clamped above 0.6V with an external diode to defeat
foldback current limit. Caution: clamping the feedback
pin means that frequency shifting will also be defeated,
so a combination of high input voltage and dead shorted
output may cause the LT3430/LT3430-1 to lose control
of current limit.
The internal circuitry which forces reduced switching
frequency also causes current to fl ow out of the feedback
pin when output voltage is low. The equivalent circuitry
is shown in Figure 2. Q1 is completely off during normal
operation. If the FB pin falls below 0.8V, Q1 begins to
conduct current and LT3430 reduces frequency at the rate
of approximately 1.4kHz/µA. To ensure adequate frequency
foldback (under worst-case short-circuit conditions), the
external divider Thevinin resistance (R
) must be low
THEV
enough to pull 115µA out of the FB pin with 0.44V on
the pin (R
≤ 3.8k)(LT3430-1 R
THEV
≈ 7.5k). The net
THEV
result is that reductions in frequency and current limit
are affected by output voltage divider impedance. Cau-
34301fa
8
APPLICATIONS INFORMATION
LT3430/LT3430-1
LT3430
TO FREQUENCY
ERROR
AMPLIFIER
SHIFTING
1.4V
++
1.2V
R3
1k
Q1
R4
2k
––
BUFFER
Q2
TO SYNC CIRCUIT
V
GND
C
Figure 2. Frequency and Current Limit Foldback
tion should be used if resistors are increased beyond the
suggested values and short-circuit conditions occur with
high input voltage. High frequency pickup will increase
and the protection accorded by frequency and current
foldback will decrease.
Choosing the Inductor
For most applications, the output inductor will fall into
the range of 5µH to 47µH (10µH to 100µH for LT3430-1).
Lower values are chosen to reduce physical size of the
inductor. Higher values allow more output current because
they reduce peak current seen by the LT3430/LT3430-1
switch, which has a 3A limit. Higher values also reduce
output ripple voltage.
When choosing an inductor you will need to consider
output ripple voltage, maximum load current, peak inductor current and fault current in the inductor. In addition,
other factors such as core and copper losses, allowable
component height, EMI, saturation and cost should also
be considered. The following procedure is suggested
as a way of handling these somewhat complicated and
confl icting requirements.
V
SW
20mV/DIV
20mV/DIV
VIN = 40V
= 5V
V
OUT
L = 22µH
L1
R1
FB
R2
+
2µs/DIV
C1
3430 F02
OUTPUT
5V
3430 F03
V
USING
OUT
100µF CERAMIC
OUTPUT
CAPACITOR
USING
V
OUT
100µF 0.08Ω
TANTALUM
OUTPUT
CAPACITOR
Figure 3. LT3430 Output Ripple Voltage Waveforms.
Ceramic vs Tantalum Output Capacitors
ceramic output capacitor; the signifi cant decrease in output ripple voltage is due to the very low ESR of ceramic
capacitors.
Output ripple voltage is determined by ripple current (I
LP-P
)
through the inductor and the high frequency impedance of
the output capacitor. At high frequencies, the impedance
of the tantalum capacitor is dominated by its effective
series resistance (ESR).
Output Ripple Voltage
Figure 3 shows a comparison of output ripple voltage for
the LT3430/LT3430-1 using either a tantalum or ceramic
output capacitor. It can be seen from Figure 3 that output
ripple voltage can be signifi cantly reduced by using the
Tantalum Output Capacitor
The typical method for reducing output ripple voltage
when using a tantalum output capacitor is to increase the
inductor value (to reduce the ripple current in the inductor).
The following equations will help in choosing the required
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