LINEAR TECHNOLOGY LT1976, LT1976B Technical data
FEATURES
LT1976/LT1976B
High Voltage 1.5A, 200kHz
Step-Down Switching Regulator
with 100μA Quiescent Current
U
DESCRIPTIO
■
Wide Input Range: 3.3V to 60V
■
1.5A Peak Switch Current (LT1976)
■
100μA Quiescent Current (LT1976)**
■
1.6mA Quiescent Current (LT1976B)
■
Low Shutdown Current: IQ < 1μA
■
Power Good Flag with Programmable Threshold
■
Load Dump Protection to 60V
■
200kHz Switching Frequency
■
Saturating Switch Design: 0.2Ω On-Resistance
■
Peak Switch Current Maintained Over
Full Duty Cycle Range*
■
1.25V Feedback Reference Voltage
■
Easily Synchronizable
■
Soft-Start Capability
■
Small 16-Pin Thermally Enhanced TSSOP Package
U
APPLICATIO S
■
High Voltage Power Conversion
■
14V and 42V Automotive Systems
■
Industrial Power Systems
■
Distributed Power Systems
■
Battery-Powered Systems
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
*Protected by U.S. Patents, including 6498466
**See Burst Mode Operation section for conditions
The LT®1976/LT1976B are 200kHz monolithic step-down
switching regulators that accept input voltages up to 60V.
A high efficiency 1.5A, 0.2Ω switch is included on the die
along with all the necessary oscillator, control and logic
circuitry. Current mode topology is used for fast transient
response and good loop stability.
Innovative design techniques along with a new high voltage process achieve high efficiency over a wide input
range. Efficiency is maintained over a wide output current
range by employing Burst Mode operation at low currents,
utilizing the output to bias the internal circuitry, and by
using a supply boost capacitor to fully saturate the power
switch. The LT1976B does not shift into Burst Mode
operation at low currents, eliminating low frequency output ripple at the expense of efficiency. Patented circuitry
maintains peak switch current over the full duty cycle
range.* Shutdown reduces input supply current to less
than 1μA. External synchronization can be implemented
by driving the SYNC pin with logic-level inputs. A single
capacitor from the C
pin to the output provides a
SS
controlled output voltage ramp (soft-start). The devices
also have a power good flag with a programmable threshold and time-out and thermal shutdown protection.
The LT1976/LT1976B are available in a 16-pin TSSOP
package with Exposed Pad leadframe for low thermal
resistance.
TYPICAL APPLICATIO
14V to 3.3V Step-Down Converter with
100μA No Load Quiescent Current
V
3.3V TO 60V
1500pF
10k
IN
1μF
4.7μF
100V
CER
330pF
V
IN
SHDN
V
C
C
T
SYNC
GND
LT1976
BOOST
C
V
BIAS
PGFB
0.33μF
SW
0.1μF
SS
47pF
FB
PG
33μH
10MQ60N
U
4148
165k
1%
100k
1%
V
3.3V
1A
100μF
6.3V
TANT
1976 TA01
OUT
LT1976 Supply Current vs
Input Voltage
150
125
100
75
50
SUPPLY CURRENT (μA)
25
0
0
10
30 40
20
INPUT VOLTAGE (V)
LT1976 Efficiency and Power
Loss vs Load Current
V
= 3.3V
OUT
= 25°C
T
A
50
60
1976 F05
100
75
5V
50
EFFICIENCY (%)
25
0
0.1
EFFICIENCY
3.3V
1
10
LOAD CURRENT (mA)
TYPICAL
POWER LOSS
100
1000
1976 TA02
10000
1976bfg
10
1
POWER LOSS (W)
0.1
0.01
0.001
1
LT1976/LT1976B
FE PACKAGE
16-LEAD PLASTIC TSSOP
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
NC
SW
NC
V
IN
NC
BOOST
C
T
GND
PG
SHDN
SYNC
PGFB
FB
V
C
BIAS
C
SS
17
WW
W
U
ABSOLUTE AXI U RATI GS
(Note 1)
VIN, SHDN, PG, BIAS .............................................. 60V
BOOST Pin Above SW ............................................ 35V
BOOST Pin Voltage ................................................. 68V
SYNC, CSS, PGFB, FB................................................ 6V
Operating JunctionTemperature Range
LT1976EFE/LT1976BEFE (Note 2) ... – 40°C to 125°C
LT1976IFE/LT1976BIFE (Note 2) ..... –40°C to 125°C
LT1976HFE (Note 2) ........................ –40°C to 140°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
UUW
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
LT1976EFE
LT1976IFE
LT1976HFE
LT1976BEFE
LT1976BIFE
FE PART MARKING
1976EFE
1976IFE
θJA = 45°C/W, θ
EXPOSED PAD IS GND (PIN 17)
MUST BE SOLDERED TO GND (PIN 8)
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
JC(PAD)
= 10°C/W
1976HFE
1976BEFE
1976BIFE
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full –40°C to 125°C
operating temperature range, otherwise specifications are at TJ = 25°C. VIN = 12V, SHDN = 12V, BOOST = 15.3V, BIAS = 5V,
FB/PGFB = 1.25V, CSS/SYNC = 0V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
SHDN
I
SHDN
I
VINS
I
VIN
I
BIASS
I
BIAS
V
REF
I
FB
2
SHDN Threshold ● 1.2 1.3 1.4 V
SHDN Input Current SHDN = 12V ● 520 μA
Minimum Input Voltage (Note 3) ● 2.4 3 V
Supply Shutdown Current SHDN = 0V, BOOST = 0V, FB/PGFB = 0V 0.1 2 μA
Supply Sleep Current (Note 4) (LT1976) BIAS = 0V, FB = 1.35V ● 170 230 μA
Supply Quiescent Current BIAS = 0V, FB = 1.15V, VC = 0.8V (VC = 0V LT1976B) 3.2 4.10 mA
Minimum BIAS Voltage (Note 5) ● 2.7 3 V
BIAS Sleep Current (Note 4) (LT1976) ● 110 180 μA
BIAS Quiescent Current SYNC = 3.3V 700 800 μA
Minimum Boost Voltage (Note 6) ISW = 1.5A 1.8 2.5 V
Input Boost Current (Note 7) ISW = 1.5A 40 50 mA
Reference Voltage (V
FB Input Bias Current 75 200 nA
EA Voltage Gain (Note 8) 900 V/V
EA Voltage g
EA Source Current FB = 1.15V 20 40 55 μA
EA Sink Current FB = 1.35V 15 30 40 μA
VC to SW g
VC High Clamp 2.1 2.2 2.4 V
VC Switching Threshold (LT1976B) ● 0.1 0.4 0.8 V
m
m
) 3.3V < V
REF
FB = 1.35V
BIAS = 5V, FB = 1.15V, VC = 0.8V (VC = 0V LT1976B) 2.6 3.25 mA
< 60V ● 1.225 1.25 1.275 V
VIN
dI(VC)= ±10μA 400 650 800 μMho
● 45 75 μA
3A/V
1976bfg
LT1976/LT1976B
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full –40°C to 125°C
operating temperature range, otherwise specifications are at TJ = 25°C. VIN = 12V, SHDN = 12V, BOOST = 15.3V, BIAS = 5V,
FB/PGFB = 1.25V, C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
PK
I
CSS
I
PGFB
V
I
CT
V
PGFB
CT
SW Current Limit LT1976 ● 1.5 2.4 3.5 A
Switch On Resistance (Note 9) ● 0.2 0.4 Ω
Switching Frequency BOOST = OPEN ● 180 200 230 kHz
Maximum Duty Cycle 90 92 %
Minimum SYNC Amplitude 1.5 2.0 V
SYNC Frequency Range 230 600 kHz
SYNC Input Impedance SYNC = 0.5V 100 kΩ
CSS Current Threshold (Note 10) FB = 0V 7 13 20 μA
PGFB Input Current 25 100 nA
PGFB Voltage Threshold (Note 11) ● 88 90 92 %
CT Source Current (Note 11) ● 2 3.6 5.5 μA
CT Sink Current (Note 11) 1 2 mA
CT Voltage Threshold (Note 11) 1.16 1.2 1.26 V
PG Leakage (Note 11) PG = 12V 0.1 1 μA
PG Sink Current (Note 11) PGFB = 1V, PG = 400mV 120 200 μA
/SYNC = 0V unless otherwise noted.
SS
LT1976B 1.2 2.5 4 A
The ● denotes the specifications which apply over the full –40°C to 140°C operating temperature range, otherwise specifications are
at TJ = 25°C. VIN = 12V, SHDN = 12V, BOOST = 15.3V, BIAS = 5V, FB/PGFB = 1.25V, CSS/SYNC = 0V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
SHDN
I
SHDN
I
VINS
I
VIN
I
BIASS
I
BIAS
V
REF
I
FB
SHDN Threshold ● 1.2 1.3 1.4 V
SHDN Input Current SHDN = 12V ● 520 μA
Minimum Input Voltage (Note 3) ● 2.4 3 V
Supply Shutdown Current SHDN = 0V, BOOST = 0V, FB/PGFB = 0V 0.1 2 μA
Supply Sleep Current (Note 4) (LT1976) BIAS = 0V, FB = 1.35V ● 170 300 μA
FB = 1.35V
Supply Quiescent Current BIAS = 0V, FB = 1.15V, VC = 0.8V 3.2 4.10 mA
BIAS = 5V, FB = 1.15V, V
Minimum BIAS Voltage (Note 5) ● 2.7 3 V
BIAS Sleep Current (Note 4) ● 110 180 μA
BIAS Quiescent Current SYNC = 3.3V 700 800 μA
Minimum Boost Voltage (Note 6) ISW = 1.5A 1.8 2.5 V
Input Boost Current (Note 7) ISW = 1.5A 40 50 mA
Reference Voltage (V
FB Input Bias Current 75 200 nA
EA Voltage Gain (Note 8) 900 V/V
EA Voltage g
EA Source Current FB = 1.15V 20 40 55 μA
EA Sink Current FB = 1.35V 15 30 40 μA
VC to SW g
VC High Clamp 2.1 2.2 2.4 V
m
m
) 3.3V < V
REF
dI(VC)= ±10μA 400 650 800 μMho
< 60V ● 1.212 1.25 1.288 V
VIN
= 0.8V 2.6 3.25 mA
C
● 45 100 μA
3A/V
1976bfg
3
LT1976/LT1976B
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full –40°C to 140°C
operating temperature range, otherwise specifications are at TJ = 25°C. VIN = 12V, SHDN = 12V, BOOST = 15.3V, BIAS = 5V,
FB/PGFB = 1.25V, C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
PK
I
CSS
I
PGFB
V
PGFB
I
CT
V
CT
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT1976EFE/LT1976BEFE are guaranteed to meet performance
specifications from 0°C to 125°C junction temperature. Specifications over
the –40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LT1976IFE/LT1976BIFE/LT1976HFE are guaranteed and tested over
the full –40°C to 125°C operating junction temperature range. The
LT1976HFE is also tested to the LT1976HFE electrical characteristics table
at 140°C operating junction temperature. High junction temperatures
degrade operating lifetimes.
Note 3: Minimum input voltage is defined as the voltage where switching
starts. Actual minimum input voltage to maintain a regulated output will
depend upon output voltage and load current. See Applications
Information.
Note 4: Supply input current is the quiescent current drawn by the input
pin. Its typical value depends on the voltage on the BIAS pin and operating
state of the LT1976. With the BIAS pin at 0V, all of the quiescent current
required to operate the LT1976 will be provided by the V
BIAS voltage above its minimum input voltage, a portion of the total
quiescent current will be supplied by the BIAS pin. Supply sleep current
for the LT1976 is defined as the quiescent current during the “sleep”
portion of Burst Mode operation. See Applications Information for
determining application supply currents.
SW Current Limit 2.4 A
Switch On Resistance (Note 9) ● 0.2 0.6 Ω
Switching Frequency BOOST = OPEN ● 150 200 260 kHz
Maximum Duty Cycle 90 92 %
Minimum SYNC Amplitude 1.5 2.0 V
SYNC Frequency Range 230 600 kHz
SYNC Input Impedance SYNC = 0.5V 85 kΩ
CSS Current Threshold (Note 10) 7 13 20 μA
PGFB Input Current 25 100 nA
PGFB Voltage Threshold (Note 11) ● 87 90 93 %
CT Source Current (Note 11) ● 1.5 3.6 5.5 μA
CT Sink Current (Note 11) 1 2 mA
CT Voltage Threshold (Note 11) 1.16 1.2 1.26 V
PG Leakage (Note 11) PG = 12V 0.1 1 μA
PG Sink Current (Note 11) PGFB = 1V, PG = 400mV 120 200 μA
/SYNC = 0V unless otherwise noted.
SS
pin. With the
IN
Note 5: Minimum BIAS voltage is the voltage on the BIAS pin when I
sourced into the pin.
Note 6: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 7: Boost current is the current flowing into the BOOST pin with the
pin held 3.3V above input voltage. It flows only during switch on time.
Note 8: Gain is measured with a V
Note 9: Switch on resistance is calculated by dividing VIN to SW voltage by
the forced current (1.5A LT1976, 1.2A LT1976B). See Typical Performance
Characteristics for the graph of switch voltage at other currents.
Note 10: The C
the C
pin which results in an increase in sink current from the VC pin.
SS
See the Soft-Start section in Applications Information.
Note 11: The PGFB threshold is defined as the percentage of V
which causes the current source output of the C
sinking (below threshold) to sourcing current (above threshold). When
sourcing current, the voltage on the CT pin rises until it is clamped
internally. When the clamp is activated, the output of the PG pin will be set
to a high impedance state. When the C
be set active low with a current sink capability of 200μA.
threshold is defined as the value of current sourced into
SS
swing from 1.15V to 750mV.
C
pin to change from
T
clamp is inactive the PG pin will
T
REF
BIAS
voltage
is
4
1976bfg
UW
1.20
VOLTAGE (V)
1.21
1.23
1.24
1.25
1.30
1.27
1.22
1.28
1.29
1.26
TEMPERATURE (°C)
–50 0
50
75
1976 G01
–25
25
100
150125
TYPICAL PERFOR A CE CHARACTERISTICS
LT1976/LT1976B
LT1976 Efficiency and Power Loss
vs Load Current
100
EFFICIENCY
75
5V
3.3V
50
10
TYPICAL
POWER LOSS
100
EFFICIENCY (%)
25
0
0.1
1
LOAD CURRENT (mA)
1000
10000
1976 TA02
10
1
0.1
0.01
0.001
LT1976B Efficiency and Power
Loss vs Load Current
100
75
POWER LOSS (W)
50
EFFICIENCY (%)
25
0
0.1
1
Oscillator Frequency SHDN Threshold
250
240
230
220
210
200
190
FREQUENCY (kHz)
180
170
160
150
–50
–25
50
25
0
TEMPERATURE (°C)
75
100
150125
1976 G02
1.40
1.35
1.30
1.25
1.20
VOLTAGE (V)
0.15
1.10
1.05
1.00
–50 0 50 75–25 25 100 150125
LT1976 Sleep Mode Supply
Shutdown Supply Current
25
20
15
10
CURRENT (μA)
5
0
–50 0
VIN = 42V VIN = 12V
–25
TEMPERATURE (°C)
25
50
VIN = 60V
75
100
150125
1976 G05
Current
240
220
200
180
160
140
120
100
CURRENT (μA)
80
60
40
20
0
–50 0
–25
EFFICIENCY
5V
3.3V
TYPICAL
POWER LOSS
100
10
LOAD CURRENT (mA)
TEMPERATURE (°C)
V
= 0V
BIAS
V
= 5V
BIAS
50
25
TEMPERATURE (°C)
75
100
1000
10000
1976 G25
1976 G03
1976 G06
10
1
0.1
0.01
0.001
150125
FB Voltage
POWER LOSS (W)
SHDN Pin Current
5.5
TJ = 25°C
5.0
4.5
4.0
3.5
3.0
2.5
CURRENT (μA)
2.0
1.5
1.0
0
0
LT1976 Bias Sleep Current
200
180
160
140
120
100
80
CURRENT (μA)
60
40
20
0
–50 0
10
–25
30 40
20
SHDN VOLTAGE (V)
50
25
TEMPERATURE (°C)
75
100
50
1976 G04
1976 G07
1976bfg
5
60
150125
LT1976/LT1976B
LOAD CURRENT (A)
0
VOLTAGE (mV)
50
150
200
250
500
350
0.7
0.9
1976 G13
100
400
450
300
0.5
1.1
1.3
1.5
TJ = 125°C
TJ = 25°C
TJ = –50°C
UW
TYPICAL PERFOR A CE CHARACTERISTICS
PGFB Threshold
1.20
1.18
1.16
1.14
1.12
1.10
1.08
VOLTAGE (V)
1.06
1.04
1.02
1.00
–50 0
–25
50
25
TEMPERATURE (°C)
Soft-Start Current Threshold
vs FB Voltage
50
TJ = 25°C
45
40
35
30
25
20
CURRENT (μA)
15
10
5
0
0
0.2
0.6 0.8
0.4
FB VOLTAGE (V)
75
100
SOFT-START
DEFEATED
1.0
1976 G08
1976 G11
PG Sink Current
250
200
150
100
CURRENT (μA)
50
150125
0
–50 0
–25
50
25
TEMPERATURE (°C)
75
100
150125
1976 G08
Switch Peak Current Limit
3.5
3.0
2.5
2.0
PEAK SWITCH CURRENT (A)
1.5
–50
–25 –0 25 50
TEMPERATURE (°C)
75 100 150125
1976 G10
Oscillator Frequency
1.2
vs FB Voltage
250
TJ = 25°C
200
150
100
FREQUENCY (kHz)
50
0
0.2
0
0.6 0.8
0.4
FB VOLTAGE (V)
1.0
1.2
1976 G12
Switch On Voltage (V
CESAT
)
LT1976 Supply Current
vs Input Voltage
150
125
100
75
50
SUPPLY CURRENT (μA)
25
0
0
10
6
30 40
20
INPUT VOLTAGE (V)
LT1976 Burst Mode Threshold
Minimum Input Voltage
V
= 3.3V
OUT
= 25°C
T
A
50
60
1976 F05
7.5
7.0
6.5
5V START
6.0
5.5
5.0
3.3V START
4.5
INPUT VOLTAGE (V)
4.0
3.5
3.0
200
0
400
5V RUNNING
3.3V RUNNING
800
600
LOAD CURRENT (mA)
1000
1200
1400
1976 G19
1600
vs Input Voltage
200
V
= 3.3V
OUT
180
L = 33μH
= 100μF
C
OUT
160
140
120
100
80
60
LOAD CURRENT (mA)
40
20
0
97
5
17 19 23
1311
15
INPUT VOLTAGE (V)
21
25
1975 G20
1976bfg
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LT1976B VC Switching Threshold
vs Temperature
700
600
500
400
300
VOLTAGE (V)
C
V
200
100
0
–50
–10 3010–30 50
TEMPERATURE (˚C)
70 90 110
1976 G26
Minimum On Time Boost Current vs Load Current
500
450
400
350
300
LOAD CURRENT = 0.5A
250
200
ON TIME (ns)
150
100
50
0
–50
–30 10
LOAD CURRENT = 1A
–10
30
TEMPERATURE (°C)
50
90
70
110
1976 G21
LT1976/LT1976B
50
45
40
35
30
25
20
15
BOOST CURRENT (mA)
10
5
0
200 600
0
400
LOAD CURRENT (mA)
800
1000
1200
1400
1976 G22
Dropout Operation
4.0
V
= 3.3V
OUT
BOOST DIODE = DIODES INC. B1100
3.5
3.0
2.5
2.0
1.5
OUTPUT VOLTAGE (V)
1.0
0.5
0
2
LOAD CURRENT = 1.25A
LOAD CURRENT = 250mA
2.5 3 4
INPUT VOLTAGE (V)
LT1976 Burst Mode Operation
V
OUT
50mV/
DIV
I
SW
100mA/
DIV
0A
= 12V TIME (10μs/DIV) 1976 G15
V
IN
V
= 3.3V
OUT
= 100μA
I
Q
3.5
1976 G23
4.5
Dropout Operation
6
V
BOOST DIODE = DIODES INC. B1100
5
4
3
2
OUTPUT VOLTAGE (V)
1
0
2
LT1976B No Load Operation
(Pulse-Skipping Mode)
V
OUT
50mV/DIV
AC
COUPLED
I
SW
100mA/DIV
0A
V
IN
V
OUT
I
Q
= 5V
OUT
LOAD CURRENT = 250mA
LOAD CURRENT = 1.25A
5
34
2.5 3.5
INPUT VOLTAGE (V)
= 12V TIME (10μs/DIV) 1976 G27
= 3.3V
= 1.6mA
4.5
5.5
1976 G24
100mA/DIV
6
100mV/DIV
500mA/DIV
LT1976 Burst Mode Operation
V
OUT
50mV/DIV
I
SW
0A
= 12V TIME (5ms/DIV) 1976 G14
V
IN
V
= 3.3V
OUT
= 100μA
I
Q
LT1976 No Load 1A
Step Response
V
OUT
1A
I
OUT
0A
= 12V TIME (1ms/DIV) 1976 G17
V
IN
V
= 3.3V
OUT
= 47μF
C
OUT
1976bfg
7
LT1976/LT1976B
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LT1976 Step Response
V
OUT
100mV/DIV
1A
I
OUT
500mA/DIV
0A
= 12V TIME (1ms/DIV) 1976 G18
V
IN
V
= 3.3V
OUT
C
= 47μF
OUT
= 250mA
I
DC
U
UU
PI FU CTIO S
NC (Pins 1, 3, 5): No Connection. Pins 1, 3, 5 are
electrically isolated from the LT1976. They may be connected to PCB traces to aid in PCB layout.
SW (Pin 2): The SW pin is the emitter of the on-chip power
NPN switch. This pin is driven up to the input pin voltage
during switch on time. Inductor current drives the SW pin
negative during switch off time. Negative voltage is clamped
with the external Schottky catch diode to prevent excessive negative voltages.
VIN (Pin 4): This is the collector of the on-chip power NPN
switch. VIN powers the internal control circuitry when a
voltage on the BIAS pin is not present. High di/dt edges
occur on this pin during switch turn on and off. Keep the
path short from the VIN pin through the input bypass
capacitor, through the catch diode back to SW. All trace
inductance on this path will create a voltage spike at switch
off, adding to the VCE voltage across the internal NPN.
BOOST (Pin 6): The BOOST pin is used to provide a drive
voltage, higher than the input voltage, to the internal
bipolar NPN power switch. Without this added voltage, the
typical switch voltage loss would be about 1.5V. The
additional BOOST voltage allows the switch to saturate
and its voltage loss approximates that of a 0.2Ω FET
structure, but with much smaller die area.
CT (Pin 7): A capacitor on the CT pin determines the amount
of delay time between the PGFB pin exceeding its threshold (V
When the PGFB pin rises above V
) and the PG pin set to a high impedance state.
PGFB
, current is sourced
PGFB
from the CT pin into the external capacitor. When the voltage on the external capacitor reaches an internal clamp
(VCT), the PG pin becomes a high impedance node. The
resultant PG delay time is given by t = C
voltage on the PGFB pin drops below V
• VCT/ICT. If the
CT
, CCT will be
PGFB
discharged rapidly to 0V and PG will be active low with a
200μA sink capability. If the CT pin is clamped (Power Good
condition) during normal operation and SHDN is taken low,
the CT pin will be discharged and a delay period will occur
when SHDN is returned high. See the Power Good section
in Applications Information for details.
GND (Pins 8, 17): The GND pin connection acts as the
reference for the regulated output, so load regulation will
suffer if the “ground” end of the load is not at the same
voltage as the GND pin of the IC. This condition will occur
when load current or other currents flow through metal
paths between the GND pin and the load ground. Keep the
path between the GND pin and the load ground short and
use a ground plane when possible. The GND pin also acts
as a heat sink and should be soldered (along with the
exposed leadframe) to the copper ground plane to reduce
thermal resistance (see Applications Information).
8
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LT1976/LT1976B
U
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PI FU CTIO S
CSS (Pin 9): A capacitor from the CSS pin to the regulated
output voltage determines the output voltage ramp rate
during start-up. When the current through the CSS capacitor exceeds the CSS threshold (I
the output is limited. The C
the FB voltage (see Typical Performance Characteristics)
and is defeated for FB voltage greater than 0.9V (typical).
See Soft-Start section in Applications Information for
details.
BIAS (Pin 10): The BIAS pin is used to improve efficiency
when operating at higher input voltages and light load
current. Connecting this pin to the regulated output voltage forces most of the internal circuitry to draw its
operating current from the output voltage rather than the
input supply. This architecture increases efficiency especially when the input voltage is much higher than the
output. Minimum output voltage setting for this mode of
operation is 3V.
V
(Pin 11): The VC pin is the output of the error amplifier
C
and the input of the peak switch current comparator. It is
normally used for frequency compensation, but can also
serve as a current clamp or control loop override. The V
pin sits about 0.45V for light loads and 2.2V at current
limit. The LT1976 clamps the VC pin slightly below the
burst threshold during sleep periods for better transient
response. Driving the VC pin to ground will disable switching and also place the LT1976 into sleep mode.
FB (Pin 12): The feedback pin is used to determine the
output voltage using an external voltage divider from the
output that generates 1.25V at the FB pin . When the FB pin
drops below 0.9V, switching frequency is reduced, the
SYNC function is disabled and output ramp rate control is
enabled via the CSS pin. See the Feedback section in
Applications Information for details.
SS
), the voltage ramp of
CSS
threshold is proportional to
C
PGFB (PIN 13): The PGFB pin is the positive input to a
comparator whose negative input is set at V
PGFB is taken above V
the C
pin starting the PG delay period. When the voltage
T
on the PGFB pin drops below V
discharged resetting the PG delay period. The PGFB voltage is typically generated by a resistive divider from the
regulated output or input supply. See Power Good section
in Applications Information for details.
SYNC (Pin 14): The SYNC pin is used to synchronize the
internal oscillator to an external signal. It is directly logic
compatible and can be driven with any signal between
20% and 80% duty cycle. The synchronizing range is
equal to maximum initial operating frequency up to 700kHz.
When the voltage on the FB pin is below 0.9V the SYNC
function is disabled. See the Synchronizing section in
Applications Information for details.
SHDN (Pin 15): The SHDN pin is used to turn off the
regulator and to reduce input current to less than 1μA. The
SHDN pin requires a voltage above 1.3V with a typical
source current of 5μA to take the IC out of the shutdown
state.
PG (Pin 16): The PG pin is functional only when the SHDN
pin is above its threshold, and is active low when the
internal clamp on the C
high impedance when the clamp is active. The PG pin has
a typical sink capability of 200μA. See the Power Good
section in Applications Information for details.
, current (I
PGFB
PGFB
pin is below its clamp level and
T
) is sourced into
CSS
, the CT pin is rapidly
PGFB
. When
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