LINEAR TECHNOLOGY LT1640L, LT1640H Technical data

FEATURES

■

Allows Safe Board Insertion and Removal
from a Live – 48V Backplane

■

Operates from –10V to –80V

■

Programmable Inrush Current

■

Programmable Electronic Circuit Breaker

■

Programmable Overvoltage Protection

■

Programmable Undervoltage Lockout

■

Power Good Control Output

U

APPLICATIO S

■

Central Office Switching

■

–48V Distributed Power Systems

■

Negative Power Supply Control

LT1640L/LT1640H

Negative Voltage

Hot Swap Controller

U

DESCRIPTIO

The LT®1640L/LT1640H is an 8-pin, negative voltage Hot
SwapTM controller that allows a board to be safely inserted
and removed from a live backplane. Inrush current is
limited to a programmable value by controlling the gate
voltage of an external N-channel pass transistor. The pass
transistor is turned off if the input voltage is less than the
programmable undervoltage threshold or greater than the
overvoltage threshold. A programmable electronic circuit
breaker protects the system against shorts. The PWRGD
(LT1640L) or PWRGD (LT1640H) signal can be used to
directly enable a power module. The LT1640L is designed
for modules with a low enable input and the LT1640H for
modules with a high enable input.

The LT1640L/LT1640H is available in 8-pin PDIP and SO
packages.

, LTC and LT are registered trademarks of Linear Technology Corporation.

Hot Swap is a trademark of Linear Technology Corporation.

TYPICAL APPLICATIO

(SHORT PIN)

GND

UV = 37V

OV = 71V

–48V

* DIODES INC. SMAT70A

†

THESE COMPONENTS ARE APPLICATION
SPECIFIC AND MUST BE SELECTED BASED
UPON OPERATING CONDITIONS AND DESIRED
PERFORMANCE. SEE APPLICATIONS
INFORMATION.

GND

†

R4

562k

1%

3

UV

†

R5

9.09k
2

1%

OV

†

R6

V

SENSE

10k

1%

*

EE

4

56

†

R1

0.02Ω

43

5%

21

8

V

DD

LT1640L

GATE DRAIN

†

C1
150nF
25V

IRF530

C3

0.1µF
100V

U

Input Inrush Current

INRUSH

1

PWRGD

7

1N4148

†

R2

R3

†

C4
100µF
100V

18k
5%

C2

3.3nF
100V

1

4

ON/OFF

+

V

IN

–

V

IN

LUCENT

JW050A1-E

2

V

SENSE

TRIM

SENSE

V

OUT

OUT

9

+

8

+

–
–

C5

+

7

100µF

6

16V

5

1640 TA01

10Ω
5%

Q1

+

CURRENT

1A/DIV

GATE – V

EE

10V/DIV

DRAIN

50V/DIV

V

EE

50V/DIV

5V

CONTACT

BOUNCE

5ms/DIV

1640 F06b

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LT1640L/LT1640H

WW

W

ABSOLUTE MAXIMUM RATINGS

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(Note 1), All Voltages Referred to V

Supply Voltage (VDD – VEE) .................... –0.3V to 100V

DRAIN, PWRGD, PWRGD Pins ............... –0.3V to 100V

SENSE, GATE Pins.................................... –0.3V to 20V

UV, OV Pins .............................................. –0.3V to 60V

Maximum Junction Temperature ......................... 125°C

WU

/

PACKAGE

PWRGD

1

OV

2

UV

3

V

4

EE

N8 PACKAGE
8-LEAD PDIP

T

= 125°C, θJA = 120°C/W (N8)

JMAX

T

= 125°C, θJA = 150°C/W (S8)

JMAX

O

RDER I FOR ATIO

TOP VIEW

V

8

DD

DRAIN

7

GATE

6

SENSE

5

S8 PACKAGE

8-LEAD PLASTIC SO

S8 PART MARKING

ORDER PART

NUMBER

LT1640LCN8
LT1640LCS8
LT1640LIN8
LT1640LIS8

1640L
1640LI

EE

Operating Temperature Range

LT1640LC/LT1640HC ............................. 0°C to 70°C

LT1640LI/LT1640HI .......................... – 40°C to 85°C

Storage Temperature Range ................ –65°C to 150°C

Lead Temperature (Soldering, 10 sec)................. 300°C

U

ORDER PART

NUMBER

LT1640HCN8
LT1640HCS8
LT1640HIN8
LT1640HIS8

S8 PART MARKING

1640H
1640HI

PWRGD

OV
UV

V

EE

N8 PACKAGE
8-LEAD PDIP

T

JMAX

T

JMAX

TOP VIEW

1

2

3

4

= 125°C, θJA = 120°C/W (N8)
= 125°C, θJA = 150°C/W (S8)

8

7

6

5

S8 PACKAGE

8-LEAD PLASTIC SO

V

DD

DRAIN
GATE
SENSE

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at T

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

DC

V

DD

I

DD

V

CB

I

PU

I

PD

I

SENSE

∆V

V

UVH

V

UVL

V

UVHY

I

INUV

V

OVH

V

OVL

V

OVHY

I

INOV

GATE

Supply Operating Range ● 10 80 V
Supply Current UV = 3V, OV = VEE, SENSE = V
Circuit Breaker Trip Voltage VCB = (V
GATE Pin Pull-Up Current Gate Drive On, V
GATE Pin Pull-Down Current Any Fault Condition 24 50 70 mA
SENSE Pin Current V
External Gate Drive (V

UV Pin High Threshold Voltage UV Low to High Transition ● 1.213 1.243 1.272 V
UV Pin Low Threshold Voltage UV High to Low Transition ● 1.198 1.223 1.247 V
UV Pin Hysteresis 20 mV
UV Pin Input Current VUV = V
OV Pin High Threshold Voltage OV Low to High Transition ● 1.198 1.223 1.247 V
OV Pin Low Threshold Voltage OV High to Low Transition ● 1.165 1.203 1.232 V
OV Pin Hysteresis 20 mV
OV Pin Input Current VOV = V

SENSE

(V

GATE
GATE

The ● denotes the specifications which apply over the full operating

= 25°C. (Note 2), V

A

– VEE) ● 40 50 60 mV

SENSE

= V

GATE

= 50mV –20 µA

– VEE), 15V ≤ VDD ≤ 80V ● 10 13.5 18 V
– VEE), 10V ≤ VDD < 15V ● 6815 V

EE

EE

= 48V, VEE = 0V unless otherwise noted.

DD

EE

EE

● 1.3 5 mA

● –30 –45 –60 µA

● –0.02 –0.5 µA

● –0 .03 –0.5 µA

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LT1640L/LT1640H

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at T

The ● denotes the specifications which apply over the full operating

= 25°C. (Note 2), V

A

= 48V, VEE = 0V unless otherwise noted.

DD

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

PG

V

PGHY

I

DRAIN

V

OL

I

OH

R

OUT

Power Good Threshold V

– VEE, High to Low Transition 1.1 1.4 2.0 V

DRAIN

Power Good Threshold Hysteresis 0.4 V
Drain Input Bias Current V
PWRGD Output Low Voltage PWRGD (LT1640L), (V

PWRGD Output Low Voltage PWRGD (LT1640H), V
(PWRGD – DRAIN) I

Output Leakage PWRGD (LT1640L), V

Power Good Output Impedance PWRGD (LT1640H), (V

= 48V ● 10 50 500 µA

DRAIN

– VEE) < V

I

= 1mA ● 0.48 0.8 V

OUT

I

= 5mA 1.50 3.0 V

OUT

= 1mA ● 0.75 1.0 V

OUT

= 80V

V

PWRGD

DRAIN

= 5V

DRAIN

=48V, ● 0.05 10 µA

DRAIN

– VEE) < V

DRAIN

PG

● 2 6.5 kΩ

PG

(PWRGD to DRAIN)

AC

t

PHLOV

t

PHLUV

t

PLHOV

t

PLHUV

t

PHLSENSE

t

PHLPG

OV High to GATE Low Figures 1, 2 1.7 µs
UV Low to GATE Low Figures 1, 3 1.5 µs
OV Low to GATE High Figures 1, 2 5.5 µs
UV High to GATE High Figures 1, 3 6.5 µs
SENSE High to Gate Low Figures 1, 4 2 3 4 µs
DRAIN Low to PWRGD Low (LT1640L) Figures 1, 5 0.5 µs

DRAIN Low to (PWRGD – DRAIN) High (LT1640H) Figures 1, 5 0.5 µs

t

PLHPG

DRAIN High to PWRGD High (LT1640L) Figures 1, 5 0.5 µs
DRAIN High to (PWRGD – DRAIN) Low (LT1640H) Figures 1, 5 0.5 µs

Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.

Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to V
specified.

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Supply Current vs Supply Voltage

1.8

1.7

1.6

1.5

1.4

1.3

SUPPLY CURRENT (mA)

1.2

1.1

0

20 40 80

0

SUPPLY VOLTAGE (V)

60

100

1640 G01

Supply Current vs Temperature

1.6

1.5

1.4

1.3

1.2

SUPPLY CURRENT (mA)

1.1

1.0
–50 –25

0255075

TEMPERATURE (°C)

1640 G02

100

unless otherwise

EE

Gate Voltage vs Supply Voltage

15

14

13

12

11

10

9

GATE VOLTAGE (V)

8

7

6

0

20 60

40

SUPPLY VOLTAGE (V)

80

100

1640 G03

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LT1640L/LT1640H

TEMPERATURE (°C)

–50

2

OUTPUT IMPEDANCE (kΩ)

3

4

5

6

7

8

–25 2505075

1640 G09

100

V

DRAIN

– VEE > 2.4V

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Gate Voltage vs Temperature

15.0

14.5

14.0

13.5

13.0

GATE VOLTAGE (V)

12.5

12.0
–25 0 75

TEMPERATURE (°C)

Gate Pull-Down Current
vs Temperature

55

V

= 2V

GATE

52

49

1640 G04

Circuit Breaker Trip Voltage
vs Temperature

55

54

53

52

51

TRIP VOLTAGE (mV)

50

49

100–50 25 50

48

–50

–25

TEMPERATURE (°C)

50

250

100

75

1640 G05

PWRGD Output Low Voltage
vs Temperature (LT1640L)

0.5
I

= 1mA

OUT

0.4

0.3

Gate Pull-Up Current
vs Temperature

48

V

= 0V

GATE

47

46

45

44

43

42

GATE PULL-UP CURRENT (µA)

41

40

–25 10050250

–50

TEMPERATURE (°C)

PWRGD Output Impedance
vs Temperature (LT1640H)

75

1640 G06

46

43

GATE PULL-DOWN CURRENT (mA)

40

–25 0

–50

25

TEMPERATURE (°C)

50

75

100

1640 G07

0.2

0.1

PWRGD OUTPUT LOW VOLTAGE (V)

0

–25 25050

–50

TEMPERATURE (°C)

75

100

1640 G08

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PIN FUNCTIONS

PWRGD/PWRGD (Pin 1): Power Good Output Pin. This pin
will toggle when V

is within VPG of VEE. This pin can

DRAIN

be connected directly to the enable pin of a power module.
When the DRAIN pin of the LT1640L is above VEE by more

than VPG, the PWRGD pin will be high impedance, allowing
the pull-up current of the module’s enable pin to pull the
pin high and turn the module off. When V

DRAIN

drops
below VPG, the PWRGD pin sinks current to VEE, pulling
the enable pin low and turning on the module.

When the DRAIN pin of the LT1640H is above VEE by more
than VPG, the PWRGD pin will sink current to the DRAIN

pin which pulls the module’s enable pin low, forcing it off.
When V

drops below VPG, the PWRGD sink current

DRAIN

is turned off and a 6.5k resistor is connected between
PWRGD and DRAIN, allowing the module’s pull-up cur­rent to pull the enable pin high and turn on the module.

OV (Pin 2): Analog Overvoltage Input. When OV is pulled
above the 1.223V low to high threshold, an overvoltage
condition is detected and the GATE pin will be immediately
pulled low. The GATE pin will remain low until OV drops
below the 1.203V high to low threshold.

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PIN FUNCTIONS

LT1640L/LT1640H

UV (Pin 3): Analog Undervoltage Input. When UV is
pulled below the 1.223V high to low threshold, an under­voltage condition is detected and the GATE pin will be
immediately pulled low. The GATE pin will remain low
until UV rises above the 1.243 low to high threshold.

The UV pin is also used to reset the electronic circuit
breaker. If the UV pin is cycled low and high following the
trip of the circuit breaker, the circuit breaker is reset and
a normal power-up sequence will occur.

VEE (Pin 4): Negative Supply Voltage Input. Connect to
the lower potential of the power supply.

SENSE (Pin 5): Circuit Breaker Sense Pin. With a sense
resistor placed in the supply path between VEE and
SENSE, the circuit breaker will trip when the voltage
across the resistor exceeds 50mV. Noise spikes of less
than 2µs are filtered out and will not trip the circuit
breaker.

If the circuit breaker trip current is set to twice the normal
operating current, only 25mV is dropped across the
sense resistor during normal operation. To disable the
circuit breaker, VEE and SENSE can be shorted together.

GATE (Pin 6): Gate Drive Output for the External
N-Channel. The GATE pin will go high when the following
start-up conditions are met: the UV pin is high, the OV pin
is low and (V

– VEE) < 50mV. The GATE pin is pulled

SENSE

high by a 45µA current source and pulled low with a
50mA current source.

DRAIN (Pin 7): Analog Drain Sense Input. Connect this
pin to the drain of the external N-channel and the V– pin
of the power module. When the DRAIN pin is below VPG,
the PWRGD or PWRGD pin will toggle.

VDD (Pin 8): Positive Supply Voltage Input. Connect this
pin to the higher potential of the power supply inputs and
the V+ pin of the power module. The input supply voltage
ranges from 10V to 80V.

BLOCK DIAGRA

UV

OV

–

+

REF

–

+

W

V

DD

V

REF

CC

OUTPUT

DRIVE

+

–

+

V

PG

–

V

EE

DRAIN

PWRGD/PWRGD

1640 BD

VCC AND

REFERENCE

GENERATOR

LOGIC

AND

50mV

EE

–

+

–

+

GATE DRIVE

GATESENSEV

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