LINEAR TECHNOLOGY LT1074, LT1076 User Manual

LT1074/LT1076 Design Manual

Carl Nelson

Application Note 44

September 1991

INTRODUCTION

The use of switching regulators increased dramatically in
the 1980’s and this trend remains strong going into the
90s. The reasons for this are simple; heat and efficiency.
Today’s systems are shrinking continuously, while simul­taneously offering greater electronic “horsepower.” This
combination would result in unacceptably high internal
temperatures if low efficiency linear supplies were used.
Heat sinks do not solve the problem in general because
most systems are closed, with low thermal transfer from
“inside” to “outside.”

Battery-powered systems need high efficiency supplies for
long battery life. Topological considerations also require
switching technology. For instance, a battery cannot
generate an output higher than itself with linear supplies.
The availability of low cost rechargeable batteries has cre­ated a spectacular rise in the number of battery-powered
systems, and consequently a matching rise in the use of
switching regulators.

®

The LT

1074 and LT1076 switching regulators are designed
specifically for ease of use. They are close to the ultimate
“three terminal box” concept which simply requires an
input, output and ground connection to deliver power to
the load. Unfortunately, switching regulators are not horse­shoes, and “close” still leaves room for egregious errors
in the final execution. This application note is intended to
eliminate the most common errors that customers make
with switching regulators as well as offering some insight
into the inner workings of switching designs. There is also
an entirely new treatment of inductor design based on the
mathematical models of core loss and peak current. This

allows the customer to quickly see the allowable limits for
inductor value and make an intelligent decision based on
the need for cost, size, etc. The procedure differs greatly
from previous design techniques and many experienced
designers at first think it can’t work. They quickly become
silent after standard laborious trial-and-error techniques
yield identical results.

There is an old adage in woodworking — “Measure twice,
cut once.” This advice holds for switching regulators, also.
Read AN44 through quickly to familiarize yourself with the
contents. Then reread the pertinent sections carefully to
avoid “cutting” the design two, three, or four times. Some
switching regulator errors, such as excessive ripple cur­rent in capacitors, are time bombs best fixed before they
are expensive field failures.

Since this paper was originally written, Linear Technology
has produced a CAD program for switching regulators

®

called LTspice.

A spice simulator, LTspice, has been
developed and optimized for switching regulator simula­tion. IC models for switching regulators with fast transient
simulation allow regulator circuits to be simulated for
transient response without resorting to linearized models.

Once the basic design concepts are understood, trial de­signs can be quickly checked and modified on the simulator.
Start-up, dropout, regulation, ripple and transient response
are available from the simulator. The output correlates well
with the actual circuit on a well laid-out board.

LTspice can be downloaded free from www.linear.com.

L, LT, LTC, LTM, SwitcherCAD, LTspice, Linear Technology and the Linear logo are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners.

an44fa

AN44-1

Application Note 44

TABLE OF CONTENTS

Introduction ................................................. 1

Absolute Maximum Ratings .............................. 3

Package/Order Information ............................... 3

Block Diagram .............................................. 5

Block Diagram Description ............................... 6

Typical Performance Characteristics ................... 7

Pin Descriptions .......................................... 10

Pin .................................................................... 10

V

IN

Ground Pin ..............................................................10

Feedback Pin........................................................... 10

Shutdown Pin ......................................................... 11

Status Pin ............................................................... 13

Pin ................................................................... 14

I

LIM

Error Amplifier ........................................................ 15

Definition Of Terms ....................................... 16

Positive Step-Down (Buck) Converter ................. 17

Inductor .................................................................. 19

Output Catch Diode ................................................. 19

LT1074 Power Dissipation .......................................20

Input Capacitor (Buck Converter)............................20

Output Capacitor .................................................... 21

Efficiency ................................................................ 22

Output Divider ........................................................22

Output Overshoot ...................................................22

Overshoot Fixes That Don’t Work ........................... 23

Tapped-Inductor Buck Converter ........................ 23

Snubber ..................................................................25

Output Ripple Voltage .............................................26

Input Capacitor ...................................................... 26

Positive-To-Negative Converter ........................ 26

Input Capacitor ....................................................... 28

Output Capacitor ..................................................... 29

Efficiency ................................................................ 30

Negative Boost Converter ...............................31

Output Diode...........................................................32

Output Capacitor .................................................... 32

Output Ripple ..........................................................33

Input Capacitor ....................................................... 33

Inductor Selection ........................................33

Minimum Inductance to Achieve

a Required Output Power ........................................34

Minimum Inductance Required to Achieve

a Desired Core Loss ................................................35

Micropower Shutdown ...................................38

Start-Up Time Delay ...............................................38

5-Pin Current Limit .......................................39

Soft-Start ................................................... 39

Output Filters .............................................. 40

Input Filters ................................................42

Oscilloscope Techniques ................................43

Ground Loops ......................................................... 43

Miscompensated Scope Probe ...............................44

Ground “Clip” Pickup ..............................................44

Wires Are Not Shorts ..............................................44

EMI Suppression .......................................... 45

Troubleshooting Hints .................................... 46

Low Efficiency ........................................................46

Alternating Switch Timing ......................................46

Input Supply Won’t Come Up ..................................46

Switching Frequency is Low in Current Limit ..........46

IC Blows Up! ...........................................................46

IC Runs Hot ............................................................ 47

High Output Ripple or Noise Spikes ........................ 47

Poor Load or Line Regulation ................................. 47

500kHz-5MHz Oscillations, Especially

at Light Load ........................................................... 47

AN44-2

an44fa

Application Note 44

ABSOLUTE MAXIMUM RATINGS

Input Voltage

LT1074/LT1076 .....................................................45V

LT1074HV/LT1076HV ............................................64V

Switch Voltage with Respect to Input Voltage

LT1074/LT1076 .....................................................64V

LT1074HV/LT1076HV ............................................75V

Switch Voltage with Respect to Ground Pin (V

LT1074/LT1076 (Note 6)........................................35V

LT1074HV/LT1076HV (Note 6) ..............................45V

Feedback Pin Voltage ...................................... –2V, +10V

Shutdown Pin Voltage (Not to Exceed V

Status Pin Voltage.....................................................30V

(Current Must Be Limited to 5mA When Status Pin
Switches On)

Pin Voltage (Forced) .........................................5.5V

I

LIM

Maximum Operating Ambient Temperature Range

LT1074C/76C, LT1074HVC/76HVC ........... 0°C to 70°C

LT1074M/76M, LT1074HVM/76HVM ..–55°C to 125°C
Maximum Operating Junction Temperature Range

LT1074C/76C, LT1074HVC/76HVC ......... 0°C to 125°C

LT1074M /76M, LT1074HVM / 76HVM . –55°C to 150°C

Maximum Storage Temperature ............. –65°C to 150°C

Lead Temperature (Soldering, 10 sec.) ..................300°C

Negative)

SW

) ...............40V

IN

PACKAGE/ORDER INFORMATION

FRONT VIEW

5
4
3
2
1

T PACKAGE

5-LEAD T0-220

LEADS ARE FORMED STANDARD
FOR STRAIGHT LEADS, ORDER
FLOW 06

BOTTOM VIEW

V

C

1

4

FB

K PACKAGE

4-LEAD TO-3 METAL CAN

FRONT VIEW

7
6
5
4
3
2
1

Y PACKAGE

7-LEAD TO-220

V

IN

V

SW

GND

V

C

FB

V

IN

2
3

CASE IS GND

V

SW

SHUTDOWN
V

C

FB
GND
I

LIM

V

SW

V

IN

ORDER PART

NUMBER

LT1074CT
LT1074HVCT
LT1076CT
LT1076HVCT

LT1074MK
LT1074HVMK
LT1074CK
LT1074HVCK
LT1076MK
LT1076HVMK
LT1076CK
LT1076HVCK

LT1074CY

ELECTRICAL CHARACTERISTICS

PARAMETER CONDITIONS MIN TYP MAX UNITS

Switch On Voltage (Note 1) LT1074 I

Switch Off Leakage LT1074 V

Supply Current (Note 2) V

I
I
I

LT1076 I
I

V

LT1076 V
V

= 2.5V, VIN ≤ 40V

FB

40V < V
V

= 0.1V (Device Shutdown) (Note 8)

SHUT

TJ = 25°C, VIN = 25V, unless otherwise noted.

= 1A, TJ ≥ 0°C

SW

= 1A, TJ < 0°C

SW

= 5A, TJ ≥ 0°C

SW

= 5A, TJ < 0°C

SW

= 0.5A

SW

= 2A

SW

≤ 25V, VSW = 0

IN

= V

, VSW = 0 (Note 7)

MAX

≤ 25V, VSW = 0
= V

, VSW = 0 (Note 7)

MAX

< 60V

IN

IN

IN
IN

1.85

2.1

2.3

2.5

l
l

5

10

l
l
l

8.5
9

140

1.2

1.7

300
500

150
250

11
12

300

µA
µA

µA
µA

mA
mA

µA

an44fa

AN44-3

V
V
V
V

V
V

Application Note 44

ELECTRICAL CHARACTERISTICS

TJ = 25°C, VIN = 25V, unless otherwise noted.

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum Supply Voltage Normal Mode

Start-Up Mode (Note 3)

Switch Current Limit (Note 4) LT1074 I

LIM

R
R

LT1076 I

LIM

R
R

Maximum Duty Cycle

Switching Frequency

TJ ≤ 125°C
T

> 125°C

J

V

= 0V Through 2kΩ (Note 4)

FB

Switching Frequency Line Regulation 8V ≤ V

Error Amplifier Voltage Gain (Note 6) 1V ≤ V

≤ V

IN

≤ 4V 2000 V/V

C

Open

= 10k (Note 5)

LIM

= 7k (Note 5)

LIM

Open

= 10k (Note 5)

LIM

= 7k (Note 5)

LIM

(Note 7)

MAX

l
l

l

5.5 6.5

l

2 2.6

l

85 90 %

90

l

85

l

85

l

7.3

3.5

8

4.8

8.5 A

4.5
3

3.2 A

1.8

1.2

100

20

110
120
125

kHz
kHz
kHz
kHz

0.03 0.1 %/V

V
V

A
A

A
A

Error Amplifier Transconductance 3700 5000 8000 µmho

Error Amplifier Source and Sink Current Source (V

Sink (V

FB

Feedback Pin Bias Current V

Reference Voltage V

Reference Voltage Tolerance V

= V

FB

REF

= 2V

C

(Nominal) = 2.21V

REF

All Conditions of Input Voltage, Output Voltage,

= 2V)

FB

= 2.5V)

100

0.7

l

l

2.155 2.21 2.265 V

l

140

1

225

1.6

0.5 2 µA

±0.5

±1

±1.5
±2.5

µA

mA

%
%

Temperature and Load Current

Reference Voltage Line Regulation 8V ≤ V

Voltage at 0% Duty Cycle 1.5 V

V

C

IN

≤ V

MAX

(Note 7)

Over Temperature

l

l

0.005 0.02 %/V

–4 mV/°C

Multiplier Reference Voltage 24 V

l

5102050µA

l

l

2.2

l

0.1

2.45

0.3

2.7

0.5

µA

V
V

Shutdown Pin Current V

V

SH
SH

= 5V
≤ V

THRESHOLD

(≅2.5V)

Shutdown Thresholds Switch Duty Cycle = 0

Fully Shut Down

Status Window As a Percent of Feedback Voltage 4 ±5 6 %

Status High Level I

Status Low Level I

= 10µA Sourcing

STATUS

= 1.6mA Sinking

STATUS

l

3.5 4.5 5.0 V

l

0.25 0.4 V

Status Delay Time 9µs

Status Minimum Width 30 µs

Thermal Resistance Junction to Case LT1074

LT1076

2.5

4.0

°C/W
°C/W

l denotes the specifications which apply over the full operating

The
temperature range.

Note 1: To calculate maximum switch on voltage at currents between low
and high conditions, a linear interpolation may be used.

Note 2: A feedback pin voltage (V

) of 2.5V forces the VC pin to its low

FB

clamp level and the switch duty cycle to zero. This approximates the zero
load condition where duty cycle approaches zero.

Note 3: Total voltage from V

pin to ground pin must be ≥ 8V after start-

IN

up for proper regulation.

AN44-4

Note 4: Switch frequency is internally scaled down when the feedback pin
voltage is less than 1.3V to avoid extremely short switch on times. During
testing, V

Note 5:

is adjusted to give a minimum switch on time of 1µs.

FB

I

LIM

R

–1k

LIM

≈

LT1047

()

2k

R

–1k

LIM

LIM

≈

LT1076

()

5.5k

,I

Note 6: Switch to input voltage limitation must also be observed.
Note 7: V

= 40V for the LT1074/76 and 60V for the LT1074HV/76HV.

MAX

Note 8: Does not include switch leakage.

an44fa

BLOCK DIAGRAM

Application Note 44

INPUT SUPPLY

10µA

SHUTDOWN*

OUTPUT

VOLTAGE

MONITOR

STATUS**

2.21V

0.3V

+

µPOWER

SHUTDOWN

–

2.35V

+

–

+

–

FB V

CURRENT

SHUTDOWN

A1

ERROR

AMP

LIMIT

6V

REGULATOR

AND BIAS

I *

LIM

MULTIPLIER

X

24V (EQUIVALENT)

C

FREQ SHIFT

SYNC

V

IN

Z

ANALOG

XY

Z

Y

320µA

6V TO ALL
CIRCUITRY

100kHz

OSCILLATOR

3V(

P-P

)

+

C1

–

4.5V

PULSE WIDTH
COMPARATOR

10k

S

R

R/S

LATCH

R

CURRENT

LIMIT
COMP

Q

LT1076

LT1074

500

+

C2

250

0.04

–

G1

400

15

SWITCH

OUTPUT

(V )

SW

AVAILABLE ONLY ON PACKAGES WITH PIN COUNTS GREATER THAN 5.

*

AVAILABLE ONLY ON LT1176 FAMILY.

**

0.1

100

SWITCH

OUTPUT (V )

SW

-5t#%

an44fa

AN44-5

Application Note 44

BLOCK DIAGRAM DESCRIPTION

A switch cycle in the LT1074 is initiated by the oscillator
setting the R/S latch. The pulse that sets the latch also
locks out the switch via gate G1. The effective width of this
pulse is approximately 700ns, which sets the maximum
switch duty cycle to approximately 93% at 100kHz switch­ing frequency. The switch is turned off by comparator C1,
which resets the latch. C1 has a sawtooth waveform as one
input and the output of an analog multiplier as the other
input. The multiplier output is the product of an internal
reference voltage, and the output of the error amplifier,
A1, divided by the regulator input voltage. In standard
buck regulators, this means that the output voltage of A1
required to keep a constant regulated output is indepen­dent of regulator input voltage. This greatly improves line
transient response, and makes loop gain independent of
input voltage. The error amplifier is a transconductance
type with a G

at null of approximately 5000µmho. Slew

M

current going positive is 140µA, while negative slew current
is about 1.1mA. This asymmetry helps prevent overshoot
on startup. Overall loop frequency compensation is ac­complished with a series RC network from V

to ground.

C

Switch current is continuously monitored by C2, which
resets the R/S latch to turn the switch off if an overcur­rent condition occurs. The time required for detection
and switch turn-off is approximately 600ns. So minimum
switch on time in current limit is 600ns. Under dead
shorted output conditions, switch duty cycle may have
to be as low as 2% to maintain control of output current.
This would require switch on time of 200ns at 100kHz
switching frequency, so frequency is reduced at very
low output voltages by feeding the FB signal into the

oscillator and creating a linear frequency downshift when
the FB signal drops below 1.3V. Current trip level is set by
the voltage on the I

pin which is driven by an internal

LIM

320µA current source. When this pin is left open, it self­clamps at about 4.5V and sets current limit at 6.5A for
the LT1074 and 2.6A for the LT1076. In the 7-pin package
an external resistor can be connected from the I

LIM

pin to
ground to set a lower current limit. A capacitor in parallel
with this resistor will soft-start the current limit. A slight
offset in C2 guarantees that when the I

pin is pulled

LIM

to within 200mV of ground, C2 output will stay high and
force switch duty cycle to zero.

The shutdown pin is used to force switch duty cycle to zero
by pulling the I

pin low, or to completely shut down

LIM

the regulator. Threshold for the former is approximately

2.35V, and for complete shutdown, approximately 0.3V.
Total supply current in shutdown is about 150µA. A 10µA
pull-up current forces the shutdown pin high when left
open. A capacitor can be used to generate delayed start­up. A resistor divider will program “undervoltage lockout”
if the divider voltage is set at 2.35V when the input is at
the desired trip point.

The switch used in the LT1074 is a Darlington NPN (single
NPN for LT1076) driven by a saturated PNP. Special pat­ented circuitry is used to drive the PNP on and off very
quickly even from the saturation state. This particular
switch arrangement has no “isolation tubs” connected
to the switch output, which can therefore swing to 40V
below ground.

AN44-6

an44fa

Application Note 44

TYPICAL PERFORMANCE CHARACTERISTICS

VC Pin Characteristics VC Pin Characteristics Feedback Pin Characteristics

200

150

100

50

0

–50

CURRENT (mA)

–100

–150

–200

0

1234

VFB ADJUSTED FOR

= 0 AT VC = 2V

I

C

4-01&óLĀ

VFB ≤ 2V

VOLTAGE (V)

5

6

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2.0

1.5

1.0

0.5

0

–0.5

CURRENT (mA)

–1.0

–1.5

–2.0

1234

0

VFB ≥ 2.5V

VOLTAGE (V)

5

789

6

-5t51$

500

400

300

200

100

0

–100

CURRENT (µA)

–200

–300

–400

–500

1

0

START OF
FREQUENCY SHIFTING

234

VOLTAGE (V)

5

78 109

6

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Shutdown Pin Characteristics Shutdown Pin Characteristics I

40

30

20

10

5)*410*/5.07&4

0

–10

CURRENT (µA)

–20

–30

–40

0

10

V

= 50V

IN

WITH V

IN

DETAILS OF THIS
AREA SHOWN IN

05)&3(3"1)

20 40

30

VOLTAGE (V)

50 60 70 80

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0

o

–10

o

–20

o

CURRENT (µA)

–30

o

–40



0

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0'4)65%08/1*/

SHUTDOWN
THRESHOLD

1.0 2.0



VOLTAGE (V)

 3.0  4.0

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–100

–150

–200

CURRENT (µA)

–250

–300

–350

–400

Pin Characteristics

LIM

100

50

0

–50

–1

–2

Status Pin Characteristics Status Pin Characteristics Supply Current

4.0

3.5

3.0

2.5

2.0

1.5

CURRENT (mA)

1.0

0.5

0

0.1

0

45"5641*/i-08w

0.3

0.2

VOLTAGE (V)

0.4

0.5

0.6

0.7

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

150

100

50

STATUS “HI”

0

–50

SOURCE CURRENT

–100

CURRENT (µA)

–150

–200

–250

1

0

UNLOADED

“HI” STATE

24

3

VOLTAGE (V)

5404550

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20

18

16

14

12

10

8

6

INPUT CURRENT (mA)

4

2

0

0

TJ = 25°C

5 

0

12

DEVICE NOT SWITCHING

10 40 50

20 30 60

INPUT VOLTAGE (V)

3

VOLTAGE (V)

V

= 1V

C

4

5

7

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8

an44fa

AN44-7

Application Note 44

TYPICAL PERFORMANCE CHARACTERISTICS

Reference Voltage

Supply Current (Shutdown)

300

250

200

150

100

INPUT CURRENT (µA)

50

0

10 20 40

0

30 50 60

INPUT VOLTAGE (V)

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vs Temperature

2.25

2.24

2.23

2.22

2.21

VOLTAGE (V)

2.20

2.19

2.18

2.17
–25 0 25 50

–50

75 100 125 150

JUNCTION TEMPERATURE (°C)

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Switch On Voltage

3.0

2.5

2.0

1.5

ON VOLTAGE (V)

1.0

0.5
0

123

LT1074

LT1076

4 56

48*5$)$633&/5"

TJ¡$

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Reference Shift with Ripple
Voltage

20

10

0

–10

–20

–30

–40

–50

–60

–70

CHANGE IN REFERENCE VOLTAGE (mV)

–80

0

SQUARE

WAVE

20 40 60 80

PEAK-TO-PEAK RIPPLE AT FB PIN (mV)

100 120

160

140

120

100

80

60

40

SWITCHING FREQUENCY (kHz)

20

0

Switching Frequency

TRI WAVE

140

160 180 200

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Error Amplifier Phase and G

8k

7k

6k

(µmho)

5k

4k

3k

2k

TRANSCONDUCTANCE

1k

0

1k 100k 1M 10M

10k

FREQUENCY (Hz)

M

V

G

M

-5t51$

200

150

100

50

0

–50

–100

–150

–200

PHASE (°)

vs Temperature

120

115

110

105

100

95

FREQUENCY (kHz)

90

85

80

–25 0 25 50

–50

JUNCTION TEMPERATURE (°C)

Feedback Pin Frequency Shift Current Limit vs Temperature*

8

7

I

PIN OPEN

LIM

6

150°C

–55°C

25°C

1.0 1.5 3.0

0.5 2.0 2.5

0

FEEDBACK PIN VOLTAGE (V)

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5

4

3

= 5k

R

2

OUTPUT CURRENT LIMIT (A)

1

*MULTIPLY CURRENTS BY 0.4 FOR LT1076

0

–50 –25 0 25 50

LIM

JUNCTION TEMPERATURE (°C)

75

R

LIM

= 10k

100

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125

150

75

100

125

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150

AN44-8

an44fa

TYPICAL PERFORMANCE CHARACTERISTICS

Application Note 44

Operating Input Supply Current*

16

14

12

10

OPERATING CURRENT (mA)

*VIN = 25V, V

8

6

4

2

0

–50

–25 50

JUNCTION TEMPERATURE (°C)

0

OUT

25

BUCK CONVERTER

= 5V, I

75 100 125 150

VC Voltage vs Input Voltage

3.2



#6$,$0/7&35&3
$0/5*/6064.0%&

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Feedback Pin Frequency Shift

160

140

120

100

80

60

40

SWITCHING FREQUENCY (kHz)

20

0

0

25°C

150°C

–55°C

20 40 60

FEEDBACK PIN CURRENT (µA)

80

100 120

VC Voltage vs Output Voltage

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2.8

2.6

2.4

2.2

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VOLTAGE (V)

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160

Shutdown Threshold

0.40

0.35

0.30

0.25

0.20

0.15

0.10

THRESHOLD VOLTAGE (V)

0.05

0

–50 –25 0 25 50

JUNCTION TEMPERATURE (°C)

75

Status Delay and Minimum
Timeout



35



25



TIME (µs)

15

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150



an44fa

AN44-9

Application Note 44

PIN DESCRIPTIONS

VIN PIN

The V

pin is both the supply voltage for internal control

IN

circuitry and one end of the high current switch. It is im­portant, especially at low input voltages, that this pin be
bypassed with a low ESR, and low inductance capacitor
to prevent transient steps or spikes from causing erratic
operation. At full switch current of 5A, the switching tran­sients at the regulator input can get very large as shown
in Figure 1. Place the input capacitor very close to the
regulator and connect it with wide traces to avoid extra
inductance. Use radial lead capacitors.

dI

L

( )

( )

P

dt

STEP =

I

( )( )

ESR

SW

Figure 1. Input Capacitor Ripple

RAMP =

TI

( )( )

ON

SW

C

"/t'

LP = Total inductance in input bypass connections
and capacitor.

“Spike” height is

⎛

dI

⎜

⎝

dt

⎞

• L

⎟

approximately 2V per

P

⎠

inch of lead length.
Step = 0.25V for ESR = 0.05Ω and I
Ramp = 125mV for C = 200µF, t
and I

Input current on the V

= 5A is 125mV.

SW

Pin in shutdown mode is the

IN

ON

= 5A is 0.25V.

SW

= 5µs,

sum of actual supply current (≈140µA, with a maximum
of 300µA) and switch leakage current. Consult factory for
special testing if shutdown mode input current is critical.

GROUND PIN

It might seem unusual to describe a ground pin, but in
the case of regulators, the ground pin must be connected
properly to ensure good load regulation. The internal
reference voltage is referenced to the ground pin; so any
error in ground pin voltage will be multiplied at the output;

∆V

()

∆V

OUT

GND

=

V

()

OUT

2.21

To ensure good load regulation, the ground pin must be
connected directly to the proper output node, so that no
high currents flow in this path. The output divider resistor
should also be connected to this low current connection
line as shown in Figure 2.

-5

'#

GND

R2

HIGH CURRENT
RETURN PATH

Figure 2. Proper Ground Pin Connection

NEGATIVE OUTPUT NODE
WHERE LOAD REGULATION
WILL BE MEASURED

"/t'

FEEDBACK PIN

The feedback pin is the inverting input of an error ampli­fier which controls the regulator output by adjusting duty
cycle. The noninverting input is internally connected to a
trimmed 2.21V reference. Input bias current is typically

0.5µA when the error amplifier is balanced (I
error amplifier has asymmetrical G

for large input signals

M

= 0). The

OUT

to reduce start-up overshoot. This makes the amplifier
more sensitive to large ripple voltages at the feedback pin.
100mV

ripple at the feedback pin will create a 14mV

P-P

offset in the amplifier, equivalent to a 0.7% output voltage
shift. To avoid output errors, output ripple (

) should be

P-P

less than 4% of DC output voltage at the point where the
output divider is connected.

See the Error Amplifier section for more details.

Frequency Shifting at the Feedback Pin

The error amplifier feedback pin (FB) is used to downshift
the oscillator frequency when the regulator output voltage
is low. This is done to guarantee that output short-circuit

AN44-10

an44fa

PIN DESCRIPTIONS

Application Note 44

current is well controlled even when switch duty cycle
must be extremely low. Theoretical switch on time for a
buck converter in continuous mode is;

+ V

tON=

V

OUT

VIN• f

D

VD = Catch diode forward voltage ( ≈0.5V)
f = Switching frequency

At f = 100kHz, t
and the output is shorted (V
the LT1074 can reduce t
much too long to control current correctly for V

must drop to 0.2µs when VIN = 25V

ON

= 0V). In current limit,

OUT

to a minimum value of ≈0.6µs,

ON

= 0. To

OUT

correct this problem, switching frequency is lowered from
100kHz to 20kHz as the FB pin drops from 1.3V to 0.5V.
This is accomplished by the circuitry shown in Figure 3.

Q1 is off when the output is regulating (V
the output is pulled down by an overload, V

= 2.21V). As

FB

will eventu-

FB

ally reach 1.3V, turning on Q1. As the output continues
to drop, Q1 current increases proportionately and lowers
the frequency of the oscillator. Frequency shifting starts
when the output is ≈60% of normal value, and is down to
its minimum value of ≅20kHz when the output is ≅20%
of normal value. The rate at which frequency is shifted is
determined by both the internal 3k resistor R3 and the
external divider resistors. For this reason, R2 should not be
increased to more than 4k, if the LT1074 will be subjected
to the simultaneous conditions of high input voltage and
output short circuit.

SHUTDOWN PIN

The shutdown pin is used for undervoltage lockout,
micropower shutdown, soft-start, delayed start, or as a
general purpose on/off control of the regulator output.
It controls switching action by pulling the I

pin low,

LIM

which forces the switch to a continuous off state. Full
micropower shutdown is initiated when the shutdown pin
drops below 0.3V.

The V/I characteristics of the shutdown pin are shown in
Figure 4. For voltages between 2.5V and ≈V

, a current of

IN

10µA flows out of the shutdown pin. This current increases
to ≈25µA as the shutdown pin moves through the 2.35V
threshold. The current increases further to ≈30µA at the

0.3V threshold, then drops to ≈15µA as the shutdown volt­age falls below 0.3V. The 10µA current source is included
to pull the shutdown pin to its high or default state when
left open. It also provides a convenient pull-up for delayed
start applications with a capacitor on the shutdown pin.

When activated, the typical collector current of Q1 in
Figure 5, is ≈2mA. A soft-start capacitor on the I

LIM

pin

will delay regulator shutdown in response to C1, by ≈(5V)

)/2mA. Soft-start after full micropower shutdown is

(C

LIM

ensured by coupling C2 to Q1.

TO
OSCILLATOR

V

OUT

2.21V

Q1

R3
3k

R1

EXTERNAL
DIVIDER

FB

R2

2.21k

"/t'

an44fa

2V

+

ERROR

V

AMPLIFIER

C

–

Figure 3. Frequency Shifting

AN44-11

Application Note 44

PIN DESCRIPTIONS

0

TJ¡$

o

CURRENT FLOWS OUT

–10

o

–20

o

CURRENT (µA)

–30

o

–40

Undervoltage Lockout

0'4)65%08/1*/

SHUTDOWN
THRESHOLD

1.0 2.0



0



VOLTAGE (V)

 3.0  4.0

Figure 4. Shutdown Pin Characteristics

-5t51$

SHUTDOWN

PIN

10μA

300μA

–

C1

2.3V

+

–

C2

0.3V

+

Figure 5. Shutdown Circuitry

Q1

TO TOTAL
REGULATOR
SHUTDOWN

V

IN

I

LIM

PIN

6V

$1)

EXTERNAL
C

LIM

Undervoltage lockout point is set by R1 and R2 in Figure6.
To avoid errors due to the 10µA shutdown pin current, R2
is usually set at 5k, and R1 is found from:

–V

V

()

TP

R1= R2

SH

V

SH

VTP = Desired undervoltage lockout voltage.

= Threshold for lockout on the shutdown pin = 2.45V.

V

SH

If quiescent supply current is critical, R2 may be increased
up to 15k, but the denominator in the formula for R2 should
replace V

with VSH – (10µA)(R2).

SH

Hysteresis in undervoltage lockout may be accomplished
by connecting a resistor (R3) from the I

pin to the shut-

LIM

down pin as shown in Figure 7. D1 prevents the shutdown
divider from altering current limit.

R1

R2
5k

SHUT

V

IN

LT1074

GND

Figure 6. Undervoltage Lockout

V

R1

R2

*1N4148

D1*

R3

IN

SHUT

-5

I

LIM

OPTIONAL CURRENT
LIMIT RESISTOR

Figure 7. Adding Hysteresis

$1)

"/t'

AN44-12

an44fa

PIN DESCRIPTIONS

Application Note 44

Trip Point = VTP= 2.35V 1+

⎛
⎜

⎝

R2

⎞
⎟

⎠

R1

If R3 is added, the lower trip point (VIN descending) will
be the same. The upper trip point (V

R1

R2

R1

⎞

+

R3

–0.8V

⎟

⎠

V

UTP

⎛

= VSH1+

⎜

⎝

) will be:

UTP

⎛
⎜

⎝

R1

R3

⎞
⎟

⎠

If R1 and R2 are chosen, R3 is given by:

V

R3=

–0.8V

()

SH

V

–VSH1+

UTP

()

⎛
⎜

⎝

R1

R1

R2

⎞
⎟

⎠

Example: An undervoltage lockout is required such that
the output will not start until V
to operate until V

R1= 2.32k

()

drops to 15V. Let R2 = 2.32k.

IN

15V – 2.35V

()

= 20V, but will continue

IN

= 12.5k

2.35V

The status pin is modeled in Figure 8 with a 130µA pull­up to a 4.5V clamp level. The sinking drive is a saturated
NPN with ≈100Ω resistance and a maximum sink current
of approximately 5mA. An external pull-up resistor can be
added to increase output swing up to a maximum of 20V.

When the status pin is used to indicate “output OK,” it
becomes important to test for conditions which might
create unwanted status states. These include output
overshoot, large-signal transient conditions, and excessive
output ripple. “False” tripping of the status pin can usu­ally be controlled by a pulse stretcher network as shown
in Figure 8. A single capacitor (C1) will suffice to delay
an output “OK” (status high) signal to avoid false “true”
signals during start-up, etc. Delay time for status high will

4

be approximately (2.3 × 10

) (C1), or 23ms/µF. Status low

delay will be much shorter, ≈600µs/µF.

LT1074

130µA

R3=

20–2.35 1+

2.35 – 0.8

()

12.5

()

⎛

12.5

⎜

⎝

2.32

= 3.9k

⎞
⎟

⎠

STATUS PIN (AVAILABLE ONLY ON LT1176 PARTS)

The status pin is the output of a voltage monitor “looking”
at the feedback pin. It is low for a feedback voltage which
is more than 5% above or below nominal. “Nominal” in
this case means the internal reference voltage, so that the
±5% window tracks the reference voltage. A time delay
of ≈10µs prevents short spikes from tripping the status
low. Once it does go low, a second timer forces it to stay
low for a minimum of ≈30µs.

STATUS

4.5V

100

Figure 8. Adding Time Delays to Status Output

PIN

D1

R1

R2

D2

2k

R3

5V

C1

C2

C3

CMOS

SCHMIDT

TRIGGER

"/t'

an44fa

AN44-13

Application Note 44

PIN DESCRIPTIONS

If false tripping of status low could be a problem, R1
can be added. Delay of status high remains the same if
R1 ≤ 10k. Status low delay is extended by R1 to approxi­mately R1 • C2 seconds. Select C2 for high delay and R1
for low delay.

Example: Delay status high for 10ms, and status low for
3ms:

C2 =

10ms

= 0.47μF Use 0.47µF

()

23ms /µF

3ms

R1=

C2

=

0.47µF

3ms

= 6.4kΩ

In this example D1 is not needed because R1 is small
enough to not limit the charging of C2.

If very fast low tripping combined with long high delays
is desired, use the D2, R2, R3, C3 configuration. C3 is
chosen first to set low delay:

t

LOW

C3 ≈

2kΩ

R3 is then selected for high delay:

t

HIGH

R3≈

For t

C3

= 100µs and t

LOW

= 10ms, C3 = 0.05µF and

HIGH

R3 = 200k.

= I

R

LIM

R

LIM

(2kΩ) + 1kΩ (LT1074)

LIM

= I

(5.5kΩ) + 1kΩ (LT1076)

LIM

As an example, a 3A current limit would require 3A (2k)
+ 1k = 7k for the LT1074. The accuracy of these formulas
is ±25% for 2A ≤ I

1.8A (LT1076), so I

≤ 5A (LT1074) and 0.7A ≤ I

LIM

should be set at least 25% above

LIM

LIM

≤

the peak switch current required.

TO LIMIT
CIRCUIT

R1

8k

V

IN

Q1

I

LIM

Figure 9. I

320µA

D2

D1

Pin Current

LIM

4.3V

D3
6V

"/t'

Foldback current limiting can be easily implemented by
adding a resistor from the output to the I

pin as shown

LIM

in Figure 10. This allows full desired current limit (with or
without R

) when the output is regulating, but reduces

LIM

current limit under short-circuit conditions. A typical value
for R

is 5k, but this may be adjusted up or down to set

FB

the amount of foldback. D2 prevents the output voltage

V

OUT

PIN

I

LIM

The I

pin is used to reduce current limit below the

LIM

preset value of 6.5A. The equivalent circuit for this pin is
shown in Figure 9.

When I

is left open, the voltage at Q1 base clamps at

LIM

5V through D2. Internal current limit is determined by the
current through Q1. If an external resistor is connected
between I

and ground, the voltage at Q1 base can be

LIM

reduced for lower current limit. The resistor will have a
voltage across it equal to (320µA) (R), limited to ≈5V
when clamped by D2. Resistance required for a given
current limit is:

AN44-14

-5

I

LIM

R

LIM

Figure 10. Foldback Current Limit

FB

R

D2

FB

1N4148

"/t'

an44fa

PIN DESCRIPTIONS

Application Note 44

from forcing current back into the I
value for R

RFB=

, first calculate R

FB

0.44*

I

()

−

SC

0.5* RL− 1k Ω

()

LIM

R

()

L

−I

SC

pin. To calculate a

LIM

, then RFB:

= RL inkΩ

*Change 0.44 to 0.16, and 0.5 to 0.18 for LT1076.

Example: I

RFB=

= 4A, ISC = 1.5A, R

LIM

()

1.5−0.44

0.5 9k − 1k

()

9kΩ

()

−1.5

= (4)(2k) + 1k = 9k:

LIM

= 3.8kΩ

ERROR AMPLIFIER

The error amplifier in Figure 11 is a single stage design
with added inverters to allow the output to swing above
and below the common mode input voltage. One side
of the amplifier is tied to a trimmed internal reference
voltage of 2.21V. The other input is brought out as the
FB (feedback) pin. This amplifier has a G

(voltage in to

M

current out) transfer function of ≈5000µmho. Voltage gain
is determined by multiplying G

times the total equivalent

M

output loading, consisting of the output resistance of Q4
and Q6 in parallel with the series RC external frequency
compensation network. At DC, the external RC is ignored,
and with a parallel output impedance for Q4 and Q6 of
400kΩ, voltage gain is ≈2000. At frequencies above a
few hertz, voltage gain is determined by the external
compensation, R

and CC.

C

Although f
mid-frequency gain is dependent only on G

varies as much as 3:1 due to rO variations,

POLE

, which is

M

specified much tighter on the data sheet. The higher fre­quency “zero” is determined solely by R

f

=

ZERO

2π•R

1

• C

C

C

and CC:

C

The error amplifier has asymmetrical peak output cur­rent. Q3 and Q4 current mirrors are unity gain, but the
Q6 mirror has a gain of 1.8 at output null and a gain of 8
when the FB pin is high (Q1 current = 0). This results in a
maximum positive output current of 140µA and a maximum
negative (sink) output current of ≅1.1mA. The asymmetry
is deliberate — it results in much less regulator output
overshoot during rapid start-up or following the release
of an output overload. Amplifier offset is kept low by area
scaling Q1 and Q2 at 1.8:1.

Amplifier swing is limited by the internal 5.8V supply for
positive outputs and by D1 and D2 when the output goes
low. Low clamp voltage is approximately one diode drop
(≈0.7V – 2mV/°C).

Note that both the FB pin and the V

pin have other in-

C

ternal connections. Refer to the frequency shifting and
synchronizing discussions.

5.8V

Q4

G

m

2π• f• C

at mid-frequencies

C

AV=

= Gm• RCat high frequencies

A

V

Phase shift from the FB pin to the VC pin is 90° at mid­frequencies where the external C

is controlling gain, then

C

drops back to 0° (actually 180° since FB is an inverting
input) when the reactance of C

. The low frequency “pole” where the reactance of CC

R

C

is equal to the output impedance of Q4 and Q6 (r

f

=

POLE

2π • r

1

•C

0

r0≈ 400kΩ

is small compared to

C

), is:

O

90µA

Q3

50µA

Q2

Q1

X1.8

2.21V

140µA

"--$633&/544)08/"3&"5/6--$0/%*5*0/

'#

300

Figure 11. Error Amplifier

50µA

D2

90µA

EXTERNAL

D1

V

C

'3&26&/$:

COMPENSATION

90µA

R

Q6

C

C

C

"/t'

an44fa

AN44-15