Linear LT3995 Demo Manual

DEMO MANUAL DC1832A

LT3995

60V, 3A, 2MHz Step-Down

Switching Regulator with

Description

Demonstration circuit 1832A is a monolithic step-down
DC/DC switching regulator featuring the LT3995. The
LT3995 is a compact, high efficiency monolithic step-down
switching regulator that consumes only 2.7μA of quiescent
current. The demo circuit is designed for 3.3V, 3A output
from a 4.3V to 60V input. The switching frequency can be
programmed either via oscillator resistor or external clock
up to 2MHz. To synchronize to an external clock, move
JP2 to SYNC and apply the external clock to the SYNC
turret. The RT resistor (R5) should be chosen to set the
LT3995 internal switching frequency at least 20% below
the lowest synchronization input frequency.

®

Low ripple Burst Mode
ciency at the light load while keeping the output ripple
below 15mV. The SYNC pin on the demo board is grounded
by default by setting JP2 at RT FREQ for low ripple
Burst Mode operation. Figure1 shows the demo board
efficiency at 12V input voltage.

The LT3995 is in shutdown when the EN pin is low and
active when the pin is high. The threshold of the EN pin
is accurate at 1.02V with 60mV of hysteresis. Users can
populate R7 and R8 to provide a programmable under

operation increases the effi-

2.7µA Quiescent Current

voltage lockout. A low dropout voltage of 500mV is main­tained when the input voltage drops below the programmed
output voltage. During a short-circuit fault, the LT3995
has current limit foldback to limit the power dissipation.

The demo board has an EMI filter installed. The EMI
performance of the demo board at 12V input voltage is
shown on Figure 2. The limit in Figure 2 is EN55022 Class
B. The figure shows the circuit passes the test with a wide
margin. To use the EMI filter, the input should be tied to
VEMI not V

The LT3995 data sheet gives a complete description of
the part, operation and application information. The data
sheet must be read in conjunction with this demo manual
for demo circuit 1832A. The LT3995 is assembled in a 16­lead plastic MSOP package with an exposed pad for low
thermal resistance. Proper board layout is essential for
both proper operation and maximum thermal performance.
See the data sheet sections for details.

Design files for this circuit board are available at

http://www.linear.com/demo

L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners.

IN

.

90

85

80

75

70

65

60

EFFICIENCY (%)

55

50

45

40

0

0.5

Figure 1. LT3995 Efficiency vs Load Current,
12VIN to 3.3V

OUT

1.5 2 2.5

1

LOAD CURRENT (A)

Efficiency

dc1832a F01

70

TRACE 1 PASS

60

50

40

30

20

10

0

–10

10dB/DIV LOG, REF 70.00dBµV

–20

3

–30

START 150kHz
RES BW (CISPR) 9kHz

Figure 2. LT3995 Demo Board EMI Performance
(Switching Frequency = 300kHz, VIN = 12V)

VBW 62kHz

STOP 30.00 MHz

SWEEP 717ms (6637pts)

dc1832a F02

dc1832af

1

DEMO MANUAL DC1832A

performance summary

PARAMETER CONDITIONS VALUE

Guaranteed Minimum Input Voltage 4.3V

Maximum Input Voltage 60V

Output Voltage V

Switching Frequency R

Guaranteed Maximum Output Current I

Typical Efficiency V

Typical Output Voltage Ripple V

OUT

OUT

Specifications are at TA = 25°C

VIN = 4.3V ~ 60V 3.275V ± 3%

= 182k 300kHz ± 20%

T

VIN = 4.3V ~ 60V 3A

= 12V, I

IN

= 12V, I

IN

= 3A 82.2%

OUT

= 3A 11mV

OUT

Quick start proceDure

Demonstration circuit 1832A is easy to set up to evalu­ate the performance of the LT3995. Refer to Figure 3
for proper measurement equipment setup and use the
following procedure.

NOTE. When measuring the input or output voltage ripple,
care must be taken to avoid a long ground lead on the
oscilloscope probe. Measure the input or output voltage
ripple by touching the probe tip directly across the V
or V

and GND terminals. See Figure 4 for the proper

OUT

scope technique.

1. Place JP1 on the ON position.

4. With power off, connect load from V

5. Turn on the power at the input.

6. Check for the proper output voltage (3.3V).

NOTE. If there is no output, temporarily disconnect the

load to make sure that the load is not set too high or
is shorted.

IN

7. Once the proper output voltage is established, adjust
the load within the operating ranges and observe the
output voltage regulation, ripple voltage, efficiency and
other parameters.

OUT

to GND.

2. Place JP2 on the RT FREQ position.

3. With power off, connect the input power supply to V
and GND. Make sure that the input voltage does not
exceed 60V.

8. An external clock
when SYNC function is used (JP2 on the SYNC posi­tion). Please make sure that the SYNC frequency is at

IN

least 20% higher than the set switching frequency.
See the data sheet Synchronization section.

can be added to the SYNC terminal

dc1832af

2