0.1Dec. 31. 20126Update LED Power Input Voltage (min)0.0
10Update Timing table0.0
13Update Response Time (G to G)0.0
0.2Jan.16.20136Update Power Supply Input Current (White, Sub 2 dot)0.0
6Update LED Power Input Current0.0
6Update LED Power Consumption0.0
8Update Mating Connector0.0
10Add Signal Timing Specifications Appendix0.0
12Update Power Sequence0.0
13Update Response Time (Max)0.0
16Update Weight (Typ.)0.0
EDID
ver
17Update LCM Front view Cover Shield0.0
21-25Update LCM Label / Packing0.0
0.3FEB. 12, 20136Update Power Consumption0.0
10
12Update Power Sequence0.0
14Update color coordinate0.0
17,18Update LCM Drawing0.0
28-30Update EDID0.0
Update Dclk
0.0
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LP156WHA
Liquid Crystal Display
Product Specification
1. General Description
The LP156WHA is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in
the normally black mode. This TFT-LCD has 15.6 inches diagonally measured active display area with HD
resolution (1366 horizontal by 768 vertical pixel array). Each pixel is divided into Red, Green and Blue subpixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is
determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144
colors. The LP156WHA has been designed to apply the interface method that enables low power, high
speed, low EMI. The LP156WHA is intended to support applications where thin thickness, low power are
critical factors and graphic displays are important. In combination with the vertical arrangement of the subpixels, the LP156WHA characteristics provide an excellent flat display for office automation products such
as Notebook PC.
1
1366
User connector
EEPROM Block
for Tcon Operating
TFT-LCD Panel
30
Pin
eDP
1Lane
VCC
VLED
LED_EN
PWM
Timing Control
Block
DVCC
Power
Block
LED Driver
Block
TCLKs
VGH, VGL, GMA
Control & DataPower
768
DVCC, AVDD
GIP CLKs, DSC
VOUT_LED
FB1~4
(HD, GIP, AH-IPS)
Source Driver
(Bottom)
LED Backlight Ass’y
EDID signal & Power
General Features
Active Screen Size15.6 inches diagonal
Outline Dimension
Pixel Pitch0.252mm X 0.252 mm
Pixel Format1366 horiz. by 768 vert. Pixels RGB strip arrangement
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LP156WHA
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
ParameterSymbol
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
VCC-0.34.0Vdcat 25 r 5qC
TOP050qC1
HST-2060qC1
HOP1090%RH1
HST1090%RH1
Values
UnitsNotes
MinMax
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39
qC Max, and no condensation of water
Note : 2. Storage Condition is guaranteed under packing condition.
90% 80%
60%
Humidity[(%)RH]
Storage
Wet Bulb
Temperature [
60
50
]
40
30
20
10
0
-20
10
20304050
6070800
Dry Bulb Temperature []
Ver. 1.0FEB. 28, 2013
40%
Operation
20%
10%
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LP156WHA
Liquid Crystal Display
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
The LP156WHA requires two power inputs. The first logic is employed to power the LCD electronics and to
drive the TFT array and liquid crystal. The second backlight is the input about LED BL with LED Driver.
Table 2. ELECTRICAL CHARACTERISTICS
Values
ParameterSymbol
MinTypMax
LOGIC :
UnitNotes
Power Supply Input VoltageV
MosaicI
Power Supply Input Current
WhiteI
Sub 2 dotI
Power Consumption
Power Supply Inrush CurrentI
eDP ImpedanceZ
CC3.03.33.6V1
CC-288331mA2
CC-288331mA2
CC_max-415477mA3
CC-0.951.09
P
P
CC
(Sub 2 Dot)
CC_P--1500mA4
eDP85.595104.5Ω5
-1.371.57
W2
BACKLIGHT : ( with LED Driver)
LED Power Input VoltageV
LED Power Input CurrentI
LED Power ConsumptionP
LED Power Inrush CurrentI
LED7.012.021.0V6
LED-342393mA7
LED-4.14.72W7
LED_P--1500mA8
PWM Duty Ratio5-100%9
PWM Jitter
PWM ImpedanceZ
PWM FrequencyF
PWM High Level VoltageV
PWM Low Level VoltageV
LED_EN ImpedanceZ
LED_EN High VoltageV
LED_EN Low VoltageV
LED_EN_H3.0-3.6V
LED_EN_L0-0.3V
-
PWM204060kΩ
PWM200-1000Hz11
PWM_H
PWM_L
PWM204060kΩ
0-0.2%10
3.0-3.6V
0-0.3V
Life Time12,000--Hrs12
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Liquid Crystal Display
Product Specification
Note)
1. The measuring position is the connector of LCM and the test conditions are under 25, fv = 60Hz,
Black pattern.
2. The specified Icc current and power consumption are under
the Vcc = 3.3V , 25, fv = 60Hz condition and Mosaic pattern.
3. This Spec. is the max load condition for the cable impedance designing.
4. The below figures are the measuring Vcc condition and the Vcc control block LGD used.
The Vcc condition is same as the minimum of T1 at Power on sequence.
LP156WHA
Rising time
Vcc
0V
10%
90%
3.3V
0.5ms
5. This impedance value is needed for proper display and measured form eDP Tx to the mating connector.
6. The measuring position is the connector of LCM and the test conditions are under 25.
7. The current and power consumption with LED Driver are under the Vled = 12.0V , 25, Dimming of
Max luminance and White pattern with the normal frame frequency operated(60Hz).
8. The below figures are the measuring Vled condition
and the Vled control block LGD used.
VLED control block is same with Vcc control block.
Rising time
V
LED
90%
12.0V
0V
10%
0.5ms
9. The operation of LED Driver below minimum dimming ratio may cause flickering or reliability issue.
10. If Jitter of PWM is bigger than maximum, it may induce flickering.
11. This Spec. is not effective at 100% dimming ratio as an exception because it has DC level equivalent
to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for
more consistent brightness control at any specific level desired.
12. The life time is determined as the time at which brightness of LCD is 50% compare to that of minimum
value specified in table 7. under general user condition.
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LP156WHA
Liquid Crystal Display
Product Specification
3-2. Interface Connections
This LCD employs two interface connections, a 30 pin connector used for the module electronics interface and
the other connector used for the integral backlight system.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
PinSymbolDescriptionNotes
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NCNo Connection
GNDLCM Ground
NCNo Connection
NCNo Connection
GNDLCM Ground
ML0-Complement Signal-Lane 0
ML0+True Signal-Main Lane 0
GNDLCM Ground
AUX+True Signal-Auxiliary Channel
AUX-Complement Signal-Auxiliary Channel
GNDLCM Ground
VCC
VCC
NCNo Connection
GNDLCM Ground
GNDLCM Ground
HPDHPD signal pin
GNDLCM Ground (LED Backlight Ground)
GNDLCM Ground (LED Backlight Ground)
GNDLCM Ground (LED Backlight Ground)
GNDLCM Ground (LED Backlight Ground)
LED_EN
PWM
NCDDC Clock (LGD P-Vcom Share Pin)
LCD Logic and driver power (3.3V Typ.)
LCD Logic and driver power (3.3V Typ.)
LED Backlight On/Off
System PWM Signal input for dimming
[Interface Chip]
1. LCD :
SiW, Aurora2 (LCD Controller
Including eDP Receiver.
2. System : TBD or equivalent
* Pin to Pin compatible with eDP
[Connector]
JAE, HD2S030HA1
[Mating Connector]
20455-030E-12, I-PEX or equivalent.
[Connector pin arrangement]
ZW
[LCD Module Rear View]
X
25
26
27
28
29
30
Ver. 1.0FEB. 28, 2013
NC
VLED
VLED
VLED
VLED
NCNo Connection
DDC Data (LGD P-Vcom Share Pin)
LED Backlight Power (7V-21V)
LED Backlight Power (7V-21V)
LED Backlight Power (7V-21V)
LED Backlight Power (7V-21V)
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LP156WHA
Liquid Crystal Display
Product Specification
3-3. eDP Signal Timing Specifications
3-3-1. DC Specification
The VESA Display Port related AC specification is compliant with the VESA Display Port Standard v1.1a.
DescriptionSymbolMinMaxUnitNotes
Differential peak-to-peak Input voltage
Rx DC common mode voltageV
VDIFF p-p
120-
mV
40-For reduced bit rate
CM02.0V-
For high bit rate
3-3-2. AC Specification
The VESA Display Port related AC specification is compliant with the VESA Display Port Standard v1.1a.
DescriptionSymbolMinTypMaxUnitNotes
Unit Interval for high bit rate
(2.7Gbps/lane)
Unit Interval for high bit rate
(1.62Gbps/lane)
UI_High_Rate-370-ps
UI_Low_Rate-617-ps
Range is nominal ·350ppm.
DisplayPort Link Rx does not
require local crystal for link
clock generation
Lane-to-Lane skew
Lane intra-pair skew
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V Rx-SKEWINTER_PAIR
V Rx-SKEWINTRA_PAIR
--5200ps-
--100psFor high bit rate
--300psFor reduced bit rate
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