LG Display LP156WF4-SLBA Specification
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()Preliminary Specification
(ଝ) Final Specification
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LP156WF4
Liquid Crystal Display
Product Specification
SPECIFICATION
FOR
APPROVAL
Title 15.6” Full HD TFT LCD
Customer SONY
MODEL SLBA
SIGNATUREAPPROVED BY
/
/
/
SUPPLIER LG Display Co., Ltd.
*MODEL LP156WF4
Suffix SLBA
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
APPROVED BY
J.Y.Lee / S.Manager
REVIEWED BY
REVIEWED BY
C.I.Kim / Manager
PREPARED BY
PREPARED BY
SIGNATURE
SIGNATURE
S. B. Park / Engineer
S. I. Joo / Engineer
Please return 1 copy for your confirmation with
your signature and comments.
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LG Display Co., Ltd
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LP156WF4
Liquid Crystal Display
Product Specification
Contents
No ITEM
COVER
CONTENTS
RECORD OF REVISIONS
1
2
3
3-1
3-2
3-3
3-4
3-5
3-6
GENERAL DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL SPECIFICATIONS
ELECTRICAL CHARACTREISTICS
INTERFACE CONNECTIONS
LVDS SIGNAL TIMING SPECIFICATION
SIGNAL TIMING SPECIFICATIONS
SIGNAL TIMING WAVEFORMS
COLOR INPUT DATA REFERNECE
Page
1
2
3
4
5
6-7
8
9-10
11~12
12
13
3-7
4
5
6 RELIABLITY
7 INTERNATIONAL STANDARDS
7-1 SAFETY
7-2 EMC
7-3 Environment
8 PACKING
8-1 DESIGNATION OF LOT MARK
8-2 PACKING FORM
9 PRECAUTIONS
POWER SEQUENCE
OPTICAL SFECIFICATIONS
MECHANICAL CHARACTERISTICS
A APPENDIX. Enhanced Extended Display Identification Data
14
15-17
18-20
21
22
22
22
23
23
24-25
26-28
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LP156WF4
Liquid Crystal Display
Product Specification
RECORD OF REVISIONS
Revision No Revision Date Page Description
1.0 Jul. 27. 2012 - Final Specification 1.0
EDID
ver
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LP156WF4
Liquid Crystal Display
Product Specification
1. General Description
The LP156WF4 is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in
the normally black mode. This TFT-LCD has 15.5 inches diagonally measured active display area with FHD
resolution (1920 horizontal by 1080 vertical pixel array). Each pixel is divided into Red, Green and Blue subpixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is
determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144
colors. The LP156WF4 has been designed to apply the interface method that enables low power, high
speed, low EMI. The LP156WF4 is intended to support applications where thin thickness, low power are
critical factors and graphic displays are important. In combination with the vertical arrangement of the subpixels, the LP156WF4 characteristics provide an excellent flat display for office automation products such as
Notebook PC.
EEPROM Block
for EDID
1
1920
User connector
EEPROM Block
for Tcon Operating
TFT-LCD Panel
40
Pin
LVDS
2port
VCC
VLED
LED_EN
PWM
Timing Control
(Tcon) Block
DVCC
Power
Block
LED Driver
Block
TCLKs
VGH, VGL, GMA
Control & Data Power
1080
DVCC, AVDD
GSP,GSC,GOE
VOUT_LED
FB1~6
(FHD,AH-IPS)
Source Driver Circuit
LED Backlight Ass’y
EDID signal & Power
General Features
Active Screen Size 15.6 inches diagonal
Outline Dimension
Pixel Pitch 0.17925 mm x 0.17925 mm
Pixel Format 1920 horiz. By 1080 vert. Pixels RGB strip arrangement
Color Depth 6-bit, 262,144 colors
Luminance, White 250 cd/m
Power Consumption Total 6.0 W(Typ.) Logic : 1.5 W (Typ.@ColorBar), B/L : 4.5 W (Typ.@VLED12V)
Weight 330g ( Max.) / 320g ( Typ.)
Display Operating Mode Normally Black
Surface Treatment Anti glare treatment (3H) of the front Polarizer
RoHS Compliance Yes
BFR / PVC / As Free Yes for all
359.5(H, typ.) Ý 207.7(V, typ.) Ý 3.4(D,max) [mm] (with PCB Board)
2
(Typ.5 point)
COG(Chip On Glass)
`
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LP156WF4
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
VCC -0.3 4.0 Vdc at 25 r 5qC
TOP 050qC1
HST -20 60 qC1
HOP 10 90 %RH 1
HST 10 90 %RH 1
Values
Units Notes
Min Max
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39
Note : 2. Storage Condition is guaranteed under packing condition
qC Max, and no condensation of water.
.
90% 80%
60
60%
Wet Bulb
Temperature [
0
-20
]
20
10
10
20 30 40 50
30
50
40
60 70 800
Dry Bulb Temperature []
Ver. 1.0 Jul. 27, 2012
Humidity[(%)RH]
Storage
40%
Operation
20%
10%
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LP156WF4
Liquid Crystal Display
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
The LP156WF4 requires two power inputs. The first logic is employed to power the LCD electronics and to
drive the TFT array and liquid crystal. The second backlight is the input about LED BL with LED Driver.
Table 2. ELECTRICAL CHARACTERISTICS
Values
Parameter Symbol
Min Typ Max
LOGIC :
Unit Notes
Power Supply Input Voltage V
Color Bar I
CC 3.0 3.3 3.6 V 1
CC - 445 515 mA
Power Supply Input Current
White I
Power Consumption Color Bar P
Power Supply Inrush Current I
LVDS Impedance Z
CC - 610 705 mA
CC - 1.5 1.7 W 2
CC_P - - 1500 mA 3
LVDS 90 100 110 Ω 4
BACKLIGHT : ( with LED Driver)
LED Power Input Voltage V
LED Power Input Current I
LED Power Consumption P
LED Power Inrush Current I
LED 7.0 12.0 21.0 V 5
LED - 378 430 mA 6
LED - 4.5 4.8 W 6
LED_P - - 1500 mA 7
PWM Duty Ratio 5 - 100 % 8
PWM Jitter
PWM Impedance Z
-
PWM 20 40 60 kΩ
0 - 0.2 % 9
2
PWM Frequency F
PWM High Level Voltage V
PWM Low Level Voltage V
LED_EN Impedance Z
LED_EN High Voltage V
LED_EN Low Voltage V
PWM 200 - 1000 Hz 10
PWM_H
PWM_L
PWM 20 40 60 kΩ
LED_EN_H 3.0 - 5.3 V
LED_EN_L 0 - 0.3 V
3.0 - 5.3 V
0 - 0.3 V
Life Time 12,000 - - Hrs 11
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Liquid Crystal Display
Product Specification
Note)
1. The measuring position is the connector of LCM and the test conditions are under 25, fv = 60Hz,
Black pattern.
2. The specified Icc current and power consumption
are under the Vcc = 3.3V , 25, fv = 60Hz condition
and Color Bar / White pattern.
[Color Bar pattern] [White pattern]
3. This Spec. is the max load condition for the cable impedance designing.
4. The below figures are the measuring Vcc condition and the Vcc control block LGD used.
The Vcc condition is same as the minimum of T1 at Power on sequence.
LP156WF4
Rising time
Vcc
0V
10%
90%
3.3V
0.5ms
5. This impedance value is needed for proper display and measured form LVDS Tx to the mating connector.
6. The measuring position is the connector of LCM and the test conditions are under 25.
7. The current and power consumption with LED Driver are under the Vled = 12.0V , 25, Dimming of
Max luminance and White pattern with the normal frame frequency operated(60Hz).
8. The below figures are the measuring Vled condition
and the Vled control block LGD used.
VLED control block is same with Vcc control block.
Rising time
V
LED
90%
12.0V
0V
10%
0.5ms
9. The operation of LED Driver below minimum dimming ratio may cause flickering or reliability issue.
10. If Jitter of PWM is bigger than maximum, it may induce flickering.
11. This Spec. is not effective at 100% dimming ratio as an exception because it has DC level equivalent
to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for
more consistent brightness control at any specific level desired.
12. The life time is determined as the time at which brightness of LCD is 50% compare to that of minimum
value specified in table 7. under general user conditionU
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LP156WF4
Liquid Crystal Display
Product Specification
3-2. Interface Connections
This LCD employs two interface connections, a 40 pin connector used for the module electronics interface and
the other connector used for the integral backlight system.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
Pin Symbol Description Notes
1 VCC LCD Logic and driver power (3.3V Typ.)
2 VCC LCD Logic and driver power (3.3V Typ.)
3 VCC LCD Logic and driver power (3.3V Typ.)
4 V EEDID DDC Power (3.3V)
5 NC No Connection
6 Clk EEDID DDC Clock
7 DATA EEDID DDC Data
8 ORX0- Negative LVDS differential data input
9 ORX0+ Positive LVDS differential data input
10 GND High Speed Ground
11 ORX1- Negative LVDS differential data input
12 ORX1+ Positive LVDS differential data input
13 GND High Speed Ground
14 ORX2- Negative LVDS differential data input
15 ORX2+ Positive LVDS differential data input
16 GND High Speed Ground
17 ORXC- Negative LVDS differential clock input
18 ORXC+ Positive LVDS differential clock input
19 GND High Speed Ground
20 ERX0- Negative LVDS differential data input
21 ERX0+ Positive LVDS differential data input
19 GND High Speed Ground
23 ERX1- Negative LVDS differential data input
24 ERX1+ Positive LVDS differential data input
19 GND High Speed Ground
26 ERX2- Negative LVDS differential data input
27 ERX2+ Positive LVDS differential data input
19 GND High Speed Ground
29 ERXC- Negative LVDS differential clock input
30 ERXC+ Positive LVDS differential clock input
31
32
33
34 NC No Connection
35
36
37
38
39
40
GND LED Backlight Ground
GND LED Backlight Ground
GND LED Backlight Ground
PWM System PWM Signal input for dimming
LED_EN
NC
VLED LED Backlight Power (7V-21V)
VLED LED Backlight Power (7V-21V)
VLED LED Backlight Power (7V-21V)
LED Backlight On/Off
No Connection
[Interface Chip]
1. LCD :
SiW, SW 0636A (LCD Controller)
Including LVDS Receiver.
2. System : SiW LVDSRx or equivalent
* Pin to Pin compatible with LVDS
[Connector]
UJU IS050-L40B-C10
LSMtron GT05Q-40S-H10 or equivalent
[Mating Connector]
20345-#40E-## series or equivalent
[Connector pin arrangement]
[W
[LCD Module Rear View]
X
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Product Specification
3-3. LVDS Signal Timing Specifications
3-3-1. DC Specification
LVDS -
|VID|
LVDS +
LP156WF4
Liquid Crystal Display
#|VID| = |(LVDS+) ˀ (LVDS-)|
= {(LVDS+) + (LVDS-)}/2
#V
0V
CM
Description
LVDS Differential Voltage |V
LVDS Common mode Voltage V
LVDS Input Voltage Range V
3-3-2. AC Specification
LVDS Clock
LVDS Data
t
SKEW
Symb
ol
| 100 600 mV -
ID
CM
IN
t
SKEW(Fclk
1) 85MHz > Fclk ˻ 65MHz : -400 ~ +400
2) 65MHz > Fclk ˻ 25MHz : -600 ~ +600
=1/T
Min Max Unit Notes
0.6 1.8 V -
0.3 2.1 V -
T
clk
)
clk
V
CM
V
IN_MAXVIN_MIN
Description Symbol Min Max Unit Notes
t
SKEW
- 400 + 400 ps
85MHz > Fclk ≥
LVDS Clock to Data Skew Margin
t
SKEW
LVDS Clock to Clock Skew Margin (Even
to Odd)
Maximum deviation
of input clock frequency during SSC
Maximum modulation frequency
of input clock during SSC
t
SKEW_EO
F
DEV
F
MOD
Ver. 1.0 Jul. 27, 2012
- 600 + 600 ps
- 1/7 + 1/7 T
-
· 3
clk
%-
- 200 KHz -
65MHz > Fclk ≥
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65MHz
25MHz
-
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