LG Display LP156WF4-SLB6 Specification

Product Specification

LP156WF4

Liquid Crystal Display

Ver. 1.0 Feb. 21, 2012

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Product Specification

GENERAL DESCRIPTION

LVDS SIGNAL TIMING SPECIFICATION

OPTICAL SFECIFICATIONS

7-2

EMC

9

PRECAUTIONS

Contents

LP156WF4

Liquid Crystal Display

No ITEM

COVER

CONTENTS

RECORD OF REVISIONS

1

2

3

4

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL SPECIFICATIONS

ELECTRICAL CHARACTREISTICS

3-1

INTERFACE CONNECTIONS

3-2

3-3

SIGNAL TIMING SPECIFICATIONS

3-4

SIGNAL TIMING WAVEFORMS

3-5

COLOR INPUT DATA REFERNECE

3-6

POWER SEQUENCE

3-7

Page

1

2

3

4

5

6-7

8

9-10

11

11

12

13

14-16

5

6 RELIABLITY

7 INTERNATIONAL STANDARDS

8 PACKING

Ver. 1.0 Feb. 21, 2012

MECHANICAL CHARACTERISTICS

7-1 SAFETY

7-3 Environment

8-1 DESIGNATION OF LOT MARK

8-2 PACKING FORM

A APPENDIX. Enhanced Extended Display Identification Data

17-19

20

21

21

21

22

22

23-24

25-27

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Product Specification

RECORD OF REVISIONS

LP156WF4

Liquid Crystal Display

Revision No Revision Date Page Description

1.0 Feb. 21. 2012 - Final Specification 1.0

EDID

ver

Ver. 1.0 Feb. 21, 2012

3/ 27

LP156WF4

qypygg

y

pixels

theLP156WF4

characteristics

provide

an

excellent

flat

display

for

office

automation

products

such

as

e

h

TFT-LCD P

l

e

h

Acti

15.6 inch

Weight

330g ( Max.) / 320g ( Typ.)

Liquid Crystal Display

Product Specification

1. General Description

The LP156WF4 is a ColorActive Matrix Liquid Crystal Displaywith an integral LED backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in
the normally black mode. This TFT-LCD has 15.6 inches diagonally measured active display area with FHD
resolution (1920 horizontal by 1080 vertical pixel array). Each pixel is divided into Red, Green and Blue sub­pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is
determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144
colors. The LP156WF4 has been designed to apply the interface method that enables low power, high
speed, low EMI. The LP156WF4 is intended to support applications where thin thickness, low power are
critical factors and graphic displays are important. In combination with the vertical arrangement of the sub-

,

Notebook PC.

EEPROM Block

for EDID

COG(C

`

Us

EEPROM Block

for Tcon Operating

1

1920

r connector

LVDS

2port

40

Pin

VCC

VLED

LED_EN

PWM

Timing Control

(Tcon) Block

DVCC

Power

Block

LED Driver

Block

TCLKs

DVCC, AVDD

VGH, VGL, GMA

GSP,GSC,GOE

VOUT_LED

FB1~6

Control & Data Power

(FHD,AH-IPS)

1080

Source Driver Circuit

LED Backlight Ass’y

EDID signal & Power

ane

General Features

ve Screen Size

Outline Dimension

Pixel Pitch 0.17925 mm x 0.17925 mm

Pixel Format 1920 horiz. By 1080 vert. Pixels RGB strip arrangement

Color Depth 6-bit, 262,144 colors

Luminance, White 250 cd/m

Power Consumption Total 6.0 W(Typ.) Logic : 1.4 W (Typ.@ Mosaic), B/L : 4.6 W (Typ.@VLED12V)

359.5(H, typ.) × 224.1(V, typ.) × 3.4(D,max) [mm] (with Bracket & PCB Board)

es diagonal

2

(Typ.5 point)

ip On Glass)

Display Operating Mode Normally Black

Surface Treatment Anti glare treatment (3H) of the front Polarizer

RoHS Compliance Yes

BFR / PVC / As Free Yes for all

Ver. 1.0 Feb. 21, 2012

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LP156WF4

Liquid Crystal Display

Product Specification

2. Absolute Maximum Ratings

The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Symbol

Power Input Voltage

Operating Temperature

Storage Temperature

Operating Ambient Humidity

Storage Humidity

VCC -0.3 4.0 Vdc at 25  5C

TOP 050C1

HST -20 60 C1

HOP 10 90 %RH 1

HST 10 90 %RH 1

Values

Units Notes

Min Max

Note : 1. Temperature and relative humidity range are shown in the figure below.

Wet bulb temperature should be 39

Note : 2. Storage Condition is guaranteed under packing condition

Wet Bulb
Temperature [℃]

C Max, and no condensation of water.

.

90% 80%

60

50

40

60%

Humidity[(%

40%

Storage

30

20

10

0

-20

10

20 30 40 50

60 70 800

Dry Bulb Temperature [℃]

Ver. 1.0 Feb. 21, 2012

20%

10%

)RH]

Operation

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LP156WF4

3-1. Electrical Characteristics

LVDS I

Z

90

100

110Ω4

LED Power Inrush Current

I

LED_P

1500

mA

7

g

gg

PWM_H

Liquid Crystal Display

Product Specification

3. Electrical Specifications

The LP156WF4 requires two power inputs. The first logic is employed to power the LCD electronics and to

drive the TFT array and liquid crystal. The second backlight is the input about LED BL with LED Driver.

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol

Unit Notes

Min Typ Max

LOGIC :

Values

Power Supply Input Voltage V

Power Supply Input Current Mosaic I

Power Consumption P

Power Supply Inrush Current I

mpedance

CC 3.0 3.3 3.6 V 1

CC - 430 495 mA 2

CC -1.41.6W2

CC_P - - 1500 mA 3

LVDS

BACKLIGHT : ( with LED Driver)

LED Power Input Voltage V

LED Power Input Current I

LED Power Consumption P

LED 6.0 12.0 21.0 V 5

LED - 385 424 mA 6

LED -4.65.1W6

--

PWM Duty Ratio 5 - 100 % 8

PWM Jitter

PWM Impedance Z

-

PWM 20 40 60 kΩ

0-0.2%9

PWM Frequency F

PWM Hi

h Level VoltageV

PWM Low Level Voltage V

LED_EN Impedance Z

LED_EN High Voltage V

LED_EN Low Voltage V

Life Time 12,000 - - Hrs 11

Ver. 1.0 Feb. 21, 2012

PWM 200 - 1000 Hz 10

3.0 - 5.3 V

PWM_L

PWM 20 40 60 kΩ

LED_EN_H 3.0 - 5.3 V

LED_EN_L 0-0.3V

0-0.3V

6/ 27

Liquid Crystal Display

3. This Spec. is the max load condition for the cable impedance designing

V

p

pgpq

Product Specification

Note)

1. The measuring position is the connector of LCM and the test conditions are under 25℃, fv = 60Hz,

Black pattern.

2. The specified Icc current and power consumption are under

the Vcc = 3.3V , 25℃, fv = 60Hz condition and Mosaic pattern.

.

4. The below figures are the measuring Vcc condition and the Vcc control block LGD used.
The Vcc condition is same as the minimum of T1 at Power on sequence.

LP156WF4

Rising time
Vcc

0V

10%

90%

3.3V

0.5ms

5. This impedance value is needed for proper display and measured form LVDS Tx to the mating connector.

6. The measuring position is the connector of LCM and the test conditions are under 25℃.

7. The current and power consumption with LED Driver are under the Vled = 12.0V , 25℃, Dimming of

Max luminance and White pattern with the normal frame frequency operated(60Hz).

8. The below figures are the measuring Vled condition
and the Vled control block LGD used.
VLED control block is same with Vcc control block.

Rising time

LED

0V

10%

90%

12.0V

0.5ms

9. The operation of LED Driver below minimum dimming ratio may cause flickering or reliability issue.

10. If Jitter of PWM is bigger than maximum, it may induce flickering.

11. This S

ec. is not effective at 100% dimming ratio as an exception because it has DC level equivalent
to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for
more consistent brightness control at any specific level desired.

12. The life time is determined as the time at which brightness of LCD is 50% compare to that of minimum

value specified in table 7. under general user condition.

Ver. 1.0 Feb. 21, 2012

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Product Specification

This LCD employs two interface connections, a 40 pin connector used for the module electronics interface and

Includi

LVDS R

20453

040T-##

12

ORX1+

Positive LVDS differential data input

g

gp

37NCNo Connection

3-2. Interface Connections

the other connector used for the integral backlight system.

Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)

Pin Symbol Description Notes

1 NC No Connection

2 VCC LCD Logic and driver power (3.3V Typ.)

3 VCC LCD Logic and driver power (3.3V Typ.)

4 V EEDID DDC Power (3.3V)

5 NC No Connection

6 Clk EEDID DDC Clock

7 DATA EEDID DDC Data

8 ORX0- Negative LVDS differential data input

9 ORX0+ Positive LVDS differential data input

10 GND High Speed Ground

11 ORX1- Negative LVDS differential data input

13 GND High Speed Ground

14 ORX2- Negative LVDS differential data input

15 ORX2+ Positive LVDS differential data input

16 GND High Speed Ground

17 ORXC- Negative LVDS differential clock input

18 ORXC+ Positive LVDS differential clock input

19 GND High Speed Ground

20 ERX0- Ne

21 ERX0+ Positive LVDS differential data input

19 GND High Speed Ground

23 ERX1- Negative LVDS differential data input

24 ERX1+ Positive LVDS differential data input

19 GND High Speed Ground

26 ERX2- Negative LVDS differential data input

27 ERX2+ Positive LVDS differential data input

19 GND High Speed Ground

29 ERXC- Negative LVDS differential clock input

30 ERXC+ Positive LVDS differential clock input

31

32

33

34 NC No Connection

35

36

GND LED Backlight Ground

GND LED Backlight Ground

GND LED Backlight Ground

PWM System PWM Signal input for dimming

LED_EN

ative LVDS differential data input

LED Backlight On/Off

[Interface Chip]

1. LCD :
SiW, SW0636A (LCD Controller)

ng

2. System : SiW LVDSRx or equivalent

* Pin to Pin compatible with LVDS

[Connector]

UJU IS050-L40B-C10
LSMtron GT05Q-40S-H10 or equivalent

[Mating Connector]

-

[Connector pin arrangement]

40

series or equivalent

[LCD Module Rear View]

LP156WF4

Liquid Crystal Display

eceiver.

1

38

39

40

VLED LED Backlight Power (12V Typ.)

VLED LED Backlight Power (12V Typ.)

VLED LED Backlight Power (12V Typ.)

Ver. 1.0 Feb. 21, 2012

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Product Specification

F

±

3

%

3-3. LVDS Signal Timing Specifications

3-3-1. DC Specification

LP156WF4

Liquid Crystal Display

Description

LVDS Differential Voltage |V

LVDS Common mode Voltage V

LVDS Input Voltage Range V

3-3-2. AC Specification

Description Symbol Min Max Unit Notes

LVDS Clock to Data Skew Margin

Symb

ol

| 100 600 mV -

ID

CM

IN

t

SKEW

t

SKEW

Min Max Unit Notes

0.6 1.8 V -

0.3 2.1 V -

- 400 + 400 ps

- 600 + 600 ps

85MHz > Fclk ≥

65MHz > Fclk ≥

65MHz

25MHz

LVDS Clock to Clock Skew Margin (Even
to Odd)

t

SKEW_EO

Maximum deviation

F

DEV

MOD

of input clock frequency during SSC

Maximum modulation frequency
of input clock during SSC

Ver. 1.0 Feb. 21, 2012

-1/7 + 1/7 T

clk

-

- 200 KHz -

-

-

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