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Product Specification
RECORD OF REVISIONS
LM230WF2
Liquid Crystal Display
Revision
No
0.0May. 22. 2009-First Draft(Preliminary)
1.0Mar. 04. 206,7,8Update Electrical specification format
Revision DatePageDescription
9,10Update note of Interface connection
12Delete LVDS 1port data format
14Update Signal timing specification
15Update Signal timing waveforms
18Add V
19,20,21Update optical specification
25Update Mechanical characteristics
28Update Environment test condition
29Update International Standards
30,31,32Update Packing form
33Update operation precautions
-Final Specification
Power Dip condition
LCD
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LM230WF2
Liquid Crystal Display
Product Specification
1. General Description
LM230WF2 is a Color Active Matrix Liquid Crystal Display with anintegral Cold Cathode Fluorescent
Lamp(CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 23inch diagonally measured
active display area with WUXGA resolution (1080 vertical by 1920horizontal pixel array)
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the brightness of the sub-pixel color is determined with a 8-bit gray scale signal for each dot,
thus, presenting a palette of more than 16,7M(True) colors.
Ithas been designed to apply the 8Bit 2 port LVDS interface.
It is intended to support displays where high brightness, super wide viewing angle,
high color saturation, and high color are important.
RGB, Dclk, DE
Hsync, Vsync
(LVDS 2 port)
V
(+12V)
LCD
CN1
(30pin)
Timing Control
Block
Gate Driver circuit
Power Circuit Block
V
V
Lamp
Lamp
CN2, 3(2PIN)
Backlight Assembly(4 CCFL)
CN4, 5(2PIN)
General Features
Active Screen Size23 inches(58.42cm) diagonal
Outline Dimension533.2(H) x 312.0(V) x 17.0(D) mm(Typ.)
Pixel Pitch0.265 mm x 0.265 mm
Source Driver Circuit
S1920S1
G1
TFT-LCD Panel
(1920 × 1080 pixels)
G1080
Pixel Format1920 horiz. By 1080 vert. Pixels RGB stripes arrangement
Color Depth8-bit, 16,777,216 colors
Luminance, White300cd/m
2
( Center 1 points)
Viewing Angle(CR>10)View Angle Free (R/L 178(Typ.), U/D 178(Typ.))
Power ConsumptionTotal 31.86 Watt (Typ.) ( 6.36 Watt @VLCD, 25.5 Watt @300cd/㎡])
Weight3,000 g (Typ.)
Display Operating ModeTransmissive mode, normally black
Surface TreatmentHard coating(3H), Glare(Low Reflection treatment of the front polarizer)
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LM230WF2
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
ParameterSymbol
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
VLCD-0.314Vdcat 25 ± 2°C
TOP050
TST-2060
HOP1090%RH
HST1090%RH
Values
UnitsNotes
MinMax
°C
°C
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39 °C Max, and no condensation of water.
Note : 2. Maximum Storage Humidity is up to 40℃, 70% RH only for 4 corner light leakage Mura.
90%
60
60%
Wet Bulb
Temperature [C]
10
0
20
30
40
50
40%
Humidity [(%)RH]
10%
Storage
Operation
1, 2
10203040506070800-20
Dry Bulb Temperature [C]
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It requires two power inputs. One is employed to power the LCD electronics and to drive the TFT array and
liquid crystal. The second input power for the CCFL, is typically generated by an inverter. The inverter is an
external unit to the LCDs.
Table 2. ELECTRICAL CHARACTERISTICS
ParameterSymbol
MODULE :
Power Supply Input VoltageVLCD11.41212.6Vdc
Permissive Power Input RippleVRF--400mV13
Power Supply Input CurrentILCD
Differential Impedance
Power Consumption
Rush currentIRUSH--3A3
LAMP :
Operating VoltageVBL
Operating CurrentIBL
Established Starting VoltageVs4, 6
at 25 °C
at 0 °C
Operating FrequencyfBL
Discharge Stabilization TimeTs
Power ConsumptionPBL
Life Time
Zm
PLCD-6.637.32Watt1
PLCD-8.549.83Watt2
MinTypMax
-530610mA1
-712819mA2
-100110
8308501000
3.07.58.0
406070
50,000
Values
25.528.1
1500
1800
3
UnitNotes
ohm
V
RMS
mA
RMS
V
RMS
V
RMS
kHz7
Min4, 8
Watt9
Hrs4, 10
4, 5
4
Note : The design of the inverter must have specifications for the lamp in LCD Assembly.
The performance of the Lamp in LCM, for example life time or brightness, is extremely influenced by
the characteristics of the DC-AC inverter. So all the parameters of an inverter should be carefully
designed so as not to produce too much leakage current fromhigh-voltage output of the inverter.
When you design or order the inverter, please make sure unwanted lighting caused by the mismatch
of the lamp and the inverter (no lighting, flicker, etc) never occurs. When you confirm it, the LCD–
Assembly should be operated in the same condition as installed in you instrument.
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LM230WF2
Liquid Crystal Display
Product Specification
Note. Do not attach a conducting tape to lamp connecting wire. If the lamp wire attach to a conducting tape,
TFT-LCD Module has a low luminance and the inverter has abnormal action. Because leakage current
is occurred between lamp wire and conducting tape.
1. The specified current and power consumption are under theV
whereas mosaic pattern(8 x 6) is displayed and fVis the frame frequency.
2. The current is specified at the maximum current pattern.See the figure 3.
3. The duration of rush current is about 5ms and rising timeof power Input is 500us ± 20%.(min.).
4. Specified values are for a single lamp.
5. Operating voltage is measured at 25 ± 2°C, and follows as below condition.
The variance of the voltage is ± 10%. (Based on single Lamp.)
The variance of the voltage is ± 20%. (Based on system & Test equipment tolerance.)
6. The voltage above VSshould be applied to the lamps for more than 1 second for start-up.
(Inverter open voltage must be more than lamp startingvoltage.)
Otherwise, the lamps may not be turned on. The used lamp current is the lamp typical current.
7. The output of the inverter must have symmetrical(negativeand positive) voltage waveform and
symmetrical current waveform (Unsymmetrical ratio is less than 10%). Please do not use the inverter
which has unsymmetrical voltage and unsymmetrical current and spike wave.
Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may
cause beat on the display. Therefore lamp frequency shall be as away possible from the horizontal
synchronous frequency and from its harmonics in order to prevent interference.
8. Let’s define the brightness of the lamp after being lighted for 5 minutes as 100%.
TSis the time required for the brightness of the center of the lamp to be not less than 95%.
The used lamp current is the lamp typical current.
9. The lamp power consumption shown above does not include loss of external inverter.
The used lamp current is the lamp typical current. (PBL= VBLx IBLx N
10. The life is determined as the time at which brightness of the lamp is 50% compared to that of initial
value at the typical lamp current on condition of continuous operating at 25 ± 2°C.
11. Requirements for a system inverter design, which is intended to have a better display performance,
a better power efficiency and a more reliable lamp, are following.
It shall help increase the lamp lifetime and reduce leakagecurrent.
a. The asymmetry rate of the inverter waveform should be less than 10%.
b. The distortion rate of the waveform should be within √2 ±10%.
* Inverter output waveform had better be more similar to ideal sine wave.
=12V, 25 ± 2°C,fV=60Hz condition
LCD
)
Lamp
* Asymmetry rate:
I p
| I p– I –p| / I
* Distortion rate
I -p
I p(or I –p) / I
12. The inverter which is combined with this LCM, is highly recommended to connect coupling(ballast)
condenser at the high voltage output side. When you use the inverter which has not coupling(ballast)
condenser, it may cause abnormal lamp lighting becauseof biased mercury as time goes.
13. Permissive power ripple should be measured under V
=12.0V, 25°C, fV(frame frequency)=MAX
LCD
conditionand At that time, we recommend the bandwidth configuration of oscilloscope is to be under
20Mhz. See the figure 3.
14. In case of edgy type back light with over 4 parallel lamps, input current and voltage wave form should
be synchronized
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rms
rms
x 100%
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Product Specification
LM230WF2
Liquid Crystal Display
• Permissive Power input ripple (V
White pattern
• Power consumption (V
=12V, 25°C, fV (frame frequency=60Hz condition)
LCD
=12.0V, 25°C, fV(frame frequency)=MAX condition)
LCD
Black pattern
Typical power Pattern
Maximum power Pattern
[ Figure 3 ] Mosaic pattern & White Pattern for power consumption measurement
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Liquid Crystal Display
Product Specification
3-2. Interface Connections
3-2-1. LCD Module
-LCD Connector(CN1). : KDF71G-30S-1H, (Manufactured by Hirose ), IS100-L30B-C23(UJU)
-Mating Connector : FI-X30C2L (Manufactured by JAE) or Equivalent
Table 3 MODULE CONNECTOR(CN1) PIN CONFIGURATION
NoSymbolDescriptionNoSymbolSymbol
LM230WF2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
FR0M
FR0P
FR1M
FR1P
FR2M
FR2P
GND
FCLKINM
FCLKINP
FR3M
FR3P
SR0M
SR0P
GND
SR1M
Minus signal of odd channel 0 (LVDS)
Plus signal of odd channel 0 (LVDS)
Minus signal of odd channel 1 (LVDS)
Plus signal of odd channel 1 (LVDS)
Minus signal of odd channel 2 (LVDS)
Plus signal of odd channel 2 (LVDS)
Ground
Minus signal of odd clock channel (LVDS)
Plus signal of odd clock channel (LVDS)
Minus signal of odd channel 3 (LVDS)
Plus signal of odd channel 3 (LVDS)
Minus signal of even channel 0 (LVDS)
Plus signal of even channel 0 (LVDS)
Ground
Minus signal of even channel 1 (LVDS)
16
SR1P
17
GND
18
SR2M
19
SR2P
SCLKIN
20
M
21
SCLKINP
22
SR3M
23
SR3P
24
GND
25
NC
26
NC
PWM_OUT For Control Burst frequency of Inverter
27
28
VLCD
29
VLCD
30
VLCD
Plus signal of even channel 1 (LVDS)
Ground
Minus signal of even channel 2 (LVDS)
Plus signal of even channel 2 (LVDS)
Minus signal of even clock channel (LVDS)
Plus signal of even clock channel (LVDS)
Minus signal of even channel 3 (LVDS)
Plus signal of even channel 3 (LVDS)
Ground
No Connection (I2C Serial interface for LCM)
No Connection.(I2C Serial interface for LCM)
Power Supply +12.0V
Power Supply +12.0V
Power Supply +12.0V
Note: 1. All GND(ground) pins should be connected together and to Vss which should also be connected to
the LCD’s metal frame.
2. All VLCD (power input) pins should be connected together.
3. Input Level of LVDS signal is based on the IEA 664Standard.
4. PWM_OUT signal controls the burst frequency of a inverter.
This signal is synchronized with vertical frequency.
It’s frequency is 3 times of vertical frequency, and it’s duty ratio is 50%.
If you don’t use this pin, it is no connection.
[ Figure 4 ] Connector diagram
KDF71G-30S-1H
#1#30
#1#30
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Rear view of LCM
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Liquid Crystal Display
Product Specification
Table 4. REQUIRED SIGNAL ASSIGNMENT FOR Flat Link (TI:SN75LVDS83) Transmitter
Pin #Require SignalPin NamePin #Require SignalPin Name
1Power Supply for TTL InputVCC29Ground pin for TTLGND
2TTL Input (R7)D530TTL Input (DE)D26
3TTL Input (R5)D631TTL Level clock InputTXCLKIN
4TTL Input (G0)D732Power Down InputPWR DWN
5Ground pin for TTLGND33Ground pin for PLLPLL GND
6TTL Input (G1)D834Power Supply for PLLPLL VCC
7TTL Input (G2)D935Ground pin for PLLPLL GND
8TTL Input (G6)D1036Ground pin for LVDSLVDS GND
9Power Supply for TTL InputVCC37Positive LVDS differential data output 3TxOUT3+
10TTL Input (G7)D1138Negative LVDS differential data output 3TxOUT3-
LM230WF2
11TTL Input (G3)D1239Positive LVDS differential clock outputTXCLKOUT+
12TTL Input (G4)D1340Negative LVDS differential clock outputTXCLKOUT-
13Ground pin for TTLGND41Positive LVDS differential data output 2TXOUT2+
14TTL Input (G5)D1442Negative LVDS differential data output 2TXOUT2-
15TTL Input (B0)D1543Ground pin for LVDSLVDS GND
16TTL Input (B6)D1644Power Supply for LVDSLVDS VCC
17Power Supply for TTL InputVCC45Positive LVDS differential data output 1TXOUT1+