LG Display LM201U05-SLM1 Specification

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LM201U05
Liquid Crystal Display
Product Specification
FOR
APPROVAL
Title 20.1” UXGA TFT LCD
BUYER NDS
MODEL
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
/
/
SIGNATURE
DATE
APPROVED BY
Hans. Kim / G.Manager
REVIEWED BY
C. K. Lee / Manager [C]
J. H. Lee / Manager [M]
LG Display Co., Ltd.SUPPLIER
LM201U05*MODEL
SLM1SUFFIX
SIGNATURE
DATE
G.T. Kim / Manager [P]
PREPARED BY
/
C.W. Lim / Engineer
Please return 1 copy for your confirmation with
your signature and comments.
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LM201U05
Liquid Crystal Display
Product Specification
Contents
No ITEM
COVER
CONTENTS
RECORD OF REVISIONS 3
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS
3-1 ELECTRICAL CHARACTREISTICS
3-2 INTERFACE CONNECTIONS
3-3 SIGNAL TIMING SPECIFICATIONS
3-4 SIGNAL TIMING WAVEFORMS
3-5 COLOR INPUT DATA REFERNECE
3-6 POWER SEQUENCE
4 OPTICAL SFECIFICATIONS
Page
1
2
4
5
6
6
9
16
17
18
19
20
5 MECHANICAL CHARACTERISTICS
6 RELIABILITY
7 INTERNATIONAL STANDARDS
7-1 SAFETY
7-2 EMC
7-3 ENVIRONMENT 29
8 PACKING
8-1 DESIGNATION OF LOT MARK
8-2 PACKING FORM 31
8-3 PALLET FORM 32
9 PRECAUTIONS 33
25
28
29
29
29
30
30
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RECORD OF REVISIONS
Revision No Revision Date Page DESCRIPTION
0.0 Apr. 02. 2008 - Preliminary Specification
1.0 Jun. 02. 2008 - Final specification
10 Change CN1 specification
15 Change CNTs order
20,22 Updated GTG(max) spec, TCO’03 Spec & Comment
25 Updated Outline Dimension specification
27 Updated the Rear view Drawing
LM201U05
Liquid Crystal Display
28 Updated Vibration Test specification
29 Changed the RoHS sentence
30,31, 32 Updated Packing Form, Pallet Form
1.1 July. 17. 2008 31 Updated Packing Form
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LM201U05
Liquid Crystal Display
Product Specification
1. General Description
LM201U05-SLM1 is a Color Active Matrix Liquid Crystal Display with an integral Cold Cathode Fluorescent Lamp(CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in the normally black mode. It has a 20.1 inch diagonally measured active display area with UXGA resolution (1200 vertical by 1600 horizontal pixel array) Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is determined with a 8-bit gray scale signal for each dot, thus, presenting a palette of more than 16,7M(True) colors. It has been designed to apply the 8Bit 2 port LVDS interface. It is intended to support displays where high brightness, super wide viewing angle, high color saturation, and high color are important.
RGB, Dclk, DE Hsync, Vsync
(LVDS 2 port)
(+20V)
V
LCD
CN1
(30pin)
Timing Control
Block
Power Circuit Block
V V
Lamp
Lamp
CN2(5PIN), 3(2PIN)
Backlight Assembly(6 CCFL)
CN4(2PIN), 5(5PIN)
General Features
Active Screen Size 20.1 inches(510.54mm) diagonal
Outline Dimension 432.0(H) x 331.5(V) x 25.0(D) mm(Typ.)
Gate Driver circuit
G1200
Source Driver Circuit
S1600S1
G1
TFT-LCD Panel
(1600 u 1200 pixels)
Pixel Pitch 0.255mm x 0.255mm
Pixel Format 1600 horizontal By 1200 vertical Pixels RGB stripe arrangement
Color Depth 8bit, 16,7 M colors
Luminance, White 300 cd/m2(Center 1 point, Typ.)
Viewing Angle (CR>10) Viewing Angle Free ( R/L 178(Typ.), U/D 178(Typ) )
Power Consumption Total 35.38 Watt(Typ.) (5.98 Watt@VLCD, 29.4 Watt@300cd/[LAMP=7mA])
Weight 3200 g (Typ.)
Display Operating Mode Transmissive mode, normally black
Surface Treatment Hard coating (3H), Anti-glare treatment of the front polarizer
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2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
LM201U05
Parameter
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
VLCD -0.3 23.0 Vdc GY\Gr YG¶j
TOP 0 50
TST -20 60
HOP 10 90 %RH 1
HST 10 90 %RH 1
Values
Units
Min Max
C
C
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39 C Max, and no condensation of water.
ڔڋڀ
NotesSymbol
1
1
ڑڋ
ڐڋ
ڲۀۏٻڝېۇڽ گۀۈۋۀۍڼۏېۍۀٻڶڞڸ
ڏڋ
ڎڋ
ڍڋ
ڌڋ
ڋ
ڌڋ ڍڋ ڎڋ ڏڋ ڐڋ ڑڋ ڒڋ ړڋڋڈڍڋ
ڟۍ۔ٻڝېۇڽٻگۀۈۋۀۍڼۏېۍۀٻڶڞڸ
Ver. 1.1 July. 17. 2008
ڑڋڀ
ڏڋڀ
ڌڋڀ
ڮۏۊۍڼۂۀ
ڪۋۀۍڼۏۄۊۉ
ڣېۈۄڿۄۏ۔ٻڶڃڀڄڭڣڸ
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LM201U05
Liquid Crystal Display
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power the LCD electronics and to drive the TFT array and liquid crystal. The second input power for the CCFL, is typically generated by an inverter. The inverter is an external unit to the LCDs.
Table 2_1. ELECTRICAL CHARACTERISTICS
Values
Parameter Symbol
Min Typ Max
Unit Notes
MODULE :
Power Supply Input Voltage VLCD 17V 18V 19V Vdc
Power Supply Input Current ILCD
Power Consumption PLCD - 5.98 6.88 Watt 1
Rush current IRUSH - - 3 A 3
- 332 382 mA 1
- 419 481 mA 2
Note :
1. The specified current and power consumption are under the V whereas mosaic pattern(8 x 6) is displayed and f
is the frame frequency.
V
=18.0V, 25 r 2C,fV=60Hz condition
LCD
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power Input is 1ms(min.).
White : 255Gray
Maximum current pattern
Black : 0Gray
Mosaic Pattern(8 x 6)
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Table 2_2. ELECTRICAL CHARACTERISTICS
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LM201U05
Liquid Crystal Display
Parameter Symbol
Min Typ Max
LAMP :
Operating Voltage VBL 670(8.0mA) 700 825(3mA) V
Operating Current IBL 3.0 7.0 8.0 mA
Established Starting Voltage Vs 2, 4
at 25 ¶C
at 0 ¶C
Operating Frequency
Discharge Stabilization Time
Power Consumption
Life Time
fBL 40 50 80 kHz 5
Ts - - 3 Min 2, 6
PBL 29.4 32.3 Watt 7
45,000 Hrs 2, 8
Values
1150 V
1450 V
Unit Notes
RMS
RMS
RMS
RMS
Note : The design of the inverter must have specifications for the lamp in LCD Assembly.
The performance of the Lamp in LCM, for example life time or brightness, is extremely influenced by
the characteristics of the DC-AC inverter. So all the parameters of an inverter should be carefully
designed so as not to produce too much leakage current from high-voltage output of the inverter.
When you design or order the inverter, please make sure unwanted lighting caused by the mismatch of the lamp and the inverter (no lighting, flicker, etc) never occurs. When you confirm it, the LCD– Assembly should be operated in the same condition as installed in you instrument.
Do not attach a conducting tape to lamp connecting wire.
If the lamp wire attach to a conducting tape, TFT-LCD Module has a low luminance and the inverter has abnormal action. Because leakage current is occurred between lamp wire and conducting tape.
1, 3
2
1. It is only reference voltage in LCM.
2. Specified values are for a single lamp.
3. Operating voltage is measured at 25 r 2C.
4. The voltage above V
should be applied to the lamps for more than 1 second for start-up.
S
(Inverter open voltage must be more than lamp starting voltage.)
Otherwise, the lamps may not be turned on. The used lamp current is the lamp typical current.
5. Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may cause beat on the display. Therefore lamp frequency shall be as away possible from the horizontal
synchronous frequency and from its harmonics in order to prevent interference.
6. Let’s define the brightness of the lamp after being lighted for 5 minutes as 100%.
is the time required for the brightness of the center of the lamp to be not less than 95%.
T
S
7. The lamp power consumption shown above does not include loss of external inverter.
The used lamp current is the lamp typical current. (P
= VBLx IBLx N
BL
Lamp
)
8. The life is determined as the time at which brightness of the lamp is 50% compared to that of initial
value at the typical lamp current on condition of continuous operating at 25 r 2C.
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9. The output of the inverter must have symmetrical(negative and positive) voltage waveform and symmetrical current waveform (Unsymmetrical ratio is less than 10%). Please do not use the inverter which has unsymmetrical voltage and unsymmetrical current and spike wave. Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp, are following. It shall help increase the lamp lifetime and reduce leakage current.
a. The asymmetry rate of the inverter waveform should be less than 10%. b. The distortion rate of the waveform should be within ˲2 ·10%.
* Inverter output waveform had better be more similar to ideal sine wave.
* Asymmetry rate:
LM201U05
I p
| I
–I –p| / I
p
rms
x 100%
* Distortion rate
I -p
I
(or I –p) / I
p
rms
10. The inverter which is combined with this LCM, is highly recommended to connect coupling(ballast) condenser at the high voltage output side. When you use the inverter which has not coupling(ballast) condenser, it may cause abnormal lamp lighting because of biased mercury as time goes.
11.In case of edgy type back light with over 4 parallel lamps, input current and voltage wave form should be synchronized
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Product Specification
3-2. Interface Connections
LCD Connector(CN1) : AL230F-ALG1D-P (Manufactured by P-TWO) or IS100-L30R-C23
(Manufactured by UJU) or Equivalent
Mating Connector : FI-X30M (Manufactured by JAE) or Equivalent
Table 3. MODULE CONNECTOR(CN1) PIN CONFIGURATION
Pin DescriptionSymbol
LM201U05
Liquid Crystal Display
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
Vcc Vcc Vcc Vcc NC NC SR3P SR3M SCLKINP SCLKINM SR2P SR2M SR1P SR1M SR0P SR0M GND GND FR3P FR3M FCLKINP FCLKINM FR2P FR2M FR1P FR1M FR0P FR0M GND GND
Supply voltage for LCD module Supply voltage for LCD module Supply voltage for LCD module Supply voltage for LCD module NC (No Connection) NC (No Connection) Plus signal of even channel 3 (LVDS) Minus signal of even channel 3 (LVDS) Plus signal of even clock channel (LVDS) Minus signal of even clock channel (LVDS) Plus signal of even channel 2 (LVDS) Minus signal of even channel 2 (LVDS) Plus signal of even channel 1 (LVDS) Minus signal of even channel 1 (LVDS) Plus signal of even channel 0 (LVDS)
Minus signal of even channel 0 (LVDS) Ground Ground Plus signal of odd channel 3 (LVDS)
Minus signal of odd channel 3 (LVDS)
Plus signal of odd clock channel (LVDS)
Minus signal of odd clock channel (LVDS)
Plus signal of odd channel 2 (LVDS)
Minus signal of odd channel 2 (LVDS)
Plus signal of odd channel 1 (LVDS)
Minus signal of odd channel 1 (LVDS)
Plus signal of odd channel 0 (LVDS)
Minus signal of odd channel 0 (LVDS) Ground Ground
Second data
First data
Note: 1. NC: No Connection.
2. All GND(ground) pins should be connected together and to Vss which should also be connected to the LCD’s metal frame.
3. All V
4. Input Level of LVDS signal is based on the IEA 664 Standard.
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LCD (power input) pins should be connected together.
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Liquid Crystal Display
Product Specification
User Connector Diagram
#30
AL230F-ALG1D-P ( P-TWO)
#1
PCB
پڎڋ
Input connector
BackLight
ڭۀڼۍٻۑۄۀےٻۊہٻڧڞڨ
Components
پڌ
PCB
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Table 4. REQUIRED SIGNAL ASSIGNMENT FOR Flat Link (TI:SN75LVDS83) Transmitter
Pin # Require SignalPin Name Pin # Require SignalPin Name
1 Power Supply for TTL InputVCC 29 Ground pin for TTLGND
2 TTL Input (R7)D5 30 TTL Input (DE)D26
3 TTL Input (R5)D6 31 TTL Level clock InputTXCLKIN
4 TTL Input (G0)D7 32 Power Down InputPWR DWN
5 Ground pin for TTLGND 33 Ground pin for PLLPLL GND
6 TTL Input (G1)D8 34 Power Supply for PLLPLL VCC
7 TTL Input (G2)D9 35 Ground pin for PLLPLL GND
LM201U05
8 TTL Input (G6)D10 36 Ground pin for LVDSLVDS GND
9 Power Supply for TTL InputVCC 37 Positive LVDS differential data output 3TxOUT3
10 TTL Input (G7)D11 38 Negative LVDS differential data output 3TxOUT3
11 TTL Input (G3)D12 39 Positive LVDS differential clock outputTXCLKOUT
12 TTL Input (G4)D13 40 Negative LVDS differential clock outputTXCLKOUT
13 Ground pin for TTLGND 41 Positive LVDS differential data output 2TXOUT2
14 TTL Input (G5)D14 42 Negative LVDS differential data output 2TXOUT2
15 TTL Input (B0)D15 43 Ground pin for LVDSLVDS GND
16 TTL Input (B6)D16 44 Power Supply for LVDSLVDS VCC
17 Power Supply for TTL InputVCC 45 Positive LVDS differential data output 1TXOUT1
46 Negative LVDS differential data output 1TXOUT118 TTL Input (B7)D17
19 TTL Input (B1)D18
20 TTL Input (B2)D19
22 TTL Input (B3)D20
47 Positive LVDS differential data output 0TXOUT0
48 Negative LVDS differential data output 0TXOUT0
49 Ground pin for LVDSLVDS GND21 Ground pin for TTL InputGND
50 TTL Input (R6)D27
23 TTL Input (B4)D21
24 TTL Input (B5)D22
25 TTL Input (RSVD)D23
26 Power Supply for TTL InputVCC 54 TTL Input (R2)D2
51 TTL Input (R0)D0
52 TTL Input (R1)D1
53 Ground pin for TTLGND
55 TTL Input (R3)D327 TTL Input (HSYNC)D24
56 TTL Input (R4)D428 TTL Input (VSYNC)D25
Notes : Refer to LVDS Transmitter Data Sheet for detail descriptions.
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