LG U8150 Service Manual

Service Manual

Model : U8150

Service Manual

U8150

P/N : MMBD0039901 Date: September, 2004 / Issue 1.0

- 1 -

1. INTRODUCTION

......................................

3

1.1 Purpose

....................................................

3

1.2 Regulatory Information

............................

3

1.3 Abbreviations

..........................................

5

2. PERFORMANCE

.....................................

7

2.1 System Overview

....................................

7

2.2 Usable environment

................................

8

2.3 Radio Performance

.................................

8

2.4 Current Consumption

............................

14

2.5 RSSI

......................................................

14

2.6 Battery Bar

.............................................

14

2.7 Sound Pressure Level

............................

15

2.8 Charging

................................................

16

3. TECHNICAL BRIEF

............................

17

3.1 Digital Baseband(DBB/MSM6200) &
Multimedia Processor(OMAP1510)

.......

18

3.1.1 General Description

.....................

18

3.2 Hardware Architecture

..........................

19

3.2.1. Block Diagram(MSM6200)

..........

20

3.2.2. Block Diagram(OMAP1510)

........

21

3.3 Subsystem(MSM6200)

..........................

22

3.3.1 ARM Microprocessor

Subsystem

...................................

22

3.3.2 UMTS Subsystem

........................

22

3.3.3 GSM Subsystem

..........................

22

3.3.4 RF Interface

.................................

22

3.3.5 Serial Bus Interface(SBI)

.............

22

3.3.6 Wideband CODEC

.......................

23

3.3.7 Vocoder Subsystem

.....................

23

3.3.8 HKADC

........................................

23

3.3.9 Mode Select and

JTAG Interfaces

...........................

23

3.3.10 General-Purpose

Input/Output Interface

................

23

3.3.11 UART

.........................................

24

3.3.12 USB

............................................

24

3.4 Subsystem(OMAP1510)

.......................

25

3.4.1 MPU Core

....................................

25

3.4.2 TMS320C55x DSP

.......................

25

3.4.3 TC(Traffic Controller)
Subsystem

...................................

25

3.4.4 Syatem DMA Controller

...............

26

3.4.5 MPU Private peripherals

..............

26

3.4.6 MPU Public Peripherals

...............

26

3.4.7 DSP private peripherals

...............

27

3.4.8 DSP public peripherals

................

27

3.4.9 MPU/DSP shared peripherals

......

27

3.4.10 clock generation

and system reset

........................

28

3.4.11 MPU TI Peripheral

Bus Bridges

................................

28

3.5 External memory interface

....................

29

3.6 H/W Sub System

...................................

30

3.6.1 RF Interface

.................................

30

3.6.2 MSM Sub System

........................

30

3.6.3 Power Block

.................................

37

3.6.4 OMAP1510 Sub System

..............

43

3.6.5 Audio and Sound

.........................

52

3.7 RF general description

...........................

65

3.8 GSM Mode

............................................

68

3.8.1 Receiver

.......................................

68

3.8.2 Transmitter

...................................

75

3.9 WCDMA Mode

......................................

78

3.9.1 Receiver

.......................................

78

3.9.2 Transmitter

...................................

79

4. TROUBLE SHOOTING

.......................

82

4.1 BB component

.......................................

82

4.2 Power ON Trouble

................................

85

4.3 USB Trouble

..........................................

87

4.4 SIM Detect Trouble

...............................

89

4.5 Key Sense Trouble

................................

90

4.6 Camera Trouble

....................................

91

4.7 Main LCD Trouble

.................................

92

4.8 Sub LCD Trouble

..................................

94

4.9 Keypad Backlight Trouble

.....................

96

4.10 Folder ON/OFF Trouble

......................

97

4.11 Camera Direction Detection Trouble

...

99

4.12 Camera Flash Trouble

......................

101

4.13 Audio Trouble Shooting

.....................

103

4.14 Charger Trouble Shooting

.................

122

Table Of Contents

- 2 -

Table of contents

4.15 RF Component

...................................

125

4.16 SIGNAL PATH

...................................

127

4.17 Checking VCXO Block

.......................

128

4.18 Checking Ant. SW Module Block

.......

131

4.19 Checking WCDMA Block

...................

134

4.19.1 Checking VCXO Block

.............

135

4.19.2 Checking Ant. SW module

........

135

4.19.3 Checking RF TX Level

.............

135

4.19.4 Checking PAM Block

...............

137

4.19.5 Check RF Rx Level

..................

138

4.20 Checking GSM Block

.........................

140

4.20.1 Checking VCO Block

...............

141

4.20.2 Checking Ant. SW Module

.......

143

4.20.3 Checking RF Tx level

...............

143

4.20.4 Checking PAM Block

...............

145

4.20.5 Checking RF Rx Block

.............

146

5. BLOCK DIAGRAM

...........................

147

5.1 GSM & WCDMA RF Block

...................

147

5.2 Interface Diagram

.................................

149

6. DISASSEMBLY INSTRUCTION

...

151

7. DOWNLOAD

.......................................

159

7.1 Using MSM
downloader version 1.5.1.x

................

159

7.1.1 Pre-requisition

............................

159

7.1.2 Set correct COM port for USB

in ‘LG Download Program

1.5.1.x for 3G’ program ...............

162

7.1.3 Image Downloading

...................

164

7.1.4 Restore NV items

.......................

172

7.1.5 Image Downloading

with Emergency way

..................

177

7.1.6 Connection of L/T

(Refers to below image)

.............

184

7.2 Using Helen
downloader version 7.6!!!

....................

185

7.2.1 Pre-requisition

............................

185

7.2.2 Set correct COM port for USB

in ‘Helen Download Program’
program

......................................

188

7.2.3 Image(s) Downloading

...............

192

8. CALIBRATION

...................................

196

8.1 General Description

...........................

196

8.2 Pegasus Environment

.........................

196

8.2.1 H/W Environment

.......................

196

8.2.2 S/W Environment

.......................

196

8.2.3 Configuration Diagram of
Calibration Environment

.............

196

8.3 Calibration Explanation

.......................

197

8.3.1 Overview

....................................

197

8.3.2 Calibration Items

........................

197

8.3.3 EGSM 900 Calibration Items

.....

197

8.3.4 DCS 1800 Calibration Items

......

200

8.3.5 WCDMA Calibration Items

.........

201

8.4 Program Operation

..............................

205

8.4.1 Pegasus Program Overview

......

205

8.4.2 Pegasus Function Description

...

205

8.4.3 Calibration Procedure

................

209

8.4.4 Calibration Result Message

.......

210

8.4.5 Pegasus
Configuration file format

.............

210

9. CIRCUIT DIAGRAM

.........................

211

10. PCB LAYOUT

..................................

217

11. EXPLODED VIEW &
REPLACEMENT PART LIST

......

221

11.1 EXPLODED VIEW

............................

221

11.2 Replacement Parts
<Mechanic component>

.....................

223

<Main component>

............................

226

11.3 Accessory

...........................................

245

1. INTRODUCTION

- 3 -

1.1 Purpose

This manual provides the information necessary to repair,calibration,description and download the
features of this model.

1.2 Regulatory Information

A.Security

Toll fraud,the unauthorized use of telecommunications system by an unauthorized part (for example,
persons other than your company ’s employees,agents,subcontractors,or person working on your
company ’s behalf)can result in substantial additional charges for your telecommunications services.
System users are responsible for the security of own system.There are may be risks of toll fraud
associated with your telecommunications system.System users are responsible for programming and
configuring the equipment to prevent unauthorized use.The manufacturer does not warrant that this
product is immune from the above case but will prevent unauthorized use of common-carrier
telecommunication service of facilities accessed through or connected to it.The manufacturer will not
be responsible for any charges that result from such unauthorized use.

B.Incidence of Harm

If a telephone company determines that the equipment provided to customer is faulty and possibly
causing harm or interruption in service to the telephone network,it should disconnect telephone
service until repair can be done.A telephone company may temporarily disconnect service as long as
repair is not done.

C.Changes in Service

A local telephone company may make changes in its communications facilities or procedure.If these
changes could reasonably be expected to affect the use of the phones or compatibility with the
network,the telephone company is required to give advanced written notice to the user,allowing the
user to take appropriate steps to maintain telephone service.

D.Maintenance Limitations

Maintenance limitations on the phones must be performed only by the manufacturer or its authorized
agent.The user may not make any changes and/or repairs expect as specifically noted in this manual.
Therefore,note that unauthorized alternations or repair may affect the regulatory status of the system
and may void any remaining warranty.

1. INTRODUCTION

1.INTRODUCTION

- 4 -

E.Notice of Radiated Emissions

This model complies with rules regarding radiation and radio frequency emission as defined by local
regulatory agencies.In accordance with these agencies,you may be required to provide information
such as the following to the end user.

F.Pictures

The pictures in this manual are for illustrative purposes only;your actual hardware may look slightly
different.

G.Interference and Attenuation

A phone may interfere with sensitive laboratory equipment,medical equipment,etc.
Interference from unsuppressed engines or electric motors may cause problems.

H.Electrostatic Sensitive Devices

A phone may interfere with sensitive laboratory equipment,medical equipment,etc.

ATTENTION

Boards,which contain Electrostatic Sensitive Device (ESD),are indicated by the sign.
Following information is ESD handling:

• Service personnel should ground themselves by using a wrist strap when exchange system boards..

•When repairs are made to a system board,they should spread the floor with anti-static mat which is
also grounded.

• Use a suitable,,grounded soldering iron.

• Keep sensitive parts in these protective packages until these are used..

•When returning system boards or parts like EEPROM to the factory,use the protective package as
described.

1. INTRODUCTION

- 5 -

1.3 Abbreviations

For the purposes of this manual,following abbreviations apply:

APC Automatic Power Control
BB Baseband

BER Bit Error Ratio

CC-CV Constant Current – Constant Voltage

CLA Cigar Lighter Adapter

DAC Digital to Analog Converter

DCS Digital Communication SystemU206

dBm dB relative to 1 milliwatt

DSP Digital Signal Processing

DTC DeskTop Charger

EEPROM Electrical Erasable Programmable Read-Only Memory

EL Electroluminescence

ESD Electrostatic Discharge

FPCB Flexible Printed Circuit Board

GMSK Gaussian Minimum Shift Keying

GPIB General Purpose Interface Bus

GPRS General Packet Radio Service

GSM Global System for Mobile Communications

IPUI International Portable User Identity

IF Intermediate Frequency

LCD Liquid Crystal Display

LDO Low Drop Output

LED Light Emitting Diode

OPLL Offset Phase Locked Loop

PAM Power Amplifier Module

PCB Printed Circuit Board

PGA Programmable Gain Amplifier

PLL Phase Locked Loop

1.INTRODUCTION

- 6 -

PSTN Public Switched Telephone Network
RF Radio Frequency

RLR Receiving Loudness Rating

RMS Root Mean Square

RTC Real Time Clock

SAW Surface Acoustic Wave

SIM Subscriber Identity Module

SLR Sending Loudness Rating

SRAM Static Random Access Memory

UMTS Universal Mobile Telephony System

2. PERFORMANCE

- 7 -

2.1 System Overview

2. PERFORMANCE

Item Specification

Shape GSM900/1800 &WCDMA Folder-Dual Mode Handset

Size 99.2 x 50 x 24.4mm

Weight 136 g (with Battery)

Power 4.0V >1200mAh Li-Ion

Talk Time

Over 110 Min (WCDMA,Tx=12 dBm,Voice)

Over 150 Min (GSM,Tx=Max,Voice)

Standby Time

Over 120 hrs (WCDMA,DRX=1.28)

Over 1 50 hrs (GSM,Paging period=9)

Antenna Fixed Type (Fixed Screw)

LCD main 176x220pixel / sub 88 x 110 pixel

Main LCD BL White LED Back Light (2way; main/sub common)

Sub LCD BL White LED Back Light (2way; main/sub common)

Vibrator Yes (Coin Type)

LED Indicator No

C-MIC Yes

Receiver Yes

Earphone Jack Yes

SIM Socket Yes (3.0V)

Volume Key Push Type(+,-)

Voice Key Push Type (Memo)

I/O Connect 24 Pin

2. PERFORMANCE

- 8 -

2.2 Usable environment

1)Environment

2)Environment(Accessory)

*CLA:12~24V(DC)

2.3 Radio Performance

1)Transmitter -GSM Mode

Reference Spec. Min Typ. Max Unit

Power Available power 100 220 240 Vac

No Item GSM DCS

100k ~1GHz -39dBm

9k ~1GHz -39dBm

MS allocated 1G ~1710MHz -33dBm

Channel

1G ~12.75GHz -33dBm

1710M~1785MHz -39dBm

1785M ~12.75GHz -33dBm

1

Conducted

100k ~880MHz -60dBm 100k ~880MHz -60dBm

Spurious

880M ~915MHz -62dBm 880M ~915MHz -62dBm

Emission

Idle Mode 915M ~1000Mz -60dBm 915M ~1000MHz -60dBm

1G ~1.71GHz -50dBm 1G ~1.71GHz -50dBm

1.71G ~1.785GHz -56dBm 1.71G ~1.785GHz -56dBm

1.785G ~12.75GHz -50dBm 1.785G ~12.75GHz -50dBm

Item Spec.

Voltage 4.0 (Typ),3.4 (Min),(Shut Down:3.2)

Size -20 ~+60

Storage -30 ~+85

Humidity max.85 %

2. PERFORMANCE

- 9 -

No Item GSM DCS

30M ~1GHz -36dBm

30M ~1GHz -36dBm

MS allocated 1G ~1710MHz -30dBm

Channel

1G ~4GHz -30dBm

1710M ~1785MHz -36dBm

1785M ~4GHz -30dBm

1

Radiated

30M ~880MHz -57dBm 30M ~880MHz -57dBm

Spurious

880M ~915MHz -59dBm 880M ~915MHz -59dBm

Emission

Idle Mode 915M ~1000Mz -57dBm 915M ~1000MHz -57dBm

1G ~1.71GHz -47dBm 1G ~1.71GHz -47dBm

1.71G ~1.785GHz -53dBm 1.71G ~1.785GHz -53dBm

1.785G ~4GHz -47dBm 1.785G ~4GHz -47dBm

2 Frequency Error ±0.1ppm ±0.1ppm

3

Phase Error

±5(RMS) ±5(RMS)

±20(PEAK) ±20(PEAK)

3dB below reference sensitivity

3dB below reference sensitivity

Frequency Error Under RA250:±200Hz RA250:±250Hz

4 Multipath and Interference HT100:±100Hz HT100:±250Hz

Condition TU50:±100Hz TU50:±150Hz

TU3:±150Hz TU1.5:±200Hz

0 ~100kHz +0.5dB 0 ~100kHz +0.5dB

200kHz -30dB 200kHz -30dB

250kHz -33dB 250kHz -31dB

Due to 400kHz -60dB 400kHz -33dB

Output RF

modulation 600 ~1800kHz -66dB 600 ~1800kHz -60dB

5

Spectrum

1800 ~3000kHz -69dB 1800 ~6000kHz -60dB

3000 ~6000kHz -71dB 6000kHz -73dB

6000kHz -77dB

Due to

400kHz -19dB 400kHz -22dB

Switching

600kHz -21dB 600kHz -24dB

transient

1200kHz -21dB 1200kHz -24dB

1800kHz -24dB 1800kHz -27dB

2. PERFORMANCE

- 10 -

NO Item GSM DCS

Frequency offset 800kHz

7 Intermodulation attenuation

Intermodulation product should

be Less than 55dB below the

level of Wanted signal

Power control

Power Tolerance

Power control

Power Tolerance

Level (dBm) (dB) Level (dBm) (dB)

533±3 030±3

631±3 12 8±3

729±3 226±3

827±3 324±3

925±3 422±3

10 23 ±3 5 20 ±3

11 21 ±3 6 18 ±3

8 Transmitter Output Power 12 19 ±3 7 16 ±3

13 17 ±3 8 14 ±3

14 15 ±3 9 12 ±4

15 13 ±3 10 10 ±4

16 11 ±5 11 8 ±4

17 9 ±5 12 6 ±4

18 7 ±5 13 4 ±4

19 5 ±5 14 2 ±5

15 0 ±5

9 Burst timing Mask IN Mask IN

-

2. PERFORMANCE

- 11 -

2)Transmitter-WCDMA Mode

NO Item Specification

1 Maximum Output Power

Class3:+24dBm(+1/-3dB)

Class4:+21dBm(±2dB)

2 Frequency Error ±0.1ppm

3 Open Loop Power control in uplink ±9dB@normal,±12dB@extreme

Adjust output(TPC command)

cmd 1dB 2dB 3dB

+1 +0.5/1.5 +1/3 +1.5/4.5

4 Inner Loop Power control in uplink 0 -0.5/+0.5 -0.5/+0.5 -0.5/+0.5

-1 -0.5/-1.5 -1/-3 -1.5/-4.5

group(10equal command group)

+1 +8/+12 +16/+24

5 Minimum Output Power -50dBm(3.84MHz)

Qin/Qout:DPCCH quality levels

6 Out-of-synchronization handling of output power Toff@DPCCH/lor:-22->-28dB

Ton@DPCCH/lor:-24->-18dB

7 Transmit OFF Power -56dBm(3.84M)

8 Transmit ON/OFF Time Mask

±25us

PRACH,CPCH,uplink compressed mode

±25us

9 Change of TFC

power varies according to the data rate

DTX:DPCH off

(minimize interference between UE)

10 Power setting in uplink compressed ±3dB(after 14slots transmission gap)

11 Occupied Bandwidth(OBW) 5MHz(99%)

-35-15*(

f-2.5)dBc@ f=2.5~3.5MHz,30k

12 Spectrum emission Mask

-35-1*( f-3.5)dBc@ f=3.5~7.5MHz,1M

-39-10*( f-7.5)dBc@ f=7.5~8.5MHz,1M

-49 dBc@ f=8.5~12.5MHz,1M

2. PERFORMANCE

- 12 -

2)Transmitter-WCDMA Mode

NO Item Specification

13 Adjacent Channel Leakage Ratio(ACLR)

33dB@5MHz,ACP>-50dBm

43dB@10MHz,ACP>-50dBm

-36dBm@f=9~150KHz,1k BW

-36dBm@f=150KHz~30MHz,10k

-36dBm@f=30~1000MHz,100k

14 Spurious Emissions 30dBm@f=1~12.75GHz,1M

*:additional requirement -41dBm*@1893.5~1919.6MHz,300k

-67dBm*@925~935MHz,100k

-79dBm*@935~960MHz,100k

-71dBm*@1805~1880MHz,100k

15 Transmit Intermodulation

-31dBc@5MHz,Interferer -40dBc

-41dBc@10MHz,Interferer -40dBc

16 Error Vector Magnitude(EVM)

17.5%(>-20dBm)

(@12.2k,1DPDCH+1DPCCH)

17 Transmit OFF Power

-15dB@SF=4,768kbps,multi-code

transmission

NO Item GSM DCS

1 Sensitivity (TCH/FS Class II) -105dBm -105dBm

2

Co-Channel Rejection

C/Ic=7dB C/Ic=7dB Storage -30 ~+85

(TCH/FS Class II,RBER,TUhigh/FH)

3

Adjacent Channel 200kHz C/Ia1=-12dB C/Ia1=-12dB

Rejection 400kHz C/Ia2=-44dB C/Ia2=-44dB

Wanted Signal:-98dBm Wanted Signal:-96dBm

4 Intermodulation Rejection 1 ’st interferer:-44dBm 1 ’st interferer:-44dBm

2 ’st interferer:-45dBm 2 ’st interferer:-44dBm

5

Blocking Response Wanted Signal:-101dBm Wanted Signal:-101dBm

(TCH/FS Class II,RBER)

Unwanted Signal:Depend on freq Unwanted Signal:Depend on freq.

2. PERFORMANCE

- 13 -

NO Item Specification

18 Reference Sensivitivity Level -106.7dBm(3.84M)

-25dBm(3.84MHz)

19 Maximum Input Level -44dBm/3.84MHz(DPCH_Ec)

UE@+20dBm output power(class3)

20 Adjacent Channel Selectivity(ACS)

33dB

UE@+20dBm output power(class3)

-56dBm/3.84MHz@10MHz

21 In-band Blocking

UE@’m output power(class3)

-44dBm/3.84MHz@15MHz

UE@+20dBm output power(class3)

-44dBm/3.84MHz@f=2050~2095 &

2185~2230MHz,band a)

UE@+20dBm output power(class3)

-30dBm/3.84MHz@f=2025~2050 &

22 Out-band Blocking 2230~2255MHz,band a)

UE@+20dBm output power(class3)

-15dBm/3.84MHz@f=1~2025 &

2255~12500MHz,band a)

UE@+20dBm output power(class3)

23 Spurious Response

-44dBm CW

UE@+20dBm output power(class3)

-46dBm CW@10MHz &

24 Intermodulation Characteristic -46dBm/3.84MHz@20MHz

UE@+20dBm output power(class3)

-57dBm@f=9KHz~1GHz,100k BW

25 Spurious Emissions

-47dBm@f=1~12.75GHz,1M

-60dBm@f=1920~1980MHz,3.84MHz

-60dBm@f=2110~2170MHz,3.84MHz

2. PERFORMANCE

- 14 -

2.4 Current Consumption

(VT test :Speaker off,LCD backlight On)

2.5 RSSI

2.6 Battery Bar

Stand by Voice Call VT

WCDMA 120Hours=10mA(DRX=1.28) 110min=600mA(Tx=12dBm) 80min=850mA(Tx=12dBm)

GSM 150Hours=8mA(paging=9period) 150min=450mA(Tx=Max)

WCDMA GSM

BAR 5->4 -85±2dBm -85±2dBm

BAR 4->3 -90±2dBm -90±2dBm

BAR 3->2 -95±2dBm -95±2dBm

BAR 2->1 -98±2dBm -100±2dBm

BAR 1->0 -101±2dBm -105±2dBm

Indication Standby Dedicated(GSM) Dedicated(WCDMA)

Bar 4 3 (60%) 3.80 0.03V 3.76 0.03V 3.70 0.03V

Bar 3 2 (20%) 3.70 0.03V 3.66 0.03V 3.59 0.03V

Bar 2 1 (10%) 3.61 0.03V 3.57 0.03V 3.51 0.03V

Bar 1 Empty+Blinking (2%) 3.49 0.03V 3.45 0.03V 3.39 0.03V

Low Voltage, 3.41 0.03V 3.45 0.03V 3.39 0.03V

Warning message (Interval : 3min) (Interval : 1min) (Interval : 1min)

2. PERFORMANCE

- 15 -

2.7 Sound Pressure Level

NO Test Item Specification

1 Sending Loudness Rating (SLR)

NOM

8 ±3dB

MAX

2 Receiving Loudness Rating (RLR)

NOM -1 ±3dB

MAX -13 ±1dB

3 Side Tone Masking Rating (STMR)

NOM

17dB over

MAX

4 Echo Loss (EL)

MS NOM

40dB over

MAX
5 Sending Distortion (SD) refer to TABLE 30.3
6 Receiving Distortion (RD) refer to TABLE 30.4

7 Idle Noise-Sending (INS)

NOM

-64dBm0p under

MAX

8 Idle Noise-Receiving (INR)

NOM -47dBPA under

MAX -36dBPA under

9 Sending Loudness Rating (SLR)

NOM

8 ±3dB

MAX

10 Receiving Loudness Rating (RLR)

NOM -1 ±3dB

MAX -12 ±3dB

11 Side Tone Masking Rating (STMR)

NOM

25dB over

MAX

12 Echo Loss (EL)

HEAD NOM

40dB over

SET MAX

13 Sending Distortion (SD) refer to TABLE 30.3
14 Receiving Distortion (RD) refer to TABLE 30.4

15 Idle Noise-Sending (INS)

NOM

-55dBm0p under

MAX

16 Idle Noise-Receiving (INR)

NOM -45dBPA under

MAX -40dBPA under

TDMA NOISE

GSM

SEND

–.GSM:Power Level:5

MS

REV.

DCS:Power Level:0

DCS

SEND

17

(Cell Power:-90 ~-105dBm) REV.

-62dBm under

–.Acoustic(Max Vol.)

GSM

SEND

MS/HEADSET SLR:8 ±3dB

Headset

REV.

MS/HEADSET RLR:-13 ±1dB/-15dB

DCS

SEND

(SLR/RLR:mid-Value Setting) REV.

2. PERFORMANCE

- 16 -

2.8 Charging

• Charging Method: CC & CV (Constant Current & Constant Voltage)

• Maximum Charging Voltage: 4.2V

• Maximum Charging Current: 600mA

• Nominal Battery Capacity: 1200 mAh

• Charging time: Max 3.5h(Except time trickle charging)

• Full charge indication current (icon stop current): 60mA

• Cut-off voltage: 3.28V

3. TECHNICAL BRIEF

- 17 -

3. TECHNICAL BRIEF

3.1 Digital Baseband(DBB/MSM6200) & Multimedia
Processor(OMAP1510)

3.1.1 General Description

A. Features(MSM6200)

The ARM7TDMI microprocessor can operate at up to 50 MHz with variable rate, software controlled
clocks to provide greater standby time.
Integrated PLL to provide additional on-chip clock frequencies
Supports low-power, low-frequency crystal to enable TCXO shutoff
Integrated USIM Controller for direct interface to USIM card
Software-controlled power management feature
Automatic access conversion of 32-bit data accesses to 16-bit devices
Advanced 320-ball FBGA packaging
WCDMA Access

- Maximum of eight simultaneous transport channels

- Maximum of two simultaneous CCTrCH

- Data rates supporting 384kbps DL / 64kbps UL

GSM/GPRS Access

- GSM/GPRS network signaling (from Layer 1 to 3)

- GSM AMR,EFR,FR

Operation and Services

- SIM Interfaces

- General Purpose I/O (GPIO) Interface

- External Memory Interface that supports FLASH, SRAM

- JTAG

- RTC

Data Communication

- IrDA ® (SIR)

- UARTs (ACB, EDB (RS232))

- Slave USB

B. Features(OMAP1510)

TI925T MPU subsystem with:

- Instruction cache (16K bytes) and data cache (8K bytes)

- Memory management unit (MMU)

- A 17-word write buffer (WB)

DSP subsystem (C55x. DSP core and subsystems) with:

- Internal 32K-word dual-access RAM (DARAM), 48K-word single access RAM (SARAM), 16K-word
ROM

- Software-configurable instruction cache (12K words, 128-bit line size, 2-way setassociative + RAM
set)

3. TECHNICAL BRIEF

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- Hardware accelerators for video processing, pixel interpolation, and motion estimation

- Six-channel DMA controller for high-speed data movement without DSP intervention
System DMA controller with:

- Six ports and nine independently programmable generic channels

- An additional dedicated DMA channel tied to the liquid crystal display (LCD) controller

- Ability to transfer 8-,16-, or 32-bit data between the external memory, the MPU, and peripherals
with byte alignment and packing capability

- Ability to perform simultaneous transfers (single or multiple burst), if no resources conflict

Two external memory interfaces, allowing glueless hookup to:

- A 16-bit bus interface to external memory interface slow (EMIFS), such as flash/SRAM/ ROM/page­mode ROM/SB flash/DPRAM), with 128M bytes of memory space

- A 16-bit bus interface to external memory interface fast (EMIFF), such as memory SDRAM, with
64M bytes of memory space

An external memory traffic controller (TC) that allows asynchronous operation among the external
memory interface, the MPU, and the DSP
Mailboxes (two for MPU-to-DSP and two for DSP-to-MPU) for inter-processor communication
Peripherals available for the OS, general-purpose housekeeping, and application-specific functions:

- A 16-bit watchdog timer

- An interrupt handler

- An LCD controller

- Inter-integrated circuit (I2C) interface

- Keyboard interface for key sense

- Camera interface

- Five MPUIO general-purpose input/output signals in default multiplexing mode; five more available
through alternative pin multiplexing modes

- 32-kHz timer

- Pulse-width tone (PWT) module(Motor Drive)

- Pulse-width light (PWL) module(LCD Back Light)

- Real-time clock (RTC) module

- UART modem with auto-baud (16C750 compatible)

- Fourteen general-purpose input/output (GPIO)

3. TECHNICAL BRIEF

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3.2 Hardware Architecture

The hardware structure is delivered as two main processor and peripheral devices

Figure. Simplified Block Diagram

3. TECHNICAL BRIEF

- 20 -

3.2.1 Block Diagram(MSM6200)

Figure. Simplified Block Diagram of MSM6200

3. TECHNICAL BRIEF

- 21 -

3.2.2 Block Diagram(OMAP1510)

Figure. Simplified Block Diagram of OMAP1510

3. TECHNICAL BRIEF

- 22 -

3.3 Subsystem(MSM6200)

3.3.1 ARM Microprocessor Subsystem

The MSM6200 device uses an embedded ARM7TDMI microprocessor. This microprocessor, through
the system software, controls most of the functionality for the MSM, including control of the external
peripherals such as the keypad, LCD, RAM, and ROM devices. Through a QUALCOMM proprietary
serial bus interface (SBI) the ARM7TDMI configures and controls the functionality of the RTR6200,
RFR6200, RFL6200, and PM6050 devices.

3.3.2 UMTS Subsystem

The UMTS Subsystem performs the digital UMTS signal processing. Its components include:

Searcher engine
Demodulating fingers
Combining block
Frame deinterleaver
Viterbi decoder
Up-link subsystem

Turbo decoder
On the down-link channel the UMTS subsystem searches, demodulates, and decodes incoming
CPICH, CCPCH, SCH, and Traffic Channel information. It extracts packet data from the downlink
traffic channel and prepares the packet data for processing. For the up-link, the CDMA subsystem
processes the packet data and modulates the up-link traffic channel (DCH).

3.3.3 GSM Subsystem

The GSM Subsystem performs the digital GSM signal processing.

3.3.4 RF Interface

The RF interface communicates with the mobile station’s external RF and analog baseband circuits.
Signals to these circuits control signal gain in the Rx and Tx signal path and maintain The system’s
frequency reference.

3.3.5 Serial Bus Interface(SBI)

The MSM6200 device’s SBI is designed specifically to be a quick, low pin count control protocol for
QUALCOMM’s RTR6200, RFR6200, RFL6200, and PM6050 ASICs. Using the SBI, the RTR6200,
RFR6200, RFL6200, and PM6050 devices can be configured for different operating modes and for
minimum power consumption, extending battery life in Standby mode. The SBI also controls DC
baseband offset errors.

3. TECHNICAL BRIEF

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3.3.6 Wideband CODEC

The MSM6200 device integrates a wideband voice/audio CODEC into the mobile station modem
(MSM). The CODEC supports two differential microphone inputs, one differential earphone output, one
single-ended earphone output, and a differential analog auxiliary interface. The CODEC integrates the
microphone and earphone amplifiers into the MSM6200 device, reducing the external component
count to just a few passive components. The microphone (Tx) audio path consists of a two-stage
amplifier with the gain of the second stage set externally. The Rx/Tx paths are designed to meet the
ITU-G.712 requirements for digital transmission systems.

3.3.7 Vocoder Subsystem

The MSM6200 device’s QDSP4000 supports AMR vocoder. In addition, the QDSP4000 has modules
to support the following audio functions: DTMF tone generation, DTMF tone detection, Tx/Rx volume
controls, Tx/Rx automatic gain control (AGC), Rx Automatic Volume Control (AVC), EarSeal Echo
Canceller (ESEC), Acoustic Echo Canceller (AEC), Noise Suppression (NS), and programmable, 13­tap, Type-I, FIR, Tx/Rx compensation filters. The MSM6200 device’s integrated ARM7TDMI processor
downloads the firmware into the QDSP4000 and configures QDSP4000 to support the desired
functionality.

3.3.8 HKADC

TheMSM6200 device has an on-chip 8-bit analog-to-digital converter (ADC) which is intended to
digitize DC signals corresponding to analog parameters such as battery voltage, temperature, and RF
power levels. The MSM6200 device has six analog input pins which are multiplexed to the input of the
internal HKADC.

3.3.9 Mode Select and JTAG Interfaces

The mode pins to the MSM6200 device determine the overall operating mode of the ASIC. The options
under the control of the mode inputs are Native mode, which is the normal subscriber unit operation,
and ETM mode, which allows monitoring of the ARM bus and passes compressed information via the
trace port to the MultiTrace trace port analyzer. The MSM6200 device complies with the ANSI/IEEE

1149.1A-1993 feature list. The JTAG interface can be used to test digital interconnects between
devices within the mobile station during manufacture.

3.3.10 General-Purpose Input/Output Interface

The MSM6200 device has 68 general-purpose bidirectional input/output pins (GPIO_INT[67:0]) that
double as general-purpose interrupt inputs. Some of the GPIO_INT pins have alternate functions
supported on them. The alternate functions include USB interface, additional RAM, ROM, general­purpose chip selects, parallel LCD interface, and a UART interface. The function of these pins is
documented in the various software releases.

3. TECHNICAL BRIEF

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3.3.11 UART

There are three UARTs in the MSM6200 ASIC:

UART0 for data

UART1 (can be used for USIM interface)

UART2 (can be used for USB interface)

3.3.12 USB

The MSM6200 device integrates a universal serial bus (USB) controller that supports both
unidirectional and bidirectional transceiver interfaces. The USB controller acts as a USB function
communicating with the USB host. The USB controller also supports digital audio through USB
interface and connects directly to the QDSP4000 for the audio processing.

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3.4 Subsystem(OMAP1510)

3.4.1 MPU Core

The MPU core is a TI925T reduced instruction set computer (RISC) processor. The TI925T is a 32-bit
processor core that performs 32-bit or 16-bit instructions and processes 32-bit, 16-bit, or 8-bit data.
The core uses pipelining so that all parts of the processor and memory system can operate
continuously. Complete documentation is available for the TI925T and the TI925T_EVM.

3.4.2 TMS320C55x DSP

Features for the high-performance, low-power C55x DSP CPU include:

Advanced multiple-bus architecture with one internal program memory bus and five internal data
buses (three dedicated to reads and two dedicated to writes)
Unified program/data memory architecture
Dual 17-bit x17-bit multipliers coupled to 40-bit dedicated adders for nonpipelined single-cycle
multiply accumulate (MAC) operations
Add/compare/select (CSSU) unit for the add/compare section of the Viterbioperator
Exponent encoder to compute an exponent value of a 40-bit accumulator value in a single cycle
Two address generators with eight auxiliary registers and two auxiliary register arithmetic units
8M x 16-bit (16M-bytes) total addressable memory space
Single-instruction repeat or block repeat operations for program code
Conditional execution
Seven-stage pipeline for high instruction throughput
Instruction buffer unit that loads, parses, queues, and decodes instructions to decouple the program
fetch function from the pipeline
Program flow unit that coordinates program actions among multiple parallel CPU functional units
Address data flow unit that provides data address generation and includes a 16-bit arithmetic unit
capable of performing arithmetic, logical, shift, and saturation operations
Data computation unit containing the primary computation units of the CPU, including a 40-bit
arithmetic logic unit, two MAC units, and a shifter

3.4.3 TC(Traffic Controller) Subsystem

The memory interface traffic controller (TC) manages all accesses by the MPU, the TMS320C55xDSP,
the system DMA, and the local bus to the OMAP1510 system memory resources (SRAM, SDRAM,
flash, ROM, etc.).
The TC also manages accesses by the MPU or the C55x DSP to peripherals connected to the local
bus via the local bus interface. For example, the USB host is an internal OMAP1510 peripheral
connected on the local bus, so the TC contributes in managing USB host accesses.

Four hosts access the system resources using the TC.
MPU: The MPU is connected to the TC via the MPU bus. The MPU can access memories that are

connected to the IMIF, EMIFF, and EMIFS.

3. TECHNICAL BRIEF

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C55x DSP: The C55x DSP is connected to the TC via the DSP MMU bus. The C55x DSP can access

memories connected to IMIF, EMIFF, and EMIFS.

System DMA: The system DMA is connected to the TC using four separate 32-bit buses, providing

the system DMA controller with concurrent access to memories connected to the IMIF,
EMIFF, and EMIFS.

Internal local bus interface: An internal local bus interface is connected to the TC to allow access to

memories connected to IMIF, EMIFF, and EMIFS. In OMAP1510, the
USB host controller interfaces (and is master) to the local bus.

3.4.4 Syatem DMA Controller

The system direct memory access (DMA) controller transfers data between points in the memory
space without intervention by the MPU. The DMA allows movements of data to and from internal
memory, external memory, and peripherals to occur in the background of MPU operation. It is
designed to off-load the block data transfer function from the MPU processor.
The DMA has six general-purpose ports:

External memory interface fast (EMIFF) port
External memory interface slow (EMIFS) port
Internal memory interface (IMIF) port
Local bus interface (Local) port
MPU interface (MPUI) port

TIPB interface (TIPB) port
The system DMA controller is controlled by the MPU (via the TIPB). The DMA controller meets the
high-rate-flow requirements of the multichannel applications used by wireless base stations.

3.4.5 MPU Private peripherals

Three standard peripherals are attached to and accessible only by the TI925T RISC processor private
bus (TIPB) to provide housekeeping functions for the operating system (OS) and applications. These
peripherals include timers, a watchdog timer, and interrupt handlers. The configuration module
allows the software to control the different OMAP1510 modes. The device identification registers allow
the software to read the different OMAP1510 identification codes.

3.4.6 MPU Public Peripherals

The MPU Public Peripherals include I2C, Camera I/F, MPU I/O, PWT, PWL, Key input ,RTC etc. The
Camera interface supports 8-bit parallel image data ports and horizontal/vertical signal ports
separately (stand-alone synchronous method). The camera interface has a DMA port. The MPU I/O
module enables direct I/O communications between the MPU (through the public TIPB) and external
devices, and also keyboard input.
Pulse-width light (PWL) module provides control of the LCD backlighting and keypad by employing a
4096-bit random sequence generator. This voltage-level control technique decreases the spectral
power at the modulator harmonic frequencies. The module uses a 32- kHz clock from ULPD.

3. TECHNICAL BRIEF

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Pulse-width tone (PWT) module generates a modulated frequency signal for the external buzzer.

The frequency is programmable between 322 Hz and 4868 Hz with 12 half-tone frequencies per
octave. The volume level is also programmable.
All frequencies are generated from the PWT_CLK, which is a 12-MHz clock.
Inter-integrated circuit (I2C) bus is a half-duplex serial port that uses two lines (data and clock) for
data transmission with software addressable external devices.
And Multichannel buffered serial ports (McBSPs) of MPU Public Peripherals are configurable, high­speed, full-duplex serial ports that allow direct interfacing to external communication Devices(We use
PCM I/F with MSM6200).

3.4.7 DSP private peripherals

These peripherals include timers, a watchdog timer, and interrupt handlers. Three 32-bit timers are
available for general-purpose housekeeping functions. And the interrupt handler handles interrupts
generated by modules and peripherals (DMA controller, MMU, watchdog timer, timers, software
interrupt, etc.). The interrupt handler processes, on a programmable basis, edgetriggered or level­sensitive interrupts. All interrupts are maskable.

3.4.8 DSP public peripherals

The four DSP public peripherals for the OMAP1510 multimedia processor include two multichannel
buffered serial ports (McBSPs) and two multichannel serial interfaces (MCSIs):
McBSP1: I2S audio interface
McBSP3: optical audio interface
MCSI1: Bluetooth •Ï-law interface
MSCI2: modem •Ï-law interface

3.4.9 MPU/DSP shared peripherals

The OMAP1510 device has five peripherals that appear on both MPU and DSP public peripheral
Buses.
Mailbox registers for inter-processor communication of MPU and DSP. There are four sets of mailbox
registers: two for the MPU to send messages and issue an interrupt to the DSP, the other two for the
DSP to send messages and issue an interrupt to the MPU.
General-purpose I/O (GPIO). GPIOs are general-purpose input and output external pins available to
the user for system-level control and general-purpose functions. The signals are user-defined as either
input or output. The output state can be controlled. And inputs can be configured to provide an
interrupt.

UART1
UART2
UART/IrDA

3. TECHNICAL BRIEF

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3.4.10 clock generation and system reset

The clock generator and reset management module supplies clocks and resets to the entire
OMAP1510 device.
Awake: 32-kHz and 12-MHz clocks are on, and 12 MHz is fed into the clock generation module

(those PLLs can be turned on or off).

Big sleep mode: 32-kHz and 12-MHz clocks are on, 12 MHz is not fed into the clock generation

module, and PLLs are off.

Deep sleep mode: 32-kHz clock is on, and 12-MHz clock and PLLs are off.

3.4.11 MPU TI Peripheral Bus Bridges

The MPU TI peripheral bus (TIPB) bridges (see Figure 2°©24) connect the TI925T to its peripherals.
Two MPU TIPBs, one private and one nonprivate or public, are implemented to reduce access latency
and improve system performance.
Concurrent transfers are possible if there are no resource conflicts; for example, DMA transfers to the
public TIPB and the TI925T both access the private TIPB simultaneously. The timers are connected on
the private peripheral bus for low-latency access by an operating system, and the camera is located on
the public peripheral bus for access by the DMA.

3. TECHNICAL BRIEF

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3.5. External memory interface

A. MSM6200

The MSM6200 contains 6 chip select pins. XMEM_CS_N[1:0] cover address space, using 24 address
lines to 16 bit memory, while XMEM_CS_ 16 Mbytes of address space.

64Mb Nor flash memory + 32Mb PSRAM + 64Kb Dual-Port Ram
3-CS(Chip Select) are used

B. OMAP1510

The OMAP1510 contains 6 chip select pins. CS_N[3:0] cover 32 Mbytes of address space, using 24
address lines to 16 bit memory, while XMEM_CS_N[5:2] cover 16 Mbytes of address space.

512Mb flash memory + 64Mb PSRAM
3-CS(Chip Select) are used

Interface Spec

Device Part Name Maker

Read Access Time

Write Access Time

Async Page

FLASH TH50VPF5683 Toshiba 70 ns 30 ns 70 ns

PSRAM TH50VPF5683 Toshiba 70 ns 30 ns 70 ns

DPRAM IDT70V24VL55BZI IDT 55 ns - 55 ns

Interface Spec

Device Part Name Maker

Read Access Time

Write Access Time

Async Page

FLASH TH50VPF6783 Toshiba 70 ns 30 ns 70 ns

PSRAM TH50VPF6783 Toshiba 70 ns 30 ns 70 ns

DPRAM IDT70V24VL55BZI IDT 55 ns - 55 ns

Table External memory interface for MSM6200

Table External memory interface for U8120