LG ME550d User Manual
Date: June, 2007 / Issue 1.0
Service Manual
Model : ME550d
Service Manual
ME550d
- 117 -
GND
IN
OUT
VBAT
PWR
URXD
UTXD
3G 2.5G
GND
RX
TX
UFLS
ON_SW
14
DRAWING
NO.
VRMMC
80
VREXTL
SLIDE OPEN HIGH
LOW
Useless GPIO33 becauseof sleep crt
F
A
E
1.3 / 1.4 / 1.05
1
Domain
15
15
VREXTH
850
1.8
UART3 :
E
NAME
Designer
2.8
D
Name
C
E
10
200
200
200@1.8V
200@1.3V
11
D
Multimedia audio flow
3456 7
DRAWING
98
Checked
Notice No. Date
12
22K THERMISTER
N.A.
SLIDE SWITCH
SLIDE
13
SLIDE CLOSE
56 7
20
12
VRRTC
VRUSB
VRSIM
C
D
B/T Headset
TI RECOMMAND HSDET BUG
Serial Port Intf.
1.8 / 2.85
1.8 / 2.85
Voltage(V)
2.8
F
3.3
B/T, PCO Trace
23
B
1.8
1.8 /
1.3/1.05
B
UART1 -> USB
Download , Mass Storage
ETM test
F
C
100@1.8~2.8V
VRMEM
VRIO
1.8
C
100
A
VIBRATOR
Approved
MODEL
E
Section Date Sign & Name
Iss.
Current(mA)
100@2.8V
1.8 / 2.8
16
VRDBB 1.4 - 0.95
1510
Sheet/
Sheets
LG Electronics Inc.
Triton external voice codec
VRPLL
VRABB
8
47K
R152
K
2007
01/24
ME550c MAIN
1/4
1.1
ABB/DBB
D
4 9
1000p
VREXTH
C101
C102
27p
NA
R136
VRIO
1KR130
C1540.1u
TP103
C114 0.1uF
0.1uFC113
15KR150
47nC118
ICVL0518400V500FR
VA101
0.1u C150
C1520.1u
U101
3
NC OUT
2
1
VDD
4
VSS
VRSIM
NA
EM-0781-T5
C441
R117 5.6K
NAR156
C438
C439
15p
NA
VBUS
NA
R112
10K
R105
Q101
DTC144EM-T2L
B
C
E
NAR147
R128 NA
4.7u
C123
100nH
L102
C121
27p
VBAT
C112
C120
0.1u
4700p
VREXTH
VREXTL
NA
R109
5
RTS
11
2
RX
TX
3
6
VBAT
URT101
12
CTS
10
DSR
GND
1
4
NC1
NC2
7
8
NC3
NC4
9
ON_SW
R111 100K
100p
C115
C117
100u
100u
0.1u
C116
C145
C156NA
VCHG
NAR133
220KR121
10pC110
1uF C134
1uF
C106
_PPR
3
R104
100K
ISL6299U102
BAT
10
CRDL
1
8
GND
ICDL
9
6
IMIN
PGND
11
2
USB
USBON
7
4
_CHG
_EN
5
0.47uC133
1uF C132NA1uF C135
VRIO
C443
100K
R115
1uF
C105
TP101
NA
C126
VREXTL
R137 10K
R120 100K
100nH
L101
VBAT
C148
R100 100K
VRRTC
VRIO
0.1u
L103
100nH
C1570.1u
C104
33K
R113
0.01u
47p
C119
R424 100
100R423
100R422
C1490.1u
C103
1uF
VRIO
R106 100K
VRUSB
TP102
R135 1K
100KR110
VBAT
C1430.1u
100K
R154
VRABB
VRDBB
C1470.1u
VBAT
100KR118
VRMMC
VCHG
0.1u C146
0.1u C142
C153
VRIO
0.1u
R108 100K
R107 NA
A17
VSS24
H2
VSS3
K1
VSS4
P1
VSS5
T3
VSS6
VSS7
W2
AA8
VSS8
VSS9
AA15
VSSA
V2
VSSDLL
N1
H1
VSSDPLL
Y14
VSSPBIAS
D1
VSS1
VSS10
AA21
Y20
VSS11
U21
VSS12
N19
VSS13
N20
VSS14
M20
VSS15
M19
VSS16
VSS17
L19
K19
VSS18
G21
VSS19
E2
VSS2
B10
VSS20
D4
VSS21
E21
VSS22
VSS23
A20
A9
VDD_17
VDD_18A2VDD_19
G20
VDD_2
E1
VDD_20
E20
B19
VDD_21
VDD_22
B17
G2
VDD_3
VDD_4K2VDD_5
T2
AA2
VDD_6
VDD_7Y9VDD_8
W15
VDD_9
Y21
VPP1
R19
VPP2
N14
VDDS5_4
M18
K20
VDDS5_5
VDDS5_6
F19
B20
VDDS5_7
D15
VDDS6
C13
VDDS7_1
VDDS7_2C9VDDS7_3
C6
VDD_1
D2
VDD_10
U20
R21
VDD_11
VDD_12
P21
N21
VDD_13
VDD_14
M21
L18
VDD_15
VDD_16
K18
VDD4
R1
VDDA
T4
N3
VDDDLL
VDDDPLL
J2
VDDS1_1
B2
G3
VDDS1_2
VDDS1_3L4VDDS1_4
P3
VDDS2_1W8VDDS2_2
Y10
VDDS2_3
Y2
Y1
VDDS3
VDDS4
W14
AA20
VDDS5_1
W20
VDDS5_2
N15
VDDS5_3
B13
TSP_ACT2
W18
UART2_RX
AA18
UART2_TX
UART3_CTS
D12
A13
UART3_RTS
UART3_RX
B15
UART3_TX
A14
ULPDR_ARM_BOOT_EXT
T18
V14
ULPDR_CLK32K_IN
ULPDR_ON_NOFF
C16
D14
ULPDR_SYS_CLK_OUT
ULPDR_WAKEUP_INT
G10
USB_0_DAT
AA17
W16
USB_0_RCV
USB_0_SE0
V15
Y17
USB_0_TXEN
SIM_PWRCTRL
V4
U4
SIM_RST
V1
SLICER_IN
SPI_CLK
Y19
W19
SPI_DATA_MISO
SPI_DATA_MOSI
V18
SPI_NCS0
U18
B3
TEST_NEMU0
TEST_NEMU1
C3
H9
TEST_NTRSTB4TEST_RTCK
TEST_TCK
D5
A3
TEST_TDI
TEST_TDOC4TEST_TMS
A4
TSP_ACT0
AA19
C21
SERIALRF_DATA
C20
SERIALRF_ENABLE
SERIALRF_ENR
D16
D18
SERIALRF_RF_CLK
J14
SERIALRF_RF_CS
SERIALRF_RF_DATA
C19
B18
SERIALRF_RXEN
SERIALRF_RX_CLK
E18
SERIALRF_RX_CS
D17
SERIALRF_RX_DATA
D19
A19
SERIALRF_SYSCLK
C18
SERIALRF_TX_CLK
SERIALRF_TX_START
C17
SIM_CLK
W1
V3
SIM_IO
W3
SIM_PBIAS
U2
SDRAM_SDATA11
SDRAM_SDATA12
J1
SDRAM_SDATA13
N2
M1
SDRAM_SDATA14
SDRAM_SDATA15
U1
SDRAM_SDATA2
C1
SDRAM_SDATA3
F2
SDRAM_SDATA4
C2
SDRAM_SDATA5
G1
SDRAM_SDATA6
D3
R2
SDRAM_SDATA7
P2
SDRAM_SDATA8
SDRAM_SDATA9
R3
K3
SDRAM_SDCLK
N4
SDRAM_SDCLKX
F4
SDRAM_SDCLK_EN
SDRAM_SADD10
L7
M4
SDRAM_SADD11
U3
SDRAM_SADD12
K8
SDRAM_SADD2
SDRAM_SADD3
J7
SDRAM_SADD4
N8
SDRAM_SADD5
M8
SDRAM_SADD6
R4
N7
SDRAM_SADD7
M7
SDRAM_SADD8
P4
SDRAM_SADD9
SDRAM_SBANK0
H4
SDRAM_SBANK1
G4
SDRAM_SDATA0
B1
SDRAM_SDATA1
M3
SDRAM_SDATA10
M2
Y15
MMC1_DAT3
MMC1_PBIAS
Y13
A1
NC1
NC2
AA1
A21
NC3
NC4
E5
K4
SDRAM_CS
L3
SDRAM_DQSH
J4
SDRAM_DQSL
SDRAM_NSCAS
H3
F3
SDRAM_NSDQML
E3
SDRAM_NSDQMU
E4
SDRAM_NSRAS
J3
SDRAM_NSWE
K7
SDRAM_SADD0
J8
SDRAM_SADD1
B6
MCBSP1_DOUT
C7
MCBSP1_FSX
A15
MCSI1_BCLK
D13
MCSI1_DIN
C14
MCSI1_DOUT
MCSI1_SYNC
B14
MCSI2_BCLK
C5
MCSI2_DIN
B5
D7
MCSI2_DOUT
A5
MCSI2_SYNC
MISC_EXT_IRQ
H12
AA14
MMC1_CLK
R13
MMC1_CMD
W13
MMC1_DAT0
MMC1_DAT1
AA13
V13
MMC1_DAT2
I2C1_SDA
A18
I2C2_SCL
C15
KBD_C_0
H13
D9
KBD_C_1
B16
KBD_C_2D6KBD_C_3
KBD_C_4
B21
G11
KBD_C_5
KBD_R_0
T19
P18
KBD_R_1
T20
KBD_R_2
P19
KBD_R_3
KBD_R_4
R20
KBD_R_5
P20
MCBSP1_CLKX
B7
MCBSP1_DIN
D8
GPIO_12
G9
GPIO_13
Y18
V17
GPIO_16
H10
GPIO_17
GPIO_18
V19
AA12
GPIO_19
GPIO_2
J15
GPIO_32
G12
GPIO_33
P13
GPIO_4
U19
GPIO_43
Y12
B12
GPIO_46
G13
GPIO_47
V20
GPIO_6
W17
GPIO_8
GPIO_9
V16
W5
EMIFS_FDATA_5
EMIFS_FDATA_6
Y4
AA4
EMIFS_FDATA_7
EMIFS_FDATA_8
V7
W6
EMIFS_FDATA_9
W11
EMIFS_FRDY
EMIFS_NFADV
R11
V12
EMIFS_NFBE_0
EMIFS_NFBE_1
W12
V9
EMIFS_NFCS_3
EMIFS_NFOE
V11
EMIFS_NFRP
AA9
R12
EMIFS_NFWE
EMIFS_NFWP
P12
W21
GPIO_1
GPIO_10
Y16
V10
EMIFS_FADD_22
AA10
EMIFS_FADD_23
EMIFS_FADD_24
W10
P10
EMIFS_FADD_25
Y7
EMIFS_FCLK
V5
EMIFS_FDATA_0
EMIFS_FDATA_1
W4
EMIFS_FDATA_10
AA5
EMIFS_FDATA_11
Y5
EMIFS_FDATA_12
V8
W7
EMIFS_FDATA_13
EMIFS_FDATA_14
Y6
P9
EMIFS_FDATA_15
EMIFS_FDATA_2
Y3
V6
EMIFS_FDATA_3
EMIFS_FDATA_4
AA3
ELCD_DATA_5
H18
G19
ELCD_DATA_6
ELCD_DATA_7
H20
H19
ELCD_DATA_8
ELCD_DATA_9
H21
L15
ELCD_DNC
D20
ELCD_ESTRB
ELCD_NCS0
M14
M15
ELCD_NRESET
ELCD_RNW
K15
K14
ELCD_TE
EMIFS_FADD_17
R9
Y8
EMIFS_FADD_18
EMIFS_FADD_19
AA7
EMIFS_FADD_20
W9
R10
EMIFS_FADD_21
CAM_LCLK
A8
A7
CAM_VS
CAM_XCLK
A10
ELCD_DATA_0
D21
F18
ELCD_DATA_1
J20
ELCD_DATA_10
ELCD_DATA_11
J18
J21
ELCD_DATA_12
ELCD_DATA_13
J19
ELCD_DATA_14
K21
ELCD_DATA_15
N18
R18
ELCD_DATA_16
ELCD_DATA_17
V21
ELCD_DATA_2
E19
G18
ELCD_DATA_3
F20
ELCD_DATA_4
PD761811BZVL
U104
C10
CAM_D_0
CAM_D_1
D10
CAM_D_2
C11
D11
CAM_D_3C8CAM_D_4B9CAM_D_5
CAM_D_6
A12
C12
CAM_D_7
CAM_HS
B8
C151
32.768KHz
MC-146
X101
1
2
3
4
0.1u
1uF
VBAT
C107
R140 0
C111
10n
27p
C122
R101 NA
VRSIM
R103
0.22
2.2uHL104
VRMEM
VRPLL
VRDBB
10u
C125
R119 10K
R142 1K
0.1u C144
10u
C127
C137
1uF
2.2u
C136
0.1u C155
10u
C128
C1088p8p
C109
121KR134
R131 NA
36K
R151
100R425
1uF
C139
VSP_VFS
M3
WAKEUP1
K9
L9
WAKEUP2
1uF C138
VRABB
B1
VREXTH
F12
VREXTL
D12
E12
VRIOM8VRMEM
M7
VRMMC
VRPLL
M9
K12
VRRTC
VRSIMA1VRUSB
E5
VRVBUSD6VRWLED1
B10
A11
VRWLED2
L3
VSP_VCK
VSP_VDR
L4
M2
VSP_VDX
A6
VBUS
VCC11
H10
VCC12
H11
H12
VCC13
L7
VCC21
VCC22
L8
VCC3
B2
F10
VCC41
VCC42
F11
VCC51
E10
VCC52
E11
VCC6
A7
VCCS
D7
VFDBB
G8
M10
VIBDR
VMODE
K10
G10
SWDBB1
G11
SWDBB2
G12
SWDBB3
SWVBUS1
B6
C6
SWVBUS2
K2
TCK
TDI
H5
J5
TDO
H9
TESTRESET
TESTV
E6
TMS
K1
VAC
B8
VBACKUP
H8
A10
VBAT
VBATS
D8
J11
VBG
SDA1
J6
C4
SE0_VM_TXD
SIMDTC
J7
SPKGND1
J4
H4
SPKGND2
SPKNA1
K3
K4
SPKNA2
J1
SPKND1
SPKND2
J2
G3
SPKPA1
SPKPA2
G4
SPKPD1
H1
H2
SPKPD2
H3
SPKVDD1
SPKVDD2
J3
M6
STARTADC
OSC32KOUT
L11
P1_INT2
M1
L2
P2_INT2
A9
PCHGAC
PCHGUSB
A8
M12
PCLKREQ PM_C
F7
E9
PM_D
J9
PM_F
PWON
L10
PWROK
G7
A2
RCV
J12
REFGND
C11
REGEN
H7
RPWON
M5
SCL1
D4
ID_USB
IREF
J10
LED_A
A12
LED_B
B12
C12
LED_C
MCLK1
J8
K8
MCLK2
E3
MICBIAS
D2
MICIN
D1
MICIP
F5
NC1
NC2
G5
G6
NC3
E4
OE_INTN
ONNOFF
M11
L12
OSC32KIN
C7
GND_VBUS1
GND_VBUS2
B7
E8
HSDET
HSMIC
C1
HSMICBIAS
E2
F1
HSOL
HSOR
E1
F2
HSOVMID
M4
I2S_SCK
I2S_SDR
K5
H6
I2S_SDX
I2S_WS
L5
ICTLAC1
C8
ICTLAC2
B9
ICTLUSB1
C9
D9
ICTLUSB2
DAT_VP_RXD
C3
DM_TXD_SPKR_L
A3
DP_RXD_MIC_R
A5
EARN
G2
G1
EARP
FILTERAPLL
L1
FML
D3
G9
GND_DBB1
GND_DBB2
F8
F9
GND_DBB3
K7
GND_PWR1
B11
GND_PWR21
GND_PWR22
C10
L6
GND_PWR3
B3
GND_PWR4
D11
GND_PWR5
P3029DZQW
U103
ADCIN1
D5
ADCIN2
B4
A4
ADCIN3
C5
ADCIN4
ADCIN5
B5
F4
AUDVMID
C2
AUXI_FMR
F3
AUXO
BM_PRECH
E7
K6
BM_SEL
D10
CKEN
K11
CLK32KOUT
10K
VRDBB
R153
1000p
C124
1uF
VBAT
C130
R143 1K
R127 2.2K
VRIO
C444
NA
C141 NA
10K
R114
22K
PT101
R129 2.2K
C440
C442NA
NA
C129
10u
10R155
C1400.1u
NA
C445
VCAM28_EN
CAM_MCLK
2.2u C131
FDATA(15:0)
MAIN_KEY_BL_EN
LCD_ID
SYSCLK
CAM_HS
CAM_VS
E_DATA(15:8)
CAM_PCLK
HOOK_DETECT
TEMP_SENSE
TEMP_SENSE
SLIDE
VCAM18_EN
SLIDE
CAM_D(4)
CAM_D(5)
CAM_D(6)
CAM_D(7)
CAM_D(0)
CAM_D(3)
CAM_D(2)
CAM_D(1)
CAM_RST
HSDET
HSO_R
HSMICIP
_CHG_STAT
_FM_RESET
LCD_BL_EN
DP_PWON
REMOTE_INT
CAM_PWON
MEGA_CLK
FLASH_EN
CHG_EN
_CHG_STAT
HSO_L
RPWON
UART3_RX
UART3_TX
Slicer_IN
UART3_CTS
UART3_RTS
UART3_DSR
CIF_PD
VBACKUP
JACK_DETECT
BOOT_SEL
FM_INT
DIF_VSYNC
TF_CMD
REMOTE_ADC
ULPDR_ARMBOOT_EXT
MICBIAS
HSMICBIAS
RADIO_R
RADIO_L
RCV_N
RCV_P
MIC_ABB_N
MIC_ABB_P
SDCLKX
DQSH
DQSL
SD_CS
VIBRATOR
SYSCLKEN
VBATS
MEGA_DAT0
NFOE
NFRP
NFWE
NFWP
NFADV
FCLK
SDCLK
SDCLK_EN
SBANK1
SBANK0
NSRAS
NSCAS
NSWE
NSDQMU
NSDQML
SDATA(15:0)
SADD(12:0)
FADD(25:17)
KBR(5:0)
KBC(4:0)
BT_NRST
VBUS
WAKEUP2
BT_CLK_REQ
PWON
REGEN
RPWON
SPKNA
SPKPA
JACK_TYPE
BATT_TEMPS
CLK_32K
TR_USB_DM
TR_USB_DP
LED_ABC
CLK_32K
ONNOFF
ULPDR_SYS_CLK_OUT
WAKEUP1
DAT_VP_RXD
RCV
SE0_VM_TXD
OE_INTN
UART3_DSR
JTAG_TRST
JTAG_RTCK
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
TSP_ACT0
TSP_ACT2
UART2_RX
UART2_TX
UART3_CTS
UART3_RTS
UART3_RX
UART3_TX
ULPDR_ARMBOOT_EXT
SDATA(6)
SDATA(7)
SDATA(8)
SDATA(9)
DIGITALRF_DATA
DIGITALRF_ENABLE
DIGITALRF_RF_CLK
DIGITALRF_RF_CS
DIGITALRF_RF_DATA
SIM_CLK
SIM_IO
SIM_PWRCTRL
SIM_RST
MEGA_CMD
SADD(6)
SADD(7)
SADD(8)
SADD(9)
SDATA(0)
SDATA(1)
SDATA(10)
SDATA(11)
SDATA(12)
SDATA(13)
SDATA(14)
SDATA(15)
SDATA(2)
SDATA(3)
SDATA(4)
SDATA(5)
TF_CLK
TF_DAT0
TF_DAT1
TF_DAT2
TF_DAT3
SADD(0)
SADD(1)
SADD(10)
SADD(11)
SADD(12)
SADD(2)
SADD(3)
SADD(4)
SADD(5)
KBR(4)
KBR(5)
MCBSP1_CLKX
MCBSP1_DIN
MCBSP1_DOUT
MCBSP1_FSX
MCSI1_BCLK
MCSI1_DIN
MCSI1_DOUT
MCSI1_SYNC
MCSI2_BCLK
MCSI2_DIN
MCSI2_DOUT
MCSI2_SYNC
P1_INT2
NFCS_3
SPK_EN
USB_BOOT_SEL
CHG_EN
I2C_SDA
I2C_SCL
KBC(0)
KBC(1)
KBC(2)
KBC(3)
KBC(4)
KBR(0)
KBR(1)
KBR(2)
KBR(3)
FDATA(0)
FDATA(1)
FDATA(2)
FDATA(3)
FDATA(4)
FDATA(5)
FDATA(6)
FDATA(7)
FRDY
E_DATA(10)
E_DATA(11)
E_DATA(12)
E_DATA(13)
E_DATA(14)
E_DATA(15)
E_DATA(8)
E_DATA(9)
DIF_ADS
DIF_RD
MAIN_CS
DIF_RESET
DIF_WR
FADD(17)
FADD(18)
7. CIRCUIT DIAGRAM
ME550d
- 118 -
( ==> K5E1G12ACA-D075)
VBUCK18 : NAND
FPCB_CONNECTOR LEFT
CAMERA
MOON LIGHT
NO.
Sheet/
CAM
(VBUCK18 : SDRAM CORE)
MAIN_SUB CONNECTOR
AMP OUTPUT
5
B
MIC
(VDDE18 : SDRAM I/O)
9
Checked
23
Approved
CLOSE TO SPK/RCV
Section Date
10
1
Designer
BLUETOOTH
ANALOG AUDIO AMP
LCD
MIC
C
E
FPCB_CONNECTOR RIGHT
MODEL
DRAWING
NAME
DRAWING
SAMSUNG 1G NAND +512M DDR_SDRAM
K
2007
01/24
ME550c MAIN
2/4
1.1
MEMORY / T-FLASH / SIM
MEGA_SIM
Sign & Name
Sheets
LG Electronics Inc.
D
231 645 78
KEY
Close to TRITON
4
RECEIVER
0.1u
C213
TP205
47p
8
7
INOUT_B3
INOUT_B4
6
C218
FL203 EVRC14S03Q030100R
G15G2
10
INOUT_A1
1
2
INOUT_A2
INOUT_A3
3
4
INOUT_A4
9
INOUT_B1
INOUT_B2
FL204 EVRC14S03Q030100R
G15G2
10
INOUT_A1
1
2
INOUT_A2
INOUT_A3
3
4
INOUT_A4
9
INOUT_B1
INOUT_B2
8
7
INOUT_B3
INOUT_B4
6
10
VCC
0.1u
C205
U203
FSA2267AL10X
9
1A1B0
1
1B121S
8
2A
6
3
2B0
4
2B1
2S
7
5
GND
FB201
C219
27p
1uF
C212
G1 G2
G3 G4
TP204
5
50
51
52
53
54
55
56
57
58
59
6
60
7
8
9
35
36
37
38
39
4
40
41
42
43
44
45
46
47
48
49
20
21
22
23
24
25
26
27
28
29
3
30 31
32
33
34
CN201
1
10
11
12
13
14
15
16
17
18
19
2
0R205
4
5
6
78
9
10
11
12
13
14
CN203
1
2
3
VRMEM
C204
0.1u
C216
33nF
1uFC209
FL205 EVRC14S03Q030100R
G15G2
10
INOUT_A1
1
2
INOUT_A2
INOUT_A3
3
4
INOUT_A4
9
INOUT_B1
INOUT_B2
8
7
INOUT_B3
INOUT_B4
6
OUT_P
7
PGND
PVDD
10
P_GND
11
6
SYNC
1
VDD
5
_SHDN
U202 MAX9700CETB
4
GND
IN_M
3
IN_P
2
OUT_M
9
8
C214
1uF
R291
0
7
8
9
G1 G2
G3 G4
VBAT
47
48
49
5
50
51
52
53
54
55
56
57
58
59
6
60
32
33
34
35
36
37
38
39
4
40
41
42
43
44
45
46
18
19
2
20
21
22
23
24
25
26
27
28
29
3
30 31
1
10
11
12
13
14
15
16
17
VBAT
CN202
0R202
C215
33nF
VBAT
C210 10u
47p
E9
_RAS
E7
_RE
E5
D6
_WE
F8
_WED
_WP
F5
C211
VDD4
D2
VDDQ1
F2
VDDQ2
K2
VDDQ3
C2
VSS1
VSS2
F9
G2
VSS3
VSS4
N4
B5
VSS5
N5
VSS6
VSS7
N8
E2
VSSQ1
J2
VSSQ2
L2
VSSQ3
_CAS
F7
C6
_CE
_CS
NC22
B9
NC3E8NC4
NC5
F3
F6
NC6
G4
NC7
NC8
G5
G6
NC9
E6
R__B
UDQM
H3
VCC1
B6
N7
VCC2
VCCQ
N6
VDD1
B4
VDD2
G9
H2
VDD3
M2
IO7
LDQM
G3
NC1
B2
NC10
H5
H6
NC11
NC12J3NC13
K5
K6
NC14
NC15
K7
K8
NC16
NC17
M5
M6
NC18
NC19
M7
B7
NC2
M8
NC20
NC21
N2
N9
DQ15
DQ2
C3
D4
DQ3
DQ4
D3
E4
DQ5
DQ6
E3
F4
DQ7
J4
DQ8
DQ9
K3
IO0
J5
IO1
L5
J6
IO2
L6
IO3
IO4
J7
IO5
L7
J8
IO6
L8
P10
A9
DNU2
DNU3
A10
B1
DNU4
DNU5
B10
N1
DNU6
DNU7
N10
P1
DNU8
DNU9
P2
B3
DQ0
C4
DQ1
K4
DQ10
DQ11
L3
L4
DQ12
DQ13
M3
M4
DQ14
N3
C9
A3
B8
A4
M9
A5
L9
A6
K9
A7
J9
A8
H7
H8
A9
ALE
D5
BA0
D7
D8
BA1
G8
CKE
CLE
C5
H4
CLK
DNU1
A2
P9
DNU10
DNU11
KAG004003M_DDD5
U201
A0
C7
C8
A1
A10
D9
A11
H9
A12
G7
A2
VRMEM
R204
2K
27p
C221
NA
R212
TP202
VRMEM
C220
100p
0.1u
C206
R292
0
TP207
TP210
TP206
R290
0
R201 0
47p
C217
R203 0
TP203
TP208
0.1u
C208
VRIO
C207
0.1u
VRSIM
L201 33nH
0.1u
C201
VRMEM
VRMMC
L202 33nH
0.1u
C203
0.1u
C202
TP211
TP209
TF_CLK
TF_DAT0
TF_DAT1
SDATA(15:0)
FDATA(7:0)
DQSH
DQSL
CAM_D(0)
CAM_D(2)
CAM_D(3)
I2C_SDA
CAM_MCLK
KBR(0)
KBR(1)
KBR(2)
KBR(3)
KBR(4)
KBR(5)
MAIN_KEY_BL_EN
MIC_ABB_N
MIC_ABB_P
I2C_SCL
CAM_PWON
CAM_VS
VIBRATOR
VBACKUP
CAM_D(4)
CAM_D(5)
CAM_D(6)
CAM_D(7)
CAM_RST
CAM_HS
CIF_PD
CAM_PCLK
KBC(0)
KBC(1)
KBC(2)
KBC(3)
KBC(4)
SPKNA
SPK_EN
SPKPA
SPK_AMPP
SPK_AMPN
CAM_D(1)
SYSCLKEN
BT_NRST
CLK_32K
UART_TXD
BT_RX
BT_TX
BT_RTS
BT_CTS
BT_CLK
MCSI1_DOUT
MCSI1_DIN
MCSI1_SYNC
MCSI1_BCLK
BATT_TEMP
SPK_AMPN
RCV_PP
RCV_NN
SPK_AMPP
SPK_RCV_N
MICBIAS
VBATS
SPK_RCV_N
SPK_RCV_P
BT_CLK_REQ
E_DATA(9)
E_DATA(10)
E_DATA(11)
E_DATA(12)
E_DATA(13)
E_DATA(14)
E_DATA(15)
MAIN_CS
DIF_RESET
DIF_ADS
DIF_WR
LCD_ID
SPK_RCV_P
SPK_EN
RCV_P
RCV_N
RCV_PP
RCV_NN
SIM_RST
SIM_CLK
SIM_PWRCTRL
SIM_IO
MEGA_DAT0
MEGA_CLK
MEGA_CMD
E_DATA(15:8)
E_DATA(8)
LED_ABC
DIF_RD
FLASH_EN
DIF_VSYNC
LCD_BL_EN
DP_PWON
VCAM18_EN
PWON
TF_DAT2
TF_DAT3
TF_CMD
VCAM28_EN
SDCLKX
SADD(2)
SADD(3)
SADD(4)
SADD(5)
SADD(6)
SADD(7)
SADD(8)
SADD(9)
SADD(10)
SADD(11)
SADD(12)
FDATA(4)
FDATA(5)
FDATA(6)
FDATA(7)
NFCS_3
FADD(17)
FADD(18)
NFOE
NFWE
FRDY
NFWP
SADD(12:0)
SADD(0)
SADD(1)
SDATA(14)
SDATA(15)
SD_CS
SBANK0
SBANK1
SDCLK_EN
NSCAS
NSRAS
NSWE
NSDQML
NSDQMU
SDCLK
FDATA(0)
FDATA(1)
FDATA(2)
FDATA(3)
SDATA(0)
SDATA(1)
SDATA(2)
SDATA(3)
SDATA(4)
SDATA(5)
SDATA(6)
SDATA(7)
SDATA(8)
SDATA(9)
SDATA(10)
SDATA(11)
SDATA(12)
SDATA(13)
7. CIRCUIT DIAGRAM
ME550d
A
B
C
D
- 119 -
E
RX
TX
45
A
Checked
Approved
MODEL
Section
(UART3 <=> Bluetooth)
12
ANALOG SWITCH
BOOT SELECT
Designer
LG Electronics Inc.
34
DRAWING
NAME
DRAWING
NO.
Sheet/
Sheets
5 678
C
D
18Pin IO Connector
0(COM-NC)
1(COM-NO)
MAX47*
91 0
1
23
ANALOG SWITCH
ON BOARD JTAG INTERFACE
(UART3 <=> Remote control))
B
FM RADIO
OVP
27p
K
2007
01/24
ME550c MAIN
3/4
1.1
IO CONNECTOR & UART
Date Sign & Name
TP308
C323
TP307
TP303
TP306
100K
R317
C318
1uF
FB301
16
17
18
19
2
20
21
22
3
4
5
6
7
8
9
CN301
1
10
11
12
13
14
15
VBAT
TP302
R325
100K
0.1u
C320
NA
EVLC14S02050
VA302
C317
C321
0.1u
C312 C313
4.7u
VRIO
0.47u
100KR307
10K
R332
0R318
10
5
_RST
6
_SEN
VRIO
12
GND3
15
GPIO1
19
18
GPIO2
GPIO3
17
14
LOUT
NC1
1
20
NC2
PGND
21
9
RCLK
3
RFGND
13
ROUT
SCLK7SDIO
8
16
VA
11
VD
VIO
VRIO
U304
SI4703-B16-GM
2
FMIP
4
GND1 GND2
20K
R334
2.4K
R312
R323
56K
0.1uC314
C324
VRIO
VRABB
47p
TP309
TP310
100pC315
10u
C303
20K
R329
VA301
EVLC14S02050
R313 100K
R311 NA
0.1u
C325
NO1
3
NO2
NO3
7
11
NO4
17
PGND
V+
14
VCHG_IN
VCHG
VBAT
COM1
16
COM2
4
COM3
8
COM4
12
GND
6
2
IN1-2
10
IN3-4
NC1
1
NC2
5
NC3
9
NC4
13
15
U305
ISL8499IRZ-T
VRIO
R333
10K
ESD1
A1
A3
ESD2C1ESD3
ESD4
C3
GND
B2
VBAT
CSPESD304G
D301
TP301
TP305
75
R31
C311
0.1u
10K
R336
R306 100K
C301
120p
NA
R390
100nH
L303
VRIO
0.1u
R319
20K
C316
R335
NA
R320 0
2
3
1
R32
75
Q301
2SC5585
G4
33K
R330
26
27
28
29
30
17
18
19
20
21
22
23
24
G1 G2
G3
10
11
12
13
14
15
2
3
4
5
6
7
8
9
16
25
CN302
1
5
VCC
VRIO
VRIO
FB302
U306
TC7SH04FS
2
GND
14
VCHG_IN
120p
L304
100nH
C310
C307
47p
47p
C305C304
82p
C306
82p
VRABB
C308
0.1u
R314 47
TP304
COM2
COM3
8
12
COM4
6
GND
IN1_IN2
2
IN3_IN4
10
NC1
1
5
NC2
9
NC3
NC4
13
NO1
15
NO2
3
7
NO3
11
NO4
PGND
17
14
V+
R310
MAX4701ETE+T
U303
COM1
16
4
VBAT
3K
R322
10K
8
GATE
GATE_OUT
9
2
GND
IN1
1
IN2
4
5
IN3
NC1
11
12
NC2
6
OUT1
OUT2
7
10
_EN
_FLAG
3
U302 NCP348MTR2G
C319
1uF
R328
47K
0.1u
C322
120p
C302
I2C_SCL
I2C_SDA
FM_ANT
CLK_32K
VBUS
FM_ANT
BATT_TEMPS BATT_TEMP
_FM_RESET
RADIO_L
FM_INT
RADIO_R
BT_RTS
TR_USB_DM
TR_USB_DP
VBUS
REMOTE_INT
UART_RXD
UART_TXD
REMOTE_ADC
JTAG_TCK
JTAG_RTCK
JTAG_TDO
UART3_RX
UART3_TX
UART3_CTS
UART3_RTS
BT_NRST
BT_NRST
UART_RXD
UART_TXD
UART_CTS
UART_RTS
BT_RX
BT_TX
BT_CTS
VBATS
JTAG_TRST
JTAG_TDI
JTAG_TMS
HSMICBIAS
UART3_DSR
UART2_TX
VBUS
JACK_TYPE
BOOT_SEL
USB_BOOT_SEL
HSO_R
HSO_L
JACK_DETECT
RPWON
UART2_RX
HOOK_DETECT
HSMICIP
7. CIRCUIT DIAGRAM
ME550d
A
B
C
D
- 120 -
0.5p
C416
VRIO
8dB ATT
(NC)
SFAY00009801
4
C
D
(NC)
7
Sheet/
Sheets
(NC)
LDO Supplies
MODEL
DRAWING
Section
A
1
Designer
Date
Approved
E
SYSCLK
2.2nH
R408
A
B
(DBB)
(DBB)
B
NO.
23
LG Electronics Inc.
(DBB)
6
1
NAME
89 10
Checked
3
(NC)
DRAWING
(DBB)
8dB ATT
SMPY0014901
(DBB)
(ABB)
C
D
45
(NC)
EUSY0316801
2
0.01u
LEE
2007
01/24
ME550d MAIN
4/4
1.1
RF_RENESAS
Sign & Name
5
C411
7
PGND
C424
1p
U405TPS79928DRVR
4
EN GND
3
6
IN
NC5NR
2
1
OUT
C407
C405
3.9p
3.9p
2
A
GND
3
5
VCC
4
Y
_OE
1
R407
0
SN74LVC1G125DRLR
U402
R413 0
0.1u
C408
R405
47K
120
R411
C403
0.01u
C_VCCRF
22p
C410
C431
0.5p
51
R415
C419
R412
120
0.01u
C401
0.01u
R414
51
33p
C415
C418
56p
10u
C427
R418
100
0.01u
C421
22p
VCC_SYN
C404
22p
C429
0.01u
C428
1nHR420
R419 4.7nH
ANT403
33nF
C406
VRIO
EN
43
GND
IN
6
5
NC2NR
OUT
1
PGND
7
C_VCCRF
TPS79928DRVR U406
C425
NA
0.1u
C433
C417
0.1u
NA
26MHz
12
34
C412
0.01u
X401FA-23H
VCC_SYN
C422
R416
120
22p
C430
VCC_SYN
120
R417
15p
C420
C414 0.01u0.01uC413
22
GSM850RX1
12
13
GSM850RX2
18
PCSRX1
PCSRX2
19
3
VC_DCSPCSTX
VC_EGSMGSM850TX
11
C_VCCRF
VBAT
DCSRX2
10
EGSMGSM850TX
EGSMRX1
14
15
EGSMRX2
GND1
2
23
GND10
GND11
24
GND12
25
26
GND13
GND2
4
6
GND3
GND4
7
GND5
8
GND6
9
20
GND7
21
GND8
GND9
HWXR693
FL401
1
ANT
DCSPCSTX
5
DCSRX1
16
17
C409
68p
ANT402
C423
1000p
C437
200
R401
2.2u
3
GND
2IN4
OUT
VCC
5
C435
2.2u
U401
SN74AHC1GU04DCKR
C434
0.01u
NA
C426
VRIO
8.2nH
R406
NA
C432
D9
VCCMIX
B3
VCCRFLO
A3
VCCRFSYN
A7
A5
VCCRFVCO
J4
VCCTX1
VCCTX2J5VCCTXVCO
J6
C9
VCCVCXO
A8
VCCVCXOR
B8
VCXTCXO
VOUTEF1
D8
VOUTEF2
D7
XON
B9
A9
XOP
G7
STROBE
E8
F8
SYSCLK
SYSCLKEN
J9
TEST1
G6
TXBANDF3TXMODE
G4
H2
TXON
J8
TXOUTD
TXOUTG
J7
H8
VBAT_IN
A6
VCCAD
VCCBB
B6
J3
VCCFEMC
A2
VCCLNA
E9
VCCLOGIC1
VCCLOGIC2
C7
C5
GNDRFVCO
GNDTX2
G5
H6
GNDTXVCOD
GNDTXVCOD_B
H7
C8
GNDVCXO_OR
A4
IOUTB_IINB
B4
IOUT_IIN
LDO_CONT
H4
C2
PCSDCSGND
PCSGND
B2
PCSLNAI
A1
PCSLNAIB
B1
QOUTB_QINB
B5
C4
QOUT_QIN
RXTXDATA
F9
RXTXEN
J1
H5
EAMPIB
FEMC1
H3
G3
FEMC2
F2
G85GND
G85LNAI
G1
H1
G85LNAIB
E2
G90G85GND
E1
G90LNAI
F1
G90LNAIB
GNDBBAD
C6
E3
GNDDMIXIN
GNDLNA_TX1
G2
GNDLOGIC
E7
GNDMIX
D3
C3
GNDRFLO
GNDRFSYN
R2A60167BG
U403
B7
CAFC
CLOGIC1
F7
CTRLCLK
H9
CTRLDATA
G8
G9
CTRLEN
DCSG90GND
D2
C1
DCSLNAI
D1
DCSLNAIB
DMIXIN
J2
DMIXINB
VLDO
15
5
VRAMP
3
VREG
0
R410
48
PGND2449PGND25
27
PGND3
PGND4
28
29
PGND5
PGND630PGND7
31
32
PGND8
PGND9
33
7
PIN_GSM
1
PIN_XCS
POUT_GSM
13
POUT_XCS
19
6
TX_ON
16
VBAT1
VBAT2
17
25
PGND1
34
PGND10
PGND11
35
36
PGND12
37
PGND13
PGND14
38
39
PGND15
PGND1640PGND17
41
42
PGND18
PGND19
43
PGND2
26
44
PGND2045PGND2146PGND22
PGND23
47
RPF09036B
U404
BAND_SELECT
2
COUPLER_OUT_GSM
12
COUPLER_OUT_XCS
20
GND1
24
11
GND10
23
GND2
GND3
22
21
GND4
18
GND5
GND6
4
14
GND7
GND8
8
10
GND9
9
NC
C_VCCRF
1000p
C402
1M
R403
C436
VBAT
G1
G2
RF
0.01u
KMS-507
SW401
ANT
Slicer_IN
REGEN
BT_CLK
DIGITALRF_ENABLE
SYSCLKEN
DIGITALRF_RF_DATA
DIGITALRF_RF_CS
DIGITALRF_RF_CLK
DIGITALRF_DATA
7. CIRCUIT DIAGRAM
- 121 -
4
NO.
Sheet/
Checked
C
D
Delete R120 after PV EVENT
MEGA SIM SOCKET
6 894
Sheets
LG Electronics Inc.
512
D
MODEL
B
Iss.
10
1
B
C
3
Date
Sign & Name
Name
2
Notice No.
Section
E
A
5
A
Designer
7
Date
3
DRAWING
NAME
DRAWING
01/23
2007
K
MIC & SIM & KeyLED & B/T & Batt.Con
1/2
ME550c Main Key
Approved
BLUETOOTH (Shielding Block)
Connect the digital and analog ground in the 4 layer, do not connect on the top layer
For ECM MIC Test
BATTERY TERMINAL
NOT MOUNT
1.1
120
R129
ANT100
1
234
0
R110
LEBB-S14H
LED100
CN100
C112
10KR113
0.1u
NA
VBAT
C110
C100
100p
VA100
EVLC14S02050
R124 120
2
URST
1
VDD
6
VPP_MMC_CLK
VBAT
R109 NA
J100
5
GND
9
GND1GND2
10
MMC_CMD
8
MMC_DAT
4
UCLK
37
UIO
C101
NA
R122
NA
R120
120
LED104
MIC100
SP0204LE5-PB
2
G1
G2
3
G3
5
OUT
1
4
PWR
0R119
V_28
150p
C120
C106
27p
C107
4.7u
4.7u
C116
10K R102
VRIO
CE
6
2
GND1
5
GND2
4
NC
VDD
13
VOUT
C104
0.1u
R1114D281D-TR-FU100
ZD100
1uF
GRM36Y5V105Z6.3PT
C118
1u
C123
150p
LED108
LED106
C117
0.1u
LED107
C115
45
6
7
8
KA_OUT
0.1u
SC100
1
2
3
0R117
ANA_OUT
1u
C103
DBF81H903
4
BL1
BL2
5
DC
2
6
GND1
GND2
7
8
GND3
NC
1
UNBL
3
1u
C119
FB100
R114 NA
120R125
22p
C122
0.1u
100nH
L100
C121
LED102
NAR111
LED103
LED105
VBAT
C124
100p
R118 NA
120
C114
R127
NA
R123 120
C108
VLDO_OUT
VLDO_OUT
47p
LED101
R128
120
R126
C113
NA
VBAT
120
C111
10u
C102
0.1u
100nH
L102
L101
100nH
RFIO_OUT
NA
RFIO_OUT
ANA_OUT
R115
R121
NA
ANT101
VRSIM
TP100
R116 24
R130
0.1u
120
KA_OUT
C105
XTALP_FAST_CLK_IN
C109
27p
A3
H8
VDD_IO_SF1
VDD_IO_SF2
B3
G5
VLDO_OUT
VSS1H7VSS2
A5
B8
VSS3G8VSS4A2VSS5H4VSSA1
VSSA2D1VSSA3
F3
G2
VSSA4
VSSA5
G1
F4
VSSA6
XTALM
E1
E2
KA_OUT
NSHUT_DOWN
E3
G3
OSC_LDO_OUT
RFIO_LDO_OUT
F2
H2
RFM
RFP
H1
F6
SLOW_CLK_IN
G4
TL_LDO_OUT
A8
TX_DBG
H6
VBAT
C2
VDD_IN_ANA
VDD_IN_BB
F5
VDD_IN_OSC
H3
VDD_IN_RFIO
F1
D8
VDD_IO1
VDD_IO2-1
G7
VDD_IO2-2
HCI_RX
HCI_TX
E5
IO0_EXT_CLK_REQ_OUT
D7
IO14
B4
IO15
F7
C6
IO1_EXT_CLK_REQ_IN
IO2_SCL
B7
IO3_SDA
D5
A6
IO4
C4
IO5
C8
IO7
D6
JTAG_SEL
D4
JTAG_TCK
JTAG_TDI
C3
E6
JTAG_TDO
JTAG_TMS
B5
G6
B2
ANATEST1
C1
ANATEST2
D2
ANA_LDO_OUT
B6
AUD_CLK
AUD_FSYNC
A7
AUD_IN
C5
AUD_OUT
C7
A4
BB_LDO_OUT1
BB_LDO_OUT2
H5
F8
BB_LDO_OUT3
BGAP_IA1BGAP_V
B1
E8
HCI_CTS
HCI_RTS
E7
E4
C125
U101
BRF6150HZSL
10u
820R108
BT_CTS
BT_RTS
MCSI1_DIN
MCSI1_DOUT
MCSI1_SYNC
MCSI1_BCLK
RF_P
RF_M
BT_NRST
BT_RX
BT_TX
UART_TXD
SYSCLKEN
BT_CLK
CLK_32K
BT_CLK_REQ
MIC_ABB_P
MIC_ABB_N
MAIN_KEY_BL_EN
VBATS
BATT_TEMP
SIM_IOSIM_CLK
SIM_RST
MEGA_DAT0_28
MEGA_CLK_28
MEGA_CMD_28
SIM_PWRCTRL
MICBIAS
RF_M
RF_P
7. CIRCUIT DIAGRAM
ME550d
n.
- 122 -
1
Notice No.
1
Designer
5
Date
NO.
Sheet/
7
Sheets
4
6
D
E
1
NOT MOUNT
78
A
2
Date
9 SHP
1.1
45 6
B
C
Section
SIDE_KEY_VOL
Sign & Name
Checked
Approved
MODEL
DRAWING
NAME
DRAWING
Name
SIDE_KEY_CAM+PWON
Iss.
LG Electronics Inc.
258
0
3
4
01/23
2007
K
FM & CONN & KEY
2/2
ME550c Main Key
103
AST
KEYPAD
23
9
EVLC5S02100
VA203
R207 150
VA209
R205
EVLC5S02100
150
C200
NA
C201
NA
VA211
205
VBAT
6
7
8
9
G1 G2
G3 G4
VA200
EVLC5S02100
1
10 11
12
13
14
15
16
17
18
192
20
3
4
5
204
CN200
150
R202
200
203
207
150R208
AST
EVLC5S02100
VA210
VA202
9
30
31
32
33
34
35
36
37
38
39
4
40
5
6
7
8
16
17
18
19
2
20 21
22
23
24
25
26
27
28
29
3
G1 G2
G3 G4
1
10
11
12
13
14
15
CN201
VA207
VA208
EVLC5S02100
CN202
1
2
3
4
150
R200
202
EVLC5S02100
VA205
VRIO
150R209
150
150R203
R206
VRIOV_28
R210 150
EVLC5S02100
VA206
R211 150
R201
150
R212
NA
A1
A2
A2
A3
A3
A4
A4
B1
C1
B2
C2
C3B3C4
B4
GND
B4
OE
B3
B2
VCCA
VCCB
B1
SHP
TXS0104EZXUR
U200
A1
209
VRSIM
208
R204 150
VA204
206
EVLC5S02100
3
4
VA201
EVLC5S02100
201
CN203
1
2
MEGA_DAT0
MEGA_CLK
MEGA_CMD
BT_CLK_REQ
CLK_32K
BT_NRST
SYSCLKEN
MEGA_CLK_28
PWON
MEGA_CMD_28
KBC(0)
MCSI1_BCLK
MCSI1_DIN
MCSI1_SYNC
MCSI1_DOUT
KBC(1)
BT_CLK
BT_CTS
BT_RTS
UART_TXD
BT_RX
BT_TX
KBC(2)
KBC(3)
VBATS
BATT_TEMP MAIN_KEY_BL_EN
SIM_RST
SIM_CLK
SIM_PWRCTRL
SIM_IO
KBC(2)
KBC(1)
KBC(0)
KBC(3)
PWON
KBR(0)
KBR(1)
KBR(2)
KBR(3)
MIC_ABB_N
MIC_ABB_P
MICBIAS
MEGA_DAT0
MEGA_CLK
MEGA_CMD
MEGA_DAT0_28
KBR(3)
KBR(1)
KBR(2)
KBC(2)
KBC(1)
KBC(0)
KBR(0)
7. CIRCUIT DIAGRAM
ME550d
A
B
C
D
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