( ● ) Preliminary Specification
( ● ) Final Specification
LM240WU4
Liquid Crystal Display
Product Specification
SPECIFICATION
FOR
APPROVAL
24.0” WUXGA TFT LCDTitle
BUYER
MODEL
www.jxlcd.com
www.jxlcd.com
APPROVED BY
/
/
/
SIGNATURE
DATE
SUPPLIERLG Display Co., Ltd.
*MODELLM240WU4
SUFFIXSLA1
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
REVIEWED BY
PREPARED BY
SIGNATURE
DATE
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 1.0Apr. 21 . 2008
MNT Products Engineering Dept.
LG. Philips LCD Co., Ltd
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LM240WU4
4
OPTICAL SFECIFICATIONS
72EMC
29
Liquid Crystal Display
Product Specification
Contents
NoITEMPage
COVER
CONTENTS
RECORD OF REVISIONS
1GENERAL DESCRIPTION
2ABSOLUTE MAXIMUM RATINGS
3ELECTRICAL SPECIFICATIONS
3-1ELECTRICAL CHARACTREISTICS
3-2INTERFACE CONNECTIONS
3-3SIGNAL TIMING SPECIFICATIONS
3-4SIGNAL TIMING WAVEFORMS
3-5COLOR INPUT DATA REFERNECE
3-6POWER SEQUENCE
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3-7POWER SEQUENCE FOR INVERTER
5MECHANICAL CHARACTERISTICS
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1
2
3
4
5
6
6
8
14
15
16
17
18
19
25
6RELIABLITY
7INTERNATIONAL STANDARDS
7-1SAFETY
-
8PACKING
8-1DESIGNATION OF LOT MARK
8-2PACKING FORM
8-3PALLET FORM32
9PRECAUTIONS33
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Product Specification
18
(
)
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UpdatedthePackingForm
RECORD OF REVISIONS
LM240WU4
Liquid Crystal Display
Revision
No
0.0Oct.19. 2007-First Draft(Preliminary)
0.1Dec. 20. 20074,6,25TBD is update
1.0Apr. 21. 20084Update the Power Consumption
Revision DatePageDescription
Change the Inverter Power Sequence
T1 Min 1→20, T2 Min 200→500
19
26,27
7Update the Inverter Input Current, Power
8
13
19Update the Chromaticity
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26, 27
Change the Min CR (600→700), Tr/Tf (TBD/TBD→6.0/7.0)
Update the Mechanical Drawing (Tilt 1.0→1.4)
: Inverter Input CNT is moved 4mm inside
Change the Inverter Vbr Min Vlotage (0V→0.3V)
Change the T2 Refer page (page 14 → page 17)
Change the Inverter Vbr Min Vlotage (0V→0.3V)
Updated the Mechanical Drawing
Ver. 1.0Apr. 21 . 2008
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LM240WU4
LM
240WU4isa
Color
Active
Matrix
Liquid
Crystal
Display
withanintegral
Cold
Cathode
Fluorescent
high
high
T
Controller
(H)
)
+24.0V
()()()(yp)
Power Consumption
Total
82
Watt (Typ.) ( 7.02 Watt
@V
LCD
8Watt@V
)
Liquid Crystal Display
Product Specification
1. General Description
Lamp(CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 24inch diagonally measured
active display area with WUXGA resolution (1200 vertical by 1920 horizontal pixel array)
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the brightness of the sub-pixel color is determined with a 8-bit gray scale signal for each dot,
thus, presenting a palette of more than 16,7M(True) colors.
It has been designed to apply the 8Bit 2 port LVDS interface.
It is intended to support displays where high brightness, super wide viewing angle,
color saturation, and
color are important.
RGB
LVDS
2port
+12.0V
GND
CN1
(30pin)
+12.0V
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CN2
(14Pin)
Timing
Power Circuit
Block
Inverter
Block
2pin x 7CNs (High)
Gate
Driver Circuit
General Features
Active Screen Size24.1 inches(61.32cm) diagonal
Outline Dimension546.4
Pixel Pitch0.270 mm x 0.270 mm
x 352.0(V) x 40.3(D) mm(Typ.
Source Driver Circuit
S1S1920
G1
FT - LCD Panel
(1920 × RGB × 1200 pixels)
G1200
Back light Assembly
(U-Shape 7CCFL)
Pixel Format1920 horiz. By 1200 vert. Pixels RGB stripes arrangement
It requires two power inputs. One is employed to power the LCD electronics and to drive the TFT array and
liquid crystal. The second input power for the CCFL, is typically generated by an inverter. The inverter is an
external unit to the LCDs.
Table 2-1. ELECTRICAL CHARACTERISTICS
Values
MinTypMax
MODULE :
Power Supply Input VoltageV
Permissive Power Input RippleV
Power Supply Input CurrentI
Power Consumption
Rush currentIRUSH--3.0A4
Note :
1. Permissive power ripple should be measured under V
2. The specified current and power consumption are under the V
whereas mosaic pattern(8 x 6) is displayed and f
3. The current is specified at the maximum current pattern.
4. The duration of rush current is about 2ms and rising time of power Input is 1ms(min.).
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LCD11.412.012.6Vdc
RF400mVp-p1
LCD
PLCD TYP-7.028.07Watt2
PLCD MAX-9.1810.56Watt2
-585673mA2
-765880mA3
=12.0V, 25 ± 2°C,fV=60Hz condition and At that
LCD
=12.0V, 25 ± 2°C,fV=60Hz condition
is the frame frequency.
V
LCD
.
White Pattern
< Permissive Power Input Ripple (V
Ver. 1.0Apr. 21 . 2008
=12.0V, 25 ± 2°C,f
LCD
Black Pattern
=60Hz) >
V
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Typical current pattern
(White : 255Gray, Black : 0Gray)
p
value at the typical lamp current on condition of continuous operating at 25
±
2
C
LM240WU4
Liquid Crystal Display
Product Specification
Maximum current pattern
Mosaic Pattern(8 x 6)
< Power consumption (V
Table 2-2. INVERTER ELECTRICAL CHARACTERISTICS
ParameterSymbolCondition
Inverter :
Input VoltageV
Input CurrentI
Input PowerP
B/L on/off controlV
Brightness AdjV
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LAMP :
Life time
DDB
B
ON/OFF
BR
V
= 3.3V
VBR= 3.3V
Lamp ON = High
Lamp OFF =Low
=12.0V, 25 ± 2°C,f
LCD
White Pattern
=60Hz) >
V
Values
Min.Typ.Max.
2224.026V1
-2.73.2A2
-64.884.5Watt2
2.0-5.0V
0.0-0.8V
0.3-3.3V3
40,000Hrs4
UnitNotes
Notes :
1. The input voltage ripple is limited below 400mVp-p.
2. The specified current and power consumption are under the typical supply Input voltage, 24V.
3. Dimming Start voltage will be set at 3.2V±3%(0.096V) considering IC and components deviation.
4. The life is determined as the time at which luminance of the lamp is 50% compared to that of initial
5. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately
30min in a dark environment at 25 °C± 2°C.
6. In case of the difference in measured values due to the difference
of measuring device was found, correlated value will be used after discussions between both parties.
Ver. 1.0Apr. 21 . 2008
°
.
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Liquid Crystal Display
ypy
p
11
FR3P
Plus signal of odd channel 3 (LVDS)
26
OPEN
NC
Product Specification
3-2. Interface Connections
3-2-1. LCD Module
-LCD Connector(CN1). : KDF71G-30S-1H (Manufactured by HIROSE) or Equivalent
ISL100-L30B-C23(UJU), GT103-30S-H23 (LS cable)
- Mating Connector : FI-XC30C2L (Manufactured by JAE) or Equivalent
Table 3 MODULE CONNECTOR(CN1) PIN CONFIGURATION
NoSymbolDescriptionNoSymbolDescription
LM240WU4
1FR0M
2FR0P
3FR1M
4FR1P
5FR2M
6FR2P
7 GND
8FCLKINM
9FCLKINP
10 FR3M
12 SR0M
13 SR0P
14 GND
15 SR1M
Minus signal of odd channel 0 (LVDS)
Plus signal of odd channel 0 (LVDS)
Minus signal of odd channel 1 (LVDS)
Plus signal of odd channel 1 (LVDS)
Minus signal of odd channel 2 (LVDS)
Plus signal of odd channel 2 (LVDS)
Ground
Minus signal of odd clock channel (LVDS)
Plus signal of odd clock channel (LVDS)
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Minus signal of odd channel 3 (LVDS)
Minus signal of even channel 0 (LVDS)
Plus signal of even channel 0 (LVDS)
Ground
Minus signal of even channel 1 (LVDS)
16 SR1P
17 GND
18 SR2M
19 SR2P
20 SCLKINM
21 SCLKINP
22 SR3M
23 SR3P
24 GND
25 OPEN
27 DCR_OUT
ODC on/off
28
29 VLCD
30 VLCD
Plus signal of even channel 1 (LVDS)
Ground
Minus signal of even channel 2 (LVDS)
Plus signal of even channel 2 (LVDS)
Minus signal of even clock channel (LVDS)
Plus signal of even clock channel (LVDS)
Minus signal of even channel 3 (LVDS)
Plus signal of even channel 3 (LVDS)
Ground
NC
Dynamic C/R output
ODC_ON_OFF_Control [* note 4 ]
L : ODC_ON , H : ODC_OFF
Default : ODC_ON ( No connection)
Power Supply +12.0V
Power Supply +12.0V
Note: 1. All GND(ground) pins should be connected together and to Vss which should also be connected to
the LCD’s metal frame.
2. All V
Ver. 1.0Apr. 21 . 2008
LCD (power input) pins should be connected together.
3. Input Level of LVDS signal is based on the IEA 664 Standard.
4. In ODC off Case , When Power Start up, Sequence must keep as : V
* T2 : Time interval between V
LCD > T2 > ODC_OFF (‘H’)
LCD and RGB data, refer to page 17.
User Connector Diagram
1
30
#1#30
Rear view of LCM
KDF71G-30S-1H(HIROSE)
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LM240WU4
16
TTL Input (B6)
D1644Power Supply for LVDS
LVDS V
CC
T
T
Liquid Crystal Display
Product Specification
Table 4. REQUIRED SIGNAL ASSIGNMENT FOR Flat Link (TI:SN75LVDS83) Transmitter
Pin #Require SignalPin NamePin #Require SignalPin Name
1Power Supply for TTL InputVCC29Ground pin for TTLGND
2TTL Input (R7)D530TTL Input (DE)D26
3TTL Input (R5)D631TTL Level clock InputTXCLKIN
4TTL Input (G0)D732Power Down InputPWR DWN
5Ground pin for TTLGND33Ground pin for PLLPLL GND
6TTL Input (G1)D834Power Supply for PLLPLL VCC
7TTL Input (G2)D935Ground pin for PLLPLL GND
8TTL Input (G6)D1036Ground pin for LVDSLVDS GND
9Power Supply for TTL InputVCC37Positive LVDS differential data output 3
10TTL Input (G7)D1138Negative LVDS differential data output 3