LG LM-230WF2-SLB1 Service manual

( ) Preliminary Specification
( ● ) Final Specification

LM230WF2

Liquid Crystal Display

Product Specification

SPECIFICATION

FOR

APPROVAL

BUYER

MODEL

www.jxlcd.com

www.jxlcd.com

APPROVED BY

/

/

Viewsonic

SIGNATURE

DATE

23” Full HD TFT LCDTitle

LG Display Co., Ltd.SUPPLIER

LM230WF2*MODEL

SLB1SUFFIX

*When you obtain standard approval,

please use the above model name without suffix

APPROVED BY

H. S. Kim / G.Manager

REVIEWED BY

D. I. Chung / Manager [C]

J. H. Lee / Manager [M]

SIGNATUR

E DATE

/

Please return 1 copy for your confirmation with

your signature and comments.

Ver. 1.0 Aug. 17. 2009

G.T. Kim / Manager [P]

PREPARED BY

J.H. Oh / Engineer

MNT Products Engineering Dept.

LG Display Co., Ltd

1 / 32

Product Specification

Contents

LM230WF2

Liquid Crystal Display

COVER

CONTENTS

RECORD OF REVISIONS

GENERAL DESCRIPTION1

ABSOLUTE MAXIMUM RATINGS2

ELECTRICAL SPECIFICATIONS3

ELECTRICAL CHARACTREISTICS3-1

INTERFACE CONNECTIONS3-2

SIGNAL TIMING SPECIFICATIONS3-3

SIGNAL TIMING WAVEFORMS3-4

COLOR INPUT DATA REFERNECE3-5

POWER SEQUENCE3-6

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V

LCD

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Power Dip Condition3-7

ITEMNo

Page

1

2

3

4

5

6

6

9

14

15

16

17

18

OPTICAL SFECIFICATIONS4

MECHANICAL CHARACTERISTICS5

RELIABLITY6

INTERNATIONAL STANDARDS7

SAFETY7-1

EMC7-2

ENVIRONMENT7-3

PACKING8

DESIGNATION OF LOT MARK8-1

PACKING FORM8-2

PRECAUTIONS9

19

25

28

29

29

29

29

30

30

30

31

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Product Specification

RECORD OF REVISIONS

LM230WF2

Liquid Crystal Display

Revision

No

DescriptionPageRevision Date

First Draft(Preliminary)-Mar. 31. 20090.0

Update Power & Weight Spec4May. 06. 20090.1

Change Electrical Specification Format & Update Power Consumption6,7,8May. 06. 20090.1

Add Note 49May. 06. 20090.1

Add Note 210May. 06. 20090.1

Add AC specification11May. 06. 20090.1

Delete LVDS 1port Format12May. 06. 20090.1

Change Timing Format & Update Timing Spec14May. 06. 20090.1

Add VLCD Power Dip Condition18May. 06. 20090.1

Delete Viewing Angle_Effective19May. 06. 20090.1

Add GSR & WPT19May. 06. 20090.1

Update Response Time19May. 06. 20090.1

Update Note 1~820May. 06. 20090.1

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Add GTG table21May. 06. 20090.1

Update Gray scale24May. 06. 20090.1

Update Weight25May. 06. 20090.1

Add Maximum storage Humidity28May. 06. 20090.1

Update Color Coordinates19July. 03. 20090.2

Add Color Gamut of CG, CIE197619July. 03. 20090.2

Update International Standards_ Safety & EMC & Environment29July. 03. 20090.2

Update Input Current6July. 03. 20090.2

Final Specification-Aug. 17. 20091.0

Update the connector(CN1) maker9

Update the min luminance.19

Update the GSR calculation method20

Update the bezel area dimension (one decimal places)25

Update the Rear view drawings27

Update operating precautions. (No 10.)31

Ver. 1.0 Aug. 17. 2009

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LM230WF2

Liquid Crystal Display

Product Specification

1. General Description

LM230WF2 is a Color Active Matrix Liquid Crystal Display with an integral Cold Cathode Fluorescent
Lamp(CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 23 inch diagonally measured
ac tiv e di sp l ay ar ea wi th FH D re s o l ut i o n (1 0 80 ver t i ca l by 192 0 ho ri zo n ta l pix e l ar ra y)
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the brightness of the sub-pixel color is determined with a 8-bit gray scale signal for each dot,
thus, presenting a palette of more than 16,7M colors with A-FRC(Advanced Frame Rate Control).
It has been designed to apply the 8Bit 2 port LVDS interface.
I t i s i n t e n de d to sup p or t di s pl a ys whe r e hi g h br ig h t n es s , su pe r w i d e vi e w i n g an g l e,
high color saturation, and high color are important.

LVDS

2port

CN1

(30pin)

+12.0V

+12.0V

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V

Lamp

General Features

RGB

Timing

Controller

Power Circuit

Block

CN2, 3(2PIN)

CN4, 5(2PIN)

[ Figure 1 ] Block diagram

23 inches(58.42cm) diagonalActive Screen Size

Source Driver Circuit

S1 S1920

G1

Gate Driver Circuit

TFT - LCD Panel

(1920 × RGB × 1080 pixels)

G1080

Back light Assembly

(4CCFL)

533.2(H) x 312.0(V) x 17.0(D) mm(Typ.)Outline Dimension

0.265 mm x 0.265 mmPixel Pitch

1920 horiz. By 1080 vert. Pixels RGB stripes arrangementPixel Format

16,7M colorsColor Depth

250 cd/m

View Angle Free (R/L 178(Typ.), U/D 178(Typ.))Viewing Angle(CR>10)

Total 31.07 Watt (Typ.) ( 5.57 Watt @VLCD, 25.5 Watt @250cd/㎡])Power Consumption

3000 g (typ.) Weight

Transmissive mode, normally blackDisplay Operating Mode

Hard coating(3H), Anti-glare treatment of the front polarizerSurface Treatment

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2

( Center 1 points)Luminance, White

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LM230WF2

Liquid Crystal Display

Product Specification

2. Absolute Maximum Ratings

The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Notes

Power Input Voltage

Operating Temperature

Storage Temperature

Operating Ambient Humidity

Storage Humidity

Note : 1. Temperature and relative humidity range are shown in the figure below.

Wet bulb temperature should be 39 °C Max, and no condensation of water.

Note : 2. Maximum Storage Humidity is up to 40℃, 70% RH only for 4 corner light leakage Mura.

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Symbol

Values

MaxMin

500TOP

60-20TST

90%

60

60%

Units

at 25 ± 2°CVdc14-0.3VLCD

°C

°C

%RH9010HOP

%RH9010HST

1, 2

Wet Bulb
Temperature [C]

10

0

10 20 30 40 50 60 70 800-20

Dry Bulb Temperature [C]

20

30

40

50

40%

10%

Storage

Operation

Humidity [(%)RH]

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LM230WF2

Liquid Crystal Display

Product Specification

3. Electrical Specifications

3-1. Electrical Characteristics

It requires two power inputs. One is employed to power the LCD electronics and to drive the TFT array and
liquid crystal. The second input power for the CCFL, is typically generated by an inverter. The inverter is an
external unit to the LCDs.

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol

MODULE :

Differential Impedance

Power Consumption

LAMP :

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Life Time

at 25 °C

at 0 °C

ILCDPower Supply Input Current

VBLOperating Voltage

PBLPower Consumption

Zm

IBLOperating Current

VsEstablished Starting Voltage

fBLOperating Frequency

TsDischarge Stabilization Time

50,000

Values

MaxTypMin

11010090

1000850830

8.07.53.0

1500

1800

706040

3

28.125.5

Vdc12.61211.4VLCDPower Supply Input Voltage

ohm

RMS

RMS

V

RMS

V

RMS

NotesUnit

13mV100--VRFPermissive Power Input Ripple

1mA533463394

2mA642558474

1Watt6.415.56-PLCD

2Watt7.716.70-PLCD

3A3--IRUSHRush current

4, 5V

4mA

4, 6

7kHz

4, 8Min

9Watt

4, 10Hrs

Note : The design of the inverter must have specifications for the lamp in LCD Assembly.

The performance of the Lamp in LCM, for example life time or brightness, is extremely influenced by

the characteristics of the DC-AC inverter. So all the parameters of an inverter should be carefully

designed so as not to produce too much leakage current from high-voltage output of the inverter.

When you design or order the inverter, please make sure unwanted lighting caused by the mismatch
of the lamp and the inverter (no lighting, flicker, etc) never occurs. When you confirm it, the LCD–
Assembly should be operated in the same condition as installed in you instrument.

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LM230WF2

Liquid Crystal Display

Product Specification

Note. Do not attach a conducting tape to lamp connecting wire. If the lamp wire attach to a conducting tape,

TFT-LCD Module has a low luminance and the inverter has abnormal action. Because leakage current
is occurred between lamp wire and conducting tape.

1. The specified current and power consumption are under the V
whereas mosaic pattern(8 x 6) is displayed and fVis the frame frequency.

2. The current is specified at the maximum current pattern. See the figure 3.

3. The duration of rush current is about 5ms and rising time of power Input is 500us ± 20%.(min.).

4. Specified values are for a single lamp.

5. Operating voltage is measured at 25 ± 2°C, and follows as below condition.
The variance of the voltage is ± 10%. (Based on single Lamp.)
The variance of the voltage is ± 20%. (Based on system & Test equipment tolerance.)

6. The voltage above VSshould be applied to the lamps for more than 1 second for start-up.

(Inverter open voltage must be more than lamp starting voltage.)

Otherwise, the lamps may not be turned on. The used lamp current is the lamp typical current.

7. The output of the inverter must have symmetrical(negative and positive) voltage waveform and
symmetrical current waveform (Unsymmetrical ratio is less than 10%). Please do not use the inverter
which has unsymmetrical voltage and unsymmetrical current and spike wave.
Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may
cause beat on the display. Therefore lamp frequency shall be as away possible from the horizontal
synchronous frequency and from its harmonics in order to prevent interference.

8. Let ’ s defi n e the bri ght nes s of the lamp af t er bei ng light ed for 5 min u te s as 100%.
TSis the time required for the brightness of the center of the lamp to be not less than 95%.
The used lamp current is the lamp typical current.

9. The lamp power consumption shown above does not include loss of external inverter.

The used lamp current is the lamp typical current. (PBL= VBLx IBLx N

10. The life is determined as the time at which brightness of the lamp is 50% compared to that of initial

value at the typical lamp current on condition of continuous operating at 25 ± 2°C.

11. Requirements for a system inverter design, which is intended to have a better display performance,

a better power efficiency and a more reliable lamp, are following.

It shall help increase the lamp lifetime and reduce leakage current.

a. The asymmetry rate of the inverter waveform should be less than 10%.

* Inverter output waveform had better be more similar to ideal sine wave.

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b. The distortion rate of the waveform should be within √2 ±10%.

=12V, 25 ± 2°C,fV=60Hz condition

LCD

)

Lamp

* Asymmetry rate:

I p

I -p

12. The inverter which is combined with this LCM, is highly recommended to connect coupling(ballast)
condenser at the high voltage output side. When you use the inverter which has not coupling(ballast)
condenser, it may cause abnormal lamp lighting because of biased mercury as time goes.

13. Permissive power ripple should be measured under V
condition and At that time, we recommend the bandwidth configuration of oscilloscope is to be under
20Mhz. See the figure 3.

14. In case of edgy type back light with over 4 parallel lamps, input current and voltage wave form should
be synchronized

Ver. 1.0 Aug. 17. 2009

| I p– I –p| / I

* Distortion rate

I p(or I –p) / I

=12.0V, 25°C, fV(frame frequency)=MAX

LCD

rms

rms

x 100%

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Product Specification

LM230WF2

Liquid Crystal Display

• Permissive Power input ripple (V

White pattern

• Power consumption (V

=12V, 25°C, fV (frame frequency=60Hz condition)

LCD

=12.0V, 25°C, fV(frame frequency)=MAX condition)

LCD

Black pattern

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Typical power Pattern

[ Figure 3 ] Mosaic pattern & White Pattern for power consumption measurement

Maximum power Pattern

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Liquid Crystal Display

Product Specification

3-2. Interface Connections

3-2-1. LCD Module

- LCD Connector(CN1). : KDF71G-30S-1H, (Manufactured by Hirose ), IS100-L30B-C23(UJU)

- Mating Connector : FI-X30C2L (Manufactured by JAE) or Equivalent

Table 3 MODULE CONNECTOR(CN1) PIN CONFIGURATION

LM230WF2

1

2

3

4

5

6

7

8

9

10

11

12

13

SymbolNo

FR0M

FR0P

FR1M

FR1P

FR2M

FR2P

GND

FCLKINM

FCLKINP

FR3M

FR3P

SR0M

SR0P

Description

Minus signal of odd channel 0 (LVDS)

Plus signal of odd channel 0 (LVDS)

Minus signal of odd channel 1 (LVDS)

Plus signal of odd channel 1 (LVDS)

Minus signal of odd channel 2 (LVDS)

Plus signal of odd channel 2 (LVDS)

Ground

Minus signal of odd clock channel (LVDS)

Plus signal of odd clock channel (LVDS)

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Minus signal of odd channel 3 (LVDS)

Plus signal of odd channel 3 (LVDS)

Minus signal of even channel 0 (LVDS)

Plus signal of even channel 0 (LVDS)

No

16

17

18

19

20

21

22

23

24

25

26

27

28

Symbol

SR1P

GND

SR2M

SR2P

SCLKIN
M

SCLKINP

SR3M

SR3P

GND

NC

NC

PWM_OUT

VLCD

Plus signal of even channel 1 (LVDS)

Ground

Minus signal of even channel 2 (LVDS)

Plus signal of even channel 2 (LVDS)

Minus signal of even clock channel (LVDS)

Plus signal of even clock channel (LVDS)

Minus signal of even channel 3 (LVDS)

Plus signal of even channel 3 (LVDS)

Ground

No Connection (I2C Serial interface for LCM)

No Connection.(I2C Serial interface for LCM)

For Control Burst frequency of Inverter

Power Supply +12.0V

Symbol

14

15

GND

SR1M

Ground

Minus signal of even channel 1 (LVDS)

29

30

VLCD

VLCD

Power Supply +12.0V

Power Supply +12.0V

Note: 1. All GND(ground) pins should be connected together and to Vss which should also be connected to

the LCD’s metal frame.

2. All VLCD (power input) pins should be connected together.

3. Input Level of LVDS signal is based on the IEA 664 Standard.

4. PWM_OUT signal controls the burst frequency of a inverter.
This signal is synchronized with vertical frequency.
It’s frequency is 3 times of vertical frequency, and it’s duty ratio is 50%.
If you don’t use this pin, it is no connection.

[ Figure 4 ] Connector diagram

#1 #30

KDF71G-30S-1H

#1 #30

Rear view of LCM

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Liquid Crystal Display

Product Specification

Table 4. REQUIRED SIGNAL ASSIGNMENT FOR Flat Link (TI:SN75LVDS83) Transmitter

Pin # Require SignalPin Name Pin # Require SignalPin Name

1 Power Supply for TTL InputVCC 29 Ground pin for TTLGND

2 TTL Input (R7)D5 30 TTL Input (DE)D26

3 TTL Input (R5)D6 31 TTL Level clock InputTXCLKIN

4 TTL Input (G0)D7 32 Power Down InputPWR DWN

5 Ground pin for TTLGND 33 Ground pin for PLLPLL GND

6 TTL Input (G1)D8 34 Power Supply for PLLPLL VCC

7 TTL Input (G2)D9 35 Ground pin for PLLPLL GND

8 TTL Input (G6)D10 36 Ground pin for LVDSLVDS GND

LM230WF2

9 Power Supply for TTL InputVCC 37 Positive LVDS differential data output 3TxOUT3＋

10 TTL Input (G7)D11 38 Negative LVDS differential data output 3TxOUT3－

11 TTL Input (G3)D12 39 Positive LVDS differential clock outputTXCLKOUT＋

12 TTL Input (G4)D13 40 Negative LVDS differential clock outputTXCLKOUT－

13 Ground pin for TTLGND 41 Positive LVDS differential data output 2TXOUT2＋

14 TTL Input (G5)D14 42 Negative LVDS differential data output 2TXOUT2－

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15 TTL Input (B0)D15 43 Ground pin for LVDSLVDS GND

16 TTL Input (B6)D16 44 Power Supply for LVDSLVDS VCC

17 Power Supply for TTL InputVCC 45 Positive LVDS differential data output 1TXOUT1＋

19 TTL Input (B1)D18

20 TTL Input (B2)D19

22 TTL Input (B3)D20

23 TTL Input (B4)D21

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46 Negative LVDS differential data output 1TXOUT1－18 TTL Input (B7)D17

47 Positive LVDS differential data output 0TXOUT0＋

48 Negative LVDS differential data output 0TXOUT0－

49 Ground pin for LVDSLVDS GND21 Ground pin for TTL InputGND

50 TTL Input (R6)D27

51 TTL Input (R0)D0

24 TTL Input (B5)D22

25 TTL Input (RSVD)D23

26 Power Supply for TTL InputVCC 54 TTL Input (R2)D2

Notes : 1. Refer to LVDS Transmitter Data Sheet for detail descriptions.

2. 7 means MSB and 0 means LSB at R,G,B pixel data

Ver. 1.0 Aug. 17. 2009

52 TTL Input (R1)D1

53 Ground pin for TTLGND

55 TTL Input (R3)D327 TTL Input (HSYNC)D24

56 TTL Input (R4)D428 TTL Input (VSYNC)D25

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