LG LM-220WE4-SLB2 Service manual

LM220WE4
Liquid Crystal Display
Product Specification
SPECIFICATION
FOR
APPROVAL
22.0 WUXGA TFT LCDTitle
BUYER
MODEL
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APPROVED BY
/
/
/
-
SIGNATURE
DATE
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
J.H. Park / G.Manager
REVIEWED BY
S.J. So / Manager
PREPARED BY
S.W. Lee / Engineer
LG Display Co., Ltd.SUPPLIER
LM220WE4*MODEL
SLB2SUFFIX
SIGNATURE
DATE
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 0.2 April. 16 . 2009
MNT Products Engineering Dept.
LG Display Co., Ltd
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Product Specification
Contents
LM220WE4
Liquid Crystal Display
PageITEMNo
COVER
CONTENTS
RECORD OF REVISIONS
GENERAL DESCRIPTION1
ABSOLUTE MAXIMUM RATINGS2
ELECTRICAL SPECIFICATIONS3
ELECTRICAL CHARACTREISTICS 3-1
INTERFACE CONNECTIONS 3-2
SIGNAL TIMING SPECIFICATIONS 3-3
SIGNAL TIMING WAVEFORMS 3-4
COLOR INPUT DATA REFERNECE 3-5
POWER SEQUENCE 3-6
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VLCD POWER DIP CONDITION 3-7
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OPTICAL SFECIFICATIONS4
MECHANICAL CHARACTERISTICS5
1
2
3
4
5
6
6
9
14
15
16
17
18
19
25
RELIABLITY6
INTERNATIONAL STANDARDS7
SAFETY 7-1
EMC 7-2
PACKING8
DESIGNATION OF LOT MARK 8-1
PACKING FORM 8-2
PRECAUTIONS9
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29
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Product Specification
RECORD OF REVISIONS
Preliminary Specification-Jan. 29. 20090.0
Change Current, Power Consumption 4,6Mar. 22. 20090.1
Updated ELECTRICAL CHARACTERISTICS6April. 16. 20090.2
Updated Color Coordinates18
LM220WE4
Liquid Crystal Display
DescriptionPageRevision DateRevision No
29
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Updated Packing Form Package Quantity :TBD 5ea, Box size : TBD → 540 x 304 x 384
Ver. 0.2 April. 16 . 2009
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LM220WE4
Liquid Crystal Display
Product Specification
1. General Description
LM220WEx is a Color Active Matrix Liquid Crystal Display with an integral Cold Cathode Fluorescent
Lamp(CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 22inch diagonally measured
active display area with WSXGA+ resolution (1050 vertical by 1680 horizontal pixel array)
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the brightness of the sub-pixel color is determined with a 8-bit gray scale signal for each dot, thus, presenting a palette of more than 16,7M(True) colors. It has been designed to apply the 8Bit 2 port LVDS interface.
It is intended to support displays where high brightness, super wide viewing angle,
high color saturation, and high color are important.
LVDS
2port
CN1
(30pin)
+5.0V
+5.0V
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VLamp
General Features
RGB
Timing
Controller
Power Circuit
Block
2 x 6Sockets (High)
[ Figure 1 ] Block diagram
22.0 inches(55.867cm) diagonalActive Screen Size
497.7(H) x 320.1(V) x 35.7(D) mm (Typ.)Outline Dimension
0.282 mm x 0.282 mmPixel Pitch
Source Driver Circuit
S1 S1680
G1
Gate Driver Circuit
TFT - LCD Panel
(1680 × RGB × 1050 pixels)
G1050
Back light Assembly
(U-Shape 6CCFL)
1680 horiz. By 1050 vert. Pixels RGB stripes arrangementPixel Format
8-bit, 16,777,216 colorsColor Depth
300 cd/m
View Angle Free (R/L 178(Typ.), U/D 178(Typ.))Viewing Angle(CR>10)
Total 63.3 Watt (Typ.) ( 5.7 Watt @VLCD, 57.6 Watt@V
2,370 g (typ.) Weight
Transmissive mode, normally blackDisplay Operating Mode
Hard coating(3H), Anti-glare treatment of the front polarizerSurface Treatment
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2
( Center 1 points)Luminance, White
DDB
)Power Consumption
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LM220WE4
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
60
Values
90%
MaxMin
500TOP
60-20TST
60%
40%
10%
Hu mi dit y [( %) RH ]
Parameter Notes
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
Note : 1. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature should be 39 °C Max, and no condensation of water. Note : 2. Maximum Storage Humidity is up to 40℃, 70% RH only for 4 corner light leakage Mura.
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Wet Bulb Temperature [C]
10
0
Symbol
50
40
30
20
Units
Vdc6-0.3VLCD
°C
°C
%RH9010HOP
%RH9010HST
at 25 2°C
Storage
Operation
1, 2
10 20 30 40 50 60 70 800-20
Dry Bulb Temperature [C]
[ Figure 2 ] Temperature and relative humidity
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LM220WE4
Liquid Crystal Display
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power the LCD electronics and to drive the TFT array and
liquid crystal. The second input power for the CCFL, is typically generated by an inverter. The inverter is an
external unit to the LCDs.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
MODULE :
Differential Impedance
LAMP :
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Operating Frequency Discharge Stabilization Time Power Consumption Life Time
at 25 °C at 0 °C
Values
MaxTypMin
Vdc5.55.04.5VLCD Power Supply Input Voltage
ILCD Power Supply Input Current
Zm
11010090
1,7801,6001,540VBL Operating Voltage
7.06.03.0IBL Operating Current
2,400
2,900
ohm
RMS
RMS
V
RMS
V
RMS
NotesUnit
13mV100--VRF Permissive Power Input Ripple
1mA1,3111,140-
2mA1,8851,450-
1Watt6.565.7-PLCD Power Consumption
3A3--IRUSH Rush current
4, 5V
4mA
4, 6Vs Established Starting Voltage
7kHz705540fBL
4, 8Min3.0Ts
9Watt63.457.6PBL
4, 10Hrs50,000
Note : The design of the inverter must have specifications for the lamp in LCD Assembly.
The performance of the Lamp in LCM, for example life time or brightness, is extremely
influenced by
the characteristics of the DC-AC inverter. So all the parameters of an inverter should be
carefully designed so as not to produce too much leakage current from high-voltage output of the inverter.
When you design or order the inverter, please make sure unwanted lighting caused by the mismatch
of the lamp and the inverter (no lighting, flicker, etc) never occurs. When you confirm it,
the LCD–
Assembly should be operated in the same condition as installed in you instrument.
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LM220WE4
Liquid Crystal Display
Product Specification
Note. Do not attach a conducting tape to lamp connecting wire. If the lamp wire attach to a conducting tape, TFT-LCD Module has a low luminance and the inverter has abnormal action. Because leakage current is occurred between lamp wire and conducting tape.
1. The specified current and power consumption are under the V whereas mosaic pattern(8 x 6) is displayed and fV is the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 5ms and rising time of power Input is 500us  20%.(min.).
4. Specified values are for a single lamp.
5. Operating voltage is measured at 25 2°C. The variance of the voltage is 10%.
6. The voltage above VS should be applied to the lamps for more than 1 second for start-up. (Inverter open voltage must be more than lamp starting voltage.) Otherwise, the lamps may not be turned on. The used lamp current is the lamp typical current.
7. The output of the inverter must have symmetrical(negative and positive) voltage waveform and symmetrical current waveform (Unsymmetrical ratio is less than 10%). Please do not use the inverter which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may cause beat on the display. Therefore lamp frequency shall be as away possible from the horizontal synchronous frequency and from its harmonics in order to prevent interference.
8. Lets define the brightness of the lamp after being lighted for 5 minutes as 100%. TS is the time required for the brightness of the center of the lamp to be not less than 95%. The used lamp current is the lamp typical current.
9. The lamp power consumption shown above does not include loss of external inverter. The used lamp current is the lamp typical current. (PBL = VBL x IBL x N
10. The life is determined as the time at which brightness of the lamp is 50% compared to that of initial
value at the typical lamp current on condition of continuous operating at 25  2°C.
11. Requirements for a system inverter design, which is intended to have a better display performance, a better power efficiency and a more reliable lamp, are following. It shall help increase the lamp lifetime and reduce leakage current. a. The asymmetry rate of the inverter waveform should be less than 10%. b. The distortion rate of the waveform should be within √2 ±10%. * Inverter output waveform had better be more similar to ideal sine wave.
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=5.0V, 25 2°C,f
LCD
=60Hz condition
V
)
Lamp
* Asymmetry rate:
I p
I -p
12. The inverter which is combined with this LCM, is highly recommended to connect coupling(ballast) condenser at the high voltage output side. When you use the inverter which has not coupling(ballast) condenser, it may cause abnormal lamp lighting because of biased mercury as time goes.
13. Permissive power ripple should be measured under V condition and At that time, we recommend the bandwidth configuration of oscilloscope is to be under 20Mhz. See the figure 3.
14. In case of edgy type back light with over 6 parallel lamps, input current and voltage wave form should
be synchronized
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| I p – I –p | / I
* Distortion rate
I p (or I –p) / I
=5.0V, 25°C, fV(frame frequency)=MAX
LCD
x 100%
rms
rms
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Product Specification
LM220WE4
Liquid Crystal Display
Permissive Power input ripple (V
White pattern
Power consumption (V
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LCD
=5.0V, 25°C, fV (frame frequency=60Hz condition)
LCD
=5.0V, 25°C, fV(frame frequency)=MAX condition)
Black pattern
Typical power Pattern
[ Figure 3 ] Mosaic pattern & Black Pattern for power consumption measurement
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Max power Pattern
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Product Specification
3-2. Interface Connections
3-2-1. LCD Module
LCD Connector(CN1). : IS100-L30B-C23(UJU), GT103-30S-H23 (LS cable) or Equivalent-
- Mating Connector : FI-XC30C2L (Manufactured by JAE) or Equivalent
Table 3 MODULE CONNECTOR(CN1) PIN CONFIGURATION
Symbol
SymbolNo
Description
No
LM220WE4
Liquid Crystal Display
Description
FR0M1
FR0P2
FR1M3
FR1P4
FR2M5
FR2P6
GND7
FCLKINM8
FCLKINP9
FR3M10
FR3P11
SR0M12
SR0P13
GND14
SR1M15
Minus signal of odd channel 0 (LVDS)
Plus signal of odd channel 0 (LVDS)
Minus signal of odd channel 1 (LVDS)
Plus signal of odd channel 1 (LVDS)
Minus signal of odd channel 2 (LVDS)
Plus signal of odd channel 2 (LVDS)
Ground
Minus signal of odd clock channel (LVDS)
Plus signal of odd clock channel (LVDS)
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Minus signal of odd channel 3 (LVDS)
Plus signal of odd channel 3 (LVDS)
Minus signal of even channel 0 (LVDS)
Plus signal of even channel 0 (LVDS)
Ground
Minus signal of even channel 1 (LVDS)
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
SR1P
GND
SR2M
SR2P
SCLKINM
SCLKINP
SR3M
SR3P
GND
NC
NC
NC
VLCD
VLCD
VLCD
Plus signal of even channel 1 (LVDS)
Ground
Minus signal of even channel 2 (LVDS)
Plus signal of even channel 2 (LVDS)
Minus signal of even clock channel (LVDS)
Plus signal of even clock channel (LVDS)
Minus signal of even channel 3 (LVDS)
Plus signal of even channel 3 (LVDS)
Ground
No Connection (For LCD internal use only)
No Connection (For LCD internal use only)
No Connection (Reserved)
Power Supply +5.0V
Power Supply +5.0V
Power Supply +5.0V
Note: 1. All GND(ground) pins should be connected together and to Vss which should also be connected to the LCDs metal frame.
2. All VLCD (power input) pins should be connected together.
3. Input Level of LVDS signal is based on the IEA 664 Standard.
[ Figure 4 ] User Connector diagram
1
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30
#1 #30
Rear view of LCM
IS100-L30B-C23(UJU)
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Liquid Crystal Display
Product Specification
Table 4. REQUIRED SIGNAL ASSIGNMENT FOR Flat Link (TI:SN75LVDS83) Transmitter
Pin # Require SignalPin Name Pin # Require SignalPin Name
1 Power Supply for TTL InputVCC 29 Ground pin for TTLGND
2 TTL Input (R7)D5 30 TTL Input (DE)D26
3 TTL Input (R5)D6 31 TTL Level clock InputTX CLKIN
4 TTL Input (G0)D7 32 Power Down InputPWR DWN
5 Ground pin for TTLGND 33 Ground pin for PLLPLL GND
6 TTL Input (G1)D8 34 Power Supply for PLLPLL VCC
7 TTL Input (G2)D9 35 Ground pin for PLLPLL GND
8 TTL Input (G6)D10 36 Ground pin for LVDSLVDS GND
9 Power Supply for TTL InputVCC 37 Positive LVDS differential data output 3TxOUT3
10 TTL Input (G7)D11 38 Negative LVDS differential data output 3TxOUT3
LM220WE4
11 TTL Input (G3)D12 39 Positive LVDS differential clock outputTX CLKOUT
12 TTL Input (G4)D13 40 Negative LVDS differential clock outputTX CLKOUT
13 Ground pin for TTLGND 41 Positive LVDS differential data output 2TX OUT2
14 TTL Input (G5)D14 42 Negative LVDS differential data output 2TX OUT2
15 TTL Input (B0)D15 43 Ground pin for LVDSLVDS GND
16 TTL Input (B6)D16 44 Power Supply for LVDSLVDS VCC
17 Power Supply for TTL InputVCC 45 Positive LVDS differential data output 1TX OUT1
19 TTL Input (B1)D18
20 TTL Input (B2)D19
22 TTL Input (B3)D20
23 TTL Input (B4)D21
24 TTL Input (B5)D22
25 TTL Input (RSVD)D23
26 Power Supply for TTL InputVCC 54 TTL Input (R2)D2
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46 Negative LVDS differential data output 1TX OUT118 TTL Input (B7)D17
47 Positive LVDS differential data output 0TX OUT0
48 Negative LVDS differential data output 0TX OUT0
49 Ground pin for LVDSLVDS GND21 Ground pin for TTL InputGND
50 TTL Input (R6)D27
51 TTL Input (R0)D0
52 TTL Input (R1)D1
53 Ground pin for TTLGND
55 TTL Input (R3)D327 TTL Input (HSYNC)D24
56 TTL Input (R4)D428 TTL Input (VSYNC)D25
Notes : 1. Refer to LVDS Transmitter Data Sheet for detail descriptions.
2. 7 means MSB and 0 means LSB at R,G,B pixel data
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