LG LM-215WF2-SLB1 Service manual

LM215WF2
Liquid Crystal Display
Product Specification
SPECIFICATION
FOR
APPROVAL
21.5 Full HD TFT LCDTitle
BUYER
MODEL
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APPROVED BY
/
/
/
TPVAOC
SIGNATURE
DATE
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
Hans. Kim / G.Manager
REVIEWED BY
J. K. Lee / Manager [C]
W. Y. No / Manager [M]
D. H. Kang / Manager [P]
PREPARED BY
S. H. Han / Engineer
LG Display Co., Ltd.SUPPLIER
LM215WF2*MODEL
SLB1SUFFIX
SIGNATURE
DATE
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 0.1 Aug. 25 . 2009
MNT Products Engineering Dept.
LG Display Co., Ltd
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Product Specification
Contents
LM215WF2
Liquid Crystal Display
ITEMNo
COVER CONTENTS RECORD OF REVISIONS GENERAL DESCRIPTION1 ABSOLUTE MAXIMUM RATINGS2
ELECTRICAL SPECIFICATIONS3 ELECTRICAL CHARACTREISTICS 3-1
INTERFACE CONNECTIONS 3-2 SIGNAL TIMING SPECIFICATIONS 3-3 SIGNAL TIMING WAVEFORMS 3-4 COLOR INPUT DATA REFERNECE 3-5 POWER SEQUENCE 3-6
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V
Power Dip Condition 3-7
LCD
OPTICAL SFECIFICATIONS4 MECHANICAL CHARACTERISTICS5
Page
1 2 3 4 5
6 6
9 14 15 16 17 18 19
25
RELIABLITY6 INTERNATIONAL STANDARDS7 SAFETY 7-1 EMC 7-2 ENVIRONMENT 7-3 PACKING8 DESIGNATION OF LOT MARK 8-1 PACKING FORM 8-2
PRECAUTIONS9
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28 29 29 29 29 30 30 30
31
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Product Specification
RECORD OF REVISIONS
First Draft(Preliminary)-Aug. 25. 20090.0
LM215WF2
Liquid Crystal Display
DescriptionPageRevision DateRevision No
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LM215WF2
Liquid Crystal Display
Product Specification
1. General Description
LM215WF2 is a Color Active Matrix Liquid Crystal Display with an integral Cold Cathode Fluorescent
Lamp(CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 21.5 inch diagonally measured
active display area with FHD resolution (1080 vertical by 1920horizontal pixel array)
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the brightness of the sub-pixel color is determined with a 8-bit gray scale signal for each dot, thus, presenting a palette of more than 16,7M colors with A-FRC(Advanced Frame Rate Control). It has been designed to apply the 8Bit 2 port LVDS interface.
It is intended to support displays where high brightness, super wide viewing angle,
high color saturation, and high color are important.
LVDS
2port
CN1
(30pin)
+12.0V
+5.0V
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VLamp
General Features
RGB
Timing
Controller
Power Circuit
Block
2 x 4 Sockets (High)
[ Figure 1 ] Block diagram
21.46 inches(545.22mm) diagonalActive Screen Size
495.6(H) x 292.2(V) x 16.5(D) mm (Typ.)Outline Dimension
0.2475 mm x 0.2475mmPixel Pitch
Source Driver Circuit
S1 S1920
G1
Gate Driver Circuit
TFT - LCD Panel
(1920 × RGB × 1080 pixels)
G1080
Back light Assembly
(4CCFL)
1920 horiz. By 1080 vert. Pixels RGB stripes arrangementPixel Format
Color Depth
Viewing Angle(CR>10)
Power Consumption
Weight
Ver. 0.1 Aug. 25 . 2009
16,7M colors
250 cd/m
View Angle Free (R/L 178(Typ.), U/D 178(Typ.)) Total 28.26 Watt (Typ.) ( 4.26 Watt @VLCD, 24 Watt @250cd/㎡]) 2450 g (typ.)
Transmissive mode, normally blackDisplay Operating Mode
Hard coating(3H), Glare treatment of the front polarizerSurface Treatment
2
( 1point)Luminance, White
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LM215WF2
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
60
Values
90%
MaxMin
14-0.3 500 60-20 9010 9010
60%
40%
10%
Hu mi dit y [( %) RH ]
Parameter Notes
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
Note : 1. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature should be 39 °C Max, and no condensation of water. Note : 2. Maximum Storage Humidity is up to 40℃, 70% RH only for 4 corner light leakage Mura.
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Wet Bulb Temperature [C]
10
0
Symbol
VLCD
TOP
TST
HOP
HST
50
40
30
20
Units
Vdc
°C
°C
%RH
%RH
at 25 2°C
Storage
Operation
1, 2
10 20 30 40 50 60 70 800-20
Dry Bulb Temperature [C]
[ Figure 2 ] Temperature and relative humidity
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LM215WF2
Liquid Crystal Display
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power the LCD electronics and to drive the TFT array and liquid crystal. The second input power for the CCFL, is typically generated by an inverter. The inverter is an external unit to the LCDs.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
MODULE :
ILCD Power Supply Input Current
Differential Impedance
Power Consumption
LAMP :
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at 25 °C
at 0 °C Operating Frequency Discharge Stabilization Time Power Consumption Life Time
Note : The design of the inverter must have specifications for the lamp in LCD Assembly.
The performance of the Lamp in LCM, for example life time or brightness, is extremely
the characteristics of the DC-AC inverter. So all the parameters of an inverter should be
designed so as not to produce too much leakage current from high-voltage output of the inverter.
When you design or order the inverter, please make sure unwanted lighting caused by the mismatch
of the lamp and the inverter (no lighting, flicker, etc) never occurs. When you confirm it,
Assembly should be operated in the same condition as installed in you instrument.
Zm
VBL Operating Voltage
IBL Operating Current
fBL
Ts
PBL
influenced by
(8.0mA)
carefully
the LCD–
780
Values
800
(7.5mA)
MaxTypMin
410355300
510440370
11010090
1000
(2.5mA)
8.07.52.5
1250
1550
70-40
3
26.424
Vdc12.61211.4VLCD Power Supply Input Voltage
ohm
RMS
RMS
V
RMS
V
RMS
NotesUnit
13mV100--VRF Permissive Power Input Ripple
1mA
2mA
1Watt4.924.26-PLCD 2Watt6.125.28-PLCD
3A3--IRUSH Rush current
4, 5V
4mA
4, 6Vs Established Starting Voltage
7kHz
4, 8Min
9Watt
4, 10Hrs50,000
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LM215WF2
Liquid Crystal Display
Product Specification
Note. Do not attach a conducting tape to lamp connecting wire. If the lamp wire attach to a conducting tape, TFT-LCD Module has a low luminance and the inverter has abnormal action. Because leakage current is occurred between lamp wire and conducting tape.
1. The specified current and power consumption are under the V whereas mosaic pattern(8 x 6) is displayed and fV is the frame frequency.
2. The current is specified at the maximum current pattern. See the figure 3.
3. The duration of rush current is about 5ms and rising time of power Input is 500us  20%.(min.).
4. Specified values are for a single lamp.
5. Operating voltage is measured at 25 2°C, and follows as below condition. The variance of the voltage is  10%. (Based on single Lamp.) The variance of the voltage is  20%. (Based on system & Test equipment tolerance.)
6. The voltage above VS should be applied to the lamps for more than 1 second for start-up. (Inverter open voltage must be more than lamp starting voltage.) Otherwise, the lamps may not be turned on. The used lamp current is the lamp typical current.
7. The output of the inverter must have symmetrical(negative and positive) voltage waveform and symmetrical current waveform (Unsymmetrical ratio is less than 10%). Please do not use the inverter which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may cause beat on the display. Therefore lamp frequency shall be as away possible from the horizontal synchronous frequency and from its harmonics in order to prevent interference.
8. Lets define the brightness of the lamp after being lighted for 5 minutes as 100%. TS is the time required for the brightness of the center of the lamp to be not less than 95%. The used lamp current is the lamp typical current.
9. The lamp power consumption shown above does not include loss of external inverter. The used lamp current is the lamp typical current. (PBL = VBL x IBL x N
10. The life is determined as the time at which brightness of the lamp is 50% compared to that of initial
value at the typical lamp current on condition of continuous operating at 25  2°C.
11. Requirements for a system inverter design, which is intended to have a better display performance, a better power efficiency and a more reliable lamp, are following. It shall help increase the lamp lifetime and reduce leakage current. a. The asymmetry rate of the inverter waveform should be less than 10%. b. The distortion rate of the waveform should be within √2 ±10%. * Inverter output waveform had better be more similar to ideal sine wave.
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=12V, 25 2°C,f
LCD
=60Hz condition
V
)
Lamp
* Asymmetry rate:
I p
I -p
12. The inverter which is combined with this LCM, is highly recommended to connect coupling(ballast) condenser at the high voltage output side. When you use the inverter which has not coupling(ballast) condenser, it may cause abnormal lamp lighting because of biased mercury as time goes.
13. Permissive power ripple should be measured under V condition and At that time, we recommend the bandwidth configuration of oscilloscope is to be under 20Mhz. See the figure 3.
14. In case of edgy type back light with over 4 parallel lamps, input current and voltage wave form should be synchronized
Ver. 0.1 Aug. 25 . 2009
| I p – I –p | / I
* Distortion rate
I p (or I –p) / I
=12.0V, 25°C, fV(frame frequency)=MAX
LCD
x 100%
rms
rms
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Product Specification
LM215WF2
Liquid Crystal Display
Permissive Power input ripple (V
White pattern
Power consumption (V
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LCD
=12V, 25°C, fV (frame frequency=60Hz condition)
LCD
=12.0V, 25°C, fV(frame frequency)=MAX condition)
Black pattern
Typical power Pattern
[ Figure 3 ] Mosaic pattern & White Pattern for power consumption measurement
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Maximum power Pattern
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Product Specification
3-2. Interface Connections
3-2-1. LCD Module
LCD Connector(CN1). : IS100-L30B-C23(UJU), GT103-30S-H23 (LSC) -
- Mating Connector : FI-XC30C2L (Manufactured by JAE) or Equivalent
Table 3 MODULE CONNECTOR(CN1) PIN CONFIGURATION
Symbol
SymbolNo
Description
No
LM215WF2
Liquid Crystal Display
Symbol
1 2 3 4
5
6 7 8
9 10 11 12 13 14 15
FR0M FR0P FR1M FR1P
FR2M FR2P
GND FCLKINM FCLKINP
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FR3M FR3P SR0M SR0P GND SR1M
Minus signal of odd channel 0 (LVDS) Plus signal of odd channel 0 (LVDS) Minus signal of odd channel 1 (LVDS) Plus signal of odd channel 1 (LVDS)
Minus signal of odd channel 2 (LVDS)
Plus signal of odd channel 2 (LVDS) Ground Minus signal of odd clock channel (LVDS) Plus signal of odd clock channel (LVDS)
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Minus signal of odd channel 3 (LVDS) Plus signal of odd channel 3 (LVDS) Minus signal of even channel 0 (LVDS) Plus signal of even channel 0 (LVDS) Ground Minus signal of even channel 1 (LVDS)
16 17 18 19
20
21 22 23 24 25 26 27 28 29 30
SR1P GND SR2M SR2P
SCLKINM SCLKINP
SR3M SR3P GND NC NC
PWM_OUT
VLCD VLCD VLCD
Plus signal of even channel 1 (LVDS) Ground Minus signal of even channel 2 (LVDS) Plus signal of even channel 2 (LVDS)
Minus signal of even clock channel (LVDS)
Plus signal of even clock channel (LVDS) Minus signal of even channel 3 (LVDS) Plus signal of even channel 3 (LVDS) Ground No Connection (I2C Serial interface for LCM) No Connection.(I2C Serial interface for LCM) For Control Burst frequency of Inverter Power Supply +12.0V Power Supply +12.0V Power Supply +12.0V
Note: 1. All GND(ground) pins should be connected together and to Vss which should also be connected to the LCD’s metal frame.
2. All VLCD (power input) pins should be connected together.
3. Input Level of LVDS signal is based on the IEA 664 Standard.
4. PWM_OUT signal controls the burst frequency of a inverter. This signal is synchronized with vertical frequency. It’s frequency is 3 times of vertical frequency, and it’s duty ratio is 50%. If you don’t use this pin, it is no connection.
[ Figure 4 ] User Connector diagram
IS100-L30B-C23(UJU)
#1 #30
Ver. 0.1 Aug. 25 . 2009
#1 #30
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Liquid Crystal Display
Product Specification
Table 4. REQUIRED SIGNAL ASSIGNMENT FOR Flat Link (TI:SN75LVDS83) Transmitter
Pin # Require SignalPin Name Pin # Require SignalPin Name
1 Power Supply for TTL InputVCC 29 Ground pin for TTLGND 2 TTL Input (R7)D5 30 TTL Input (DE)D26 3 TTL Input (R5)D6 31 TTL Level clock InputTX CLKIN 4 TTL Input (G0)D7 32 Power Down InputPWR DWN 5 Ground pin for TTLGND 33 Ground pin for PLLPLL GND 6 TTL Input (G1)D8 34 Power Supply for PLLPLL VCC 7 TTL Input (G2)D9 35 Ground pin for PLLPLL GND 8 TTL Input (G6)D10 36 Ground pin for LVDSLVDS GND 9 Power Supply for TTL InputVCC 37 Positive LVDS differential data output 3TxOUT3
10 TTL Input (G7)D11 38 Negative LVDS differential data output 3TxOUT3
LM215WF2
11 TTL Input (G3)D12 39 Positive LVDS differential clock outputTX CLKOUT
12 TTL Input (G4)D13 40 Negative LVDS differential clock outputTX CLKOUT
13 Ground pin for TTLGND 41 Positive LVDS differential data output 2TX OUT2
14 TTL Input (G5)D14 42 Negative LVDS differential data output 2TX OUT2
15 TTL Input (B0)D15 43 Ground pin for LVDSLVDS GND
16 TTL Input (B6)D16 44 Power Supply for LVDSLVDS VCC
17 Power Supply for TTL InputVCC 45 Positive LVDS differential data output 1TX OUT1
19 TTL Input (B1)D18
20 TTL Input (B2)D19
22 TTL Input (B3)D20
23 TTL Input (B4)D21
24 TTL Input (B5)D22
25 TTL Input (RSVD)D23
26 Power Supply for TTL InputVCC 54 TTL Input (R2)D2
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46 Negative LVDS differential data output 1TX OUT118 TTL Input (B7)D17 47 Positive LVDS differential data output 0TX OUT0 48 Negative LVDS differential data output 0TX OUT0 49 Ground pin for LVDSLVDS GND21 Ground pin for TTL InputGND 50 TTL Input (R6)D27 51 TTL Input (R0)D0 52 TTL Input (R1)D1 53 Ground pin for TTLGND
55 TTL Input (R3)D327 TTL Input (HSYNC)D24 56 TTL Input (R4)D428 TTL Input (VSYNC)D25
Notes : 1. Refer to LVDS Transmitter Data Sheet for detail descriptions.
2. 7 means MSB and 0 means LSB at R,G,B pixel data
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