Table Of Contents
1. INTRODUCTION ..................................................................5
1.1 Purpose ............................................................................................... 5
1.2 Regulatory Information ............................................................... 5
1.3 Abbreviations ................................................................................... 7
2. PERFORMANCE ...................................................................9
2.1 Product Name .................................................................................. 9
2.2 Supporting Standard .................................................................... 9
2.3 Main Parts : GSM Solution ........................................................... 9
2.4 HW Features ....................................................................................10
2.5 SW Features ....................................................................................12
2.6 HW SPEC. .........................................................................................14
2.7 C320 Figures ...................................................................................15
3. TECHNICAL BRIEF .............................................................16
3.1 General Description .....................................................................16
3.2 Power management ....................................................................28
3.3 SUB SYSTEM ....................................................................................32
3.4 General Description (RF Part) ..................................................40
4.12 Speaker/Speaker Phone path ...............................................73
4.13 Main microphone ......................................................................78
4.14 Headset microphone ................................................................80
4.15 RF Component ............................................................................82
4.16 RF Path ............................................................................................83
4.17 Trouble Shooting of GSM Part ..............................................84
4.18 Checking Bluetooth Block ......................................................91
4.19 Checking FM Radio Block .......................................................96
5. DOWNLOAD ......................................................................99
6. BLOCK DIAGRAM ........................................................... 112
7. CIRCUIT DIAGRAM ........................................................ 123
8. BGA Pin Map .................................................................. 137
9. PCB LAYOUT ................................................................... 143
10. RF CALIBRATION ......................................................... 149
10.1 Usage of Tachyon for RF Calibration and Test ............. 149
3.5 GSM MODE ......................................................................................41
3.6 OFF-CHIP RF COMPONENTS ....................................................44
3.7 OFF-CHIP COMPONENTS ..........................................................46
4. TROUBLE SHOOTING .......................................................50
4.1 Power ON Troubleshooting ......................................................50
4.2 Charger Troubleshooting ..........................................................52
4.3 USB Troubleshooting ..................................................................54
4.4 USIM Detect Troubleshooting .................................................56
4.5 Camera Troubleshooting ...........................................................58
4.6 Main side view LED Troubleshooting ...................................60
4.7 Slide Key side view LED Troubleshooting ...........................61
4.8 LCD Troubleshooting ..................................................................63
4.9 Vibrator Troubleshooting ..........................................................65
4.10 Receiver Path ...............................................................................67
4.11 Headset path ...............................................................................70
11. TEST ALONE ................................................................. 152
11.1 Phone Test Mode.....................................................................152
12. EXPLODED VIEW & REPLACEMENT PART LIST ......... 157
11.1 EXPLODED VIEW ......................................................................157
11.2 Replacement Parts..................................................................159
11.3 Accessory ...................................................................................175
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1. INTRODUCTION
1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download the features
of this model.
1.2 Regulatory Information
A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,
persons other than your company’s employees, agents, subcontractors, or person working on your
company’s behalf) can result in substantial additional charges for your telecommunications services. System
users are responsible for the security of own system.
There are may be risks of toll fraud associated with your telecommunications system. System users are
responsible for programming and configuring the equipment to prevent unauthorized use. The
manufacturer does not warrant that this product is immune from the above case but will prevent
unauthorized use of common carrier telecommunication service of facilities accessed through or connected
to it. The manufacturer will not be responsible for any charges that result from such unauthorized use.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and possibly causing
harm or interruption in service to the telephone network, it should disconnect telephone service until repair
can be done. A telephone company may temporarily disconnect service as long as repair is not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If these
changes could reasonably be expected to affect the use of the phones or compatibility with the net work, the
telephone company is required to give advanced written notice to the user, allowing the user to take
appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on the phones must be performed only by the manufacturer or its authorized agent.
The user may not make any changes and/or repairs expect as specifically noted in this manual. Therefore,
note that unauthorized alternations or repair may affect the regulatory status of the system and may void
any remaining warranty.
1. INTRODUCTION
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LGE Internal Use Only
1. INTRODUCTION
G
E. Notice of Radiated Emissions
This model complies with rules regarding radiation and radio frequency emission as defined by local
regulatory agencies. In accordance with these agencies, you may be required to provide information such as
the following to the end user.
F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly different.
G. Interference and Attenuation
A phone may interfere with sensitive laboratory equipment, medical equipment, etc. Interference from
unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices
ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by the sign. Following
information is ESD handling:
• Service personnel should ground themselves by using a wrist strap when exchange system boards.
• When repairs are made to a system board, they should spread the floor with anti-static mat which is also
grounded.
• Use a suitable, grounded soldering iron.
• Keep sensitive parts in these protective packages until these are used.
• When returning system boards or parts like EEPROM to the factory, use the protective package as described.
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1.3 Abbreviations
For the purposes of this manual, following abbreviations apply:
Offset Phase Locked LoopOPLL
Light Emitting DiodeLED
Low Drop OutputLDO
Liquid Crystal DisplayLCD
Intermediate FrequencyIF
International Portable User IdentityIPUI
Global System for Mobile CommunicationsGSM
General Purpose Interface BusGPIB
Gaussian Minimum Shift KeyingGMSK
Flexible Printed Circuit BoardFPCB
Electrostatic DischargeESD
Electrical Erasable Programmable Read-Only MemoryEEPROM
Digital Signal ProcessingDSP
dB relative to 1 milli wattdBm
Digital Communication SystemDCS
Digital to Analog ConverterDAC
Constant Current – Constant VoltageCC-CV
Bit Error RatioBER
BasebandBB
Automatic Power ControlAPC
1. INTRODUCTION
1. INTRODUCTION
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1. INTRODUCTION
Wireless Application Protocol
WAP
Voltage Control Temperature Compensated Crystal OscillatorVCTCXO
Voltage Controlled OscillatorVCO
Universal Asynchronous Receiver/TransmitterUART
Time Division Multiple AccessTDMA
Time Division DuplexTDD
Travel AdapterTA
Side Tone Masking RatingSTMR
Pseudo SRAMPSRAM
Static Random Access MemorySRAM
Sending Loudness RatingSLR
Subscriber Identity ModuleSIM
Surface Acoustic WaveSAW
Real Time ClockRTC
Root Mean SquareRMS
Receiving Loudness RatingRLR
Radio FrequencyRF
Public Switched Telephone NetworkPSTN
Phase Locked LoopPLL
Programmable Gain AmplifierPGA
Printed Circuit BoardPCB
Power Amplifier ModulePAM
1. INTRODUCTION
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2. PERFORMANCE
2.1 Product Name
C320 : EGSM/GSM850/DCS/PCS
(GPRS Class 12 / EDGE Class 12)
2.2 Supporting Standard
Item Feature Comment
Supporting Standard EGSM/GSM850/DCS1800/PCS1900
with seamless handover
Phase 2+(include AMR)
SIM Toolkit : Class 1, 2, 3, C-E
Frequency Range EGSM TX : 880 – 915 MHz
EGSM RX : 925 – 960 MHz
GSM850 TX : 824 – 849 MHz
GSM850 RX : 869 – 894 MHz
DCS1800 TX : 1710 – 1785 MHz
DCS1800 RX : 1805 – 1880 MHz
PCS1900 TX : 1850 – 1910 MHz
PCS1900 RX : 1930 – 1990 MHz
Application Standard WAP 2.0, JAVA 2.0
2.3 Main Parts : GSM Solution
Item Part Name Comment
Digital Baseband ESC6270 : Qualcomm
Analog Baseband ESC6270 : Qualcomm
RF Chip ESC6270 : Qualcomm
2. PERFORMANCE
Phase 2+(include AMR)
SIM Toolkit : Class 1, 2, 3, C-E
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2. PERFORMANCE
2.4 HW Features
Item Feature Comment
Form Factor Slide type
1) Capacity
Standard : Li-Ion, 900 mAh
Battery
2) Packing Type : Soft Pack
Size Standard : 91 x 63 x 15.9 mm
Weight 115.6g With Battery
Volume TBD
PCB Stag type, 10 Layers , 0.8t
Stand by time Up to 300 hrs @ Paging Period 5
Charging time Up to 3 hrs @
Talk time 2G Up to 3.4hr @ Tx=Max(2G)
RX sensitivity EGSM : -105 dBm
GSM850 : -105 dBm
DCS 1800 : -105 dBm
PCS 1900 : -105 dBm
GSM/
GPRS
EGSM : 33dBm
GSM850 : 33 dBm
DCS 1800 : 30 dBm
PCS 1900 : 30 dBm
Class4 (EGSM)
Class4 (GSM850)
Class1 (PCS)
Class1 (DCS)
TX
output
power
EDGE GSM 900 : 27 dBm
GSM 850 : 27 dBm
DCS 1800 : 26 dBm
PCS 1900 : 26 dBm
E2 (GSM900)
E2 (GSM850)
E2 (PCS)
E2 (DCS)
GPRS compatibility GPRS Class 12
EDGE compatibility EDGE Class 12
SIM card type Plug-In SIM
3V /1.8V
Display 2.4” TFT QVGA landscape
Built-in Camera 2M FF SOC Camera
Status Indicator Yes
Keypad
ANT Main : Internal Fixed Type
System connector 5 Pin
Ear Phone Jack 3.5Phi, 4 Pole, Stereo
PC synchronization Yes
Memory NAND Flash : 2Gbit
SDRAM : 1Gbit
Speech coding FR, EFR, HR,AMR
Data & Fax Built in Data & Fax support
Vibrator Built in Vibrator
BlueTooth V2.1 + EDR
MIDI(for Buzzer
Function)
SW Decoded 64Poly
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2. PERFORMANCE
Music Player MP3/AAC/AAC+/WMA
Video Player PEG4, H.263,H.264 30fps@QVGA
WMV 15fps@QCIF
Camcorder MPEG4, 15fps@QVGA
Voice Recording Yes
Speaker Phone mode
Support
Yes
Travel Adapter Yes
CDROM No
Stereo Headset Yes
Data Cable Yes
T-Flash
(External Memory)
Yes
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2. PERFORMANCE
2.5 SW Features
Item Feature Comment
RSSI 0 ~ 7 Levels
Battery Charging 0 ~ 3 Levels
Key Volume 0 ~ 7 Level
Audio Volume 1 ~ 20 Level
Time / Date Display Yes
Multi-Language Yes English / Chinese Trad. / Chinese Simp.
/ Thai / Korean / Malay / Indonesian /
Vietnamese
Quick Access Mode Dialing / Contact / Menu /
Message / Camera
PC Sync Yes PC suite 4
Speed Dial Yes Voice mail center -> 1 key
Profile Yes not same with feature phone setting
CLIP / CLIR Yes
Phone Book Name + 5 Numbers + 1 Memo + 2
e-mail + 3 Group Select + Picture +
Ringtone + Anniversary day
1000 + SIM
Last Dial Number Yes Total Call DB Max 100
LDN (SIM) N/A
Last Received
Number
Yes Total Call DB Max 100
LDN (SIM) N/A
Last Missed Number Yes Total Call DB Max 100
LDN (SIM) N/A
Search by Number
/ Name
Name and Number
Group Yes 30
Fixed Dial Number Yes
Service Dial Number No
Own Number Yes Read only
(add/edit/delete are not supported)
Voice Memo Yes Support voice recorder
Call Reminder Yes
Network Selection Automatic
Mute Yes
Call Divert Yes
Call Barring Yes
Call Charge (AoC) Yes
Call Duration Yes
SMS (EMS) Yes (1000+SIM) EMS : Release4
(Except Text align)
SMS Over GPRS Yes
EMS Melody / Picture
Send / Receive / Save
Yes
(Receive only)
MMS MPEG4
Send / Receive / Save
Yes
Long Message MAX 1000 Characters SMS 7pages
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Cell Broadcast Yes
Download Over the WAP
Game Yes
Calendar Yes
Memo Yes 100
World Clock Yes
Unit Convert Yes
Stop Watch Yes
Wall Paper Yes
WAP Browser Over WAP 2.0 Obigo
Download Melody /
Wallpaper
Yes Over WAP
SIM Lock Yes Operator Dependent
SIM Toolkit Yes R99
MMS Yes Obigo +LG MMS Client
EONS No
CPHS Yes V4.2
ENS No
Camera Yes 2M FF
JAVA Yes CLDC V1.1 / MIDP V2.1
Download Over WAP
Voice Dial No
IrDa No
Bluetooth Yes BT 2.1+EDR
HFP/HSP/A2DP&AVRCP
/OPP/BPP/PBAP/SPP/
FM radio Yes
GPRS Yes Class 12
EDGE Yes Class 12
Hold / Retrieve Yes
Conference Call Yes Max. 6
DTMF Yes
Memo pad Yes
TTY No
AMR Yes
SyncML No
IM Yes JAVA midlet (neustar)
Email Yes
2. PERFORMANCE
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2. PERFORMANCE
2.6 HW SPEC.
1) GSM transceiver specification
Item Specification
Phase Error
Rms : 5°
Peak : 20 °
Frequency Error
GSM : 0.1 ppm
DCS/PCS : 0.1 ppm
EMC(Radiated Spurious Emission
Disturbance)
GSM/DCS : < -28dBm
Transmitter Output power and Burst
Timing
GSM : 5dBm – 33dBm ± 3dB
DCS/PCS : 0dBm – 30dBm ± 3dB
Burst Timing <3.69us
Spectrum due to modulation out to less
than 1800kHz offset
200kHz : -36dBm
600kHz : -51dBm/-56dBm
Spectrum due to modulation out to
larger than 1800kHz offset to the edge
of the transmit band
GSM :
1800-3000kHz :< -63dBc(-46dBm)
3000kHz-6000kHz : <-65dBc(-46dBm)
6000kHz < : < -71dBc(-46dBm)
DCS :
1800-3000kHz :< -65dBc(-51dBm)
6000kHz < : < -73dBc(-51dBm)
Spectrum due to switching transient
400kHz : -19dBm/-22dBm(5/0), -23dBm
600kHz : -21dBm/-24dBm(5/0), -26dBm
Reference Sensitivity – TCH/FS Class II(RBER) : -105dBm(2.439%)
Usable receiver input level range 0.012(-15 - -40dBm)
Intermodulation rejection – Speech
channels
± 800kHz, ± 1600kHz
: -98dBm/-96dBm (2.439%)
AM Suppression
T GSM : -31dBm
- DCS : -29dBm
-98dBm/-96dBm (2.439%)
Timing Advance ± 0.5T
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3. TECHNICAL BRIEF
2. Base Band Technical Description
3.1 General Description
QSC6270 (3G disable)has all eight major functional blocks as like Figure 3.1
Figure 3.1 QSC6270(3G disable) Base band block
3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
3.1.1 Processor
The QSC6270(3Gdisable) device integrates multiple processors on-chip: one ARM microprocessor and two
DSP processors. Each processor is part of a functional subsystem:
The micro subsystem includes the ARM926EJ-S microprocessor.
The modem subsystem includes the QDSP4u8 digital signal processor (mDSP).
The application subsystem includes the QDSP4u8 application digital signal processor(aDSP).
Figure 3.1.1 Processors and bus architecture
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LGE Internal Use Only
3. TECHNICAL BRIEF
3.1.2 Memory support (and LCD interface)
The QSC62x0 device has two external bus interface (EBI) ports: EBI1 and EBI2.
EBI1 supports high-speed synchronous dynamic devices. Its memory controller supports the new mobile
DDR SDRAM memories with its higher bandwidth and ability to run at high clock frequencies. This
interface supports the high-bandwidth, high-density, and low-latency requirements of the QSC’s
advanced on-chip capabilities such as the ARM9 processor, highperformance graphics, and video
applications.
EBI2 is the slower speed interface intended to support memory devices such as NAND flash and
asynchronous SRAM, peripheral devices such as LCDs, and the UBM receiver for multicast or
broadcast reception (QSC6270 only). In addition, EBI2 is required to support a synchronous-burst
AAD NOR flash to enable a NOR/DDR SDRAM memory configuration because the simultaneous mode
(NOR, SDRAM) is not supported on the EBI1 bus.
The ARM926EJ-S microprocessor is a cached processor and all its accesses to external memory use burst
techniques of four or eight 32-bit words when the memory region is declared to be
cacheable/bufferable. To take advantage of this QSC higher performance feature, data from
memories must satisfy the requirements for these burst accesses.
Figure 3.1.2.1 The memory control blocks of C320
QSC6270
NAND Flash
(1Gbit)
SDRAM
512Mbit)
NAND_DATA[ 0: 15]
NAND__CS__N
NAND_ LB_N
NAND_UB_N
NAND_OE_N
NAND_WE_N
NAND_BSY_N
NAND_WP_N
_CE
ALE
CLE
_RE
_WE
RY_BY
_WP
IO[1: 16]
DDR_ A[0:13]
DDR_M_CLK_N
DDR_CKE[0]_
DDR_CS[0]_N_
DDR_RAS_N
DDR_CAS_N
DDR_WE_N_ _
DDR_DQM[0:1]_
DDR_ D[0:15]
CLK
CKE
_CS
_RAS
_CAS
_WE D
DQM
ADDR
DQ
EBI1
EBI2
(3G disable)
USIM
(SIM PLUS)
SIM_CLK
_ _
SIM_DATA
MUSIM_DM
MUSIM_DP
SIM_RST_N
External
Memory
( MICRO SD)
MSD_D[0:3]
MSD_CMD
MSD_CLK
3.1.2 Memory support (and LCD interface)
The QSC62x0 device has two external bus interface (EBI) ports: EBI1 and EBI2.
EBI1 supports high-speed synchronous dynamic devices. Its memory controller supports the new mobile DDR
SDRAM memories with its higher bandwidth and ability to run at high clock frequencies. This interface supports
the high-bandwidth, high-density, and low-latency requirements of the QSC’s advanced on-chip capabilities such
as the ARM9 processor, highperformance graphics, and video applications.
EBI2 is the slower speed interface intended to support memory devices such as NAND flash and asynchronous
SRAM, peripheral devices such as LCDs, and the UBM receiver for multicast or broadcast reception (QSC6270 only).
In addition, EBI2 is required to support a synchronous-burst AAD NOR flash to enable a NOR/DDR SDRAM memory
configuration because the simultaneous mode (NOR, SDRAM) is not supported on the EBI1 bus.
The ARM926EJ-S microprocessor is a cached processor and all its accesses to external memory use burst
techniques of four or eight 32-bit words when the memory region is declared to be cacheable/bufferable. To take
advantage of this QSC higher performance feature, data from memories must satisfy the requirements for these
burst accesses.
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3. TECHNICAL BRIEF
3.1.3 Connectivity
QSC6270 has connectivity features as below
– USB-OTG; USB LS, FS, and HS (2.0 compliant)
– I2C compatible for peripheral controls (1.8 V)
– UART: up to 4 Mbps
– Bluetooth 2.0 support via external SoC
– WLAN via external device (SDIO)
– NFC via external module (I2C)
– FM radio via external module (I2C)
– USIM, SIM, and USB-UICC support; 1.8 and 3 V
– Keypad interface
– SPI (master only) for peripheral support
– Two secure digital controllers — WLAN and secure digital (SD) cards
Figure 3.1.3 The connectivity of BL20
QSC6270
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3. TECHNICAL BRIEF
3.1.5 Air interfaces
The supported air-interface standards and features include: (See the RF technical description)
GSM/GPRS/EDGE Specification Release 4 (3GPP R4)
Enhanced GPS position location using gpsOne (with RGR6240 IC)
Integrated gpsOne functionality, featuring enhancements by SnapTrack®, Inc., to enable a wide variety of
location-based services and applications, including points of interest, personal navigation, and friend finder
Simultaneous-GPS (processes GPS using dedicated circuitry while voice and/or data signals continue to be
processed separately)
1024x searcher, direct facility termination (DFT) accelerator, off-chip RAM for measured data storage
3.1.6 Internal base band functions
Several baseband circuits within the QSC6270(3G disable)device provide functions that are necessary only to
make the device operate properly — these functions are not generally used directly by other
handset circuits and functions.
PLLs and clock generation
Modes and resets
Security
Qfuse
JTAG/ETM
The clock block includes two PLLs, all phase-locked to the TCXO signal. These PLLs generate several
different stable, low-jitter clock signals that are distributed throughout the QSC device and to external c
omponents as needed.
All the required WCDMA, GSM, GPS(only QSC6270), ARM, QDSP, and most peripheral clocks are derived in
some way from the TCXO (or XO) source for their operating modes, plus the 32.768 kHz
oscillator for their sleep modes
Figure 3.1.6 Clock block basic architecture of QSC6270(3G disable)
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3. TECHNICAL BRIEF
3.1.7 Multimedia
Multimedia topics are as below in QSC6270, including:
Camera interface and video front-end
Mobile display processor
Additional multimedia support: video, audio, graphics, and messaging
3.1.7.1 Camera interface and video front-end
The camera interface (CAMIF) connects the QSC62x0 device directly to a camera sensor. Typical applications
include Qcamera, Qcamcorder, and QvideophoneThe CAMIF delivers the raw 10-bit Bayer pattern data
(preferred) to the video front-end (VFE) that performs the required image processing (RGB-triplet generation,
color-space conversion, auto-white balance, auto exposure, gamma correction, etc.) and prepares the image
for capture or transmission. The QSC device also supports a YUV 4:2:2 input from the sensor
(8-bit, 2:1 MUX YUV or CCIR656 YUV).
The video capabilities of the two QSC devices varies slightly, with the QSC6270 providing higher performance
than the QSC6270 device — greater resolution, higher capture and streaming rates, etc.
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3. TECHNICAL BRIEF
3.1.7.2 Mobile display processor
The MDP is a hardware accelerator primarily responsible for transferring an updated image from the QSC
memory subsystem to the LCD module. The transferring of an updated image is an operation that is shared
between software, video processing, and graphics processing, so a common block helps to reduce
redundant circuitry. The MDP is designed with the assumption that the LCD panel has an embedded LCD
controller and a frame buffer. The image transfer is then the copying of the image from the QSC memory
system to the frame buffer within the LCD module.
While the MDP is transferring an image to the LCD module, it can perform a final set of operations to the
image. The set of operations that the MDP can perform has been chosen to maximize the efficiency of the
QSC memory subsystems, typically removing two or more copy operations of the image to and from
memory.
The MDP reduces redundant circuitry and offloads the ARM and aDSP from memory-transfer operations and
a certain set of graphics and video operations
Figure 3.1.7.2.1 MDP-to-LCD interface functional block diagram
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3. TECHNICAL BRIEF
3.1.8 UART
One universal asynchronous receiver transmitter (UART) port that supports low-speed, full-speed,
and high-speed modes
Serial data port communications that conform to the RS-232 interface protocol
Used for data transport during Bluetooth operation (BTS402x™ SoC required)
Other possible uses:
– Test and debug
– External keypad
– Ringer
– Load/upgrade system software
Separate FIFOs for Rx and Tx
Supporting circuits include:
– Interrupt control
– Clock source
– Bit-rate generator (BRG)
– Microprocessor interface
Flow control is not available on UART2 (behind USIM)
3.1.9 USB
Each USB link has a host and a peripheral; the host is responsible for initiating and controlling bus traffic
The USB specification requires PCs to act as hosts, and other devices such as printers, keyboards, mice, etc.,
to act as peripherals
USB 2.0 implementation defines three modes
- Low-speed (LS): 1.5 Mbps
- Full-speed (FS): 12 Mbps
- High-speed (HS): 480 Mbps
The QSC62x0 is compliant with the USB 2.0 specification
- All three modes are supported when acting as a host
- FS and HS are supported when acting as a peripheral
The QSC62x0 has two USB controllers
- Primary USB controller
- Secondary USB controller
The primary USB controller is supplemented by an integrated physical layer (PHY)
3.1.10 HKADC
The HKADC includes an analog multiplexer that selects an input for the sample and
hold circuit. One of three inputs can be selected:
HKAIN1, pin R22 – an external connection that is available as a general-purpose input,
though it is often used to monitor the power amplifier(s) temperature.
An on-chip connection to the power management circuit’s analog multiplexer output. This allows monitoring of:
-. Key power supply nodes such as VBAT, VCHG, etc.
-. Multipurpose pins (when configured as analog inputs)
-. A few on-chip parameters such as the die temperature or VREF
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3. TECHNICAL BRIEF
3.2 Power management
3.2.1 Input power management
Valid external supply attachment and removal detection
Unregulated (closed-loop) external charger supply as input power source
Integrated PFET charging pass transistor; eliminated sense resistor
Support for lithium-ion and lithium-ion polymer main batteries; nickel-based batteries are not supported
Trickle, constant current, constant voltage, and pulse charging of the main battery
Autonomous charging option – driven by an on-chip state machine without software intervention
Software-controlled charging option – backwards-compatible with previous QSC and PM products
Coin-cell battery (including charging)
Battery-voltage detectors with programmable thresholds
VDD collapse protection
Charger-current regulation and real-time monitoring for overcurrent protection
Charger-transistor protection by thermal control
Control drivers for the internal charging PFET and external battery PFET
Voltage, current, and thermal control loops
Automated recovery from sudden momentary power loss (requires external32.768 kHz crystal)
Figure 3.2.1 Input circuits schematic diagram
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3. TECHNICAL BRIEF
3.2.2 Output voltage regulation
The QSC62x0 device includes all the regulated voltages needed for most low-cost wireless
handset applications (and many other applications). Independent regulated power sources are
required for various electronic functions to avoid signal corruption between diverse circuits,
support power-management sequencing, and meet different voltage-level requirements. Sixteen
voltage regulators are provided — all programmable, all derived from a common bandgap reference circuit.
Three major types of voltage regulator circuits are on-chip:
Three positive voltage switched-mode power supply (SMPS) circuits
- One boost converter (rated for 600 mA)
- Three buck converters (rated for 500 mA each)
Thirteen positive voltage linear regulators
- Four rated for 300 mA
- Six rated for 150 mA
- Three rated for 50 mA
One negative voltage charge pump rated for 200 mA, referred to as a negative charge pump(NCP)
Each regulator has two logic-OR input bits; a logic high at either input enables that regulator:
A master bit that enables all regulators according to their default condition
A dedicated bit that enables only that regulator
The master enable reduces the number of write cycles needed when switching between the phone’s
sleep and active modes.
Additional comments that apply to regulator functions:
If a regulator’s default condition is on, that regulator will power on automatically at QSC startup.
The MSMP regulator must be on to allow internal communications between major functional blocks.
Each regulator and SMPS can provide more than its rated output current, though some
performance characteristics might be degraded.
All regulated output voltages are programmable.
All regulators can be set to a low-power mode except the VREG_USB_3P3 and VREG_NCP circuits
Copyright © 2010 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 29 -
LGE Internal Use Only
3. TECHNICAL BRIEF
Table 3.2.2 Voltage regulator summary
1. All regulator names are based on their intended use, though some may be used to power alternate
functions. For example, the USIM regulator is intended to power an external SIM card but may be used to
power other circuits (or not used at all).
2. Each current listed in this table is its regulator's rated value – the current at which the regulator meets all its
performance specifications. Higher currents are allowed, but higher input voltages may be required and
some performance characteristics may become degraded. See the appropriate regulator sections for details.
3. VREG_MSMP powers key internal circuits and should be kept on at its default voltage setting.
4. All regulators have default output voltage settings, even if they default to an off condition.
LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All right reserved.
- 30 -
Only for training and service purposes
3. TECHNICAL BRIEF
3.2.3 Charging control
C320 use single Charger.
- Single charger has five mode like “ OFF / TRICKLE / ISET / USB500 / FACTORY mode”.
- Single Charger is working as ISET mode in case of CC(Constant Current), CV(Constant Voltage) mode,
as USB 500mode in case of USB Charging.
- FACTORY mode is working only for Factory use.
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VBUS_LDO_4V9
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ND
CHG_STS_N
MUIC_IO_M
MUIC_IO_P
MUIC_ACC_ID
Copyright © 2010 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 31 -
LGE Internal Use Only