LG G5400 Schematics
8. CIRCUIT DIAGRAM
8.1 MAIN
1
A
B
KDS121E
RPWRON
R104
100K
C
2V8_VMEM
_SUBLCD_CS
ADD2
C131
0.1u
D
3
D101
13MHZ
U103 NL27WZ32US
8
VCC
7
Y1
6
B2
5
A2
2
1
C110
1000p
(n.a.)
A1
B1
Y2
GND
ONNOFF
1
2
3
4
C109
1000p
X101 MC-146
3
32.768KHz
ADD3
_MIDI_CS
_RAM_CS
_ROM_CS1
_WR
_LBS
_UBS
CLKON
4
12
_ROM_CS2
_RD
R107
10M
HOOK_DETECT
3
ADD0
ADD1
ADD2
ADD3
ADD4
ADD5
ADD6
ADD7
ADD8
ADD9
ADD10
ADD11
ADD12
ADD13
ADD14
ADD15
ADD16
ADD17
ADD18
ADD19
ADD20
ADD21
ADD22
_RAM_CS
_ROM_CS1
F/WE
_LBS
_UBS
_RD
CLKON
_RESET
USC0
USC1
USC2
USC3
USC4
USC5
ACC_DET
VIBRATOR
DEBUG_RX
HFK_EAR
DEBUG_TX
CHRDET
FLIP
_MIDI_IRQ
SPK_EN
JACK_DETECT
LED_G
LCD_RES
LED_B
INDLED_R
CHG_EN
EOC
_MIDI_RST
AMP_EN
_ROM_CS2
KEYROW0
KEYROW1
KEYROW2
KEYROW3
KEYROW4
KEYCOL0
KEYCOL1
KEYCOL2
KEYCOL3
KEYCOL4
H4
J3
J2
J4
K3
K2
K4
L4
L1
L3
L5
M1
M2
N1
P1
N2
P2
N3
M3
P4
N4
M4
P5
M14
M13
P14
P13
N12
M11
B2
G14
L12
B3
A3
N14
C14
D12
A14
A13
E11
C12
B13
D11
D10
B12
C11
D9
B11
A11
C10
D8
A10
C9
C7
B9
A9
B8
A8
D6
B7
L13
M12
A6
F4
D4
B5
A5
C4
E4
B4
A4
C3
1V8_VCORE
C101
47n
ADD0
ADD1
ADD2
ADD3
ADD4
ADD5
ADD6
ADD7
ADD8
ADD9
ADD10
ADD11
ADD12
ADD13
ADD14
ADD15
ADD16
ADD17
ADD18
ADD19
ADD20
ADD21
ADD22
RAMCS
ROMCS
WE
LWR
HWR
RD
PWRON
CLKON
CLKIN
OSCOUT
OSCIN
RESET
USC0
USC1
USC2
USC3
USC4
USC5
USC6
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPCS1
GPCS0
KEYPADROW0
KEYPADROW1
KEYPADROW2
KEYPADROW3
KEYPADROW4
KEYPADCOL0
KEYPADCOL1
KEYPADCOL2
KEYPADCOL3
KEYPADCOL4
8. CIRCUIT DIAGRAM
C111
C119
39p
( 1% )
C112 C113
0.1u
C120
39p
100R110
C130
0.01u
92
10p39p
0.1uC132
TXIP
TXIN
TXQN
TXQP
RXIP
RXIN
RXQP
RXQN
AFC
TX_RAMP
C114
39p
C117
39p
C121
39p
( 1% )
( 1% )
R146 1K
R145
C115
C133 C134
39p
1u
(1608)
CLOSE TO AD6521
CLOSE TO AD6521
VOUTNORP
VOUTNORN
AUXOP
AUXON
VBAT
R111
220K
R112
220K
2V8_VMEM
39p
MVBAT
A
A
B
B
2V8_VMEM
R105
R106
120K
120K
R108
LCD_ID
TEMPSENSE
R140
82K
82K
1K
C
AUXIP
AUXIN
VINNORP
VINNORN
R147
2.2K
D
VEXT4
GND11
D3
C103
47n
VSSRTC
E3
5
2V0_VRTC
C105
47n
A2
DATA0
VPEG1
DATA1
VDDRTC
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
GPIO_32
JTAGEN
GPIO_21
GPIO_20
GPIO_19
GPIO_18
GPO_0
GPO_1
CLKOUT
CLKOUT_GATE
GPO_24
GPO_5
GPO_6
BSOFS
GPO_2
GPO_3
GPO_4
GPO_7
GPO_8
GPO_9
GPO_10
GPO_11
GPO_16
GPO_17
GPO_18
GPO_19
GPO_20
GPO_21
DISPLAYCS
GPO_22
GPO_23
GPIO_22
GPIO_23
GPIO_24
SIMCLK
SIMDATAOP
ASDI
ASDO
ASFS
BSDO
BSDI
BSIFS
VSDI
VSDO
VSFS
C106
47n
R102
n.a.
N6
P6
M6
N7
M7
L7
P8
N8
M8
P9
M9
P10
N10
M10
P11
N11
L14
K11
J11
J12
H13
H14
B1
C2
D1
D2
E1
A1
C1
E2
F1
F2
F3
G4
G2
G1
G3
H3
H2
G13
G12
H12
F14
F13
H11
F12
E14
E13
G11
E12
D14
D13
F11
M5
A7
C5
J14
L10
K13
K12
J13
4
2V8_VMEM
VSIM
C102
47n
L9
H1
P7
K14
C8
VCC1
VCC2
VCC3
VCC4
J1
VSIM
GND1
GND2
K1
VMEM1L2VMEM2N5VMEM3
GND3
P3
C104
47n
N9
N13
B14
VEXT1
VMEM4
U101
AD6525XCA-REEL
GND4
GND5
GND6
GND7
GND8
L11
P12
L6
L8
C13
B10
A12
C6
VEXT2
GND9
D7
D5
VEXT3
GND10
B6
6 10
0R101
2V8_VMEM
0
1V8_VCORE
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
DSR
TP101
JTAGEN
TDO_1
ONNOFF
DIM_CNTL
RF_EN
IRDA_SD
VREG
ANT_SW1
GATE_EN
ANT_SW2
PA_EN
PA_BAND
PDNB
S_EN
S_DATA
S_CLK
_MAIN_LCD_CS
LCD_BACKLIGHT
KEY_BACKLIGHT
SIMVSEL
SIM_RST
SIM_EN
SIM_CLK
SIM_DATAOP
RPWON
TP102
VBAT
TP601
FWE
TP108
TP105
TP104
TDI
TMS
TCK
TP603
TP103
_WR
RPWRON
TDO_0
B2
B1
C2
C1
J4
K4
J2
K1
J3
K3
J1
H1
H2
G2
F2
F1
E2
D1
E1
D2
B4
A3
K2
7
C107
47n
TDI
TDO
TMS
TCK
RXON
TXON
MCLK
MCLKEN
RESET
ARSM
ATSM
ASDO
ASDI
ASFS
BSDI
BSIFS
BSDO
BSOFS
VSDO
VSDI
VSFS
IDACOUT
IDACREF
2V55_VAN
F10
B3
AVDD1
AGND4
J7
J8
AVDD2A9AVDD3
AGND3
B8
AGND1G9AGND2
1V8_VCORE
100KR103
U102
AD6521
DGND1
DGND2
J5
A2
A1
DVDD1
NC1
J9
2V8_VMEM
K5
DVDD2G1DVDD3
AFCDAC
RAMPDAC
AUXADC1
AUXADC2
AUXADC3
AUXADC4
VINAUXP
VINAUXN
VINNORP
VINNORN
VOUTNORP
VOUTNORN
VOUTAUXP
VOUTAUXN
NC2B9NC3
B6
B7
8
C108
47n
ITXP
ITXN
QTXN
QTXP
IRXP
IRXN
QRXP
QRXN
REFCAP
REFOUT
BUZZER
NC4
R113
0
1V8_VCORE
R114
0
(n.a.)
F9
E9
C9
D9
E10
D10
C10
B10
A10
H9
A8
A7
A6
A5
B5
A4
H10
G10
J10
K10
J6
K8
K7
K9
K6
AUXADC4
BOARD_TEMP
AUXADC4
C124
0.01u
C118
39p
E
LGIC(42)-A-5505-10:01
Section
Designer
Checked
Approved
Iss.
1
2
3
4
5
Notice No.
Date
Name
03/06
2003
03/06
2003
03/06
2003
LG Electronics Inc.
Sign & NameDate
KN KIM
DH YUN
JS KEE
MODEL
DRAWING
NAME
DRAWING
NO.
G5400(toshiba)
HERCULES/PEGASUS
V1.3
Sheet/
Sheets
1/6
LG Electronics Inc.
- 95 -
8. CIRCUIT DIAGRAM
8.2 AUDIO
_MIDI_RST
_MIDI_IRQ
A
DATA15
DATA14
DATA13
DATA12
DATA11
DATA10
_MIDI_CS
2V8_VMEM
B
C
D
E
LGIC(42)-A-5505-10:01
DATA9
DATA8
ADD0
_RD
_WR
13MHz
HFK_EAR
C205
0.1u
1
1
AUXIP
_MIDI_RST
_MIDI_IRQ
ADD0
C206
0.1u
C239
2V8_VMEM
100K
C208
0.1u
0.1u
R232
HFK_EAR
C240
39p
0
1
AUXIN
R219
100K
U201
48
_RESET
1
_IRQ
2
IFSEL
18
D7
19
D6
20
D5
21
D4
22
D3
23
D2
25
D1
26
D0
14
ILE
15
_CS
16
_RD
17
_WR
30
CLOCK
3
SYNC
46
TEST1
47
PTESTIN2
29
PTESTIN1
13
PTESTO2
36
PTESTO1
28
DVDD1
44
DVDD2
27
VDDIO
38
DRVGND
24
DGND1
45
DGND2
2V8_VMEM
CONNECTION
HEADSET
HFK
2
ML2870GDZ060
0R255
(n.a.)
U205
MAX4599EXT-T
2
PANEL
VIB
PWMD
PWMC
PWMB
PWMA
AOUTR
AOUTL
VREFR
VREFL
TESTA3
TESTA2
TESTA1
AVDD
AGND
C219
39p
39
37
43
42
41
40
35
P4
34
P3
33
P2
32
P1
31
P0
11
10
9
8
7
6
5
4
12
C220
10uF
HFK_AUXIP
2V8_VMEM
(1608)
3
R247 0
AMP_EN
R204 560K
C202 0.022u
R202 20K
0.022u
2V8_VMEM
R212
2.2K
R214
3.3K
C230
0.1u
C207
0.1u
2V8_VMEM
R213
1M
C232
0.1u
2V8_VMEM
VIN-
4
VIN+
3
R215
620K
HEADSET_MIC_P
VCC
GND
5
2
LED_R
C201
C236
39p
U206
MAX9075EXK-T
1
OUT
RPWRON
20KR201
R203
560K
C203
1u
HOOK_DETECT
VBAT 0R263
C241
0.1u
RPWRON
0
1
U208
MAX4599EXT-T
CONNECTION
VCHARGE
7COLOR
34
VCHARGE
R260
2.7K
U207 LM4890LD
5
IN-
4
IN+
1
SHUTDOWN
2
BYPASS
7
NC1
9
NC2
R259
10K
INDLED_R
C242
0.1u
VDD
GND1
GND2
REC_SPK-
REC_SPK+
SPK_EN
8
2V8_VMEM
C235
39p
HFK_AUXOP AUXON
AUXOP
HEADSET_SPK_P
HFK_EAR
2V55_VAN
R207
C212
10uF
(1608)
1K
R208
1.2K
MAX4684EUBU204
1
V+
2
NO1
3
COM1
4
IN1
5
NC1
10
A
10
NO2
9
COM2
8
IN2
7
NC2
6
GND
HFK_AUXON
C221
0.1u
B
5
VBAT
6
VO1
10
VO2
8
3
C231
11
0.1u
VOUTNORP
VOUTNORN
64 9
2V8_VMEM
VBAT
R266R265
0
(n.a.)
C237
39p
U203 MAX4684EUB
1
2
3
R220
R221
4.7
C226
47p
4.7
C227
47p
4
5
7
0
10
NO2
V+
9
COM2
NO1
8
COM1
IN2
7
IN1
NC2
6
GND
NC1
C204
47p
R205
100K
C210
39p
C
C214
0.1u
100
C216
0.1u
100
(1608)
C222 10uF
C224
47p
R211
1.2K
Date
03/06
2003
03/06
2003
03/06
2003
LG Electronics Inc.
C215
39p
SP207
CLOSE TO MIC
4.7R216
4.7R217
C225
47p
Sign & Name
KN KIM
DH YUN
JS KEE
SP208
SP204
R218
MIC201
VA204
VA203
C244
C245
39p
39p
SP201
SP202
AVL14K02200
VA202
VA201
1M
SP206
SP205
AVL14K02200
AVL14K02200
MODEL
DRAWING
NAME
DRAWING
NO.
OBG-13L42-C33
AVL14K02200
Headset jack
J201
5
1
3
4
2
G5400(toshiba)
AUDIO
V1.3
Sheet/
Sheets
2/6
D
2V8_VMEM
R261
100K
(n.a.)
Iss.
2V8_VMEM 2V8_VMEM
R257
1M
VIN-
4
VCC
VIN+
3
GND
2
R258
620K
Notice No.
C243
39p
U209
MAX9075EXK-T
5
1
OUT
R264
VINNORP
VINNORN
JACK_DETECT
0R262
(n.a.)
0
HEADSET_SPK_P
HEADSET_MIC_P
R209
R210
Section
Designer
Checked
Approved
Date
Name
5
LG Electronics Inc.
- 96 -
8.3 MIDI
8. CIRCUIT DIAGRAM
22
VBAT
19
DGND
11
EOC
CHG_EN
CHRDET
GATE_EN
VBAT2
27
VRTCIN
VSIM
VCORE
VTCXO
VMEM
VRTC
REFOUT
_RESET
MVBAT
AGND
2
VAN
NC1
NC2
NC3
7
C302
0.1u
(n.a.)
18
21
23
25
20
3
26
16
5
17
24
32
C307
0.1u
2V8_VMEM
100K
C301
10uF
(1608)
R306
R308
10K
C308
0.22u
(1608)
(n.a.)
98
10
A
VSIM
1V8_VCORE
2V55_VAN
2V75_VTCXO
2V8_VMEM
2V0_VRTC
R304 100
MVBAT
C306
100p1000p
R310 0
(n.a.)
C310
C309
2.2u
C311
2.2u
0.1u
(1608)
0R311
SIMVSEL
C312
0.22u
(1608)
C313
2.2u
(1608)
C314
0.1u
BAT301
2V0_VRTC
R316
10K
C315
(n.a.)(1608)
0.1u
C305
100p
_RESET
B
CC
1
2
3
4
5
6
A
VBAT
2V8_VMEM
R315
100K
C3190.1u
CHG_EN
CHRDET
GATE_EN
U302
ADP3522
30
31
29
28
15
10
12
14
4
13
33
EOC
_PWRONKEY
ROWX
PWRONIN
TCXOEN
1
SIMEN
RESCAP
8
SIMVSEL
9
GATEDR
GATEIN
ISENSE
6
CHRDET
CHGEN
BATSNS
7
CHRIN
EOC
GND
C321
0.1u
(n.a.)
C320
0.1u
J3
G4
K4
H5
H6
K7
G7
J8
K3
H4
J4
K5
J7
H7
K8
H8
J5
G5
J6
J9
G3
A1
A10
B1
B10
C1
F1
F6
F9
F10
G1
G6
G10
L1
L10
M1
M10
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VCCF1
VCCF2
VCCPS
U301
TH50VPF5783AASB
VSS0
VSS1
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
DATA0
B
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
_CEF1
_CEF2
_WE
_BYTE
RY_BY
_WP_ACC
_RESET
_CE1PS
CE2PS
DU1
DU2
G2
A0
F2
A1
E2
A2
D2
A3
F3
A4
E3
A5
D3
A6
C3
A7
C7
A8
E7
A9
F7
A10
C8
A11
D8
A12
E8
A13
F8
A14
D9
A15
G9
A16
F4
A17
E4
A18
D7
A19
E6
A20
E9
A21
H2
F5
H3
_OE
C6
H9
E5
C5
D5
C4
_LB
D4
_UB
J2
D6
K6
G8
R318 0
TP301
R320 0
R322 NA
ADD1
ADD2
ADD3
ADD4
ADD5
ADD6
ADD7
ADD8
ADD9
ADD10
ADD11
ADD12
ADD13
ADD14
ADD15
ADD16
ADD17
ADD18
ADD19
ADD20
ADD21
ADD22
0R324
_RESET
2V8_VMEM
_LBS
_UBS
_RAM_CS
NAR321
_ROM_CS2
_ROM_CS1
_RD
_WR
2V8_VMEM
R323
10K
C322
NC
2V8_VMEM
R319
10K
(2012)
D302
CUS02
C303
10uF
VBAT
VCHARGE
R301
0.33
Q301
6
7
8
D5
D6
TPCF8102
G45S
D33D4
D2
2
D1
1
POWERKEY
KEYROW0
RPWRON
CLKON
SIM_EN
C304
D
E
LGIC(42)-A-5505-10:01
D
Section
Designer
Checked
Approved
Notice No.
1
2
4
53
Date
NameIss.
Date
03/06
2003
03/06
2003
03/06
2003
Sign & Name
KN KIM
DH YUN
JS KEE
LG Electronics Inc.
MODEL
DRAWING
NAME
DRAWING
NO.
G5400(toshiba)
MEMORY/3522
V1.3
Sheet/
Sheets
3/6
LG Electronics Inc.
- 97 -
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