LG CED-8081B Service Manual

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Page 1

INTRODUCTION

FEATURES

1. General

1) Enhanced IDE interface.

2) Internal 5.25 inch, halfheight CD-R/RW Drive.

3) 2 Mbytes buffer memory.

4) Audio CD like tray loading of a disc without using a caddy.

5) Power loading and power ejecting of a disc. The disc can also be ejected manually.

6) Supports Power saving mode and Sleep mode.

7) Vertical and Horizontal operation.

2. Supported disc formats

1) Reads and writes data in each CD-ROM, CD-ROMXA, CD-I FMV, Video CD, and CD-EXTRA

2) Reads data in Photo CD (Single and Multi session).

3) Reads and writes standard CD-DA.

4) Reads and writes CD-R discs conforming to “Orange Book Part 2”.

5) Reads and writes CD-RW discs conforming to “Orange Book Parts 3”.

3. Supported write method

1) Disc at once (DAO), Session at once (SAO), Track at once (TAO), Variable packet, Fixed packet, and Multi-session.

4. Performance

1) Random 100 ms average access time.

2) Max 4,800 kB/sec (Max 32X) Sustained Transfer rate.

3) Supports real time error correction and real time layered error correction at each speed.

4) Supports CD-R write operation at double speed, quadruple speed, and eight speed.

5) Supports CD-RW write operation at double speed and quadruple speed.

6) PIO Mode 4 & Multi DMA Mode 2 Support.

7) MPC-3 Spec compliant.

5. Audio

1) Output 16 bit digital data over ATA interface.

2) 4 Times Digital Filter for CD Audio

3) Software Volume Control

4) Equipped with audio line output and headphone jack for audio CD playback.

5) Front panel Volume Control for Headphone Output.

This service manual provides a variety of service information. It contains the mechanical structure of the CDR/RW Drive and the electronic circuits in schematic form. This CD-R/RW Drive was manufactured and assembled under our strict quality control standards and meets or exceeds industry specifications and standards. This CD-R/RW drive is an internal drive unit designed for use with IBM PC, HP Vectra, or

compatible computer. It can write as much as 650 Mbytes of digital data into CD-R/RW disc, and can read as much as 650 Mbytes of digital data stored in a CD-ROM, CD-R and CD-RW disc. This CD-R/RW Drive can easily meet the upcoming MPC level 3 specification, and its Enhanced Intelligent Device Electronics (E-IDE) and ATAPI interface allows Plug and play integration in the majority of today’s PCs without the need of an additional interface card.

Page 2

SPECIFICATIONS

1. SYSTEM REQUIREMENTS

-CPU: IBM Compatible Pentium 233MHZ (or faster)

(For 8X Write speed, 266MHz or faster recommended.)

-32MB Memory or greater

2. SUPPORTING OPERATING SYSTEM

3. GENERAL

1) Host Interface.......................................................................................................................ATAPI compliant

2) Read Function

• Acceptable discs ...............................................................CD-ROM Mode1 (basic format), CD-ROM XA

CD-Audio Mixed Mode (Audio and Data Combined) Photo-CD (Single and Multi-Session) CD-I Ready, Video CD CD-Plus/CD-Extra, CD-R (Conforming to “Orange Book Part2”) CD-RW (Conforming to “Orange Book Part3”)

3) Write function

• Applied Format..................................................................CD-ROM Mode-1

CD-ROM XA CD-Audio Mixed Mode (Audio and Data Combined) Video CD CD-Plus/CD-Extra,

• Writing Method..................................................................Disc at once(DAO)

Session at once(SAO) Track at once(TAO) Variable packet writing Fixed packet writing Multi-session

4) Cache memory (R/W) .........................................................2 Mbyte

5) Disc diameter ......................................................................12 cm (8 cm Read only)

6) Data capacity (Yellow-Book)

• User Data/Block ................................................................2,048 bytes/block (Mode 1 & Mode 2 Form 1)

2,336 bytes/block (Mode 2) 2,324 bytes/block (Mode 2 Form 2) 2,352 bytes/block (CD-DA)

7) Rotational Speed

CD-Audio.............................................................................6x~15x(CAV) Approx.3000 rpm

CD-RW data ........................................................................8x~20x(CAV) Approx.4000 rpm

CD-ROM/CD-R data............................................................14x~32x(CAV) Approx. 7000 rpm

8) MTBF

• 120, 000 POH at an operating duty of 10% at room temperature.

4. DRIVE PERFORMANCE

1) Data Transfer Rate

* Sustained Data Transfer Rate ..........................................150 Kbytes/s (1x)

300 Kbytes/s (2x) 600 Kbytes/s (4x) 1,200 Kbytes/s (8x) 2,400 Kbytes/s (16x) 2,100 to 4,800 Kbytes/s 14 to 32x CAV

• DOS 3.1 or Higher

• Windows ‘95/’98/’2000

• OS/2 Warp (Ver 3.0)

• Solaris Ver 2.4 or higher

• Linux Slackware Ver 2.3

• Windows NT 4.0 or later

Page 3

* Burst Data Transfer Rate (ATAPI) ....................................16.67 Mbytes/sec (PIO Mode 4)

16.67 Mbytes/sec (MULTI-DMA Mode 2)

2) Average Access Time

Random Access ..................................................................100 ms Typical (Max.32X) : INCLUDING LATENCY

3) Data Buffer Capacity ...........................................................2 Mbytes

5. POWER REQUIREMENTS

1) Voltage

+5 V DC with + 5% tolerance, less than 100 mVp-p Ripple voltage +12 V DC with +5% tolerance, less than 100 mVp-p Ripple voltage

2) Current

• Hold Track State ...............................................................+5V DC 1.0A, +12 V DC 0.8A

• Seeking & Spin up ............................................................+5 V DC 1.2A, +12 V DC 1.0A

6. AUDIO PERFORMANCE

* CED-8081B FUNCTION TABLE

Item Typical Limit Test Signal Test Condition Note

Output Level

0.7 Vrms

10 % 1KHz 0 dB No Filter at 47 kΩ

S/N 80 dB 75 dB 1KHz 0 dB with IHF-A + 20KHz LPF at 47kΩ

THD 0.2 % 0.25 % 1KHz 0 dB with IHF-A + 20KHz LPF at 47kΩ

Channel

70 dB 65 dB 1KHz 0 dB with IHF-A + 20KHz LPF at 47kΩ

Separation

Frequency +

2dB

Response

H/P

Output Level

AUDIO OUT

3 dB 20Hz~18KHz 0 dB No Filter at 47 kΩ

0.6Vrms

20 % 1KHz 0dB No Filter H/P Volume MAX at 32 Ω

FFuunnttiioonn CCEEDD--88008811BB

• CD-R Writing speed 2x/4x/8x Data writing

• CD-RW Writing speed 2x/4x Data writing

• CD-ROM Reading speed 32x Data transfer

MM OO DD EE LL

Page 4

LOCATION OF CUSTOMER CONTROLS

1. Disc tray

This is the tray for the disc. Place the disc on the ejected disc tray, then lightly push the tray (or push the eject button) and the CD will be loaded. NOTE: Don’t pull out or push in the disc tray forcibly. This might cause damage to the loading section of the drive.

2. Stop/Eject button

This button is pressed to open the CD tray. This button works only when power is supplied to the drive. If an Audio CD is playing, pressing this button will stop it, and pressing it again will open the tray.

3. Play/Skip button

When an Audio CD is in the disc drawer, pressing this button will start playing Audio CDs from the first track. If an Audio CD is playing, pressing this button will skip to the next track.

4. Emergency Eject Hole

Insert a paper clip here to eject the Disc tray manually or when there is no power.

5. Volume control

This is used to adjust the output volume of the headphone jack. It can’t be used to adjust the output volume for the audio output connectors on the rear panel. NOTE : Turn the volume down before turning on the power. Sudden loud noises can damage your hearing.

6. Headphone jack

This jack is for connecting headphones or minispeakers.

7. Drive activity indicators

Two colored LEDs are used to indicate the operation of CD-R/RW Drive. (1) Read The orange color is displayed when the spindle motor begins the Spin up operation: accessing data, reading data, playing Audio, and up loading tray. (2) Write The green color is flashed during disc writing sessions.

READ

WRITE

COMPACT

Headphone Jack

Volume Control

Drive Activity Indicators

Play/Skip Button

Stop/Eject Button

Disc Tray

Emergency Ejct Hole

Front Panel

Page 5

1. Power Connector

Connects to the power supply (5-and 12-V DC) of the host computer. NOTE : Be careful to connect with the proper polarity. Connecting the wrong way may damage the system (and is not guaranteed). Usually this connector can only be attached one-way.

2. IDE Interface Connector

Connect to the IDE (Integrated Device Electronics) Interface using a 40-pin flat IDE cable. NOTE : Do not connect or disconnect the cable when the power is on, as this could cause a short circuit and damage the system. Always turn the power OFF when connecting or disconnecting the cable.

3. Jumper Connector

This jumper determines whether the drive is configured as a master or slave. Changing the master-slave configuration takes effect after power-on reset.

4. Analog Audio Output Connector

Provides output to a sound card (analog signal). Generally you need this to play a regular audio CD.

5. Digital Audio Output Connector

Provides output to a sound card (digital signal).

DIGITAL ANALOG

INTERFACE POWER

CS M S

LG39

+12

GND

AUDIO AUDIO

Digital Audio Output Connector

Jumper Connector

Analog Audio Output Connector

IDE Interface Connector

Power Connector

Rear Panel

Page 6

1. CABINET and CIRCUIT BOARD DISASSEMBLY

1-1. Bottom Chassis

A. Release 4 screws (A) and remove the Bottom Chassis

in the direction of arrow (1). (See Fig.1-1)

1-2. Front Bezel Assy

A. Insert and press a rod in the Emergency Eject

Hole and then the CD Tray will open in the direction of arrow (2).

B. Remove the Tray Door in the direction of arrow

(3) by pushing the stoppers forward.

C. Release 3 stoppers and remove the Front Bezel Assy.

1-3. Cabinet and Main Circuit Board

A. Remove the Cabinet in the direction of arrow (4).

(See Fig. 1-3)

B. Release 2 hooks (a) and remove the CD Tray

drawing forward.

C. Remove the Main Circuit Board in the direction of

arrow (5).

D. At this time, be careful not to damage the 4

connectors, are positioned at left side, of the Main Circuit Board.

2. MECHANISM ASSY DISASSEMBLY

2-1. Pick-up Unit

A. Release 2 screws (B). B. Separate the Pick-up Unit in the direction of arrow (6).

(4)

(5)

Main Circuit Board

Cabinet

Hooks (a)

Fig. 1-1

Fig. 1-2

DISASSEMBLY

Fig. 1-3

Mechanism Assy

Pick-up Unit

(B)

(6)

Fig. 1-4

(1)

(A)

Bottom Chassis

(A)

Tray Door

(3)

Stoppers

Emergency Eject Hole

(2)

Front Bezel Assy

CD Tray

Page 7

2-2. Pick-up

A. Release 1 screw (C) and remove the Pick-up.

2-3. Sled Motor Assy

A. Release 2 screws (D),(E) and remove the Sled

Motor Assy.

(D)

(E)

Sled Motor Assy

Fig. 1-5

Fig. 1-6

Pick-up Unit

(C)

Pick-up

Page 8

TROUBLESHOOTING GUIDE

Are the pin 41

and 44 of PN201 +12V and +5V

respectively after the power

cable connecting?

Reset or Power Check.

• Check the power(12V, 5V) short.

• Check PC power cable.

• Repair the PC power supply.

• Check the IC101(RESET IC).

• Check the IC102(PQ1U331), IC201

(OTI-9790), IC301(MB90F476)

Does the pin 1 of IC101 change 0V to 5V at the power supply initial input mode?

• Is the pin 16 of IC401 4.0V?

• Is the pin 31 of IC401 2.0V?

• Is the pin 5 of IC102 3.3V?

• Is the pin 7 of IC514 2.5V?

• Is the pin 1 and 2 of IC514 2.0V?

• Is the pin 1 of IC512 8.0V?

YES

Are the X201 and X301 oscillating?

• Check the X201, X301.

• Check the IC201, IC301.

• Check the IC401(OTI9071).

• Check the IC102(PQ1U331).

Check the IC514(NJM3414).

• Check the IC512(NJM7808).

Check it after connecting the power cable

only on interface cable for NO Reset or

Power ON.

YES

Page 9

System Check.

Go to “Tray operating is abnormal”

Load tray without inserting disc.

Does Tray operate normally?

Does Pick-up move to inside?

Does Spindle Motor rotate in a moment?

Does Laser turn on?

After eject tray, Inset CD-ROM Disc

and reloading.

Does Disc stop?

Does Disc rotate

continuously as Disc recognition is

abnormal?

After eject tray, Inset CD-R Blank Disc

and reloading.

Does Disc rotate

continuously as Disc recognition is

abnormal?

Does Disc stop?

Go to “Sled operating is abnormal”

Go to “Spindle operating is

abnormal”

Go to “Laser is abnormal”

Go to “Spindle control is abnormal 1”

Go to “Spindle control is abnormal 2”

Go to “Spindle control is abnormal3”

Go to “Disc recognition is abnormal”

YES

Does Lens move

Up/Down?

Go to “Focus Actuator operating is

abnormal”

YES

Page 10

Is the input voltage

0V at IC301 pin 10 when push the

SW802?

Tray operating is abnormal.

Is there Tray

drive voltage output?

(IC501 pin 15, 16)

Is TRAY_MUTE signal “L”?

(IC501 pin 20)

• Check the connection of IC301 pin 10.

• Replace the SW802(Eject s/w)

(Tray open/close doesn’t work)

• Check the connection of IC301 pin 18.

• Replace the IC301.

• Check the Tray Connector(PN301).

• Check the Motor Line and Motor.

YES

Is there Tray control signal input?

(IC501 pin 26)

• Check the connection of IC409 pin 12.

• Replace the IC409(BU2500FU).

• Check the communication line between

IC409 and IC301(MICOM).

YES

When PN301

is open, Is there Tray drive

signal output?

• Replace the IC501(BA5983FM).

YES

Page 11

Is there Sled

control signal output?

(IC409 pin 7)

Sled operating is abnormal.

Replace the IC501 (BA5983).

Replace the IC508 (BU4053).

Replace the IC409.

Is Act_Mute signal ‘L’?

(IC501 pin 9)

• Check the connction of IC502 pin 17.

• Replace the IC502(BA5925FA)

Check the connection of IC301 pin 13.

Is there

HALL/SLDOUT signal

input? (IC301 pin 39)

Is there

SLED FG signal input?

(IC301 pin 63)

Check the IC502(BA5925).

Check the communication line

between IC409 and IC301.

YES

Is there

HALL 1 signal input?

(IC508 pin 3)

•

Check the Connector(PN501).

•

Replace the SLED Motor.

Is there Sled drive voltage

input? (IC501 pin 23)

YES

Is there

Sled drive voltage output?

(IC501 pin 17, 18)

YES

Page 12

Is there

Spindle control signal input?

(IC510 pin 22)

Spindle operating is abnormal

•

Check the connection of IC201 pin 2.

•

Replace the IC201(OTI-9790).

Is there

DMO signal input?

(IC509 pin 5)

Replace the IC508(BU4053).

Is there

Spindle drive voltage output?

(IC510 pin 2, 4, 7)

•

Check the Spindle

Connector(PN502)

•

Replace the Spindle Motor.

YES

Is SPNON signal “H”?

(IC510 pin 23)

YES

•

Replace the IC509(NJM3404).

• Check the connection of IC301 pin 14.

• Replace the IC301(MICOM).

Is SBRK signal “L”?

(IC510 pin 18)

YES

• Check the connection of IC301 pin 30.

• Replace the IC301(MICOM).

Is there a

SPNFG signal input?

(IC301 pin 62, IC201 pin 7)

YES

• Check the connection of IC510 pin 19.

• Replace the IC510(BA6664FM).

Is there Spindle

control signal output?

(IC509 pin 7)

YES

Page 13

Focus Actuator operating is

abnormal

Is there Focus

Search control signal input?

(IC501 pin 3)

Is Act_Mute signal “L”?

(IC501 pin 9)

• Replace the IC501(BA5983).

• Check the connection of PN401 pin 1, 4.

• Check the Pick-up Connector(PN401).

• Check the connection of IC301 pin

• Replace the IC301(MICOM).

YES

• Replace the Pick-Up.

Is there Focus

Search drive voltage output?

(IC501 pin 13,14)

• Check the connection of IC201 pin 207.

• Check the communication line between

IC201 and IC301.

• Replace the IC201 (OTI-9790)

YES

Spindle control is abnormal 1

(CD-ROM Disc)

Does FOCUS Servo

operate normally?

Is there a output normally?

(IC401 pin 34, 33)

• Replace the IC403(KM4200).

Go to “Spindle operating is

abnormal”

• Replace the IC401(OTI9071).

YES

Is there RFAC signal input?

(IC201 pin 163)

• Go to “Focus Servo is unstable”

YES

Page 14

Is there RRF signal input?

(IC403 pin 3, 2)

Spindle control is abnormal 2

(CD-ROM Disc)

Go to “RF output is abnormal”

Is there EFM signal output?

(IC403 pin 7)

YES

Replace the IC403(KM4200).

Does Tracking Servo

operate normally?

YES

Go to “Track Servo is unstable”

Go to “Disc recognition is abnormal”

Is there WBLIN signal input?

(IC201 pin 132)

Spindle control is abnormal 3

Go to “RF output is abnormal”

Is there ATG signal output?

(IC401 pin 41)

YES

Replace the IC401(OTI9071).

Is there DMO signal output?

(IC202 pin 2)

YES

Replace the IC201(OTI-9790).

Go to “Spindle operating is abnormal”

Page 15

Is there CDR/RW signal input

normally? (IC601 pin 33)

Go to “Track Servo is unstable”

Disc recognition is abnormal

Replace IC301 (MICOM)

Is there RECD1,

RECD2 signal output normally?

(IC401 pin 61, 62)

Go to “RF output is abnormal”

YES

Is there

PICK UP (A, B, C, D)

output normally?

(PN401 pin 8, 9, 14, 15)

RF output is abnormal

•

Check the PICK UP FFC.

•

Replace the PICK UP.

Go to “Laser is abnormal”

YES

Is RRF

signal output normal?

(IC401 pin 89)

•

First Recognition try: Over 1.04 Vpp

•

Second Recognition try:

Over 0.3 Vpp

YES

•

Check the connection between PN401 and IC401.

•

Replace the IC401(OTI9071).

Page 16

Focus Servo is unstable

Is FE signal

output normal in Focusing

Up/Down?

(IC401 pin 30)

YES

Check the IC401(OTI9071).

Go to “RF output is abnormal”

Go to “Focus Actuator

operating is abnormal”

Track Servo is unstable

Is TE signal

output normal in Focusing

ON and Tracking OFF?

(IC401 pin 28)

YES

•

Check the PICK UP FFC.

•

Replace the PICK UP.

Check the IC401(OTI9071).

Go to “RF output is abnormal”

Check the IC404 (NJM3403)

Is TE signal

input normal in Focusing

ON and Tracking OFF?

(IC201 pin 198)

Replace the IC201(OTI-9790).

Check the Driver IC(IC501) and

P/U referring to “Focus Actuator

operating is abnormal”.

Is there TAO

signal output in Tracking ON?

(IC201 pin 208)

Is PICK UP

(E, F, G, H) output normal?

(PN401 pin 16, 7, 13, 10)

YES

Is FAQ signal

output normal in Focusing

Up/Down?

(IC201 pin 207)

Replace the IC201(OTI-9790)

YES

Page 17

Is EEPROM Data valid?

Execute ‘B.Calibration Data’ of

‘How to use Test Tool (Dragon)’

Execute ‘D.LD Inspection’ of ‘How

to use Test Tool(Dragon)’

YES

OK?

Laser is abnormal

OFF LEVEL NG?

VRDC NG?

Normal

Execute ‘C.LD Power Setup’ of

‘How to use Test Tool(Dragon)’

YES

VWDC1 NG?

YES

Page 18

LD CHECK (Not Read)

Execute ‘E. LD On’ of ‘How to

use Test Tool (Dragon) : ‘VRDC

Loop [Read Mode]’

PN401 Pin 32(ENBL)=H?

Normal

•

Check the connection of IC601 pin 20.

•

Check and replace the IC601(Asic).

YES

IC401 Pin 10(RREF):

CED-8081B:3.1+/-0.2V?

•

Check the connection of IC409 Pin 18, IC410 Pin 1, 2, 3.

•

Check and replace the IC409(DAC).

YES

IC401 Pin 4(FPDO):

2.4+/-0.3V?

•

Check the connection of PN401 pin 19.

•

Check and replace the PN401, PICK UP.

YES

PN401 Pin 25(VRDC) : CED-8081B:0.9+0.5V?

•

Check the connection of IC401 pin 12.

•

Check and replace the IC401.

Execute ‘D. LD Inspection’ of ‘How to use Test Tool(Dragon)’

Check the P/U connector and then replace the P/U.

YES

VRDC NG?

Page 19

•

Check the connector of IC601 pin 20.

•

Check and replace the IC601(Asic).

PN401 Pin 32(ENAB) = ‘H’?

Execute ‘E. LD On’ of ‘How to

use Test Tool(Dragon)’:

‘VWDC-1 Loop’

PN401 Pin 27 (VWDC1) :

1.2+/-0.8V?

•

Check the connection of IC401 pin 6.

•

Check the connection of IC409 pin 9.

•

Check and replace the IC401, IC409.

Check the P/U connector and

replace the P/U.

Execute ‘D. LD Inspection’ of ‘How to

use Test Tool(Dragon)’

YES

• Check the connection of IC601 pin 18,29 and 34.

• Check and replace the IC601(Asic).

PN401 Pin 31(W/XR) = ‘H’?

YES

•

Check the connection of IC409 pin 4.

•

Check and replace the IC409(DAC).

IC401 Pin 5(WREF) :

3.1+/-0.2V?

YES

• Check the connection of PN401 pin 19.

• Check and replace the PN401, PICK UP.

IC401 Pin 4(FPDO) :

2.4+/-0.3V?

YES

VWDC NG?

Normal

LD CHECK (Not Recorded)

Page 20

• Check the connection of IC601 pin 21 and 30.

• Check and replace the IC601(Asic).

• Check the connection of IC601 pin 18 and 34.

• Check and replace the IC601(Asic).

•

Check the connection of IC409 pin 19.

•

Check and replace the IC409(DAC).

P/N401 Pin 30(ODON) = ‘H’?

Execute ‘E.LD On’ of ‘How to

use Test Tool(Dragon)’ :

‘VWDC-2’

PN401 Pin 31(W/XR) = ‘H’?

PN401 Pin 26(VWDC2) :

CED-8081B:3.4+0.4V?

Check the P/U connector and

replace the P/U.

YES

Page 21

In case of writing fail.

Normal Case

Check disc Label.

Finalized Disc?

Check the Media CD-R or

CD-RW?

If CD-R disc, use new CD-R disc.

If CD-RW disc, erase the disc.

Go to “Writing Part Check”

YES

Remove the Dust, Fingerprint and

if the disc has long width

Scratch, change it.

Does the disc

have any Dust, Scratch,

Fingerprint...?

YES

Use LG bundle Software

(Write Tool & Version)

- Easy CD Creator 4.02c Direct CD 3.01c...

Is the write Tool(version)

supported by LG CD-RW

Drive?

YES

Check disc information on Writng Tool.

[If you get some data information with

“Non Recordable Disc” Message, the

disc is finalized -Finalized Disc :

unrecordable Disc any more]

Eject Disc.

YES

Page 22

Writing Part Check.

Refer “Laser is abnormal”.

Load tray with CD-R/RW Disc.

Run the Writing Tool

(Easy CD Creator).

Run the Writing with Tool

(Easy CD Creator).

Go to “ALPC Logic Circuit Check”.

Go to “BETA Measurement

Circuit Check”.

YES

Does Writing finish without

any error?

Is the written file read

normally?

Is the re-written file readed

normally?

Is ROPCSH input signal

Pulse when CD-R writing?

(IC401 pin 49)

The blink

alternates between LED1 and

LED2 when Writing start (OPC

operation)?

Do the IC301(MICOM)

pin 11 and pin 12 output toggle

signals during Writing?

•

Check the connection between IC301 pin 11, 12 and LED.

•

Check and replace the LED803, 804.

YES

• Check the communication lines

between IC301 and IC201.

• Check and replace the IC301.

Eject Tray.

Check the connection of IC201 pin 187

and replace the IC201.

Page 23

Dragon : Execute LD ‘Off’ Dragon : Execute ‘LD Off’

ALPC Logic Circuit Check.

• Check the connection of IC301 pin 23.

• Check and replace the IC301.

• Check the connection of IC301 pin 20.

• Check and replace the IC301.

•

Check the connection of IC201 pin 166.

•

Check and replace the IC201.

•

Check the connection of IC601 pin 13.

•

Check and replace the IC601.

Execute ‘E. LD On’ of ‘How to

use Test Tool(Dragon)’ : ‘CD-R Recording Mode’

IC601 Pin 33 (CDR/RW) = ‘H’?

IC601 Pin 34(WR/RE) = ‘H’?

IC601 Pin 27(WGATE) = ‘H’?

IC401 Pin 60(WLDON) = ‘H’?

•

Check the connection lines of IC201.

•

Check and replace the IC201.

Are IC601

pin 29(EFM1), 30(EFM2),

42(RESAMP1), 2(RESAMP2),

41(ROPC1) pulse

signals?

•

Check the connection lines of IC601 pin 21, 18.

•

Check and replace the IC601.

Are PN401 pin 30 (ODON),

31(W/XR) pulse signals?

•

Check the connection lines of IC601.

•

Check and replace the IC601.

Are IC401

pin51(WFPDSH), 50(RFPDSH),

53(WBLSH), 54(SPDSH),

51(MPDSH) pulse

signals?

YES

Page 24

Dragon : Execute LD ‘Off’

• Check the connection of IC301 pin 23.

• Check and replace the IC301.

• Check the connection of IC301 pin 20.

• Check and replace the IC301.

•

Check the connection of IC201 pin

166.

•

Check and replace the IC201.

Execute ‘E. LD On’ of ‘How to use

Test Tool (Dragon)’ :

‘CD-RW Recording Mode’

IC601 Pin 33(CDR/RW): ‘L’?

IC601 Pin 34 (WR/RE) : ‘H’?

IC601 Pin 27(WGATE) : ‘H’?

•

Check the connection of IC601 pin

13.

•

Check and replace the IC601.

IC401 Pin 60(WLDON) : ‘H’?

•

Check the connection lines of IC601.

•

Check and replace IC601.

Are IC401

pin 51(WFPDSH), 50(RFPDSH),

53(WBLSH), 54(SPDSH), 51(MPDSH)

pulse signals?

• Check the connection lines of IC201.

• Check and replace IC201.

Are IC601

pin 29(EFM1), 30(EFM2),

42(RESAMP1), 2(RESAMP2),

41(ROPC1) pulse signals?

YES

•

Check the connection of IC601 pin 21, 18.

•

Check and replace the IC601.

Are IC401 pin 30(ODON),

41(W/XR) pulse signals?

YES

Normal

Page 25

BETA Measurement Circuit Check.

• Check the connection of IC401 pin 89.

• Check and replace the IC401(OTI9071).

• Check the connection of IC401 pin 85.

• Check and replace the IC401.

After inserting Test Disc

(TCD-784), 1x play.

IC401 Pin 89(RRF) : 2.5V+/-1.0V?

IC301 Pin 36(ASYM1) :

Peak of IC401 Pin 85

(RRFIN2)?

IC401 Pin 85 (RRFIN2) :

2+/-1.0V??

• Check and replace the IC301 (MICOM).

IC301 Pin 23(CDR/RW) : ‘H’?

YES

IC301 pin 37(ASYM2):

Bottom of IC401 Pin

85(RRFIN2)?

YES

• Check the connection of IC401 pin

77, 78.

• Check and replace the IC401.

Normal

Page 26

No audio output

• Check and replace the IC301.

• Check and replace the IC201.

•

Check the connection of L/R OUT.

Insert the audio Disc.

Adjust H/P volume max. (VR801)

AUD_MUTE : ‘L’?

(IC301 Pin 6)

Do LOUT, ROUT signals output?

(IC201 Pin 151, 154)

Do audio Line signals output?

(PN201 Pin51, 54)

•

Check and replace the JK801.

Does the audio

signal output at the headphone

jack(JK801)?

•

Check and replace the IC801.

Do audio signals output?

(IC801 Pin1,7)

YES

Normal

Page 27

In case of audio play switch

not working.

• Check the connection of IC301 pin8.

• Replace the IC301.

• Check the connection of SW801.

• Replace SW801.

Replace the IC301.

Is IC301 pin 8 5V before pushing

PLAY KEY (SW801)?

Is IC301 Pin 8 0V pushing the

SW801?

YES

Page 28

ATIP Absolute Time in Pre-groove. With an additional modulation of the “Wobble”, the “Groove” contains a time

code information.

Wobble The pre-groove in the Disc is not a perfect spiral but is wobbled.

With : – A typical amplitude of 30 nm

– A spatial peried of 54~64 µm

CW Continuous Wave. The laser light output is at a constant level.

DOW Direct Over-Write. The action in which new information is recored over previously recorded information in

CD-RW disc.

Overwrite

The action in which new information is recorded over previously recorded information.

(Pre-)Groove

The guidance track in which clocking and time code information is stored by means of an FM modulated wobble.

Land Land is characterized in the following way:

When radial signals are concerned,land is defined as the area between the grooves. When HF signal are concerned,land is defined as the area between the marks(pits) in tangential direction.

Hybrid Disc A Multisession disc of which the first Session is mastered. On a hybrid disc, recorded and

mastered information may co-exist.

Mastered Information,stored as pits on the disc during the manufacturing process of the disc. Information (when making the master)

OPC Optimum Power Control. Procedure is determined optimum recording power according to CD-

R/RW Media in recording start step.

ROPC Running OPC. The purpose is to continuously adjust the writing power to the optimum power

that is required. When the optimum power may change because of changed conditions of disc and change in operating temperature.

Jitter The 16 value of the time variation between leading and trailing edges of a specific (I3 … I11) pit

or land as measured by Time Interval Analysis.

Deviation The difference between a fixed value of Pit length and Land length.

TOC Table Of Contents : in the Lead-in Area the subcode Q-channel contains information about the

Tracks on the disc.

Packet A method of writing data on a CD in small increments. Writing Two kinds of packets can be written : Fixed-length and Variable-length.

Write The shape of the HF write signal used to modulate the power of the laser. Strategy The Write Strategy must be used for recordings necessary for disc measurements.

Information Wobble, ATIP, Disc Identification, Write Power, Speed Range OPC Parameters, etc are Area recorded in the Information area of CD-RW Disc

Finalization The action in which (partially) unrecorded or logically erased tracks are finished and the Lead-in

and/or Lead-out areas are recorded or overwritten with the appropriate TOC subcode.

Logical Erase

A method to remove information from a disc area by overwriting it with an EFM signal containing mode 0 subcode A logically erased area is equivalent to an unrecorded

Physical Erase

The action in which previously recorded information is erased by overwriting with a CW laser output. After a Physical Erase action, the erased area on the CD-RW disc is in the unrecorded state again.

Session

An area on the disc consisting of a Lead-in area, a Program area, a lead-out area.

Multi session

A session that contains or can contain more than one session composed Lead-in and Lead-out

GLOSSARY

Page 29

The differences of CD-R/CD-RW discs and General CD-ROM

1. Recording Layer

Recordable CD has a wobbled pre-groove on the surface of disc for laser beam to follow track.

2. Disc Specification

Read-only Disc

CD-R and CD-RW Disc

3~11T

1.6um

0.4~0.5 um

(Pit)Groove

Land

Track pitch(p)

Radial Direction

Groove

Land

Radial Error Signal

The Groove wobble

Average center

Actual center

CD-ROM CD-R CD-RW

Standard Yellow Book Orange Book II Orange Book III

Record Not available Write once Re-writable

I 11/Itop

> 0.6 > 0.6 0.55 > M11> 0.70

(HF Modulation)

Write Laser Power(mW) 4-15 mW 6-14 mW

Read Laser Power(mW) < 0.5 mW < 0.7 mW < 1.0 mW

Jitter < 35 nsec < 35 nsec < 35 nsec

Reflectivity (R

top) 70 % 65 % 15 % ~ 25 %

CD-ROM (READ-ONLY DISC)

a=30nm

Page 30

3. Disc Materials

1) CD-ROM disc

Laser Beam

Groove

Substrate (Polycarbonate)

Organic Dye Layer

Reflective Layer

Protective Layer

Label Printing

2) CD-R disc

Pigment Reflective Layer Color

Phtalocyanine Gold/Silver Yellow/White

Cyanine Gold/Silver Dark Green/Bright Green

Az o Gold/Silver Dark Blue

• It is composed of Silver _ colored aluminum plate and Reflective layer.

• Groove (Pit) of aluminum plate make a track.

• Laser wavelength : 780 nm, Laser Power (Read): 0.5mW

• Signal is detected by the

difference of reflective beam intensity between “pit” and

“Land” on the disc.

• It is so-called WORM (Write Once Read Many) CD.

• It is composed of polycarbonate layer, Organic dye layer, Reflective layer, and Protective

layer.Gold/Silver Reflective layer is used to enhance the reflectivity

• According to the kinds of Organic dye layer, it is divided by Green CD, Gold CD, Blue CD.

• Laser Wavelength : 780 nm, Laser Power (read) : 0.7 mW

• Recording Power : 1x(4~8mW), 2x(8~10mW), 4x(10~13mW), 8x(12~15mW).

• When some part of dye layer is exposed to laser heat, it’s color changs black.Therefore, writing and

reading is enabled by the difference of reflectivity between changed part and unchanged part.

• Polycarbonate layer has Pre_Groove which make a Track.

Laser Beam

Pit

Substrate (Polycarbonate)

Reflective Layer

Protective Layer

Label Printing

Page 31

33)) CCDD--RRWW DDiisscc

Reading process of Optical Disc

Laser Beam

Groove

Substrate (Polycarbonate)

Reflective Layer

Dielectric Layer(TL)

Dielectric Layer(UL)

Protective Layer

Label Printing

• It is composed of polycarbonate layer, alloy(silver, arsenic) layer, aluminum reflectivity layer, protective layer.

• An crystalized alloy layer is transformed into noncrystalized by the laser heat. Therefore, writing and reading

is enabled by the difference of reflectivity.

• It is possible to overwrite about 1000 times.

• Laser Wavelength : 780 nm, Laser Power (Read) : 1.0mW

• Recording Power : Erase (4~8mW), Write (12~16mW)

• When disc rewriting, new data is overwritten previously recorded data.

• Polycarbonate layer has a Pre-Groove which make a track.

Lens

Beam Spot

Focusing Lens

Laser Spot at Constant Read Intensity

Reflected Light Signal

Laser Spot Position (Time)

Previously Recorded Marks

Groove Land Mirror

top

Numerical aperture: NA=nsinθ,

n: Refractive index

Focus depth : H =

λ/

laser spot diameter :

D = λ/NA

Page 32

5. Writing Process of CD-R Disc

a b c d e f g

Incident Laser Powe r

(Read)

(Write)

Laser Spot Position (Time)

a b c d e f g

Laser Spot Position (Time)

Laser Spot

Recorded Mark

Reflected Light Signal

Below "ORP"– Mark Too Short

At Optimum Record Power ("ORP")

Above "ORP" – Mark Too Long

Time

6. Writing process of CD-RW Disc

Write Power

Erase Power

Read Power

Groove

Crystal

Amorphous

Recorded state

(lower reflectivity)

Melting/

quenching

Heating/

gradual cooling

Crystal phase

Erased state

(higher reflectivity)

Page 33

7. Organization of the PCA, PMA and Lead-in Area

1) Layout of CD-ROM disc

Center hole Clamping and Label Area Information Area

Lead-in Area

Diameter 15 mm

Diameter 46 mm

Diameter 120 mm

Program Area

Read Only Disc

Lead-out Area

Program Area Lead-out Area

Center hole

Clamping and Label Area

Information Area

PCA PMA

Test Area Count Area

Diameter 15 mm

Diameter 45 mm

Diameter 120 mm

Unrecorded Disc

Tsl-00:35:65 Tsl-00:15:05

Tsl-00:13:25

Tsl

99:59:74 00:00:00

in out

Test Area : for performing OPC procedures.

Count Area : to find the usable area immediately in T.A

Tsl : start time of the Lead-in Area, as encoded in ATIP

PMA : Program Memory Area

Disc Center

2) Layout of CD-R/RW disc

Page 34

8. Function of PCA and PMA area

1) PCA (Power Calibration Area)

• PCA area is used to determine the correct Laser Power for a disc. – Method 1 : PCA area is divided by a track. – Method 2 : The previous Calibration value is referred. – Method 3 : ROPC is used to determine Laser Power value automatically in data writing.

• CD-R Disc can write maximum 99 Tracks but CD-RW Disc can write unlimited tracks because it has a rewritable

function.

2) PMA (Program Memory Area)

• It has a track information (track No, track Start/End time) of every track before writing completed. – PMA area has the last written point and the next writable point of a disc. – In case of CD to CD copy, some writer may not write PMA area.

* When Disc is Finalized,

PMA information is transferred to the Lead_In area so that general Driver can read it.

* Because PCA and PMA area exist before Lead-In area, General CD Player or CD-ROM Drive can’t read

these areas.

9. OPC and ROPC

1) OPC (Optimum Power Control)

• This is the first step of writing process, because CD writer has its own laser power value and media have different writing characteristics,

– This is determined by the Writing characteristic, speed, temperature, and humidity. – Laser wavelength is determined by the environmental temperature (775~795nm) and Optical Laser Power is

determined by the test and retry.

• Asymmetry and optimum writing Power

– EFM signal Asymmetry is determined by the writing power.

Therefore, Optical Power which has the same value to the preset power value can be estimated by measuring HF signal Asymmetry on the PCA area.

• Measurement of Asymmetry

* Parameter setting (Beta) : Using AC coupled HF signal before equalization

Beta = (A1+A2)/(A1-A2)

Time

P << Po

Time

P = Po

HF Signal

Time

P >> Po

Page 35

2) ROPC (Running Optimum Power Control)

• Variable primary factor of Optimum Power

– Change of Power sensitivity on the Disc. (limited to 0.05 *Po) – Wavelength shift of the laser diode due to the operating temperature change. – Change of the Spot aberration due to the Disc skew,

Substrate thickness, Defocus.

– Change of Disc or Optics conditions due to the long term OPC

==> It is necessary to adjust continuously to obtain the Optimum Power.

• Principle of Running OPC

– To meet the factors mentioned above,

a horizontal _ direction movement of a curve is uesd.

– Beta = f(B-level) = constant on the Recorded Disc – Procedure of ROPC

a. Reference B-level is determined during OPC Procedure. b. During Recording, B-level value is controlled to have a close

Reference B-level value.

c. Normalization of B-level is used to eliminate the effect of reflectivity fluctuation.

==> The reflected B-level value is normalized by the disc reflectivity itself.

CCDD --RR //RR WW

Media

Write Strategy Determination

PCA Test Area

Program Area

PMA Area

Lead-In Area

Lead-out Area

OPC

PCA Count Area

ROPC

* Recording Capacity of CD-R/RW (74Minute Recording media)

• (2048 Byte/Sector) X (75 Sector/Second) X (60 Second/Minute) X 74 Minute = 681,984,000 Bytes = 682 Mbytes

• But the actual recording capacity is about 650 Mbytes. (according to the ISO 9660 standard, approximately 30 Mbytes are used to make directory structure and volume names.)

Incident recording pulse

Reflected recording pulse

Sampled timing B

11T

Sample B-level (Write Power)

Level B

Sampled at timing B

Pwo decided by OPC

Recording Power

Level B with Pwo

normalized to recording power

Sample Disc Reflectivity (Read power)

10. Writing Process of DISC

Page 36

INTERNAL STRUCTURE OF THE PICK-UP

1. Connection diagram of the Pick-up

VCC

GND

IC1

FCS -

TRK -

TRK +

FCS +

FGND

PDGND

PDVcc

PDVc

FPDVc

FPDO

Vcc

CFREQ

CMOD

PGND

VRDC

VWDC2

VWDC1

GND

OSCEN

WE2

WE1

ENBL

2 Axis Actuator

FPD

VOUT

VREF

IINR

RFREQ

IIN2

IIN3

OUTEN2

OUTEN3

PDIN

Vcc

IOUT

GND

RAMP

ENBLE

OSCEN

Vcc

IC2

*KRS-202A : CED-8081B¡ﬂS

Page 37

2. Pin Description

Pin No. Symbol I/O Function

1 FCS- I Focus coil-

2 TRK- I Tracking coil-

3 TRK+ I Tracking coil +

4 FCS+ I Focus coil +

5FGND

Frame GND

6 PGND

PDIC GND

7 F O PDIC F OUT

8 B O PDIC B OUT

9 A O PDIC A OUT

10 H O PDIC H OUT

11 VCC I PDIC VCC

12 VC I PDIC VC

13 G O PDIC G OUT

14 D O PDIC D OUT

15 C O PDIC C OUT

16 E O PDIC E OUT

18 FPDVC I LD Power Monitor Amp VC

19 FPDO O LD Power Monitor Amp Out

20 Vcc (5V) I LD Analog Voltage +5V

21 Vcc (5V) I LD Analog Voltage +5V

22 CFREQ I Change Frequency

23 CMOD I Change Modulation

24 PGND

LD Power GND

25 VRDC I Read Power Analog Control Voltage Input

26 VWDC 2 I Overdrive Analog Control Voltage Input

27 VWDC 1 I Overdrive Analog Control Voltage Input

28 GND

LD GND

29 OSCEN I Module Control SW L : off, H : on

30 WE2 I Write Enable 2 L : Write 2 ON

31 WE1 I Write Enable 1 L : Write 1 ON

32 ENBL I LD Drive Current OFF SW, L : LD off

Page 38

3. Signal detection of the P/U

1) Focus Error Signal ==> (A+C)-(B+D)

This signal is generated in RF IC (IC401 : CXA2551R) and controls the pick-up’s up and down to focus on Disc.

2) Tracking Error Signal (DPP Method) ==> {(A+D)-(B+C)}- kx {(F+H)-(E+G)}

This signal is generated in RF IC (IC401 : CXA2551R) and controls the pick-up’s left and right shift to find to track on Disc.

3) RF Signal ==> (A+B+C+D)

This signal is converted to DATA signal in DSP IC (IC201 : OTI-9790).

Pick-Up module

Photo Diode

Tracking

Focusing

Infrared Iaser

k[(F+H) - (E+G)]

(A+D) - (B+C)

(A+D) - (B+C) - k[(F+H) - (E+G)]

Offset

Sub2

Main

Tp/2

Sub1

Track Center

F, E

D,C

A,B

H,G

Page 39

DESCRIPTION OF CIRCUIT

1. ALPC (Automatic Laser Power Control) Circuit

1-1. ALPC Loop Circuit

IC601 (Asic)

ERGCNT

IC401 OTI9071

IC410

P/V

(PN401)

RFPDSH

WFPDSH

IC409

(BU2500FV)

WLDON

C453

R461

R474

R475

R493

C454

-8 to 7.5dB

0.5dB/step

-1

x10

+ +

IC410

S/H

WLDON

rwapc

fgdg

rldon

rdaon

VRDCN

FPDO

FPDVC

VRDC

VRDC1

VRDC

RREF

VWDCN

VWDC

WREF

VWDC1

VWDC2

FPD0

FPD1

FVREF

RFPDSH

WLDON

WFPDSH

-1

S/H

wdaon

writelev

C427

C443

R413

2.5V

Q403

Q402

Q404

R429

Q406

Q405

R406

R413

vwdcsw1, vsdcsw2

ivon

readlev1

readlev2

VWDC

FGND

WLDON

PDGND

3 4 18

2.5V

R484

C474

R452

R486R476

R404

C472

R479

C465

R477

C446

C401

R485

C475

C445

Page 40

1-2. ALPC(Automatic Laser Power Control) Circuit Operation

This circuit consists of Feedback Loop to maintain light output of the Laser Diode (FPDO). Feedback signal, output voltage from PD (Photo Detector) of P/U, is used monitor the light power of Laser Diode. RREF (Read Reference Voltage) of IC401 (OTI-9071) Pin 10, which is from DAC (IC409) Pin 18, is the reference level of the Read Loop part of this ALPC Circuit. WREF (Write Reference Voltage) of IC401 (OTI-9071) Pin 5, which is from DAC (IC409) Pin 3&4, is the reference level of the Write Loop part of this ALPC Circuit.

* Read Loop

• When playback

VRDC (Pin 12) signal of OTI-9701 is output to P/U through Gain Control S/W and drives Laser Diode during play back. This S/W Circuit is designed to reduce transition time from CD-RW writing mode to playback mode.

• When writing mode

- CD-R Three Laser Power Levels, Read, Write, and Overwrite, are used to write on CD-R disc, and Read Level is used to monitor the output laser power. For stabilizing read loop, the S/H signal (FRPDSH), which sample and hold the Read Level of laser power in the CD-R writing mode, is input through Pin 50 of OTI-9071.

- CD-RW Three Laser Power Levels, Read, Erase and Write, are used to write on CD-RW disc, and Erase Level is used, during CD-RW writing, to monitor output laser power. It is not VRDC but VWDC that is the output signal of the control loop performed by Erase level. ERGCNT makes ALPC Loop stable when it is changed to playback mode from writing mode.

* Write Loop

For stabilizing Write Loop, the S/H signal (WFPDSH), which sample and hold the Erase Level of laser power in the CD-RW writing mode, is input through Pin 51 of OTI-9071. Output voltage of Write Loop, VWDC (Pin 6 of OTI-9071), is protected by the high limit diode applied to P/U. In the writing mode, the reference signal of Write Loop is WREF (Pin 3&4 of IC409) and it is input to Pin 5 of IC401 (OTI-9071).

Page 41

2. RF Amplifier Circuit

Block Diagram

91 92 93

96 97

IC401Pick up KRS-202A

LPF

(100KHz)

LPF

(80KHz)

Offset adj Gain adj

A,B,C,D

E,F,G,H

GND

VCC

PDIC

AGC

BPF

HPF

(A+C)-(B+D)

OTI-9071

CEO

ATFG

AGC

Slice

Circuit

Gain Adj.

Offset adj.

IC201 132

IC201 197

IC201 163

IC201 198

IC201 194

IC201 204

EQRFN

EQRFP

IC403

TEBC

IC404

LPF

(200KHz)

LPF

(80KHz)

LPF

(200KHz)

LPF

(200KHz)

LPF

(10KHz)

Gain Adj.

Page 42

3. Focus/Tracking/Sled Servo Circuit

3-1. Focus, Tracking & Sled Servo Process

Focus, Tracking Serve

Sled control

C DBA

Pick up

A,B,C,D,E,F,G,H

IC401 OTI9071

A,B,C,D

E,F,G,H

Focus Error

FAO

T+ T F

F+

TAO

Track Error

Detector

D/A

Level shift

Focus, Tracking

Sled Motor

IC501 Driver BA5983FM

Actuator

Level shift

Hall sensor

Digital EQ Auto Adj. Circuit

SLED -MOVE

SLO

IC501 Driver BA5983FM

Sled control signal

IC201 Servo control OTI9790

FAO

TAO

TE FE

A/D

IC502 BA5925FA

H1 +

SLD+

SLD-

H1 H2 + H2 -

SLD-FG

IC301 µ-com

IC409 BU2500

Speed Detector

Page 43

3-2. Focus Servo

The aim of Focus Servo is to maintain the distance between object lens of P/U and disc surface, so that the detected RF signals (A, B, C, D) can be maximized. Focus Servo is based on focus error (FE) signal which is generated from focus error detection block in OTI9071 (IC401) using Astigmatism Method. Focus gain and path can be changed at the OTI9071 according to the disc, and the resulting output (FE) is input to Servo IC (IC201, OTI-9790). FE signal after first amplification in OTI-9790 is A/D converted and input to Digital Equalizer Block, most important part at the Focus Servo. At the Digital Equalizer, adjustments for Focus Bias and Loop Gain are performed. After D/A converted, Focus servo signal is output through FAO port (OTI-9790, Pin 207) and drive Focus Actuator through the Focus Drive IC (IC501, BA5983FM).

3-3. Tracking Servo

The aim of Tracking Servo is to make laser beam trace the data track on disc. Tracking Error (TE) signal is generated from tracking error detection block in OTI9071 (IC401) using DPP (Differential Push-Pull) Method. DPP method uses not only main beam (A, B, C, D) but side beams (E,F and G, H) for correcting DC offset generated in Push-Pull method. The remaining procedures of TE signal processing in OTI-9790 is similar to Focus Servo. After D/A converted, Tracking servo signal is output through TAO port (OTI-9790, Pin 208) and drive Tracking Actuator through the Tracking Drive IC (IC501, BA5983FM).

3-4. Sled Servo

The working distance of tracking actuator is too short to cover whole disc radius. Sled Servo make PU move by little and little so that the laser beam keep tracing the data track on disc continuously when tracking actuator reaches the working limit. Another function of Sled Servo is to seek a target point on disc, following user commands. Sled error signal is generated with accumulated tracking error signal (that is DC value of TE), which is input to Servo IC (OTI-9790, Pin 198). After compensation in OTI-9790, Sled servo signal is output through SLO (OTI-9790, Pin 3) and drive Sled Motor via IC501. Another sled control signal, SLEDMOVE from U-COM, is used in the seek mode for data access. SLEDMOVE signal is compared with feedback speed signal via Hall sensor and speed detection IC502(BA5925FV) so that the sled movement speed can be controlled accurately, and it is possible to seek data access point very fast.

Page 44

4. Spindle Servo Circuit

4-1. Spindle Servo Process

4-2. Spindle Servo

Spindle servo is as followings;

1) CD EFM CLV x8: Video CD.

2) Wobble CLV x2, x4, x8: Blank area in CD-R, CD-RW.

3) CD 15x CAV: CD-DA, eccentric CD-R/RW.

4) CD 24x CAV: Recorded area in CD-RW.

5) CD 32x CAV: CD-ROM. Recorded area in CD-R. – Spindle Servo is controlled by IC201 (OTI-9790) and servo signal is output via DMO (pin 2).

E F

BDC

Pick up

IC401 OTI9071A

Wobble Signal Generator

SRF

FILTER

WBLIN

EFM

LOCK

TON

DMO

SPN8/12Cm

SPNBOOST

SPNON

DEFS

ATIP CLV, FG

CD-DSP/SERVO

CD EFM CLV CAV x32

MOTOR SPEED CONTROLLER

SPNFG REVDEF

IC201 OTI9790

Frequency Controller

Level shift

Decode PLL

IC301

IC508 BU4053

µ-com

Spindle Motor

IC510 BA6664FM

Hall sensor

Page 45

MAJOR IC INTERNAL BLOCK DIAGRAM AND PIN DESCRIPTION

IC401 (OTI-9071) : RF Signal Processor for CD-R/RW

Block Diagram

CEO

MPPO

CEP CEN

TEIN TE FE TC

XTAND

AGCCAP1

SADO

FEO

MPPO

SPPO

VREF

SBCO

VREF

MCLK

BHO1

VREF

SWRF1

SWRF2

WLDON

VREF

SRFO RFO

PHO1

AGCCAP2 AGCCAP3 AGCON ATFM ATFG BPFCLK

SRCH# SRCHLP DTE RPBC RRFIN1 TEBC RP RX TX

BHO1 PHO1

PHO2

RECD1 RECD2

RRF

EQRFP EQRFN

AUX1

VARIOUS INTERNAL SIGNAL

AUX2 AUX3

WREF

MUXOUT1 MUXOUT2

BHO2

BHC1 PHC1

VWDC1 VWDC2

VREF

2VREF

RBIAS

FVREF

FPDO

FPDI

RFPDSH

WFPDSH

VRDCN

VRDC RREF

VWDCN

VWDC

MCLK

PRST#

ULAT UTXD URXD USCK

WREFSH

WPLTSH

GAINUP

WBLSH

HIN

GIN

FIN

EIN

SPDSH

DIN

CIN

BIN

AIN

MPDSH

HAVC

BHC2 PHC2

RRFIN2

WLDON RECDIN

INPUT

S/H

STAGES

AND

MATRIX

FUNCTIONS

FOCUS

AND

TRACKING

FUNCTIONS

ATIP

FUNCTIONS

TX/RX

GENERATION

PEAK

BOTTOM

HOLD

PEAK

BOTTOM

HOLD

FOR BETA

EQUALIZER

APC

VREF

I/F

Page 46

• Pin Assignment

Pin No. Name Analog Digital Pin Description

Type Type

1 AVDD P Analog power

2 FPDI I Laser power monitor output

3 FVREF I APC reference voltage

4 FPDO O Laser power monitor output

5 WREF I/O Power setting input/output voltage for write APC

6 VWDC O Laser driver control output for write.

7 VWDC1 O Auxiliary laser driver control output for write.

8 VWDC2 O Auxiliary laser driver control output for write.

9 VWDCN I/O Laser driver control input for write.

10 RREF I/O Power setting input/output voltage for read APC

11 VRDCN I/O Laser driver control input for read.

12 VRDC O Laser driver control output for read.

13 VRDC1 O Laser driver control output for CDRW read

14 RBIAS I/O Reference current setting pin

15 AVSS G Analog ground

16 2VREF I/O 2x Reference voltage (4.2V)

17 AVDD P Analog power

18 CEO O Center position signal

19 CEP I/O Gain and fc setting node for center position signal

20 CEN I/O Gain and fc setting node for center position signal

21 RP1 O RF ripple signal

22 RPBC I Ripple balance

23 RPCT I Ripple center input

24 RP2 O RF ripple signal

25 RPIN I AC-coupled RP input

26 RPDC O DC-coupled RP signal output

27 BS O Beam strength

28 TE O Tracking Error output

29 TEIN I External bypass TE input

30 FE O Focus error output

31 VREF I/O Reference voltage (2.1V)

32 TEBC I Tracking Error Balance

33 EQRFP O Equalized RF output (+ve)

34 EQRFN O Equalized RF output (-ve)

35 AGCCAP1 I/O AGC1 gain control node

36 AGCCAP2 I/O AGC2 gain control node

37 AGCCAP3 I/O AGC3 gain control node

38 AVDD1 P Analog power

39 ATFM O Wobble signal output

40 AVSS G Analog ground

41 ATFG O Digital wobble signal output.

42 BPFCLK I ATIP band-pass filter clock input.

Page 47

Pin No. Name Analog Digital Pin Description

Type Type

43 TC O Track crossing signal

44 DVDD P Digital power

45 TX O Zero crossing of TE

46 DVSS G Digital ground

47 RX O Zero crossing of RP

48 WPLTSH I SWRF1 sample gate

49 WREFSH I SWRF2 sample gate

50 RFPDSH I Sample pulse for read APC

51 WFPDSH I Sample pulse for write APC

52 MPDSH I Main beam input sample gate

53 WBLSH I Wobble signal sample gate

54 SPDSH I Side beam input sample gate

55 DVDD P Digital power

56 AGCON I ATIP AGC on

57 DVSS G Digital ground

58 GAINUP I Gainup photodetector signals

59 XTAND O Off-track detection output

60 WLDON I Write laser on

61 RECD1 O Recording area detection

62 RECD2 O Recording area detection

63 ULAT I Microcontroller latch

64 DVDD P Digital power

65 USCK I Microcontroller clock

66 UTXD O Microcontroller transmit data

67 URXD I Microcontroller receive data

68 DVSS G Digital ground

69 PRST# I Power-on-reset (active low)

70 MCLK I 34.5744MHz Clock Input

71 AVSS G Analog ground

72 AUX1 I Auxiliary analog input for MUXOUT

73 AUX2 I Auxiliary analog input for MUXOUT

74 AUX3 I Auxiliary analog input for MUXOUT

75 MUXOUT2 O Analog multiplexer output 2

76 MUXOUT1 O Analog multiplexer output 1

77 PHO1 O Peak hold output 1

78 BHO1 O Bottom hold output 1

79 PHC1 I/O Peak hold control node

80 BHC1 I/O Bottom hold control node

81 PHO2 O Peak hold output 2

82 BHO2 O Bottom hold output 2

83 PHC2 I/O Peak hold control node

84 BHC2 I/O Bottom hold control node

85 RRFIN2 I RRF input pin for peak/bottom hold 2

Page 48

Pin No. Name Analog Digital Pin Description

Type Type

86 RRFIN1 I RRF input pin for peak/bottom hold 1

87 RECDIN I RF input for recording area detection

88 AVDD P Analog power

89 RRF O Read RF signal output

90 AVSS G Analog ground

91 AIN I Main beam input signal (A)

92 BIN I Main beam input signal (B)

93 CIN I Main beam input signal (C)

94 DIN I Main beam input signal (D)

95 HAVC I/O Main/Side beam input signal reference voltage

96 EIN I Side beam input signal (E)

97 FIN I Side beam input signal (F)

98 GIN I Side beam input signal (G)

99 HIN I Side beam input signal (H)

100 AVSS G Analog ground

Page 49

IC201(OTI-9790) : ATAPI Interface, Write and DSP Signal Processor

Block Diagram

MONIT EFMR3 EFMR2 EFMR1

EFM ASY

PANICIN

ESFS EEFS

WGATE

HFSW

EFM1…3

WRSMP

EFCK

EFMNT1-4

E11TP

E11TS RESMP1,2 ROPC1…3

MONIT0

MIO0 MIO1 MIO2

DOUT

MIO3

WBLIN

XIN

XOUT

C34M

CLKOUT

MON

FGIN

SBRK

REVDET

SLO

FOO

TRO

VREF

2VREF

TEBC

RPBC

RXTXCE

LDON

FLAGA…D

TEST0,1

DMO

PRST#

UAD[7:0]

UALE

UA[15:0]

URDY

UWR#

URD#

UCSO#

UCS1#

UINT0#

UINT1#

SDINT#

CPUTYPE

RD[15:0]

ROE#

RCASL#

RCASH#

RWE#

RRAS0#

RA11/RRAS1#

RA10/RRAS2#

RA9/RRAS3#

RAD[8:0]

HDASP#

HA[2:0]

HPDIAG#

IOCS16#

HIRQ

DMACK#

HIORDY

HRD#

HWR#

HDRQ

HD[15:0]

HRST#

ARST#

CS3FX#

CS1FX#

DPLL

Decoder

VPSET Register

CIRC

4K SRAM

Encoder

PLL

Audio

ATIP

Demodulator

CLK

Generator

Spindle

Motor

Controller

ASYNC

ASYNC+

MSF

TON Bit

DMCON Bit

0 1

CD-SERVO

Spindle/Focus/Tracking/Sled

Microcontroller

Interface

USB

D+

D-

48MHz

ATAPI

Interface

DRAM

Interface

Buffer

Manager

NXSYNC Bit

nX-1X

1X/2X CLV

34.5744MHz

PLLC0,1 Register

LRCKIN

SDIN

BTCK

C2PO

JBSYNC

DEFS

DSFS

SUBIN

SUBCK

Subcode Interface

CD-DA Interface

Sector

Processor

OTI-9790

PLL

Page 50

• Pin Description

Pin No. Pin Name Type

Description

149 XIN I Crystal In : System Clock (33.8688MHz)

148 XOUT O Crystal Out: System Clock

141 CLKOUT O Clock Output

8 C34M O Set to 34.5744MHz

CD ENCODER/DECODER Interface

PPiinn NNoo.. PPiinn NNaammee TTyyppee

Description

168 PANICIN I

Panic Input : Write abort Input

132 WBLIN I

Wobble In : Wobble Input–Digital Signal

167 HFSW O High Frequency Modulation Switch

166 WGATE O Write Gate

180 WRSMP O Write Level Sample : Sample hold signal of write levels on reading

183 EFM1 O EFM 1 : EFM output

184 EFM2 O EFM 2 : EFM output

185 EFM3 O EFM 3 : EFM output

169

EFMNT1/ EFMNT1 : EFM pit pattern length indicator/

EMFNRZ

EFMNRZ : EFM Signal Output

170

EFMNT2/ EFMNT2 : EFM pit pattern length indicator/

69M

69M : 69.1488MHz

171 EFMNT3 O EFMNT3 : EFM pit pattern length indicator

172 EFMNT4 O EFMNT4 : EFM pit pattern length indicator

175 E11TP O EFM11T Pit Pattern : EFM11T Pit pattern indicator

176 E11TS O EFM11T Space Pattern : EFM11T Pit pattern indicator

177 EFCK O EFM Bit Clock : EFM bit Clock generated from internal clock in CD encoder

181 RESMP1 O Read Level Sample1 : Sample hold signal of read levels on writing

182 RESMP2 O Read Level Sample2 : Sample hold signal of read levels on writing

186 ROPC1 O

Running OPC1 : Sample hold signal 1 of reflected beam for running OPC during write

187 ROPC2 O

Running OPC2 : Sample hold signal 2 of reflected beam for running OPC during write

188 ROPC3 O

Running OPC3 : Sample hold signal 3 of reflected beam for running OPC during write

133 MONIT0 O Monitor 0 : Test pin controlled by Register 03Eh

179 EEFS O EFm Frame Sync

178 ESFS O Encoder Subcode Frame Sync

Clock

WOBBLE Motor Interface

Pin No. Pin Name Type

Description

6 REVDET I

Reverse Detect Motor Drive : Indicates spindle motor is rotating in reverse direction

7 FG I FG IN : HG (tachometer) pulse input

12 MON O Motor Drive On : Enables spindle motor drive

13 SBRK O Short Brake : Stops spindle motor by applying a short pulse to the motor winding

Page 51

CD-SERVO Interface

Pin No. Pin Name Type

Description

2 DMO O

Spindle Motor Servo Output

3 SLO O

Sled Servo Output

207 FOO O

Focus Servo Output : Focus servo feedback signal

208 TRO O

Tracking Servo Output : Tracking servo feedback signal

194 TEBC O

Tracking Error Balance Control

197 FE I

Focus Error

198 TE I

Tracking Error

201 BS I

Beam Strength : This input from the preamplifier is the sum of the E and F

photodiode outputs when using a 3-beam pick-up

202 RPBC O

Ripple Balance Control

203 RP I

Ripple of RF

191 RX I

RP Zero Crossing : Used for fine search

192 TX I

TE Zero Crossing : Track crossing signal input used in conjunction with RX to

perform fine searches

204 CE I

Center Position Error

142 LDON O Laser Diode On

193 TC I

Track Count Input : High-frequency track crossing signal input used to perfrom

rough searches and to increment the internal track counter.

137 FLAGA O Servo Monitor Flag A : FLAGA is used to output one of four internal servo signals.

FLAGA can also be used as a general output port.

138 FLAGB O Servo Monitor Flag B : FLAGA is used to output one of four internal servo signals.

FLAGB can also be used as a general output port.

139 FLAGC O Servo Monitor Flag C : FLAGA is used to output one of four internal servo signals.

FLAGC can also be used as a general output port.

140 FLAGD O Servo Monitor Flag D : FLAGA is used to output one of four internal servo signals.

FLAGD can also be used as a general output port.

CD-DSP PIN

Pin No. Pin Name Type

Description

163 EFM I

EFM Analog Data

162 ASY O

Asymmetry DAC Output

161 EFMR1 I

EFM Analog Data Bias 1

160 EFMR2 I

EFM Analog Data Bias 2

159 EFMR3 I

EFM Analog Data Bias 3

136 MONIT O

CD-DSP Monitor Output : MONIT is used to output several internal CD-DSP signals

Page 52

AUDIO Interface

Pin No. Pin Name Type

Description

143 MIO0 I/O Multi Purpose I/O

144 MIO1 O Multi Purpose I/O

145 MIO2 O Multi Purpose I/O

146 DOUT O

Digital Audio Output : Bi-phase serial audio output that follows the EIAJ CP1201 standard.

147 MIO3 I/O Multi Purpose I/O

151 L O

Left Channel Audio Output

154 R O

Right Channel Audio Output

Note: MIO3-0 can be programmed to control an external audio DAC.

ATAPI LOCAL BUS Interface

Pin No. Pin Name Type

Description

53 HRST# I

ATA Host Reset : ATA drive reset

59 HA2

62 HA1 I

ATA Host Address : Address signals/USB 48 MHz clock

60 HA0/48M

72 HD15

76 HD14

78 HD13

80 HD12

82 HD11

86 HD10

88 HD9

90 HD8 I/O

PUB

ATA Host Data Bus/SCSI Controller Data Bus

91 HD7

89 HD6

87 HD5

85 HD4

81 HD3

79 HD2

77 HD1

73 HD0

56 CS1FX#/

USBD- I/O

ATA Host Chip Select 1FX, 3FX/

57 CS3FX#/ USB D+, D- differential I/O data

USBD+

64 IOCS16# O

ATA 16-Bit I/O

65 HIRQ I/O ATA Host Interrupt Request/SCSI Controller Interrupt Request

54 HDASP# I/O

PUB

ATA Host Interface

61 HPDIAG# I/O

PUB

ATA Host Interface

71 HDRQ O ATA DMA Request/DMA Acknowledge : ATAPI DMA request

DMA acknowledge when connected to SCSI controller

Page 53

Pin No. Pin Name Type

Description

67 DMACK# I/O ATA DMA Acknowledge/DMA Request : ATAPI DMA acknowledge

DMA request when connected to SCSI controller

IORDY/

68 DDMARDY#/ O

ATA Host I/O Ready : I/O channel ready

DSTROBE UDMA : DDMARDY#, device DMA ready; DSTROBE, device data strobe

HRD#/

69 HDMARDY#/ I/O

PUA

ATA Host Read Strobe/SCSI DMA Read Strobe

HSTROBE UDMA : HDMARDY#, host DMA ready; HSTROBE, host data strobe

70 HWR#/ I/O

PUA

ATA Host Write Strobe/SCSI DMA Write Strobe

STOP UDMA : Host stop

131 ARST O

ATAPI Reset

SYSTEM CONTROLLER Interface

Pin No. Pin Name Type

Description

95 PRST# I

System Reset : Internal state machines are reset and all registers are set to

default. The assertion and negation signal of PRST# can be ASYNC to XIN but

needs to be longer then 1 XIN, because the signal goes through a de-glitch circuit.

106 UCS0# I

Chip Select 0 : Enables access to internal registers

107 UCS1# I

Chip Select 1 : Enables access to buffer memory

Read Enable/Data Strobe : Read enable/data strobe input for read

104 URD# I

If CPUTYPE = VCC (Intel) – This pin is read enabled.

If CPUTYPE = GND (Motorola) – This pin is data strobe.

Write Enable/Data read Status : Write enable/data read write status input for read

105 UWR# I

If CPUTYPE = VCC (Intel) – This pin is write enabled.

If CPUTYPE = GND (Motorola) – This pin is read/write status.

110 URDY I/O

Ready : Data ready

Select use/no use by setting internal registers

When accessing internal registers or buffer memory, this signal is asserted after

fixing driven data.

If no access, this pin is Hi-Z.

Hi-Z status at reset.

113 SDINT# SDINT# : CD-DSP and CD-Servo system input.

112 UINT1# O

System Interrupt Request 1 & 0 : CD-Decoder/-Encoder interrupt Signals

111 UINT0# selected by bits INTSEL4-0 in the INTMODE Register (005h,4-0)

103 UAD7

102 UAD6

101 UAD5 I/O Address and Data : Address and data are multiplexed in the same pin.

100 UAD4 If I/O only data, fix UALE to GND.

99 UAD3 These Signals ARE Hi-Z when chip is reset.

98 UAD2

97 UAD1

96 UAD0

Page 54

Pin No. Pin Name Type

Description

123 UA7

124 UA6

125 UA5

126 UA4 I

Address : Use these pins if the microcontroller has a separate address and data bus.

127 UA3

128 UA2

129 UA1

130 UA0

115 UA15

116 UA14

117 UA13

118 UA12 I

Address : Use these pins when accessing 64 KB buffer memory window.

119 UA11

120 UA10

121 UA9

122 UA8

114 UALE I

Address Latch Enable : Use this pin if the microcontroller has multiplexed addess and data bus.

CPU Type Select : Microcontroller type (86 type/68type) select

94 CPUTYPE I

VCC = Intel

GND = Motorola

Buffer Memory Interface

Pin No. Pin Name Type

Description

39 RAD11

40 RAD10

41 RAD9

42 RAD8

43 RAD7

44 RDA6 O RAM Addess : Addess for DRAM

45 RAD5 These pins are multiplxed address output

48 RAD4

49 RAD3

50 RAD2

51 RAD1

52 RAD0

20 RD15

21 RD14

24 RD13

25 RD12

26 RD11

27 RD10 I/O

PUA

RAM Data : Data for DRAM

28 RD9 Possible to set bus size (16 bit/8bit) by setting internal registers

29 RD8

14 RD7

15 RD6

Page 55

Pin No. Pin Name Type

Description

16 RD5

17 RD4 I/O

PUA

RAM Data : Data for DRAM

18 RD3 Possible to set bus size (16 bit/8bit) by setting internal registers

19 RD2

33 RD1

32 RD0

38 RRAS0# O Row Address Strobe 0 : RAS for DRAM

30 RCASH# O Column Address Strobe High : CAS0 for DRAM – If 16 bit bus is selected, this pin

used by strobe

31 RCASL# O Column Address Strobe Low

37 RWE# I/O Write Enable 0 : WE0 for DRAM

Write strobe of RD [7:0] when 16 bit data bus is selected

36 ROE# I/O Output Enable : OE for DRAM

Power Supply

Pin No. Pin Name

Description

9 VDD5 5 Volts

10, 22, 34, 46, 55,

63, 74, 83, 92, VDD Digital Power 3.3 Volts

108, 134, 173, 189

11, 23, 35, 47, 58,

66, 75, 84, 93, VSS Digital Ground

109, 135, 174, 190

152, 153, 157,

158, 199, 206

AVDD Analog Power 3.3 Volts

1, 150, 155, 156, AVSS Analog Ground

165, 195, 200

164, 196 VREF Reference voltage 2.1 Volts

205 2VREF Reference voltage 4.2 Volts

Page 56

IC301 (MB90F476) : MICOM

Block Diagram

PPG0, 1

Interrupt controller

8-/16-bit PPG

8-/16-bit UD counter

Chip select

I/O timer

16-bit input capture x2

16-bit output conveyer x6

16-bit free-run timer

16-bit reload timer

x2 channels

A/D converter

(10 bits)

I/O expanded

serial

interface x2

channels

UART

Communication

prescaler

µDMA

ROM

RAM

Clock control

circuit

X0, X1 RSTX

X0, X1A

CPU

F MC-16LX family Core

External interrupt

I/O port

P00 P07

PPG2, 3 PPG4, 5

AVCC

SIN1, 2

SOT1, 2

AVRH.L

AVSS

ADTG

AN0 to 7

CS0, 1, 2, 3

OUT0, 1, 2,

3, 4, 5

AIN0, 1

BIN0, 1

SCK1, 2

SIN0

SOT0

SCK0

ZIN0, 1

IN0, 1

TOT0

TIN0

IRQ0 to 7

P10 P17

P20 P27

P30 P37

P40 P47

P50 P57

P60 P67

P70 P77

P80 P87

P90 P97

PA 0 PA 3

P00 to P07 (8) : Provided with input pull-up resistor setting register

P10 to P17 (8) : Provided with input pull-up resistor setting register

P40 to P47 (8) : Provided with open-drain setting register

P70 to P77 (6) : Provided with open-drain setting register

* NOTE: In the figure above, the I/O port shares the pins each internal functional block. When the pins are used

as internal module pins, they cannot be used as I/O port pins.

Page 57

•Pin Description

No. Port Name Assign I/O

Description

1 P22/A18 pSLnMA I Master/Slave detection input

2 P23/A19 pnOpenSW I Open switch input

3 P24/A20/PPG0 NC NC

4 P25/A21/PPG1 NC NC

5 P26/A22/PPG2 pnLoadSW I Load switch input

6 P27/A23/PPG3 pAudMute O Audio mute output

7 P30/A00/AIN0 pXTOR I Tracking error amplitude detection input

8 P31/A01/BIN0 pnPlayKey I Play key input

9 Vss GND GND_

10 P32/A02/ZIN0 pnEjectKey I Eject key input

11 P33/A03/AIN1 pLED1 O LED1 control output

12 P34/A04/BIN1 pLED2 O LED2 control output

13 P35/A05/ZIN1 pActMute O FCS, TRK, SLD on/off

14 P36/A06 pSPNOn O Spindle start/stop control output

15 P37/A07 pADSel O HALL/SLDOUT select output

16 P40/A08/SIN2 PSPNBoost O Spindle gain selection output

17 P41/A09/SOT2 pSPN8n12 O 8/12cm disc control output

18 P42/A10/SCK2 pTrayMute O Tray motor Drive Mute control

19 P43/A11 pAGCOn O Wobble AGC enable output

20 P44/A12 pWRnRE O Write/Read select output

21 Vcc 3.3V 3.3V

22 P45/A13 pROPCon O ROPC enable output

23 P46/A14/OUT4 pCDRnRW I CD-R/CD-RW select output

24 P47/A15/OUT5 pTestMode1 I TestMode1

25 P70/SIN0 pRXD I Serial communication receive

26 P71/SOT0 pTXD O Serial communication transmit

27 P72/SCK0 NC O NC

28 P73/TIN0 pFlagA I OTI9790 FlagA (TEZC) input

29 P74/TOT0 pRFSdatai OTI9071 sdata input

30 P75 pSBRK O Spindle motor short brake output

31 P76 pMuxAout O MUX select output1

32 P77 pMuxBout O MUX select output2

33 Avcc Avcc (3.3V) 3.3V

34 AVRH pAVREF (3.3V) I 3.3V

35 Avss GND GND

36 P60/AN0 pAsym1 I ASYM1/B-level0 analog input

37 P61/AN1 pAsym2 I ASYM2/B-level1 analog input

38 P62/AN2 pMPXO I Multiplexer input for signal monitoring

39 P63/AN3 pSLDOut I HALL/SLDOUT Analog input

40 Vss GND GND

41 P64/AN4 NC NC

42 P65/AN5 pPho2/Bho2 I PHO2/BHO2 signal input

43 P66/AN6 NC NC

44 P67/AN7 NC NC

45 P80/IRQ0 NC NC

46 P81/IRQ1 NC NC

47 MD0 Input for setting the operation mode

48 MD1 Input for setting the operation mode

49 MD2 Input for setting the operation mode

50 P82/IRQ2 pESFS I Encode subcode frame sync input

Page 58

No. Port Name Assign I/O

Description

51 P83/IRQ3 pATIPnEFM O Atip/EFM select output

52 P84/IRQ4 pPRST O OTI9790/OTI9071 Reset control output

53 P85/IRQ5 pnSDInt I OTI9790 Servo interrupt input

54 P86/IRQ6 pUint1 I OTI9790 Interrupt 0 input

55 P87/IRQ7 pUint0 I OTI9790 Interrupt 1 input

56 P90/SIN1/CS0 pnUCS1 O OTI9790 Register select1

57 P91/SOT1/CS1 pnUCS0 O OTI9790 Register select2

58 P92/SCK1/CS2 NC NC

59 P93/FRCK/ADTG pADTrig I A/D Conversion external trigger input

60 P94/PPG4 pSCIk O Interface clock output

61 P95/PPG5 pSDataO O Serial data output

62 P96/IN0 pSPNFG I Spindle FG signal input

63 P97/IN1 pSLDFG I Sled FG signal input

64 PA0/OUT0 pnCXACS O OTI9071 interface latch signal output

65 PA1/OUT1 pSDatal I E2PROM data input

66 PA2/OUT2 pnEPCS O E2PROM selection

67 PA3/OUT3 pnDACS O D/A interface latch signal output

68 P50/ALE pnUALE O Address latch enable output

69 P51/RDX pnURD O Data read latch output

70 P52/WRLX pnUWR O Data write latch output

71 P53/WRHX NC NC

72 P54/HRQ NC NC

73 P55/HAKX pTestMode0 I TestMode0

74 P56/RDY pURdy I Data ready input

75 RSTX pRST I Reset input

76 P57/CLK pSlave I TestMode input

77 X1A NC NC

78 X0A GND GND

79 Vss GND GND

80 X0 pX0 I Crystal resonator connection input

81 X1 pX1 I Crystal resonator connection input

82 Vcc 3.3V 3.3V

83 P00/AD00/D00 pUAD0 I/O Data IN/OUT, Address OUT

84 P01/AD01/D01 pUAD1 I/O Data IN/OUT, Address OUT

85 P02/AD02/D02 pUAD2 I/O Data IN/OUT, Address OUT

86 P03/AD03/D03 pUAD3 I/O Data IN/OUT, Address OUT

87 P04/AD04/D04 pUAD4 I/O Data IN/OUT, Address OUT

88 P05/AD05/D05 pUAD5 I/O Data IN/OUT, Address OUT

89 P06/AD06/D06 pUAD6 I/O Data IN/OUT, Address OUT

90 P07/AD07/D07 pUAD7 I/O Data IN/OUT, Address OUT

91 P10/AD08/D08 pUA8 I/O Address OUT

92 P11/AD09/D09 NC NC

93 P12/AD10/D10 NC NC

94 P13/AD11/D11 NC NC

95 P14/AD12/D12 NC NC

96 P15/AD13/D13 NC NC

97 P16/AD14/D14 NC NC

98 P17/AD15/D15 NC NC

99 P20/A16 pRECD1 I Recording area detection signal input

100 P21/A17 pRECD2 I Recording area detection signal input

Page 59

GND

Ao2

Ao1 DI

CLK

Ao12

Ao11

Vcc

VDD

(VrefU)

Ao10

Ao9

Ao8

Ao7

Ao6

Ao5

Ao4

Ao3

Vss

(VrefL)

12-BIT SHIFT REGISTER

8-BIT

R-2R D-A

8-BIT

R-2R D-A

8-BIT

LATCH

8-BIT

LATCH

BUFFER

OP AMP

ADDRESS DECODER

D-A

D-A D-A D-A D-A D-A D-A D-A

D-A D-A

LLL

LLLLLLL

12 3456

D7 D8

910

D11

4Ch3 5 6 7 8 9 10

12 11Ch2

(12)

(8)

IC409(BU2500FV)

1) The BU2500FV is an integrated circuit semiconductor of CMOS structure with 12 channels of built-in D-A converters with output buffer operational amplifiers.

2) Outputs of 12 channels are used for adjustment/control of servo circuits and references.

Block Diagram

Pin No. Pin Name Description

1 Vref- GND

2 AO3 B-level Reference

3 AO4 Write power reference

4 AO5 Write power reference

5 AO6 HAVC Offset

6 AO7 Track SPP Reference

7 AO8 Sled Move

8 AO9 Hall Bias

9 AO10 Sled Offset

10 Vref+ 4V

Pin No. Pin Name Description

11 VCC 5V

12 AO11 Tray Control

13 AO12 VWDC protect reference

14 ED Serial data output terminal

15 LD LD terminal input

16 CLK Serial clock input terminal

17 DO Serial data input terminal

18 AO1 Read power reference

19 AO2 VWDC2 Power reference

20 GND GND

• Pin Description

Page 60

IC501 (BA5983 FM)

1) It controls the sled movement in track search mode and takes the tray to open/close.

2) It controls the Focus/Tracking Actuator receiving the focus error or tracking error signal from IC201.

Block Diagram

115

Pin No. Pin No.

BIAS IN Bias amplifier input

Driver CH1 positive input

Driver CH1 negative input

Driver CH2 negative input

Driver CH2 negative output

CH3 negative input

CH4 negative input

CH4 positive input

Driver CH2 positive input

Driver CH2 positive output

CH3 positive input

CH4 output

Driver CH1 negative output

Driver CH4 negative output

Driver CH1 positive output

Driver CH4 positive output

Driver CH3 negative output

Driver CH3 positive output

Driver CH1 output

Driver CH2 output

OPIN1(+)

OPIN2(+)

OPIN3(+)

OPIN1(-)

OPIN2(-)

OPIN3(-)

OPIN4(+)

PreVcc PreVcc

OPIN4(-)

OPOUT 1

OPOUT 2

CH3 output

OPOUT 3

OPOUT 4

GND GND

CH1~3 standby control

STBY1

PowVcc1 PowVcc (CH1,2)

PowVcc2

STBY2

GND GND

PowVcc (CH3,4)

CH4 standby control

VO2 (-)

VO1 (-)

VO4 (-)

VO2 (+)

VO1(+)

VO4(+)

VO3 (-)

VO3(+)

Pin name

Description Pin name Description

1 2 3 4 5 6 7 8 9 1011121314

10K10K10K

10K

10K 10K

10K

10K 10K

10K

20K

10K

20K

10K

CH1CH2

CH3 CH4

Vcc

CH1, 2, 3

CH4

28 27 26 25 24 23 22 21 20 19 18 17 16 15

Standby

LEVEL SHIFT

• Pin Description

Page 61

IC510 (BA6664FM) : Spindle Motor Drive IC

It drives the spindle motor receiving the spindle control signal at IC301 (MICOM) and IC201 (OTI-9790).

TSD

GAIN

CONTROL

Hall 1

Hall 2

Hall 3

Hall Bias

BRAKE MODE

HALL AMP

SHORT BRAKE

P S

H1+

H1-

H2 +

H2 -

H3 +

H3 -

FIN

GND

RNF

GSW

VCC

ECR

FG2

CNF

TORQUE

SENSE AMP

SERVO SIGNAL

CURRENT

SENSE AMP

VCC

Vcc

VCC

D CK

DRIVER

GAIN

SWITCH

Pin No.

FIN

Description

N.C.

Output3 for motor

N.C.

Output2 for motor

N.C.

Output1 for motor

GND

Positive input for hall input Amp1.

Negative input for hall input Amp1.

Positive input for hall input Amp2.

Negative input for hall input Amp2.

Positive input for hall input Amp3.

Negative input for hall input Amp3.

Hall bias terminal

Brake Mode terminal

Capacitor connection pin for phase compensation

Short brake terminal

3 Phase synthesized FG signal output terminal

Rotation detect signal output terminal

Torque control standard voltage input terminal

Torque control voltage input terminal

START/STOP Switch

FG signal output terminal

Power supply for signal division

Gain Switch

Power supply for driver division

Resistance connection pin for output current sense GND

Pin Name

N.C.

GND

GSN

FIN

Block Diagram

• Pin Description

Page 62

1 2 3 4 5 6 7 8 9 10 11 12 13 14

2728 26 25 24 23 22 21 20 19 18 17 16 15

STBY

23K

20K

50K

5K 5K

10K

17K

6.8K

40K

44K

100K

8.2K8.2K

8.2K

8.2K 1K

LOGIC

LEVEL

SHIFT

EDGE

Vcc

IC502 (BA5925FV)

It detects the speed of the moving sled, and transfers the sled control signal from IC201 (OTI-9790) to IC501 (BA5983FM)

Block Diagram

Pin No. Pin Name Description

1 GND GND

2 H A + Hall Amp A Positive Input

3 HA - Hall Amp A Negative Input

4 A + Hall Amp A Output

5 C A + Differential Circuit A Input

6 BIAS_IN Bias Amp Input

7 C B + Differential Circuit B Input

8 B + Hall Amp Output

9 HB - Hall Amp B Negative Input

10 H B + Hall Amp B Positive Input

11 IN1+ OP Amp 1 Positive Input

12 IN1- OP Amp 1 Negative Input

13 OUT1 OP Amp 1 Output

14 STBY Standby Control Pin

Pin No. Pin Name Description

15 IN2+ OP Amp 2 Positive Input

16 IN2- OP Amp 2 Negative Input

17 OUT2 OP Amp 2 Output

18 EDGE Edge Pulse Detect Pin

19 V L O VL Amp Output

20 VL- VL Amp Negative Input

21 VCC VCC

22 HB_IN Hall Bias Input

23 V H + Hall Bias Positive Output

24 V H - Hall Bias Negative Output

SW_CONT

Switch Buffer Amp Output Control Pin

26 SW_OUT

Switch Buffer Amp Output

27 SW_IN1

Switch Buffer Amp Input 1

28 SW_IN2

Switch Buffer Amp Input 2

• Pin Description

Page 63

Optical

Pick-up

KRS-202A

Spindle

Motor

FCS

TRK

SLED

Motor

Tray

Motor

Laser

Power

S/H

RF/Servo Signal

Timing Signals

OPC/ROPC

Circuit

Address/Data

BU2500FV

12ch

8bit DAC

CSI93C86

2kB

EEPROM

BA5983FM

F.T.S.T DRIVE

OTI9071

RF Amp

Wobble

ALPC

ASIC

Laser Control

S/H Signal Gen.

20MHZ

MB90F476

System

Controller

33.86MHz

OTI9790

DSP+Servo

DECODER

ENCODER

ATIP Demodulator

Write Strategy

I/F

Data

2MB

DRAM

I/F

Cable

Audio

Mute

H/P Amp

L,R

Line Out

Headphone

Jack

BA6664FM

MOTOR DRIVE

BA5925

Sled

Speed

BLOCK DIAGRAM

1. CED-8081B BLOCK DIAGRAM

Page 64

From HOST

PN201

41 42 43 44

+12V

+5V

GND

L101

Bead

L102

Bead

12V

IC512

NJM7808

Regulator

IC501 BA5983

FCS/TRK/SLD/TRY

Driver

Act _Mute

IC201

OTI-9790

DSP/Servo

/ATAPI

/PRST

/UCS0, 1

URDY, URD, UWR

UA[0:8], UAD[0:15]

IC301

MB90F476

µ-COM

IC101

XC61AN

RESET

IC102

PQ1U331

Regulator

3.3V

IC401 OTI-9071

RF AMP/Wobble/ALPC

IC514

NJM3414

OP Amp

2V_ACT 2.5V

/RESET

/CXACS

SDATA, SCLK

/DACS

/EPCS

31 95

IC302

CSI93C86

EEPROM

IC409

BU2500FV

DAC

2. Power Block Diagram

Page 65

W/XR, OSCEN,ENBL,ODON

WFPDSH, RFPDSH, WBLSH, SPDSH, MPDSH

A,B,C,D,E,F,G,H

IC401

OTI-9071

HA+/-

H1+/-,H2+/-

TRY+/-

SLD+/-

FCS+/-

TRK+/-

HU,HV,HW

U,V,W

TRY CTL

SLD FG

MPXOUT1

FE, TE, VREF,

PHO2, BHO2,

RRF

RECD1,2,XTOR

PHO1

RPBC

RX, XTOR

ATFG

TZC

IC404

NJM3404

IC402

KIC7408

IC405

BU4052

EFM1,2,3

WGATE,LDON

EFCK,EEPS

TEBC

WBLIN

/UCS0,1,URDY,URD,UWR

UA[0:8],UAD[0:15]

/SDINT, /UINT

IC301

MB90F476

µ-COM

SLD_MOV

IC509

BA5925

Sled Speed

IC409

BU2500,DAC

IC501

BA5983

Drive

IC510

BA6664

Drive

SPDL FG

DMO

FAO/TAO

SLO

IC601

XC9536

Asic

IC201

OTI-9790

IC509

NJM3404

IC508

BU4053

3. Control Signal Block Diagram

Page 66

A,B,C,D,E,F,G,H

FPDO

VRDC, VWC1

WREF

RPOWER

VWDC2

IC409

BU2500FV

DAC

/DACS

SDATA,SCLK

ASYM1,2

IC401

OTI-9071 AO

ASP

RRF(RFDC)

RRFIN

EQRFN,EQRFP

W/XR,OSCEN,ENBL,ODON

WFPDSH,RFPDSH,WBLSH,SPDSH,MPDSH

ERGCNT,WBLON

Level Shift

Circuit

IC403

KM4200

IC301

MB90F476

µ-COM

/UCS0,1,URDY,URD,UWR

UA[0:8],UAD[0:15]

Lout

Line out

Rout

Q804

Mute Control

IC801

H/P Amp

H/P Out

EFM(RFAC)

BSBS

IC201

OTI-9790

EFM1,2,3

WGATE,LDON

EFCK,EEPS

IC601

XC9536

ASIC

/SDINT, /UINT

4. Read/Write Signal Block Diagram

Page 67

OTI9071 RF Amp. Wobble ALPC

OTI9790

DSP + Servo DECODER ENCODER ATIP Demodulator Write Strategy I/F

33.86MHz I/F

cable

H O S T

Data

Command

DRAM

Asic

*Optical Pick-up KRS-202A

Disc Motor unit GRS-R02A/ OSM-32A

Laser Control

SPINDLE

MOTOR

FOCUS

COIL

TRACKING

COIL

SLED

MOTOR

BA6664FM

MOTOR DRIVE

BA5983FM

F.T.S.F DRIVE

20MHz

Beta

MB90F476 System Controller

AUDIO Circuitry

ROPC Circuit

A1,A2, B Level

Headphone Jack

R-ch

L-ch

Line-out

+8V

+5V

GND

+12V

+5V

GND

+12V

8V Reg.

3.3V Reg. +3.3V

A B CD

5. Block Diagram

* CED-8081B : Optical Pick-up KRS-202A

Page 68

A B C D E F GH

435

013

420

431

008

009

012

011

014

004

006

015

016

402

430

021

020

500

024

419

025

020

402

027

026

023

022

402

400

413

021

030

029

007

003

002

031

050

010

402

028

001

PBM00 (MAIN C. B. A)

005

034

A02

A01

11 1 2

EXPLODED VIEW

LG CED-8081B Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual