LG C1100 Service Manual

Service Manual

Model : C1100

Service Manual

C1100

P/N : MMBD0034301 Date : June, 2004 / Issue 1.0

- 1 -

1. INTRODUCTION

................................

2

1.1 Purpose

...............................................

2

1.2 Regulatory Information

........................

2

1.3 Abbreviations

.......................................

4

2. PERFORMANCE

.................................

6

2.1 H/W Features

......................................

6

2.2 Technical Specification

........................

7

3. TECHNICAL BRIEF

.........................

11

3.1 Transceiver

.......................................

11

3.2 Power Amplifier Module

....................

16

3.3 13MHz Clock

.....................................

17

3.4 Power Supplies for RF Circuits

.........

17

3.5 Digital Main Processor

......................

18

3.6 Analog Main & Power Management
Processor

...........................................

23

3.7 Memory

.............................................

33

3.8 Display and Interface

.........................

34

3.9 Keypad Switches and Scanning

.........

35

3.10 Microphone

........................................

36

3.11 Main Receiver

..................................

37

3.12 Headset Jack Interface

.....................

38

3.13 Speaker & MIDI IC

...........................

39

3.14 Key Back-light Illumination

...............

40

3.15 LCD Back-light Illumination

..............

41

3.16 MOTOR

............................................

42

4. TROUBLE SHOOTING

...................

43

4.1 RX Trouble

........................................

43

4.2 TX Trouble

.........................................

51

4.3 Power On Trouble

.............................

59

4.4 Charging Trouble

...............................

61

4.5 LCD Trouble.

.....................................

63

4.6 Receiver Trouble

...............................

65

4.7 Speaker Trouble

................................

67

4.8 Mic Trouble

........................................

69

4.9 Vibrator Trouble

.................................

71

4.10 Key Backlight LED Trouble

..............

73

4.11 Folder on/off Trouble

........................

74

4.12 SIM Detect Trouble

..........................

76

4.13 Earphone Trouble

.............................

77

4.14 Indicator LED Trouble

......................

80

4.15 RTC Trouble

.....................................

81

5. DISASSEMBLY INSTRUCTION

...

82

5.1 Disassembly

......................................

82

6. DOWNLOAD AND

CALIBRATION ............................. 90

6.1 Download

..........................................

90

6.2 Calibration

.........................................

97

7. BLOCK DIAGRAM

.........................

100

8. CIRCUIT DIAGRAM

.......................

101

9. PCB LAYOUT

.....................................

95

11.1 TOP

.................................................

95

11.2 BOTTOM

.........................................

96

10. ENGINEERING MODE

................

107

10.1 BB Test

..........................................

107

10.2 RF Test

..........................................

108

10.3 MF Mode

.......................................

108

10.4 Trace optiont

.................................

110

10.5 Call timer

.......................................

110

10.6 Fact. Reset

....................................

110

10.7 S/W version

...................................

110

11. STAND ALONE TEST

..................

111

11.1 Introduction

....................................

111

11.2 Setting Method

..............................

111

11.3 HW Test : Software for Standalone

Test Setup

.....................................

112

12. AUTO CALIBRATION

..................

114

12.1 Overview

.......................................

114

12.2 Requirements

................................

114

12.3 Equipment Setup

............................

114

12.4 AGC

...............................................

116

12.5 APC

...............................................

116

12.6 ADC

...............................................

116

12.7 Setting

...........................................

116

12.8 How to do calibration

.....................

116

13. EXPLODED VIEW &

REPLACEMENT PART LIST

.............................................................

117

13.1 Exploded View

...............................

117

13.2 Replacement Parts

........................

119

13.3 Accessory

......................................

126

Table Of Contents

- 2 -

1. INTRODUCTION

1.1 Purpose

This manual provides the information necessary to repair, calibration, description and download
the features of this model.

1.2 Regulatory Information

A. Security

Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for
example, persons other than your company’s employees, agents, subcontractors, or person
working on your company’s behalf) can result in substantial additional charges for your
telecommunications services. System users are responsible for the security of own system.
There are may be risks of toll fraud associated with your telecommunications system. System
users are responsible for programming and configuring the equipment to prevent unauthorized
use. The manufacturer does not warrant that this product is immune from the above case but will
prevent unauthorized use of common-carrier telecommunication service of facilities accessed
through or connected to it.

The manufacturer will not be responsible for any charges that result from such unauthorized use.

B. Incidence of Harm

If a telephone company determines that the equipment provided to customer is faulty and
possibly causing harm or interruption in service to the telephone network, it should disconnect
telephone service until repair can be done. A telephone company may temporarily disconnect
service as long as repair is not done.

C. Changes in Service

A local telephone company may make changes in its communications facilities or procedure. If
these changes could reasonably be expected to affect the use of the this phone or compatibility
with the network, the telephone company is required to give advanced written notice to the user,
allowing the user to take appropriate steps to maintain telephone service.

D. Maintenance Limitations

Maintenance limitations on this model must be performed only by the manufacturer or its
authorized agent. The user may not make any changes and/or repairs expect as specifically
noted in this manual. Therefore, note that unauthorized alternations or repair may affect the
regulatory status of the system and may void any remaining warranty.

E. Notice of Radiated Emissions

This model complies with rules regarding radiation and radio frequency emission as defined by
local regulatory agencies. In accordance with these agencies, you may be required to provide
information such as the following to the end user.

1. INTRODUCTION

- 3 -

F. Pictures

The pictures in this manual are for illustrative purposes only; your actual hardware may look
slightly different.

G. Interference and Attenuation

Phone may interfere with sensitive laboratory equipment, medical equipment, etc. Interference
from unsuppressed engines or electric motors may cause problems.

H. Electrostatic Sensitive Devices

ATTENTION

Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by the
sign. Following information is ESD handling:

Service personnel should ground themselves by using a wrist strap when exchange system
boards.

When repairs are made to a system board, they should spread the floor with anti-static mat
which is also grounded.

Use a suitable, grounded soldering iron.

Keep sensitive parts in these protective packages until these are used.

When returning system boards or parts like EEPROM to the factory, use the protective
package as described.

1. INTRODUCTION

1. INTRODUCTION

- 4 -

1.3 Abbreviations

For the purposes of this manual, following abbreviations apply:

APC Automatic Power Control

BB Baseband

BER Bit Error Rate

CC-CV Constant Current – Constant Voltage

DAC Digital to Analog Converter

DCS Digital Communication System

dBm dB relative to 1 milli watt

DSP Digital Signal Processing

EEPROM Electrical Erasable Programmable Read-Only Memory

ESD Electrostatic Discharge

FPCB Flexible Printed Circuit Board

GMSK Gaussian Minimum Shift Keying

GPIB General Purpose Interface Bus

GSM Global System for Mobile Communications

IPUI International Portable User Identity

IF Intermediate Frequency

LCD Liquid Crystal Display

LDO Low Drop Output

LED Light Emitting Diode

OPLL Offset Phase Locked Loop

PAM Power Amplifier Module

PCB Printed Circuit Board

PGA Programmable Gain Amplifier

PLL Phase Locked Loop

PSTN Public Switched Telephone Network

RF Radio Frequency

RLR Receiving Loudness Rating

RMS Root Mean Square

RTC Real Time Clock

1. INTRODUCTION

- 5 -

SAW Surface Acoustic Wave

SIM Subscriber Identity Module

SLR Sending Loudness Rating

SRAM Static Random Access Memory

PSRAM Pseudo SRAM

STMR Side Tone Masking Rating

TA Travel Adapter

TDD Time Division Duplex

TDMA Time Division Multiple Access

UART Universal Asynchronous Receiver/Transmitter

VCO Voltage Controlled Oscillator

VCTCXO Voltage Control Temperature Compensated Crystal Oscillator

WAP Wireless Application Protocol

- 6 -

2. PERFORMANCE

2.1 H/W Features

Item Feature Comment

Li-ion, 760 mAh

Standard Battery Cell Size: 33.8(W) x 49.7(H) x 4.6(T) [mm]

Weight: 30.00g

Under the minimum current consumption environment

Stand by Current (such as paging period 9), the level of standby current

is below 4mA.

Talk time Up to 3 hours (GSM TX Level 7)

Stand by time Up to 200 hours (Paging Period: 9, RSSI: -85 dBm)

Charging time Approx. Under 3 hours

RX Sensitivity GSM, EGSM: –105dBm, DCS: –105dBm

TX output power

GSM, EGSM: 33dBm (Level 5),
DCS: 30dBm (Level 0)

GPRS compatibility Class 10

SIM card type 3V only

Display Main LCD: 128 x 128 pixel 65K Color STN

Hard icons. Key Pad;

Status Indicator

0 ~ 9, #, *, Up/Down/Left/Right Navigation Key,
Menu Key, Clear Key, Send Key, END/PWR Key
Soft Key (Left/Right)

ANT External

EAR Phone Jack Yes

PC Synchronization Yes

Speech coding EFR/FR/HR

Data and Fax Yes

Vibrator Yes

Loud Speaker Yes

Voice Recording No

C-Mike Yes

Receiver Yes

Travel Adapter Yes

MIDI 16 Poly

Options Hands-free kit, CLA, Data Kit

2. PERFORMANCE

- 7 -

2. PERFORMANCE

2.2 Technical Specification

Item Description Specification

GSM

TX: 890 + n x 0.2 MHz
RX: 935 + n x 0.2 MHz (n=1~124)

EGSM

1 Frequency Band TX: 890 + (n-1024) x 0.2 MHz

RX: 935 + (n-1024) x 0.2 MHz (n=975~1024)

DCS

TX: 1710 + (n-512) x 0.2 MHz
RX: 1805 + (n-512) x 0.2 MHz (n=512~885)

2 Phase Error

RMS < 5 degrees
Peak < 20 degrees

3 Frequency Error < 0.1 ppm

GSM, EGSM

Level Power Toler. Level Power Toler.

5 33 dBm 2dB 13 17 dBm 3dB
6 31 dBm 3dB 14 15 dBm 3dB
7 29 dBm 3dB 15 13 dBm 3dB
8 27 dBm 3dB 16 11 dBm 5dB

9 25 dBm 3dB 17 9 dBm 5dB
10 23 dBm 3dB 18 7 dBm 5dB
11 21 dBm 3dB 19 5 dBm 5dB
12 19 dBm 3dB

4 Power Level DCS

Level Power Toler. Level Power Toler.

0 30 dBm 2dB 8 14 dBm 3dB

1 28 dBm 3dB 9 12 dBm 4dB

2 26 dBm 3dB 10 10 dBm 4dB

3 24 dBm 3dB 11 8 dBm 4dB

4 22 dBm 3dB 12 6 dBm 4dB

5 20 dBm 3dB 13 4 dBm 4dB

6 18 dBm 3dB 14 2 dBm 5dB

7 16 dBm 3dB 15 0 dBm 5dB

- 8 -

Item Description Specification

GSM, EGSM

Offset from Carrier (kHz). Max. dBc

100 +0.5
200 –30
250 –33
400 –60

600~ <1,200 –60
1,200~ <1,800 –60
1,800~ <3,000 –63
3,000~ <6,000 –65

5 Output RF Spectrum 6,000 –71

(due to modulation)

DCS

Offset from Carrier (kHz). Max. dBc

100 +0.5
200 –30
250 –33
400 –60

600~ <1,200 –60
1,200~ <1,800 –60
1,800~ <3,000 –65
3,000~ <6,000 –65

6,000 –73

GSM, EGSM

Offset from Carrier (kHz). Max. dBm

400 –19
600 –21

1,200 –21

6 Output RF Spectrum 1,800 –24

(due to switching

DCS

transient)

Offset from Carrier (kHz). Max. dBm

400 –22

600 –24
1,200 –24
1,800 –27

7 Spurious Emissions Conduction,Emission Status

2. PERFORMANCE

- 9 -

2. PERFORMANCE

Item Description Specification

GSM, EGSM

8 Bit Error Rate

BER (Class II) < 2.439% @–102 dBm

DCS

BER (Class II) < 2.439% @–100 dBm

9

RX Level Report Accuracy

3 dB

10 SLR 8 3 dB

Frequency (Hz) Max.(dB) Min.(dB)

100 –12 –
200 0 –
300 0 –12

11 Sending Response 1,000 0 –6

2,000 4 –6
3,000 4 –6
3,400 4 –9
4,000 0 –

12 RLR 2 3 dB

Frequency (Hz) Max. (dB) Min. (dB)

100 –12 –
200 0 –
300 2 –7
500

❈

–5

13 Receiving Response 1,000 0 –5

3,000 2 –5
3,400 2 –10
4,000 2

* Mean that Adopt a straight line in between 300 Hz

and 1,000 Hz to be Max. level in the range.

14 STMR 13 5 dB
15 Stability Margin > 6 dB

dB to ARL (dB) Level Ratio (dB)

–35 17.5
–30 22.5

16 Distortion

–20 30.7
–10 33.3

0 33.7
7 31.7

10 25.5

17 Side tone Distortion Three stage distortion < 10%

18

System frequency

≤ 2.5 ppm

(13 MHz) tolerance

19 32.768KHz tolerance ≤ 30 ppm

- 10 -

Item Description Specification

At least 80 dB under below conditions:

20 Ringer Volume 1. Ringer set as ringer.

2. Test distance set as 50 cm.

21 Charge Current

CC Charge : < 500 mA
Trickle Charge : < 60 mA

Antenna Bar Number Power

5 –85 dBm ~
4 –90 dBm ~ –86 dBm

22 Antenna Display 3 –95 dBm ~ –91 dBm

2 –100 dBm ~ –96 dBm
1 –105 dBm ~ –101 dBm
0 ~ –105 dBm

Battery Bar Number Voltage

0 ~ 3.62V

23 Battery Indicator

1 3.62 ~ 3.73V
2 3.73 ~ 3.82V
3 3.82V ~

24 Low Voltage Warning

3.5 0.03V (Standby)

3.62 0.03V (Call)

25 Forced shut down

3.35 0.03V

Voltage

1 Li-ion Battery

26 Battery Type

Standard Voltage = 3.7V
Battery full charge voltage = 4.2V
Capacity : 950mAh

Switching-mode charger

27 Travel Charger Input : 100 ~ 240V, 50/60 Hz

Output : 5.2V, 600 mA

2. PERFORMANCE

- 11 -

3. TECHNICAL BRIEF

3.1 Transceiver (SI4205-BM, U301)

The RF parts consist of a transmitter part, a receiver part, a frequency synthesizer part,
a voltage supply part, and a VCTCXO part.

The Aero I transceiver is the integrated RF front end for multi-band GSM/GPRS digital cellular
handsets and wireless data modems. The integrated solution eliminates the IF SAW filter,
external low noise amplifier (LNAs) for three bands, transmit and RF voltage controlled oscillator
(VCO modules, and other discrete components found in conventional designs.

Figure 3-1. RECEIVER FUNCTIONAL BLOCK DIAGRAM

ANTENNA SWITSH

TCXO

3. TECHNICAL BRIEF

(1) Receiver Part

The Aero I transceiver uses a low-IF receiver architecture which allows for the on chip
integration of the channel selection filters, eliminating the external RF image reject filters and the
IF SAW filter required in conventional superheterodyne architectures.

A. RF front end

RF front end consists of Antenna Switch(FL400), two SAW Filters(FL401, FL402) and dual
band LNAs integrated in transceiver (U401).

The Received RF signals(GSM 925MHz ~ 960MHz, DCS 1805MHz ~ 1880MHz) are fed into
the antenna or Mobile switch.

The Antenna Switch(FL400) is used to control the Rx and Tx paths. And, the input signals
VC1 and VC2 of a FL400 are directly connected to baseband controller to switch either Tx or
Rx path on.

The logic and current is given below Table 3-1.

Table 3-1. The Logic and current

Three differential-input LNAs are integrated in SI4205. The GSM input supports the GSM 850
(869-849 MHz) or E-GSM 900 (925-960MHz) bands. The DCS input supports the DCS 1800
(1805-1880 MHz) band. The PCS input supports the PCS 1900 (1930-1990 MHz) band.

The LNA inputs are matched to the 150Ω balanced output SAW filters through external LC
matching networks. The LNA gain is controlled with the LNAG[1:0] and LNAC[1:0] bits in
register 05h (Figure 3-2).

VC1 VC2 Current

DCS TX 0V 2.5 ~ 3.0V 10.0 mA max

GSM TX 2.5 ~ 3.0V 0V 10.0 mA max

GSM/DCS RX 0V 0V < 0.1 mA

- 12 -

3. TECHNICAL BRIEF

- 13 -

3. TECHNICAL BRIEF

Figure 3-2. SI4205 RECEIVER PART

B. Intermediate frequency (IF) and Demodulation

A quadrature image-reject mixer downconverts the RF signal to a 100KHz intermediate
frequency (IF) with the RFLO from the frequency synthesizer. The RFLO frequency is
between 1737.8 to 1989.9 MHz, and is internally divided by 2 for GSM 850 and E-GSM 900
modes. The mixer output is amplified with an analog programmable gain amplifier (PGA),
which is controlled with the AGAIN[2:0] bits in register 05h (Figure3-2). The quadrature IF
signal is digitized with high resolution A/D converters (ADCs).

The ADC output is downconverted to baseband with a digital 100KHz quadrature LO signal.
Digital decimation and IIR filters perform channel selection to remove blocking and reference
interference signals. The selectivity setting (CSEL=0) or a low selectivity setting (CSEL=1).
The low selectivity filter has a flatter group channelization filter is in the baseband chip. After
channel selection, the digital output is scaled with a digital PGA, which is controlled with the
DGAIN [5:0] bits in register 05h.

The amplified digital output signal go through with DACs that drive a differential analog signal
onto the RXIP,RXIN,RXQP and RXQN pins to interface to standard analog ADC input
baseband ICs. No special processing is required in the baseband for offset compensation or
extended dynamic range.

Compared to a direct-conversion architecture, the low-IF architecture has a much greater
degree of immunity to dc offsets that can arise from RF local oscillator(RFLO) self-mixing,
2nd order distortion of blockers, and device 1/f noise.

- 14 -

(2) Transmitter Part

The transmit (Tx) section consists of an I/Q baseband upconverter, and offset phase-locked
loop (OPLL) and two output buffers that can drive external power amplifiers (PA), one for the
GSM 850 (824-849 MHz) and E-GSM 900 (880-915 MHz) bands and one for the DCS 1800
(1710-1785 MHz) and PCS 1900 (1850-1910MHz) bands.

Figure 3-3. SI4205 TRANSMITTER PART

A. IF Modulator

The baseband converter(BBC) within the GSM chipset generates I and Q baseband signals
for the Transmit vector modulator. The modulator provides more than 40dBc of carrier and
unwanted sideband rejection and produces a GMSK modulated signal. The baseband
software is able to cancel out differential DC offsets in the I/Q baseband signals caused by
imperfections in the D/A converters.

The Tx-Modulator implements a quadrature modulator. A quadrature mixer upconverts the
differential in-phase (TXIP, TXIN) and quadrature (TXQP, TXQN) signals with the IFLO to
generate a SSB IF signal that is filtered and used as the reference input to the OPLL.

The IFLO frequency is generated between 766 and 896 MHz and internally divided by 2 to
generate the quadrature LO signals for the quadrature modulator, resulting in an IF between
383 and 448 MHz. For the E-GSM 900 band, two different IFLO frequencies are required for
spur management. Therefore, the IF PLL must be programmed per channel in the E-GSM
900 band.

B. OPLL

The OPLL consists of a feedback mixer, a phase detector, a loop filter, and a fully integrated
TXVCO. The TXVCO is centered between the DCS 1800 and PCS 1900 bands, and its
output is divided by 2 for the GSM 850 and E-GSM 900 bands. The RFLO frequency is
generated between 1272 and 1483 MHz. To allow a single VCO to be used for the RFLO,
high-side injection is used for the GSM 850 and E-GSM 900 bands, and low-side injection is
used for the DCS 1800 and PCS 1900 bands. The I and Q signals are automatically swapped
when switching bands. Additionally, the SWAP bit in register 03h can be used to manually
exchange the I and Q signals. Low-pass filters before the OPLL phase detector reduce the
harmonic content of the quadrature modulator and feedback mixer outputs. The cutoff
frequency of the filters is programmable with the FIF[3:0] bits in register 04h (Figure 3-3), and
should be set to the recommended settings detailed in the register description.

3. TECHNICAL BRIEF

÷ 2

BBG[1:0]

FIF[3:0]

TXBAND[1:0]

PDIB

PDRB

SWAP

TXIP

TXIN

I

Q

TXQP

TXQN

÷ 1,2

REG

RFOG

RFOD

REG

- 15 -

3. TECHNICAL BRIEF

(3) Frequency Synthesizer

Figure 3-4. SI4205 FREQUENCY SYNTHESIZER PART

The Aero I transceiver integrates two complete PLLs including VCOs, varactors, resonators,
loop filters, reference and VCO dividers, and phase detectors. The RF PLL uses two
multiplexed VCOs. The RF1 VCO is used for receive mode, and the RF2 VCO is used for
transmit mode. The IF PLL is used only during transmit mode. All VCO tuning inductors are
also integrated. The IF and RF output frequencies are set by programming the N-Divider
registers, N RF1, N RF2 and NIF. Programming the N-Divider register for either RF1 or RF2
automatically selects the proper VCO. The output frequency of each PLL is as follows:

The DIV2 bit in register 31h controls a programmable divider at the XIN pin to allow either a
13 or 26 MHz reference frequency. For receive mode, the RF1 PLL phase detector update
rate ( ) should be programmed = 100 kHz for DCS 1800 or PCS 1900 bands, and = 200
kHz for GSM 850 and E-GSM 900 bands. For transmit mode, the RF2 and IF PLL phase
detector update rates are always =200 kHz.

3.2 Power Amplifier Module (RF3133, U302)

The RF3133 is a high-power, high-efficiency power amplifier module with integrated power
control. The device is self-contained with 50Ω input and output terminals. The power control
function is also incorporated, eliminating the need for directional couplers, detector diodes,
power control ASICs and other power control circuitry; this allows the module to be driven
directly from the DAC output.

The device is designed for use as the final RF amplifier in GSM 850, E-GSM 900, DCS and PCS
handheld digital cellular equipment and other applications in the 824-849 MHz, 880-915 MHz,
1710-1785 MHz, and 1850-1910 MHz bands.

On-board power control provides over 37 dB of control range with an analog voltage input
(TX_RAMP); and, power down with a logic “low” for standby operation (TX_ENABLE).

External control (BAND_SELECT) is used to select the GSM or DCS band with a logic high or
low. A logic low enables the GSM band whereas a logic high enables the DCS band.

Figure 3-5. FUNCTIONAL BLOCK DIAGRAM OF RF3133

- 16 -

1DSC/PCS IN

2

3

4

5

6

7

BAND SELECT

TX ENABLE

VBATT

VREG

VRAMP

GSM IN

DSC/PCS OUT

VCC2VCC2

VCC OUT

GSM OUT

11

8

12

10

9

3. TECHNICAL BRIEF

- 17 -

3. TECHNICAL BRIEF

3.3 13MHz Clock (VCTCXO, X301)

The 13 MHz clock(X301) consists of a TCXO(Temperature Compensated Crystal Oscillator)
which oscillates at a frequency of 13 MHz. It is used within the Si4205, analog base band
chipset (U102, AD6537B), digital base band chipset (U101, AD6525), and MIDI (U401) chipset.

Figure 3-6. VCTCXO CIRCUIT DIAGRAM

3.4 Power Supplies for RF Circuits (RF LDO, U303)

Two regulators are used for RF circuits. One is MIC5255 (U303), and the other is one port of
AD6537B (U102).

MIC5255 (U303) supplies power to transceiver (SI4205, U301).
One port of AD6537B supplies power to VCTCXO (X301).
Main power (VBAT) from battery is used for PAM (RF3133, U302) because PAM requires high

power.

Table 3-2. RF POWER SUPPLIERS

Figure 3-7. RF LDO CIRCUIT DIAGRAM

AD6535_AFCDAC

1608

VVCXO

2.2u

C371

4

VCC

15K

R317

X301

13MHz

GND

2

OUT

3

C372
1000p

AFC

Supplier Voltage Powers Enabled signal

U303 (VRF) 2.85V U301, U302 CLKON

U102 (VVCX0) 2.75V X301

Battery (VBAT) 3.4~4.2V U302,U303

VBAT

1

2

3

10uC361

R317 0

CLKON

C362

10u

VRF

C363

0.01u

5

OUT

4

BYP EN

U303MIC5255-2.85BM5

IN

GND

- 18 -

3.5 Digital Main Processor (AD6525, U101)

3. TECHNICAL BRIEF

AD6525 GSM-PROCESSOR

KEYPADCOL[4:0]
KEYPADROW[4:0]

KEYPAD

Matrix

JTAG

Universal

System

Connector

(USC)

Power

Sub-system

32kHz

AD6537B

DRV-OUT AGC

13MHz

VCO

Synthesizer

LAN-IN

RADIO
(AD6523/AD6524)

Control

Serial

Port

RX/TX

I/Q

Serial

Port

VOICE

DATA

Serial

Port

Backlight

Service light

FLASH

16 bit

SRAM

8 or 16 bit

(optional)

Accessory

Devices

e.g.BATTERY

SIM

PA Supply

Enable

VDDIO

VDDCORE

GNDIO

GNDCORE

ASDO

ASFS

ASDI

VSDO

VSDI

VSFS

BSDO

BSOFS

BSDI

BSIFS

CLKOUT_GATE

CLKOUT

VBCRESET

Generic Serial Port E

OSCIN

OSCOUT

JTAGEN

TCK, TMS

TDI, TDO

PWRON

VDDRTC

RESET

JTAGE, HSL, GPIO

USCTX/RX/CLK
Generic Serial port A
Generic Serial port B

Generic Serial port D

BACKLIGHT0
BACKLIGHT1

ROMCS
ADD[23:0]
DATA[15:0]

RD
WR
HWR/UBS
LWR/LBS

ASDI
ASDFS
ASDO

VSDI
VSDO
VSFS

MCLK oe
MCLK
RESET

RAMP
RF Timing
I/Q Interince
VOICE 1/F &
Buzzer

AFC

MODE

JTAG

BSDI
BSIFS
BSDO
BSOFS

DISPLAYCS
LCDCTL

ROMCS

Generic Serial Port C

GPCS0
GPCS1
Generic Serial Port D-A
Generic Serial Port D-B

CLKIN
CLKON

Micro SM™
RF Interface

SIM Serial Interface

GPIO[ ] / IR Q

DISPLAY

(parallel or

serial)

U
S
C

Figure 3-8. SYSTEM INTERCONECTION OF AD6525 EXTERNAL INTERFACE

- 19 -

3. TECHNICAL BRIEF

• AD6525 is an ADI designed processor.

• AD6525 consists of

1. BUS arbitration Subsystem

• EBUS, RBUS, PBUS, SBUS, DMABUS, IOBUS

2. DSP Subsystem

• ADI DSP, Viterbi coprocessor, Ciphering unit, Cache memory/controller system

3. MCU Subsystem

• ARM7TDMI, boot ROM, Clock generation and access control module

4. Peripheral Subsystem

• MMI group

➮ Keyboard, Display, Backlight, RTC, GPIO interface

• House Keeping group

➮ Watchdog Timer, Interrupt controller, General Timer

• GSM system group

• Direct Memory Access group

➮ Between PBUS,RBUS, and EBUS

- 20 -

3. TECHNICAL BRIEF

3.5.1 Interconnection with external devices

A. RTC Block Interface

Countered by external X-TAL
The X-TAL oscillates 32.768KHz

B. LCD module interface

The LCD module is controlled by DBB chipset, AD6525.
When LCD operate, the AD6525 controls the LCD module through LCD_CS, LCD_RESET,

ADD01, WR, DATA[00-15]. LCD_ID, LCD_RESET

Table 3-3. LCD module interface

C. RF Interface

The AD6525 control RF parts through PA_BAND, ANT_SW1, ANT_SW2, CLKON , PA_EN,
S_EN, S_DATA, S_CLK, RF_PWR_DWN

Table 3-4. RF CONTROL SIGNALS DISCRIPTION

Signals Description
LCD_CS MAIN LCD driver chip enable. MAIN LCD driver IC has own CS pin

LCD_RESET This pin resets LCD module.

This pin determines whether the data to LCD module are display data

ADD1(RS) or control data. ADD1 can select 16 bit parallel bus. ADD1 is also

used to address flash memory.

WR Write control. The phone do not read data from LCD chip.

DATA

Parallel data lines. Color LCD driver chip uses the 16-bit data
interface.

2V8_VMEM 3V voltage is supplied to white colored LED driver for backlighting.
LCD_BACKLIGHT Control signal of white LED driver IC.
DATA[00-15] Parallel data lines, Sub LCD driver chip uses the 8-bit data in reface.

GPO Signal Name Description

17 PA_BAND PAM Band Select

9 ANT_SW1 Antenna Switch Band Select

11 ANT_SW2 Antenna Switch Band Select

- CLKON RF LDO Enable/Disable
16 PA_EN PAM Enable/Disable
19 S_EN PLL Enable/Disable
20 S_DATA Serial Data to PLL
21 S_CLK Clock to PLL

4 RF_PWER_DWN Powerdown Input

- 21 -

3. TECHNICAL BRIEF

D. SIM Interface

The AD6525 check status periodically in call mode if SIM card is inserted or not, but the
AD6525 don't check in deep sleep mode.

Interface by SIM_DATA, SIMCLK, SIM_RST(GPIO_23)

Table 3-5. SIM CONTROL SIGNALS DISCRIPTION

Figure 3-9. SIM CIRCUIT

E. Key Interface

Include 5 column and 5 row. The AD6525 detect key press by interrupt.

F. ADP3537B Interrupt

There are two interrupts, EOC and CHRDET
EOC: End of Charge. AD6525 makes charging operation stop when high signal is inputted.
CHRDET: This pin is activated when the charger is inserted.

Description

SIM_DATA

This pin receives and sends data to SIM card. This model support
only 3.0 volt interface SIM card.

SIMCLK Clock 3.25MHz frequency.

SIM_RST(GPIO_23) Reset SIM block

VSIM

SIM_DATA

VA165

AVL14K02200

J101

4

GND1

5

VPP

6

IO

10

GND5

9

GND4

VCC

RST

CLK
GND2
GND3

GCA261-6S

VSIM

1
2

3
7
8

AD6525

C117

0.1u

C115

220n

C116

1000p

- 22 -

3.5.2 AD6525 Architecture

Figure 3-10. AD6525 INTERNAL ARCHITECTURE

The internal architecture of AD6525 is shown in Figure 3-10. AD6525 regroups three main
subsystems connected together through a dynamic and flexible communication bys network.
It also includes onboard system RAM (SRAM) and interfaces with external Flash Memory,
Baseband converter functions, and terminal functions like MMI, SIM and Universal System
Connector (USC).

The Digital Signal Processing (DSP) subsystem primarily hosts all the speech processing,
channel equalization and channel codec functions. The code used to implement such
functions can be stored in external Flash Memory and dynamically downloaded on demand
into the DSP’s program RAM and Instruction Cache.

The microcontroller subsystem supports all the GSM terminal software, including the layer 1,
2 and 3 of the GSM protocol stack, the MMI, and applications software such as data
services, test and maintenance. It is tightly associated with on-chip system SRAM and also
includes boot ROM memory with a small dedicated routine to facilitate the initialization of the
external Flash Memory via code download using the on-chip serial interface to the external
Flash Memory interface.

The peripheral subsystem is composed of system peripherals such as interrupt controller,
real time clock, watch dog timer, power management and a timing and control module. It
also includes peripheral interfaces to the terminal functions: keyboard, battery supervision,
radio and display. Both the DSP and the MCU can access the peripheral subsystem via the
peripheral bus (PBUS).

For program and data storage, both the MCU subsystem and the DSP subsystem can
access the on chip system SRAM and external memory such Flash Memory. The access to
the SRAM module is made through the RAM Bus (RBUS) under the control of the bus
arbitration logic. Similarly, access to the Flash Memory is through the parallel External Bus
(EBUS).

3. TECHNICAL BRIEF

AD6525

AD6537B

DSP

SRAM

FLASH

MMI
USC

MUC

Peripheral

RF-Control

Subsystem

Subsystem

Subsystem

(ARM7TDMI

®

)

DMA and BUS

ARBITRARION

Serial Link

DSP BUS

RBUS

EBUS

PBUS

SBUS

- 23 -

3. TECHNICAL BRIEF

3.6 Analog Main & Power Management Processor (AD6537B, U102)

Figure 3-11. AD6537B FUNCTIONAL BLOCK DIAGRAM

AD6525
or
AD6526

- 24 -

• AD6537B is an ADI designed processor.

• AD6537B consists of

1. BB Transmit section

• This section generates in-phase and quadrature BB modulated GMSK signals.

• Digital GMSK modulator, 10-bit DACs, Reconstruction Filter

2. BB Receive section

• 2 identical ADC channels that process BB in-phase and quadrature input signals.

3. Auxiliary section

• 2 auxiliary DASs •AFC DAC, IDAC, AUX ADC

• AUX ADC : 6 channels 10 bits

AFC DAC : 13 bits
IDAC : 10 bits

4. Voiceband section

• Receive audio signal from MIC.
Send audio signal to Speaker

• It interconnect with external device like main microphone, main receiver, ear­microphone and Hands-free kit.

5. Power Management section

• 8 LDOs Block in the AD6537B. VCORE, VMEM, VEXT, VSIM, VRTC, VABB, VMIC,
VVCXO

• Battery Charging Block

3. TECHNICAL BRIEF

- 25 -

3. TECHNICAL BRIEF

3.6.1 Baseband transmit section

1. The AD6537B Baseband Transmit Section is designed to support GMSK for both single­slot and multi-slot application.

2. The transmit channel consists of a digital GMSK modulator, a matched pair of 10-bit
DACs and a matched pair of reconstruction filter

Figure 3-12. AD6537B BASEBAND TRANSMIT SECTION

3.6.2 Baseband receive section

1. This section consists of two identical ADC channels that process baseband in-phase(I)
and quadrature(Q) input signals.

2. Each channel consists of a coarse switched capacitor Anti-Alias filter, followed by a low­pass digital filter

Figure 3-13. AD6537B BASEBAND RECEIVE SECTION

3. TECHNICAL BRIEF

- 26 -

3.6.3 Auxiliary Section

1. This section includes an Automatic Frequency Control (AFC) DAC, voltage reference
buffers, an Auxiliary ADC, and light controllers.

2. This section also contains AUX ADC and Voltage Reference

• AFC DAC: 13 bits

• IDAC: 10 bits

• The Auxiliary ADC provides :

Two differential inputs for temperature sensing.

- A differential input for the battery charger current sensor

- A single-ended input for battery voltage measurement

- A single-ended input for battery type identification

- Two single-ended inputs for microphone and hookswitch detection, one for each of two
analog

Audio input channels

- Two general purpose external inputs

- REF, REFOUT, REFCHG

- REFADC and REFADC/2, and AGND1 inputs for offset and gain measurement

Figure 3-14. AD6537B AUXILIARY SECTION

CSFS
CSDI
CSDO

AD6537B

Control

Serial

Por t

AFC
DAC

Voltage

Reference

REFTXCM

Aux

ADC

AFCDAC

REFBB

REFOUT

REF

REFCHG

TEMP1

TEMP2
AUXADC1
AUXADC2

AIN1P
AIN2P

BATTYPE

ISENSE

VBATSENSE

LIGHT1
LIGHT2
LIGHT3

Light

Controllers

3. TECHNICAL BRIEF

- 27 -

3.6.4 Audio Section

1. Receive audio signal from microphone. C1100 use differential configuration.

2. Send audio signal to speaker. C1100 use differential configuration.

3. This section provides an audio codec with a digital-to-analog converter and an analog-to­digital converter, a ring tone volume controller, a microphone interface, and multiple
analog input and output channels.

4. It interconnect with external device like main microphone, main receiver, and headset jack
through the AIN1N, AIN1P, AIN2N, AIN2P, AIN3N, AIN3P, AOUT1P, AOUT1N, AOUT2P,
AOUT2N, AOUT3P, and AOUT3N port.

• AIN1P, AIN1N : Main microphone positive/negative terminal

• AOUT2P, AOUT2N : Main Speaker positive/negative terminal

• AIN2P, AIN2N : Ear-Mic microphone positive/negative terminal

• AOUT1P, AOUT1N : Ear-Mic speaker positive/negative terminal

Figure 3-15. AD6537B AUDIO SECTION

GPI

CSFS

CSDI

CSDO

ASFS

ASDI

ASDO

AD6537B

Control

Serial

Por t

Ring Tone

Volume Controller

Audio
Serial

Por t

Filter/

SRC

Filter/

SRC

DAC

ADC

PGA

PGA

PGA

AIN3P

AIN3N

8Ω

32Ω

32Ω

SPWR

AOUT2P

AOUT2N

AOUT1N

AOUT3N

AOUT3P

AOUT1P

SGND

AIN1P

AIN1N

AIN2P

AIN2N

Analog
Switch

Analog
Switch

Analog Adder

Microphone Interface

Gain Pre-Amp

3. TECHNICAL BRIEF

- 28 -

3.6.5 Power Management

Figure 3-16. AD6537B POWER MANAGEMENT SECTION

1. Power up sequence logic

1. The AD6537B controls power on sequence

2. Power on sequencez

- If a battery is inserted, the battery powers the 8 LDOs.

- Then if PWRONKEY is detected, the LDOs output turn on.

- REFOUT is also enabled

- Reset is generated and send to the AD6525

3. TECHNICAL BRIEF

- 29 -

Figure 3-17. AD6537B POWER MODE LOGIC

2. LDO Block

1. There are 8LDOs in the AD6537B.

- VCORE : supplies Digital Baseband Processor core and AD6537 digital core
(1.8V, 80mA)

- VMEM : supplies external memory and the interface to the external memory on
the digital baseband processor (1.8V or 2.8V, 150mA)

- VEXT : supplies Radio digital interface and high voltage interface (2.8V,
170mA)

- VSIM : supplies the SIM interface circuitry on the digital processor and SIM
card (1.8V or 2.85V, 20mA)

- VRTC : supplies the Real-Time Clock module (1.8 V, 200 µA)

- VABB : supplies the analog portions of the AD6537

- VMIC : supplies the microphone interface circuitry (2.5 V, 1 mA)

- VVCXO : supplies the voltage controlled crystal oscillator ( 2.75 V, 10 mA)

AD6537B

THERM

Thermal

Shutdown

DDLO
UVLO

CHGDET

VBAT

KEYON

DBBON

VRTC

VEXT

VCXDEN

POWERMODE

Enable

Mode

Enable

Mode

Enable

Mode

Enable

Mode

Enable

Digital core

LDO Regulator

Memory Interface

LDO Regulator

External Interface

LDO Regulator

SIM Interface

LDO Regulator

VCXO

LDO Regulator

VCORE Comparator

VMEM Comparator

VEXT Comparator

VCORE

VMEM

VEXT

VCORECP

VMEMCP

VEXTCP

low: VCORE < 1.5V

high: VCORE > 1.5V

high: VMEM > 2.5V or 1.5V

low: VMEM < 2.5V or 1.5V

high: VEXT > 2.5V

low: VEXT < 2.5V

VCORE

VMEM

VEXT

VSM

VVCXO

VSMEn

Control Bit

3. TECHNICAL BRIEF

- 30 -

Table 3-6. AD6537B LDO DESCRIPTION

3. Battery Charging Block

1. It can be used to charge Lithium Ion and/or Nickel Metal Hydride batteries.
Charger initialization, trickle charging, and Li-Ion charging control are implemented in
hardware.

2. Charging Process

- Check charger is inserted or not

- If AD6537B detects that Charger is inserted, the CC-CV charging starts.

- Exception: When battery voltage is lower than 3.2V, the precharge(low current charge

mode) starts firstly.

- And the battery voltage reach to 3.2V the CC-CV charging starts.

3. Pins used for charging

- CHG_DET: Interrupt to AD6525 when charger is plugged.

- CHG_EN: Control signal from AD6525 to charge Li+ battery

- EOC: Interrupt to AD6525 when battery is fully charged

- GATEIN: Control signal from AD6525 to charge NiMH battery. But, not used.

- MVBAT: Battery voltage divider. Divide ratio is 1:2.3 and it is sensed in AD6521

AUX_ADC

4. TA (Travel Adaptor)

- Input voltage: AC 85V ~ 260V, 50~60Hz

- Output voltage: DC 5.2V ( ±0.2 V )

- Output current: Max 850mA ( ±50mA )

5. Battery

- Li-polymer & Li-ion battery (Max 4.2V, Nom 4.0V)

- Standard battery: Capacity - 770mAh, Advanced Li-ion

Description

VSIM 2.85V(is provided to SIM card)
VCORE 1.8V(is provided to the AD6525 & AD6537B’s digital core)
VRTC 1.8V(is provided to the RTC and Backup Battery)
VMIC 2.55V(is provided to the AD6525 I/O and used as microphone bias)
VTCXO 2.75V(is provided to VCTCXO)
VMEM 2.8V(is provided to Flash)
VEXT 2.8V(is provided to LCD)

3. TECHNICAL BRIEF

- 31 -

Figure 3-18. AD6537B BATTERY CHARGING BLOCK

Figure 3-19. C1100 AUDIO CIRCUIT

AD6537B

Control

Serial

Por t

CSFS

CSDI

CSDO

Charge

Timer

Trouble
Charge

Chg.
DAC

VCHG

GATEDRIVE

ISENSE

VBATSENSE

VBATx

BATTYPE

REFOHG

R

TRIF

RSENSE

AGND1

VCHARGER

R

GATE

3-Terminal

Battery Pack

R

TEMP

thermistor

INT

Interrupt

Logic

Aux

ADC

CLOSE TO EARJACK

CLOSE TO MIC

CLOSE TO

HEADSET JACK

AD6537

0

R124

2.2KR134

TC153

10u

R128

100

C163

39p

1KR126

C179

39p

OB4-15L42-C33L

MIC101

1

2

C123
39p

39p

C196

R156

100K

SP115

VEXT

R150

100

39p

C165

1MR144

100p

C171

1u

C157

C178

39p

C177
39p

100

R148

100

R132

0.1u

C124

C152

39p

VA153

AVL5M02-200

VEXT

R158

NA

VMEM

VA151

AVL5M02-200

C168

18p

39K

R153

C139 4.7u

SGND1T8SGND2

R8

SPWR1

R10

SPWR2

T10

NC_R12

R12

N15

LGND

LIGHT1

L16
M15

LIGHT2
LIGHT3

M16

B10

AUXADC1
AUXADC2

A9

DGND

M2

AIN1N

R16

AIN1P

P16

R15

AIN2N

P15

AIN2P

R13

AIN3L
AIN3R

R14

K15

AOUT1N

AOUT1P

J15

T9

AOUT2N1

R9

AOUT2N2

R11

AOUT2P1

T11

AOUT2P2

AOUT3N

K16
J16

AOUT3P

AGND1

C193

VMEM

4

6NO

2

VCC

39p

U105

MAX4599EXT-T

5 COM

GND

3

1

IN

NC

VA152

AVL5M02-200

U104

MAX9075EXK-T

2

GND

1

OUT

VCC

5

3

VIN+

VIN-

4

R159

1K

AVL5M02-200

VA154

C154

39p

4.7

R141

C188

0.1u

1MR145

VBAT

C155

39p

39p

C153

39p

C161

10u

TC151

NA

R154

R137 1K

4.7K

R130

R149

NA

2.2K

R127

VMIC

VMEM

39p

C156

C160

0.1u

330KR147

R138

2.2K

C167

39p

J102

1

2

3

4

5

C170

100p

C151 0.1u

C162

39p

R181 4.7

SP114

VMIC

HOOK_DET

VMIC_ON

JACK_DET

HOOK_DET

RLED
GLED

RECP

SPKN

SPKP

RECN

3. TECHNICAL BRIEF

- 32 -

Figure 3-20. MAIN RECEIVER CIRCUIT

Figure 3-21. CHARGING CIRCUIT

In order to reduce time for trickle charging, additional circuit (Pre-charge circuit) was included.
This circuit has supplied a 50mA current into the battery additionally.

So call it, it reduce trickle charging time

Closed to Analog SW

47p

C412C411

47p

R407

0

0

R409

4.7

R414

100KR415

C407
47p

39pC409

NA

VMEM

R405

R406

NA

47pC410

1

V+

COM1

3

COM2

9

GND

6

4

IN1

8

IN2

NC1

5

7

NC2

2

NO1

10

NO2

MAX4684EUB

U402

4.7

R416

47p

C406

SPK_REC_N

SPK_REC_P

SPKN

SPKP

RECP

RECN

SPK_RCV_SEL

1%

Current Sense

CLOSE TO BATTERY PACK

D6

G

45

S

TPCF8102

D1

1

D2

2

D33D4

6

D5

7

8

Q103

VCHARGE

VBAT

0.1u

C140

49.9

R162

0

R163

100K

R165

1.5K

R157

1K

R164

NA

R155

6

3

1

4

Q104

UMX1NTN

25

VBAT

330

R108

D101

CUS02

0.2R107

VCHARGE

10u

C187

RED_LEDPRE_CHARGE

3. TECHNICAL BRIEF

- 33 -

3.7 Memory (TH50VPF5783AASB, U201)

Block Diagram

Figure 3-22. MEMORY BLOCK DIAGRAM

• 128Mbit flash memory + 32Mbit PSRAM

• 16 bit parallel data bus

• ADD01 ~ ADD22.

• 2 Chip enables for Flash memory select.

• RF Calibration data, Audio parameters and battery calibration data etc are stored in Flash

memory area.

Vccf

Vss

DQ0~DQ15
(DQ0~DQ7)

Vccps

A0~A20

A-1 A0~A21

A-1 A0~A21

WP/ACC

RY/BYf

BYTE

WE

OE

CE1ps

CE2ps

UB

LB

RESET

CEf1
CEf2

Vss

128 Mbits

FLASH Memory

328 Mbits

PSEUDO SRAM

DQ0~DQ15

DQ0~DQ15

- 34 -

3.8 Display and Interface

Table 3-7. LCD module discription

C1100 Main LCD supports one 65,536 color LCD module.
There are the control signals : LCD_CS (This acts as the chip select enable for the LCD Driver),

WR, ADD01(RS) and LCD_RESET. DATA[00:15] pins to send data for displaying graphical text
onto the LCD.

Figure 3-23. LCD INTERFACE CIRCUIT

3. TECHNICAL BRIEF

Main LCD Display Format 128 X RGB X 128 dots

Main LCD Backlight White LED Backlight

LCD_RESET

DATA00
DATA01
DATA02
DATA03
DATA04
DATA05
DATA06
DATA07

MOTOR

ADD01

C276

C275

22p

C214

C211 C234

C213

C254

22p 22p

22p

22p 22p

22p

22p

22p

C271

820R201
820R203
820R205

R207 820

820R209

820R211
R213 820
R215 820

330

R219

C218

C217

22p

22p

VBAT

C258

18p

1uF

1uF

C259

LCD_DIM

VEXT

VBAT

VRTC

CN201

341
33

2
3

32

4

31
30

5
6

29
28

7

27

8

26

9
10

25
24

11
12

23
22

13
14

21
20

15
16

19

17 18

C219

C222C216

C223

C225C215

C224C221

C220

22p

22p

22p 22p

U203

10

IN

2

OUT

9

EN_SET

11

GND

AAT3123ITP-20-T1

C226

22p

22p

22p

4

C1+

LCD BACKLIGHT LED

C260

1uF

3

C1-

1

C2+

C261

1uF

12

C2-

8

D1

7

D2

6

C262

D3

5

D4

C255

C257

C227

C256

C277

22p

22p

22p

22p

FB1

VA207

C272

39p

18p

AVL14K02200

C235

C231

C233

C236

C232

22p

22p

22p

22p22p

22p22p

820

R202

820R204

R206 820

820R208
R210 820
R212

820
R214 820

820R216

R218 330

C237

C239 C248

C238

22p

22p

22p

SPK_REC_N
SPK_REC_P

DATA15
DATA14
DATA13
DATA12
DATA11
DATA10
DATA09
DATA08

WR
LCD_CS

C242

C241

C240

22p

C246

C245

C244

C243C212

22p22p

22p

22p

22p

22p

LCD_ID

C274

C247

C278

22p

22p22p

22p

22p

- 35 -

3. TECHNICAL BRIEF

3.9 Keypad Switches and Scanning

The key switches are metal domes, which make contact between two concentric pads on the
keypad layer of the PCB when pressed. There are 24 switches (SW1-SW2,KB2~KB22),
connected in a matrix of 5 rows by 5 columns, as shown in Figure, except for the power switch
(KB101), which is connected independently. Functions, the row and column lines of the keypad
are connected to ports of AD6525. The columns are outputs, while the rows are inputs and have
pull-up resistors built in.

When a key is pressed, the corresponding row and column are connected together, causing the
row input to go low and generate an interrupt. The columns/rows are then scanned by AD6525
to identify the pressed key.

Figure 3-24. C1100 KEYPAD CIRCUIT

6

3

MENU

RIGHT

2

0

SELECT

*

98

UP

LEFT

CONFIRMDOWN

SEND

7

CLR

1

4

#

DOWN

5

UP

SP205

SP235

KB19

SP230

SP234

1

2345

SW1

KB10

KB2

SP209

KB16

SP201

KB17

VA201

AVL5M02-200

SP228

KB15

KB5

KB11

KB12

680

R243

SP211

SP207

KB8

KB14

SP206

KB20

SP208

SP227

SP226

KB3KB7

SP231

SW2

1

2345

KB18

AVL5M02-200

SP233

VA202

SP229

KB6

KB9

680

R242

KB21

SP212

SP210

SP232

SP213

SP204

KB22

KB4

KB13

KEY_ROW0

KEY_COL2

KEY_ROW1

KEY_COL0

KEY_ROW4

KEY_COL1

KEY_COL3
KEY_COL4

KEY_ROW2

KEY_ROW3

PWR KEY

0.01u

C144

KEYON (AD6537B)

R161

1K

KB101

3.10 Microphone

The microphone is placed to the front cover and contacted to main PCB. The audio signal is
passed to AIN1P and AIN1N pins of AD6537B. The voltage supply VMIC is output from
AD6537B, and is a bias voltage for the AIN1P. The AIN1P and AIN1N signals are then A/D
converted by the Voiceband ADC part of AD6537B. The digitized speech is then passed to the
DSP section of AD6525 for processing (coding, interleaving etc.).

Figure 3-25. MICROPHONE

- 36 -

3. TECHNICAL BRIEF

AIN1P

AIN1N

1k

2.2k
39p

10u

100

39p

100

0.1u

39p

39p 39p

2.2k

39p 39p

Main Mic

AD6537B

VMIC

- 37 -

3. TECHNICAL BRIEF

3.11 Main Receiver

The Receiver is driven directly from AD6537B AOUT1P and AOUT1N pins and the gain is
controlled by the PGA in an AD6537B.

The Receiver is placed in the folder cover and contacted to LCD MODULE

Figure 3-26. MAIN RECEIVER

- 38 -

3.12 Headset Jack Interface

This phone chooses a 3-pole type ear-mic jack which has three electrodes such as Receiver
+, Mic+, and GND. This type usually supports only single-ended configuration in the audio
path. But most of phones use the common interface.

Figure 3-27. HANDS-FREE & HEADSET JACK INTERFACE

3. TECHNICAL BRIEF

AIN2N

AIN2P

AIN3L
AIN3R

AD6537B

CLOSE TO EARJACK

HEADSET JACK

TC153

10u

C179

39p

C123
39p

39p

C196

R156

100K

SP115

VEXT

R150

100

39p

C165

1MR144

100p

C171

C178

39p

C177
39p

100

R148

0.1u

C124

C152

39p

VA153

AVL5M02-200

VEXT

R158

NA

VMEM

C168

18p

39K

R153

VMEM

4

6NO

2

VCC

U105

MAX4599EXT-T

5 COM

GND

3

1

IN

NC

U104

MAX9075EXK-T

2

GND

1

OUT

VCC

5

3

VIN+

VIN-

4

R159

1K

AVL5M02-200

VA154

4.7

R141

1MR145

39p

C153

NA

R154

R137 1K

4.7K

R130

VMIC

VMEM

330KR147

R138

2.2K

C167

39p

J102

1

2

3

4

5

C170

100p

C151 0.1u

R181 4.7

SP114

HOOK_DET

VMIC_ON

JACK_DET

- 39 -

3. TECHNICAL BRIEF

3.13 Speaker & MIDI IC

C1100 don’t use buzzer. but uses the loud speaker and Melody IC which makes the robust
joyful melody sounds.

• Melody IC control

2GPIO are assigned to control melody IC. Melody data is transferred to melody IC.

Figure 3-28. SPEAKER & MIDI IC

This phone have a melody IC of Yamaha, YMU759B is a synthesis LSI for portable
telephone that is capable of playing high quality music by utilizing FM synthesizer and
ADPCM decoder. This chipset is equipped with Yamaha's original FM synthesizer, with
which the device is capable of simultaneously generating up to 16 voices with different
tones, that is 16 polys. YMU759B includes a speaker amplifier low ripple whose maximum
output is 550mW at SPVDD = 3.6V.

Closed to Analog SW

(16 Poly MIDI)

C403 0.1u

47p

VMEM

R403

10K

C412C411

47p

C404

R407

0.01u

0

0

R409

28

_WR

4.7

R414

HPOUT_L

10

HPOUT_R

11

5

IFSEL

6

PLLC

32

SDOUT

SPOUT1

17

SPOUT2

18

SPVDD

15

16

SPVSS

VDD

7

VREF

9

8

VSS

_CS

29

_IRQ

3

31

_RD

4

_RST

30

A0

1

CLK1

D0

27

D1

26

D2

25

D3

24

D4

23
22

D5

21

D6

20

D7

12

EQ1

EQ2

13

14

EQ3
EXT1

2

19

EXT2

YMU759B

U401

0R401

100p

C4050R404

R408 3.3K

100KR415

10K

R412

C407
47p

39K

R402

VBAT

39pC409

NA

VMEM

R405

R406

NA

47pC410

1

V+

150KR417

COM1

3

COM2

9

GND

6

4

IN1

8

IN2

NC1

5

7

NC2

2

NO1

10

NO2

MAX4684EUB

U402

4.7

R416

R410 0

47p

C406

1000p

R413

0

C402 0.1u

C401

0.1u

SPK_REC_N

SPK_REC_P

C408

13MHZ_MIDI
MIDI_RESET

ADD00

RD

MIDI_CS

WR

MIDI_INT

DATA08
DATA09
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15

SPKN

SPKP

RECP

RECN

SPK_RCV_SEL

- 40 -

3.14 Key Back-light Illumination

In key back-light illumination, there are 10 blue LEDs on main PCB keypad side , which are
driven by LIGHT3 line from AD6537B.

Figure 3-29. KEY BACK-LIGHT ILLUMINTION

3. TECHNICAL BRIEF

LD118

LD111

SP109 SP110

LD115

47

R116

LD119

R113

47

LD116

SP108

R117

47

47

R112

47

R118 R119

47

SP102

LD114

LD113

SP105

SP104

LD117

SP106

47

R115

LD112

47

R114

LD120

SP107

R111

47 47

R120

SP103

SP111

VBAT

AD6537B

LIGHT1

LIGHT2

LIGHT3

RLE

D

GLED

RED LED

GREEN LED

NA

R264

5

6

3

1

4

Q201

UMX1NTN

2

10K

R225

0

R263

R262

0

0

R261

R226 47K

R229 47K

47K

R227

RLED

GLED

RED_LED

IND_LEDG

- 41 -

3. TECHNICAL BRIEF

3.15 LCD Back-light Illumination

In LCD Back-light illumination, there is an charge pump driver in main PCB, which is controlled
by LCD_DIM line from AD6525.

Figure 3-30. MAIN LCD BACKLIGHT ILLUMINATION

LCD BACKLIGHT LED

39p

C262

EN_SET

9

11

GND

10

IN

2

OUT

U203

AAT3123ITP-20-T1

4

C1+

C1-

3

C2+

1

12

C2-

D1

8

D2

7

D3

6

D4

5

C258

1uF

VA207

AVL14K02200

C260

1uF

C261

1uF

C271

18p

VBAT

FB1

1uF

C259

C272

18p

LCD_DIM

IND_LEDG

LCD MODULE

3.16 MOTOR

The Vibrator is placed in the folder cover and contacted to LCD MODULE. The vibrator is
driven from VIBRATOR (GPIO_0) of AD6525.

Figure 3-31. MOTOR

- 42 -

3. TECHNICAL BRIEF

20R223

1SS352

D201

47K

R224

VBAT

R230 220

R234
100K

VBAT

VA204

AVL14K02200

23

64

1

5

Q202

EMZ2

C273

4.7u

1.5KR233

MOTOR

VIBRATOR

- 43 -

4. TROUBLE SHOOTING

4.1 RX Trouble

RX Check Area

HP8922 : Test mode

62 CH, 7 level setting (TCH)

62 CH, -60dBm setting (BCCH)
Spectrum analyzer setting
Oscilloscope setting

START

1.Check

Regulator Circuit

2.Check

VCTCXO Circuit

3.Check

Control Signal

4.Check

Ant SW &

Mobile SW

5. Check

Saw Filter

Circuit

6. Check
RX IQ

Redownload SW, CAL

4. Trouble Shooting

1

2

6

5

3

4

Test Point

Checking Flow

Figure 4-1.

4. Trouble Shooting

- 44 -

(1) Checking Regulator Circuit

Test Points

Circuit Diagram

Checking Flow

Figure 4-2.

U303. 3

U303. 5

Pin 3. High ?

Yes

Changing the Board

RF 2.85V O.K?

Yes

No

Replace U303

Regulator Circuit is OK
See next Page to check
VCTCXO

No

Check Pin 5.

10uC361

VRF

10u

C362

0.01u

C363

3

GND

2

1

IN

5

OUT

U303MIC5255-2.85BM5

4

BYP EN

R317 0

VBAT

CLKON

4. Trouble Shooting

- 45 -

(2) Checking VCTCXO Circuit

Test Points Checking Flow

Waveform

Circuit Diagram

Figure 4-3.

No

Yes

No

Yes

Check Pin 3.
Refer to Graph 2-1

Check Pin 4.
Refer to Graph 2-2

13 MHzO.K?

2.75V OK?

Check U101, PMIC

VCTCXO Circuit is OK
See next Page to check
ANT SW & Mobile SW

Changing X301

(1608)

AD6535_AFCDAC

C373
100p

1000p

C372

R314

C371

2.2u

100

X301

2

GND

3

OUT

VCC

4

13MHz

VVCXO

R315

15K

AFC

X301. 4

X301. 3

4. Trouble Shooting

- 46 -

(3) Checking PLL Control Signal

Test Points

Waveform

Checking Flow

Figure 4-4.

S_DATA

S_CLK
S_EN

RF_PWR_DWN

Check RF_PWR_DWN.

Check TP
Check if there is
Any Major Difference
Refer to Graph 3-1
3-2

Level is High?

Yes

Similar?

Yes

Control Signal is OK
See next Page to check
ANT SW & Mobile SW

No

No

Download the SW

Download the SW

4. Trouble Shooting

- 47 -

(4) Checking Ant SW & Mobile SW

Test Points

Circuit Diagram

Waveform

Figure 4-5.

GPO_9

GPO_11

22pC321

C383 27p

0.5p

C322

C385 10p

10pC382

C325

NA

33nH

L305

C384 3.3p

KMS-507 SW301

ANT

G1

G2

RF

14

GND7

VC111VC2

2

SHS-C090DR

FL301

8

ANT

1

DCS_RX

DCS_TX

3

EGSM_RX

10

EGSM_TX

5

GND1

4

GND2

6

GND3

7

GND4

9

GND5

12

GND6

13

33nH

L306

27p

C387

ANT_SW1

ANT_SW2

SW301. RF

FL301. 1

FL301. 10

L306 (VC1)

L305 (VC2)

SW301. ANT

4. Trouble Shooting

- 48 -

Checking Flow

Check L305, L306
Check whether Ant SW
Set as RX mode
Refer to Table 4-1

Check SW301 Pin ANT,RF
with RF Cable connected.

Open

Yes

Yes

Yes

Yes

Changing SW301

Check SW301 Pin ANT,RF
with No RF Cable Connected

For these 2 test case,
No Call connection is needed

No

Changing SW301

No

Changing the Board.

No

Changing FL301

No

Check RF Level of
FL301.2 (for GSM) &
FL301.11(for DCS)

Ant SW & Mobile SW is OK
See next Page to check
Rx IQ Signal

For this RF Level test case,
RX Stand alone Mode is needed
refer to chapter 11

Short

VC1 : Low
VC2 : Low

Pin10 : ~ -62dBm

Pin 1 : ~ -63dBm

Table 4-1.

ANT SW VC1 VC2

DCS TX 0 1

EGSM TX 1 0

EGSM,DCS RX 0 0

4. Trouble Shooting

- 49 -

(5) Checking SAW Filter Circuit

Test Points

Checking Flow

Circuit Diagram

Figure 4-6.

FL302

B7820

G1

2

G2

5

IN

1

O1

3

O2

4

C353

1p

C352

1p

7.5nHL304

27nHL303

C354

1p

1p

C351

G1

2

G2

5

IN

1

3

O1

O2

4

FL303

B7821

27p

C387

Check RF Level of
Saw Filter Input
For GSM : FL302.1

Check RF Level of
Saw Filter Output
For GSM : FL302.3
For DCS : FL303.3

FL303.1 : ~ -61dBm

FL302.3 : ~ -64dBm
FL303.3 : ~ -65dBm

Saw Filter is OK
See next Page to check
Rx IQ Signal

Yes

Yes Yes

No

Check the parts are
well Soldered
For GSM : C387

No No

Check the parts are
well Soldered
For GSM : L303,C351
For DCS : L304, C353

Changing
C387for GSM

Changing

C387for GSM

For the test,
RX Stand alone Mode is
needed. Refer to chapter 11

Changing
L303, C351 for GSM
L304, C353 for DCS

Changing
FL302 for GSM
FL303 for DCS

FL303FL302

- 50 -

4. Trouble Shooting

(6) Checking RX IQ

Test Points

Waveform

Checking Flow

Circuit Diagram

Yes

No

Check C342, C343.
Check if there is
Any Major Difference

• Refer to Graph 4-4

Similar?

Replace U301

Redownload the Software

And calibrate

39p

39p

C343

C342

QP

QN

IP

IN

Figure 4-7.

Graph 4-4.

C342C343

- 51 -

4.2 TX Trouble

4. Trouble Shooting

START

1. Check

Regulator Circuit

2. Check

VCTCXO Circuit

3. Check

Control Signal

HP8922 : Test mode

62 CH, 7 level setting (TCH)

62 CH, -60dBm setting (BCCH)
Spectrum analyzer setting
Oscilloscope setting

4. Check
TX IQ

5. Check

PAM Control Signal

6. Check Ant SW &
Mobile SW

Redownload SW, CAL

Test Points

Checking Flow

Figure 4-8.

6

1

2

3

5

4

- 52 -

(1) Checking Regulator Circuit

Figure 4-9.

4. Trouble Shooting

10uC361

VRF

10u

C362

0.01u

C363

3

GND

2

1

IN

5

OUT

U303MIC5255-2.85BM5

4

BYP EN

R317 0

VBAT

CLKON

No No

Yes Yes

RF 2.85VO.K? Pin 3. High ? Changing the Board

Regulator Circuit is OK.
See next Page to check
VCTCXO

Replace U303

Check Pin 5 .

Test Points

Circuit Diagram

Checking Flow

U303. 3

U303. 5

- 53 -

4. Trouble Shooting

(2) Checking VCTCXO Circuit

Yes

Yes

Check Pin 3.

• Refer to Graph 2-11

13 MHzO.K?

2.75V OK?

Check U101,PMIC

No

No

Changing X301

VCTCXO Circuit is OK
See next Page to check
ANT SW & Mobile SW

(1608)

AD6535_AFCDAC

C373
100p

1000p

C372

R314

C371

2.2u

100

X301

2

GND

3

OUT

VCC

4

13MHz

VVCXO

R315

15K

AFC

Figure 4-10.

Test Points Checking Flow

Waveform

Circuit Diagram

X301. 4 X301. 3

(3) Checking PLL Control Signal

- 54 -

4. Trouble Shooting

No

No

Yes

Yes

Check RF_PWR_DWN.

Similar?

Control Signal is OK.
See next Page to check
ANT SW & Mobile SW

Level is High? Download the SW

Download the SW

Figure 4-11.

Test Points

Checking Flow

Waveform

S_DATA

S_CLK
S_EN

RF_PWR_DWN

- 55 -

4. Trouble Shooting

(4) Checking Ant SW & Mobile SW

Graph 4-7.(a) Graph 4-7.(b)

Figure 4-12.

GPO_9

GPO_11

22pC321

C383 27p

0.5p

C322

C385 10p

10pC382

C325

NA

33nH

L305

C384 3.3p

KMS-507 SW301

ANT

G1

G2

RF

14

GND7

VC111VC2

2

SHS-C090DR

FL301

8

ANT

1

DCS_RX

DCS_TX

3

EGSM_RX

10

EGSM_TX

5

GND1

4

GND2

6

GND3

7

GND4

9

GND5

12

GND6

13

33nH

L306

27p

C387

ANT_SW1

ANT_SW2

Test Points

Waveform

Circuit Diagram

SW301. RF

FL301. 1

L306 (VC1)

L305 (VC2)

SW301. ANT

FL301. 10

- 56 -

(5) Checking Ant SW & Mobile SW

4. Trouble Shooting

Yes

Yes

Yes

Yes

For the test,
TX Stand alone Mode is needed. Refer to
chapter 11 (PL=7 for GSM, PL=2 for DCS)

Check L305, L306
Check whether Ant SW
Set as TX mode

• Refer to Graph 4-7(a),4-7(b)

• Refer to Table 4-2

Check RF Level of
FL301 Pin 5 (for GSM) & Pin 3
(for DCS)

Check SW301.ANT, RF with
RF Cable connected.

Check SW301.ANT,RF
with RF Cable disconnected

Check VC1, VC2 Changing board

Go to 4.3.5 Checking PAM
control signal

Changing SW301

Changing SW301

Pin5 : ~29.5dBm

Pin 3 : ~26.5dBm

Open

Short

END

No

No

No

No

Checking Flow

Table 4-2.

ANT SW VC1 VC2

DCS TX 0 1

EGSM TX 1 0

EGSM,DCS RX 0 0

- 57 -

4. Trouble Shooting

(6) Checking PAM Control Signal

Go to Next Step

Similar?

Yes

No

Download S/W

Graph 4-8.

Figure 4-13.

Test Points

Waveform

Checking Flow

TX_RAMP (R301)

PA_EN (R302)

Check TX_RAMP and PA_EN
Check if there is
Any Major Difference or not
Refer to Graph 5-11

- 58 -

(7) Checking TX IQ

Figure 4-14.

Graph 4-9.

C399

22n 22p

C386

39p

39p

C343

C342

TXIN

5

TXIP

4

TXQN

7

TXQP

6

32

VDD2

RXIN

3

2

RXIP

1

RXQN

GND4

31

QP

QN

IP

IN

4. Trouble Shooting

Test Points

Waveform

Circuit Diagram

C342

C343

4. Trouble Shooting

- 59 -

4.3 Power On Trouble

Figure 4-15. AD6537B POWER MANAGEMENT SECTION

For AD6535 & 6537B

VBAT

VSIM

C133

10u

VMIC

C147

22p

VBAT

VCORE

VMEM

VBAT

VEXT

10u

C146

A4

VEXT1B4VEXT2

T3

VMEM1

VMEM2

T2

VMIC

N16

T7

VRTC

VSIM

T6

D16

VVCXO

H16

VABB

VBAT1

N2

C15

VBAT1-1

P2

VBAT2

VBAT2-1

G15

VBAT2-2

H15

R2

VBAT3

VBAT3-1A3VBAT3-2

B3

R5

VBAT4

VBAT5

R4

B8

VBATSENSE

VBAT_NET

T4

P1

VCORE1N1VCORE2

R6

NC_R6

C149

39p

VVCXO

R101

NA

C148

47n

47n

C132

10u

C135

10u

C131

C137C136

10u10u

VRTC

R104

NA

C195

0.1u

0

R103

10u

C134

AD6537B

Circuit Diagram Test Points

&

4. Trouble Shooting

- 60 -

No

No

No

No

No

No

Yes

Yes

Yes

Yes

Yes

START

Check Battery Voltage

> 3.35V ?

Push power-on key and

check the level change of

U102 KEYON

Check the voltage of

the following port at U102

VOORE=1.8V ?

VMEM = 1.8 or 2.8V ?

VEXT=2.8V ?
VRTC=1.8V ?
VSIM=2.85V ?
VMIC=2.5V ?
VVCXO=2.75V ?

Logic level at KEYON of U102

= HIGH?

Does it work properly?

THE PHONE WILL

POWER ON.

Charge or Change Battery and try again.

Check the contact of power-key
or dome switch.

Replace U102

Redownload software & try again.

Yes

Yes

Does it work properly?

The power-on procedure is completed.
The problem may be elsewhere.

Replace the main board.

Checking Flow

- 61 -

4. Trouble Shooting

4.4 Charging Trouble

Figure 4-16.

1%

Current Sense

CLOSE TO BATTERY PACK

D6

G

45

S

TPCF8102

D1

1

D2

2

D33D4

6

D5

7

8

Q103

VBAT

330

R108

D101

CUS02

VCHG

ISENSE

GATEDRIVE

0.2R107

VCHARGE

10u

C187

Test Points

Circuit Diagram

D101 Q103

R107

- 62 -

4. Trouble Shooting

Voltage at VCHG

of U102 = 5.2V?

R107, Q103, D101

well-soldered?

Voltage across

D101 = ~0.3V

Voltage across

R107 is ~100mV.

~0.7< Voltage

(Q103) < ~1.3V

Is the battery

charged ?

The charging adaptor(TA) is out of order.

Change the charging adaptor.

Resolder R102, U102, D101.

Replace D101.

Replace R107.

Replace Q103.

The battery may have the problem.

Change the battery and try again.

CHARGING WILL

OPERATE PROPERLY.

Ye s

Ye s

Ye s

Ye s

Ye s

Ye s

No

No

No

No

No

No

START

SETTING : Connect the battery and the charging adaptor(TA) to the phone

Checking Flow

- 63 -

4. Trouble Shooting

4.5 LCD Trouble.

Figure 4-17.(a) Figure 4-17.(b)

Figure 4-17.(c)

Checking Flow

Connection Check

CN201

If the FPCB has a
problem,
the control signals for
LCD cannot be
transmitted properly.

- 64 -

4. Trouble Shooting

START

Is the connection of LCD

module with LCD connector on

PCB OK?

Check the soldering of CN201

Check the soldering of

Connector at LCD module.

Check the soldering

of CRC filter

Does LCD work properly?

LCD WILL WORK

PROPERLY.

The FPCB which connects the main

board and LCD module

has a problem. Replace the FPCB.

Change the FPCB and try again.

At LCD module

FPCB Check

Reassemble LCD module with LCD connector.

Resolder CN201.

Resolder connector.

Resolder CRC filter.

Replace LCD module.

No

No

No

No

No

Ye s

Ye s

Ye s

Ye s

Ye s

Ye s

Checking Flow

- 65 -

4. Trouble Shooting

4.6 Receiver Trouble

AD6537B

AOUT1P

AOUT1N

MIDI

Closed to Analog SW

47p

C412C411

47p

R407

0

0

R409

4.7

R414

100KR415

C407
47p

39pC409

NA

VMEM

R405

R406

NA

47pC410

1

V+

COM1

3

COM2

9

GND

6

4

IN1

8

IN2

NC1

5

7

NC2

2

NO1

10

NO2

MAX4684EUB

U402

4.7

R416

47p

C406

SPK_REC_N

SPK_REC_P

SPKN

SPKP

RECP

RECN

SPK_RCV_SEL

Receiver path

SPK path

Figure 4-18.

Test Points

Circuit Diagram

U401

vibrator

Speaker

Receiver

U402

R414
C411

C412
R416

Soldering

check

4. Trouble Shooting

- 66 -

Checking Flow

Waveform

SETTING : After initialize Agilent 8960, Test EGSM, DCS mode

Graph 4-10.

START

Check the signal level of

RCVP & RCVN at R414, R416. Are

these voltage is about 1.2V?

Ye s

Check the signal level at R415.

Is it almost 0?

Ye s

Check the contact state of dual

mode speaker.

The dual mode speaker will work

properly.

No

No

No

Check the soldering

R414 & R416

Re-soldering

R414, R416

Check the soldering

of U402

Re-soldering U402

Replace the dual mode speaker

Ye s

Ye s

No

No

Replace the Main board.

ABB is out of order.

Replace U402

4. Trouble Shooting

- 67 -

4.7 Speaker Trouble

Test Points

Circuit Diagram

Figure 4-19.

Closed to Analog SW

(16 Poly MIDI)

C403 0.1u

47p

VMEM

R403

10K

C412C411

47p

C404

R407

0.01u

0

0

R409

28

_WR

4.7

R414

HPOUT_L

10

HPOUT_R

11

5

IFSEL

6

PLLC

32

SDOUT

SPOUT1

17

SPOUT2

18

SPVDD

15

16

SPVSS

VDD

7

VREF

9

8

VSS

_CS

29

_IRQ

3

31

_RD

4

_RST

30

A0

1

CLK1

D0

27

D1

26

D2

25

D3

24

D4

23
22

D5

21

D6

20

D7

12

EQ1

EQ2

13

14

EQ3

EXT1

2

19

EXT2

YMU759B

U401

0R401

100p

C4050R404

R408 3.3K

100KR415

10K

R412

C407
47p

39K

R402

VBAT

39pC409

NA

VMEM

R405

R406

NA

47pC410

1

V+

150KR417

COM1

3

COM2

9

GND

6

4

IN1

8

IN2

NC1

5

7

NC2

2

NO1

10

NO2

MAX4684EUB

U402

4.7

R416

R410 0

47p

C406

1000p

R413

0

C402 0.1u

C401

0.1u

SPK_REC_N

SPK_REC_P

C408

13MHZ_MIDI
MIDI_RESET

ADD00

RD

MIDI_CS

WR

MIDI_INT

DATA08
DATA09
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15

SPKN

SPKP

RECP

RECN

SPK_RCV_SEL

CN201

U401

vibrator

Speaker

Soldering

check

C410

C404

R420

R404

C405

Speaker path

receiver path

These five components

make up the amplifier and

the filter stage of melody.

[C404 R402 C405 R404 R417]

Analog switch for select audio

path or midi path.

To the speaker at LCD

module via CN201.

C417

4. Trouble Shooting

- 68 -

Checking Flow

SETTING : Connect PIF to the phone, and Power on. Enter the engineering mode, and set

"Melody on" at Buzzer of BB test menu.

START

Voltage across C408

= 3.3 V?

Ye s

Check the signal level of

R407, R409

Ye s

The voltage

of R415 is ~2.8V

Ye s

Check the state of contact of

dual mode speaker

No

No

No

No

Check the soldering of

R410

Ye s

Re-soldering

R410

Check the soldering of

U402

Ye s

Re-soldering

U402

No

No

Replace U102

( ABB LDO)

Replace U401

Replace U402

Replace speaker

Ye s

Speaker
Working!!

4. Trouble Shooting

- 69 -

4.8 Mic Trouble

Test Points

Circuit Diagram

CLOSE TO MIC

2.2KR134

R128

100

C163

39p

1KR126

OB4-15L42-C33L

MIC101

1

2

100

R132

VA151

AVL5M02-200

C193
39p

VA152

AVL5M02-200

39p

C161

10u

TC151

2.2K

R127

C160

0.1u

C162

39p

VMIC

Figure 4-20.

Soldering

check

MIC101

R127 R126

C193

R128

R132C160

The signal flow of the

microphone to ABB

- 70 -

4. Trouble Shooting

SETTING : After initialize Agilent 8960, Test EGSM, DCS mode

Figure 4-20.

Checking Flow

START

Voltage across C193

= 2.5VDC?

Voltage VMIC of

U102 = 2.5VDC?

Resolder R126 & R127.

Replace U102.

Replace the microphone, MIC101.

Resolder C160, R128, R132.

Replace Main board.

MIC Bias Voltage

MIC WILL WORK.

Check the

soldering of R110,C160,

R128, R132.

Check the signal level

at each side of MIC101. Is it a

few tens mVAC?

Ye s

Ye s

Ye s

No

No

No

No

- 71 -

4. Trouble Shooting

4.9 Vibrator Trouble

20R223

1SS352

D201

47K

R224

VBAT

R230 220

R234
100K

VBAT

VA204

AVL14K02200

23

64

1

5

Q202

EMZ2

C273

4.7u

1.5KR233

MOTOR

VIBRATOR

Figure 4-21.(a)

Figure 4-21.(b)

Test Points

Circuit Diagram

Vibrator
block

Soldering Check

in LCD Module

Vibrator

Q202

L

H

When the vibrator works, the

signal at this point goes H

When the vibrator works, the
current flow in this direction.

Current path

From the vibrator at LCD

module via CN201.

- 72 -

4. Trouble Shooting

START

Is the voltage

at pin6 of Q202

near VBAT?

Check the

soldering of R223.

Replace Q202.

Resolder R223.

Resolder CN201.

Resolder vibrator.

Check the

soldering

of R223

Check the

soldering
of CN301

Check the

soldering of vibrator at

LCD module

Replace Vibrator.

VIBRATOR WILL

WORK PROPERLY.

Ye s

Ye s

Ye s

Ye s

Ye s

No

No

No

No

No

Resolder R223.

Checking Flow

SETTING : After Initialize Agilent 8960, Test in EGSM, Connect PIF to the phone, and Power

on. Enter The engineering mode, and set ’Vibrator on’ at Vibration of BB test
menu.

- 73 -

4. Trouble Shooting

4.10 Key Backlight LED Trouble

LD118LD111

SP109 SP110

LD115

47

R116

LD119

R113

47

LD116

SP108

R117

47

47

R112

47

R118

R119

47

SP102

LD114

LD113

SP105

SP104

LD117

SP106

47

R115

LD112

47

R114

LD120

SP107

R111

47

47

R120

SP103

SP111

VBAT

START

Check the U102.

Check the soldering of each R or replace LEDs not working.

BACKLIGHT WILL

WORK PROPERLY.

Is the voltage

level VBAT

3.6-4.2V?

Are all LEDs

LD111~LD120t

working?

No

No

Ye s

Ye s

Test Points

Checking Flow

Circuit Diagram

Figure 4-22.

To

LIGHT3

port of

ABB

Light3

- 74 -

4.11 Folder on/off Trouble

FOLDER SWITCH

C111
10p

R142 51K

VEXT

C112

0.1u

GND1

3

4

GND2

NC1

2

NC2

5

OUTPUT

1

PGND

7

6

VDD

A3212EEH U103

4. Trouble Shooting

Figure 4-23.

Test Points

Circuit Diagram

U103

C111

R142 C112

The voltage at this point

goes from 2.8V to 0 V

when the folder is closed.

This component operate
when a magnet get close
here.

AD6525

- 75 -

4. Trouble Shooting

START

Check the magnet

in the folder side.

Place the magnet properly.

Resolder U103.

Resolder R142 & U103.

Replace U103.

Replace U102.

Voltage at Pin 6

of U103 = 2.8V ?

Open Folder.

Voltage at Pin 1 of U103

= 2.8V ?

Does it work properly?

FOLDER WILL WORK

PROPERLY.

Close Folder or

get close any magnet to U103.

Voltage at Pin 1 of U103

= 0V ?

Voltage VEXT1 of U102

= 2.8V?

No

No

No

No

No

No

Ye s

Ye s

Ye s

Ye s

Ye s

Redownload software
or change the main board.

Checking Flow

- 76 -

4.12 SIM Detect Trouble

C116

1000p

VSIM

C117

0.1u

220n

C115

CLK

3

4

GND1

GND2

7
8

GND3

9

GND4

GND5

10

6

IO

RST

2

VCC

1

5

VPP

J101

GCA261-6S

VA165

AVL14K02200

VSIM

SIM_DATA

START

Resolder J101. Replace J101.

Does the SIM

supports 3V?

Change the SIM.

Our Phone supports 3V SIM only.

Voltage at Pin 1

of J101 = 2.85V?

Check the

soldering condition

of J101.

Voltage VSIM of U102.

= 2.85V?

Check the

contact between

J101 and SIM

card.

Change the

SIM and try again.

Does it work

properly?

Resolder J101.

Replace J101.

SIM will be DETECTED.

The SIM is malfunctioned.

Change the SIM.

Change the main

board.

Does it work properly after

redownloading SW?

Ye s

Ye s

Ye s

Ye s

Ye s

No

No

No

No No

No No

4. Trouble Shooting

Test Points

Checking Flow

Circuit Diagram

Figure 4-24.

PIN1

DBB

SETTING : Insert SIM into J101, connect PIF to the Phone, and Power on.

- 77 -

4. Trouble Shooting

4.13 Earphone Trouble

CLOSE TO EARJACK

HEADSET JACK

TC153

10u

C179

39p

C123
39p

R156

100K

SP115

39p

C165

100

R148

0.1u

C124

VA153

AVL5M02-200

R158

NA

VMEM

C168

18p

39K

R153

VMEM

4

6NO

2

VCC

U105

MAX4599EXT-T

5COM

GND

3

1

IN

NC

R159

1K

AVL5M02-200

VA154

4.7

R141

NA

R154

R137 1K

VMIC

VMEM

R138

2.2K

C167

39p

J102

1

2

3

4

5

R181 4.7

SP114

HOOK_DET

VMIC_ON

Test Points

Circuit Diagram

J102

R181

C167

R154 R159

R153

R156
R158

C123

AIN2P

AIN2N

AOUT3P

JACK_DET

(DBB)

The direction of the audio

signal from the ear-mic

The direction of the audio

signal to the ear-receiver

VMEM

➝ VMIC SWITCHING

When Jack is activated

Figure 4-25.(a) Figure 4-25.(b)

- 78 -

START

Insert the earphone to the phone.

Set the audio part of the test

equipment to echo mode.

Does the audio

profile of the phone change to

the earphone

mode?

Can you hear your vioce from

the earphone?

EARPHONE WILL

WORK PROPERLY.

Change Earphone.

Can you hear

your voice from

the earphone?

Can you hear the sound from

voltage at C139=~1.2V

Check soldering
C139,R141,J102

Replace

main board

Re-solder

C139,R141,J102

Download S/W

Earphone receiving path

problem

Earphone sending path

problem

Change the earphone

and try again.

Set the audio part of the test

equipment to PRBS or

continuous wave mode.

Earphone detect problem

Audio path problem

4

3

3

2

1

Ye s

Ye s

Ye s

Ye s

Ye s

No

No

No

No

No

4. Trouble Shooting

Checking Flow

Earphone receiving path problem

- 79 -

4. Trouble Shooting

4

3

Ye s

Ye s

Ye s

Ye s

Ye s

No

No

No

No

Earphone sending

path problem

Voltage at A point

= 1.5~1.9 VDC ?

Is the signal level

across C166&7a few tens

or hundreds

VAC ?

Does it work well?

Redownload software.

Does it work well?

Change the main board.

Resolder C166&7.

Resolder R181.

Resolder

R153, R159.

Voltage at R150

= 2.8V ?

Voltage at Pin1 of

U104 = 2.8V ?

Resolder R150.

Resolder R145, R147, R144

Earphone detect

problem

Voltage at Pin 3

of U104> Voltage at Pin 4

of U104?

Resolder or replace U104.

5

5

1

4

Ye s

Ye s

Ye s

No

No No

Earphone detect problem

Earphone sending path problem

4.14 Indicator LED Trouble

- 80 -

4. Trouble Shooting

Test Points

Circuit Diagram

Checking Flow

CN201

21 22

RLED

G

R225

10K

R223

17K

UMX1NTN

4

5

6

1

2

3

0

0

R261

GREEN LED

R263

RED LED

GLED

RED_LED

Q201

R264

NA

R262

0

R226

47K

R227

47K

VBAT of U102 is

3.6~4.2V?

Are both LEDs not

working?

BACKLIGHT WILL

WORK PROPERLY.

Replace Q201, and try again.

Check the VBAT of U102.

Check the soldering or replace LEDs not working.

No

No

Ye s

Ye s

START

Figure 4-26.

R226 R227 R264 R262

Q201

R225 R229

- 81 -

5. DISASSEMBLY INSTRUCTION

4.15 RTC Trouble

Test Points

Circuit Diagram

Checking Flow

START

Is the voltage level at R123

about 1.8V?

Replace X101 and try again.

Check the soldering of R123.

BACKLIGHT WILL

WORK PROPERLY.

Ye s

Ye s

No

X101

R123

3

2

X1U1

4

1

32.768KHz

MC_146

R123

10M

DBB

OSCOUT

OSCIN

Figure 4-27.

- 82 -

5. DISASSEMBLY INSTRUCTION

5.1 Disassembly

1. Remove the Battery and Screws as shown below.

Figure 5-1.

Figure 5-2.

5. DISASSEMBLY INSTRUCTION

- 83 -

5. DISASSEMBLY INSTRUCTION

Figure 5-3.

- 84 -

Figure 5-4.

5. DISASSEMBLY INSTRUCTION

- 85 -

5. DISASSEMBLY INSTRUCTION

Figure 5-5.

Figure 5-6.

- 86 -

5. DISASSEMBLY INSTRUCTION

Figure 5-7.

Figure 5-8.

3

1

1

2

- 87 -

Figure 5-9.

5. DISASSEMBLY INSTRUCTION

5. DISASSEMBLY INSTRUCTION

- 88 -

Figure 5-10.

Figure 5-11.

5. DISASSEMBLY INSTRUCTION

- 89 -

Figure 5-12.

3

2

1

- 90 -

6. DOWNLOAD AND CALIBRATION

6.1 Download

A. Download Setup

Figure 6-1 describes Download setup.

Figure 6-1. Download Setup

6. DOWNLOAD AND CALIBRATION

UART

- 91 -

B. Download Procedure

1. Access Flash loader program in PC and select Erase. (Don’t check OWCD)

2. Press Start and Wait until Erase is completed.

6. DOWNLOAD AND CALIBRATION

1. Select Erase

2. Check

3. Don’t Check
OWCD

1. Press

Start and

Wait

- 92 -

3. Change Address and Size(Address : 18000000, Size : 0x800000), and Press Start and Wait
until Erase is completed again.

4. Press Write to start Download and press Key to choose software (AlchemyData.mot)

1. Change Address
and Size

3. Press Start and
Wait

2. Don’t Check
OWCD

1. Press

2. Press

6. DOWNLOAD AND CALIBRATION

- 93 -

5. Choose software

6. Wait until converting from MOT to BIF is completed (Don’t check OWCD)

1. Select File

2. Press Open

2. Wait until completion 1. Don’t Check OWCD

6. DOWNLOAD AND CALIBRATION

- 94 -

7. Press Start and Power on the phone using JIG remote Power on (Switch 1)

8. Wait until Sending Block is completed

6. DOWNLOAD AND CALIBRATION

- 95 -

9. Press Write to start Download and press Key to choose software (CodeData.mot)

10. Choose software

6. DOWNLOAD AND CALIBRATION

- 96 -

11. Wait until Sending Block is completed

1. Wait Until

Sending Block

is completed

6. DOWNLOAD AND CALIBRATION

- 97 -

6.2 Calibration

A. Equipment List

Table 6-1. Calibration Equipment List

B. Equipment Setup

Figure 6-2.

6. DOWNLOAD AND CALIBRATION

Equipment for Calibration Type/Model Brand

Wireless Communication Test Set HP-8960 Agilent
RS-232 Cable and Test JIG LG
RF Cable LG
Power Supply HP-66311B Agilent
GPIB interface card HP-GPIB Agilent
Calibration & Final test software LG
Test SIM Card
PC (for Software Installation) Pentium II class above 300MHz

- 98 -

Figure 6-3. The top view of Test JIG

C. Test Jig Operation

Table 6-2. Jig Power

Table 6-3. Jig DIP Switch

Table 6-4. LED Description

6. DOWNLOAD AND CALIBRATION

LED Number Name Description

LED 1 Power Power is provided for Test Jig.
LED 2 TA Indicate charging state of the phone battery
LED 3 UART Indicate data transfer state through the UART port
LED 4 MON Indicate data transfer state through the MON port

Power Source Description

Power Supply usually 4.0V

Travel Adaptor Use TA, name is TA-20G (24pin)

Switch Number Name Description

Switch 1 ADI-REMOTE In ON state, phone is awaked. It is used ADI chipset.
Switch 2 TI-REMOTE In ON state, phone is awaked. It is used TI chipset.
Switch 3 VBAT Power is provided for phone from battery
Switch 4 PS Power is provided for phone from Power supply

- 99 -

1. Connect as Fig 6-2 (RS232 serial cable is connected between COM port of PC and MON
port of TEST JIG, in general)

2. Set the Power Supply 4.0V

3. Set the 3 rd , 4 th of DIP SW ON state always

4. Press the Phone power key, if the Remote ON is used, 1 st ON state

D. Procedure

1. Connect as Fig 6-2 (RS232 serial cable is connected between COM port of PC and MON
port of TEST JIG, in general)

2. Power ON PC then enter into Windows 98 (Remark : Windows 2000 system could be
feasible)

3. Run AUTOCAL.exe, the AUTOCAL application window will be appeared.

6. DOWNLOAD AND CALIBRATION