LG 55UB820T, 55UB820T-TH, 55UB829Y, 55UB829Y-TH Service Manual

Printed in KoreaP/NO : MFL68084542 (1511-REV01)

CHASSIS : LB48V

MODEL : 55UB820T 55UB820T-TH

55UB829Y 55UB829Y-TH

CAUTION

BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

LED TV

SERVICE MANUAL

North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com

Internal Use Only

- 2 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

CONTENTS

CONTENTS .............................................................................................. 2

SAFETY PRECAUTIONS ........................................................................ 3

SERVICING PRECAUTIONS .................................................................... 4

SPECIFICATION ....................................................................................... 6

ADJUSTMENT INSTRUCTION .............................................................. 14

BLOCK DIAGRAM .................................................................................. 22

EXPLODED VIEW .................................................................................. 23

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

- 3 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.

It will also protect the receiver and it's components from being
damaged by accidental sh orts of the cir cui try that may be
inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the

measured resistance should be between 1 MΩ and 5.2 MΩ.

When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to

0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit

IMPORTANT SAFETY NOTICE

SAFETY PRECAUTIONS

- 4 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

SERVICING PRECAUTIONS

CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the

SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conict between the

following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precau­tions. Remember: Safety First.

General Servicing Precautions

1. Always unplug the receiver AC power cord from the AC power
source before;

a. Removing or reinstalling any component, circuit board

module or any other receiver assembly.

b. Disconnecting or reconnecting any receiver electrical plug

or other electrical connection.

c. Connecting a test substitute in parallel with an electrolytic

capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explo­sion hazard.

2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".

3. Do not spray chemicals on or near this receiver or any of its
assemblies.

4. Unless specied otherwise in this service manual, clean

electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)

CAUTION: This is a ammable mixture.
Unless specied otherwise in this service manual, lubrication

of contacts in not required.

5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.

6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks
are correctly installed.

7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.

8. Use with this receiver only the test xtures specied in this

service manual.

CAUTION: Do not connect the test xture ground strap to any

heat sink in this receiver.

Electrostatically Sensitive (ES) Devices

Some semiconductor (solid-state) devices can be damaged eas­ily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES

devices are integrated circuits and some eld-effect transistors

and semiconductor “chip” components. The following techniques
should be used to help reduce the incidence of component dam­age caused by static by static electricity.

1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alter­natively, obtain and wear a commercially available discharg­ing wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.

2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or expo­sure of the assembly.

3. Use only a grounded-tip soldering iron to solder or unsolder
ES devices.

4. Use only an anti-static type solder removal device. Some sol-

der removal devices not classied as “anti-static” can generate
electrical charges sufcient to damage ES devices.

5. Do not use freon-propelled chemicals. These can generate

electrical charges sufcient to damage ES devices.

6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads elec­trically shorted together by conductive foam, aluminum foil or
comparable conductive material).

7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective mate­rial to the chassis or circuit assembly into which the device will
be installed.
CAUTION: Be sure no power is applied to the chassis or cir­cuit, and observe all other safety precautions.

8. Minimize bodily motions when handling unpackaged replace­ment ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your

foot from a carpeted oor can generate static electricity suf­cient to damage an ES device.)

General Soldering Guidelines

1. Use a grounded-tip, low-wattage soldering iron and appropri­ate tip size and shape that will maintain tip temperature within
the range or 500 °F to 600 °F.

2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.

3. Keep the soldering iron tip clean and well tinned.

4. Thoroughly clean the surfaces to be soldered. Use a mall wire­bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.

5. Use the following unsoldering technique

a. Allow the soldering iron tip to reach normal temperature.

(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-

type solder removal device or with solder braid.

CAUTION: Work quickly to avoid overheating the circuit

board printed foil.

6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature

(500 °F to 600 °F)

b. First, hold the soldering iron tip and solder the strand

against the component lead until the solder melts.

c. Quickly move the soldering iron tip to the junction of the

component lead and the printed circuit foil, and hold it there
only until the solder ows onto and around both the compo­nent lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.

d. Closely inspect the solder area and remove any excess or

splashed solder with a small wire-bristle brush.

- 5 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

IC Remove/Replacement

Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent at against the cir­cuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.

Removal

1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.

2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.

Replacement

1. Carefully insert the replacement IC in the circuit board.

2. Carefully bend each IC lead against the circuit foil pad and
solder it.

3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).

"Small-Signal" Discrete Transistor
Removal/Replacement

1. Remove the defective transistor by clipping its leads as close
as possible to the component body.

2. Bend into a "U" shape the end of each of three leads remain­ing on the circuit board.

3. Bend into a "U" shape the replacement transistor leads.

4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.

Power Output, Transistor Device
Removal/Replacement

1. Heat and remove all solder from around the transistor leads.

2. Remove the heat sink mounting screw (if so equipped).

3. Carefully remove the transistor from the heat sink of the circuit
board.

4. Insert new transistor in the circuit board.

5. Solder each transistor lead, and clip off excess lead.

6. Replace heat sink.

Diode Removal/Replacement

1. Remove defective diode by clipping its leads as close as pos­sible to diode body.

2. Bend the two remaining leads perpendicular y to the circuit
board.

3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.

4. Securely crimp each connection and solder it.

5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.

Fuse and Conventional Resistor
Removal/Replacement

1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.

2. Securely crimp the leads of replacement component around
notch at stake top.

3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.

Circuit Board Foil Repair

Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed when­ever this condition is encountered.

At IC Connections

To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connec­tions).

1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).

2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.

3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.

4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.

At Other Connections

Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.

1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.

2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly con­nected to the affected copper pattern.

3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.

- 6 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement

.

1. Application range

This specification is applied to the LED TV used LB48V
chassis.

2. Requirement for Test

Each part is tested as below without special appointment.

1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C

2) Relative Humidity: 65 % ± 10 %

3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.

4) Specification and performance of each parts are followed

ea ch drawing an d s pe cificat io n b y part number in
accordance with BOM.

5) The receiver must be operated for about 5 minutes prior to

the adjustment.

3. Test method

1) Performance: LGE TV test method followed

2) Demanded other specification

- Safety : CE, IEC specification

- EMC : CE, IEC specification

4. Model General Specification

No. Item Specication Remarks

1 Market Asia, Oceania, Africa, Middle East(PAL/DVB Market)

DTV & Analog
* DTV Region: Australia/NewZealand(AU),
Singapore(SG), Malaysia(MY), Vietnam(VN),
South Africa(ZA), Iran(IR), Israel(IL)

2 Broadcasting system

Digital : DVB-T
Analog : PAL-BG, DK, I/I’, SECAM-DK/BG/I

▪ Australia/India : only PAL-BG(B)

3 Receiving system

Digital : COFDM, QAM
Analog : Upper Heterodyne

▪ DVB-T

- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32

- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8

5 Video Input (1EA) PAL, SECAM, NTSC

4 System : PAL, SECAM, NTSC, PAL60
Rear (gender)

6 Component Input (1EA) Y/Cb/Cr, Y/Pb/Pr Rear (Phone-Jack Type)

7 HDMI Input (3EA) Side (1:HDCP2.2 ,2:ARC ,3:MHL) HDMI Input 1,2,3

8 Audio Input (1EA) Component, AV, DVI

Rear (AV Gender)
Component, AV and DVI use same jack.

9 SPDIF out(1EA) Optical Audio out Rear (1EA)

10 Analog audio out(1EA) Headphone and External speaker out Rear (1EA)

11 USB Input(3EA) EMF, DivX HD, For SVC (download)

Side JPEG, MP3, DivX HD
(USB 3.0 : 1EA, USB 2.0 : 2EA)

- 7 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

5. External Input Format

5.1. Component (Y, PB, PR)

No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed

1. 720*480i 15.73 59.94 13.50 SDTV, DVD 480I(525I)

2 720*480i 15.73 60.00 13.51 SDTV, DVD 480I(525I)

3. 720*576i 15.63 50.00 13.50 SDTV, DVD 576I(625I) 50Hz

4 720*480p 31.47 59.94 27.00 SDTV 480P

5 720*480p 31.50 60.00 27.03 SDTV 480P

6 720*576p 31.25 50.00 27.00 SDTV 576P 50Hz

7 1280*720 44.96 59.94 74.18 HDTV 720P

8 1280*720 45.00 60.00 74.25 HDTV 720P

9 1280*720 45.00 50.00 74.25 HDTV 720P 50Hz

10 1920*1080 28.13 50.00 74.25 HDTV 1080I 50Hz,

11 1920*1080 33.72 59.94 74.18 HDTV 1080I

12 1920*1080 33.75 60.00 74.25 HDTV 1080I

13 1920*1080 56.25 50.00 148.50 HDTV 1080P

14 1920*1080 67.50 60.00 148.50 HDTV 1080P

- 8 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

5.2. HDMI(PC/DTV)

(1) DTV mode

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed Remarks

1 640*480 31.47 59.94 25.13 SDTV 480P

2 640*480 31.50 60.00 25.13 SDTV 480P

3 720*480 15.73 59.94 13.50 SDTV, DVD 480I(525I)

Spec. out but display4 720*480 15.75 60.00 13.51 SDTV, DVD 480I(525I)

5 720*576 15.63 50.00 13.50 SDTV, DVD 576I(625I) 50Hz

6 720*480 31.47 59.94 27.00 SDTV 480P

7 720*480 31.50 60.00 27.03 SDTV 480P

8 720*576 31.25 50.00 27.00 SDTV 576P

9 1280*720 44.96 59.94 74.18 HDTV 720P

10 1280*720 45.00 60.00 74.25 HDTV 720P

11 1280*720 37.50 50.00 74.25 HDTV 720P

12 1920*1080 28.13 50.00 74.25 HDTV 1080I

13 1920*1080 33.72 59.94 74.18 HDTV 1080I

14 1920*1080 33.75 60.00 74.25 HDTV 1080I

15 1920*1080 26.97 23.98 63.30 HDTV 1080P

16 1920*1080 27.00 24.00 63.36 HDTV 1080P

17 1920*1080 33.71 29.97 79.12 HDTV 1080P

18 1920*1080 33.75 30.00 79.20 HDTV 1080P

19 1920*1080 56.25 50.00 148.50 HDTV 1080P

20 1920*1080 67.43 59.94 148.35 HDTV 1080P

21 1920*1080 67.50 60.00 148.50 HDTV 1080P

22 3840*2160 53.95 23.98 297.00 UDTV 2160P

23 3840*2160 54.00 24.00 297.00 UDTV 2160P

24 3840*2160 56.25 25.00 297.00 UDTV 2160P

25 3840*2160 61.43 29.97 297.00 UDTV 2160P

26 3840*2160 67.50 30.00 297.00 UDTV 2160P

27 3840*2160 112.50 50.00 594.00 UDTV 2160P 8 bit / YCbCr 4:2:0

28 3840*2160 135.00 59.94 593.41 UDTV 2160P 8 bit / YCbCr 4:2:0

29 3840*2160 135.00 60.00 594.00 UDTV 2160P 8 bit / YCbCr 4:2:0

30 4096*2160 53.95 23.98 297.00 UDTV 2160P

31 4096*2160 54.00 24.00 297.00 UDTV 2160P

32 4096*2160 56.25 25.00 297.00 UDTV 2160P

33 4096*2160 61.43 29.97 297.00 UDTV 2160P

34 4096*2160 67.50 30.00 297.00 UDTV 2160P

35 4096*2160 112.50 50.00 594.00 UDTV 2160P 8 bit / YCbCr 4:2:0

36 4096*2160 135.00 59.94 593.41 UDTV 2160P 8 bit / YCbCr 4:2:0

37 4096*2160 135.00 60.00 594.00 UDTV 2160P 8 bit / YCbCr 4:2:0

- 9 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

(2) PC mode

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed Remarks

1 640*350 31.47 70.09 25.17 EGA

2 720*400 31.47 70.08 28.32 DOS

3 640*480 31.47 59.94 25.17 VESA(VGA)

4 800*600 37.88 60.32 40.00 VESA(SVGA)

5 1024*768 48.36 60.00 65.00 VESA(XGA)

6 1360*768 47.71 60.02 84.75 VESA(WXGA)

7 1152*864 54.35 60.05 80.00 VESA

8 1280*1024 63.98 60.02 109.00 SXGA

9 1920*1080 67.50 60.00 158.40 WUXGA(Reduced Blanking)

10 3840*2160 54.00 24.00 297.00 UDTV 2160P

11 3840*2160 56.25 25.00 297.00 UDTV 2160P

12 3840*2160 67.50 30.00 297.00 UDTV 2160P

13 4096*2160 53.95 23.98 297.00 UDTV 2160P

14 4096*2160 54.00 24.00 297.00 UDTV 2160P

- 10 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

6.2. HDMI Input

(1) HDMI 1.4/2.0(3D Supported mode manually)

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed 3D input proposed mode

1 720*480 31.50 60.00 27.03 SDTV 480P

2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Frame Sequential, Row Inter­leaving, Column Interleaving

2 720*576 31.25 50.00 27.00 SDTV 576P

3 1280*720

45.00 60.00 74.25 HDTV 720P

37.50 50.00 74.25 HDTV 720P

4 1920*1080

33.75 60.00 74.25 HDTV 1080I
2D to 3D, Side by Side(Half), Top & Bottom

28.13 50.00 74.25 HDTV 1080I

27.00 24.00 74.25 HDTV 1080P
2D to 3D, Side by Side(Half), Top & Bottom,

Checker Board, Row Interleaving, Column
Interleaving

28.12 25.00 74.25 HDTV 1080P

33.75 30.00 74.25 HDTV 1080P

67.50 60.00 148.50 HDTV 1080P 2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Single Frame Sequential, Row
Interleaving, Column Interleaving

56.25 50.00 148.50 HDTV 1080P

5

3840*2160
4096*2160

53.95 23.98 297.00

HDTV 2160P 2D to 3D, Top & Bottom(half), Side by Side(half),

54.00 24.00 296.70

56.25 25.00 297.00

61.43 29.97 297.00

67.50 30.00 296.70

112.50 50.00 594.00 HDTV 2160P

2D to 3D, Top & Bottom(half), Side by Side(half),
(8 bit, YCbCr 4:2:0)

135.00 60.00 594.00 HDTV 2160P

6. 3D Mode

6.1. RF Input

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed Remarks

1 1280*720 37.500 50 74.25 HDTV 720P 2D to 3D, Side by Side, Top & Bottom

2 1920*1080 28.125 50 74.25 HDTV 1080I 2D to 3D, Side by Side, Top & Bottom

- 11 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

(2) HDMI 1.4b (3D Supported mode automatically)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) VIC 3D input proposed mode Proposed

1 640*480

31.47 / 31.50 59.94/ 60.00 25.13/25.20 1

Top-and-Bottom
Side-by-side(half)

Secondary(SDTV 480P)
Secondary(SDTV 480P)

31.47 / 31.50 59.94/ 60.00 50.35/50.40 1 Side-by-side(Full) (SDTV 480P)

62.94 / 63.00 59.94/ 60.00 50.35/50.40 1

Frame packing
Line alternative

Secondary(SDTV 480P)
(SDTV 480P)

2 720*480

31.47 / 31.50 59.94 / 60.00 27.00/27.03 2,3

Top-and-Bottom
Side-by-side(half)

Secondary(SDTV 480P)
Secondary(SDTV 480P)

31.47 / 31.50 59.94 / 60.00 54.00/54.06 2,3 Side-by-side(Full) (SDTV 480P)

62.94 /63.00 59.94 / 60.00 54.00/54.06 2,3

Frame packing
Line alternative

Secondary(SDTV 480P)
(SDTV 480P)

3 720*576

31.25 50.00 27.00 17,18

Top-and-Bottom
Side-by-side(half)

Secondary(SDTV 576P)
Secondary(SDTV 576P)

31.25 50.00 54.00 17,18 Side-by-side(Full) (SDTV 576P)

62.50 50.00 54.00 17,18

Frame packing
Line alternative

Secondary(SDTV 576P)
(SDTV 576P)

15.63 50.00 27.00 21

Frame packing
Field alternative
Side-by-side(Full)
Top-and-Bottom
Side-by-side(half)

Secondary(SDTV 576I)
(SDTV 576I
(SDTV 576I
Secondary(SDTV 576I)
Secondary(SDTV 576I)

4 1280*720

37.50 50.00 74.25 19

Top-and-Bottom
Side-by-side(half)

Primary(HDTV 720P)
Primary(HDTV 720P)

37.50 50.00 148.50 19 Side-by-side(Full) (HDTV 720P)

44.96 / 45.00 59.94 / 60.00 74.17/74.25 4

Frame packing
Line alternative

Primary(HDTV 720P)
Primary(HDTV 720P)

44.96 / 45.00 59.94 / 60.00 148.35/148.50 4 Side-by-side(Full) (HDTV 720P)

75.00 50.00 148.50 19

Top-and-Bottom
Side-by-side(half)

Primary(HDTV 720P)
(HDTV 720P)

89.91/90.00 59.94 / 60.00 148.35/148.50 4

Frame packing
Line alternative

Primary(HDTV 720P)
(HDTV 720P)

5 1920*1080

28.13 50.00 74.25 20

Frame packing
Line alternative

Secondary(HDTV 1080I)
Primary(HDTV 1080I)

28.13 50.00 148.50 20 Side-by-side(Full) (HDTV 1080I)

33.72 / 33.75 59.94 / 60.00 74.17/74.25 5

Top-and-Bottom
Side-by-side(half)

Secondary(HDTV 1080I)
Primary(HDTV 1080I)

33.72 / 33.75 59.94 / 60.00 148.35/148.50 5 Side-by-side(Full) (HDTV 1080I)

56.25 50.00 148.50 20

Frame packing
Field alternative

Primary(HDTV 1080I)
(HDTV 1080I)

67.43/67.50 59.94 / 60.00 148.35/148.50 5

Frame packing
Field alternative

Primary(HDTV 1080I)
(HDTV 1080I)

26.97 / 27.00 23.97 / 24.00 74.17 / 74.25 32

Top-and-Bottom
Side-by-side(half)

Primary(HDTV 1080P)
Primary(HDTV 1080P)

26.97 / 27.00 23.97 / 24.00 148.35 / 148.50 32 Side-by-side(Full) (HDTV 1080P)

28.12 25.00 74.25 33

Top-and-Bottom
Side-by-side(half)

Secondary(HDTV 1080P)
Secondary(HDTV 1080P)

28.12 25.00 148.50 33 Side-by-side(Full) (HDTV 1080P)

33.72 / 33.75 29.98 / 30.00 74.18/74.25 34 Side-by-side(Full)

Primary(HDTV 1080P)
Secondary(HDTV 1080P)

33.72 / 33.75 29.98 / 30.00 148.35/148.50 34

Frame packing
Line alternative

(HDTV 1080P)

43.94/54.00 23.97 / 24.00 148.35/148.50 32

Frame packing
Line alternative

Primary(HDTV 1080P)
(HDTV 1080P)

56.25 25.00 148.50 33

Frame packing
Line alternative

Secondary(HDTV 1080P)
(HDTV 1080P)

67.43 / 67.5 29.98 / 30.00 148.35/148.50 34

Frame packing
Line alternative

Primary(HDTV 1080P)
(HDTV 1080P)

56.25 50.00 148.50 31

Top-and-Bottom
Side-by-side(half)

Primary(HDTV 1080P)
Secondary(HDTV 1080P)

67.43 / 67.50 59.94 / 60.00 148.35/148.50 16

Top-and-Bottom
Side-by-side(half)

Primary(HDTV 1080P)
Secondary(HDTV 1080P)

- 12 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

(3) HDMI-PC Input (3D) (3D Supported mode manually)

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1024*768 48.36 60.00 65.00 HDTV 768P 2D to 3D, Side by Side(half), Top & Bottom

2 1920*1080 67.500 60 148.50 HDTV 1080P

2D to 3D, Side by Side(half), Top & Bottom,
Checker Board, Single Frame Sequential,
Row Interleaving, Column Interleaving

3 3840*2160

54.00 24.00 296.70

HDTV 2160P

2D to 3D, Top & Bottom(half), Side by
Side(half),

56.25 25.00 297.00

67.50 30.00 296.70

4 4096*2160 54 24.00 297.00 HDTV 2160P

2D to 3D,
Top & Bottom(half), Side by Side(half),

5 Others - - -

640*350
720*400
640*480
800*600
1152*864

2D to 3D, Side by Side(half), Top & Bottom

(4) Component Input (3D) (3D Supported mode manually)

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1280*720 37.50 50.00 74.25 HDTV 720P 2D to 3D, Side by Side(half), Top & Bottom

2 1280*720 45.00 60.00 74.25 HDTV 720P 2D to 3D, Side by Side(half), Top & Bottom

3 1280*720 44.96 59.94 74.18 HDTV 720P 2D to 3D, Side by Side(half), Top & Bottom

4 1920*1080 33.75 60.00 74.25 HDTV 1080I 2D to 3D, Side by Side(half), Top & Bottom

5 1920*1080 33.72 59.94 74.18 HDTV 1080I 2D to 3D, Side by Side(half), Top & Bottom

6 1920*1080 28.12 50.00 74.25 HDTV 1080I 2D to 3D, Side by Side(half), Top & Bottom

7 1920*1080 67.50 60.00 148.50 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

8 1920*1080 67.43 59.94 148.35 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

9 1920*1080 27.00 24.00 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

10 1920*1080 28.12 25.00 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

11 1920*1080 56.25 50.00 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

12 1920*1080 26.97 23.98 74.18 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

13 1920*1080 33.75 30.00 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

14 1920*1080 33.71 29.97 74.18 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

- 13 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode

1 Under 704x480 - - - 2D to 3D

2

Over 704x480
Under 1080P
interlaced

- - - 2D to 3D, Side by Side(Half), Top & Bottom

3

Over 704x480
Under 1080P
progressive

- 50 / 60 -

2D to 3D, Side by Side(Half), Top & Bottom, Checker
Board, Row Interleaving, Column Interleaving, Frame
Sequential

- others -

2D to 3D, Side by Side(Half), Top & Bottom, Checker
Board, Row Interleaving, Column Interleaving

4 Over 2160P - 24/25/30 - 2D to 3D, Side by Side(Half), Top & Bottom

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode

1 1024*768p - 30/60 -

2D to 3D, Side by Side(Half), Top & Bottom2 1280*720p - 30/60 -

3 1920*1080p - 30/60 -

4 Others - - - 2D to 3D

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode

1 Under 320x240 - - - 2D to 3D

2 Over 320x240 - - - 2D to 3D, Side by Side(Half), Top & Bottom

6.3. USB - Movie (3D) (3D supported mode manually)

6.6. Miracast, Widi (3D supported mode manually)

6.5. USB, DLNA (3D) (3D supported mode automatically)

6.4. USB, DLNA - Photo (3D) (3D supported mode manually)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode

1 1080p 33.75 30.00 74.25

Side by Side(Half), Top & Bottom, Checker Board
MPO(Photo), JPS(Photo)

2 2160p 67.50 30.00 297.00

■ Remark: 3D Input mode

No. Side by Side Top & Bottom Checker board

Single Frame

Sequential

Frame Packing

Line

Interleaving

Column

Interleaving

1

R

L

R

L

- 14 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

ADJUSTMENT INSTRUCTION

1. Application Range

This specification sheet is applied to all of the LED TV with
LB48V chassis.

2. Designation

(1) Because this is not a hot chassis, it is not necessary to

use an isolation transformer. However, the use of isolation

transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of

25 °C ± 5 °C of temperature and 65 % ± 10 % of relative

humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240

V~, 50/60 Hz.
(5) The receiver must be operated for about 5 minutes prior to

the adjustment when module is in the circumstance of over

15.

In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours.

In case of keeping module is in the circumstance of below

-20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.

[Caution]
When still image is displayed for a period of 20 minutes or
longer (Especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.

3. Automatic Adjustment

3.1. MAC address D/L, CI+ key D/L, Widevine
key D/L, ESN D/L, HDCP20 D/L

Connect: USB port
Communication Prot connection

▪ Com 1,2,3,4 and 115200(Baudrate)

Mode check: Online Only

▪ Check the test process

: DETECT → ESN → Widevine → CI → HDCP20

* DTCP key is downloaded only for EU suffix models, for

example, 47LA660S-ZA.KEUYLJG

▪ Play: Press Enter key
▪ Result: Ready, Test, OK or NG
▪ Printer Out (MAC Address Label)

3.2. LAN Inspection

3.2.1. Equipment & Condition

▪ Each other connection to LAN Port of IP Hub and Jig

3.2.2. LAN inspection solution

▪ LAN Port connection with PCB
▪ Network setting at MENU Mode of TV
▪ Setting automatic IP
▪ Setting state confirmation

- If automatic setting is finished, you confirm IP and MAC
Address.

3.2.3. WIDEVINE key Inspection

- Confirm key input data at the "IN START" MENU Mode.



- 15 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

3.3. LAN PORT INSPECTION(PING TEST)

Connect SET → LAN port == PC → LAN Port

3.3.1. Equipment setting

(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.

*IP Number : 12.12.2.2

3.3.2. LAN PORT inspection(PING TEST)

(1) Play the LAN Port Test Program.
(2) Connect each other LAN Port Jack.
(3) Play Test (F9) button and confirm OK Message.
(4) Remove LAN cable.

3.4. Model name & Serial number Download

3.4.1. Model name & Serial number D/L

▪ Press "P-ONLY" key of service remote control.

(Baud rate : 115200 bps)

▪ Connect RS-232C Signal to USB Cable to USB.
▪ Write Serial number by use USB port.
▪ Must check the serial number at Instart menu.

3.4.2. Method & notice

(1) Serial number D/L is using of scan equipment.
(2) Setting of scan equipment operated by Manufacturing

Technology Group.

(3) Serial number D/L must be conformed when it is produced

in production line, because serial number D/L is mandatory
by D-book 4.0.

* Manual Download (Model Name and Serial Number)

If the TV set is downloaded by OTA or service man, sometimes
model name or serial number is initialized.(Not always)
It is impossible to download by bar code scan, so It need
Manual download.

1) Press the "Instart" key of Adjustment remote control.

2) Go to the menu "7.Model Number D/L" like below photo.

3) Input the Factory model name(ex 47LB650V-ZA) or Serial
number like photo.

4) Check the model name Instart menu. → Factory name

displayed. (ex 47LB650V-ZA)

5) Check the Diagnostics.(DTV country only) → Buyer

model displayed. (ex 47LB650V-ZA)

3.5. CI+ Key checking method

- Check the Section 3.1
Check whether the key was downloaded or not at ‘In Start’
menu. (Refer to below).

=> Check the Download to CI+ Key value in LGset.

3.5.1. Check the method of CI+ Key value

(1) Check the method on Instart menu
(2) Check the method of RS232C Command

1) Into the main ass’y mode(RS232: aa 00 00)

2) Check the key download for transmitted command
(RS232: ci 00 10)

3) Result value

- Normally status for download : OKx

- Abnormally status for download : NGx

3.5.2. Check the method of CI+ key value(RS232)

1) Into the main ass’y mode(RS232: aa 00 00)

2) Check the mothed of CI+ key by command
(RS232: ci 00 20)

3) Result value
i 01 OK 1d1852d21c1ed5dcx

3.6. WIFI MAC ADDRESS CHECK

(1) Using RS232 Command

(2) Check the menu on in-start

SET PC

CMD 1 CMD 2 Data 0

A A 0 0

CMD 1 CMD 2 Data 0

C I 1 0

CMD 1 CMD 2 Data 0

A A 0 0

CMD 1 CMD 2 Data 0

C I 2 0

CI+ Key Value

H-freq(kHz) V-freq.(Hz)

Transmission [A][I][][Set ID][][20][Cr] [O][K][X] or [NG]

- 16 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

4. Manual Adjustment

4.1. EDID(The Extended Display Identification
Data)/DDC(Display Data Channel) download

4.1.1. Overview

It is a VESA regulation. A PC or a MNT will display an optimal
resolution through information sharing without any necessity
of user input. It is a realization of "Plug and Play".

4.1.2. Equipment

- Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.

- Adjustment remote control

4.1.3. Download method

(1) Press "ADJ" key on the Adjustment remote control, then

select "12.EDID D/L", By pressing "Enter" key, enter EDID
D/L menu.

(2) Select "Start" button by pressing "Enter" key, HDMI1/

HDMI2/ HDMI3/ HDMI4 are writing and display OK or NG.

4.1.4. EDID DATA

▪ Reference

- HDMI1 ~ HDMI3

- In the data of EDID, bellows may be different by Input mode.

ⓐ Product ID
ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line:

ex) Monthly : ‘01’ → ‘01’, Year : ‘2014’ → ‘18’

ⓓ Model Name(Hex): LGTV
ⓔ Checksum(LG TV): Changeable by total EDID data.
ⓕ Vendor Specific(HDMI)

(1) EDID for Non 3D Model

# HDMI 1(C/S: E7 2D)
EDID Block 0, Bytes 0-127 [00H-7FH]

EDID Block 1, Bytes 128-255 [80H-FFH]

# HDMI2 (C/S: E7 1D)
EDID Block 0, Bytes 0-127 [00H-7FH]

EDID Block 1, Bytes 128-255 [80H-FFH]

# HDMI3 (C/S: E7 0D)
EDID Block 0, Bytes 0-127 [00H-7FH]

For HDMI EDID

DVI-D to HDMI or HDMI to HDMI

0 1 2 3 4 5 6 7 8 9 A B C D E F

0x00 00 FF FF FF FF FF FF 00 1E 6D

ⓐ ⓑ

0x01

ⓒ

01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
0x02 0F 50 54 A1 8 00 31 40 45 40 61 40 71 40 81 80
0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
0x04 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
0x05 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20

ⓓ

0x07

ⓓ

01

ⓔ1

0x00 02 03 3A F1 4E 10 9F 04 13 05 14 03 02 12 20 21
0x01 22 15 01 29 3D 06 C0 15 07 50

ⓕ

0x02

ⓕ

0x03

ⓕ

10 28 10 E3 05 03 01 02 3A 80 18 71 38
0x04 2D 40 58 2C 45 00 40 84 63 00 00 1E 01 1D 80 18
0x05 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D
0x06 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E
0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

ⓔ2

0 1 2 3 4 5 6 7 8 9 A B C D E F

0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E7

0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E7

0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 3C F1 54 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50

A0 09 57 07 6E 03 0C 00 10 00 B8 3C 20 00 80 01 02
B0 03 04 E3 05 03 01 E5 0E 60 61 65 66 01 1D 80 18
C0 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D
D0 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E
E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2D

0 1 2 3 4 5 6 7 8 9 A B C D E F

80 02 03 3C F1 54 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50
A0 09 57 07 6E 03 0C 00 20 00 B8 3C 20 00 80 01 02
B0 03 04 E3 05 03 01 E5 0E 60 61 65 66 01 1D 80 18
C0 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D
D0 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E
E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1D

0 1 2 3 4 5 6 7 8 9 A B C D E F

80 02 03 3C F1 54 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50
A0 09 57 07 6E 03 0C 00 20 00 B8 3C 20 00 80 01 02
B0 03 04 E3 05 03 01 E5 0E 60 61 65 66 01 1D 80 18
C0 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D
D0 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E
E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1D

- 17 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

EDID Block 1, Bytes 128-255 [80H-FFH]

* Checksum(HDMI1/2/3)

4.2. White Balance Adjustment

4.2.1. Overview

▪ W/B adj. Objective & How-it-works

(1) Objective: To reduce each Panel's W/B deviation
(2) How-it-works : When R/G/B gain in the OSD is at 192, it

means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one
of R/G/B is fixed at 192, and the other two is lowered to
find the desired value.

(3) Adjustment condition : normal temperature

1) Surrounding Temperature : 25 °C ± 5 °C

2) Warm-up time: About 5 Min

3) Surrounding Humidity : 20 % ~ 80 %

4.2.2. Equipment

(1) Color Analyzer: CA-210 (LED Module : CH 14)
(2) Adjustment Computer(During auto adj., RS-232C protocol

is needed)
(3) Adjustment Remote control
(4) Video Signal Generator MSPG-925F 720p/216-Gray

(Model: 204, Pattern: 49)

→ Only when internal pattern is not available

• Color Analyzer Matrix should be calibrated using CS-100.

4.2.3. Equipment connection MAP

4.2.4. Adj. Command (Protocol)

<Command Format>

- LEN: Number of Data Byte to be sent

- CMD: Command

- VAL: FOS Data value

- CS: Checksum of sent data

- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]

▪ RS-232C Command used during auto-adjustment.

Ex) wb 00 00 -> Begin white balance auto-adj.

wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data

jb 00 c0
...
...

wb 00 1f -> Gain adj. completed
*(wb 00 20(Start), wb 00 2f(end)) -> Off-set adj.
wb 00 ff -> End white balance auto-adj.

▪ Adj. Map

Input FFh (Checksum)

HDMI1 E7 2D

HDMI2 E7 1D

HDMI3 E7 0D

0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 3C F1 54 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50
A0 09 57 07 6E 03 0C 00 30 00 B8 3C 20 00 80 01 02
B0 03 04 E3 05 03 01 E5 0E 60 61 65 66 01 1D 80 18
C0 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D
D0 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E
E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0D

START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS STOP

RS-232C COMMAND

[CMD ID DATA]

Explanation

wb 00 00 Begin White Balance adjustment

wb 00 10 Gain adjustment(internal white pattern)

wb 00 1f Gain adjustment completed

wb 00 20 Offset adjustment(internal white pattern)

wb 00 2f Offset adjustment completed

wb 00 ff

End White Balance adjustment
(internal pattern disappears)

Co lor Anal yze r

Co mp ute r

Pattern Gen era to r

RS -232 C

RS- 232 C

RS- 232 C

Pro be

Sig nal Sou rce

* If TV internal pattern is used, not needed

Adj. item

Command

(lower case ASCII)

Data Range

(Hex.)

Default

(Decimal)

CMD1 CMD2 MIN MAX

Cool

R Gain j g 00 C0

G Gain j h 00 C0

B Gain j i 00 C0

R Cut

G Cut

B Cut

Medium

R Gain j a 00 C0

G Gain j b 00 C0

B Gain j c 00 C0

R Cut

G Cut

B Cut

Warm

R Gain j d 00 C0

G Gain j e 00 C0

B Gain j f 00 C0

R Cut

G Cut

- 18 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

4.2.5. Adj. method

(1) Auto adj. method

1) Set TV in adj. mode using POWER ON key.

2) Zero calibrate probe then place it on the center of the
Display.

3) Connect Cable.(RS-232C to USB)

4) Select mode in adj. Program and begin adj.

5) When adj. is complete (OK Sign), check adj. status pre
mode. (Warm, Medium, Cool)

6) Remove probe and RS-232C cable to complete adj.

▪ W/B Adj. must begin as start command “wb 00 00” , and

finish as end command “wb 00 ff”, and Adj. offset if need.

(2) Manual adjustment. method

1) Set TV in Adj. mode using POWER ON.

2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10 cm of the surface.

3) Press ADJ key → EZ adjust using adj. R/C → 7. White­Balance then press the cursor to the right(key ►).

(When right key(►) is pressed 216 Gray internal pattern

will be displayed)

4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.

5) Adjustment is performed in COOL, MEDIUM, WARM 3
modes of color temperature.

** G-fix adjustment
Adjust modes (Cool), Fix the G gain to 172 (default data)
and change the others (G/B Gain).
Adjust two modes(Medium / Warm), Fix the one of R/G/B
gain to 192 (default data) and decrease the others.

▪ If internal pattern is not available, use RF input. In EZ Adj.

menu 7.White Balance, you can select one of 2 Test­pattern: ON, OFF. Default is inner(ON). By selecting OFF,
you can adjust using RF signal in 216 Gray pattern.

▪ Adjustment condition and cautionary items

1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.

2) Probe location
: Color Analyzer(CA-210) probe should be within 10 cm

and perpendicular of the module surface (80° ~ 100°)

3) Aging time

- After Aging Start, Keep the Power ON status during 5

Minutes.

- In case of LCD, Back-light on should be checked

using no signal or Full-white pattern.

4.2.6. Reference (White balance Adj. coordinate and
color temperature)

▪ Luminance : 206 Gray
▪ Standard color coordinate and temperature using CS-1000

(over 26 inch)

▪

Standard color coordinate and temperature using CA-210(CH 14)

4.2.7. EDGE & IOL LED White balance table

▪ Edge&ALEF LED module change color coordinate because

of aging time.

▪ Apply under the color coordinate table, for compensated

aging time.

▪ (Normal line) Edge & ALEF LED White balance table

- gumi(Mar. ~ Dec.) & Global
Model : (normal line) LGD, CMI

- gumi Winter table(Jan., Fab.)- Gumi producing model use only
Model : (normal line) LGD, CMI

Mode

Coordinate

Temp ∆uv

x y

Cool 0.271 0.270 13000 K 0.0000

Medium 0.286 0.289 9300 K 0.0000

Warm 0.313 0.329 6500 K 0.0000

Mode

Coordinate

Temp ∆uv

x y

Cool 0.271 ± 0.002 0.270 ± 0.002 13000 K 0.0000

Medium 0.286 ± 0.003 0.289 ± 0.003 9300 K 0.0000

Warm 0.313 ± 0.002 0.329 ± 0.002 6500 K 0.0000

NC

4.0

Aging

time

(Min)

Cool Medium Warm

x y x y x y

271 270 286 289 313 329
1 0-2 282 289 297 308 324 348
2 3-5 281 287 296 306 323 346
3 6-9 279 284 294 303 321 343
4 10-19 277 280 292 299 319 339
5 20-35 275 277 290 296 317 336
6 36-49 274 274 289 293 316 333
7 50-79 273 272 288 291 315 331
8 80-119 272 271 287 290 314 330
9 Over 120 271 270 286 289 313 329

NC

4.0

Agingtime

(Min)

Cool Medium Warm

x y x y x y

271 270 286 289 313 329
1 0-2 283 292 297 315 322 347
2 3-5 282 290 296 313 321 345
3 6-9 280 288 294 311 319 343
4 10-19 277 284 291 307 316 339
5 20-35 275 279 289 302 314 334
6 36-49 274 275 288 298 313 330
7 50-79 273 272 287 295 312 327
8 80-119 272 271 286 294 311 326
9 Over 120 271 270 286 289 313 329

- 19 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

▪ (Aging Chamber) Edge & ALEF

Model : (aging chamber)LGD, CMI

4.3. Local Dimming Function Check

(1) Turn on TV.
(2) At the Local Dimming mode, module Edge Backlight

moving right to left Back light of IOP module moving.
(3) Confirm the Local Dimming mode.
(4) Press “exit” Key.

4.4. Magic Motion Remote control test

- Eq uipment : RF Remote cont rol for test, IR-KEY-Code

Remote control for test

- You must confirm the battery power of RF-Remote control

before test(recommend that change the battery per every lot)

- Sequence (test)

1) If you select the ‘start key(OK)’ on the Adjustment remote
control, you can pairing with the TV SET.

2) You can check the cursor on the TV Screen, when select
the "OK" key on the Adjustment remote control.

3) You must remove the pairing with the TV Set by select
‘Mute + OK Key’ on the Adjustment remote control.

4.5. 3D function test

(Pattern Generator MSHG-600, MSPG-6100[Support HDMI1.4])
* HDMI mode NO. 872 , pattern No.83
(1) Please input 3D test pattern like below.

(2) When 3D OSD appear automatically, then select green key.

(3) Don't wear a 3D Glasses, Check the picture like below.

4.6. Option selection per country

4.6.1. Overview

- Option selection is only done for models in AJ/JA/IL

4.6.2.Method

(1) Press "ADJ" key on the Adjustment remote control, then

select Country Group Menu.

(2) Depending on destination, select Country Group Code or

Country Group then on the lower Country option, select

US, CA, MX. Selection is done using +, - or ►◄ KEY.

NC

4.0

Aging

time

(Min)

Cool Medium Warm

x y x y x y

271 270 285 293 313 329
1 0-5 280 285 294 308 319 340
2 6-10 276 280 290 303 315 335
3 11-20 272 275 286 298 311 330
4 21-30 269 272 283 295 308 327
5 31-40 267 268 281 291 306 323
6 41-50 266 265 280 288 305 320
7 51-80 265 263 279 286 304 318
8 81-119 264 261 278 284 303 316
9 Over 120 264 260 278 283 303 315

- 20 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

4.7. HDMI ARC Function Inspection

(1) Test equipment

- Optic Receiver Speaker

- MSHG-600 (SW: 1220 ↑)

- HDMI Cable (for 1.4 version)

(2) Test method

1) Insert the HDMI Cable to the HDMI ARC port from the
master equipment. (HDMI 1)

2) Check the sound from the TV Set.

3) Check the Sound from the Speaker or using AV & Optic
TEST program (It’s connected to MSHG-600)

4.8. Tool Option selection

- Method : Press "ADJ" key on the Adjustment remote control,
then select Tool option.

4.9. Ship-out mode check (In-stop)

- After final inspection, press In-Stop key of the Adjustment

remote control and check that the unit goes to Stand-by
mode.

5. GND and Internal Pressure check

5.1. Method

(1) GND & Internal Pressure auto-check preparation

- Check that Power Cord is fully inserted to the SET. (If
loose, re-insert)

(2) Perform GND & Internal Pressure auto-check

- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.

- Connect D-terminal to AV JACK TESTER

- Auto CONTROLLER(GWS103-4) ON

- Perform GND TEST

- If NG, Buzzer will sound to inform the operator.

- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX.)

- Perform I/P test

- If NG, Buzzer will sound to inform the operator.

- If OK, Good lamp will lit up and the stopper will allow the pallet
to move on to next process.

5.2. Checkpoint

▪ TEST voltage

- GND: 1.5 KV / min at 100 mA

- SIGNAL: 3 KV / min at 100 mA

▪ TEST time: 1 second
▪ TEST POINT

- GND TEST = POWER CORD GND & SIGNAL CABLE

METAL GND

- Internal Pressure TEST = POWER CORD GND & LIVE &

NEUTRAL

▪ LEAKAGE CURRENT: At 0.5 mArms

6. Audio

Measurement condition:
(1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
(2) CVBS, Component: 1 KHz sine wave signal 0.5 Vrms

No. Item Min Typ Max Unit

1

Audio practical max
Output, L/R (Distor-

tion=10% max Output)

10 12 W

EQ Off

AVL Off

Clear Voice Off

8.10 10.8 Vrms

2

Speaker

(8 Ω Impedance)

10 12 W

EQ On

AVL On

Clear Voice On

- 21 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

7.

USB S/W Download(Service only)

(1) Put the USB Stick to the USB socket.
(2) Automatically detecting update file in USB Stick.

- If your downloaded program version in USB Stick is Low,
it didn't work. But your downloaded version is High, USB
data is automatically detecting.(Download Version High &
Power only mode, Set is automatically Download)

(3) Show the message "Copying files from memory".

(4) Updating is starting.
(5) Updating Completed, The TV will restart automatically.

(6) If your TV is turned on, check your updated version and

Tool option. (explain the Tool option, next stage)

* If downloading version is more high than your TV have,

TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn't
have a DTV/ATV test on production line.

* After downloading, have to adjust TOOL OPTION again.

1) Push "IN-START" key in service remote control.

2) Select "Tool Option 1" and push "OK" key.

3) Punch in the number. (Each model has their number.)

- 22 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

Only for training and service purposes

MAIN Audio AMP

(NTP7514)

Mstar LM14

CI Slot

P_TS

P_TS

T/C Demod

IF (+/-)

USB1

OPTIC

LAN

DDR3 1866 X 16

(512MB X 2EA)

HDMI1 ( HDCP2.2)

HDMI2 ( ARC)

HDMI3 ( MHL)

Analog Demod

SYSTEM EEPROM

(256Kb)

HDMI

MUX

Air/

Cable

TUNER

(

T2/C/A

)

TUNER

(S2)

DVB-S

DEMOD

(S2)

LNB

USB2

USB3

(2.0)

Video 4K@30p/2K@60p(Vx1 4 lane),

OSD FHD@60p(Vx1 2 lane)

eMMC

(4GB)

Sub Micom

(RENESAS

R5F100GEAFB)

DDR3 1866 X 16

(512MB X 2EA)

P_TS

X_TAL

24MHz

T2/C/S2 W/O AD

A B

X_TAL

32.768KHz

I2S Out

I2C 4

Vx1

USB

P_TS

I2C 1

H/P

AV/COMP

SCART

(IN/OUT)

OCP

2A

OCP

1.5A

(HDD)

REA

R

(H)

CVBS/YPbPr

CVBS/RGB

SPDIF OUT

ETHERNET

I2C 0

IR / KEY

WIFI/BT Combo

LOGO LIGHT( Ready)

SUB

ASSY

IR/KEY

USB_WIFI

CVBS

X_TAL

27MHz

HDCP2.2

R9531AN

Serial

Flash(4MB)

Sil9617

LGE7411

Mux

LGE7411

BLOCK DIAGRAM

- 23 -

LGE Internal Use Only

Copyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes

900

200

400

410

540

521

522

530

820

501

504

500

503

502

570

120

200T

121

LV1

A10

A22

Stand screw

Option

A2

EXPLODED VIEW

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

IMPORTANT SAFETY NOTICE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EB_DATA[3]

EB_DATA[1]

EB_DATA[5]

EB_DATA[7]

EB_DATA[4]

EB_DATA[2]

EB_DATA[0]

EB_DATA[6]

EB_ADDR[10]

EB_ADDR[7]
EB_ADDR[8]

EB_ADDR[12]

EB_ADDR[13]
EB_ADDR[14]

EB_ADDR[9]

EB_ADDR[11]

EB_ADDR[4]

EB_ADDR[2]

EB_ADDR[5]

EB_ADDR[1]

EB_ADDR[0]

EB_ADDR[3]

EB_ADDR[6]

EMMC_DATA[0]

EMMC_DATA[1]

EMMC_DATA[6]

EMMC_DATA[4]

EMMC_DATA[7]

EMMC_DATA[3]

EMMC_DATA[2]

EMMC_DATA[5]

FE_DEMOD1_TS_DATA[1]

FE_DEMOD1_TS_DATA[6]

FE_DEMOD1_TS_DATA[3]

FE_DEMOD1_TS_DATA[5]

FE_DEMOD1_TS_DATA[7]

FE_DEMOD1_TS_DATA[4]

FE_DEMOD1_TS_DATA[0]

FE_DEMOD1_TS_DATA[2]

TPI_DATA[3]
TPI_DATA[4]

TPI_DATA[2]

TPI_DATA[0]

TPI_DATA[6]

TPI_DATA[5]

TPI_DATA[7]

TPI_DATA[1]

I2C_SCL_MICOM_SOC

I2C_SDA_MICOM_SOC

I2C_SDA1

+3.3V_NORMAL

I2C_SDA5

I2C_SDA1

I2C_SDA4

I2C_SCL5

I2C_SCL1

I2C_SCL4

R113 33

I2C_SCL1

C103

0.1uF

R114 33

R138

33

R13733

I2C_SCL_MICOM

I2C_SCL_MICOM_SOC

I2C_SDA_MICOM_SOCI2C_SDA_MICOM

TMS0

TDO0

+3.3V_NORMAL

TCK0

TDI0

C102

0.1uF
JTAG

SOC_RESET

TRST_N0

P100

12505WS-10A00

JTAG

1

2

3

4

5

6

7

8

9

10

11

R127

1.8K

R133

1.8K

R134

1.8K

R135

1.8K

R136

1.8K

R130

1.8K

R128

1.8K

R129

1.8K

DDCA_DA

DDCA_CK

EB_DATA[0-7]

EB_ADDR[0-14]

EB_BE_N0

EB_BE_N1

CAM_IREQ_N

EB_OE_N

CAM_WAIT_N

PCM_RESET
CAM_REG_N

EB_WE_N

CAM_CD1_N

/PCM_CE1

EMMC_RST
EMMC_CMD
EMMC_CLK

EMMC_DATA[0-7]

C118 0.1uF

IF_N

C119 0.1uF

IF_P

C122

OPT

C126
33pF

OPT

C123
33pF

OPT

R145 47

C124
1000pF
OPT

C121 0.1uF

R144 47

TU_SIF

C120 0.1uF

R146
300
OPT

R142
10K

C127

0.047uF
25V

L100

BLM18PG121SN1D

+3.3V_NORMAL

IF_AGC

C125

0.1uF

SOC_TX
SOC_RX

DDCA_DA

DDCA_CK

I2C_SCL_MICOM_SOC
I2C_SDA_MICOM_SOC

I2C_SCL1
I2C_SDA1
I2C_SCL4
I2C_SDA4
I2C_SCL5
I2C_SDA5
I2C_SCL2
I2C_SDA2

/TU_RESET1
/TU_RESET2

R107

10K

BIT1_0

R103 10K

BIT0_0

BIT0

R108

10K

BIT1_1

R124 10K

BIT8_1

BIT7

R104 10K

BIT0_1

+3.3V_NORMAL

BIT1

R110 10K

BIT2_1

R121 10K

BIT7_0

R115 10K

BIT4_0

R123 10K

BIT8_0

R111 10K

BIT3_0

BIT4

BIT6

BIT5

BIT8

BIT2

R119 10K

BIT6_0

R112 10K

BIT3_1

R116 10K

BIT4_1

R120 10K

BIT6_1

BIT3

R109 10K

BIT2_0

R118 10K

BIT5_1

R122 10K

BIT7_1

R117 10K

BIT5_0

SC_DET

AV1_CVBS_DET
HP_DET

COMP1_DET

L_DIM_EN

TRST_N0

TDI0
TDO0

TMS0

TCK0

TCON_I2C_EN
5V_DET_HDMI_1
5V_DET_HDMI_2

5V_DET_HDMI_3

FE_DEMOD1_TS_CLK

FE_DEMOD1_TS_DATA[0-7]

FE_DEMOD1_TS_SYNC

FE_DEMOD1_TS_VAL

TPI_SOP

TPI_CLK
TPI_VAL

TPI_DATA[0-7]

USB_CTL3

/USB_OCD3

USB_CTL2

/USB_OCD2

R148

1.8K

+3.3V_TUNER

R147

1.8K

+3.3V_LNA_TU

+3.3V_NORMAL

I2C_SDA2
I2C_SCL2

IC102

AT24C256C-SSHL-T

EAN61133501

3

A2

2

A1

4

GND

1

A0

5

SDA

6

SCL

7

WP

8

VCC

BIT0

BIT3

BIT1
BIT2

BIT4

BIT7

BIT5
BIT6

BIT8

/TU_RESET1

+3.3V_NORMAL

R159 10K

R160 10K

/TU_RESET2

TCON_I2C_EN

/USB_OCD2

USB_CTL2

USB_CTL3

/USB_OCD3

M_RFModule_RESET

R154 10K

OPT

R153 10K

R151 10K

R152 10K

R149 10K

R150 10K

P101

12505WS-04A00

MSTAR_DEBUG_OLD

1

2

3

4

5

R140 100

R141 100

LED1
SPI_DI

PWM_PM

LED0

R165 4.7K

OPT

R163 4.7K

R161 4.7K

OPT

R157 4.7K

R166 4.7K

R158 4.7K

OPT

R164 4.7K

OPT

R162 4.7K

+3.3V_NORMAL

PWM_PM

USB_CTL1

/USB_OCD1

I2C_SDA6

I2C_SCL6

R1001KR102

1K

JTAG

R105

1K

JTAG

R106

1K

JTAG

R101

1K

JTAG

SPI_DI

VID0

RF_SWITCH_CTL

AMP_RESET_N

LED0
LED1

AMP_RESET_N

RF_SWITCH_CTL

R170 10K

R169 10K

PWM_DIM2

PCM_5V_CTL

R171 10K

OPT

PCM_5V_CTL

P102

12507WS-04L

UART_4PIN_WAFER

1

2

3

4

5

SOC_RX

SOC_TX

+3.5V_ST

I2C_SDA6
I2C_SCL6

R131

1.8K

R132

1.8K

R9531_RESET

R9531_FLASH_WP

PWM_DIM

CVBS_OUT_SEL

IC100

LGE4331

PWM0/GPIO150

F10

PWM1/GPIO151

F9

PWM2/GPIO152

E11

PWM3/GPIO153

F12

PWM_PM/GPIO7

E9

SAR0/GPIO43

H6

SAR1/GPIO44

G5

SAR2/GPIO45

G4

SAR3/GPIO46

B3

SAR5

G6

SPI_CK/GPIO1

A5

SPI_DI/GPIO2

C5

SPI_DO/GPIO3

A4

SPI_CZ0/GPIO0

B5

SPI_CZ1/GPIO_PM6/GPIO16

B6

SPI_CZ2/GPIO_PM10/GPIO20

C6

DDCA_CK/UART0_RX/GPIO8

H4

DDCA_DA/UART0_TX/GPIO9

H5

TX1/GPIO60

E6

RX1/GPIO61

D6

TX2/GPIO62

F7

RX2/GPIO63

E7

TX3/GPIO64

D7

RX3/GPIO65

E8

TX4/GPIO69

D9

RX4/GPIO70

F8

TX5/GPIO87

T6

RX5/GPIO88

T5

GPIO66

B4

GPIO67

A3

TCON0/GPIO155

AG29

TCON1/GPIO156

AH29

TCON2/GPIO157

AJ29

TCON3/GPIO158

AG28

TCON4/GPIO159

AH28

SPI1_CK/GPIO104

AJ28

VSYNC_LIKE/GPIO103

AH27

SPI1_DI/GPIO105

AJ27

GPIO81/SCK0

U4

GPIO82/SDA0

U5

DDCR_CK/GPIO52

A10

DDCR_DA/GPIO51

C10

GPIO83/SCK4

V6

GPIO84/SDA4

V5

GPIO85/SCK5

U6

GPIO86/SDA5

T4

GPIO89/SCK2

W5

GPIO90/SDA2

W6

VID0/GPIO48

E12

VID1/GPIO49

D12

LED0/GPIO29

E13

LED1/GPIO30

F13

WOL/GPIO50

F11

B0M

AE32

B0P

AF30

B1M

AF32

B1P

AF31

B2M/VBY7N

AG32

B2P/VBY7P

AG31

BCKM/VBY6P

AG30

BCKP/VBY6P

AH31

B3M/VBY5P

AJ31

B3P/VBY5P

AJ32

B4M/VBY4N

AJ30

B4P/VBY4P

AK32

A0M/VBY3N

AK31

A0P/VBY3P

AK30

A1M/VBY2N

AL31

A1P/VBY2P

AL30

A2M/VBY1N

AM30

A2P/VBY1P

AL29

ACKM/VBY0N

AM29

ACKP/VBY0P

AK28

A3M/LOCKN

AM28

A3P/HTTPDN

AL28

A4M

AK27

A4P

AL27

EJ_RSTZ/GPIO53

F5

EJ_TRSTZ/GPIO54

F4

EJ_TCK/GPIO55

D5

EJ_TMS/GPIO56

F6

EJ_TDI/GPIO57

D4

EJ_TDO/GPIO58

E5

EJ_DINT/GPIO59

E4

PCM2_CEN/GPIO112

AG22

PCM2_IRQA/GPIO113

AH22

PCM2_WAIT/GPIO114

AG23

PCM2_RESET/GPIO115

AH23

GPIO_PM0/GPIO10

J5

GPIO_PM2/GPIO12

R6

GPIO_PM3/GPIO13

P4

GPIO_PM4/GPIO14

N6

GPIO_PM7/GPIO17

N5

GPIO_PM8/GPIO18

J6

GPIO_PM9/GPIO19

K4

GPIO_PM13/GPIO23

L5

GPIO_PM17/GPIO27

L6

GPIO_PM18/GPIO28

L4

GPIO_PM1/GPIO11

P5

GPIO_PM5/GPIO15

P6

GPIO_PM11/GPIO21

K6

GPIO_PM12/GPIO22

K5

AV_LINK

R5

TEST

G7

IC100

LGE4331

PCMDATA[0]/GPIO145

AL21

PCMDATA[1]/GPIO146

AK22

PCMDATA[2]/GPIO147

AK21

PCMDATA[3]/GPIO117

AH11

PCMDATA[4]/GPIO118

AH10

PCMDATA[5]/GPIO119

AG13

PCMDATA[6]/GPIO120

AJ9

PCMDATA[7]/GPIO121

AJ12

PCMADR[0]/GPIO144

AM23

PCMADR[1]/GPIO143

AK17

PCMADR[2]/GPIO141

AM20

PCMADR[3]/GPIO140

AL20

PCMADR[4]/GPIO139

AK19

PCMADR[5]/GPIO137

AM19

PCMADR[6]/GPIO136

AL22

PCMADR[7]/GPIO135

AM17

PCMADR[8]/GPIO129

AL15

PCMADR[9]/GPIO127

AK15

PCMADR[10]/GPIO123

AG11

PCMADR[11]/GPIO125

AG12

PCMADR[12]/GPIO134

AM22

PCMADR[13]/GPIO130

AL16

PCMADR[14]/GPIO131

AM16

PCMIRQA/GPIO133

AL17

PCMOEN/GPIO124

AG10

PCMIORD/GPIO126

AJ14

PCMCEN/GPIO122

AK18

PCMWEN/GPIO132

AK16

PCMCD/GPIO149

AH12

PCMRST/GPIO148

AL18

PCMREG/GPIO142

AK20

PCMIOWR/GPIO128

AJ11

PCMWAIT/GPIO138

AL19

EMMC_RSTN/GPIO204

AK24

EMMC_CMD/GPIO206

AK23

EMMC_CLK/GPIO205

AL24

NAND_ALE/GPIO201

AL26

NAND_WPZ/GPIO200

AG24

NAND_CEZ/GPIO195

AK26

NAND_CLE/GPIO197

AM26

NAND_REZ/GPIO198

AM25

NAND_WEZ/GPIO199

AL25

NAND_RBZ/GPIO202

AK25

NAND_CE1Z/GPIO196

AH25

NAND_DQS/GPIO203

AH24

PCM2_CD/GPIO116

AJ24

TS1DATA_[0]/GPIO194

AJ18

TS1DATA_[1]/GPIO193

AH19

TS1DATA_[2]/GPIO192

AJ20

TS1DATA_[3]/GPIO191

AG20

TS1DATA_[4]/GPIO190

AH21

TS1DATA_[5]/GPIO189

AH18

TS1DATA_[6]/GPIO188

AG21

TS1DATA_[7]/GPIO187

AJ21

TS1CLK/GPIO184

AG19

TS1VALID/GPIO186

AH20

TS1SYNC/GPIO185

AG18

TS0DATA_[0]/GPIO173

AH13

TS0DATA_[1]/GPIO174

AG17

TS0DATA_[2]/GPIO175

AJ17

TS0DATA_[3]/GPIO176

AH14

TS0DATA_[4]/GPIO177

AG14

TS0DATA_[5]/GPIO178

AG16

TS0DATA_[6]/GPIO179

AG15

TS0DATA_[7]/GPIO180

AH15

TS0CLK/GPIO183

AJ15

TS0VALID/GPIO181

AH17

TS0SYNC/GPIO182

AH16

TS2DATA_[0]/GPIO207

AJ26

TS2CLK/GPIO210

AG26

TS2SYNC/GPIO209

AH26

TS2VALID/GPIO208

AG25

VIFP

AL7

VIFM

AM7

SIFP

AL6

SIFM

AK7

IF_AGC

AM5

TGPIO0/GPIO169

AM8

TGPIO1/GPIO170

AL8

TGPIO2/GPIO171

AL5

TGPIO3/GPIO172

AK6

R175
22

R176

10K

R177

47K

M_RFModule_RESET

VID1

TXVBY1_3P

TXVBY1_7P

TXVBY1_2N

TXVBY1_6P
TXVBY1_5N

TXVBY1_2P

TXVBY1_4P

TXVBY1_6N

TXVBY1_4N

TXVBY1_7N

TXVBY1_3N

TXVBY1_5P

LOCKAn_OSD

R173

22

VBY1_LOCK_LED

R172

220

VBY1_LOCK_LED

LOCKAn_Video

+3.3V_NORMAL

Q101

MMBT3906(NXP)

VBY1_LOCK_LED

E

B

C

LD100

SML-5 12UW

VBY1_LOCK_LED

LD101

SML-5 12UW

VBY1_LOCK_LED

R174

220

VBY1_LOCK_LED

LOCKAn_OSD

+3.3V_NORMAL

Q100

MMBT3906(NXP)

VBY1_LOCK_LED

E

B

C

LOCKAn_Video

R139

22

VBY1_LOCK_LED

HTPDAn_OSD

HTPDAn_Video
LOCKAn_OSD

R125

10K

LOCKAn_Video

R126

10K

FRC_FLASH_WP

SIL9617_INT

SIL9617_RESET

URSA_RESET_SoC

HDMI_MUX_SEL

HTPDAn_OSD

HTPDAn_Video

MUX_EN

I2C_SDA7

I2C_SCL7

I2C_SDA7
I2C_SCL7

R182

10K

R181

10K

OPT

+3.3V_NORMAL

I2C_SDA8
I2C_SCL8

R143

0

R180 0

URSA9_CONNECT

R188

10K

OPT

+3.3V_NORMAL

R189

10K
OPT

R190

0

P103

12507WS-04L

MSTAR_DEBUG_NEW

1

2

3

4

5

R191 10K

R192

10K

R183

1.8K

R184

1.8K

R185

1.8K

R186

1.8K

NVRAM

A0’h

Write Protection

- Low : Normal Operation

- High : Write Protection

I2C for tuner

I2C PULL UP

2013-10-28

LM14 SYSTEM

Jtag I/F
For Main

LM14 HW Option

Mstart Debug

Close to MSTAR

DTV_IF

Close to MSTAR

ANALOG SIF

I2C for NVRAM

UB83

01

I2C for tuner&LNB

V-BY-ONE
MSB/LSB swap

GPIO PULL UP

Value Mode Description
4’b1000 SB51_ExtSPI 51 boot from SPI
4’b1001 HEMCU_ExtSPI ARM boot from SPI
4’b1010 HEMCU_ROM_EMMC ARM boot from ROM; outer storage is eMMC
4’b1011 HEMCU_ROM_NAND ARM boot from ROM; outer storage is NAND
4’b1100 DBUS for test only
4’b0000 SB51_ExtSPI + Authentication 51 boot from SPI with ARM authentication
4’b0001 SB51_ExtSPI + Authentication HEMCU_ExtSPI + Authentication
4’b0011 HEMCU_ROM_NAND + Authentication ARM boot from ROM with authentication;

CHIP CONFIG

CHIP_CONFIG[3:0]
{LED1, SPI_DI,LED0, PWM_PM}

01

10

00

11

EU/CIS AJJA TW/COL CN/HK

BIT7

KR North.AM BR

ATV_EXTJPATV_EXT

T/C

ATV_SOC

T/C Default00ATSC_PIPBRATSC_PIP

CN/HK

ATV_INT
DTV_INT

01

Default

TW/COL

T2/C/S2/ATV_EXT

10

T2/C

AJJA

T2/C/S2/AT

ATSC

T2/C_PIP

US

T2/C

EU

T2/C/S2

11

BIT(0/1) DVB

KR

ATV_SOC

CI

BIT(2/3)

Reserved

Reserved

JP

BIT8

JP

BIT4

BIT5

BIT6

HighLow

Resolution

Vx1 Division

2-Division Non-Division

FHD UHD

HighLow

MODEL

RS232C_Debug

I2C for R9531AN

Place capacitor
Close to the wafer

ATV_INT
DTV_EXT

URSA9 VIDEO/OSD LOCKn

Don’t use! LM14+URSA9: GPIO AH27/AJ27

I2C for URSA9 (URSA9 Only)

I2C for SIL9617

I2C for AMP&MODULE

* BIT4: LM14 TX Division OPT

(LM14+URSA9: Non Division)

LM14+URSA9 LM14 ONLY

I2C for Main Amp & LCD Module

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

11/05/31

+1.1V_VDDC_CPU

+3.3V_NORMAL

C250

0.1uF

+1.1V_VDDC

L206
BLM18PG121SN1D

JP202

JP204

JP205

JP203

+1.1V_VDDC

+1.1V_VDDC

C277 0.1uF

+3.3V_VDDP33

VDDC15_M0

AVDD5V_MHL

AVDD5V_MHL

5V_HDMI_3

R200

10

VDDC15_M0

C2080.1uF
C2090.1uF

C244 0.1uF

L203

BLM18PG121SN1D

+3.3V_AVDD_AU33

L204

BLM18PG121SN1D

L205

BLM18PG121SN1D

+3.3V_VDDP33

C246

0.1uF

+1.1V_CORE

L202

BLM18SG700TN1D

+1.1V_VDDC_CPU

+1.1V_DVDD_DDR

+1.1V_DVDD_DDR

L207
BLM18PG121SN1D

C278 0.1uF

+1.1V_AVDDL_MOD

+1.1V_AVDDL_MOD

L208

BLM18SG700TN1D

+3.3V_AVDD33

+3.3V_AVDD_AU33

+3.3V_VDDP33

C223 0.1uF

C231 0.1uF

VDDC15_M0

C226 0.1uF

C227 0.1uF

C241 0.1uF

C247 0.1uF

C234 0.1uF

C230 0.1uF

C224 0.1uF

C225 0.1uF

C221
10uF
10V

C228
10uF
10V

C258

0.1uF

C266

0.1uF

C262

0.1uF

C273

0.1uF

C270

0.1uF

C242

0.1uF

C232

0.1uF

C254

0.1uF

C235

0.1uF

C248

0.1uF

C274

0.1uF

C249

0.1uF

C243

0.1uF

C271

0.1uF

C229
10uF
10V

C255

0.1uF

C267

0.1uF

C259

0.1uF

C263

0.1uF

C275 0.1uF

+1.1V_DVDD_DDR

+1.1V_AVDDL_MOD

C276 0.1uF

C280 0.1uF

C279 0.1uF

C282 0.1uF

C281 0.1uF

C283 0.1uF

+3.3V_AVDD_DMPLL

+3.3V_AVDD33

+3.3V_AVDD_DMPLL

C237
10uF
10V

C253

0.1uF

C272

0.1uF

C264

0.1uF

C260

0.1uF

C251

0.1uF

C268

0.1uF

C256

0.1uF

C238 0.1uFC239 0.1uF

C245 0.1uF

C265

0.1uF

C269

0.1uF

C257

0.1uF

C261

0.1uF

C252

0.1uF

C240
10uF
10V

L201

MLB-201209-0120P-N2

DVDD18_EMMC

+1.15V_CPU

C284
10uF
10V

C2010.1uF

C2040.1uF

C2000.1uF

C2030.1uF

C233

4.7uF

C236

1uF

C205

0.22uF

C2070.22uF

C2020.22uF

C206

0.22uF

C2120.22uF

C2110.22uF

C2200.22uF

C2190.22uF

C2180.22uF

C217

0.22uF

C2140.22uF

C213

0.22uF

C2150.22uF

C2160.22uF

L200

BLM18PG121SN1D

+1.5V_DDR

IC100

LGE4331

VDDC_1

K10

VDDC_2

K11

VDDC_3

L10

VDDC_4

L11

VDDC_5

M10

VDDC_6

M11

VDDC_7

T10

VDDC_8

T11

VDDC_9

U10

VDDC_10

U11

VDDC_11

V10

VDDC_12

V11

VDDC_14

AB10

VDDC_15

AB11

VDDC_17

AC10

VDDC_18

AC11

VDDC_13

AA15

VDDC_16

AB15

VDDC_19

AC15

AVDDV_DVI

AB16

AVDDL_MOD_1

W21

AVDDL_MOD_2

W20

AVDDL_SSUSB_1

M12

AVDDL_SSUSB_2

M13

VDDC_CPU_1

Y20

VDDC_CPU_2

Y21

VDDC_CPU_3

Y22

VDDC_CPU_4

Y23

VDDC_CPU_5

Y24

VDDC_CPU_6

AA20

VDDC_CPU_7

AA21

VDDC_CPU_8

AA22

VDDC_CPU_9

AA23

VDDC_CPU_10

AA24

VDDC_CPU_11

AB20

VDDC_CPU_12

AB21

VDDC_CPU_13

AB22

VDDC_CPU_14

AB23

VDDC_CPU_15

AB24

VDDC_CPU_16

AC21

VDDC_CPU_17

AC22

VDDC_CPU_18

AC23

VDDC_CPU_19

AC24

DVDD_NODIE

L7

VSENSE

Y19

DVDD_DDR_1

N19

DVDD_DDR_2

N20

DVDD_DDR_3

P19

DVDD_DDR_4

P20

AVDD_NODIE

P7

AVDDP3P_ETH

R7

AVDDP3P_USB

U7

AVDDP3P_DVI_1

V7

AVDDP3P_DVI_2

W7

AVDDP3P_DADC

AA7

AVDDP3P_ADC

AB7

AVDD_AU33

AF7

AVDD_EAR33

AE7

AVDD_DMPLL

AF10

AVDD_MOD

AF15

AVDD_PLL

AF14

AVDD_LPLL

AE14

VDDP_1

AF12

VDDP_3318_A

AF17

VDDP_2

AF18

AVDD_DDR0_1

L19

AVDD_DDR0_2

L20

AVDD_DDR0_3

L21

AVDD_DDR0_4

M19

AVDD_DDR0_5

M20

AVDD_DDR0_6

M21

AVDD_DDR1_1

L22

AVDD_DDR1_2

M22

AVDD_DDR1_3

N21

AVDD_DDR1_4

N22

AVDD_DDR1_5

P21

AVDD_DDR1_6

P22

AVDD_HDMI_5V_PC

AF6

GND_EFUSE

D3

AVDD04_DDR_A_1

A11

AVDD04_DDR_A_2

B11

AVDD11_DDR_A_1

A13

AVDD11_DDR_A_2

B13

AVDD04_DDR_B_1

AB31

AVDD04_DDR_B_2

AB32

AVDD11_DDR_B_1

AD31

AVDD11_DDR_B_2

AD32

AVDD04_DDR_A_3

M17

AVDD04_DDR_A_4

M18

AVDD11_DDR_A_3

L17

AVDD11_DDR_A_4

L18

AVDD04_DDR_B_3

R22

AVDD04_DDR_B_4

T22

AVDD11_DDR_B_3

R21

AVDD11_DDR_B_4

T21

AVDDL_MOD_3

AE31

AVDDL_MOD_4

AE30

GND_1

A14

GND_2

A17

GND_3

A20

GND_4

A23

GND_5

A26

GND_6

A29

GND_7

B12

GND_8

B14

GND_9

B31

GND_10

C3

GND_11

C11

GND_12

C12

GND_13

C13

GND_14

C14

GND_15

C31

GND_16

C32

GND_17

D17

GND_18

D20

GND_19

D24

GND_20

D27

GND_21

D31

GND_22

D32

GND_23

E1

GND_24

E29

GND_25

E30

GND_26

E31

GND_27

F21

GND_28

F23

GND_29

F24

GND_30

F25

GND_31

F26

GND_32

F27

GND_33

F28

GND_34

G8

GND_35

G9

GND_36

G10

GND_37

G11

GND_38

G12

GND_39

G13

GND_40

G14

GND_41

G15

GND_42

G16

GND_43

G17

GND_44

G18

GND_45

G19

GND_46

G20

GND_47

G22

GND_48

G23

GND_49

G24

GND_50

G25

GND_51

G26

GND_52

G27

GND_53

G30

GND_54

H3

GND_55

H7

GND_56

H8

GND_57

H9

GND_58

H10

GND_59

H11

GND_60

H12

GND_61

H13

GND_62

H14

GND_63

H15

GND_64

H16

GND_65

H17

GND_66

H18

GND_67

H19

GND_68

H20

GND_69

H21

GND_70

H22

GND_71

H23

GND_72

H24

GND_73

H25

GND_74

H26

GND_75

H27

GND_76

J7

GND_77

J8

GND_78

J9

GND_79

J10

GND_80

J11

GND_81

J12

GND_82

J13

GND_83

J14

GND_84

J15

GND_85

J16

GND_86

J17

GND_87

J18

GND_88

J19

GND_89

J20

GND_90

J21

GND_91

J22

GND_92

J23

GND_93

J24

GND_94

J25

GND_95

J26

GND_96

K7

GND_97

K8

GND_98

K9

GND_99

K12

GND_100

K13

GND_101

K14

GND_102

K15

GND_103

K16

GND_104

K18

GND_105

K19

GND_106

K21

GND_107

K23

GND_108

K24

GND_109

K25

GND_110

K26

GND_111

L8

GND_112

L9

GND_113

L12

GND_114

L13

GND_115

L14

GND_116

L15

GND_117

L16

GND_118

L24

GND_119

L25

GND_120

L26

GND_121

L29

GND_122

L32

GND_123

M7

GND_124

M8

GND_125

M9

GND_126

M14

GND_127

M15

GND_128

M16

GND_129

M23

GND_130

M24

GND_131

M25

GND_132

M26

GND_133

N7

GND_134

N8

GND_135

N9

GND_136

N10

GND_137

N11

GND_138

N12

GND_139

N13

GND_140

N14

IC100

LGE4331

GND_141

N15

GND_142

N16

GND_143

N17

GND_144

N18

GND_145

N23

GND_146

N24

GND_147

N25

GND_148

N26

GND_149

P8

GND_150

P9

GND_151

P10

GND_152

P11

GND_153

P12

GND_154

P13

GND_155

P14

GND_156

P15

GND_157

P16

GND_158

P17

GND_159

P18

GND_160

P23

GND_161

P24

GND_162

P25

GND_163

P26

GND_164

P29

GND_165

P32

GND_166

R8

GND_167

R9

GND_168

R10

GND_169

R11

GND_170

R12

GND_171

R13

GND_172

R14

GND_173

R15

GND_174

R16

GND_175

R17

GND_176

R18

GND_177

R19

GND_178

R20

GND_179

R23

GND_180

R24

GND_181

R25

GND_182

R26

GND_183

T7

GND_184

T8

GND_185

T9

GND_186

T12

GND_187

T13

GND_188

T14

GND_189

T15

GND_190

T16

GND_191

T17

GND_192

T18

GND_193

T19

GND_194

T20

GND_195

T23

GND_196

T24

GND_197

T25

GND_198

T26

GND_199

U8

GND_200

U9

GND_201

U12

GND_202

U13

GND_203

U14

GND_204

U15

GND_205

U16

GND_206

U17

GND_207

U18

GND_208

U19

GND_209

U20

GND_210

U21

GND_211

U22

GND_212

U23

GND_213

U24

GND_214

U25

GND_215

U26

GND_216

U29

GND_217

U32

GND_218

V8

GND_219

V9

GND_220

V12

GND_221

V13

GND_222

V14

GND_223

V15

GND_224

V16

GND_225

V17

GND_226

V18

GND_227

V19

GND_228

V20

GND_229

V21

GND_230

V22

GND_231

V23

GND_232

V24

GND_233

V25

GND_234

V26

GND_235

W8

GND_236

W9

GND_237

W10

GND_238

W11

GND_239

W12

GND_240

W13

GND_241

W14

GND_242

W15

GND_243

W16

GND_244

W17

GND_245

W18

GND_246

W19

GND_247

W22

GND_248

W23

GND_249

W24

GND_250

W25

GND_251

W26

GND_252

Y7

GND_253

Y8

GND_254

Y9

GND_255

Y10

GND_256

Y11

GND_257

Y12

GND_258

Y13

GND_259

Y14

GND_260

Y15

GND_261

Y16

GND_262

Y17

GND_263

Y18

GND_264

Y25

GND_265

Y26

GND_266

Y29

GND_267

Y32

GND_268

AA8

GND_269

AA9

GND_270

AA10

GND_271

AA11

GND_272

AA12

GND_273

AA14

GND_274

AA16

GND_275

AA17

GND_276

AA18

GND_277

AA19

GND_278

AA25

GND_279

AA26

GND_280

AB8

GND_281

AB9

GND_282

AB12

GND_283

AB13

GND_284

AB14

GND_285

AB17

GND_286

AB18

GND_287

AB19

GND_288

AB25

GND_289

AB26

GND_290

AB27

GND_291

AB28

GND_292

AB29

GND_293

AB30

GND_294

AC7

GND_295

AC8

GND_296

AC9

GND_297

AC12

GND_298

AC13

GND_299

AC14

GND_300

AC16

GND_301

AC17

GND_302

AC18

GND_303

AC19

GND_304

AC20

GND_305

AC25

GND_306

AC26

GND_307

AC27

GND_308

AC28

GND_309

AC29

GND_310

AC30

GND_311

AC31

GND_312

AD7

GND_313

AD8

GND_314

AD9

GND_315

AD10

GND_316

AD11

GND_317

AD12

GND_318

AD13

GND_319

AD14

GND_320

AD15

GND_321

AD16

GND_322

AD17

GND_323

AD18

GND_324

AD19

GND_325

AD20

GND_326

AD21

GND_327

AD22

GND_328

AD23

GND_329

AD24

GND_330

AD25

GND_331

AD26

GND_332

AD27

GND_333

AD28

GND_334

AD29

GND_335

AD30

GND_336

AE8

GND_337

AE9

GND_338

AE10

GND_339

AE11

GND_340

AE12

GND_341

AE13

GND_342

AE15

GND_343

AE16

GND_344

AE17

GND_345

AE18

GND_346

AE19

GND_347

AE20

GND_348

AE21

GND_349

AE22

GND_350

AE23

GND_351

AE24

GND_352

AE25

GND_353

AE26

GND_354

AE27

GND_355

AE28

GND_356

AE29

GND_357

AF1

GND_358

AF2

GND_359

AF8

GND_360

AF9

GND_361

AF13

GND_362

AF19

GND_363

AF20

GND_364

AF21

GND_365

AF22

GND_366

AF23

GND_367

AF24

GND_368

AF25

GND_369

AF26

GND_370

AF27

GND_371

AF28

GND_372

AF29

GND_373

AG1

GND_374

AG2

GND_375

AG3

GND_376

AG7

GND_377

AG8

GND_378

AG9

GND_379

AG27

GND_380

AH3

GND_381

AH4

GND_382

AH5

GND_383

AH6

GND_384

AH7

GND_385

AH8

GND_386

AH9

GND_387

AH30

GND_388

AJ6

GND_389

AJ7

GND_390

AJ8

GND_391

AJ23

GND_392

AK5

GND_393

AK8

GND_394

AK29

GND_395

AL2

GND_396

AL3

GND_397

AL4

GND_398

AL23

GND_399

AM14

C210
1uF
25V

C222
10uF
10V

+3.3V_Bypass Cap

+1.1V_Bypass Cap

GND JIG POINT

UB83

02

2013-10-28

LM14 POWER

5A

4A

4A

2A

2A

2A

2A

2A

+1.5V_Bypass Cap

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SPDIF_OUT

HDMI_ARC

SC_L_IN

COMP1/AV1/DVI_R_IN

SC_R_IN

COMP1/AV1/DVI_L_IN

HP_ROUT

HP_LOUT

AUD_MASTER_CLK

AUD_SCK

C307

22pF

C308
22pF

C310
22pF

C309
22pF

R304
22

R306

22
R305
22

R307

22

R312 68

C317

0.047uF

R315

33

R314

68

R316 68

SC_B

C316

0.047uF

R317 33 C321

0.047uF

C319

0.047uF
C320

0.047uF

SC_R

C318

0.047uF

SC_G

R313 33

SC_FB

SC_ID

COMP1_Pr

R321

33

COMP1_Y

R319 33

C329

1000pF

C328

0.047uF

C324

0.047uF
C325

0.047uF

R322 68

R320

68

R318 68

R323 33

C323

0.047uF

COMP1_Pb

C326

0.047uF

C327

0.047uF

C322

1000pF

R308 68

C312 0.047uF

TU_CVBS

AV1_CVBS_IN

C313 0.047uF
C314 0.047uF
C315 0.047uF

SC_CVBS_IN

C311

1000pF

OPT

50V

R311 33

R309 33
R310 33

DTV/MNT_V_OUT

EPHY_RDP

EPHY_TDN

EPHY_RDN

EPHY_TDP

SOC_RESET

XOUT_MAIN

R324

1M

XIN_MAIN

X300

24MHz

4

GND_2

1

X-TAL_12GND_1

3

X-TAL_2

XIN_MAIN
XOUT_MAIN

USB_DM1
USB_DP1

L300

BLM18 PG121SN1D

C332
10uF
10V

WIFI_DP

WIFI_DM

USB_DM2
USB_DP2

USB_DM3
USB_DP3

MHL_DET_LM14

/MHL_OCP

AUD_LRCK
AUD_LRCH

SCART_Rout

SCART_Lout

IC100

LGE4331

RXA0N

V2

RXA0P

W3

RXA1N

W2

RXA1P

Y3

RXA2N

Y2

RXA2P

Y1

RXACKN

V3

RXACKP

V1

DDCDA_CK/GPIO35

AC4

DDCDA_DA/GPIO36

AE4

HOTPLUGA/GPIO31

AD5

RXB0N

R2

RXB0P

T3

RXB1N

T2

RXB1P

U3

RXB2N

U2

RXB2P

U1

RXBCKN

R3

RXBCKP

R1

DDCDB_CK/GPIO37

AC6

DDCDB_DA/GPIO38

AB4

HOTPLUGB/GPIO32

AC5

RXC0N

J2

RXC0P

K3

RXC1N

K2

RXC1P

L3

RXC2N

L2

RXC2P

L1

RXCCKN

J3

RXCCKP

J1

DDCDC_CK/GPIO39

Y4

DDCDC_DA/GPIO40

Y5

HOTPLUGC/GPIO33

AA5

RXD0N

M2

RXD0P

N3

RXD1N

N2

RXD1P

P3

RXD2N

P2

RXD2P

P1

RXDCKN

M3

RXDCKP

M1

DDCDD_CK/GPIO41

AA6

DDCDD_DA/GPIO42

AB6

HOTPLUGD/GPIO34

AB5

CEC/GPIO5

W4

SPDIF_IN/GPIO94

D10

SPDIF_OUT/GPIO95

E10

LINE_IN_0L

AJ2

LINE_IN_0R

AJ1

LINE_IN_2L

AK3

LINE_IN_2R

AK1

LINE_OUT_0L

AH2

LINE_OUT_0R

AJ3

EAR_OUT_L

AJ4

EAR_OUT_R

AJ5

ARC0

Y6

AUVAG

AK2

AUVRM

AK4

I2S_IN_BCK/GPIO92

B10

I2S_IN_SD/GPIO93

C9

I2S_IN_WS/GPIO91

B9

I2S_OUT_BCK/GPIO98

A7

I2S_OUT_MCK/GPIO97

C7

I2S_OUT_WS/GPIO96

A8

I2S_OUT_SD/GPIO99

B8

I2S_OUT_SD1/GPIO100

C8

I2S_OUT_SD2/GPIO101

B7

I2S_OUT_SD3/GPIO102

C4

GPIO_PM14/GPIO24

N4

GPIO_PM15/GPIO25

M5

GPIO_PM16/GPIO26

M6

IC100

LGE4331

RIN0M

AC2

RIN0P

AC3

GIN0M

AB2

GIN0P

AB3

BIN0M

AA1

BIN0P

AA3

SOGIN0

AA2

HSYNC0

AE5

VSYNC0

AD6

RIN1M

AF3

RIN1P

AE2

GIN1M

AE3

GIN1P

AD2

BIN1M

AD3

BIN1P

AC1

SOGIN1

AD1

VCOM

AE6

CVBS0

AF4

CVBS1

AF5

CVBS2

AG5

CVBSOUT1

AG6

TN

AM13

TP

AK13

RN

AK12

RP

AL13

ET_TX_CLK/GPIO76

AM11

ET_COL/GPIO72

AL9

ET_MDC/GPIO78

AK9

ET_TX_EN/GPIO75

AL12

ET_TXD[0]/GPIO74

AL11

ET_TXD[1]/GPIO73

AK11

ET_RXD[0]/GPIO77

AM10

ET_RXD[1]/GPIO80

AK10

ET_MDIO/GPIO79

AL10

HWRESET

H2

XIN

AM3

XOUT

AM4

IRIN

H1

USB0_DM

G2

USB0_DP

G3

USB1_DM

AL14

USB1_DP

AK14

USB2_DM

F2

USB2_DP

F3

USB3_DM

E3

USB3_DP

F1

USB_SSTXP

B2

USB_SSTXN

C2

USB_DM

C1

USB_DP

D2

USB_SSRXP

D1

USB_SSRXN

E2

C333

1uF

C302

2.2uF
C303

2.2uF
C304

2.2uF
C305

2.2uF

C330

10pF

C331

10pF

R301

22

HDMI_RX1-

HDMI_TX_DDC_SDA

HDMI_RX0-

HDMI_CLK+

HDMI_RX2-

HDMI_CLK-

HDMI_TX_DDC_CLK

HDMI_RX0+

HDMI_RX2+

HDMI_RX1+

R300 22

I2C_SDA8

I2C_SCL8

R333

22K

OPT

HP_LOUT

C334

0.01uF

OPT

HP_ROUT_MAIN

HP_ROUT

R334

22K

OPT

HP_LOUT_MAIN

R335
100

C335

0.01uF

OPT

R336
100

R325

2.2
R326

2.2

R328

2.2

R327

2.2

R329

2.2
R330

2.2

R331

2.2

R332

2.2

System Clock for Analog block(24Mhz)

Clock for MSD808KWD

MAIN Clock(24Mhz)

2013-10-28

LM14 INPUT

UB83

03

HDMI Input from URSA9

Close to Main soc

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

M0_DDR_DQ10

M1_DDR_DM1

M0_DDR_DQ30

M0_DDR_DQ14

M0_DDR_VREFDQ

M1_DDR_DQ19

M0_DDR_DQS_N1

M0_DDR_DQS0

M1_DDR_A13

M0_DDR_DQ25

M1_DDR_RESET_N

M0_DDR_DQ28
M0_DDR_DQ29

M0_DDR_DQ4

M0_DDR_DQ4

M0_DDR_ODT

M0_DDR_DQ26

C440

0.1uF

M0_DDR_CKE

M1_DDR_DQ18

M1_DDR_DQ20

M0_DDR_RESET_N

M0_DDR_DQS2

M1_DDR_DQ7

R426

1K 1%

M0_DDR_DQ3

C470

0.1uF

M0_DDR_DQ14

M1_DDR_DQ28

M0_DDR_DQS_N0

M1_DDR_DQ5

M1_DDR_DQ10

M1_DDR_DQ6

M1_DDR_A14

R418
10K

M0_DDR_DQ12

M0_DDR_DQ15

M0_DDR_DQ13

M0_DDR_DQ3

M0_DDR_DM3

M1_DDR_A11

M1_DDR_CKE

M0_1_DDR_VREFDQ

R410

1K 1%

C473

0.1uF

M0_DDR_A11

VDDC15_M0

M0_DDR_DQS1

M0_DDR_DQS3

M0_DDR_A7

M0_DDR_DQS3

M0_DDR_BA0

R405
10K

M1_DDR_DQ11

M1_DDR_A1

M1_DDR_BA2

M0_DDR_A11

M1_DDR_DQ22

M0_D_CLKN

M0_DDR_DQ30

M0_DDR_A15

M0_1_DDR_VREFDQ

R416

1K 1%

M0_DDR_A8

M1_DDR_DQ25

M1_DDR_BA0

M1_DDR_DQ26

M0_DDR_RASN

M1_DDR_A2

M0_DDR_A6

R431

1K 1%

M1_DDR_VREFDQ

VDDC15_M0

M1_DDR_A9

M0_DDR_DQ16

M0_DDR_A12

M1_DDR_A5

M1_DDR_DQ12

M1_DDR_RASN

M0_DDR_DQ15

M0_DDR_DQ6

M1_DDR_A3

M0_DDR_DQ8

M0_DDR_DQ20

M0_D_CLK

M0_DDR_DM2

M0_DDR_DQ27

C411

0.1uF

M0_DDR_DQ22

M0_DDR_A2

M0_DDR_A13

C472

0.1uF

M0_DDR_CASN

R403

240

M1_DDR_DQ0

M0_DDR_DQ25

M1_DDR_DQ29

M0_DDR_VREFDQ

M1_DDR_DQ9

M0_DDR_DM1

M0_DDR_DQ0

M1_DDR_A7

M0_DDR_DQ21

M0_DDR_A4

M1_DDR_DQ13

M0_DDR_CASN

C410

0.1uF

M1_DDR_DQ16

M0_DDR_DQ5

M1_DDR_DM2

M0_DDR_DM0

M1_DDR_A0

M0_DDR_DQ10

M0_DDR_A5

M0_DDR_DM0

M0_DDR_DQ18

M0_DDR_DQS_N0

M1_D_CLKN

VDDC15_M0

M0_DDR_DQ7

C479

0.1uF

M0_DDR_DQ2

VDDC15_M0

M0_DDR_A10

M1_DDR_DQ14

M1_DDR_RESET_N

M0_DDR_DQ29

M0_DDR_DQS1

M0_DDR_DQ17

M1_DDR_DQ1

M0_DDR_RESET_N

M0_DDR_BA1

M0_DDR_DQS_N2

M1_DDR_DQ23

VDDC15_M0

R425

1K 1%

M1_DDR_CASN

M0_DDR_DQ8

M0_DDR_BA1

M0_DDR_DM2

M1_DDR_DQS_N2

M0_DDR_DQ1

M1_DDR_WEN

M1_DDR_A4

M0_DDR_DQ5

M0_DDR_A9

M0_DDR_DM1

M0_DDR_A1

R417

1K 1%

M1_DDR_DQ24

M0_DDR_DQ18

M1_DDR_DQ31

M1_DDR_DQ21

M0_DDR_CKE

M0_DDR_DQ31

M0_DDR_A15

M0_DDR_DQ13

M0_DDR_DQ19

M0_D_CLK

M0_DDR_A3

M1_DDR_DQS_N1

M1_DDR_ODT

M1_DDR_DQS2

M1_DDR_DQ4

M0_DDR_A2

M0_DDR_DQ12

M1_DDR_A8

R422
10K

M0_DDR_DQ11

M0_DDR_DQ6

M0_DDR_A6

M1_DDR_DQ27

M0_DDR_BA0

M0_DDR_DQ7

M1_DDR_DQ15

M0_DDR_DQ26

M0_DDR_A0

M0_DDR_A1

VDDC15_M0

M0_DDR_A0

M0_DDR_DQ22

M0_DDR_WEN

VDDC15_M0

M1_DDR_DQ17

M1_DDR_DM3

M1_DDR_DQS3

M1_DDR_DQ30

M1_D_CLK

M0_DDR_A10

M1_DDR_CKE

M1_DDR_DQS_N3

M0_DDR_DQ24

M1_DDR_DQ2

M0_DDR_CKE

M0_DDR_RESET_N

M1_DDR_A15

M0_DDR_ODT

M0_DDR_DQ19

R411

1K 1%

M0_DDR_DQS0

M0_DDR_DQS_N3

M0_DDR_DQ1

M1_DDR_A12

M0_DDR_DQS_N2

M0_DDR_A9

M0_DDR_A13

M1_DDR_DM0

M1_DDR_BA1

M0_DDR_DQ9

M0_DDR_A5

C441

0.1uF

M0_DDR_DQ2

M1_DDR_DQ3

M0_DDR_DQ11

M0_D_CLKN

M0_DDR_DQ0

M0_DDR_BA2

M0_DDR_DQ23

M0_DDR_DQ27

M1_DDR_DQ8

M1_DDR_DQS1

M1_DDR_A10

M0_DDR_DQ24

M0_DDR_A14

M0_DDR_A3

M0_DDR_DQS_N3

M0_DDR_DM3

M1_DDR_A6

M0_DDR_DQ28

R433
10K

M0_DDR_DQ23

M0_DDR_DQ21

M0_DDR_DQ9

M1_DDR_DQS0

M0_DDR_DQS_N1

M0_DDR_DQ20

M0_DDR_DQ16

M1_1_DDR_VREFDQ

M0_DDR_DQ31

R400

240

M0_DDR_A8

M0_DDR_A7

VDDC15_M0

M0_DDR_DQS2

M1_DDR_DQS_N0

M0_DDR_WEN

M0_DDR_A12

M0_DDR_A14

M0_DDR_RASN

M0_DDR_DQ17

R432

1K 1%

M0_DDR_A4

M0_DDR_BA2

M1_DDR_DM3

M1_D_CLK

M1_DDR_A3

M1_DDR_DQ24

C490

0.1uF

M1_DDR_DQ7

M1_DDR_BA2

M1_DDR_DQS0

M1_DDR_A15

M1_DDR_A6

M1_DDR_A5

M1_DDR_A9

M1_DDR_CASN

M1_DDR_DQ31

M1_DDR_CASN

M1_DDR_DQ3

M1_DDR_DM2

M1_DDR_DQ17

M1_DDR_DQ11

M1_DDR_CKE

M1_1_DDR_VREFDQ

M1_D_CLK

M1_DDR_A5

M1_DDR_A12

M1_DDR_DQ26

M1_DDR_DQ6

M1_DDR_A14

M1_DDR_A6

M1_DDR_DQ23

M1_DDR_DQ9

M1_DDR_RASN

C468

0.1uF

M1_DDR_DM1

R404

240

R419

240

M1_DDR_A0

M1_DDR_DQ14

M1_DDR_DQ2

M1_DDR_ODT

M1_DDR_A8

M1_DDR_DQ18

M1_DDR_A1

M1_DDR_DQS1

M1_DDR_BA0

M1_DDR_DQ27
M1_DDR_DQ28

C491

0.1uF

M1_DDR_WEN

M1_DDR_DQ21

M1_DDR_DQ1

M1_DDR_DQS3

M1_DDR_A1

M1_DDR_A4

M1_DDR_DQS_N0

M1_DDR_A10

M1_DDR_DQS_N3

M1_DDR_RASN

M1_DDR_DQ12

M1_DDR_A10

M1_DDR_DQ29
M1_DDR_DQ30

M1_DDR_A11

M1_DDR_CKE

M1_DDR_BA1

M1_DDR_A13

M1_DDR_RESET_N

C469

0.1uF

M1_DDR_A8

M1_DDR_DQ8

M1_DDR_A2

M1_DDR_DQ22

M1_DDR_DQ4

M1_DDR_DQ16

M1_DDR_A4

M1_DDR_DM0

M1_DDR_A7

M1_DDR_DQ25

M1_DDR_BA2

M1_DDR_DQ20

M1_DDR_BA1

M1_DDR_DQ15

M1_DDR_A12

M1_DDR_A7

M1_DDR_A9

M1_DDR_DQS2

VDDC15_M0

M1_DDR_ODT

M1_DDR_DQS_N2

M1_DDR_BA0

M1_DDR_RESET_N

M1_DDR_DQ13

M1_DDR_A3

M1_D_CLKN

M1_DDR_A0

M1_DDR_VREFDQ

M1_DDR_DQ19

M1_DDR_A13

M1_D_CLKN

M1_DDR_A15

M1_DDR_A2

VDDC15_M0

M1_DDR_A14

M1_DDR_DQ0

M1_DDR_DQS_N1

M1_DDR_A11

M1_DDR_DQ10

M1_DDR_WEN

M1_DDR_DQ5

M0_DDR_A12

M0_DDR_CKE

M0_DDR_BA1

M0_DDR_A2

M0_DDR_A8

M0_DDR_A13

M0_DDR_A4

M0_DDR_BA2

M0_DDR_A0

M0_DDR_BA0

M0_D_CLK

M0_DDR_RASN
M0_DDR_CASN

M0_DDR_A15

M0_DDR_RESET_N

M0_DDR_A3

M0_DDR_A14

M0_DDR_A11

M0_DDR_A6

M0_DDR_A1

M0_DDR_A10

M0_DDR_A9

M0_DDR_WEN

M0_DDR_A7

M0_DDR_A5

M0_D_CLKN

M0_DDR_ODT

M0_DDR_CS1

M0_DDR_CS2

M1_DDR_CS1

M1_DDR_CS2

M0_DDR_CS1
M0_DDR_CS2

M1_DDR_CS1
M1_DDR_CS2

C474
1000pF
50V

C483
1000pF
50V

C471
1000pF
50V

C478
1000pF
50V

C407 0.1uF

C409 0.1uF

C405 0.1uF

C408 0.1uF

C402 0.1uF

C400 0.1uF

C406 0.1uF

C403 0.1uF

C401 0.1uF

C404 0.1uF

VDDC15_M0

C412 0.1uF

C420 0.1uF

VDDC15_M0

C416 0.1uF

C418 0.1uF

C438 0.1uF

C439 0.1uF

C423 0.1uF

C419 0.1uF

C413 0.1uF

C415 0.1uF

C444 0.1uF

C450 0.1uF

VDDC15_M0

C447 0.1uF

C448 0.1uF

C452 0.1uF

C467 0.1uF

C451 0.1uF

C449 0.1uF

C445 0.1uF

C446 0.1uF

C475 0.1uF

C486 0.1uF

VDDC15_M0

C481 0.1uF

C484 0.1uF

C488 0.1uF

C489 0.1uF

C487 0.1uF

C485 0.1uF

C476 0.1uF

C480 0.1uF

R412
56
1%

C477

0.01uF
50V

M0_D_CLKN

R413
56
1%

M0_D_CLK

R427
56
1%

M1_D_CLK

C497

0.01uF
50V

M1_D_CLKN

R428
56
1%

C421

1000pF

VDDC15_M0

R402
10K

1%

C417
100uF

C422
22uF
10V

+3.3V_NORMAL

IC402

TPS51200DRCR

3

VO

2

VLDOIN

4

PGND

1

REFIN

5

VOSNS6REFOUT

7

EN

8

GND

9

PGOOD

10

VIN

11

[EP]

C414

0.1uF

C443

4700pF

L401

UBW2012-121F

C442

0.1uF

L400

UBW2012-121F

DDR_VTT

R401

10K

1%

M0_DDR_CASN

M0_DDR_A14

M0_DDR_A10

M0_DDR_A15

M0_DDR_ODT

M0_DDR_BA0

M0_DDR_WEN

M0_DDR_A11

M0_DDR_BA2

M0_DDR_A4

M0_DDR_A3
M0_DDR_A0

M0_DDR_A7

M0_DDR_A8

M0_DDR_A13

M0_DDR_CKE

M0_DDR_BA1

M0_DDR_A6

M0_DDR_A1

M0_DDR_A5

M0_DDR_RASN

M0_DDR_A9

M0_DDR_A12

M0_DDR_A2

M0_D_CLKN

M0_D_CLK

M1_DDR_CASN

M1_DDR_A5

M1_DDR_A10

M1_DDR_A4

M1_DDR_A6

M1_DDR_BA0

M1_DDR_A9

M1_DDR_BA1

M1_DDR_A8

M1_DDR_CKE

M1_DDR_A2

M1_DDR_WEN

M1_DDR_A0

M1_DDR_RASN

M1_DDR_A7

M1_DDR_BA2

M1_D_CLK

M1_DDR_A13

M1_DDR_A14

M1_DDR_A3

M1_DDR_ODT

M1_DDR_A12

M1_DDR_A11

M1_DDR_A1

M1_D_CLKN

M1_DDR_A15

AR400
100
1/16W

AR401
100
1/16W

AR403
100
1/16W

AR402
100
1/16W

AR405
100
1/16W

AR404
100
1/16W

AR406
100
1/16W

AR412
100
1/16W

AR413
100
1/16W

AR411
100
1/16W

AR408
100
1/16W

AR407
100
1/16W

AR410
100
1/16W

AR409
100
1/16W

DDR_VTT

C424 0.1uF

C425 0.1uF

C426 0.1uF

C427 0.1uF

C428 0.1uF

C429 0.1uF

C430 0.1uF

C431 0.1uF

C432 0.1uF

C433 0.1uF

C434 0.1uF

C435 0.1uF

C436 0.1uF

C437 0.1uF

C462 0.1uF

C456 0.1uF

C453 0.1uF

C461 0.1uF

C466 0.1uF

C455 0.1uF

C460 0.1uF

C465 0.1uF

DDR_VTT

C459 0.1uF

C464 0.1uF

C458 0.1uF

C463 0.1uF

C454 0.1uF

C457 0.1uF

M0_DDR_RESET_N M1_DDR_RESET_N

IC100

LGE4331

A_DDR3_A0

F16

A_DDR3_A1

C16

A_DDR3_A2

E16

A_DDR3_A3

F17

A_DDR3_A4

B17

A_DDR3_A5

E17

A_DDR3_A6

A16

A_DDR3_A7

D16

A_DDR3_A8

C15

A_DDR3_A9

E15

A_DDR3_A10

B18

A_DDR3_A11

B16

A_DDR3_A12

D19

A_DDR3_A13

F15

A_DDR3_A14

B15

A_DDR3_A15

E19

A_DDR3_BA0

E18

A_DDR3_BA1

C17

A_DDR3_BA2

F18

A_DDR3_RASZ

F20

A_DDR3_CASZ

F19

A_DDR3_WEZ

E20

A_DDR3_ODT

G21

A_DDR3_CKE

C18

A_DDR3_RST

F14

A_DDR3_MCLK

A19

A_DDR3_MCLKZ

B19

A_DDR3_CSB1

E14

A_DDR3_CSB2

D14

A_DDR3_DQ[0]

C22

A_DDR3_DQ[1]

B21

A_DDR3_DQ[2]

B23

A_DDR3_DQ[3]

C20

A_DDR3_DQ[4]

B24

A_DDR3_DQ[5]

C19

A_DDR3_DQ[6]

C23

A_DDR3_DQ[7]

C21

A_DDR3_DQM[0]

B20

A_DDR3_DQS[0]

A22

A_DDR3_DQSB[0]

B22

A_DDR3_DQ[8]

F22

A_DDR3_DQ[9]

E24

A_DDR3_DQ[10]

E21

A_DDR3_DQ[11]

E25

A_DDR3_DQ[12]

D22

A_DDR3_DQ[13]

D26

A_DDR3_DQ[14]

D21

A_DDR3_DQ[15]

D25

A_DDR3_DQM[1]

E23

A_DDR3_DQS[1]

D23

A_DDR3_DQSB[1]

E22

A_DDR3_DQ[16]

C27

A_DDR3_DQ[17]

C25

A_DDR3_DQ[18]

B28

A_DDR3_DQ[19]

A25

A_DDR3_DQ[20]

C28

A_DDR3_DQ[21]

C24

A_DDR3_DQ[22]

A28

A_DDR3_DQ[23]

B26

A_DDR3_DQM[2]

B25

A_DDR3_DQS[2]

B27

A_DDR3_DQSB[2]

C26

A_DDR3_DQ[24]

D28

A_DDR3_DQ[25]

C29

A_DDR3_DQ[26]

E26

A_DDR3_DQ[27]

D29

A_DDR3_DQ[28]

E28

A_DDR3_DQ[29]

D30

A_DDR3_DQ[30]

E27

A_DDR3_DQ[31]

C30

A_DDR3_DQM[3]

B30

A_DDR3_DQS[3]

A30

A_DDR3_DQSB[3]

B29

B_DDR3_A0

G28

B_DDR3_A1

J31

B_DDR3_A2

H29

B_DDR3_A3

J27

B_DDR3_A4

J30

B_DDR3_A5

H28

B_DDR3_A6

J32

B_DDR3_A7

G31

B_DDR3_A8

H32

B_DDR3_A9

F30

B_DDR3_A10

K30

B_DDR3_A11

H30

B_DDR3_A12

K29

B_DDR3_A13

F31

B_DDR3_A14

H31

B_DDR3_A15

L28

B_DDR3_BA0

K28

B_DDR3_BA1

K31

B_DDR3_BA2

J28

B_DDR3_RASZ

M27

B_DDR3_CASZ

L27

B_DDR3_WEZ

K27

B_DDR3_ODT

M28

B_DDR3_CKE

L31

B_DDR3_RST

F32

B_DDR3_MCLK

M32

B_DDR3_MCLKZ

L30

B_DDR3_CSB1

F29

B_DDR3_CSB2

E32

B_DDR3_DQ[0]

R31

B_DDR3_DQ[1]

N30

B_DDR3_DQ[2]

R30

B_DDR3_DQ[3]

N31

B_DDR3_DQ[4]

T30

B_DDR3_DQ[5]

M31

B_DDR3_DQ[6]

T31

B_DDR3_DQ[7]

P31

B_DDR3_DQM[0]

M30

B_DDR3_DQS[0]

R32

B_DDR3_DQSB[0]

P30

B_DDR3_DQ[8]

P28

B_DDR3_DQ[9]

T28

B_DDR3_DQ[10]

N28

B_DDR3_DQ[11]

U28

B_DDR3_DQ[12]

N27

B_DDR3_DQ[13]

T27

B_DDR3_DQ[14]

N29

B_DDR3_DQ[15]

T29

B_DDR3_DQM[1]

R28

B_DDR3_DQS[1]

R27

B_DDR3_DQSB[1]

P27

B_DDR3_DQ[16]

Y31

B_DDR3_DQ[17]

V31

B_DDR3_DQ[18]

Y30

B_DDR3_DQ[19]

V32

B_DDR3_DQ[20]

AA30

B_DDR3_DQ[21]

U31

B_DDR3_DQ[22]

AA31

B_DDR3_DQ[23]

V30

B_DDR3_DQM[2]

U30

B_DDR3_DQS[2]

W30

B_DDR3_DQSB[2]

W31

B_DDR3_DQ[24]

V28

B_DDR3_DQ[25]

Y27

B_DDR3_DQ[26]

U27

B_DDR3_DQ[27]

AA28

B_DDR3_DQ[28]

W28

B_DDR3_DQ[29]

AA29

B_DDR3_DQ[30]

V27

B_DDR3_DQ[31]

AA27

B_DDR3_DQM[3]

W27

B_DDR3_DQS[3]

Y28

B_DDR3_DQSB[3]

W29

H5TQ4G63AFR-RDC

IC400

EAN63053201

A0

N3

A1

P7

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

A12/BC

N7

A13

T3

NC_5

M7

BA0

M2

BA1

N8

BA2

M3

CK

J7

CK

K7

CKE

K9

CS

L2

ODT

K1

RAS

J3

CAS

K3

WE

L3

RESET

T2

DQSL

F3

DQSL

G3

DQSU

C7

DQSU

B7

DML

E7

DMU

D3

DQL0

E3

DQL1

F7

DQL2

F2

DQL3

F8

DQL4

H3

DQL5

H8

DQL6

G2

DQL7

H7

DQU0

D7

DQU1

C3

DQU2

C8

DQU3

C2

DQU4

A7

DQU5

A2

DQU6

B8

DQU7

A3

VREFCA

M8

VREFDQ

H1

ZQ

L8

VDD_1

B2

VDD_2

D9

VDD_3

G7

VDD_4

K2

VDD_5

K8

VDD_6

N1

VDD_7

N9

VDD_8

R1

VDD_9

R9

VDDQ_1

A1

VDDQ_2

A8

VDDQ_3

C1

VDDQ_4

C9

VDDQ_5

D2

VDDQ_6

E9

VDDQ_7

F1

VDDQ_8

H2

VDDQ_9

H9

NC_1

J1

NC_2

J9

NC_3

L1

NC_4

L9

A14

T7

VSS_1

A9

VSS_2

B3

VSS_3

E1

VSS_4

G8

VSS_5

J2

VSS_6

J8

VSS_7

M1

VSS_8

M9

VSS_9

P1

VSS_10

P9

VSS_11

T1

VSS_12

T9

VSSQ_1

B1

VSSQ_2

B9

VSSQ_3

D1

VSSQ_4

D8

VSSQ_5

E2

VSSQ_6

E8

VSSQ_7

F9

VSSQ_8

G1

VSSQ_9

G9

H5TQ4G63AFR-RDC

IC401

EAN63053201

A0

N3

A1

P7

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

A12/BC

N7

A13

T3

NC_5

M7

BA0

M2

BA1

N8

BA2

M3

CK

J7

CK

K7

CKE

K9

CS

L2

ODT

K1

RAS

J3

CAS

K3

WE

L3

RESET

T2

DQSL

F3

DQSL

G3

DQSU

C7

DQSU

B7

DML

E7

DMU

D3

DQL0

E3

DQL1

F7

DQL2

F2

DQL3

F8

DQL4

H3

DQL5

H8

DQL6

G2

DQL7

H7

DQU0

D7

DQU1

C3

DQU2

C8

DQU3

C2

DQU4

A7

DQU5

A2

DQU6

B8

DQU7

A3

VREFCA

M8

VREFDQ

H1

ZQ

L8

VDD_1

B2

VDD_2

D9

VDD_3

G7

VDD_4

K2

VDD_5

K8

VDD_6

N1

VDD_7

N9

VDD_8

R1

VDD_9

R9

VDDQ_1

A1

VDDQ_2

A8

VDDQ_3

C1

VDDQ_4

C9

VDDQ_5

D2

VDDQ_6

E9

VDDQ_7

F1

VDDQ_8

H2

VDDQ_9

H9

NC_1

J1

NC_2

J9

NC_3

L1

NC_4

L9

A14

T7

VSS_1

A9

VSS_2

B3

VSS_3

E1

VSS_4

G8

VSS_5

J2

VSS_6

J8

VSS_7

M1

VSS_8

M9

VSS_9

P1

VSS_10

P9

VSS_11

T1

VSS_12

T9

VSSQ_1

B1

VSSQ_2

B9

VSSQ_3

D1

VSSQ_4

D8

VSSQ_5

E2

VSSQ_6

E8

VSSQ_7

F9

VSSQ_8

G1

VSSQ_9

G9

H5TQ4G63AFR-RDC

IC403

EAN63053201

A0

N3

A1

P7

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

A12/BC

N7

A13

T3

NC_5

M7

BA0

M2

BA1

N8

BA2

M3

CK

J7

CK

K7

CKE

K9

CS

L2

ODT

K1

RAS

J3

CAS

K3

WE

L3

RESET

T2

DQSL

F3

DQSL

G3

DQSU

C7

DQSU

B7

DML

E7

DMU

D3

DQL0

E3

DQL1

F7

DQL2

F2

DQL3

F8

DQL4

H3

DQL5

H8

DQL6

G2

DQL7

H7

DQU0

D7

DQU1

C3

DQU2

C8

DQU3

C2

DQU4

A7

DQU5

A2

DQU6

B8

DQU7

A3

VREFCA

M8

VREFDQ

H1

ZQ

L8

VDD_1

B2

VDD_2

D9

VDD_3

G7

VDD_4

K2

VDD_5

K8

VDD_6

N1

VDD_7

N9

VDD_8

R1

VDD_9

R9

VDDQ_1

A1

VDDQ_2

A8

VDDQ_3

C1

VDDQ_4

C9

VDDQ_5

D2

VDDQ_6

E9

VDDQ_7

F1

VDDQ_8

H2

VDDQ_9

H9

NC_1

J1

NC_2

J9

NC_3

L1

NC_4

L9

A14

T7

VSS_1

A9

VSS_2

B3

VSS_3

E1

VSS_4

G8

VSS_5

J2

VSS_6

J8

VSS_7

M1

VSS_8

M9

VSS_9

P1

VSS_10

P9

VSS_11

T1

VSS_12

T9

VSSQ_1

B1

VSSQ_2

B9

VSSQ_3

D1

VSSQ_4

D8

VSSQ_5

E2

VSSQ_6

E8

VSSQ_7

F9

VSSQ_8

G1

VSSQ_9

G9

H5TQ4G63AFR-RDC

IC404

EAN63053201

A0

N3

A1

P7

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

A12/BC

N7

A13

T3

NC_5

M7

BA0

M2

BA1

N8

BA2

M3

CK

J7

CK

K7

CKE

K9

CS

L2

ODT

K1

RAS

J3

CAS

K3

WE

L3

RESET

T2

DQSL

F3

DQSL

G3

DQSU

C7

DQSU

B7

DML

E7

DMU

D3

DQL0

E3

DQL1

F7

DQL2

F2

DQL3

F8

DQL4

H3

DQL5

H8

DQL6

G2

DQL7

H7

DQU0

D7

DQU1

C3

DQU2

C8

DQU3

C2

DQU4

A7

DQU5

A2

DQU6

B8

DQU7

A3

VREFCA

M8

VREFDQ

H1

ZQ

L8

VDD_1

B2

VDD_2

D9

VDD_3

G7

VDD_4

K2

VDD_5

K8

VDD_6

N1

VDD_7

N9

VDD_8

R1

VDD_9

R9

VDDQ_1

A1

VDDQ_2

A8

VDDQ_3

C1

VDDQ_4

C9

VDDQ_5

D2

VDDQ_6

E9

VDDQ_7

F1

VDDQ_8

H2

VDDQ_9

H9

NC_1

J1

NC_2

J9

NC_3

L1

NC_4

L9

A14

T7

VSS_1

A9

VSS_2

B3

VSS_3

E1

VSS_4

G8

VSS_5

J2

VSS_6

J8

VSS_7

M1

VSS_8

M9

VSS_9

P1

VSS_10

P9

VSS_11

T1

VSS_12

T9

VSSQ_1

B1

VSSQ_2

B9

VSSQ_3

D1

VSSQ_4

D8

VSSQ_5

E2

VSSQ_6

E8

VSSQ_7

F9

VSSQ_8

G1

VSSQ_9

G9

C4000
10uF
10V

OPT

C4001
10uF
10V

OPT

C4002
10uF
10V

OPT

C4003
10uF
10V

OPT

C4004
1uF
25V

OPT

C4005
1uF
25V

OPT

C4006
1uF
25V

OPT

C4007
1uF
25V

OPT

C4008

0.1uF
16V

OPT

C4009

0.1uF
16V

OPT

C4010

0.1uF
16V

OPT

C4011

0.1uF
16V

OPT

DDR3 1.5V bypass Cap - Place these caps near Memory

DDR3 1.5V bypass Cap - Place these caps near Memory

DDR3
4Gbit
(x16)

DDR3
4Gbit
(x16)

DDR3 1.5V bypass Cap - Place these caps near Memory

DDR3 1.5V bypass Cap - Place these caps near Memory

DDR3
4Gbit
(x16)

DDR3
4Gbit
(x16)

2013-10-28

LM14 DDR

UB83

04

+1.5V_Bypass Cap
Close to DDR Power Pin

+1.5V_Bypass Cap
Close to DDR Power Pin

+1.5V_Bypass Cap
Close to DDR Power Pin

+1.5V_Bypass Cap
Close to DDR Power Pin

* DDR_VTT

Close to REFOUT pin

4th layer

4th layer

4th layer

4th layer

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only