LG 50PJ350, PB02A Schematic

Page 1
PLASMA TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : PB02A
MODEL : 50PJ350 50PJ350-SA
Internal Use Only
Printed in Korea
P/NO : MFL63140202(1004-REV00)
Page 2
- 2 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
CONTENTS
CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS ...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION ..................................................................................................8
BLOCK DIAGRAM ...................................................................................................................15
EXPLODED VIEW ...................................................................................................................16
SVC. SHEET ................................................................................................................................
Page 3
- 3 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.
It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Due to high vacuum and large surface area of picture tube, extreme care should be used in handling the Picture Tube. Do not lift the Picture tube by it's Neck.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1MΩ and 5.2MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrument's exposed METALLIC PARTS
Good Earth Ground such as WATER PIPE, CONDUIT etc.
AC Volt-meter
IMPORTANT SAFETY NOTICE
0.15uF
Page 4
- 4 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
SPECIFICATIONS
NOTE : Specifications and others are subject to change without notice for improvement
.
1. Application Range
(1) This spec sheet is applied all of PDP TV with PB02A chassis.
2. Specification
Each part is tested as below without special appointment. (1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 °C ± 5 °C (2) Relative Humidity : 65 % ± 10 % (3) Power Voltage : Standard input voltage (100 V - 240 V ~ 50 / 60 Hz)
* Standard Voltage of each product is marked by models
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
BOM.
(5) The receiver must be operated for about 5 minutes prior to the adjustment.
3. Test Method
(1) Performance : LGE TV test method followed. (2) Demanded other specification
Safety : UL, CSA, IEC specification, CE EMC : FCC, ICES, IEC specification, CE
Model Name Market Brand 50PJ350-SA Brazil LG
Model Name Market Appliance 50PJ350-SA Brazil Safety : IEC/EN60065
Page 5
- 5 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
4. General Specification
No Item Specification Remark
1. Receiving System 1) SBTVD / NTSC / PAL-M / PAL-N
2. Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 07-69 (VHF high/UHF)
4) CATV : 02~135
3. Input Voltage 1)AC 100 ~ 240V 50/60Hz
4. Market BRAZIL
5. Screen Size 127 cm (50 inch) Wide(1365 X 768) 50PJ350-SA, 50PJ250-SA 106 cm (42 inch) Wide(1024 X 768) 42PJ350-SA, 42PJ250-SA
42PJ230-SB
6. Aspect Ratio 16:9
7. Tuning System FS
8. Module PDP50T1#### (1365 X 768) 50PJ350-SA, 50PJ250-SA PDP42T1#### (1024 X 768) 42PJ350-SA, 42PJ250-SA
42PJ230-SB
9. Operating Environment 1) Temp : 0 deg ~ 40 deg
2) Humidity : ~ 80 %
10. Storage Environment 1)Temp : -20 deg ~ 60 deg
2) Humidity : 0 ~ 90 %
Page 6
- 6 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
PC DDC
1. 640*350 31.468 70.09 25.17 EGA X
2. 720*400 31.469 70.08 28.32 DOS 0
3. 640*480 31.469 59.94 25.17 VESA(VGA) 0
4. 800*600 37.879 60.31 40.00 VESA(SVGA) 0
5. 1024*768 48.363 60.00 65.00 VESA(XGA) 0
6. 1280*768 47.776 59.870 79.5 CVT(WXGA) 0
7. 1360*768 47.712 60.015 85.50 VESA (WXGA) 0
8. 1280*1024 63.981 60.020 108.00 VESA (SXGA) 0
9. 1600*1200 75.00 60.00 162 VESA (UXGA) 0
10 1920*1080 67.5 60 148.5 HDTV 1080P 0
6. RGB Input (PC)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
1. 720*480 15.73 60 13.5135 SDTV ,DVD 480I
2. 720*480 15.73 59.94 13.5 SDTV ,DVD 480I
3. 720*480 31.50 60 27.027 SDTV 480P
4. 720*480 31.47 59.94 27.0 SDTV 480P
5. 1280*720 45.00 60.00 74.25 HDTV 720P
6. 1280*720 44.96 59.94 74.176 HDTV 720P
7. 1920*1080 33.75 60.00 74.25 HDTV 1080I
8. 1920*1080 33.72 59.94 74.176 HDTV 1080I
9. 1920*1080 67.50 60 148.50 HDTV 1080P
10. 1920*1080 67.432 59.94 148.352 HDTV 1080P
11. 1920*1080 27.00 24.00 74.25 HDTV 1080P
12. 1920*1080 26.97 23.976 74.176 HDTV 1080P
13. 1920*1080 33.75 30.00 74.25 HDTV 1080P
14. 1920*1080 33.71 29.97 74.176 HDTV 1080P
5. Component Input (Y, CB/PB, CR/PR)
Page 7
- 7 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
PC DDC 1 640*350 31.468 70.09 25.17 EGA X 2 720*400 31.469 70.08 28.32 DOS 0 3 640*480 31.469 59.94 25.17 VESA(VGA) 0 4 800*600 37.879 60.31 40.00 VESA(SVGA) 0 5 1024*768 48.363 60.00 65.00 VESA(XGA) 0 6 1280*768 47.776 59.870 79.5 CVT(WXGA) 0 7 1360*768 47.712 60.015 85.50 VESA (WXGA) 0 8 1280*1024 63.981 60.020 108.00 VESA (SXGA) 0 9 1600*1200 75.00 60.00 162 VESA (UXGA) 0
10 1920*1080 67.5 60 148.5 HDTV 1080P 0
DTV 1 720*480 31.50 60 27.027 SDTV 480P 2 720*480 31.47 59.94 27.00 SDTV 480P 3 1280*720 45.00 60.00 74.25 HDTV 720P 4 1280*720 44.96 59.94 74.176 HDTV 720P 5 1920*1080 33.75 60.00 74.25 HDTV 1080I 6 1920*1080 33.72 59.94 74.176 HDTV 1080I 7 1920*1080 67.50 60 148.50 HDTV 1080P 8 1920*1080 67.432 59.94 148.352 HDTV 1080P 9 1920*1080 27.00 24.00 74.25 HDTV 1080P
10 1920*1080 26.97 23.976 74.176 HDTV 1080P 11 1920*1080 33.75 30.00 74.25 HDTV 1080P 12 1920*1080 33.71 29.97 74.176 HDTV 1080P
7. HDMI Input(PC/DTV)
Page 8
- 8 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range
This spec. sheet applies to PB02A Chassis applied PDP TV all models manufactured in TV factory.
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation transformer will help protect test instrument.
(2) Adjustment must be done in the correct order. But it is
flexible when its factory local problem occurs.
(3) The adjustment must be performed in the circumstance of
25 cC ± 5 cC of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep 100 V - 240 V,
50 / 60 Hz.
(5) Before adjustment, execute Heat-Run for 5 minutes.
V After Receive 100% Full white pattern (06CH) then
process Heat-run
(or “8. Test pattern” condition of Ez-Adjust status)
V How to make set white pattern
1) Press Power ON button of Service Remocon
2) Press ADJ button of Service remocon. Select “10. Test pattern” and, after select “White” using navigation button, and then you can see 100% Full White pattern.
* In this status you can maintain Heat-Run useless any
pattern generator
* Notice: if you maintain one picture over 20 minutes
(Especially sharp distinction black with white pattern – 13Ch, or Cross hatch pattern – 09Ch) then it can appear image stick near black level.
3. Adjustment items
3-1. PCB Assembly adjustment
(1) Adjust 480i Comp1 (2) Adjust 1080p Comp1/RGB
- If it is necessary, it can adjustment at Manufacture Line
- You can see set adjustment status at “9. ADJUST CHECK” of the “In-start menu”
3-2. Set Assembly Adjustment
(1) EDID (The Extended Display Identification Data ) (2) Color Temperature (White Balance) Adjustment (3) Make sure RS-232C control (4) Selection Factory output option
4. PCB Assembly Adjustment
4-1. Using RS-232C
- Adjust 3 items at 3-1 PCB assembly adjustments “ (3) Adjustment sequence” one after the order.
(1) Adjustment protocol
(2) Necessary items before Adjustment items
O Pattern Generator : (MSPG-925FA) O Adjust 480i Comp1
(MSPG-925FA:model :209, pattern :65) – Comp1 Mode
O Adjust 1080p Comp1
(MSPG-925FA:model :225 , pattern :65) – Comp1 Mode
O Addjust RGB (MSPG-925FA:model :225 , pattern :65)
– RGB-PC Mode
* If you want more information then see the below Adjustment
method (Factory Adjustment)
(3) Adjustment sequence
O aa 00 00: Enter the ADC Adjustment mode. O xb 00 40: Change the mode to Component1 (No actions) O ad 00 10: Adjust 480i Comp O ad 00 10: Adjust 1080p comp O xb 00 60: Change to RGB-PC mode(No action) O ad 00 10: Adjust 1080p RGB O xb 00 90: Endo of Adjustmennt
< See ADC Adjustment RS232C Protocol_Ver1.0 >
Page 9
5. Factory Adjustment
-> PB02A : USE INTERNAL ADC(S7) : using internal pattern.
5-1. Auto Adjust Component
480i/1080p RGB 1080p
(1) Summary : Adjustment component 480i/1080i and RGB
1080p is Gain and Black level setting at Analog to Digital converter, and compensate the RGB deviation
(2) Using instrument
1) Adjustment remocon, 801GF(802B, 802F, 802R) or MSPG925FA pattern generator
(It can output 480i/1080i horizontal 100 % color bar pattern signal, and its output level must setting
0.7 V ± 0.1 V p-p correctly)
* You must make it sure its resolution and pattern cause every
instrument can have different setting
2) Adjustment method 480i Comp1, Adjust 1080p Comp1/RGB (Factory adjustment)
O ADC 480i Component1 adjustment -
- Check connection of Component1
- MSPG-925FA Ë Model: 209, Pattern 65
O Set Component 480i mode and 100% Horizontal
Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL”
O ADC 1080p Component1 / RGB adjustment
- Check connection both of Component1 and RGB
- MSPG-925FA Ë Model: 225, Pattern 65
O Set Component 1080p mode and 100% Horizontal
Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL”
O After get each the signal, wait more a second and
enter the “IN-START” with press IN-START key of Service remocon. After then select “7. External ADC” with navigator button and press “Enter”.
O After Then Press key of Service remocon “Right
Arrow(VOL+)”
O You can see “ADC Component1 Success” O Component1 1080p, RGB 1080p Adjust is same
method.
O Component 1080p Adjustment in Component1 input
mode
O RGB 1080p adjustment in RGB input mode O If you success RGB 1080p Adjust. You can see “ADC
RGB-DTV Success”
Caution : Set Volume 0 after adjustment
5-2. Use Internal ADC(S7)
- ADJ(EZ ADJUST) -> 6.ADC Calibration -> ADC Calibration(START)
5-3. EDID(The Extended Display
Identification Data) / DDC(Display Data Channel) download
(1) Summary
1) It is established in VESA, for communication between PC and Monitor without order from user for building user condition. It helps to make easily use realize “Plug and Play” function.
2) For EDID data write, we use DDC2B protocol.
5-4. Auto Download
(1) After enter Service Mode by pushing “ADJ” key, (2) Enter EDID D/L mode. (3) Enter “START” by pushing “OK” key.
Caution
- Never connect HDMI & D-sub Cable when the user downloading .
- Use the proper cables below for EDID Writing.
- 9 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
< Adjustment pattern : 480i / 1080p 60Hz Pattern >
Page 10
* Edid data and Model option download(RS232)
5-5. Manual Download
(1) Write HDMI EDID data
1) Using instruments
- Jig. (PC Serial to D-Sub connection) for PC, DDC adjustment.
- S/W for DDC recording (EDID data write and read)
- D-sub jack
- Additional HDMI cable connection Jig.
2) Preparing and setting.
- Set instruments and Jig. Like pic.5), then turn on PC and Jig.
- Operate DDC write S/W (EDID write & read)
- It will operate in the DOS mode.
- EDID data (Model name = LG TV)
- 2010 EDID DATA CHECK SUM.
- 10 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
BLOCK(0) BLOCK(1)
HD HDMI1 3B 2C
HDMI2 3B 1C HDMI3 3B 0C
RGB A3 25
FHD HDMI1 3B 2C
HDMI2 3B 1C HDMI3 3B 0C HDMI4 3B FC
RGB A3 25
< For write EDID data, setting Jig and another instruments >
Page 11
* See Working Guide if you want more information about EDID
communication.
5-6. Adjustment Color Temperature
(White balance)
(1) Using Instruments
1) Color Analyzer: CA-210 (CH 9)
- Using LCD color temperature, Color Analyzer (CA-
210) must use CH 9, which Matrix compensated (White, Red, Green, Blue compensation) with CS-
2100. See the Coordination bellowed one.
2) Auto-adjustment Equipment (It needs when Auto­adjustment – It is availed communicate with RS-232C : Baud rate: 115200)
3) Video Signal Generator MSPG-925F 720p, 216Gray (Model: 217, Pattern 78)
(2) Connection Diagram (Auto Adjustment)
1) Using Inner Pattern
2) Using HDMI input
(3) White Balance Adjustment
- If you can’t adjust with inner pattern, then you can adjust it using HDMI pattern. You can select option at “Ez-Adjust Menu – 7. White Balance” there items “NONE, INNER, HDMI”. It is normally setting at inner basically. If you can’t adjust using inner pattern you can select HDMI item, and you can adjust.
- In manual Adjust case, if you press ADJ button of service remocon, and enter “Ez-Adjust Menu – 7. White Balance”, then automatically inner pattern operates. (In case of “Inner” originally “Test-Pattern. On” will be selected in The “Test-Pattern. On/Off”.
O Connect all cables and equipments like Pic.5) O Set Baud Rate of RS-232C to 115200. It may set
115200 orignally.
O Connect RS-232C cable to set O Connect HDMI cable to set
V RS-232C COMMAND(Commonly apply)
O wb 00 00”: Start Auto-adjustment of white balance. O “wb 00 10”: Start Gain Adjustment (Inner pattern) O “jb 00 c0” : O O “wb 00 1f”: End of Adjustment
* If it needs, offset adjustment (wb 00 20-start, wb 00 2f-
end)
O “wb 00 ff”: End of white balance adjustment (inner
pattern disappear)
- 11 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
RS-232C COMMAND [CMD ID DATA] Meaning wb 00 00 White Balance adjustment start. wb 00 10 Start of adjust gain
(Inner white pattern) wb 00 1f End of gain adjust wb 00 20 Start of offset adjust
(Inner white pattern) wb 00 2f End of offset adjust wb 00 ff End of White Balance adjust
(Inner pattern disappeared)
< Connection Diagram for Adjustment White balance >
Page 12
V Adjustment Mapping information
O When Color temperature (White balance) Adjustment
(Automatically)
- Press “Power only key” of service remocon and operate automatically adjustment.
- Set BaudRate to 115200.
O You must start “wb 00 00” and finish it “wb 00 ff”. O If it needs, then adjustment “Offset”.
(4) White Balance Adjustment (Manual adjustment)
1) Test Equipment: CA-210
- Using PDP color temperature, Color Analyzer (CA-
210) must use CH 10, which Matrix compensated (White, Red, Green, Blue compensation) with CS-
2100. See the Coordination bellowed one.
2) Manual adjustment sequence is like bellowed one.
- Turn to “Ez-Adjust” mode with press ADJ button of service remocon.
- Select “10.Test Pattern” with CH+/- button and press enter. Then set will go on Heat-run mode. Over 30 minutes set let on Heat-run mode.
- Let CA-210 to zero calibration and must has gap more 10cm from center of PDP module when adjustment.
- Press “ADJ” button of service remocon and select “7.White-Balance” in “Ez-Adjust” then press “
G” button
of navigation key. (When press “
G” button then set will
go to full white mode)
- Adjust at three mode (Cool, Medium, Warm)
- If “cool” mode
Let B-Gain to 192 and R, G, B-Cut to 64 and then control R, G gain adjustment High Light adjustment.
- If “Medium” and “Warm” mode Let R-Gain to 192 and
R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment.
- All of the three mode
Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment.
- With volume button (+/-) you can adjust.
- After all adjustment finished, with Enter (_ key) turn to
Ez-Adjust mode. Then with ADJ button, exit from adjustment mode
* Attachment: White Balance adjustment coordination and color
temperature.
O Using CS-1000 Equipment.
- COOL : T=11000K, _uv=0.000, x=0.276 y=0.283
- MEDIUM : T=9300K, _uv=0.000, x=0.285 y=0.293
- WARM : T=6500K, _uv=0.000, x=0.313 y=0.329
O Using CA-210 Equipment. (10 CH)
- Contras value : 216 Gray
- Brighness spec.
6. Test of RS-232C control.
- Press In-Start button of Service Remocon then set the “4.Baud Rate” to 115200. Then check RS-232C control and
7. Selection of Country option.
- Selection of country option is allowed only North American model (Not allowed Korean model). It is selection of Country about Rating and Time Zone.
(1) Models: All models which PB82C Chassis (See the first
page.)
(2) Press “In-Start” button of Service Remocon, then enter the
“Option” Menu with “PIP CH-“ Button
(3) Select one of these three (USA, CANADA, MEXICO)
defends on its market using “Vol. +/-“button.
Caution : Don’t push The INSTOP KEY after completing the
function inspection
Caution : Inspection only PAL M
- 12 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Color Test Color Coordination
temperature Equipment x y
COOL CA-210 0.276±0.002 0.283±0.002
MEDIUM CA-210 0.285±0.002 0.293±0.002
WARM CA-210 0.313±0.002 0.329±0.002
Item Min Typ Max Unit Remark White 49 60 - cd/m - 100%Window White average Pattern brightness - 100IRE(255Gray)
- Picture: Vivid(Medium ) Brightness -20 +20 % - 85IRE(216Gray) 100% uniformity Window White Pattern
- Picture: Vivid(Medium)
RS-232C COMMAND
CENTER
[CMD ID DATA] MIN (DEFAULT) MAX
Cool Mid Warm Cool Mid Warm R Gain jg Ja jd 00 184 192 192 192 G Gain jh Jb je 00 187 183 159 192 B Gain ji Jc jf 00 192 161 95 192
R Cut 64 64 64 127
G Cut 64 64 64 127
B Cut 64 64 64 127
Page 13
8. GND and ESD Testing
8-1. Prepare GND and ESD Testing.
- Check the connection between set and power cord
8-2. Operate GND and ESD auto-test.
(1) Fully connected (Between set and power cord) set enter
the Auto-test sequence. (2) Connect D-Jack AV jack test equipment. (3) Turn on Auto-controller(GWS103-4) (4) Start Auto GND test. (5) If its result is NG, then notice with buzzer. (6) If its result is OK, then automatically it turns to ESD Test. (7) Operate ESD test (8) If its result is NG, then notice with buzzer. (9) If its result is OK, then process next steps. Notice it with
Good lamp and STOPER Down.
8-3. Check Items.
(1) Test Voltage
GND: 1.5KV/min at 100mA
Signal: 3KV/min at 100mA (2) Test time: just 1 second. (3) Test point
GND test: Test between Power cord GND and Signal cable
metal GND.
ESD test: Test between Power cord GND and Live and
neutral. (4) Leakage current: Set to 0.5mA(rms)
9. POWER PCB Ass’y Voltage Adjustment
(Va/Vs Voltage Adjustment)
(1)Test equipment : D.M.M 1EA (2) Connection Diagram for Measuring : refer to fig.1
9-1. Adjustment method
(1) Vs adjustment (refer fig.1)
1) Connect + terminal of D.M.M. to Vs pin of P812(42”:P811), connect -terminal to GND pin of P812(42”:P811)
2) After turning VR901, voltage of D.M.M adjustment as same as Vs voltage which on label of panel left/top ( deviation ; ±0.5V)
(2) Va adjustment (refer fig.1)
1) After receiving 100% Full White Pattern, HEAT RUN.
2) Connect + terminal of D.M.M. to Va pin of P812(42”:P811), connect -terminal to GND pin of P811(42”:P812).
3) After turning VR502,voltage of D.M.M adjustment as same as Va voltage which on label of panel left/top (deviation; ±0.5V)
10. Default Service option.
10-1. ADC-Set.
V R-Gain adjustment Value (default 128) V G-Gain adjustment Value (default 128) V B-Gain adjustment Value (default 128) V R-Offset adjustment Value (default 128) V G-Offset adjustment Value (default 128) V B-Offset adjustment Value (default 128)
10-2. White balance. Value.
10-3. Temperature Threshold
V Threshold Down Low 20 V Threshold Up Low 23 V Threshold Down High 70 V Threshold Up High 75
- 13 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
< fig.1 : 50HD Power PCB Assy Voltage adjustment >
CENTER (DEFAULT)
Cool Mid Warm R Gain 192 192 192 G Gain 192 192 192 B Gain 192 192 192 R Cut 64 64 64 G Cut 64 64 64 B Cut 64 64 64
Page 14
11. USB DOWNLOAD (*.epk file download)
V Put the USB Stick to the USB socket V Press Menu key, and move OPTION
V Press “FAV” Press 7 times.
V Select download file (epk file)
V After download is finished, remove the USB stick.
V Press “IN-START” key of ADJ remote control, check the
S/W version.
CAUTION
- DO NOT REMOVE USB MEMORY CARD FROM USB PORT WHEN YOU FIND BELOW DESCRIPTION
- " Do not remove the memory card from the port! "
- 14 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Page 15
- 15 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM
Page 16
- 16 -
LGE Internal Use Only
EXPLODED VIEW
Copyright ©2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
200
580
400
300
900
120
590
604
202
520
204
602
206
203
208
302
501
301
303
205
305
201
240
207
601
302
910
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
A2
A10
A9
LV1
A12
Page 17
VCC_1.5V_DDR
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
R1201
1K 1%
R1202
1K 1%
0. 1uF 1000 pF
C1202
C1201
CLose t o DDR3
A-MVREFDQ
VCC_1.5V_DDR
R1204
1K 1%
0. 1uF
R1205
1K 1%
C1204
C1203
CLo se t o Sa turn 7M I C
1000 pF
VCC_1.5V_DDR
0. 1uF
C1249
C1250
R1227
1K 1%
R1228
1K 1%
VCC_1.5V_DDR
VCC_1.5V_DDR
A-MVREFCA
1000 pF
10uF
C1205
0. 1uF
C1206
Clo se t o DD R Po wer Pin
DDR 3 1. 5V B y CAP - P lace thes e Ca ps n ear M emor y
C1216
0. 1uF
0. 1uF
C1207
C1208
C1212
0. 1uF
0. 1uF
0. 1uF
0. 1uF C1211
C1210
0. 1uF
0. 1uF
0. 1uF C1215
C1214
C1213
0. 1uF
C1217
C1218
DDR 3 1. 5V B y CAP - P lace thes e Ca ps n ear M emor y
0. 1uF
0. 1uF
0. 1uF
C1219
0. 1uF
C1220
C1221
C1222
0. 1uF
0. 1uF
0. 1uF C1223
C1224
0. 1uF
0. 1uF
0. 1uF C1229
C1228
C1227
0. 1uF
0. 1uF
0. 1uF C1230
0. 1uF
C1232
C1231
C1235
0. 1uF
0. 1uF C1234
C1233
0. 1uF
0. 1uF
0. 1uF C1236
0. 1uF
C1238
C1237
C1239
0. 1uF
0. 1uF
0. 1uF C1242
C1241
C1243
Clo se t o DD R Po wer Pin
VCC_1.5V_DDR
R1224
1K 1%
B-MVREFCA
0. 1uF
10uF
0. 1uF
0. 1uF C1244
C1246
C1245
1000 pF
C1247
C1248
CLo se t o Sa turn 7M I C
B-MVREFDQ
R1225
1K 1%
CLose t o DDR3
A-MVREFCA
A-MVREFDQ
VCC_1.5V_DDR
R1203
240
1%
IC12 01
H5TQ1G63BFR-H9C
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
A10/AP
A12/BC
BA0
BA1
BA2
CKE
ODT
RAS
CAS
RESET
DQSL
DQSL
DQSU
DQSU
DML
DMU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
+1.5V_DDR_IN
VCC_1.5V_DDR
L1201
C1225
C1226
A-MA0
A-MA2
A-MA11
A-MA1
A-MA8
A-MCK
A-MCKB
A-MA6
A-MBA0
A-MA3
A-MA5
A-MA7
A-MA4
A-MA12
A-MBA1
A-MA10
A-MRESETB
A-MBA2
A-MA13
A-MA9
A-MCK
A-MCKB
A-MRASB
A-MCASB
A-MODT
A-MWEB
A-MDQSL
A-MDQSLB
A-MDQSU
A-MDQSUB
A-MDQL1
A-MDQL3
A-MDML
A-MDQU2
A-MCKE
A-MDQL7
A-MDQL5
A-MDQL0
A-MDQL2
A-MDQL6
A-MDQL4
A-MDQU7
A-MDQU3
A-MDQU5
A-MDMU
A-MDQU6
A-MDQU0
A-MDQU4
A-MDQU1
A-MCKE
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
R7
A11
N7
T3
A13
M7
A15
M2
N8
M3
J7
CK
K7
CK
K9
L2
CS
K1
J3
K3
L3
WE
T2
F3
G3
C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
A-MA0
A-MA1
A-MA2
A-MA3
A-MA4
A-MA5
A-MA6
A-MA7
A-MA8
A-MA9
A-MA10
A-MA11
A-MA12
A-MA13
A-MBA0
A-MBA1
A-MBA2
A-MCKE
A-MODT
A-MRASB
A-MCASB
A-MWEB
A-MRESETB
A-MDQSL
A-MDQSLB
A-MDQSU
A-MDQSUB
A-MDML
A-MDMU
A-MDQL0
A-MDQL1
A-MDQL2
A-MDQL3
A-MDQL4
A-MDQL5
A-MDQL6
A-MDQL7
A-MDQU0
A-MDQU1
A-MDQU2
A-MDQU3
A-MDQU4
A-MDQU5
A-MDQU6
A-MDQU7
56
C1209
R1235
0. 01u F
56
R1236
VCC_1.5V_DDR
R1231 10K
R1213
R1214
AR1208
10
AR1203
10
AR1204
10
AR1201
10
R1206
10
R1207
10
AR1202
10
R1208
10
R1209
10
R1211
R1212
AR1209
10
AR1210
10
AR1205
10
AR1206
10
AR1207
10
R1210
10
10
10
10
10
A-TMA0
A-TMA2
A-TMA11
A-TMA1
A-TMA8
A-TMA6
A-TMBA0
A-TMA3
A-TMA5
A-TMA7
A-TMA4
A-TMA12
A-TMBA1
A-TMA10
A-TMRESETB
A-TMBA2
A-TMA13
A-TMA9
A-TMCK
A-TMCKB
A-TMRASB
A-TMCASB
A-TMODT
A-TMWEB
A-TMDQSL
A-TMDQSLB
A-TMDQSU
A-TMDQSUB
A-TMDQL1
A-TMDQL3
A-TMDML
A-TMDQU2
A-TMCKE
A-TMDQL7
A-TMDQL5
A-TMDQL0
A-TMDQL2
A-TMDQL6
A-TMDQL4
A-TMDQU7
A-TMDQU3
A-TMDQU5
A-TMDMU
A-TMDQU6
A-TMDQU0
A-TMDQU4
A-TMDQU1
10KR1233
A-TMA0
A-TMA1
A-TMA2
A-TMA3
A-TMA4
A-TMA5
A-TMA6
A-TMA7
A-TMA8
A-TMA9
A-TMA10
A-TMA11
A-TMA12
A-TMA13
A-TMBA0
A-TMBA1
A-TMBA2
A-TMCK
A-TMCKB
A-TMCKE
A-TMODT
A-TMRASB
A-TMCASB
A-TMWEB
A-TMRESETB
A-TMDQSL
A-TMDQSLB
A-TMDQSU
A-TMDQSUB
A-TMDML
A-TMDMU
A-TMDQL0
A-TMDQL1
A-TMDQL2
A-TMDQL3
A-TMDQL4
A-TMDQL5
A-TMDQL6
A-TMDQL7
A-TMDQU0
A-TMDQU1
A-TMDQU2
A-TMDQU3
A-TMDQU4
A-TMDQU5
A-TMDQU6
A-TMDQU7
LGE101D (S 7 Non_Tcon/R M)
B8
A_DDR3_A0/DDR2_A13
B9
A_DDR3_A1/DDR2_A8
A8
A_DDR3_A2/DDR2_A9
C21
A_DDR3_A3/DDR2_A1
B10
A_DDR3_A4/DDR2_A2
A22
A_DDR3_A5/DDR2_A10
A10
A_DDR3_A6/DDR2_A4
B22
A_DDR3_A7/DDR2_A3
C9
A_DDR3_A8/DDR2_A6
C23
A_DDR3_A9/DDR2_A12
B11
A_DDR3_A10/DDR2_RASZ
A9
A_DDR3_A11/DDR2_A11
C10
A_DDR3_A12/DDR2_A0
B23
A_DDR3_A13/DDR2_A7
B21
A_DDR3_BA0/DDR2_BA2
A11
A_DDR3_BA1/DDR2_CASZ
A23
A_DDR3_BA2/DDR2_A5
A12
A_DDR3_MCLK/DDR2_MCLK
C11
A_DDR3_MCLKZ/DDR2_MCLKZ
B12
A_DDR3_CKE/DDR2_DQ5
C20
A_DDR3_ODT/DDR2_ODT
A20
A_DDR3_RASZ/DDR2_WEZ
B20
A_DDR3_CASZ/DDR2_BA1
A21
A_DDR3_WEZ/DDR2_BA0
C22
A_DDR3_RESETB
C16
A_DDR3_DQSL/DDR2_DQS0
B16
A_DDR3_DQSLB/DDR2_DQSB0
A16
A_DDR3_DQSU/DDR2_DQSB1
C15
A_DDR3_DQSUB/DDR2_DQS1
A14
A_DDR3_DML//DDR2_DQ13
B18
A_DDR3_DMU/DDR2_DQ6
C18
A_DDR3_DQL0/DDR2_DQ3
B13
A_DDR3_DQL1/DDR2_DQ7
A19
A_DDR3_DQL2/DDR2_DQ1
C13
A_DDR3_DQL3/DDR2_DQ10
C19
A_DDR3_DQL4/DDR2_DQ4
A13
A_DDR3_DQL5/DDR2_DQ0
B19
A_DDR3_DQL6/DDR2_CKE
C12
A_DDR3_DQL7/DDR2_DQ2
A15
A_DDR3_DQU0/DDR2_DQ15
A17
A_DDR3_DQU1/DDR2_DQ9
B14
A_DDR3_DQU2/DDR2_DQ8
C17
A_DDR3_DQU3/DDR2_DQ11
B15
A_DDR3_DQU4/DDR2_DQM1
A18
A_DDR3_DQU5/DDR2_DQ12
C14
A_DDR3_DQU6/DDR2_DQM0
B17
A_DDR3_DQU7/DDR2_DQ14
10uF
0. 1uF
10V
16V
IC10 1
B_DDR3_A0/DDR2_A13
B_DDR3_A1/DDR2_A8
B_DDR3_A2/DDR2_A9
B_DDR3_A3/DDR2_A1
B_DDR3_A4/DDR2_A2
B_DDR3_A5/DDR2_A10
B_DDR3_A6/DDR2_A4
B_DDR3_A7/DDR2_A3
B_DDR3_A8/DDR2_A6
B_DDR3_A9/DDR2_A12
B_DDR3_A10/DDR2_RASZ
B_DDR3_A11/DDR2_A11
B_DDR3_A12/DDR2_A0
B_DDR3_A13/DDR2_A7
B_DDR3_BA0/DDR2_BA2
B_DDR3_BA1/DDR2_CASZ
B_DDR3_BA2/DDR2_A5
B_DDR3_MCLK/DDR2_MCLK
B_DDR3_MCLKZ/DDR2_MCLKZ
B_DDR3_CKE/DDR2_DQ5
B_DDR3_ODT/DDR2_ODT
B_DDR3_RASZ/DDR2_WEZ
B_DDR3_CASZ/DDR2_BA1
B_DDR3_WEZ/DDR2_BA0
B_DDR3_RESETB
B_DDR3_DQSL/DDR2_DQS0
B_DDR3_DQSLB/DDR2_DQSB0
B_DDR3_DQSU/DDR2_DQSB1
B_DDR3_DQSUB/DDR2_DQS1
B_DDR3_DML/DDR2_DQ13
B_DDR3_DMU/DDR2_DQ6
B_DDR3_DQL0/DDR2_DQ3
B_DDR3_DQL1/DDR2_DQ7
B_DDR3_DQL2/DDR2_DQ1
B_DDR3_DQL3/DDR2_DQ10
B_DDR3_DQL4/DDR2_DQ4
B_DDR3_DQL5/DDR2_DQ0
B_DDR3_DQL6/DDR2_CKE
B_DDR3_DQL7/DDR2_DQ2
B_DDR3_DQU0/DDR2_DQ15
B_DDR3_DQU1/DDR2_DQ9
B_DDR3_DQU2/DDR2_DQ8
B_DDR3_DQU3/DDR2_DQ11
B_DDR3_DQU4/DDR2_DQM1
B_DDR3_DQU5/DDR2_DQ12
B_DDR3_DQU6/DDR2_DQM0
B_DDR3_DQU7/DDR2_DQ14
A25
B24
A24
P25
C24
P26
B26
R24
B25
T26
D24
A26
C25
T25
P24
C26
R26
D26
D25
E24
N25
M26
N24
N26
R25
J2 5
J2 4
H26
H25
F26
L24
L25
F24
L26
F25
M25
E26
M24
E25
G26
J2 6
G24
K25
H24
K26
G25
K24
B-TMA0
B-TMA1
B-TMA2
B-TMA3
B-TMA4
B-TMA5
B-TMA6
B-TMA7
B-TMA8
B-TMA9
B-TMA10
B-TMA11
B-TMA12
B-TMA13
B-TMBA0
B-TMBA1
B-TMBA2
B-TMCK
B-TMCKB
B-TMCKE
B-TMODT
B-TMRASB
B-TMCASB
B-TMWEB
B-TMRESETB
B-TMDQSL
B-TMDQSLB
B-TMDQSU
B-TMDQSUB
B-TMDML
B-TMDMU
B-TMDQL0
B-TMDQL1
B-TMDQL2
B-TMDQL3
B-TMDQL4
B-TMDQL5
B-TMDQL6
B-TMDQL7
B-TMDQU0
B-TMDQU1
B-TMDQU2
B-TMDQU3
B-TMDQU4
B-TMDQU5
B-TMDQU6
B-TMDQU7
B-TMA0
B-TMA2
B-TMA11
B-TMA1
B-TMA8
B-TMA6
B-TMBA0
B-TMA3
B-TMA5
B-TMA7
B-TMA4
B-TMA12
B-TMBA1
B-TMA10
B-TMRESETB
B-TMBA2
B-TMA13
B-TMA9
B-TMCK
B-TMCKB
B-TMRASB
B-TMCASB
B-TMODT
B-TMWEB
B-TMDQSL
B-TMDQSLB
B-TMDQSU
B-TMDQSUB
B-TMDQL1
B-TMDQL3
B-TMDML
B-TMDQU2
B-TMCKE
B-TMDQL7
B-TMDQL5
B-TMDQL0
B-TMDQL2
B-TMDQL6
B-TMDQL4
B-TMDQU7
B-TMDQU3
B-TMDQU5
B-TMDMU
B-TMDQU6
B-TMDQU0
B-TMDQU4
B-TMDQU1
R1215
10
R1216
10
AR1211
10
AR1214
10
AR1215
10
AR1219
10
R1222
10
R1223
10
AR1220
10
R1219
10
R1220
10
R1217
10
R1218
10
AR1212
10
AR1213
10
AR1216
10
AR1217
10
AR1218
10
R1221
10
10K R1234
B-MA0
B-MA2
B-MA11
B-MA1
B-MA8
B-MA6
B-MBA0
B-MA3
B-MA5
B-MA7
B-MA4
B-MA12
B-MBA1
B-MA10
B-MRESETB
B-MBA2
B-MA13
B-MA9
B-MCK
B-MCKB
B-MRASB
B-MCASB
B-MODT
B-MWEB
B-MDQSL
B-MDQSLB
B-MDQSU
B-MDQSUB
B-MDQL1
B-MDQL3
B-MDML
B-MDQU2
B-MCKE
B-MDQL7
B-MDQL5
B-MDQL0
B-MDQL2
B-MDQL6
B-MDQL4
B-MDQU7
B-MDQU3
B-MDQU5
B-MDMU
B-MDQU6
B-MDQU0
B-MDQU4
B-MDQU1
B-MCK
B-MCKB
VCC_1.5V_DDR
B-MCKE
C1240
0. 01u F
R1232
10K
56
R1237
56
R1238
B-MODT
B-MRASB
B-MCASB
B-MWEB
B-MRESETB
B-MDQSL
B-MDQSLB
B-MDQSU
B-MDQSUB
B-MDML
B-MDMU
B-MDQL0
B-MDQL1
B-MDQL2
B-MDQL3
B-MDQL4
B-MDQL5
B-MDQL6
B-MDQL7
B-MDQU0
B-MDQU1
B-MDQU2
B-MDQU3
B-MDQU4
B-MDQU5
B-MDQU6
B-MDQU7
B-MA0
B-MA1
B-MA2
B-MA3
B-MA4
B-MA5
B-MA6
B-MA7
B-MA8
B-MA9
B-MA10
B-MA11
B-MA12
B-MA13
B-MBA0
B-MBA1
B-MBA2
B-MCKE
IC12 02
H5TQ1G63BFR-H9C
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
NC_1
NC_2
NC_3
NC_4
NC_6
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
M8
H1
L8
ZQ
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
B-MVREFCA
B-MVREFDQ
R1226
240 1%
VCC_1.5V_DDR
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX61373301
DDR
09/04/ 0 2
1 2 1 3
Page 18
USB1 SIDE
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Ca pac ito rs on VBU SA sho uld be pl a ce d a s cl o sd t o c on ne c to r a s po s si bl e .
250 _350
4000-4-BU-AJK
2011P
1234
MAERTS NWOD BSU
10mm
5
USB2 REAR(SVC)
C1122 10uF 16V
250 _350
USB1_OCD
C1116 100u F 16V 250 _350
D1100 CDS3C05HDMI1
5. 6V READY
R1129
10K
250 _350
22R1124
250 _350
D1102 CDS3C05HDMI1
5. 6V READY
+3. 3V
SWITCH ADDED
250_350
IC1101
AP2191SG-13
NC
8
OUT_2
7
$0 .1 1
OUT_1
6
FLG
5
+3. 3V
1
2
3
4
READY
IN_1
IN_2
EN
250 _350
22R1145
USB1_CTL
R1141
10K
GND
P_+5V
C1120
0. 1u F 16V
25 0_3 50
USB1_DM_to_MAIN
USB1_DP_to_MAIN
KJA-U B-0-0 037
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
0LCML00003B
MLB- 201209 -0120P -N2
PJ2 30
JK110 0
1
2
3
4
5
L11 00
+5V
C1121
0. 1u F 16V
D1101
CDS3C05HDMI1
5. 6V READY
D1103
CDS3C05HDMI1
5. 6V READY
USB2_DM_to_MAIN
USB2_DP_to_MAIN
EAX61373301
USB HUB
1 1 1 3
Page 19
JK1 001
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
PP J23 7-0 1
[RD1]E-LUG
6C
[RD1]O-SPRI NG
5C
[RD1]CONTACT
4C
[WH1]O-SPRING
5B
[YL1]CONTACT
4A
[YL1]O-SP RING
5A
[YL1]E-LUG
6A
[RD2]E-LUG
6H
[RD2]O- SPRING_2
5H
[RD2]CONTACT
4H
[WH2]O-SPRING
5G
[RD2]O- SPRING_1
5F
[RD2] E-LUG- S
7F
[BL2]O- SPRING
5E
[BL2 ]E-LUG- S
7E
[GN2]CONTACT
4D
[GN2]O-SPRING
5D
[GN2]E-LUG
6D
[RD3]E-LUG
6N
[RD3]O- SPRING_2
5N
[RD3]CONTACT
4N
[WH3]O-SPRING
5M
[RD3]O- SPRING_1
5L
[RD3] E-LUG- S
7L
[BL3]O- SPRING
5K
[BL3 ]E-LUG- S
7K
[GN3]CONTACT
4J
[GN3]O-SPRING
5J
[GN3]E-LUG
6J
D1003
5.6 V
D1004
5.6 V
D1005
30V
D1006
5.6 V
D1007
5.6 V
D1008 30V
D1009
30V
D1010 30V
D1011
5.6 V
D1012
5.6 V
D1013 30V
D1014 30V
D1015
30V
R1060 0
1/16W 5%
R1061 0
1/16W 5%
R1063 0
1/16W 5%
R1064 0
1/16W 5%
R1065 0
1/16W 5%
R1062 0
1/16W 5%
R1010 470K
R1011 470K
R1014 75
R1013 75
R1012 75
R1021 75
R1015 470K
R1016 470K
R1005
75
R1018 470K
R1004 470K
R1020 75
R1022
75
READY
READY
READY
820p F
C1018 47pF 50V
C1032 820p F 50V
READY
C1033 10pF 50V
READY
C1025 10pF 50V
READY
C1027 820p F 50V
C1028 820p F 50V
C1029 10pF 50V
C1030 10pF 50V
C1031 10pF 50V
C1020
820p F
50V
C1021
50V
C1017 820p F 50V
C1026 10pF 50V
R1027 10K
R1028 10K
R1025 10K
R1026 10K
R1029
R1030
SIDE CVBS
250 _350
5A
[YL]E-LUG
4A
[YL]O-SPRING
3A
[YL]CONTACT
4B
[WH]O-SPRING
3C
[RD]CONTACT
4C
[RD]O-SPRING
5C
R1031
12K
R1032
12K
R1033
12K
R1034 12K
10K
R1035
12K
10K
R1006 12K
AV_RIN
AV_LIN
AV_CVBS_IN
COMP2_RIN
COMP2_LIN
COMP2_Pr+
COMP2_Pr-
COMP2_Pb+
COMP2_Pb-
COMP2_Y+
COMP2_Y-
COMP1_RIN
COMP1_LIN
COMP1_Pr+
COMP1_Pr-
COMP1_Pb+
COMP1_Pb-
COMP1_Y+
COMP1_Y-
+3.3V_AVDD
R1023
10K
D1002
C1019 100p F
5.6 V 50V
READY
COMPONENT 2
+3.3V_AVDD
R1000
10K
R1001 1K
D1000
5.6 V
COMPONENT 1
+3.3V_AVDD
R1002
10K
D1001
5.6 V
R1003 1K
R1024
1K
AV 1
AV_CVBS_DET
COMP2_DET
COMP1_DET
PPJ 235 -01
JK100 2
[RD]E-LUG
SPDIF
SPDIF_OUT
GND
NL17SZ00DFT2G
1A5
NAND
B
2
GATE
3
IC1000
VCC
R1055 100
Y
4
R1051 100
READY
+3. 3V
R1058
1K
D1020
D1021
D1019
R1036
30V
C1022 22pF
+3. 3V
10K
8301R
7301R
+3. 3V
C1023
0. 1uF 50V
D1022
30V
C1013
0. 1uF 16V
R1040 10K
C1015 820p F
K074
R1039 10K
C1014
K074
820p F
C1024 10uF 16V
R1019 1K
READY
12K
12K
R1043
R1042
GND
VCC
VINPUT
R1044
75
JK100 3
JST 122 3-00 1
1
2
3
4
C1016 47pF 50V
SIDE_CVBS_DET
SIDE_LIN
SIDE_RIN
citpO rebiF
FIX_POLE
SIDE_CVBS_IN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX61373301
JACK
1 0 1 3
Page 20
RGB
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
RS232C
RS232C_TXD
RS232C_RXD
PC_SER_DATA
PC_SER_CLK
250 _350
P900 SPG09-DB-010
6
1
7
2
8
3
9
4
10
5
16
SHILED
GND
D914
D915
30V
30V
PJ23 0
PJ23 0
11
12
13
14
15
R998
R999
PJ2 30
PJ2 30
RED_GND
GND_2
RED
GREEN_GND
DDC_DATA
GREEN
BLUE_GND
H_SYNC
BLUE
NC
V_SYNC
GND_1
SYNC_GND
DDC_CLOCK
DDC_GND
+3.3V _ST
0
0
R900
4.7 K
D905
C900
0. 1uF 16V
R973
D904
0R974
0
READY
D906
ROM DOWNLOAD FOR PDP
+3.3V_AVDD
R975 1K
R976
D901
1K
C909
0. 1uF 50V
C910
0. 1uF 50V
+1C
+V
2
1
61
51
DNG
CCV
D902 ADUC30S03010L_AMODIODE
30V
D903
ADUC30S03010L_AMODIODE
30V
9
10
4
5
+3.3V _ST
C911
0. 1uF 50V
READY
Q900EB
2SC3052
%5
W01/1
READY
C
10K
R918
READY
READY
R901
4.7 K
C902
0. 1uF 50V
2NIR
8
9
2TUOR
READY
READY
C901 270p F 50V
READY
2TUOD
7
01
2NID
P901
R902 10
C906 220p F 50V
READY
6
MAX3232CDR
11
220p F 50VC903
220p F 50VC904
SPG09-D B-009
R903 10
C905 220p F 50V
READY
C908 220p F 50V
READY
D900
C907
0. 1uF 50V
-1C
-2C +2C
-V
4
3
5
IC9 00
$0. 179
41
31
21
1TUOD
1TUOR
1NID
1NIR
R904
100
R905
100
6
7
8
1
2
3
D907
+3.3V_AVDD
PC_SER_DATA
PC_SER_CLK
IR
100K
R919
100K
R920
D908
R906 75
L902
DSUB_R
DSUB_R-
DDC_SDA/UART_TX
DSUB_G
DSUB_G-
DSUB_DET
DSUB_B
DSUB_B-
DSUB_HSYNC
DSUB_VSYNC
R911
READY
R915 22
R916 22
10K
D909 30V
L905
L904
R907 75
R908
75
C914
0.1 uF 16V
READY
C916 10pF 50V
C917 10pF 50V
1KR917
DDC_SCL/UART_RX
250_ 350
IC901
AT24C02BN-10SU-1.8
1
8
2
7
3
6
4
5
C918
18pF
R912
18K
EDID_WP
C919
18pF
50V
50V
PC AUDIO
250 _350
JK900
PEJ 027 -01
3
6A
7A
4
5
7B
6B
E_SPRING
T_TERMINAL1
B_TERMINAL1
R_SPRING
T_SPRING
B_TERMINAL2
T_TERMINAL2
For 2 30 Deb u g ging
PJ2 30
DDC_SCL/UART_RX
DDC_SDA/UART_TX
R980
R981
PJ2 30
D910
5.6 V
D911
5.6 V
+3.3V
R956
R957
Q904
R958
0
4.7 K
G
22R959
S
SDA1
4.7 K
D
2N7 002( F)
HD
P90 3
SMW200-26C
2
4
6
8
10
12
14
16
18
20
+3.3V
R964
1
3.3 K
3
5
7
9
11
22R961
HD
13
15
17
19
2122
2324
2526
100R949
HD
R960 27K
R923
4.7 K
R924
4.7 K
R929 0
R930 0
R932 0
R934 0
+5V_ST
C922
0.1 uF
+3.3V
R963
3.3 K
MOD_ROM_TX
SDA1_1 SCL1_1
RXB0+
RXB1+
RXB2+
RXBCK+
RXB3+
RXB4+
PC_SER_DATA
22R962
HD
HD LVDS
DDC_SCL/UART_RX
DDC_SDA/UART_TX
RGB_DDC_SCL
RGB_DDC_SDA
SUB Board I/F
R941
10K
READY
R909
READY
4.7 K
+3.3V _ST
+3.3 V
R914
4.7 K
R910
4.7 K
+5V_ST
R937
4.7 K
R939
4.7 K
C925
L903
MLB-2 01209-0 120P-N 2
L906
MLB-2 01209-0 120P-N 2
R945 22
R946 22
R947 22
C924 10pF
READY
C923 10pF
READY
L900
MLB-20 1209-01 20P-N2
L901
MLB-20 1209-01 20P-N2
L907
MLB-2 01209-0 120P-N 2
10pF
C933 10pF
C926
10pF
C927
0. 1uF 16V
C930 10pF
C931 10pF
C932
0. 1uF 16V
D913
R931
C920
10K
820p F
50V
C921 820p F
50V
PJ2 30
P906
12507WR-03L
0
1
0
2
3
4
R926 470K
R927 470K
R933 10K
12K
R935 12K
R936
PC_RIN
PC_LIN
LED_RED
LED_WHITE
KEY1
KEY2
SUB_SCL
SUB_SDA
+3.3V _ST
IR
R938
10K
+3.3 V
R951
4.7 K
D
Q903
2N7 002( F)
MOD_ROM_RX
RXB0-
RXB1-
RXB2-
RXBCK-
RXB3-
RXB4-
PC_SER_CLK
DISP_EN
+3.3V
R952
0
G
S
P902
12507WS-1 2L
1
2
3
4
5
6
7
8
9
10
11
12
13
R953
4.7 K
R954
FHD LVDS
FHD
22
SCL1
52
51
TF05 -51S
P904
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
R970
FHD
22R9 68
FHD
100R969
22
FHD
PC_SER_CLK
PC_SER_DATA
SCL1_1
DISP_EN
SDA1_1
RXA0+
RXA0-
RXA1+
RXA1-
RXA2+
RXA2-
RXACK+
RXACK-
RXA3+
RXA3-
RXA4+
RXA4-
RXB0+
RXB0-
RXB1+
RXB1-
RXB2+
RXB2-
RXBCK+
RXBCK-
RXB3+
RXB3-
RXB4+
RXB4-
MOD_ROM_TX
MOD_ROM_RX
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX61141601
LVDS/RS232//RGB
9 13
Page 21
SHIELD
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
20
$0 .4 7
-> $0 .28
10332095GAE
JK803
5V_DET_HDMI_3
5V_HDMI_3
R842
1K
R841
IC8 02
1.8 K
R843
3.3 K
0. 1uF
VCC
8
WP
7
SCL
6
SDA
5
19
18
17
16
15
14
13
12
11
CK+
10
D0-
9
D0_GND
8
D0+
7
D1-
6
D1_GND
5
D1+
4
D2-
3
D2_GND
2
D2+
1
READY
GND
AT24C02 BN-10SU- 1.8
A0
1
A1
2
A2
3
GND
4
D807
AVRL161A1R1NT
R845
R844
R846
C809
C808
0. 1uF 16V
22
22
0
R850
C
18K
22R8 48
22R849
B
Q806
E
2SC3875S (ALY)
EDID_WP
R851
10K
5V_HDMI_3
R852 18K
HPD3
DDC_SDA_3
DDC_SCL_3
CEC_REMOTE
CK-_HDMI3
CK+_HDMI3
D0-_HDMI3
D0+_HDMI3
D1-_HDMI3
D1+_HDMI3
D2-_HDMI3
D2+_HDMI3
+5V
1A
2A
D804 ENKMC2838-T112
C
R853 18K
DDC_SCL_3
DDC_SDA_3
JACK_GND
KJA -ET -0- 0032
10mm
250 _350
20
$0 .2 7
JK804
19
HPD
18
+5V_POWER
17
DDC/CEC_GND
16
SDA
15
SCL
14
NC
13
CEC
12
CLK-
11
CLK_SHIELD
10
CLK+
9
DATA0-
8
DATA0_SHIELD
7
DATA0+
6
DATA1-
5
DATA1_SHIELD
4
DATA1+
3
DATA2-
2
DATA2_SHIELD
1
DATA2+
GND
GND
250 _350
AT24C02 BN-10SU- 1.8
A0
1
A1
2
A2
3
GND
4
5V_HDMI_4
R857
1K
R856
1.8 K
D808 READY AVRL161A1R1NT
IC8 04
5V_DET_HDMI_4
R860
3.3 K
R878
C811
0. 1uF
VCC
8
WP
7
SCL
6
SDA
5
Q807EB
2SC3875S (ALY)
C810
0. 1uF 16V
22R858
22R859
0
R864
18K
EDID_WP
22R862
22R863
C
5V_HDMI_4
R867 18K
R869
2A
10K
HPD4
DDC_SDA_4
DDC_SCL_4
CEC_REMOTE
CK-_HDMI4
CK+_HDMI4
D0-_HDMI4
D0+_HDMI4
D1-_HDMI4
D1+_HDMI4
D2-_HDMI4
D2+_HDMI4
+5V
1A
ENKMC2838-T112 D805
C
R868 18K
DDC_SCL_4
DDC_SDA_4
EAG59023302
SHIELD
20
$0 .4 7
-> $0 .27
JK801
READY
GND
19
18
17
16
15
14
13
12
11
CK+
10
D0-
9
D0_GND
8
D0+
7
D1-
6
D1_GND
5
D1+
4
D2-
3
D2_GND
2
D2+
1
AT24C02 BN-10SU- 1.8
A0
A1
A2
GND
SIDE HDMI
5V_HDMI_2
GND
1
2
3
4
5V_DET_HDMI_2
READY
R823
1K
R822
1.8 K
READY
D806
READY
AVRL161A1R1NT
READY
IC8 01
C
E
C803
R824
0. 1uF
3.3 K 16V
READY
READY
READY
R826
22
22R827
READY
R828
0
READY
READY
C805
0. 1uF
VCC
8
R831
18K
WP
READY
7
SCL
6
SDA
5
READY
READY
EDID_WP
22R830
22R8 29
R833
B
READY Q805 READY
2SC3875S (ALY)
5V_HDMI_2
R832 18K
READY
10K
+5V
1A
2A
ENKMC2838-T112 D803
READY
C
R834 18K
READY
HPD2
DDC_SDA_2
DDC_SCL_2
CEC_REMOTE
CK-_HDMI2
CK+_HDMI2
D0-_HDMI2
D0+_HDMI2
D1-_HDMI2
D1+_HDMI2
D2-_HDMI2
D2+_HDMI2
DDC_SCL_2
DDC_SDA_2
CEC_REMOTE
+3.3 V
R871
R872
READY
0
G
Q800
BSS83
S
B
D
HDMI_CEC_S7
0
S7
CEC_REMOTE
R800
68K
D801
MMBD301LT1G
HDMI_JACK MICOM
HDMI_JACK
R870
68K
D802
MMBD301LT1G
READY
R874
READY
+3.3V _ST
R875
D
0
0
R877 68K
MICOM_CEC_ON/OFF
HDMI_CEC
0R873
G
Q801
BSS83
S
B
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX61373301
HDMI
8 1 3
Page 22
1: AI3 ;5 :O2 4
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
AC_DET
AUDIO_MASTER_CLK
+3.3V_DVDD
Q700 R729 33K
2SC3875S (ALY)
R702
22
MS_LRCK2:Q 20
MS_SCK1: S26 ;2: Q2 1
MS_LRCH1: S25 ;2: Q2 0
AMP
Separate DGND AND AVSS
Q701
B
4.7 K
R732
C
2SC3875S (ALY)
E
R724
22
R725
22
R726
22
+3.3V_DVDD
C745
READY
R720 22
1: S26 ;2: Q2 1
4.7 K
R730
C
B
E
READY
R731
4.7 K
AVSS
READY
R705 0
22pF
READY
C743 22pF
AVSS
+3.3V_AU_AVDD
C701 10uF 16V
C703
0. 1uF
C700 1000 pF 50V
C742
C744
22pF
22pF
READY
READY
C704
0. 01u F
C705
4. 7uF 10V
R709 200
1%
R710
18K R711
1%
T hi s pa rt s ar e L o c a t e d
on AV SS a rea.
C710
C708
0.0 47 uF
4700 pF
R712
470
AVSS
VR_ANA
AVDD
TESTOUT
22
READY
MCLK
OSC_RES
DVSS_1
VR_DIG
PDN
LRCLK
SCLK
SDIN
SDA
SCL
13
14
15
16
17
18
19
20
21
22
23
24
12
25RESET
R713
4700 pF
C713
C712
PLL_FLTP
PLL_FLTM
11
10
26STEST
27DVDD
470
22K
2200 pFC714
0.0 47 uF R714
AVSS
SSTIMER
OC_ADJ
GVDD_OUT_1
6
7
8NC9
TAS5709PHPR
IC 70 0
29GND
30AGND
28DVSS_2
31VREG
+3. 3V
L703
120- ohm
V52
C719
Fu1
0.0 33 uF 50V
617C
C724
C721
0. 01u F
BST_A
PVDD_A_13PVDD_A_2
OUT_A
1
2
4
5
32GVDD_OUT_2
35PVDD_D_2
33BST_D
34PVDD_D_1
36OUT_D
48
47
46
45
44
43
42
41
40
39
38
37
PGND_AB_2
PGND_AB_1
OUT_B
PVDD_B_2
PVDD_B_1
BST_B
BST_C
PVDD_C_2
PVDD_C_1
OUT_C
PGND_CD_2
PGND_CD_1
22uF
C728 68uF
35V
25V
C725
0. 01u F
C726
0. 01u F
C729 68uF
P_17V
35V
L701
AD-9060
2S
1S 1F
50V
0.0 33 uF
C731
50V
0.0 33 uF C730
L700
AD-9060
2S
1S 1F
L702
120- ohm
2F
C733
0. 68u F 50V
C734
C732
0. 68u F 50V
0. 1uF 50V
C735
0. 1uF 50V
2F
C736
0. 1uF 50V
C737
0. 1uF 50V
+3.3V_AU_AVDD
+3.3V_DVDD
C740
0. 01u F
R717
3. 3
R718
3. 3
C741
0. 01u F
C738
0. 01u F
R715
3. 3
R716
3. 3 C739
0. 01u F
SPK_L+
SPK_L-
SPK_R+
SPK_R-
4
3
2
1
SMAW250-H04R
P703
2:Q 24
2:Q 20
CH_5
CH_5
SCL1
SDA1
AMP_SDA
AMP_SCL
1:T 8
AMP_RESET_N
R728
R744
2K
2K
33R707
33R708
R704
33
+3.3V_DVDD
C702 1000 pF READY
READY
R706
2K
R746
R745
0
0
C706 33pF
READY
C707 33pF
READY
+3.3V_DVDD
C709 10uF 16V
C711
0. 01u F
C715
0. 1uF
C720
717C
Fu1 V52
0.0 33 uF
C718
50V
0. 01u F
C722
22uF
25V
C723 68uF
35V
C727 68uF
35V
P_17V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX61373301
AUDIO AMP
7 13
Page 23
+3.3V
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
L609
MLB-2 01209-0 120P-N 2
+3.3V_DE
C691 10uF
6.3 V
C692
0. 1uF 16V
C693
0. 1uF 16V
IC6 00
AZ1117H-ADJTRE1(EH11A)
INPUT
3
2
OUTPUT
1
C694
0. 1uF 16V
ADJ/GND
R601
1.2 K R1
C695
0. 1uF
R602 10
16V
+1.2V_DE
R2
C697 10uF
6.3 V
C652 10uF
6.3 V
TUNER_IF_N
TUNER_IF_P
100
R622
100R623
Cl os e t o R6 22, R6 23
C670
0. 1uF 16V
C671
0. 1uF 16V
C663
C664
C665
C666
R621 10K
ISDB_IF_AGC
+1.2V_DE
0. 1uF
0. 1uF
0. 1uF
0. 1uF
1%
0. 1uFC667
0. 1uFC668
0. 1uFC669
+3.3V_DE
R640
R641
C673
0. 1uF
2.2 K
2.2 K
R624
R625
R626
VSS_1
AVDD_S
AIQ_S
AVSS_S
VRT_S
VRB_S
TCPO_S
VDDL_1
MSCL_S
MSDA_S
VSS_2
VDDL_2
TCPO_T
VRT_T
VRB_T
AVDD_T
AIN_T
AIP_T
AVSS_T
2.2 K
2.2 K
10K
AII _S
VSSH
PSEL
ZSEL
ACKI
IR_T
C690
0. 1uF
16V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
C685
C686
C688
C687
C689
0. 1uF
1uF
1uF
0. 01u F
0. 1uF
AGC_S
100
VSS_11
PCKB97DENB98GPO299VDDH_5
VDDL_793SCKB
SDOB
TEST0
2
91
9
96
94
95
IC602
MN884433
26
VSS_3
C672
0. 1uF
32
27
28
29
30
31
33
34
35
36XO37
GPO1
GPO0
VSS_4
AGCI_T
MSCL_T
MSDA_T
VDDL_3
VDDH_1
AGCR_T
C674
0. 1uF
16V
16V
R627 1M
READY
X602
25MHz
C675 30pF 50V
VSS_1085HDVPP86RON87NC_388HDVDDH89NC_490HDVDDL1
VDDH_4
SCKA79GPI280SDOA81PCKA82DENA
TEST2
TEST1
84
83
78
77
76
VSS_9
75
INTB
74
INTA
73
SADR
72
VDDH_3
71
SCL
70
SDA
69
VSS_8
68
HDVDDL0
67
SADR_S
66
NC_2
65
SADR_T
64
VDDL_6
63
VSS_7
62
ERRB
61
SYNCB
60
ERRA
59
SYNCA
58
TDO
57
CSEL1
56
CSEL0
55
TMS
54
TRST
53
VDDL_5
52
VSS_6
VDDL_4
46
C680
0. 1uF
16V
51
47
48
49
50
TDI
TCK
NRST
TEST3
43
44
41
TEST4
C678
0. 1uF 16V
45
42
NC_1
VSS_5
SHVPP
SHVDDH
C679
0. 1uF
16V
38
39
XI
GPI140GPI0
VDDH_2
C677
0. 1uF
16V
C676 30pF 50V
R633
R632
R631
R630
22
22
22
22
FE_TS_VLD
FE_TS_SYN
FE_TS_SERIAL
FE_TS_CLK
+3.3V_DE
R628
R629
2.2 K
2.2 K
READY
2.7 K
R639
+3.3V_DE
READY
C696
0. 1uF 16V
R642
22
22
R643
DEMOD_RESET
0. 1uFC684
0. 1uFC683
0. 1uFC682
0. 1uFC681
READY
READY
SCL1
SDA1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX61373301
TUNER
6 13
Page 24
POWER B/D
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
+5V_ST
C502
C508
10u F
0. 1u F
10V
16V
RL_ON
C505 10u F
16V
R506
POWER Wafer 18P
L501
MLB- 201209 -0120P -N2
C504 100u F 16V
10 0
C513
0. 1u F
16V
P500
SMAW200-H18S1
1
3
5
7
9
10
12
11
14
13
16
15
18
17
19
P_17V
C524
C522
68uF
0. 1u F
35V
L507
C521
0. 1u F 16V
C519
0. 1u F 16V
50V
P_+5V
P_+5V
R535
C525 10uF 16V
10 0R513
C585 100u F 16V
AC_DET
C527
100u F
16V
C530 10u F 16V
RL_ON
22K
R1/C1
ON/OFF
Q501
SI3865BDV
6
5
$0 .08 1
S2
4
1uF
C594
+5V
R2
1
D2_1
2
D2_2
3
C566
C565
22uF
16V
322 5
4. 7uF 10V
560
R537
+3. 3V
R502
R526
22
10K
READY
ERROR_DET
CB4532UK121E
2
4
6
8
5V_ON
+5V_ST
C500 10uF 16V
10 0R5 07
C514
0. 1u F
16V
IC 500 EAN5880170 1
C501
0. 1u F 16V
AP2 121N- 3.3TR E1
VIN
3
1
GND
VOUT
2
S7 DDR 1.5V
C509 10u F
6. 3V
C512 10u F
6. 3V
+3.3 V_ST
C515
0. 1u F 16V
L502 EAM44020101 CB3216PA501E
+3.3V_NEC_ST
C590 10uF 25V
P_17V
C544
0. 1uF 50V
MP8706EN-C247-LF-Z
IN
SW_1
SW_2
C546
0. 1uF BST
47R545
1
2
3
4
IC507
L520
10uH
R544
GND
8
VCC
7
FB
6
EN/SYNC
5
Vou t=0 .8* (1+ R1/ R2)
0
RL_ON
S7 c o r e 2 . 5VMult i P o wer( 3 . 3 V --> 2 . 5 V )Stand-b y ( 5 V ST --> + 3 . 3 V )
C586 47uF 16V
+2.5V_AVDD
C589 47uF 16V
0. 1uFC541
R543
5.1 K
R2
39K1%R539
R1
1.2 K1%R540
C545 22uF 10V
+7V
C542
IC5 06
AZ1117H-ADJTRE1(EH11A)
INPUT
3
2
OUTPUT
0. 1uF 16V
1
ADJ/GND
R538 330
1%
1101%R541
+5V_TU
+3. 3V
C562 10u F
6. 3V
C564
0. 1u F 16V
IC 505 0IPRPML001A MIC39100
IN
1
1.8A
OUT
3
2
GND
Multi Powe r ( 5 V - - > 3 . 3 V )
C567 10u F
6. 3V
C573 10u F
6. 3V
C580
0. 1u F 16V
Plac ed o n SM D-TO P
C535 22uF 10V
+5V_ST
L503 CIC21J501NE
S7M DDR 1.5V
C536 100p F
50V
Re pl ac e d Pa rt
R1
R509
10K
R505 11K
1/10W
5%
IC502
MP2212DN
FB
1
R2
GND
2
3A
IN
3
BS
4
R503
10
1/10W
1%
8
7
6
5
EN/SYNC
SW_2
SW_1
VCC
0R501
1%
Cl o se t o I C
C538 1uF
10V
NR8040T3R6N
C537
0. 1uF 50V
1K
R500
L504
3.6 uH
1074 mA
C540 22uF
10V
Plac ed o n SM D-TO P
Vou t=0 .8* (1+ R1/ R2)
+1.5V_DDR_IN
POWER_ON/OFF1
C539
0. 1uF
C520
0R5 27
RL_ON
+3. 3V
C587 47uF 16V
+3.3V_AVDD
C570
0. 1u F 16V
C588 47uF 16V
P_+5V
C526
10uF
1uF
16V
25V
C528
0. 1uF
IC501
MP8706EN-C247-LF-Z
IN
SW_1
SW_2
1
2
3
BST
4
3A
L519
3.6 uH
8
7
6
5
GND
VCC
FB
EN/SYNC
+1.26V_VDDC
0. 1uFC523
R515
R531
R530 62K
1%
39K
R516
1.2 K
R518
3.3 K
1%
200
1%
C534 10uF 10V
C531 22uF 10V
S7 c o re 1 . 2 6V
c l o s e t o t u n e r
+5V
IC5 04
AZ10 85S-3 .3TR /E1
INPUT
MAX 3A
2
3
$0 .12 2
1
C553 10u F 16V
C558
0. 1u F 16V
ADJ/GND
OUTPUT
A2[RD]
For Debug
R546 1K
A1[GN]
D501
C
SAM2333
L514
MLB-2 01209-0 120P-N 2
650 mA
C569 10u F
6. 3V
C575
0. 1u F 16V
C581 10u F
6. 3V
R1 R2
1.26 V
1.2 V
1.29 V
40.2 K 7 1.5K
82.5 K40.2 K
40.2 K 6 5.5K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
WER
EAX61373301
POWER
5 13
Page 25
+1.5V_DDR_IN
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
AVDD_DDR0_1.5
+1.26V_VDDC
+2.5V_AVDD
L300
BLM18PG121SN1D
L301
BLM18PG121SN1D
R300 1K
1%
BLM18PG121SN1D
MVREF
R301 1K 1%
L323
VDDC
C327
16V
0. 1uF
L303
BLM18PG121SN1D
BLM18PG121SN1D
BLM18PG121SN1D
BLM18PG121SN1D
AVDD_DDR0_1.5
C301
16V
0. 1uF
AVDD_DDR1_1.5
C302
16V
0. 1uF
VDDC
C383
C380
10uF
0. 1uF
6.3 V 16V
C333
16V
0. 1uF
AVDD25_PGA_2.5
L304
L305
L306
Pl a ce t o S 7m c lo s el y
C306
C310
16V
16V
0. 1uF
0. 1uF
Pl a ce t o S 7m c lo s el y
C307
C311
16V
16V
0. 1uF
0. 1uF
C304
0. 1uF
C337
16V
0. 1uF
AVDD2P5_2.5
C314
16V
0. 1uF
C315
16V
0. 1uF
AU25_ 2.5
C317
16V
0. 1uF
ADC2P5_2.5
C316
16V
0. 1uF
VDDC
C309
16V
16V
0. 1uF
C340
16V
0. 1uF
Pl a ce t o S 7m c lo s el y
C322
16V
0. 1uF
Pl a ce t o S 7m c lo s el y
Pl a ce t o S 7m c lo s el y
C323
16V
0. 1uF
C318
16V
0. 1uF
C319
16V
0. 1uF
C313
16V
0. 1uF
C343
C346
16V
16V
0. 1uF
0. 1uF
C329
16V
0. 1uF
Pl a ce t o S 7m c lo s el y
C324
C332
10uF
10uF
6.3 V
6.3 V
C325
C330
10uF
10uF
6.3 V
6.3 V
0. 1uF
C334 10uF
6.3 V
C321
16V
C328
0. 1uF
C351
16V
0. 1uF
VDD33_3.3
C336
16V
0. 1uF
+3.3V_AVDD
16V
C357
16V
0. 1uF
C339
0. 1uF
C335
16V
0. 1uF
C363
16V
0. 1uF
C342
16V
16V
0. 1uF
L310
BLM18PG121SN1D
L308
BLM18PG121SN1D
L309
BLM18PG121SN1D
C338
16V
0. 1uF
C345
16V
0. 1uF
VDD33_DVI
C347
16V
0. 1uF
AVDD_NODIE_3.3
C348
16V
0. 1uF
VDD33_3.3
C344
C341
16V
16V
0. 1uF
0. 1uF
C350
16V
0. 1uF
Pl a ce t o S 7m c lo s el y
C352
16V
0. 1uF
Pl a ce t o S 7m c lo s el y
L314
BLM18PG121SN1D
BLM18PG121SN1D
C349
16V
0. 1uF
+1.26V_VDDC
L321
BLM18SG121TN1D
+1.26V_VDDC
L324
BLM18SG121TN1D
C354
16V
0. 1uF
C358
16V
0. 1uF
L316
C353
16V
0. 1uF
+1.26V_MIU1VDDC
C381
C384
10uF
16V
0. 1uF
6.3 V
+1.26V_MIU0VDDC
C386
C385
10uF
16V
6.3 V
0. 1uF
Pl a ce t o S 7m c lo s el y
C356
C361
10uF
10uF
6.3 V
6.3 V
L318
BLM18PG121SN1D
C362 10uF
6.3 V
AU33_ 3.3
C366
C374
16V
16V
0. 1uF
0. 1uF
FRC_LPLL_3. 3
C368
16V
0. 1uF
C371
22uF
16V
AVDD_DMPLL_3.3
C377
16V
0. 1uF
Pl a ce t o S 7m c lo s el y
C375 10uF
6.3 V
+1.26V_MIU0VDDC
+1.26V_MIU1VDDC
VDDC
ADC2P5_2.5
C379
16V
0. 1uF
AU25_ 2.5
AVDD2P5_2.5
AVDD25_PGA_2.5
AVDD_NODIE_3.3
VDD33_DVI
AVDD_DMPLL_3.3
AU33_ 3.3
VDD33_3.3
FRC_LPLL_3. 3
AVDD_DDR0_1.5
AVDD_DDR1_1.5
VDDC
VDD33_3.3
MVREF
LGE101D (S 7 Non_Tcon/R M)
H11
H12
H13
H14
H15
J1 2
J1 3
J1 4
J1 5
J1 6
L18
H16
K19
L19
M18
M19
N18
N19
N20
P18
P19
P20
Y12
J1 1
L7
H7
J7
J8
L8
W15
Y15
U8
M8
N9
P9
N8
P8
T7
U7
T9
R8
R9
T8
V20
W20
U19
U20
V19
W19
U18
T20
Y14
R19
W14
D15
D16
E15
E16
E17
F16
F17
G16
G17
H17
AB11
AB12
AC11
AC12
AA12
G15
Y7
Y8
IC10 1
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
A_DVDD
B_DVDD
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
NC_13
AVDD1P2
DVDD_NODIE
AVDD2P5_ADC_1
AVDD2P5_ADC_2
AVDD25_REF
AVDD_AU25
PVDD_1
PVDD_2
AVDD25_PGA
AVDD_NODIE
AVDD_DVI_1
AVDD_DVI_2
AVDD3P3_CVBS
AVDD_DMPLL
AVDD_AU33
AVDD_EAR33
AVDD33_T
VDDP_1
VDDP_2
VDDP_3
NC_5
NC_8
NC_2
NC_3
NC_4
NC_7
AVDD_LPLL
NC_1
NC_14
AVDD_MEMPLL
NC_6
AVDD_DDR0_D_1
AVDD_DDR0_D_2
AVDD_DDR0_D_3
AVDD_DDR0_D_4
AVDD_DDR0_C
AVDD_DDR1_D_1
AVDD_DDR1_D_2
AVDD_DDR1_D_3
AVDD_DDR1_D_4
AVDD_DDR1_C
NC_22
NC_23
NC_27
NC_28
NC_18
MVREF
NC_9
NC_10
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_FU
PGA_VCOM
G18
H9
H10
H18
H19
J1 0
J1 7
J1 8
J1 9
K9
K10
K11
K12
K13
K14
K15
K16
K17
K18
L9
L10
L11
L12
L13
L14
L15
L16
L17
M9
M10
M11
M12
M13
M14
M15
M16
M17
N10
N11
N12
N13
N14
N15
N16
N17
P10
P11
P12
P13
P14
P15
P16
P17
R10
R11
R12
R13
R14
R15
R16
R17
R18
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
U10
U11
U12
U13
U14
U15
U16
U17
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
V18
W7
W8
W9
W10
W11
W12
W13
W16
W17
W18
Y13
Y18
AA13
AB13
AC13
D17
H23
AF13
J9
U9
L320
BLM18PG121SN1D
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX61373301
Mai n IC Pow er
3 13
Page 26
TNM/VT
MUST BE LINE IMPEADANCE 100 OHM !!
SBVC
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
CK+_HDMI2
CK-_HDMI2
D0+_HDMI2
D0-_HDMI2 D1+_HDMI2
D1-_HDMI2
D2+_HDMI2
D2-_HDMI2 DDC_SDA_2
DDC_SCL_2
HPD2
CK+_HDMI4
IMDH
CK-_HDMI4
D0+_HDMI4
D0-_HDMI4 D1+_HDMI4
D1-_HDMI4
D2+_HDMI4
D2-_HDMI4 DDC_SDA_4
DDC_SCL_4
HPD4
CK+_HDMI3
CK-_HDMI3
D0+_HDMI3
D0-_HDMI3 D1+_HDMI3
D1-_HDMI3
D2+_HDMI3
D2-_HDMI3 DDC_SDA_3
DDC_SCL_3
HPD3
HDMI_CEC_S7
DSUB_HSYNC
2/1 TNENOPMOC
DSUB_VSYNC
DSUB_R
DSUB_R-
DSUB_G
DSUB_G-
DSUB_B
DSUB_B-
COMP1_Pr+
COMP1_Pr-
COMP1_Y+
COMP1_Y-
COMP1_Pb+
COMP1_Pb-
COMP2_Pr+
COMP2_Pr-
COMP2_Y+
COMP2_Y-
COMP2_Pb+
COMP2_Pb-
TUNER_CVBS
AV_CVBS_IN
SIDE_CVBS_IN
BUSD
R141 300
READY
R143
10K
C201 1000 pF
READY
R146
N/A
S7 RESET CIRCUIT
*A ct ive H igh r ese t
+3.3 V
C200
4. 7uF
D200 KDS181
READY
10V
READY
R142 62K
READY
R145 10
READY
C202
16V
READY
0. 1uF
LGE101D (S 7 Non_Tcon/R M)
F1
A_RXCP
F2
A_RXCN
G2
A_RX0P
G3
A_RX0N
H3
A_RX1P
G1
A_RX1N
H1
A_RX2P
H2
A_RX2N
F5
DDCDA_DA/GPIO24
F4
DDCDA_CK/GPIO23
E6
HOTPLUGA/GPIO19
D3
B_RXCP
C1
B_RXCN
D1
B_RX0P
D2
B_RX0N
E2
B_RX1P
E3
B_RX1N
F3
B_RX2P
E1
B_RX2N
D4
DDCDB_DA/GPIO26
E4
DDCDB_CK/GPIO25
D5
HOTPLUGB/GPIO20
AA2
C_RXCP
AA1
C_RXCN
AB1
C_RX0P
AA3
C_RX0N
AB3
C_RX1P
AB2
C_RX1N
AC2
C_RX2P
AC1
C_RX2N
AB4
DDCDC_DA/GPIO28
AA4
DDCDC_CK/GPIO27
AC3
HOTPLUGC/GPIO21
A2
D_RXCP
A3
D_RXCN
B3
D_RX0P
A1
D_RX0N
B1
D_RX1P
B2
D_RX1N
C2
D_RX2P
C3
D_RX2N
B4
DDCDD_DA/GPIO30
C4
DDCDD_CK/GPIO29
E5
0
R153
10K
R166
R167
R168
R169
R171
R172
R139
R194
R174
R176
R178
R179
R180
R182
R183
R184
R186
R188
R189
R156
R165 22 READY
22R163
22R164 33
68
33
68 33R170
68
33
33
33R173
68 33R175
68 33R177
68
33
68R181 33
68
33
68R185
33R154
33R155
33R187
33
33
33R190
33R191
33R192
68
0.0 47 uF
C215
0.0 47 uF
C216 C203
0.0 47 uF
0.0 47 uF
C217
0.0 47 uF
C218
0.0 47 uF
C219
1000 pF
0
C204
0.0 47 uF
C220
0.0 47 uF
C221 C222
0.0 47 uF
0.0 47 uF
C223
0.0 47 uF
C224
0.0 47 uF
C225
1000 pF
0
C205
0.0 47 uFC20 6
C207
0.0 47 uF
0.0 47 uF
C208
0.0 47 uF
C209
0.0 47 uFC21 0
C211
0.0 47 uF 1000 pF
0
C212
0.0 47 uFC213
0.0 47 uF
C214
0.0 47 uFC226
0.0 47 uFC227
0.0 47 uFC228
0.0 47 uFC229
0.0 47 uFC230
0.0 47 uFC231
0.0 47 uFC233
SOC_RESET
HOTPLUGD/GPIO22
D6
CEC/GPIO5
G5
HSYNC0
G6
VSYNC0
K1
RIN0P
L3
RIN0M
K3
GIN0P
K2
GIN0M
J3
BIN0P
J2
BIN0M
J1
SOGIN0
G4
HSYNC1
H6
VSYNC1
K5
RIN1P
K4
RIN1M
J4
GIN1P
K6
GIN1M
H4
BIN1P
J6
BIN1M
J5
SOGIN1
H5
HSYNC2
N3
RIN2P
N2
RIN2M
M2
GIN2P
M1
GIN2M
L2
BIN2P
L1
BIN2M
M3
SOGIN2
N4
CVBS0P
N6
CVBS1P
L4
CVBS2P
L5
CVBS3P
L6
CVBS4P
M
4
CVBS5P
M5
CVBS6P
K7
CVBS7P
M6
CVBS_OUT1
M7
CVBS_OUT2
N5
VCOM0
IC10 1
BIT CLOCK
MASTER CLOCK
SERIAL DATA
WORD SELECT
VIFP
VIFM
SSI F/S IF P
SSIF /SIFM
IFAGC
RF_TAGC
TGPIO0/UPGAIN
TGPIO1/DNGAIN
TGPIO2/I2C_CLK
TGPIO3/I2C_SDA
XTALIN
XTALOUT
SPDIF _IN/GPI O177
SPDIF_OUT/GPIO178
DM_P0
DP_P0
DM_P1
DP_P1
I2S_IN_ BCK/GPIO1 75
I2S_I N_SD/G PIO17 6
I2S_IN_ WS/GPIO1 74
I2S_OUT_BCK/GPIO181
I2S_OUT_MCK/GPIO179
I2S_OUT_SD/G PIO182
I2S_OUT_SD1 /GPIO183
I2S_OUT_SD2 /GPIO184
I2S_OUT_SD3 /GPIO185
I2S_OUT_WS/GPIO180
LINE_IN_0L
LINE_IN_0R
LINE_IN_1L
LINE_IN_1R
LINE_IN_2L
LINE_IN_2R
LINE_IN_3L
LINE_IN_3R
LINE_IN_4L
LINE_IN_4R
LINE_IN_5L
LINE_IN_5R
LINE_OUT_0L
LINE_OUT_2L
LINE_OUT_3L
LINE_OUT_0R
LINE_OUT_2R
LINE_OUT_3R
MIC_DET_IN
MICCM
MICIN
AUCOM
VRM
VAG
HP_OUT_1L
HP_OUT_1R
ET_RXD0
ET_TXD0
ET_RXD1
ET_TXD1
ET_REFCLK
ET_TX_EN
ET_MDC
ET_MDIO
ET_CRS
AVLINK
IRINT
TESTPIN
RESET
NC_16
3.3 K
FHD
R264
3.3 K
HD
READY
R265
HIGH
LCD
42INCH
LED_NORMAL
FHD
3.3 KR266
3.3 K
R267
+3.3 V
3.3 K
LCDPDP
42INCH
R268
3.3 KR269
50INCH
50INCH
LED_MOVING
3.3 KR271
3.3 K
LOW
PDP
3.3 K
3.3 K
3.3 K
READY
READY
READY
R2533.3 K
R2773.3 K
R274
3.3 K
READY
READY
READY
R275
R272
HD
R276
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
READY
22R278
MODEL_OPT_4
22R279
READY
R252
READY
R254
AE1
AF16
AF1
AE3
AD14
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
AF3
AF14
AD1
AD13
AE14
AE13
AE4
AD5
AF4
AD4
AE2
AF8
AD9
AE9
AF9
AE11
AF6
AE6
AF11
AD6
AD12
AE5
AF12
AF5
AE12
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
AE8
Y11
Y19
MODEL_OPT_5
22
MODEL_OPT_6
LGE101D (S 7 Non_Tcon/R M)
NC_48
NC_78
NC_64
NC_50
NC_45
NC_34
NC_77
NC_65
NC_62
NC_33
NC_47
NC_46
NC_63
NC_66
NC_76
NC_32
NC_44
NC_61
NC_60
NC_51
NC_36
NC_67
NC_35
NC_49
NC_71
NC_40
NC_56
NC_72
NC_58
NC_69
NC_53
NC_74
NC_37
NC_43
NC_52
NC_75
NC_68
NC_59
NC_57
NC_70
NC_42
NC_38
NC_41
NC_54
NC_73
NC_39
NC_55
NC_12
GND_105
IC10 1
LVACLKP/LLV6P/BLUE[3]
LVACLKN/LLV6N/BLUE[2]
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB1N/RLV7N/GREEN[8]
LVB2N/RLV8N/GREEN[6]
LVB3N/LLV1N/GREEN[2]
LVB4N/LLV0N/GREEN[0]
LVA0P/LLV3P/BL UE[9]
LVA0N/LLV3N/BLUE[8]
LVA1P/LLV4P/BL UE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BL UE[5]
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BL UE[1]
LVA3N/LLV7N/BLUE[0]
LVA4P/LLV8P
LVA4N/LLV8N
LVB0P/RLV6P/ RED[1]
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB2P/RLV8P/GREEN[7]
LVB3P/LLV1P/GREEN[3]
LVB4P/LLV0P/GREEN[1]
RLV3P/RED [7]
RLV3N/RED[6]
RLV0P/LVSYNC
RLV0N/LHSYNC
RLV1N/LCK
RLV2P/RED [9]
RLV1P/LDE
RLV2N/RED[8]
RLV4P/RED [5]
RLV4N/RED[4]
RLV5P/RED [3]
RLV5N/RED[2]
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
TCON13/LEDON
TCON17/CS6/GCLK4
NC_26
NC_19
NC_30
NC_15
NC_31
NC_29
NC_21
NC_20
NC_11
NC_17
NC_25
NC_24
W26
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AD23
AE23
AE2
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22
AF22
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
AB22
AB23
AC23
AC22
AB16
AA14
AC15
Y16
AC16
AC14
AA16
AA15
Y10
AA11
AB15
AB14
RXACK+
RXACK-
RXA0+
RXA0-
LVDS OUT
RXA1+
RXA1-
RXA2+
RXA2-
RXA3+
RXA3-
RXA4+
RXA4-
RXBCK+
RXBCK-
RXB0+
RXB0-
RXB1+
RXB1-
RXB2+
RXB2-
RXB3+
RXB3-
RXB4+
RXB4-
6
FRC PART
MINILV
W2
W1
V2
IP
V1
IM
Y2
Y1
READY
C234
U3
QP
V3
QM
VRP
Y5
Y4
U1
U2
R3
T3
T2
T1
G14
G13
B7
A7
AF17
AE17
F14
F13
F15
D20
E20
D19
F18
E18
D18
E19
N1
P3
P1
P2
P4
P5
R6
T6
U5
V5
U6
V6
U4
W3
W4
V4
Y3
W5
R4
T5
R5
T4
P7
R7
P6
R1
R2
E21
E22
D21
F21
E23
D22
F
D23
F23
F8
G8
K8
A4
Y17
READY
R148
22
0. 1uF
0. 1uFC235
R228
R229
R158
R207
C236
C237
C238
C245
10KR258
C249
22R147
22
22
22
0. 1uFC252
R247
0. 1uFC253
2K R203
2KR204
22R1 59
22R160
Cl os e t o IC
a s cl os e as po ss ib le
X200 24MHz
1M
R227
READY
22
100
22R208
22R209
22R210 22R211
22R149
READY
2. 2uF
2. 2uF
2. 2uF
2. 2uFC239
2. 2uFC240
2. 2uFC241
2. 2uFC242
2. 2uFC243
2. 2uFC244
2. 2uF
2. 2uFC246
2. 2uFC247
4. 7uFC248
1uF 10uFC250
0. 1uFC251
READY
0R242
0R243
R273
10K
READY
47R24 6 47
C256
R248 300
1000 pF
READY
READY
+3.3 V
4.7 K
R250
4.7 K
R249
READY
READY
CH_5
CH_6
24pFC 257
L200
L201
24pFC 258
MODEL_OPT_4
MODEL_OPT_5
Cl os e t o IC
a s cl os e as po ss ib le
TUNER_SIF
SCL1
SDA1
TU_SCL
TU_SDA
GND_C
AMP_SDA SPDIF_OUT
USB2_DM_to_MAIN
USB2_DP_to_MAIN
USB1_DM_to_MAIN
USB1_DP_to_MAIN
SUB_SDA_NEC_TEMP
COMP2_DET SUB_SCL_NEC_TEMP
MS_SCK
AUDIO_MASTER_CLK
MS_LRCH MS_LRCK
AMP_SCL
COMP1_LIN
COMP1_RIN
AV_LIN
AV_RIN
SIDE_LIN
SIDE_RIN
COMP2_LIN
COMP2_RIN
PC_LIN
PC_RIN
N/A
IR
SOC_RESET
I I S
AUDIO IN
AUDIO OUT
MODEL OPTION
100
R260
100
PIN NAME
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
R261
100
R262
100
R263
MODEL OPTION
PIN NO.
D6
D7
E11
B9
FE_BOOSTER_CTL
RF_SWITCH_CTL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX61373301
AV IN_OUT/EXPANDER
2 13
Page 27
HY NIX 2GB it(8 ) F lash
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
/PF_C E0 H : Se r ia l F l as h L : NA ND Fla sh
/PF_C E1
H : 16 b it L : 8 b i t
R16
1K
/F_RB
/PF_OE
/PF_C E0
R17
1K
READY
+3.3 V
R10
1K
READY
/PF_C E1
R8 10K
PF_ALE
R4
/PF_WE
PF_WP
0
R3 10K READY
R12 1K
1M B s er i al F la s h
Serial FLASH MEMORY
for BOOT
PW_HSALF/
READY
/SP I_CS
+3.3 V
SPI_DO
R9
10K
R1
0
C
R2
0
Q101
B
KRC103S
READY
E
+3.3 V
MX25L8005M2I-15G
4.7 K
R5
4.7 K
R11
WP#
GND
250_350
+3.3 V
IC1 04
HY27UF082G2B-TPCB
NC_1
1
NC_2
2
NC_3
3
NC_4
NC_5
NC_6
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
4
5
6
R/B
7
RE
8
CE
9
10
11
12
13
14
15
CLE
16
ALE
17
WE
18
WP
19
20
21
22
23
24
R19
3.9 K
C4
0. 1uF
NAND-2G_HYNIX
IC103
CS#
1
SO
2
3
4
+3.3 V
C5
0. 1uF
VCC
8
HOLD#
7
SCLK
6
SI
5
16V
SPI_CK
SPI _DI
L102
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/ O7
44
I/ O6
43
I/ O5
42
I/ O4
41
NC_25
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
NC_24
NC_23
VCC_2
VSS_2
NC_22
NC_21
NC_20
I/ O3
I/ O2
I/ O1
I/ O0
NC_19
NC_18
NC_17
NC_16
C6 10uF
6.3 V
0. 1uFC7
NAND_1G_NUMONYX_NEW
NAND_1G_NUMONYX_OLD
PCM_A[7]
PCM_A[6]
PCM_A[5]
PCM_A[4]
PCM_A[3]
PCM_A[2]
PCM_A[1]
PCM_A[0]
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
RB
R
E
NC_7
NC_8
VDD_1
VSS_1
NC_9
NC_10
CL
AL
W
WP
NC_11
NC_12
NC_13
NC_14
NC_15
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
RB
R
E
NC_7
NC_8
VDD_1
VSS_1
NC_9
NC_10
CL
AL
W
WP
NC_11
NC_12
NC_13
NC_14
NC_15
S7 I C C o n fi g ur a t io n
+3.3 V
/PF_C E0
/PF_C E1
/PF_OE
/PF_WE
PF_ALE
S7_TXD S7_RXD
I2C_SDA
I2C_SCL
RGB_DDC_SDA
PWM0
PWM1
DSUB_DET
MODEL_OPT_3
PCM_A[0 -7]
PF_WP
/F_RB
AR102
PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[3]
PCM_A[4]
PCM_A[5]
PCM_A[6]
PCM_A[7]
AR103
22
22
33R52
33R53
R55
R56
R57
R58
R129
R130
READY
READY
READY
33
33R54
22
22 22
22
22
READY
PCM_A[0 -7]
<T3 CH IP Confi g(AUD_LR CH)>
Bo o t fr o m S PI f l as h : 1 ’b 0
Bo ot f ro m NO R fl as h : 1’ b1
<CHIP_CONF={AUBCK_OUT,AUMCK_OUT,PWM1,PWM0}>
1.CH IP_C ONF= 4’h3 :{0,0 ,1,1 }MIPS _no_ EJ_N OR8
2.CH IP_C ONF= 4’h4 :{0,1 ,0,0} MIPS _EJ1_ NOR8
3.CH IP_C ONF= 4’h5 :{0,1 ,0,1} MIPS _EJ2_ NOR8
4.C HIP _CO NF= 4’ hB: {1, 0,1 ,1} B51 _Se cur e_n o_s cra mbl e
5.C HIP _CO NF= 4’ hC: {1, 1, 0,0 }B5 1_S ecu re_ scr amb le
2. MIP S as ho st, EJ u se PA D1, By te mo de NA ND fl as h
3. MIP S as ho st, EJ u se PA D2, By te mo de NA ND fl as h
4. 8 05 1 a s h os t ,I n te r na l S PI fl a sh se cu r e b oo t ,n o s cr a mb l e
5. 8 05 1 a s h os t ,I n te r na l S PI fl a sh se cu r e b oo t w it h s c ra m bl e
IC104-*1
NAND01GW3B2CN6E
NC_29
48
1
NC_28
47
2
NC_27
3
46
NC_26
45
4
I/O7
44
5
I/O6
6
43
I/O5
42
7
I/O4
41
8
NC_25
9
40
NC_24
10
39
NC_23
11
38
VDD_2
12
37
VSS_2
13
36
NC_22
14
35
NC_21
15
34
NC_20
16
33
I/O3
17
32
I/O2
31
18
I/O1
30
19
I/O0
20
29
NC_19
21
28
NC_18
27
22
NC_17
23
26
NC_16
25
24
IC104-*2
NAND01GW3A2CN6E
NC_29
48
1
NC_28
47
2
NC_27
3
46
NC_26
45
4
I/O7
44
5
I/O6
6
43
I/O5
42
7
I/O4
41
8
NC_25
9
40
NC_24
10
39
NC_23
11
38
VDD_2
12
37
VSS_2
13
36
NC_22
14
35
NC_21
15
34
NC_20
16
33
I/O3
17
32
I/O2
18
31
I/O1
30
19
I/O0
20
29
NC_19
21
28
NC_18
22
27
NC_17
23
26
NC_16
25
24
NAND_1G_HYNIX
NC_1
1
NC_2
2
NC_3
3
NC_4
4
NC_5
5
NC_6
6
R/B
7
RE
8
CE
9
NC_7
10
NC_8
11
VCC_1
12
VSS_1
13
NC_9
14
NC_10
15
CLE
16
ALE
17
WE
18
WP
19
NC_11
20
NC_12
21
NC_13
22
NC_14
23
NC_15
24
NAND FLASH MULTI LIST
1KR33
READY
R34
R36
1KR3 9
READY
1K
1K
R40
READY
1KR35
1KR4 1
READY
1K
1KR4 2
1KR37
1. MI PS a s h os t( 80 51 ’s r es et r em a in s un ti l MI PS d ea c ti ve i t. ), No E J PA D, B yt e mo de N AN D fl as h
IC104-*3
H27U1G8F2BTR-BC
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O7
44
I/O6
43
I/O5
42
I/O4
41
NC_25
40
NC_24
39
NC_23
38
VCC_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O3
32
I/O2
31
I/O1
30
I/O0
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
PWM0
PWM1
AUDIO_MASTER_CLK
MS_SCK
MS_LRCH
PJ230
IC101-*1
LGE101 (S7 NON_TON/DiX/RM)
AE1
AF16
AF1
AE3
AD14
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
AF3
AF14
AD1
AD13
AE14
AE13
AE4
AD5
AF4
AD4
AE2
AF8
AD9
AE9
AF9
AE11
AF6
AE6
AF11
AD6
AD12
AE5
AF12
AF5
AE12
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
AE8
Y11
Y19
W26
NC_48
LVACLKP/LLV6P/BLUE[3]
W25
NC_78
LVACLKN/LLV6N/BLUE[2]
U26
NC_64
LVA0P/LLV3P/BLUE[9]
U25
NC_50
LVA0N/LLV3N/BLUE[8]
U24
NC_45
LVA1P/LLV4P/BLUE[7]
V26
NC_34
LVA1N/LLV4N/BLUE[6]
V25
NC_77
LVA2P/LLV5P/BLUE[5]
V24
NC_65
LVA2N/LLV5N/BLUE[4]
W24
NC_62
LVA3P/LLV7P/BLUE[1]
Y26
NC_33
LVA3N/LLV7N/BLUE[0]
Y25
NC_47
LVA4P/LLV8P
Y24
NC_46
LVA4N/LLV8N
NC_63
AC26
LVBCLKP/LLV0P/GREEN[5]
AC25
LVBCLKN/LLV0N/GREEN[4]
AA26
LVB0P/RLV6P/RED[1]
AA25
NC_66
LVB0N/RLV6N/RED[0]
AA24
NC_76
LVB1P/RLV7P/GREEN[9]
AB26
NC_32
LVB1N/RLV7N/GREEN[8]
AB25
LVB2P/RLV8P/GREEN[7]
AB24
NC_44
LVB2N/RLV8N/GREEN[6]
AC24
NC_61
LVB3P/LLV1P/GREEN[3]
AD26
NC_60
LVB3N/LLV1N/GREEN[2]
AD25
LVB4P/LLV0P/GREEN[1]
AD24
LVB4N/LLV0N/GREEN[0]
NC_51
NC_36
AD23
NC_67
RLV3P/RED[7]
E23
A
NC_35
RLV3N/RED[6]
AE26
RLV0P/LVSYNC
AE25
NC_49
RLV0N/LHSYNC
AF26
RLV1N/LCK
AF25
RLV2P/RED[9]
AE24
RLV1P/LDE
NC_71
AF24
NC_40
RLV2N/RED[8]
AF23
RLV4P/RED[5]
AD22
RLV4N/RED[4]
NC_56
AE22
RLV5P/RED[3]
NC_72
AF22
RLV5N/RED[2]
NC_58
NC_69
AD19
TCON3/OE/GOE/GCLK2
AE19
NC_53
TCON15/SCAN_BLK1
AD21
NC_74
TCON18/CS7/GCLK5
AE21
NC_37
TCON19/CS8/GCLK6
AF21
NC_43
TCON11/CS5/HCON
AD20
NC_52
TCON10/CS4/OPT_N
AE20
NC_75
TCON9/CS3/OPT_P
AF20
TCON16/WPWM
NC_68
AF19
TCON12/DPM
NC_59
AD18
TCON1/STV/GSP/VST
AE18
TCON5/TP/SOE
NC_57
AF18
TCON14/SACN_BLK
NC_70
NC_42
NC_38
AB22
TCON21/CS10/VGH_ODD
NC_41
AB23
TCON20/CS9/VGH_EVEN
NC_54
AC23
TCON13/LEDON
NC_73
AC22
NC_39
TCON17/CS6/GCLK4
AB16
NC_26
AA14
NC_19
AC15
NC_30
Y16
NC_15
AC16
NC_31
AC14
NC_29
NC_55
AA16
NC_21
NC_12
AA15
NC_20
GND_105
Y10
NC_11
AA11
NC_17
AB15
NC_25
AB14
NC_24
NO D IVX Mode l _ PJ23 0
V4 LGD BIT SEL
H o r NC : 1 0 bi t
L : 8 b it
V4 LGD LVDS SEL
L o r N C : VE SA
H : J EID A
V4 LGD OPC
L o r N C : DIS ABLE
H : ENABLE
BIT_SEL,LVDS_SE : LCD MODULE OPT
OPC : O pti mal po wer co ntr ol FOR PI CTU RE
AFLC: LED TV OPTION
CH_2
CH_8
RGB_DDC_SCL
1K
R38
PWM2
U22
PCM_D0
T21
PCM_D1
T22
PCM_D2
AB18
PCM_D3
AC18
PCM_D4
AC19
PCM_D5
AC20
PCM_D6
AC21
PCM_D7
U21
PCM_A0
V21
PCM_A1
Y22
PCM_A2
AA22
PCM_A3
R22
PCM_A4
R21
PCM_A5
T23
PCM_A6
T24
PCM_A7
AA23
PCM_A8
Y20
PCM_A9
AB17
PCM_A10
AA21
PCM_A11
U23
PCM_A12
Y23
PCM_A13
W23
PCM_A14
W22
PCM_REG_N
AA17
PCM_OE_N
V22
PCM_WE_N
W21
PCM_IORD_N
Y21
PCM_IOWR_N
AA20
PCM_CE_N
V23
PCM_IRQA_N
P23
PCM_CD_N
R23
PCM_WAIT_N
P22
PCM_RESET
AC17
PCM_PF_CE0Z
AB20
PCM_PF_CE1Z
AA18
PCM_PF_OEZ
AB21
PCM_PF_WEZ
AB19
PCM_PF_ALE
AD17
PCM_PF_AD[15]
AA19
PCM_PF_RBZ
M23
UART_TX2/GPIO65
N23
UART_RX2/GPIO64
M22
DDCR_DA/GPIO71
N22
DDCR_CK/GPIO72
A5
DDCA_DA/UART0_TX
B5
DDCA_CK/UART0_RX
K23
PWM0/GPIO66
K22
PWM1/GPIO67
G23
PWM2/GPIO68
G22
PWM3/GPIO69
G21
PWM4/GPIO70
C6
SAR0/GPIO31
B6
C8
C7
A6
SAR1/GPIO32
SAR2/GPIO33
SAR3/GPIO34
SAR4/GPIO35
22R46
LGE101D (S 7 Non_Tcon/R M)
IC10 1
TCON0/POL
TCON2/GSP_R/GCLK1
TCON4/CPV/GSC/GCLK3
TCON6/FLK
TCON8/CS2/FLK3
GPIO36/UART3_RX
GPIO37/UART3_TX
GPIO50/UART1_RX
GPIO51/UART1_TX
GPIO6/P M0/INT0
GPIO7/PM1/PM_UART_TX
GPIO11/PM5/PM_UART_RX/INT1
PM_SPI_WP1/GPIO13/PM7
PM_SPI_WP2/ GPIO14/PM8/INT2
PM_SPI_CS2 /GPIO16/PM10
GPIO8/PM2
GPIO9/PM3
GPIO10/PM4
PM_SPI_CS1/ GPIO12/PM6
GPIO15/PM9
GPIO17 /PM11/IN T3
GPIO18 /PM12/IN T4
PM_SPI_CK/GPIO1
GPIO0/PM_SPI_CZ
PM_SPI_D I/GPIO2
PM_SPI_DO/GPIO3
TS0_CLK
TS0_VLD
TS0_SYNC
TS1_CLK
TS1_VLD
TS1_SYNC
MPIF_CLK
MPIF_CS_N
MPIF_BUSY
MPIF_D0
MPIF_D1
MPIF_D2
MPIF_D3
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
TS0_D0
TS0_D1
TS0_D2
TS0_D3
TS0_D4
TS0_D5
TS0_D6
TS0_D7
TS1_D0
TS1_D1
TS1_D2
TS1_D3
TS1_D4
TS1_D5
TS1_D6
TS1_D7
N21
M21
L22
L21
P21
K21
L23
K20
L20
M20
G20
G19
F20
F19
E7
D7
E11
G9
F9
C5
E8
E9
F7
F6
D8
G12
F10
D9
D11
E10
D10
AA9
AA5
AA10
AB5
AC4
Y6
AA6
W6
AA7
Y9
AA8
AC5
AC6
AB6
AC10
AB10
AC9
AB9
AC8
AB8
AC7
AB7
D12
D14
E14
E12
F12
D13
E13
R89
R97
R98
R90
R92 R81
R82
R83
R136
R18
R28
READY
100R88
22
22R96
33
33
C18
10pF
READY
22R 101
22
22R80
33 33
33
33
22R 104
22
22
22
1KR99
READY
C19
10pF
READY
5V_DET_HDMI_2
5V_DET_HDMI_4
5V_DET_HDMI_3
SIDE_CVBS_DET
COMP1_DET
MODEL_OPT_0
MOD_ROM_RX
MOD_ROM_TX
USB1_OCD
USB1_CTL
MODEL_OPT_6
MODEL_OPT_1
/FLASH_WP
MODEL_OPT_2
TUNER_RESET
DEMOD_RESET
AV_CVBS_DET
/SP I_CS
SPI_CK
SPI _DI
SPI_DO
FE_TS_CLK
FE_TS_VLD
FE_TS_SYN
FE_TS_SERIAL
BRAZIL DEMOD OPT
HDCP EEPROM
IC102
CAT24WC08W-T
R7
4.7 K
I2 C : A0
R6
4.7 K
READY
A0
A1
A2
VSS
EEPROM
M24M01-HRMN6TP
NC
E1
E2
VSS
1
2
3
4
$0. 199
IC109
1
2
3
4
VCC
8
WP
7
SCL
6
SDA
5
+3.3 V
Add r:10 101- -
4.7 KR1 3
22R14
22R15
+3.3 V
C3
0. 1uF
I2C_SCL
I2C_SDA
CH_2
RS232 DEBUG SWITCH
- NEC/S7/WIRELESS
A/B
OUTPUT
LOW
HIGH
TO HDMI JACK FOR WIRELESS
S7_RXD
NEC_RXD
VCC
8
C1
0. 1uF
WP
7
SCL
6
SDA
5
4.7 K
R20
4.7 K
R22
I2C_SCL
I2C_SDA
CH_2
512 KBIT = $0 .35
IC109-*1
M24512-HRMN6TP
E0
VCC
1
8
E1
WP
2
7
E2
VSS
ST_NVRAM_512K
SCL
3
6
SDA
4
5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
X0 Y0 NEC X1 Y1 S7M
Y1
Y0
Z1
Z
Z0
INH
VEE
VSS
IC1 05
MC14053BDR2G
0ISTL0 0024A
1
2
3
4
5
6
7
8
AB8;AM7
C14
12pF
50V
X102
10MHz
14
P30/ INTP 1
R73
P17 /TI5 0/T O50
0
100K
15
R75
P121/X1/OCD0A46REGC47VSS
45
IC10 8
16
17
P15/TOH0
P16/TO H1/INTP 5
FLMD0
+3.3V_NEC_ST
R126
C15
22pF
C16 27pF
3K
RESET_NEC
CHECK !! STANDBY STAUTE
HALT
MODE
X101
32.7 68KHz
R86
4.7M
R161
100K
CHECK WAKE UP BY KEY !!
R118 120K
EDID_WP
C
FLMD0
SUB_SCL
SUB_SDA
MODEL1_OPT_2
POWER_ON/OFF1
KEY2
KEY1
Q102EB 2SC3052
+3.3 V
P124/XT2/EXCLKS42P123/ XT143FLMD044P122/X2/EXCLK/OCD0B
P120/ INTP0/ EXLVI38P4139P4040RESET
37
41
18
19
20
21
P12/ SO10
P13/TXD6
P14/RXD6
P11/SL 10/RXD0
16V
22
22
22
77R
87R
39R
AC_DET
22
P10/SCK10/T XD0
22
001R
36
35
34
33
32
31
30
29
28
27
26
25
23
24
+3.3V_NEC_ST
AVSS
AVREF
C17
0. 1uF
P140 /PCL/ INTP6
P00 /T I00 0
P01 /TI0 10/ TO00
P130
P20/ ANI0
ANI1 /P21
ANI2 /P22
ANI3 /P23
ANI4 /P24
ANI5 /P25
ANI6 /P26
ANI7 /P27
C20 100u F
READY
R26
4.7 K
R27
4.7 K
READY
NEC_TXD
NEC_RXD
R137
+3.3V_NEC_ST
RL_ON
10KR122
22R198
22R138
22
22R1 23
READY
10KR124
22R1 20
22R1 21
NEC SUB MICOM
ISP Po rt f or SUB MIC OM
+3.3V_NEC_ST
P101
12505WS-12A00
FOR DEBUG
1
R59
10K
IC107
M24C16-WMN6T
11NC
22E1
33E2
44GND
0IMMRSG036B
2
3
4
5
6
7
8
9
10
11
12
13
SUB_SCL_NEC_TEMP
SUB_SDA_NEC_TEMP
MICOM_CEC_ON/OFF
+3.3V_NEC_ST
88VCC
7
WC
7
66SCL
55SDA
LED_WHITE
5V_ON
MODEL1_OPT_3
MODEL1_OPT_0
SOC_RESET
MODEL1_OPT_1
OCD1B
C9
0. 1uF
16V
22R69
22R70
RESET_NEC
NEC_ISP_TXD
NEC_ISP_RXD
+3.3V_NEC_ST
+3.3V_NEC_ST
VDD
16
Y
15
X
14
X1
13
X0
12
A
11
B
10
C
9
RS232C_RXD
RS232C_TXD
S7_TXD
NEC_TXD
TO HDMI JACK FOR WIRELESS
R24 47K
C8
0. 1uF
16V
+5V
R25
4.7 K
MICOM MODEL OPTION
AMP_RESET_N
DISP_EN
ERROR_DET
MODEL_OPT_0
MODEL_OPT_3
0
10KR44
READY
RED_WHITE 100R32
100R43
100R199
10KR45
RED_ONLY
RED & WHITE
0 1
10K
10K
10K
R47
READY
READY
READY
R140
R162
ADD_BREATHING
MODEL1_OPT_0
MODEL1_OPT_1
MODEL1_OPT_2
MODEL1_OPT_3
10K
10KR195
10K
READY
READY
R115
RED_ONLY
R144
ADD BREATHINGRED ONLY
00 1
OCD1A
OCD1B
FLMD0
FOR DEBUG
R60
47K
MICOM_10MHz
12R
K7.4
4.7 K
R23
22R62
22R63
R66
R67
P33 /TI5 1/TO 51/ INTP 4
22R61
22R1 31
P32/INTP3 /OCD1B
NEC_ISP_RXD
NEC_ISP_TXD
C13 12pF
50V
+3.3V_NEC_ST
L103
C12
0. 1uF
C11
VDD
0. 1uF
P60/S CL0
P61/SDA0
4.7 K
4.7 K
P73/KR3
P72/KR2
P71/KR1
P70/KR0
48
1
2
P62/EXSCL0
3
P63
4
5
P75
6
UPD78F0513AGA-GAM-AX
P74
7
8
9
10
11
12
13
P31/INTP2/O CD1A
OCD1A
R72
0
HDMI_CEC
IR
LED_RED
EAX61373301
S7/FLASH/NVRAM/GPIO
1 13
Page 28
< LGIT CAN H/N TUNER >
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
+5V_TU
L1303
MLB-2 01209-0 120P-N 2
TU1300 TDTR-T035F
10
11
12
13
14
15
16
17
18
19
SHIELD
RF_S/W_CTL
1
BST_CTL
2
+B1 [5V]
3
NC_1[RF_AGC]
4
NC_2
5
SCLT
6
SDAT
7
NC_3
8
SI F
9
NC_4
VIDEO
GND
+B 2[1 .2V]
+B 3[3 .3V]
RESET
IF/AGC
DI F_1 [N]
DI F_2 [P]
C1305 1200p F 50V
C1314 1200p F 50V
TUNER_IF_N
TUNER_IF_P
+1.2V_DE
L1301
C1307
4. 7uF 10V
C1309
1200 pF
50V
C1306
0. 1uF
C1308
4. 7uF 10V
C1302
0. 1uF
16V
C1300
0. 1uF
Pu l l- u p c a n’ t b e a p pl i ed
becau se of MODEL_ OPT_2
+5V_TU
L1302
C1301 22uF 16V
+3. 3V
L1300
C1304
4. 7uF
C1303
10V
0. 1uF
RF_SWITCH_CTL
R1309 100
+3. 3V
R1311 100K
C1310
0. 1uF
16V
Q1306
ISA1530AC1
C1311
0. 01u F 25V
TUNER_RESET
E
B
C
C1312 47pF 50V
R1322 1K
C1316
0. 1uF 16V
Cl o se t o t he tu n er
R1321
2.2 K
C1313 47pF 50V
100
100
C
Q1307EB
2SC3052
R1318
R1315
R1316
R1343
10K
R1344
10K
+3. 3V
3K
R1320
3K
ISDB_IF_AGC
TU_SCL
TU_SDA
FE_BOOSTER_CTL
CH_6
C1325
100p F 50V
READY
R1325
4.7 K
R1326
READY
R1327
READY
+5V_TU
R1329
470
R1332
Q1304
82
ISA1530AC1
E
B
C
TUNER_SIF
+5V_TU
1K
R1330 100
0R1324
E
Q1305
B
ISA1530AC1
1K
C
R1334 82
TUNER_CVBS
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LGIT CAN TUNER
1 3 1 3
Page 29
Page 30
Great Company Great People
Brazil Basic DTV Training manual
Brazil Basic DTV Training manual
Contents
- System Design
- Trouble Shooting Guide
Last updated 2009.11.19
ATSCGroupBrazilTeam
Page 31
1. Power-Up Boot Fail Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 32
Reset Design
KIA7029AF
(Reset)
Active Low
Micom
Active Low
GPIO Reset Active High
TAS5709
(AMP)
S7
(Main Soc)
GPIO Reset
Active Low
GPIO Reset
Active Low
Tuner
Demodulator
Customer Oriented R&D Breakthrough
Page 33
S7 Power Sequence
Appendix
Power Up Sequence
Power
XTAL
3.3V
AVDD_DMPLL
Reset
(HI Active)
1.26V
3.3V
VDDP
1.5V/1.8V with
Other Power
Note:
3.3V_AVDD_MPLL (AVDD_DMPLL)
t1
1.26V (VDDC)
t2
3.3V_VDDP (VDDP)
t3
1.5V/1.8V (AVDD_DDR0/1)
t4
Other Power (AVDD_AU25, AVDD_AU33, AVDD_MEMPLL, AVDD2P5_ADC…etc)
Time
Customer Oriented R&D Breakthrough
Page 34
S7 Power Sequence
Power Up Timing Requirements
Time Description Min Typ. Max Unit
Appendix
t
1
t
2
t
3
t
4
Customer Oriented R&D Breakthrough
XTAL stable to Reset falling 5 ms
Reset pulse width 5 ms
1.26V to Reset falling 5 ms
3.3VDDP to Reset falling 5 ms
Page 35
S7 Power Sequence
# t2 : Reset Pulse Width : 40ms Æ OK
Customer Oriented R&D Breakthrough
Page 36
S7 Power Sequence
a) AC On b) DC(Remocon) On
1 :X-tal
2 : 3.3V
3 : 1.26V
4 : Reset
# t1 : Reset Pulse Width : 400ms Æ OK # t3 : Reset Pulse Width : 400ms Æ OK # t4 : Reset Pulse Width : 400ms Æ OK
1 :X-tal
2 : 3.3V
3 : 1.26V
4 : Reset
# t1 : Reset Pulse Width : 120ms Æ OK # t3 : Reset Pulse Width : 120ms Æ OK # t4 : Reset Pulse Width : 120ms Æ OK
Customer Oriented R&D Breakthrough
Page 37
GP2 I2C MAP
TGPIO2/I2C_CLK TGPIO3/I2C_SDA
DDCR_CK/GPIO72 DDCR_DA/GPIO71
SATURN 7
DDCDA_CK/GPIO23
DDCDA_DA/GPIO24
DDCDB_CK/GPIO25
DDCDB_DA/GPIO26
DDCDD_CK/GPIO29 (B4)
DDCDD_DA/GPIO30
DDCDC_CK/GPIO27 (AA4)
DDCDC_DA/GPIO28
DDCA_CK/UART0_RX (N22)
DDCA_DA/UART_TX
TGPIO0 TGPIO1
(R3)
(T3)
(N22) (M22)
(U1) (U2)
(C4)
(AB4)
(M22)
<TU_SCL>
<TU_SDA>
<I2C-SCL> <I2C-SDA>
<SCL1> <SDA1>
TAS5709
TAS5709
<DDC_SCL3> <DDC_SDA3>
<DDC_SCL4>
<DDC_SDA4>
<RGB_DDC_SCL> <RGB_DDC_SDA>
TUNER
TUNER
LGIT HN(LGT10)
0xC2(PLL)/0x10(Analog Demod)
0xC2(PLL)/0x10(Analog Demod)
NVRAM
AMP
AMP
0x36
0x36
EEPROM
EEPROM
HDMI1
EEPROM
EEPROM
HDMI1
HDMI1
EEPROM
EEPROM
LGIT HN(LGT10)
NVRAM
0xA0
0xA0
PDP MODULE
PDP MODULE
HDMI1
0XA0
0XA0
0XA0
0XA0
RGB
RGB
0XA0
0XA0
HDCP EEPROM
HDCP EEPROM
0xA8
0xA8
0x1C
0x1C
CH 12
CH 11
CH 8
DEMOD.(BRAZIL)
DEMOD.(BRAZIL)
MN884433
MN884433
0xD8
0xD8
5V_HDMI_1 /+5.0V
5V_HDMI_Side /+5.0V
+5V_ST
CH 6
CH 2
CH 5
+3.3V_TU
+3.3V
+3.3V /+3.3V_NEC_ST
I2S_IN_WS/GPIO174 (F15)
I2S_IN_BCK/GPIO175
<SUB_SCL_NEC_TEMP> <SUB_SDA_NEC_TEMP>
(F14)
MICOM
MICOM
UPD78F0513
UPD78F0513
0x52
0x52
CH 7
EEPROM
EEPROM
M24C16
+3.3V
M24C16
0x?
0x?
SUB I2C
SUB I2C
Touch Eye
Touch Eye
0x70
0x70
Customer Oriented R&D Breakthrough
Page 38
GPIO Structure
_R/GCLK1
//GSC_R/G
CLK3
DescriptionDirectionSignal NameGPIO Chip configurationInputPWM066 Chip configurationInputPWM167 D-Sub Auto link checkInputDSUB_DET31 Model option 3InputModel_OPT_332 Model option 0InputModel_OPT_042 Model option 1 /FE_BOOSTER_CTRLInput/OutputModel_OPT_111 Model option 2/RF_SWITCH_CTLInput/OutputModel_OPT_214 (HDMI3 Ready) HDMI 5V DetectInput5V_DET_HDMI_2TCON2/GSP
HDMI Side 5V DetectInput5V_DET_HDMI_4TCON4/CPV
HDMI_1 5V DetectInput5V_DET_HDMI_3TCON6/FLK Compnent1 Auto linkInputCOMP1_DET40 Module Rom download UARTInputMOD_ROM_RX50 Module Rom download UARTOutputMOD_ROM_TX51 USB1_OCDinputUSB1_OCD5 USB1_5V Power ControlOutputUSB1_CTRL7 TUNER_RESETOutputTUNER_RESET15 Demodulator ResetOutputDEMOD_RESET16 AV_CVBS Auto linkInputAV_CVBS_DET17 Compnent2 Auto linkInputCOMP2_DET176 SIDE_CVBS Auto linkInputSIDE_CVBS_DETTCON8/CS2
/FLK3
Customer Oriented R&D Breakthrough
Page 39
GP2 BRAZIL LOW Power Map
STBY
Instant Boot
Multi Power
P
O
w
E R
B O A
R D
+5V_ST
L505
+3.3V
58mA
(ST_BY시)
L501
659mA
AP2121/0.3A :$0.048
Instant boot Ready
19mA
L507
P_17V
<TUNER 5V >
P_17V
P_+5V
L702
L703
L1300
L901
L102
TU700(TAS5709)
IC507(DCDC) IC506(LDO)
HDMI CEC
+3.3V_DVDD
+3.3V_AU_AVDD
IR PART
IC102,9(EEPROM)
IC103(Serial Flash)
IC104(NAND Flash)
IC500
(3.3V Reg)
601mA 355mA
IC901(RGB EEPROM)
+7V
Q501 (TR)
IC1101(USB S/W)
IC1000(NAND GATE)
SPDIF
IC700(TAS5709) IC700(TAS5709)
TU1300(TUNER)
+3.3V_DE
L609
IC600(REG)
+3.3V_ST
R508
+5V
+1.2V_DE
L1301
IC502
(DCDC)
+5V_TU
L1100
IC504 (LDO)
IC602
(MN884433)
+1.5V_DDR_IN
TU1300(TUNER)
+3.3V
L514
TU1300(TUNER)
L900
L502
Multi Power
USB REAR (SVC)
801,802,804
(HDMI EEPROM)
+3.3V_AVDD
IC505 (REG)
L1201
VCC_1.5V_DDR
IC504 (DCDC)
L310
L308 L309
+2.5V_AVDD
IR PART
(RS232C DRV)
L300
L301
VDD33_3.3
+3.3V_NEC_ST
IC900
R1201
R1204
R1224 R1227
AVDD_DDR0_1.5
R300
AVDD_DDR1_1.5
+1.26V_VDDC
L318
L314 L316
L303 L304
L305 L306
A-MVREFDQ
A-MVREFCA
B-MVREFCA B-MVREFDQ
MVREF
+1.26V_MIU1VDDC
L321
+1.26V_MIU0VDDC
L324 L323
VDD33_DVI AVDD_DMPLL_3.3 AVDD_NODIE_3.3
AU33_3.3
FRC_LPLL_3.3 VDD33_3.3
VDDC
AVDD2P5_2.5
AVDD25_PGA_2.5 AU25_2.5 ADC2P5_2.5
IC105
DEBUG S/W
IC108
NEC MICOM
IC107
MICOM EEPROM
IC1201,1202
(DDR3)
IC100
MSTAR (S7)
Customer Oriented R&D Breakthrough
Page 40
Trouble Shooting Guide for LG Service Man
Please check system, after power Off/On one time
1. Power-Up Boot Fail Trouble Shooting
2. No OSD Trouble Shooting
3. Digital TV Video Trouble Shooting
4. Analog TV Video Trouble Shooting
5. Component Video Trouble Shooting
6. RGB Video Trouble Shooting
7. AV Video Trouble Shooting
8. HDMI Video Trouble Shooting
9. All Source Audio Trouble Shooting
10. Digital TV Audio Trouble Shooting
11. Analog TV Audio Trouble Shooting
12. Component / RGB / AV Audio Trouble Shooting
13. HDMI Audio Trouble Shooting
14. USB Trouble Shooting
Customer Oriented R&D Breakthrough
Page 41
1. Power-Up Boot Fail Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 42
1. Power-Up Boot Fail Trouble Shooting
Check P500 All Voltage Level
(17V, 5V, 3.5/5V_ST)
Y
Check All Voltage Level
at Bead, RL_ON, IC500 output
Y
Check Voltage Level 3.3V at IC504,
R124(Micom)
Y
Check Voltage Level 1.26V at C534
Y
Check Voltage Level 1.5V
at IC502 #7 pin
Y
Check Voltage Level 2.5V at C589
Y
Check X200 Clock24MHz
NY
N
N
N
N
N
N
Check Power connector
Replace one of Bead, IC500
& Recheck
If Q501 Output is normal,
Replace of the IC504
& Recheck
Check R527 voltage level
(3.3V RL_ON)
Replace one of IC501 & Recheck
Check R500 voltage level
(ON/OFF Control)
Replace one of IC502 & Recheck
Replace one of IC505 and application
circuit & Recheck
Replace X200
N
N
N
N
N
Replace Power board
Check Micom Redownload or
replace
Y
Check signal transition
at IC103
Y
Check signal transition
IC104
Y
N
N
Maybe Serial Flash Memory
problem
Maybe NAND Flash Memory or S7
have troubles
N
N
Check S7 Main chip and Soc_Reset
Signal from micom GPIO
Check DDR Memory
/Replace one
Customer Oriented R&D Breakthrough
Page 43
2. No OSD Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 44
2. No OSD Trouble Shooting
Check P500
5V_ON
Y
Check 5V Voltage Level
at P500
Y
Check 5V Voltage Level
at L507, L501
Y
Check 5V Voltage Level at Q501
Y
Check P903
(TXAC-), (TXAC+), (TXBC-),
(TXBC+), Display Enable
Y
Check LVDS Cable
N
NY
N
N
N
N
Check GPIO Path of Micom
Check Power connector
Replace one of L507,501
& Recheck
Replace one of Q501
& Recheck
Maybe S7(IC101)
has troubles
Replace Cable
Replace Power board
Y
Check PDP Module
Check CAS
Electrical Specifications Power Supply Sequence Input Signal Timing Specification Control Signal Register
It should satisfy the Pixel Clock on CAS.
Customer Oriented R&D Breakthrough
Page 45
No OSD Trouble Shooting (Module Power Sequence)
Vcc
(5V)
Va
T
On
T
OffTOnR
Vs
DISPEN
T
On
T
Off
T
OnR
T
VaR
T
VaF
T
VsR
T
VsF
T
d_on
T
VaR
T
VsR
T
d_on
Normal Display
Time interval between 90% of Vcc and 10% of Vs
when Power On
Time interval between 10% of Vs and 90% of Vcc
when Power Off
Time interval between 10% of Vcc and 90% of Vcc
when Power On
Rising Time of Va (10% to 90%)
Falling Time of Va (90% to 10%)
Rising Time of Vs (10% to 90%)
Falling Time of Vs (90% to 10%)
Time interval between 90% of Vs
and DISPEN rising edge when Power On
T
d_off
T
VaF
T
VsF
unitMax.Min.DescriptionSymbol
msec1250750
msec-20
msec-2000
msec30010 msec50050 msec400100 msec50090
msec-3100
msec60001500
T
d_off
Time interval between DISPEN falling edge
and 90% of Vs when Power Off
Recommended 2sec
Customer Oriented R&D Breakthrough
Page 46
Module Control Trouble Shooting
“TILT” on Adjust Remocon
: PDP internal pattern displays?
Y
PDP Module is OK.
Check SCL,SDA line
1
SCL
00
SDA
Start
0
Chip ID Address Byte
By
Master
SCL (continue) SDA (continue)
N
N
111
(0x1C)
9 1
PDP Module Power is OK?
Y
Replace PDP Module
Check Signal
output
W
0
Write
only
By Slave
D7
D6
9
ACK
N
Check SMPS & cable
SCL
SDA
N
Replace Control
1
A7
A6
Board
A1
< Sample Signal >
8
A0
Command Address
Addr=A[7:0]
9
ACK signal Check
Low : OK High : Error
D0
ACK
By Slave
Command Data
for Addr
ACK
By Slave
Stop
By Master
Master : Image Board Slave : PDP Module
Customer Oriented R&D Breakthrough
Page 47
3. Digital TV Video Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 48
3. Digital TV Video Trouble Shooting
Check RF Cable
Y
Check Tuner(TU1300) Power
(5.0V, 3.3V, 1.2V)
Y
Check IF Signal pin #17, 18
Y
Check Demodulator Power
(3.3V, 1.2V) L609, IC600
Y
Check Demodulator X-TAL
(X602)
Y
Check TP Clock, Data, Sync
R630, R631, R632
Y
Maybe MstarS7(IC100)
has problems
N
N
N
N
N
Replace one of Bead
& Recheck
Maybe Tuner has problems
Replace L609 / IC600
Replace X-TAL
Maybe Demodulator has problems
Customer Oriented R&D Breakthrough
Page 49
4. Analog TV Video Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 50
4. Analog TV Video Trouble Shooting
Check RF Cable
Y
Check Tuner Power
(5.0V, 3.3V, 1.2V)
Y
Check CVBS Signal
TU1300 #11 Pin
Y
N
N
Maybe Tuner(TU1300) has problems
Replace one of
L1301/L1300/L1302
& Recheck
Check CVBS Signal
R1334
Y
Maybe MstarS7(IC100)
has problems
N
Replace one of
R1330/Q1305/R154/C213
& Recheck
Customer Oriented R&D Breakthrough
Page 51
5. Component Video Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 52
5. Component Video Trouble Shooting
Check Signal Format
Is it supported signal?
Y
Check Component Cable
Y
Check Component Jack JK1001
Y
Check Component Signal
R1020/R1021/R1022 R1005/R1012/R1013
Y
Check Component Signal
R175/R173/R177 R180/R182/R184
Y
N
N
N
Replace Jack
Replace one of
R1020/R1021/R1022
R1005/R1012/R1013
& Recheck
Replace it
Maybe Mstar S7(IC100)
has problems
Customer Oriented R&D Breakthrough
Page 53
6. RGB Video Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 54
6. RGB Video Trouble Shooting
Check Signal Format
Is it supported signal?
Y
Check RGB Cable
Y
Check RGB Jack P901
Y
Check RGB Signal
R907,R908,R909
Y
Check Sync Signal
Y
Check EEPROM (IC901)
N
N
N
N
Replace It & Recheck
Replace one of R915/R916
Replace Jack
& Recheck
Replace it or re-burn
& Recheck
Y
Maybe Mstar S7(IC101)
has problems
Customer Oriented R&D Breakthrough
Page 55
7. AV Video Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 56
7. AV Video Trouble Shooting
Check Signal Format
Is it supported signal?
Y
Check AV Cable
Y
Check Jack JK1001/JK1002
Y
Check CVBS Signal
C1016/C1018
Y
N
N
Replace Jack
Replace one of
C1016/C1018
& Recheck
Check CVBS Signal
R187/R188/C226/C227
Y
Maybe Mstar S7(IC101)
has problems
N
Replace one of
R187/R188/C226/C227
& Recheck
Customer Oriented R&D Breakthrough
Page 57
8. HDMI Video Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 58
8. HDMI Video Trouble Shooting
Check Signal Format
Is it supported signal?
Y
Check HDMI Cable
Y
Check HDMI Jack
JK803, JK804
Y
Check I2C Signal
R844/R845
/R858/R859/R848/R849/R862/R863
Y
Maybe Mstar S7(IC101)
has problems
N
N
Replace It & Recheck
Replace Jack
Customer Oriented R&D Breakthrough
Page 59
9. All Source Audio Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_S7
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_S7
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 60
9. All Source Audio Trouble Shooting
Make sure you can’t hear any audio
Y
Check Speaker
Y
Check Connector P703
Y
Check Signal
L700, L701
Y
Check IC700 Power
17V, 3.3V
L702,L703
Y
Check Mstar S7 I2S Output
R724, R725, R726
Y
Maybe Mstar S7(IC101)
has problems
N
N
N
N
N
Replace Speaker
Replace Connector
Replace one of
Capacitor, Register
& Recheck
Replace It & Recheck
Replace It & Recheck
N
Maybe TAS9709 has problems.
Replace It
Customer Oriented R&D Breakthrough
Page 61
10. Digital TV Audio Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 62
10. Digital TV Audio Trouble Shooting
Check video output
Y
Follow procedure All source audio
trouble shooting
N
N
Follow procedure digital TV video
trouble shooting
Maybe Mster S7 internal audio DSP
has problems. Replace It
Customer Oriented R&D Breakthrough
Page 63
11. Analog TV Audio Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 64
11. Analog TV Audio Trouble Shooting
Check video output
Y
Check Tuner Power
(5.0V, 3.3V, 1.2V)
Y
Check SIF Signal
TU1300 #9 Pin
Y
Check SIF Signal
Y
Follow procedure All source audio
trouble shooting
N
N
N
N
N
Follow procedure analog TV video
trouble shooting
Replace one of L1300/L1301/L1302
& Recheck
Maybe Tuner(TU1300) has problems
Replace one of
C252/R246/R1332/Q1304/R1325
IC501 & Recheck
Maybe Mstar S7 audio block has
problems. Replace It
< SIF waveform – sample >
- Defend on the input signal.
Customer Oriented R&D Breakthrough
Page 65
12. Component / RGB / AV Audio Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 66
12. Component / RGB / AV Audio Trouble Shooting
Check Video Output
Y
Check Jack JK1001/JK1002/P900
Y
Check Signal C206/C207/C208/C209/C210/C211 C212/C220/C221/C222/C223/C224 C225/C205/R166/R167/R168/R169 R170/R171/R127/C215/C216/C203 C217/C218/C219/C204/R187/R188
C226/C227
Y
Follow procedure All source audio
trouble shooting
N
N
N
N
Follow procedure external input
video trouble shooting
Replace Jack
Replace one of C206/C207/C208/C209/C210/C211 C212/C220/C221/C222/C223/C224 C225/C205/R166/R167/R168/R169 R170/R171/R127/C215/C216/C203 C217/C218/C219/C204/R187/R188 C226/C227 & Recheck
Maybe Mstar S7 audio block has
problems. Replace It
Customer Oriented R&D Breakthrough
Page 67
13. HDMI Audio Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 68
13. HDMI Audio Trouble Shooting
Check video output
Y
Re-download EDID data
Y
Follow procedure All source audio
trouble shooting
N
N
N
Follow procedure HDMI video
trouble shooting
Replace IC802, IC804
Maybe Mstar S7 audio block has
problems. Replace it
Customer Oriented R&D Breakthrough
Page 69
14. USB Trouble Shooting
(Front-end)
(External Input)
SIDE HDMI_PORT
UI_HW_PORT1
(System + Scalar)
Cable
ISDB-T/
PAL/NTSC
IF
Demodulator
MN884433
AV1_LR
AV2_LR
COMP1_LR
COMP2_LR
RGB_LR
CVBS_LIVE SIF1
TP1
AV1
AV2
EXT_IN
(Comp1/2, RGB)
HDMI_Rear(D port)
(Audio Out)
I2S_BCM
(USB)
CVBS_LIVE
SIF_LIVE
EXT_IN
HDMI_D
HDMI_C
TAS9709
TAS9709
TP1
Serial_Flash
Serial_Flash
1MB
1MB
NANDFlash
NANDFlash
256MB
256MB
S7
S7
DDR3
DDR3
256MB(128*2)
256MB(128*2)
(Micom)
KIA7427AF
KIA7427AF
Reset
LVDS
SPDIF
USB2.0
WXGA/XGA
I2S_BCM
I2C
Rear(0)
Side(1)
HDMI CEC (Stand-by)
24C16
NEC
NEC
Micom
Micom
24C16
Local
Local
IR
KEY
KEY
Rear USB( SVC only PJ230)
HDMI_Side (C port)
Side USB
Customer Oriented R&D Breakthrough
Page 70
14. USB Trouble Shooting
Check USB 2.0 Cable
Y
Check USB device
If device is 2.5 inch HDD,
Check power adaptor
Y
Check P1102 (250/350 tool)
P1100 (230 tool)
Y
Check 5V voltage level
IC1101 #2 (250/350 tool)
L1100 (230 tool)
Y
MaybeMstar S7 (IC101)
has problems. Replace It.
N
N
Replace Jack
Replace one of
IC1101,L1100 & Recheck
Exception
- USB power could be disabled by inrushing current
- In this case, remove the device and try to reboot the TV (AC power off/on)
Customer Oriented R&D Breakthrough
Loading...