LG 60PZ250N-ZB, 42PT450, 60PZ250A, 60PZ250N, 42PW450A Service Manual

PLASMA TV

SERVICE MANUAL

CAUTION

BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

CHASSIS : PD11A

MODEL : 42PW450/450A/450N/450T

MODEL : 42PW451/451A

42PW450/450A/450N/450T-ZA/ 42PW451/451A-ZD

North/Latin America http://aic.lgservice.com Europe/Africa http://eic.lgservice.com Asia/Oceania http://biz.lgservice.com

Internal Use Only

Printed in Korea

P/NO : MFL66306703(1101-REV00)

- 2 -

Only for training and service purposes

CONTENTS

CONTENTS ............................................................................................................................... 2

SAFETY PRECAUTIONS ...........................................................................................................3

SPECIFICATION.........................................................................................................................4

ADJUSTMENT INSTRUCTION ..................................................................................................6

BLOCK DIAGRAM ...................................................................................................................14

EXPLODED VIEW ..................................................................................................................15

CIRCUIT DIAGRAM .....................................................................................................................

- 3 -

Only for training and service purposes

SAFETY PRECAUTIONS

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.

It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this monitor is blown, replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Due to high vacuum and large surface area of picture tube, extreme care should be used in handling the Picture Tube. Do not lift the Picture tube by it's Neck.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1MΩ and 5.2MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.

Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

Leakage Current Hot Check circuit

1.5 Kohm/10W

To Instrument's exposed METALLIC PARTS

Good Earth Ground such as WATER PIPE, CONDUIT etc.

AC Volt-meter

IMPORTANT SAFETY NOTICE

0.15uF

- 4 -

Only for training and service purposes

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement

.

V Application Range

This spec is applied to PDP TV used PD11A Chassis.

V Specification

Each part is tested as below without special appointment. (1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 ± 5 (2) Relative Humidity: 65 % ± 10 % (3) Power Voltage: Standard Input voltage (100 V - 240 V ~, 50 / 60 Hz)

* Standard Voltage of each product is marked by models.

(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with

SBOM.

(5) The receiver must be operated for about 20 minutes prior to the adjustment.

V Test Method

(1) Performance : LGE TV test method followed. (2) Demanded other specification

Safety : CE, IEC specification, EMC : CE, IEC

V Module Specification

(1) 3D - 42” HD

No Item Specification Remark

1 Display Screen Device 106 cm (42 inch) wide Color Display Module PDP

2 Aspect Ratio 16:9

3 PDP Module PDP42T3####,

RGB Closed (Well) Type, Glass Filter (38%)

Pixel Format: 1024 horiz. By 768 ver

4 Operating Environment 1) Temp. : 0 deg ~ 40 deg

2) Humidity : 20 % ~ 80 %

5 Storage Environment 3) Temp. : -20 deg ~ 60 deg

LGE SPEC

4) Humidity : 10 % ~ 90 %

6 Input Voltage AC 100 V ~ 240 V, 50 / 60 Hz Maker LG

Model Name

42PW450-ZA

42PW450A-ZA

42PW450N-ZA

42PW450T-ZA

42PW451-ZD

42PW451A-ZD

Brand

LG

Market

Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, Czech, Denmark,

Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy,

Kazakhstan, Latvia, Lithuania, Luxembourg, Morocco, Netherlands, Norway,

Poland, Portugal, Romania, Russia, Serbia, Slovakia, Slovenia, Spain,

Sweden, Switzerland, Turkey, Ukraine, UK

Model Name

42PW450-ZA

42PW450A-ZA

42PW450N-ZA

42PW450T-ZA

42PW451-ZD

42PW451A-ZD

Appliance

Safety :

IEC/EN60065

EMI : EN55013

EMS : EN55020

Market

Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, Czech, Denmark,

Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy,

Kazakhstan, Latvia, Lithuania, Luxembourg, Morocco, Netherlands, Norway,

Poland, Portugal, Romania, Russia, Serbia, Slovakia, Slovenia, Spain,

Sweden, Switzerland, Turkey, Ukraine, UK

- 5 -

Only for training and service purposes

V Model General Specification

No Item Specification Remarks

1 Market Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, 36 Country

Czech, Denmark, Estonia, Finland, France, Germany,

Greece, Hungary, Ireland, Italy, Kazakhstan, Latvia,

Lithuania, Luxembourg, Morocco, Netherlands, Norway,

Poland, Portugal, Romania, Russia, Serbia, Slovenia,

Spain, Sweden, Slovakia, Switzerland, Turkey, Ukraine,

UK

2 Broadcasting system 1) PAL/SECAM BG EU (PAL Market)

2) PAL/SECAM DK

3) PAL Ⅰ/Ⅱ

4) SECAM L/L’

5) DVB T

6) DVB C

3 Receiving system Analog : Upper Heterodyne

Digital : COFDM

4 Scart Jack (1EA) PAL, SECAM

5 Video Input (1EA) PAL, SECAM, NTSC Side AV

6 Component Input (1EA) Y/Cb/Cr, Y/ Pb/Pr

7 RGB Input RGB-PC Analog (D-Sub 15Pin)

8 HDMI Input (4EA) HDMI-PC HDMI/DVI,HDMI2, HDMI3

HDMI-DTV

9 Audio Input (3 EA) RGB/DVI Audio, Component, AV L/R Input

10 SPDIF Out(1 EA) SPDIF Out

11 USB(1EA) For SVC, S/W Download, DivX

12 LAN For UK models

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Only for training and service purposes

ADJUSTMENT INSTRUCTION

1. Application Range

This spec sheet is applied to all of the PDP TV with PD11A chassis.

2. Specification

(1) The adjustment is according to the order which is

designated and which must be followed, according to the plan which can be changed only on agreeing.

(2) Power adjustment : Free Voltage. (100 V ~ 240 V, 50 Hz /

60 Hz.) (3) Magnetic Field Condition: Nil. (4) Input signal Unit: Product Specification Standard. (5) Reserve after operation: Above 5 Minutes (Heat Run)

Temperature : at 25 °C ± 5 °C Relative humidity 65 % ± 10 % Input voltage : 220 V, 60 Hz.

(6) Adjustment equipments : Color Analyzer (CA-210 or CA-

110), DDC Adjustment Jig equipment, SVC remote

controller. (7) The receiver must be operated for about 5 minutes prior to

the adjustment when module is in the circumstance of over

15 °C

- In case of keeping module is in the circumstance of 0 °C, it should be placed in the circumstance of above 15 °C for 2 hours

- In case of keeping module is in the circumstance of below

-20 °C, it should be placed in the circumstance of above 15 °C for 3 hours,.

O After RGB Full White in HEAT-RUN Mode, the receiver

must be operated prior to the adjustment.

O Enter into HEAT-RUN MODE

1) Press the POWER ON KEY on R/C for adjustment.

2) OSD display and screen display PATTERN MODE.

- Set is activated HEAT run without signal generator in this mode.

- Single color pattern ( WHITE ) of HEAT RUN MODE uses to check panel.

- Caution : If you turn on a still screen more than 20 minutes (Especially digital pattern, cross hatch pattern), an after image may be occur in the black level part of the screen.

(8) Push The “IN STOP KEY” - For memory initialiLAtion.

Case1 : Software version up

1) After downloading S/W by USB , TV set will reboot automatically

2) Push “In-stop” key

3) Push “Power on” key

4) Function inspection

5) After function inspection, Push “In-stop” key.

Case2 : Function check at the assembly line

1) When TV set is entering on the assembly line, Push “In-stop” key at first.

2) Push “Power on” key for turning it on.

-> If you push “Power on” key, TV set will recover channel information by itself.

3) After function inspection, Push “In-stop” key.

3.

Main PCB check process

* APC - After Manual-Insert, executing APC

3-1. Boot file Download

(1) Execute ISP program “Mstar ISP Utility” and then click

“Config” tab.

(2) Set as below, and then click “Auto Detect” and check “OK”

message If “Error” is displayed, Check connection between computer, jig, and set.

(3) Click “Read” tab, and then load download file (XXXX.bin)

by clicking “Read”

(4) Click “Connect” tab. If “Can’t” is displayed, Check

connection between computer, jig, and set.

(5) Click “Auto” tab and set as below.

(6) Click “Run”.

(7) After downloadng, check “OK” message.

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Only for training and service purposes

4. USB DOWNLOAD (*.epk file download)

(1) Put the USB Stick to the USB socket (2) Automatically detecting update file in USB Stick

- If your downloaded program version in USB Stick is Low,

it didn’t work. But your downloaded version is High, USB data is

automatically detecting

(3) Show the message “Copying files from memory”

(4) Updating is staring.

(5) Updating Completed, The TV will restart automatically. (6) If your TV is turned on, check your updated version and

Tool option. (explain the Tool option, next stage)

* If downloading version is more high than your TV have,

TV can lost all channel data. In this case, you have to channel recover. if all channel data is cleared, you didn’t have a DTV/ATV test on production line.

* After downloading, have to adjust TOOL OPTION again.

(1) Push "IN-START" key in service remote controller. (2) Select "Tool Option 1" and Push “OK” button. (3) Punch in the number. (Each of models has their number.) (4) Completed selecting Tool option.

5. ADC Process

5-1. ADC

- Enter Service Mode by pushing “ADJ”key,

- Enter Internal ADC mode by pushing “

G” key at “5. ADC

Calibration”

* Caution: Using ‘power on’ button of the Adjustment R/C , power

on TV.

Model Module Tool Tool Tool Tool Tool

option1 option2 option3 option4 option5

50PZ550-ZA 50R3 36928 37966 54144 26956 32

60PZ550-ZA 60R3 49216 37966 54144 26956 32

60PZ250-ZA 60R3 49280 37966 54144 26892 32

50PZ250-ZA 50R3 36992 37966 54144 26892 32

50PW450-ZA 50T3 37056 37966 54144 26892 32

42PW450-ZA 42T3 24768 37966 54144 26892 32

50PV350-ZA 50R3 37216 21582 54144 26892 32

50PT350-ZA 50T3 37312 21582 54144 26892 32

42PT350-ZA 42T3 25024 21582 54144 26892 32

60PV250-ZA 60R3 49536 21582 54144 26892 32

42PT250-ZA 42T3 25088 21582 54144 26892 32

60PV250-TA 60R3 49536 22934 54144 26892 32

50PV250-TA 50R3 37248 22934 54144 26892 32

50PW350-TA 50T3 37088 39318 54144 26956 32

42PW350-TA 42T3 24800 39318 54144 26956 32

60PZ550-TA 50R3 49216 39318 54144 26956 32

50PZ550-TA 50R3 36928 39318 54144 26956 32

50PT250-TA 50T3 37376 22934 54144 26892 32

42PT250-TA 42T3 25088 22934 54144 26892 32

50PZ550T-ZA 50R3 36928 37966 54144 29001 544

50PZ550T-ZA 50R3 36928 37966 54144 29004 544

60PZ250T-TA 60R3 49280 37966 54144 28940 544

50PZ250T-ZA 50R3 36992 37966 54144 28940 544

50PW450T-ZA 50T3 37056 37966 54144 28940 544

42PW450T-ZA 42T3 24768 37966 54144 28940 544

50PV350T-ZA 50R3 37216 21582 54144 28940 544

60PV250T-ZA 60R3 49536 21582 54144 28940 544

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Only for training and service purposes

* ADC Calibration Protocol (RS232)

Adjust Sequence

- aa 00 00 [Enter Adjust Mode]

- xb 00 40 [Component1 Input (480i)]

- ad 00 10 [Adjust 480i Comp1]

- xb 00 60 [RGB Input (1024*768)]

- ad 00 10 [Adjust 1024*768 RGB]

- aa 00 90 End Adjust mode * Required equipment : Adjustment R/C.

6. Function Check

6-1. Check display and sound

- Check Input and Signal items. (cf. work instructions) (1) TV (2) AV (SCART1/SCART2/ CVBS) (3) COMPONENT (480i) (4) RGB (PC : 1024 x 768 @ 60hz) (5) HDMI (6) PC Audio In

* Display and Sound check is executed by Remote

controller.

* Caution : Not to push the INSTOP KEY after completion if the

function inspection.

7. Total Assembly line process

7-1. POWER PCB Assy voltage adjustment

(Vs voltage adjustment)

O Required Equipment for adjustment

- D.M.M

O Condition for adjustment

- No signal with the snow noise in RF mode)

7-2. Adjustment Preparation

- Required Equipment

O Remote controller for adjustment O Color Analyzer ( CS-1000, CA-100,100+,CA-210 or same

product : CH 10 (PDP)

* Please adjust CA-210, CA-100+ by CS-1000 before

measuring

O Auto W/B adjustment instrument(only for Auto adjustment) O 9 Pin D-Sub Jack(RS232C) is connected to the AUTO W/B

EQUIPMENT.

Before Adjust of White Balance, Please press POWER ONLY key

Adjust Process will start by execute RS232C Command.

O Color temperature standards according to CSM and Module

O CS-1000/CA-100+/CA-210(CH 10)

White balance adjustment coordinates and color temperature.

* Connecting picture of the measuring instrument (On

Automatic control)

- Inside PATTERN is used when W/B is controlled. Connect to auto controller or push Adjustment R/C POWER-ON

->Enter the mode of White-Balance, the pattern will come out.

* Auto-control interface and directions (1) Adjust in the place where the influx of light like floodlight

around is blocked. (Illumination is less than 10ux).

(2) Measure and adjust after sticking the Color Analyzer (CA-

100+, CA210 ) to the side of the module.

(3) Aging time

After aging start, keep the Power on (no suspension of power supply) and heat-run over 5 minutes

O Auto adjustment Map(RS-232C)

RS-232C COMMAND [ CMD ID DATA ]

Wb 00 00 White Balance Start Wb 00 ff White Balance End

CSM PLASMA

Cool 11000K

Medium 9300K

Warm 6500K

CSM

Color Coordinate

Temp ±Color Coordinate

xy

Cool 0.276 0.283 11000K 0.002

Medium 0.285 0.293 9300K 0.002

Warm 0.313 0.329 6500K 0.002

RS-232C COMMAND

CENTER

[CMD ID DATA] MIN (DEFAULT) MAX

Cool Mid Warm Cool Mid Warm

R Gain jg Ja jd 00 192 192 192 192

G Gain jh Jb je 00 192 192 192 192

B Gain ji Jc jf 00 192 192 192 192

R Cut 64 64 64 128

G Cut 64 64 64 128

B Cut 64 64 64 128

NO Item CMD 1 CMD 2 Data 0

Enter Adjust A A 0 0 When transfer the Adjust ‘Mode In’‘Mode In’

Mode Carry the

command.

ADC ADC A D 1 0 Automatically

adjust Adjust adjustment

(The use of

a internal pattern)

- 9 -

Only for training and service purposes

* Caution

- Color Temperature : COOL, Medium, Warm.

- One of R Gain/G Gain/ B Gain should be kept on 0xC0, and adjust other two lower than C0.

(when R/G/B Gain are all C0, it is the FULL Dynamic Range

of Module)

* Manual W/B process using adjusts Remote control. (1) After enter Service Mode by pushing “ADJ” key, (2) Enter White Balance by pushing “

G” key at “. White

Balance”

(3) Stick the sensor to the center of the screen and select

each items(Red/Green/Blue Gain) using

D/E (CH +/-) key

on R/C.

(4) Adjust R/G/B Gain using

F/G (VOL +/-) key on R/C.

(5) Adjust three modes all(Cool/Medium/Warm) : Fix the one

of R/G/B Gain and Change the others. (6) When the adjustment is completed, Enter “COPY ALL”. (7) Exit adjustment mode using EXIT key on R/C.

* After You finish all adjustments, Press °∞In-start°± button

and compare Tool option and Area option value with its

BOM, if it is correctly same then unplug the AC cable. If it is not same, then correct it same with BOM and unplug AC cable. For correct it to the model’s module from factory JIG model.

* Push The “N STOP KEY” after completing the function

inspection. And Mechanical Power Switch must be set “ON”.

* To check the coordinates of White Balance, you have to

measure at the below conditions. Picture mode : Vivid, Energy Saving : Off, Below the Advanced control, Dynamic Contrast : Off, Dynamic Colour : Off Colour Temp.

-> Picture Mode change : Vivid ? Vivid(User)

7-3. DPM operation confirmation

(Only Apply for MNT Model)

* Check if Power LED Color and Power Consumption operate

as standard.

(1) Set Input to RGB and connect D-sub cable to set (2) Measurement Condition: (100~240V@ 50/60Hz) (3) Confirm DPM operation at the state of screen without

Signal

7-4. DDC EDID Write (RGB 128Byte )

-> Not used any more, Use Auto D/L

(1) Connect D-sub Signal Cable to D-Sub Jack. (2) Write EDID DATA to EEPROM (24C02) by using DDC2B

protocol.

(3) Check whether written EDID data is correct or not.

* For SVC main Ass’y, EDID have to be downloaded to

Insert Process in advance.

7-5 DDC EDID Write (HDMI 256Byte)

-> Not used any more, Use Auto D/L

(1) Connect HDMI Signal Cable to HDMI Jack. (2) Write EDID DATA to EEPROM(24C02) by using DDC2B

protocol.

(3) Check whether written EDID data is correct or not.

* For SVC main Ass’y, EDID have to be downloaded to

Insert Process in advance.

7-6. EDID DATA

(1) All Data : HEXA Value (2) Changeable Data :

*: Serial No : Controlled / Data:01 **: Month : Controlled / Data:00 ***:Year : Controlled ****:Check sum

7-7. EDID DATA Auto Download

(1) Press Adj. key on the Adj. R/C, (2) Select EDID D/L menu. (3) By pressing Enter key, EDID download will begin (4) If Download is successful, OK is display, but If Download is

failure, NG is displayed.

(5) If Download is failure, Re-try downloads.

*Caution: Never connect HDMI & D-sub Cable when EDID

downloaded.

O Edid data and Model option download (RS232)

NO Item CMD 1 CMD 2 Data 0

Enter download A A 0 0 When transfer the download ‘Mode In’‘Mode In’

Mode Carry the

command.

EDID data download A E 00 10 Automatically

Model download

option (The use of

download a internal pattern)

- 10 -

Only for training and service purposes

7-8. Manual Download

* Caution

* Use the proper signal cable for EDID Download

- Analog EDID : Pin3 exists

- Digital EDID : Pin3 exists

* Caution:

- Never connect HDMI & D-sub Cable at the same time.

- Use the proper cables below for EDID Writing.

- Download HDMI1, HDMI2 separately because HDMI1 is different from HDMI2.

7-9. EDID DATA

(1) 3D - HD RGB EDID data

(2) 3D - HD HDMI1 EDID data

(3) 3D - HD HDMI2 EDID data

(4) 3D - HD HDMI3 EDID data

ⓐ Vender ID

O Checksum: Changeable by total EDID data.

No. Item Condition Hex Data

1 Manufacturer ID GSM 1E6D

2 Version Digital : 1 01

3 Revision Digital : 3 03

- 11 -

Only for training and service purposes

8. Checking the EYE-Q Operation.

(1) Press the EYE Key on the adjustment remote controller. (2) Check the Sensor DATA ( It must be under 10) and keep

the data longer than 1.5s

(3) Check ‘OK’

(Sensor DATA 0 ~ 4095, Power Saving Mode 0 ~ 12)

* IF you press IN-STAP Button, change Green Eye-check OSD.

9. Ping TEST (DVB T2 model only, PP11B/L)

* This test is to check Network operation. (1) Connect LAN cable from Computer to TV Set (2) When network operates normally, you can see “OK” on

Computer

10. 3D Function Test

(Pattern Generator MSPG-3233, HDMI mode NO. 371 ,

pattern No. 81)

(1) Please input 3D test pattern like below

(2) Enter 3D mode , then select side by side

(If you don’t wear a 3D Glasses, you will see the picture like below)

(3) Put on the 3D Glasses, And block the right side of Glasses

(LEFT:OPEN[TEST], RIGHT:CLOSED) And check the middle sides of picture , RED -> normal , others -> abnormal

(4) Put on the 3D Glasses, And block the right side of Glasses

(LEFT:CLOSED, RIGHT:OPEN[TEST]) And check the middle sides of picture , BLUE -> normal , others -> abnormal

11. Model name & Serial number download

11-1. Model name & Serial number D/L

(1) Press “Power on” key of service remocon.(Baud rate :

115200 bps) (2) Connect RS232 Signal Cable to RS-232 Jack. (3) Write Serial number by use RS-232. (4) Must check the serial number at signal test of customer

support. (Refer to below).

- 12 -

Only for training and service purposes

11-2. Signal TABLE

CMD : A0h LENGTH : 85~94h (1~16 bytes) ADH : EEPROM Sub Address high (00~1F) ADL : EEPROM Sub Address low (00~FF) Data : Write data CS : CMD + LENGTH + ADH + ADL + Data_1 + ... +

Data_n

Delay : 20ms

11-3. Command Set

[Description]

FOS Default write : <7mode data> write Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0, Phase Data write : Model Name and Serial Number write in EEPROM,.

11-4. Method & notice

(1) Serial number D/L is using of scan equipment. (2) Setting of scan equipment operated by Manufacturing

Technology Group.

(3) Serial number D/L must be conformed when it is produced

in production line, because serial number D/L is mandatory by D-book 4.0

* Manual Download (Model Name and Serial Number)

- If the TV set is downloaded By OTA or Service man, Sometimes model name or serial number is initialized.( Not always)

- There is impossible to download by bar code scan, so It need Manual download.

1) Press the ‘instart’ key of ADJ remote controller.

2) Go to the menu ‘5.Model Number D/L’ like below photo.

3) Input the Factory model name(ex 42LD450-TA) or Serial

number like photo.

4) Check the model name Instart menu ? Factory name

displayed (ex 42LD450-TA)

5) Check the Diagnostics (DTV country only) ? Buyer model displayed (ex 42LD450)

12. CI+ Key Download

12-1. Download Procedure

(1) Press "Power on" button of a service R/C.(Baud rate :

115200 bps) (2) Connect RS232-C Signal Cable. (3) Write CI+ Key through RS-232-C. (4) Check whether the key was downloaded or not at ‘In Start’

menu. (Refer to below)

-> Check the Download to CI+ Key value in LGset.

12-2. Check the method of CI+ Key value

(1) check the method on Instart menu

- 13 -

Only for training and service purposes

(2) check the method of RS232C Command

1) into the main ass’y mode (RS232 : aa 00 00)

2) check the key download for transmitted command (RS232 : ci 00 10)

3) result value

- normally status for download : OKx

- abnormally status for download : NGx

12-3. Check the method of CI+ Key value

(RS232)

(1) into the main ass’y mode (RS232 : aa 00 00)

(2) Check the mothed of CI+ key by command

(RS232 : ci 00 20)

((3) result value

13. SW Download Guide.

※ Put a *.bin to USB Stick and Turn on TV

(1) Put the USB Stick to the USB socket (2) Automatically detecting update file in USB Stick

* If your downloaded program version in USB Stick is Low,

it didn’t work.

But your downloaded version is High, USB data is automatically detecting.

(3) Show the message “Copying files from memory”

(4) Updating is staring.

(5)0 Updating Completed, The TV will restart automatically.

After turn on TV, Please press ‘IN-STOP’button on ADJ Remote-control.

※ IF you don’t have ADJ R/C, enter ‘Factory Reset’in

OPTION MENU.

(6) When TV turn on, check the Updated version on

Diagnostics MENU.

CMD 1 CMD 2 Data 0

C 1 2 0

CMD 1 CMD 2 Data 0

A A 0 0

CMD 1 CMD 2 Data 0

C 1 1 0

CMD 1 CMD 2 Data 0

A A 0 0

- 14 -

Only for training and service purposes

BLOCK DIAGRAM

- 15 -

LGE Internal Use Only

EXPLODED VIEW

900

910

203

590

204

601

207

520

400

200

240

580

301

305

120

300

206

202

205

302

303

304

501

602

201

570

560

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

IMPORTANT SAFETY NOTICE

A10

A9

LV1

A12

A21

A2

A13

A4

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

CI_ADDR[7]

CI_ADDR[0]

CI_ADDR[9]

CI_ADDR[14]

CI_ADDR[1]

CI_ADDR[10]

CI_ADDR[4]

CI_ADDR[6]

BUF_FE_TS_DATA[0-7]

CI_ADDR[12]

CI_ADDR[3]

CI_ADDR[8]

CI_ADDR[5]

CI_ADDR[13]

CI_ADDR[2]

CI_ADDR[11]

PCM_D[0-7]

PCM_D[3] PCM_D[4] PCM_D[5] PCM_D[6] PCM_D[7]

PCM_D[0]

PCM_D[1]

PCM_D[2]

BUF_FE_TS_DATA[0] BUF_FE_TS_DATA[1] BUF_FE_TS_DATA[2] BUF_FE_TS_DATA[3]

BUF_FE_TS_DATA[4] BUF_FE_TS_DATA[5] BUF_FE_TS_DATA[6] BUF_FE_TS_DATA[7]

FE_TS_DATA[0-7]

BUF_FE_TS_DATA[2]

BUF_FE_TS_DATA[5] FE_TS_DATA[5]

FE_TS_DATA[2]

BUF_FE_TS_DATA[4]

BUF_FE_TS_DATA[7]

BUF_FE_TS_DATA[1]

FE_TS_DATA[7]

FE_TS_DATA[4]

FE_TS_DATA[1]

BUF_FE_TS_DATA[3]

BUF_FE_TS_DATA[6]

BUF_FE_TS_DATA[0]

FE_TS_DATA[6]

FE_TS_DATA[3]

Q105 2SC3052 EU

E

B

C

R126 470K

EU

P_17V

R123 470K

EU

C107 100uF

16V EU

+5V

P_17V

SC1_ID

C113 10uF 16V

EU

R115

1K EU

C108

4700pF

50V

R128 10K

EU

SC_RE1

C118

0.1uF 16V

READY

SCART1_Lout

R153 180 EU

SC1_FB

R146

2K EU

AV/SC1_R_IN

R120

75 EU

R162

5.6K EU

C114 10uF 16V

EU

R132

0 EU

Q107 2SC3052 EU

E

B

C

R148

2K EU

R150

220 EU

C106

1000pF

50V

D109

30V

READY

AV/SC1_L_IN

SC1_B-/COMP1_Pb-

2SC3052

Q102

EU

Q106 2SC3052 EU

E

B

C

R131

10K EU

SCART1_Rout

SC1_G+/COMP1_Y+>

C105

1000pF

50V

R129

0

EU

R147

2K EU

Q103 ISA1530AC1 EU

E

B

C

AV/SC1_CVBS_IN

AV/SC1_DET

R145 330

EU

R149

2K EU

Q100

2SC3052

EU

E

B

C

SC_RE2

R133 12K EU

SC1_R+/COMP1_Pr+>

SC1_SOG_IN

SC1_R-/COMP1_Pr-

SC1_G-/COMP1_Y-

R151

390

READY

R161

5.6K EU

R127 470K

EU

R114

10K EU

SCART1_MUTE

Q104 2SC3052 EU

E

B

C

SC1_B+/COMP1_Pb+>

2SC3052

Q101

EU

D105 30V

READY

ATV_OUT

R134 12K EU

C109

4700pF

50V

R154 470

EU

+3.3V

R106

0

R104

0

D110

30V

READY

R107

0

SC1_G+/COMP1_Y+>

SC1_R+/COMP1_Pr+>

D107

30V

READY

D108 30V

READY

SC1_B+/COMP1_Pb+

SC1_B-/COMP1_Pb-

SC1_G-/COMP1_Y-

SC1_R+/COMP1_Pr+

SC1_G+/COMP1_Y+

SC1_R-/COMP1_Pr-

D106 30V

READY

D104

30V

READY

R183

330 EU

2SC3052

Q111

EU

DTV/MNT_VOUT

C119

0.1uF 16V

READY

C124 10uF

16V

EU

C125 10uF

16V

EU

R1100

470K

C137

1000pF

50V

R182

2K EU

R176 470

EU

R1112

10K

R184

2K EU

R170

10K EU

R177

180

EU

R1107

1K

R189

12K

R194 10K

SC2/COMP1_DET

C129

4700pF

50V

R187

0

EU

R185

2K EU

SC2/COMP1_R_IN

Q109 ISA1530AC1 EU

E

B

C

R192

0 EU

R172

33K EU

SC2_ID

R193 10K

R190

12K

2SC3052

Q110

EU

+3.3V

R171 33K

EU

R191 0 EU

R175

10K EU

R196

470K

EU

R1102

75 EU

R199 470K

C133

100uF

16V

EU

C130

4700pF

50V

C138

1000pF

50V

Q108 2SC3052 EU

E

B

C

R186

2K EU

R178

390

READY

SC2_CVBS_IN

SC2/COMP1_L_IN

R188

100 EU

Q112 2SC3052 EU

E

B

C

SCART2_Lout

SCART2_Rout

R169

5.6K EU

R168

5.6K EU

PCM_A[8]

/PCM_WAIT

R1105 10K READY

REG

CI_ADDR[12]

CI_IORD

CI_TS_CLK

R117

0

READY

L101

EU

120-ohm CI Part

CI_IOWR

+5V_CI_ON

CI_ADDR[4]

CI_OE

BUF_FE_TS_DATA[0-7]

PCM_D[0-7]

CI_TS_SYNC

/PCM_CD

CI_ADDR[0-14]

R1104

0

EU

+3.3V

PCM_A[11]

+3.3V_CI

CI_TS_DATA[5]

R118 10K

EU

PCM_A[4]/PCM_OE

REG

CI_IORD

AR100

33

EU

CI_TS_DATA[3]

PCM_A[2]

PCM_RST

CI_ADDR[6]

/CI_CD1

CI_ADDR[14]

IC102

KIC7SZ32FU

EU

3GND

2IN_A

4 OUT_Y

1IN_B 5 VCC

C104

0.1uF 16V

EU

CI_WE

PCM_A[7]

CI_ADDR[9]

/PCM_IRQA

R141

100

EU

Q113 2SC3052

EU

E

B

C

PCM_A[9]

/PCM_IORD

CI_TS_DATA[7]

+3.3V_CI

PCM_A[10]

R116

10K

EU

CI_ADDR[11]

R135 0

READY

PCM_A[0]

PCM_5V_CTL

CI_WE

/PCM_CE

CI_ADDR[2]

R1108 10K

EU

CI_ADDR[1]

R1120

10K

EU

/PCM_REG

+5V

+5V_CI_ON

CI_TS_DATA[0]

CI_ADDR[7]

CI_DET

CI_ADDR[8]

PCM_A[1]

/CI_CD1

PCM_A[14]

/CI_CD2

CI_ADDR[5]

CI_IOWR

CI_DET

CI_OE

CI_TS_DATA[1]

R113

100

EU

BUF_FE_TS_CLK

AR109 33

EU

JK104

10067972-000LF

EU

EAG41860102

G1G2

57

21

52

16

10

47

41

5

36

59

23

45

54

18

49

43

13

7

38

2

25

56

20

51

15

9

46

40

4

35

58

22

53

17

11

48

42

12

6

37

1

24

55

19

50

44

14

8

39

3

2660 2761 2862 2963 3064 31 32 33 34

65 66 67 68

69

/PCM_IOWR

CI_TS_VAL

PCM_A[3]

Q114

RSR025P03

EU

S

D

G

PCM_A[13]

/PCM_WE

R1122

10K

READY

AR104 33

EU

AR107

33

EU

R142 10K

EU

BUF_FE_TS_SYN

/CI_CD2

CI_TS_DATA[4]

R112 100

EU

L100

EU

120-ohm CI Part

PCM_A[6]

PCM_A[5]

BUF_FE_TS_VAL_ERR

C139

0.1uF 16V

EU

R119 0

READY

PCM_A[12]

CI_TS_DATA[2]

AR108 33

EU

+3.3V_CI

CI_ADDR[13]

C128

0.1uF 16V

EU

CI_ADDR[0]

C126

0.1uF 16V

EU

+3.3V_CI

C120

0.1uF 16V

EU

AR103

33

EU

CI_TS_DATA[6]

CI_ADDR[3]

R1106

10K

EU

CI_ADDR[10]

IC101

TC74LCX244FT

EU

3

2Y4

2

1A1

4

1A2

1

1OE

6

1A3

5

2Y3

7

2Y2

8

1A4

9

2Y1

10

GND112A1

12

1Y4

13

2A2

14

1Y3

15

2A3

16

1Y2

17

2A4

18

1Y1

19

2OE

20

VCC

AR106 33

EU

AR105 33

EU

R137 33

EU

R1118

0

EU

+5V

R198

10K

EU

R1103

10K

EU

JK100

PSC008-02

EU

1

AUDIO_R_OUT

2

AUDIO_R_IN

3

AUDIO_L_OUT

4

AUDIO_GND

5

B_GND

6

AUDIO_L_IN

7

B_OUT

8

ID

9

G_GND

10

D2B_IN

11

G_OUT

12

D2B_OUT

13

R_GND

14

RGB_GND

15

R_OUT

16

RGB_IO

17

SYNC_GND1

18

SYNC_GND2

19

SYNC_OUT

20

SYNC_IN

21

COM_GND

23

SHIELD

22

AV_DET

JK101

PSC008-02

EU

1

AUDIO_R_OUT

2

AUDIO_R_IN

3

AUDIO_L_OUT

4

AUDIO_GND

5

B_GND

6

AUDIO_L_IN

7

B_OUT

8

ID

9

G_GND

10

D2B_IN

11

G_OUT

12

D2B_OUT

13

R_GND

14

RGB_GND

15

R_OUT

16

RGB_IO

17

SYNC_GND1

18

SYNC_GND2

19

SYNC_OUT

20

SYNC_IN

21

COM_GND

23

SHIELD

22

AV_DET

R1117

0

NON_EU

R1116

0 EU

SC1_B+/COMP1_Pb+>

SC1_G+/COMP1_Y+>

SC1_R+/COMP1_Pr+>

R1111 0

NON_EU

R1109 0

NON_EU

R1110 0

NON_EU

C102 27pF

50V

READY

C101 27pF 50V

READY

C100 27pF 50V

READY

C110 27pF

50V

EU

C134 27pF

50V EU

C111

1000pF

50V

READY

C131

1000pF

50V

READY

C112 220pF

50V

READY

C132

220pF

50V

READY

C122 27pF

50V EU

C115 27pF

50V EU

C123 27pF

50V EU

C116 27pF

50V EU

C117 100uF

16V EU

C121

100uF

16V

EU

R130

33 EU

R1119

33

EU

R1121

33

EU

R138 33

EU

R110

33

EU

R111

33

EU

R124

75 EU

R100

75

R101 75

R122

75 EU

R102 75

R195 75 EU

R1101

10K

EU

R197

2.7K EU

R167 12K

EU

R157 10K

EU

R174

10K EU

R121 10K

EU

R125

2.7K EU

R165

1K EU

R164

1K EU

R1115

2K

EU

R1114

10K

EU

R166 12K

EU

D111 30V

READY

D101

30V

READY

D103 30V

READY

0

R136 EU

R144

0

EU

R108 0

R103 0

R105 0

D119

30V

READY

D117

30V

READY

D123 30V

READY

D116

30V

READY

D115

30V

READY

D120

30V

READY

D118 30V

READY

D114

30V

READY

D113

30V

READY

D121 30V

READY

D100

30V

READY

D102

30V

READY

D122 30V

READY

D124 30V

READY

GND

SC1_B+/COMP1_Pb+>

D112

ENKMC2838-T112

EU

C135

1000pF

50V

READY

C136

1000pF

50V

READY

C140

1000pF

50V

READY

C141

1000pF

50V

READY

C103 22uF 10V

EU

R156 15K

EU

JK105

PPJ-230-01

NON_EU

9

[GN]G

10

[GN]GND

8

[GN]C_DET

7

[BL]B

6

[RD]R

5

[WH]L_IN

4

[RD]R_IN

11

FIX-TER

13

[RD]MONO

FE_TS_SYN

FE_TS_VAL_ERR

AR110

33

EU

BUF_FE_TS_DATA[0-7]

FE_TS_DATA[0-7]

AR102

33

EU

AR101

33

EU

FE_TS_CLK

BUF_FE_TS_VAL_ERR BUF_FE_TS_CLK

BUF_FE_TS_SYN

R163

7.5K EU

R1468

3K EU

R143 100 1/4W EU

IC100

AS324MTR-E1

3

IN1+

2

IN1-

4

VCC

1

OUT1

6

IN2-

5

IN2+

7

OUT2

8

OUT3

9

IN3-

10

IN3+

11

GND

12

IN4+

13

IN4-

14

OUT4

R173 18K

EU

R179 240

EU

R159 15K EU

R155

6.8K EU

R158 15K

EU

R160

6.8K EU

SCART/COMP1 CI Slot

GP2R_S7R

1

DTV_L_OUT

DTV_R_OUT

SC1_VOUT

REC_8

MNT_R_OUT

SC2_VOUT

CI POWER ENABLE CONTROL

CI DETECT

CI SLOT

Full SCART

Half SCART / COMP1 Option

Close to Jack

3.3V_CI

MNT_L_OUT

2010-08-31

LGE Internal Use Only

Fiber Opti c

USB D OWN S TREAM

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R211 10

IC205

AT24C02BN-SH-T

3

2

415

6

7

8

RGB_DDC_SCL

DSUB_B+>

DSUB_DET

PC_SER_DATA

C209 10pF 50V

R244

0

PC_SER_CLK

DSUB_G+>

+5V_ST

DSUB_G-

RGB_DDC_SCL

R224

1K

R217

10K

DSUB_VSYNC

C204 220pF 50V READY

C210

0.1uF 16V READY

DSUB_R+>

EDID_WP

RGB_DDC_SDA

JK205

SPG09-DB-010

1

RED

2

GREEN

3

BLUE

4

GND_1

5

DDC_GND

6

RED_GND

7

GREEN_GND

8

BLUE_GND

9

NC

10

SYNC_GND

11

GND_2

12

DDC_DATA

13

H_SYNC

14

V_SYNC

15

DDC_CLOCK

16

SHILED

DSUB_HSYNC

DSUB_B-

GND

DSUB_R+>

DSUB_G+

C208 220pF 50V READY

DSUB_B+>

DSUB_R+

RGB_DDC_SDA

R246

0

R241

0

DSUB_R-

R243

0

R210

10

+3.3V

C207 220pF 50V READY

R242

0

DSUB_B+

C211 10pF 50V

+5V

IC204 NL17SZ00DFT2G

READY

3

GND

2

B

4

Y

1A5

VCC

SPDIF_OUT

PC_L_IN

JK204

JST1223-001

1

GND

2

VCC

3

VINPUT

4

FIX_POLE

PC_R_IN

JK208

PEJ027-01

6B

T_TERMINAL2

7B

B_TERMINAL2

5

T_SPRING

4

R_SPRING

7A

B_TERMINAL1

6A

T_TERMINAL1

3

E_SPRING

+5V

PC_SER_CLK

S7_RXD

+3.3V_ST

PM_TXD

S7_TXD

PC_SER_DATA

JK203

SPG09-DB-009

1

2

3

4

5

6

7

8

9

10

PM_RXD

+3.3V_ST

IC203

MAX3232CDR

3

C1-

2

V+

4

C2+

1

C1+

6

V-

5

C2-

7

DOUT2

8

RIN2

9

ROUT2

10

DIN2

11

DIN1

12

ROUT1

13

RIN1

14

DOUT1

15

GND

16

VCC

CEC_REMOTE

R225

1K

D1+_HDMI2

D0-_HDMI4

HPD4

5V_DET_HDMI_3

JK200

EAG59023302

HDMI1

14

13

5

D1_GND

20

SHIELD

12

11

2

D2_GND

19

18

10

CK+

4

D1+

1

D2+

17

9

D0-

8

D0_GND

3

D2-

16

7

D0+

6

D1-

15

CEC_REMOTE

D2+_HDMI4

R226

1.8K

R212

10K

CK+_HDMI3

DDC_SDA_2

D0+_HDMI2

D2-_HDMI2

5V_DET_HDMI_2

HPD3

R248 1K

CK-_HDMI4

5V_DET_HDMI_4

D1+_HDMI4

CEC_REMOTE

Q201

2SC3052

E

B

C

R249 1.8K

D1+_HDMI3

D0-_HDMI3

DDC_SCL_4

D2-_HDMI3

R236 10K

D1-_HDMI2

D2+_HDMI2

R200 1K

HPD2 Q202

2SC3052

E

B

C

DDC_SDA_3

D2-_HDMI4

CK+_HDMI4

DDC_SCL_2

5V_HDMI_3

R201 1.8K

D1-_HDMI4

D0-_HDMI2

D2+_HDMI3

DDC_SDA_4

D1-_HDMI3

5V_HDMI_2

CK+_HDMI2

D0+_HDMI3

CK-_HDMI3

R258

10K

CK-_HDMI2

5V_HDMI_4

DDC_SCL_3

D0+_HDMI4

Q200

2SC3052

E

B

C

DDC_SDA_4

DDC_SCL_2

EDID_WP

+5V

JP203

5V_HDMI_3

R227 22

DDC_SDA_2

IC201

AT24C02BN-SH-T

HDMI2

3

A2

2

A1

4

GND

1

A0

5

SDA

6

SCL

7

WP

8

VCC

DDC_SCL_3

R202 22

JP200

+5V +5V

R232

10K

EDID_WP

R255

10K

5V_HDMI_4

R228 22

IC200

AT24C02BN-SH-T

HDMI1

3

A2

2

A1

4

GND

1

A0

5

SDA

6

SCL

7

WP

8

VCC

IC202

AT24C02BN-SH-T

HDMI Side

3

A2

2

A1

4

GND

1

A0

5

SDA

6

SCL

7

WP

8

VCC

5V_HDMI_2

EDID_WP

D205

ENKMC2838-T112

A1CA2

DDC_SDA_3

DDC_SCL_4

JP206

R203 22

D208

ENKMC2838-T112

A1CA2

R250 22

R251 22

R207

10K

D213

ENKMC2838-T112

A1CA2

USB1_CTL

+3.3V

SIDE_USB_DP

IC206

AP2191SG-13

3

IN_2

2

IN_1

4

EN

1

GND

5

FLG

6

OUT_1

7

OUT_2

8

NC

SIDE_USB_DM

+3.3V

C223 100uF 16V

+5V

USB1_OCD

SIDEAV_R_IN

+3.3V

SIDEAV_CVBS_IN

SIDEAV_L_IN

SIDEAV_DET

JK207

PPJ235-01

4A

[YL]O-SPRING

5A

[YL]E-LUG

3A

[YL]CONTACT

4B

[WH]O-SPRING

3C

[RD]CONTACT

4C

[RD]O-SPRING

5C

[RD]E-LUG

C225 1000pF 50V

R26210K

COMP2_R_IN

C224 1000pF 50V

+3.3V

COMP2_L_IN

R26110K

R259 470K

COMP2_DET

COMP2_Pb+>

R265 12K

COMP2_Pr+>

R260 470K

COMP2_Y+>

R266

12K

R264 10K

COMP2_Y+

COMP2_Pb-

COMP2_Pr+>

R286

0

R282

0

COMP2_Pr-

COMP2_Y-

COMP2_Y+>

COMP2_Pb+>

R284

0

R285

0

COMP2_Pr+

COMP2_Pb+

R283

0

R287

0

C228 10pF 50V

READY

C229 10pF

50V

READY

C230 10pF

50V

READY

C216 10pF 50V

READY

C217 10pF 50V

READY

C218 10pF 50V

READY

JK201

EAG59023301

HDMI2

14

13

5

D1_GND

20

SHIELD

12

11

2

D2_GND

19

18

10

CK+

4

D1+

1

D2+

17

9

D0-

8

D0_GND

3

D2-

16

7

D0+

6

D1-

15

30V

READY

D216

D232

30V

READY

D223

30V

READY

D210

30V

READY

D225

30V

READY

D215

30V

READY

D211

30V

READY

D231

30V

READY

D228

30V

READY

D209

30V

READY

D220

30V

READY

D202 30V READY

D204 30V

READY

D201

30V

READY

D229

30V

READY

D206 30V READY

D233 30V

READY

D226

30V

READY

D217 30V READY

D214 30V READY

D230

30V

READY

D227 30V READY

D224

30V

READY

D203 30V

READY

D200

READY

D212 READY

D207

READY

R257 10K

R234

10K

R209 10K

R208 10K

R233

10K

R256 10K

R291

10K

R290

10K

R247 10K

R237

10K

R23133

R205 33

R253 33

R206 33

R23033

R254 33

R1206

10K

READY

C245

0.1uF 16V

C244

0.1uF 16V

C243

0.1uF 16V

C242

0.1uF 16V

C241

0.1uF 16V

C235

0.1uF 16V

R245

0

DSUB_G+>

R218 33

R278

33

R219 33

R263

33

C214 10pF 50V

C215 10pF 50V

C236 10pF

50V

C240 27pF 50V

C237

0.1uF 16V

C219

0.1uF

16V C205 1000pF 50V

C206 1000pF 50V

C239 1000pF

50V

C238 1000pF 50V

C233 220pF

50V

READY

C232

220pF

50V

READY

C203 220pF 50V READY

C222

0.1uF 16V

C234

0.1uF 16V

READY

R280

75

R279

75

R281

75

R240

75

R238 75

R239

75

R1200

75

R296

100

R293 100

READY

R289

100

R288100

R292

1K

READY

R1203 1K

R204

3.3K

R252

3.3K

R229

3.3K

R215 10K

R216 10K

R1202 10K

R1201 10K

R294 10K

R267

10K R277

10K

READY

R223

12K

R222 12K

R1204 12K

R1205 12K

R235 10K

R214 470K

R213 470K

R299 470K

R298 470K

D219

READY

R221

0

READY

BSS83

Q203

S

B D

G

CEC_REMOTE_S7

+3.3V_ST

CEC_REMOTE

R268 0

READY

D218

MMBD301LT1G

30V

R269

27K

READY

R271 1K

JK210

PPJ234-02

5A

[GN]O-SPRING

6A

[GN]E-LUG

4A

[GN]CONTACT

7B

[BL]E-LUG-S

5B

[BL]O-SPRING

7C

[RD]E-LUG-S

5C

[RD]O-SPRING_1

4C

[RD]CONTACT_1

5D

[WH]O-SPRING

4E

[RD]CONTACT_2

5E

[RD]O-SPRING_2

6E

[RD]E-LUG

AV/COMP2_DET

R270 10K

D221

30V

READY

R272 1K

R1434 100

R1435 100

232C_NO4

232C_NO6

232C_NO4

UART_TXD_3D

R1436 100

R1437 100

UART_RXD_3D

R273 0

NON_RGB

R274 0

NON_RGB

R220 56K

JK202

EAG62611201

HDMI Side

14

13

5

D1_GND

20

BODY_SHIELD

12

11

2

D2_GND

19

18

10

CK+

4

D1+

1

D2+

17

9

D0-

8

D0_GND

3

D2-

16

7

D0+

6

D1-

15

JK209

3AU04S-305-ZC-(LG)

1234

5

R297 0

R295

0

RGB PC

RGB EDID

Close to Jack

SPDIF

NAND GATE

PC AUDIO

RS232C

HDMI_1

SIDE_HDMI

HDMI_2

For CEC

$0.055

GP2R_S7R

HDMI/RGB/RS232C/USB COMP2/Side CVBS/SPDIF

2

SWITCH ADDED

Capacitors on VBUSA should be placed as closd to connector as possible.

10mm

$0.11

SIDE USB

SIDE CVBS

COMPONENT2

Close to Jack

HDMI

2010-08-31

LGE Internal Use Only

THER MAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

TU300 TDTJ-S001D

14

3.3V

13

1.2V

5

AS

12

GND

11

VIDEO

2

BST_CNTL

10

NC

4

NC[RF_AGC]

1

ANT_PWR[OPT]

17

DIF_1

9

SIF

8

NC[IF_TP]

3

+B

16

IF_AGC_CNTL

7

SDA

6

SCL

15

RESET

18

DIF_2

19

SHIELD

R342 0

READY

R343 0

READY

C304

0.1uF

16V

+5V_TU

C301

0.1uF

16V

R338

4.7K

Q300

ISA1530AC1

R341 470

R344 82

TU_SIF

+5V_TU

Q301 ISA1530AC1

E

B

C

Q302

ISA1530AC1 EU

TU_CVBS

+5V_TU

ATV_OUT

C300

0.1uF 16V

C302

0.1uF 16V

+3.3V_TU

R334 100

C308

0.1uF 16V

TUNER_RESET

+3.3V_TU

IF_N_MSTAR

IF_P_MSTAR

R346 200 EU

R349 200

R345 200

R348 200 EU

R335 10K

C307 22uF 10V

AMP_RESET_N

AUD_LRCH

AUD_LRCK

AUD_MASTER_CLK

AC_DET

AUD_SCK

AMP_SCL

AMP_SDA

R365

2.2

R359 2K

R360 2K

+3.3V

C328 4700pF 50V

R371

2K

C333 680pF 50V

R366

0

C327

0.1uF 16V

C331

0.1uF 50V

C336

1uF 25V

C337 0.1uF 50V

C3381uF 25V

C339 0.1uF 50V

C335

0.1uF 50V

C334

0.1uF 50V

C340

0.1uF

50V

P_17V

P301

SMAW25 0-H04R

1

2

3

4

R381

20

C343

330pF

50V

C342

330pF

50V

R382

20

C352

1000pF

50V

C354

1000pF

50V

C353

1000pF

50V

C351

1000pF

50V

C332

0.1uF 50V

C329

0.1uF 50V

R372 10K

R370

10K

READY

R367 10K

READY

AMP_MUTE

R373 0

READY

Q303

2SC3052

READY

E

B

C

+3.3V_TU

C305 10pF 50V READY

TU_SDA

TU_SCL

C306 10pF 50V READY

R313 22

R314 22

IF_AGC_MAIN

R374 0

+1.26V_TU

C348

0.22uF 50V

C347

0.22uF 50V

C349

0.22uF 50V

C350

0.22uF 50V

C345

0.22uF 50V

C346

0.22uF 50V

R326

1.2K

R319

1.2K

L304

10.0uH

L303

10.0uH

L305

10.0uH

L302

10.0uH

R376

22

R378

22

R377

22

R375

22

R379

22

R380

22

R315 22

R316 22

TD1P

TC1P

TE1N

SDA_3.3V_MOD

TA2N

LVDS_CLK_2-

R836

0

R807

0

TE2N

R790

0

2D

DISP_EN

R794

0

2D

UART_TXD

TE2P

TD2N

R784

0

2D

TCLK2P

R817

0

2D

TD2N

TCLK4P

TC4P

TE4N

TB2N

LVDS_DATA_1_E-

R811

0

2D

LVDS_DATA_2_A-

TB4P

TB3P

UART_TXD

R783

0

2D

TC2N

TA1P

TE3N

TC2P

TC1P

LVDS_DATA_1_D+

TE1P

SCL_3.3V_MOD

TA1P

LVDS_CLK_2+

TD1N

PC_SER_DATA

TE2N

R795

0

2D

TE2P

R835

0

LVDS_DATA_2_B-

R798

0

2D

TE1N

TCLK1N

R818

0

2D

R792

0

2D

TCLK1N

TA2N

SCL_3.3V_MOD

LVDS_CLK_1-

2N7002(F)

Q700

G

D

S

P701

TF05-51S

HD

123456789

1011121314151617181920212223242526272829303132333435363738394041424344454647484950

51

52

TD1N

R788

0

2D

LVDS_DATA_2_D+

R828

0

2D

LVDS_DATA_2_A+

TE1P

LVDS_DATA_1_C+

TB1N

R800

0

2D

TD1P

R824

0

2D

TA1N

TC3P

TC2N

TD3N

TA1N

TC1N

TC1P

R815

0

2D

PC_SER_CLK

R833

0

2D

TE2N

TB1P

TB2N

R804

0

2D

TE3P

LVDS_DATA_1_E+

R812

0

2D

R786

0

2D

TE2P

LVDS_DATA_1_C-

SDA_3.3V_MOD

P_SCL

R831

0

2D

R830

0

2D

LVDS_DATA_2_C-

R810

0

2D

R822

0

2D

TB1P

LVDS_CLK_1+

R789

0

2D

TD2P

UART_RXD

TA2P

PC_SER_DATA

LVDS_DATA_2_D-

TCLK2N

R785

0

2D

+3.3V

TCLK1P

TC2P

TD2P

TB2P

TD2P

LVDS_DATA_2_E-

LVDS_DATA_1_D-

R809

4.7K

TC1N

TCLK2P

R787

0

2D

R829

0

2D

TC4N

R821

0

2D

TB3N

TCLK1N

LVDS_DATA_2_E+

R801

0

2D

TA4P

R826

0

2D

R849

0

R825

0

2D

R796

0

2D

TE4P

SDA_3.3V_MOD

TC2P

R814

0

2D

TC3N

R832

0

2D

R813

0

2D

LVDS_DATA_1_A-

TA3N

2N7002(F)

Q701

G

D

S

LVDS_DATA_1_B-

TCLK3P

TCLK3N

R791

0

2D

UART_RXD

R793

0

2D

TB2P

TCLK1P

LVDS_DATA_2_C+

P_SDA

TD1N

TA2N

LVDS_DATA_2_B+

R806

0

R820

0

2D

DISP_EN

R803

0

2D

TCLK2P

R802

0

2D

R842

0

TD2N

TD4P

TB2N

TA2P

R823

0

2D

TD4N

TCLK1P

PC_SER_CLK

TCLK4N

TD3P

TA1N

+3.3V

LVDS_DATA_1_A+

LVDS_DATA_1_B+

R827

0

2D

R819

0

2D

TCLK2N

R799

0

2D

TD1P

TE1P

TA1P

R797

0

2D

TA4N

R816

0

2D

TC1N

R782

0

2D

R808

4.7K

TE1N

TB1P

TB4N

TB2P

TB1N

SCL_3.3V_MOD

TC2N

TA3P

R805

0

2D

TA2P

TB1N

P602

12507WS-15L

1

2

3

4

5

6

7

8

9

10

11

12

13

14

16

15

R632

10K

R630 22

C648

10pF

+3.3V_ST

R634

10K

+3.3V_ST

C649 10pF READY

SUB_SDA

R635

4.7K

TOUCH_VER_CHK

R631 22

R629

4.7K

Q602 2SC3052

E

B

C

R633

4.7K

LED_RED

C646

0.1uF 16V

C645 10pF READY

SUB_SCL

KEY1

R628

10K

KEY2

IR

R639

10K

IC303

STA368BWG

@compC

26

GND_PLL

27

XTI

28

BICKI

29

LRCKI

30

SDI

31

RESET

32

INT_LINE

33

SDA

34

SCL

35

GND_DIG_2

36

VDD_DIG_2

17

OUT3B/FFX3B

3

TEST_MODE

6

OUT2B

16

CONFIG

15

VDD

14

GND_REG

13

OUT1A

12

GND1

11

VCC1

10

OUT1B

9

OUT2A

8

VCC2

7

GND2

4

VSS

5

VCC_REG

2

SA

21

VDD_DIG_1

1

GND_SUB

20

TWARN/OUT4A

19

EAPD/OUT4B

18

OUT3A/FFX3A

23

PWRDN

24

VDD_PLL

25

FILTER_PLL

22

GND_DIG_1

37

[EP]GND

R781

2.2K

R780

2.2K

ZD601

5.6B

C341

68uF

35V

C344

68uF

35V

READY

C355 22pF 50V

READY

C356 22pF 50V

READY

C357 22pF 50V

READY

C358 22pF 50V

READY

P703

104060-8017

FHD

1234567

8

9

10111213141516171819202122

23242526272829303132333435

36

373839404142434445464748495051

52535455565758596061626364

65

66676869707172737475767778

79

80

81

Tuner/Audio Amp LVDS / Key-IR

GP2R_S7R

2010-08-31

3

Audio AMP

Close to Tuner

(Should be guarded by GND)

- Should be guarded by GND

- No Via

- Width(Signal) : min 12mm GND(Signal) : min 24mm

Close-by

H-NIM Tuner







Key/IRLVDS

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

PCM_D[0] PCM_D[1] PCM_D[2] PCM_D[3] PCM_D[4] PCM_D[5] PCM_D[6] PCM_D[7]

PCM_A[0] PCM_A[1] PCM_A[2] PCM_A[3] PCM_A[4] PCM_A[5] PCM_A[6] PCM_A[7] PCM_A[8] PCM_A[9] PCM_A[10] PCM_A[11] PCM_A[12] PCM_A[13] PCM_A[14]

CI_TS_DATA[0] CI_TS_DATA[1] CI_TS_DATA[2] CI_TS_DATA[3] CI_TS_DATA[4] CI_TS_DATA[5] CI_TS_DATA[6] CI_TS_DATA[7]

FE_TS_DATA[1] FE_TS_DATA[2] FE_TS_DATA[3] FE_TS_DATA[4] FE_TS_DATA[5] FE_TS_DATA[6] FE_TS_DATA[7]

AVDD25_PGA

MIU0VDDC MIU1VDDC

AVDD_DMPLL

MVREF

FRC_LPLL

FE_TS_DATA[0]

AVDD_DDR0

VDD33_DVI

AVDD2P5

/PCM_IORD

/PCM_WAIT

/PF_OE

PF_ALE

RGB_DDC_SDA

SPI_SDI

5V_DET_HDMI_3

/PCM_IOWR

R493

22

RGB_DDC_SCL

R494 22

UART_TXD

R484 22

UART_RXD

PCM_A[0-14]

/PF_WE

R486 22

PCM_RST

FE_TS_CLK

R485 22

S7_TXD

SC_RE2

R488 22

FE_TS_DATA[0-7]

/PCM_OE

R483 22

R491 1K

/PF_CE0

C458

0.1uF

PWM1

R497 33

/PCM_CE

I2C_SDA

C457

0.1uF READY

/F_RB

FE_TS_VAL_ERR

CI_TS_SYNC

PCM_D[0-7]

AV/SC1_DET

/PCM_WE

R487 22

SPI_SDO

/PCM_CD

R479

10K

R498 33

/PCM_IRQA

5V_DET_HDMI_4

CI_TS_VAL

I2C_SCL

SIDEAV_DET

R481

10K

S7_RXD

/PCM_REG

/PF_CE1

CI_TS_CLK

+5V

FE_TS_SYN

/FLASH_WP

/SPI_CS

5V_DET_HDMI_2

SPI_SCK

/PF_WP

SC2/COMP1_DET

R496 33

CI_TS_DATA[0-7]

D2-_HDMI2

SCART2_Lout

C421 1000pF

C417 0.047uF

DSUB_R+

C424 0.047uF

SIDEAV_CVBS_IN

SC1_B-/COMP1_Pb-

R428 33

SCART1_Lout

X400

24MHz

C419 0.047uF

AUD_LRCH

R408 33

C408 0.047uF

D0+_HDMI4

C456

1000pF

READY

C445

2.2uF

READY

C427 0.047uF

D2+_HDMI3

SC1_G+/COMP1_Y+

SC2/COMP1_R_IN

C410

0.047uF

R432 68

D0-_HDMI2

D2-_HDMI3

R430 33

C451 27pF

COMP2_Pb-

R465 100

C420 0.047uF

C425 0.047uF

SC1_R+/COMP1_Pr+

SIDEAV_L_IN

HPD4

C413

0.047uF

DSUB_B+

SIDEAV_R_IN

IF_P_MSTAR

C449

0.1uF

D1-_HDMI4

C409 0.047uF

C444 2.2uF

TU_SIF

C443 2.2uF

R409 68

CK-_HDMI3

R407 68

SC1_SOG_IN

D2-_HDMI4

C435 2.2uF

C400

1000pF

READY

R462 10K

SC1_B+/COMP1_Pb+

COMP2_Pb+

SC1_FB

C422 0.047uF

D1+_HDMI2

IF_AGC_MAIN

D1-_HDMI3

D1+_HDMI4

R402 22

C412

0.047uF

IF_N_MSTAR

AV/SC1_R_IN

R414

68

R472 47

DDC_SDA_4

COMP2_Y-

C411

0.047uF

COMP2_Pr+

R412 68

C438

2.2uF

DEMOD_SCL

CEC_REMOTE_S7

DSUB_VSYNC

DDC_SDA_3

C430 0.1uF

D0+_HDMI2

SIDE_USB_DM

SC2_CVBS_IN

R426 33

C402 0.047uF

D2+_HDMI4

DTV/MNT_VOUT

SC1_R-/COMP1_Pr-

PC_L_IN

SCART2_Rout

COMP2_Y+

DDC_SDA_2

C441

2.2uF

SCART1_Rout

L400

120-ohm

Main

C452 0.1uF

SOC_RESET

CK+_HDMI4

CK+_HDMI3

C416 0.047uF

R427 33

R411 33

AUD_SCK AUD_MASTER_CLK

R413

33

AUD_LRCK

C403 0.047uF

C454

0.1uF

HPD2

C436

2.2uF

R422 33

R425 33

DDC_SCL_2

SC1_G-/COMP1_Y-

R476 100

R463 1K

C431

0.1uF

DSUB_HSYNC

C406 0.047uF C407 1000pF

C401 0.047uF

R416 68

R415 33

C418 0.047uF

D0-_HDMI3

TU_SDA

COMP2_R_IN

C453 0.1uF

R403 22

R405 68

DSUB_G+

R419 68

CK-_HDMI2

IR

C450 27pF

D0+_HDMI3

TU_SCL

C426 0.047uF

SUB_SCL

C423 0.047uF

TU_CVBS

C414 1000pF

PC_R_IN

R404 33 C439 2.2uF

C429 0.047uF

R458

1M

AV/SC1_L_IN

C428 0.047uF

R418 33

CK-_HDMI4

D1+_HDMI3

C405 0.047uF

R478 0

DEMOD_SDA

AMP_SDA

D0-_HDMI4

DDC_SCL_4

C404 0.047uF

D1-_HDMI2

R464 100

COMP2_Pr-

R401 10K

SC2/COMP1_L_IN

DSUB_G-

COMP2_Y+

C442 2.2uF

R424 0

C437 2.2uF

C440

2.2uF

DDC_SCL_3

AMP_SCL

R477 0

SIDE_USB_DP

R406 33

R420

33

CK+_HDMI2

COMP2_L_IN

SC2_ID

R473 47

HPD3

DSUB_B-

+3.3V_AVDD

R423 68

DSUB_R-

R400 10K

C446

2.2uF

READY

R417 0

NON_EU

R431 33

C415 0.047uF

R429 33

AV/SC1_CVBS_IN

D2+_HDMI2

R421

68

R410 0

SUB_SDA

SPDIF_OUT

B-TMDQSU

B-TMA11

B-TMODT

B-TMDQU0

B-TMA4

B-TMDQL5

B-TMDQU6

B-TMA10

B-TMDQU5

B-TMA7

B-TMDQU7

B-TMRESETB

B-TMDQU1

B-TMDQL0

B-TMDQL6

B-TMCK

B-TMDQL1

B-TMDQSUB

B-TMDQU2

B-TMBA1

B-TMA6

B-TMA2

B-TMWEB

B-TMA8

B-TMA5

B-TMA13

B-TMA0

B-TMDQU4

B-TMDQL2

B-TMDML

B-TMA1

B-TMDQL3

B-TMCKE

B-TMA3

B-TMCASB

B-TMDQL7

B-TMA12

B-TMDQL4

B-TMDQSL

B-TMDMU

B-TMBA0

B-TMCKB

B-TMRASB

B-TMDQU3

B-TMDQSLB

B-TMA9

B-TMBA2

LVDS_DATA_2_B+

LVDS_DATA_2_B-

LVDS_DATA_1_E+

LVDS_DATA_1_A+

LVDS_DATA_2_E+

LVDS_DATA_1_C+

LVDS_DATA_2_C-

LVDS_CLK_2+

LVDS_DATA_2_D-

LVDS_DATA_1_B-

LVDS_DATA_1_A-

LVDS_DATA_1_E-

LVDS_DATA_2_C+

LVDS_DATA_2_E-

LVDS_CLK_2-

LVDS_DATA_2_A+

LVDS_DATA_2_D+

LVDS_DATA_2_A-

LVDS_CLK_1+

LVDS_CLK_1-

LVDS_DATA_1_D+

LVDS_DATA_1_D-

LVDS_DATA_1_B+ LVDS_DATA_1_C-

A-TMA11

A-TMA8

A-TMDML

A-TMA13

A-TMRESETB

A-TMCKE

A-TMODT

A-TMA10

A-TMDMU

A-TMDQU4

A-TMWEB

A-TMDQSUB

A-TMDQU3

A-TMDQSLB

A-TMDQL0 A-TMDQL1

A-TMA12

A-TMDQSU

A-TMDQL4

A-TMDQU1

A-TMA7

A-TMDQL7

A-TMA9

A-TMCASB

A-TMDQSL

A-TMDQU5

A-TMA1

A-TMA6

A-TMA3

A-TMDQL5

A-TMRASB

A-TMA5

A-TMDQL6

A-TMA2

A-TMDQU2

A-TMCKB

A-TMBA0 A-TMBA1

A-TMA0

A-TMDQU7

A-TMA4

A-TMCK

A-TMBA2

A-TMDQL3

A-TMDQU6

A-TMDQU0

A-TMDQL2

AR401 22

AR400 22

VCC_1.5V_DDR

R490

1K 1%

C459

0.1uF

R489

1K 1%

C460

1000pF

A-MVREFCA

B-MVREFCA

R499

1K 1%

C462

1000pF

R1400

1K 1%

C461

0.1uF

VCC_1.5V_DDR

R482

2.2K

R480

2.2K

C1413 0.1uF

+1.26V_VDDC

C1417 0.1uF

C1421 10uF

L409

120-ohm

Main

C1407 0.1uF

C478

10uF

C1426 0.1uF

10uFC1404

L404

120-ohm

Main

C1416 0.1uF

C499 0.1uF

L408

120-ohm

Main

C1418 0.1uF

C489 0.1uF

C477 0.1uF

C496

0.1uF

C470 0.1uF

10uFC487

C479 0.1uF

C1425 0.1uF

L406

120-ohm

Main

C1405 0.1uF

+2.5V_AVDD

C491 10uF

+1.26V_VDDC

L405

120-ohm

Main

C1401 0.1uF

C494

10uF

C1422 10uF

C1400 0.1uF

C1420 0.1uF

R1403

1K 1%

C475 10uF C476

0.1uF

C492 0.1uF

C498 0.1uF

C1423 0.1uF

+3.3V_AVDD

R1404

1K 1%

C1424 0.1uF

C493 0.1uF

C469 0.1uF

C1427 0.1uF

C1412 0.1uF

L412

120-ohm

Main

C1419 0.1uF

C1414 10uF

C480 0.1uF

+1.5V_DDR_IN

C495

0.1uF

L410

120-ohm

Main

C1415 10uF

C471 0.1uF

C473 0.1uF

C472 0.1uF

C1406 0.1uF

C474 0.1uF

C463

0.1uF

C1411 0.1uF

C497 0.1uF

+3.3V_AVDD

R452 1K

READY

MODEL_OPT_3

R451 1K

R450

1K

PWM0

R460

1K

READY

AUD_LRCH

PWM1

R447

1K

R461

1K

R453

1K

READY

+3.3V_AVDD

AUD_MASTER_CLK

AUD_SCK

R449

1K

READY

R444

1K

READY

R443

1K

R448

1K

READY

R454

1K

+3.3V_AVDD

L413

120-ohm

Main

L402 Main

120-ohm

L401 Main

120-ohm

LG8300_RESET

R438

22

3D

C447

0.01uF 50V

C464

0.01uF 50V

C448 1uF

C488 1uF

C434

4.7uF

C455 10uF

P_SDA

R1408 22

+3.3V_AVDD

C466

0.1uF

+3.3V_ST

C465

4.7uF 10V

R434

10

D400 KDS181

SOC_RESET

3D_RF_RXD 3D_RF_TXD

TUNER_RESET

PM_TXD

PM_RXD

RL_ON

AC_DET

R436 100

Q400 2SC3052

E

B

C

R437 10K

MODEL_OPT_3

KEY2

KEY1

SC_RE1

DSUB_DET

SCART1_MUTE

DISP_EN

R440

100

+3.3V_ST

ERROR_DET

AV/COMP2_DET

PWM0

AMP_RESET_N

C490 0.1uF

SC1_ID

LED_RED

PCM_5V_CTL

COMP2_DET

P_SCL

TOUCH_VER_CHK

EDID_WP

R4450

READY

AMP_MUTE

3D_RFMODULE_RESET

R492

0

R446

0

USB1_OCD USB1_CTL

5V_ON

R4560

READY

3D_RF_GPIO1

R466 22

3D

3D_RF_GPIO2

R467

22

3D

3D_RF_GPIO0

R468 22

3D

R470

3.3K

READY

R469

3.3K

READY

+3.3V_AVDD

R471

3.3K

READY

R1401 22

R433

62K

R4411KR1476

1K

R1411

3.3K

R1412

3.3K

R439 22K

R442 22K

R45522K

R45722K

C432 0.01uF

C4330.01uF

C4670.01uF

C4680.01uF

R459100

R474100 R475100

R495100

3D_RFMODULE_DC

3D_RFMODULE_DD

SW400

TMUE312GAB

READY

1 2

43

5

R435 100

READY

LGE101DC-R [S7R DIVX/MS10]

IC400

A_RXCP

F1

A_RXCN

F2

A_RX0P

G2

A_RX0N

G3

A_RX1P

H3

A_RX1N

G1

A_RX2P

H1

A_RX2N

H2

DDCDA_DA/GPIO24

F5

DDCDA_CK/GPIO23

F4

HOTPLUGA/GPIO19

E6

B_RXCP

D3

B_RXCN

C1

B_RX0P

D1

B_RX0N

D2

B_RX1P

E2

B_RX1N

E3

B_RX2P

F3

B_RX2N

E1

DDCDB_DA/GPIO26

D4

DDCDB_CK/GPIO25

E4

HOTPLUGB/GPIO20

D5

C_RXCP

AA2

C_RXCN

AA1

C_RX0P

AB1

C_RX0N

AA3

C_RX1P

AB3

C_RX1N

AB2

C_RX2P

AC2

C_RX2N

AC1

DDCDC_DA/GPIO28

AB4

DDCDC_CK/GPIO27

AA4

HOTPLUGC/GPIO21

AC3

D_RXCP

A2

D_RXCN

A3

D_RX0P

B3

D_RX0N

A1

D_RX1P

B1

D_RX1N

B2

D_RX2P

C2

D_RX2N

C3

DDCDD_DA/GPIO30

B4

DDCDD_CK/GPIO29

C4

HOTPLUGD/GPIO22

E5

CEC/GPIO5

D6

HSYNC0

G5

VSYNC0

G6

RIN0P

K1

RIN0M

L3

GIN0P

K3

GIN0M

K2

BIN0P

J3

BIN0M

J2

SOGIN0

J1

HSYNC1

G4

VSYNC1

H6

RIN1P

K5

RIN1M

K4

GIN1P

J4

GIN1M

K6

BIN1P

H4

BIN1M

J6

SOGIN1

J5

HSYNC2

H5

RIN2P

N3

RIN2M

N2

GIN2P

M2

GIN2M

M1

BIN2P

L2

BIN2M

L1

SOGIN2

M3

CVBS0P

N4

CVBS1P

N6

CVBS2P

L4

CVBS3P

L5

CVBS4P

L6

CVBS5P

M4

CVBS6P

M5

CVBS7P

K7

CVBS_OUT1

M6

CVBS_OUT2

M7

VCOM0

N5

VIFP

W2

VIFM

W1

IP

V2

IM

V1

SSIF/SIFP

Y2

SSIF/SIFM

Y1

QP

U3

QM

V3

IFAGC

Y5

RF_TAGC

Y4

TGPIO0/UPGAIN

U1

TGPIO1/DNGAIN

U2

TGPIO2/I2C_CLK

R3

TGPIO3/I2C_SDA

T3

XTALIN

T2

XTALOUT

T1

SPDIF_IN/GPIO177

G14

SPDIF_OUT/GPIO178

G13

DM_P0

B7

DP_P0

A7

DM_P1

AF17

DP_P1

AE17

I2S_IN_BCK/GPIO175

F14

I2S_IN_SD/GPIO176

F13

I2S_IN_WS/GPIO174

F15

I2S_OUT_BCK/GPIO181

D20

I2S_OUT_MCK/GPIO179

E20

I2S_OUT_SD/GPIO182

D19

I2S_OUT_SD1/GPIO183

F18

I2S_OUT_SD2/GPIO184

E18

I2S_OUT_SD3/GPIO185

D18

I2S_OUT_WS/GPIO180

E19

LINE_IN_0L

N1

LINE_IN_0R

P3

LINE_IN_1L

P1

LINE_IN_1R

P2

LINE_IN_2L

P4

LINE_IN_2R

P5

LINE_IN_3L

R6

LINE_IN_3R

T6

LINE_IN_4L

U5

LINE_IN_4R

V5

LINE_IN_5L

U6

LINE_IN_5R

V6

LINE_OUT_0L

U4

LINE_OUT_2L

W3

LINE_OUT_3L

W4

LINE_OUT_0R

V4

LINE_OUT_2R

Y3

LINE_OUT_3R

W5

MIC_DET_IN

R4

MICCM

T5

MICIN

R5

AUCOM

T4

VRM

P7

VAG

R7

VRP

P6

HP_OUT_1L

R1

HP_OUT_1R

R2

ET_RXD0

E21

ET_TXD0

E22

ET_RXD1

D21

ET_TXD1

F21

ET_REFCLK

E23

ET_TX_EN

D22

ET_MDC

F22

ET_MDIO

D23

ET_CRS

F23

AVLINK

F8

IRINT

G8

TESTPIN

K8

RESET

A4

NC_16

Y17

LGE101DC-R [S7R DIVX/MS10]

IC400

NC_48

AE1

NC_78

AF16

NC_64

AF1

NC_50

AE3

NC_45

AD14

NC_34

AD3

NC_77

AF15

NC_65

AF2

NC_62

AE15

NC_33

AD2

NC_47

AD16

NC_46

AD15

NC_63

AE16

NC_66

AF3

NC_76

AF14

NC_32

AD1

NC_44

AD13

NC_61

AE14

NC_60

AE13

NC_51

AE4

NC_36

AD5

NC_67

AF4

NC_35

AD4

NC_49

AE2

NC_71

AF8

NC_40

AD9

NC_56

AE9

NC_72

AF9

NC_58

AE11

NC_69

AF6

NC_53

AE6

NC_74

AF11

NC_37

AD6

NC_43

AD12

NC_52

AE5

NC_75

AF12

NC_68

AF5

NC_59

AE12

NC_57

AE10

NC_70

AF7

NC_42

AD11

NC_38

AD7

NC_41

AD10

NC_54

AE7

NC_73

AF10

NC_39

AD8

NC_55

AE8

NC_12

Y11

GND_105

Y19

LVACLKP/LLV6P/BLUE[3]

W26

LVACLKN/LLV6N/BLUE[2]

W25

LVA0P/LLV3P/BLUE[9]

U26

LVA0N/LLV3N/BLUE[8]

U25

LVA1P/LLV4P/BLUE[7]

U24

LVA1N/LLV4N/BLUE[6]

V26

LVA2P/LLV5P/BLUE[5]

V25

LVA2N/LLV5N/BLUE[4]

V24

LVA3P/LLV7P/BLUE[1]

W24

LVA3N/LLV7N/BLUE[0]

Y26

LVA4P/LLV8P

Y25

LVA4N/LLV8N

Y24

LVBCLKP/LLV0P/GREEN[5]

AC26

LVBCLKN/LLV0N/GREEN[4]

AC25

LVB0P/RLV6P/RED[1]

AA26

LVB0N/RLV6N/RED[0]

AA25

LVB1P/RLV7P/GREEN[9]

AA24

LVB1N/RLV7N/GREEN[8]

AB26

LVB2P/RLV8P/GREEN[7]

AB25

LVB2N/RLV8N/GREEN[6]

AB24

LVB3P/LLV1P/GREEN[3]

AC24

LVB3N/LLV1N/GREEN[2]

AD26

LVB4P/LLV0P/GREEN[1]

AD25

LVB4N/LLV0N/GREEN[0]

AD24

RLV3P/RED[7]

AD23

RLV3N/RED[6]

AE23

RLV0P/LVSYNC

AE26

RLV0N/LHSYNC

AE25

RLV1N/LCK

AF26

RLV2P/RED[9]

AF25

RLV1P/LDE

AE24

RLV2N/RED[8]

AF24

RLV4P/RED[5]

AF23

RLV4N/RED[4]

AD22

RLV5P/RED[3]

AE22

RLV5N/RED[2]

AF22

TCON3/OE/GOE/GCLK2

AD19

TCON15/SCAN_BLK1

AE19

TCON18/CS7/GCLK5

AD21

TCON19/CS8/GCLK6

AE21

TCON11/CS5/HCON

AF21

TCON10/CS4/OPT_N

AD20

TCON9/CS3/OPT_P

AE20

TCON16/WPWM

AF20

TCON12/DPM

AF19

TCON1/STV/GSP/VST

AD18

TCON5/TP/SOE

AE18

TCON14/SACN_BLK

AF18

TCON21/CS10/VGH_ODD

AB22

TCON20/CS9/VGH_EVEN

AB23

TCON13/LEDON

AC23

TCON17/CS6/GCLK4

AC22

NC_26

AB16

NC_19

AA14

NC_30

AC15

NC_15

Y16

NC_31

AC16

NC_29

AC14

NC_21

AA16

NC_20

AA15

NC_11

Y10

NC_17

AA11

NC_25

AB15

NC_24

AB14

LGE101DC-R [S7R DIVX/MS10]

IC400

A_DDR3_A0/DDR2_A13

B8

A_DDR3_A1/DDR2_A8

B9

A_DDR3_A2/DDR2_A9

A8

A_DDR3_A3/DDR2_A1

C21

A_DDR3_A4/DDR2_A2

B10

A_DDR3_A5/DDR2_A10

A22

A_DDR3_A6/DDR2_A4

A10

A_DDR3_A7/DDR2_A3

B22

A_DDR3_A8/DDR2_A6

C9

A_DDR3_A9/DDR2_A12

C23

A_DDR3_A10/DDR2_RASZ

B11

A_DDR3_A11/DDR2_A11

A9

A_DDR3_A12/DDR2_A0

C10

A_DDR3_A13/DDR2_A7

B23

A_DDR3_BA0/DDR2_BA2

B21

A_DDR3_BA1/DDR2_CASZ

A11

A_DDR3_BA2/DDR2_A5

A23

A_DDR3_MCLK/DDR2_MCLK

A12

A_DDR3_MCLKZ/DDR2_MCLKZ

C11

A_DDR3_CKE/DDR2_DQ5

B12

A_DDR3_ODT/DDR2_ODT

C20

A_DDR3_RASZ/DDR2_WEZ

A20

A_DDR3_CASZ/DDR2_BA1

B20

A_DDR3_WEZ/DDR2_BA0

A21

A_DDR3_RESETB

C22

A_DDR3_DQSL/DDR2_DQS0

C16

A_DDR3_DQSLB/DDR2_DQSB0

B16

A_DDR3_DQSU/DDR2_DQSB1

A16

A_DDR3_DQSUB/DDR2_DQS1

C15

A_DDR3_DML//DDR2_DQ13

A14

A_DDR3_DMU/DDR2_DQ6

B18

A_DDR3_DQL0/DDR2_DQ3

C18

A_DDR3_DQL1/DDR2_DQ7

B13

A_DDR3_DQL2/DDR2_DQ1

A19

A_DDR3_DQL3/DDR2_DQ10

C13

A_DDR3_DQL4/DDR2_DQ4

C19

A_DDR3_DQL5/DDR2_DQ0

A13

A_DDR3_DQL6/DDR2_CKE

B19

A_DDR3_DQL7/DDR2_DQ2

C12

A_DDR3_DQU0/DDR2_DQ15

A15

A_DDR3_DQU1/DDR2_DQ9

A17

A_DDR3_DQU2/DDR2_DQ8

B14

A_DDR3_DQU3/DDR2_DQ11

C17

A_DDR3_DQU4/DDR2_DQM1

B15

A_DDR3_DQU5/DDR2_DQ12

A18

A_DDR3_DQU6/DDR2_DQM0

C14

A_DDR3_DQU7/DDR2_DQ14

B17

B_DDR3_A0/DDR2_A13

A25

B_DDR3_A1/DDR2_A8

B24

B_DDR3_A2/DDR2_A9

A24

B_DDR3_A3/DDR2_A1

P25

B_DDR3_A4/DDR2_A2

C24

B_DDR3_A5/DDR2_A10

P26

B_DDR3_A6/DDR2_A4

B26

B_DDR3_A7/DDR2_A3

R24

B_DDR3_A8/DDR2_A6

B25

B_DDR3_A9/DDR2_A12

T26

B_DDR3_A10/DDR2_RASZ

D24

B_DDR3_A11/DDR2_A11

A26

B_DDR3_A12/DDR2_A0

C25

B_DDR3_A13/DDR2_A7

T25

B_DDR3_BA0/DDR2_BA2

P24

B_DDR3_BA1/DDR2_CASZ

C26

B_DDR3_BA2/DDR2_A5

R26

B_DDR3_MCLK/DDR2_MCLK

D26

B_DDR3_MCLKZ/DDR2_MCLKZ

D25

B_DDR3_CKE/DDR2_DQ5

E24

B_DDR3_ODT/DDR2_ODT

N25

B_DDR3_RASZ/DDR2_WEZ

M26

B_DDR3_CASZ/DDR2_BA1

N24

B_DDR3_WEZ/DDR2_BA0

N26

B_DDR3_RESETB

R25

B_DDR3_DQSL/DDR2_DQS0

J25

B_DDR3_DQSLB/DDR2_DQSB0

J24

B_DDR3_DQSU/DDR2_DQSB1

H26

B_DDR3_DQSUB/DDR2_DQS1

H25

B_DDR3_DML/DDR2_DQ13

F26

B_DDR3_DMU/DDR2_DQ6

L24

B_DDR3_DQL0/DDR2_DQ3

L25

B_DDR3_DQL1/DDR2_DQ7

F24

B_DDR3_DQL2/DDR2_DQ1

L26

B_DDR3_DQL3/DDR2_DQ10

F25

B_DDR3_DQL4/DDR2_DQ4

M25

B_DDR3_DQL5/DDR2_DQ0

E26

B_DDR3_DQL6/DDR2_CKE

M24

B_DDR3_DQL7/DDR2_DQ2

E25

B_DDR3_DQU0/DDR2_DQ15

G26

B_DDR3_DQU1/DDR2_DQ9

J26

B_DDR3_DQU2/DDR2_DQ8

G24

B_DDR3_DQU3/DDR2_DQ11

K25

B_DDR3_DQU4/DDR2_DQM1

H24

B_DDR3_DQU5/DDR2_DQ12

K26

B_DDR3_DQU6/DDR2_DQM0

G25

B_DDR3_DQU7/DDR2_DQ14

K24

LGE101DC-R [S7R DIVX/MS10]

IC400

PCM_D0

U22

PCM_D1

T21

PCM_D2

T22

PCM_D3

AB18

PCM_D4

AC18

PCM_D5

AC19

PCM_D6

AC20

PCM_D7

AC21

PCM_A0

U21

PCM_A1

V21

PCM_A2

Y22

PCM_A3

AA22

PCM_A4

R22

PCM_A5

R21

PCM_A6

T23

PCM_A7

T24

PCM_A8

AA23

PCM_A9

Y20

PCM_A10

AB17

PCM_A11

AA21

PCM_A12

U23

PCM_A13

Y23

PCM_A14

W23

PCM_REG_N

W22

PCM_OE_N

AA17

PCM_WE_N

V22

PCM_IORD_N

W21

PCM_IOWR_N

Y21

PCM_CE_N

AA20

PCM_IRQA_N

V23

PCM_CD_N

P23

PCM_WAIT_N

R23

PCM_RESET

P22

PCM_PF_CE0Z

AC17

PCM_PF_CE1Z

AB20

PCM_PF_OEZ

AA18

PCM_PF_WEZ

AB21

PCM_PF_ALE

AB19

PCM_PF_AD[15]

AD17

PCM_PF_RBZ

AA19

UART_TX2/GPIO65

M23

UART_RX2/GPIO64

N23

DDCR_DA/GPIO71

M22

DDCR_CK/GPIO72

N22

DDCA_DA/UART0_TX

A5

DDCA_CK/UART0_RX

B5

PWM0/GPIO66

K23

PWM1/GPIO67

K22

PWM2/GPIO68

G23

PWM3/GPIO69

G22

PWM4/GPIO70

G21

SAR0/GPIO31

C6

SAR1/GPIO32

B6

SAR2/GPIO33

C8

SAR3/GPIO34

C7

SAR4/GPIO35

A6

TCON0/POL

N21

TCON2/GSP_R/GCLK1

M21

TCON4/CPV/GSC/GCLK3

L22

TCON6/FLK

L21

TCON8/CS2/FLK3

P21

GPIO36/UART3_RX

K21

GPIO37/UART3_TX

L23

GPIO38

K20

GPIO39

L20

GPIO40

M20

GPIO41

G20

GPIO42

G19

GPIO50/UART1_RX

F20

GPIO51/UART1_TX

F19

GPIO6/PM0/INT0

E7

GPIO7/PM1/PM_UART_TX

D7

GPIO8/PM2

E11

GPIO9/PM3

G9

GPIO10/PM4

F9

GPIO11/PM5/PM_UART_RX/INT1

C5

PM_SPI_CS1/GPIO12/PM6

E8

PM_SPI_WP1/GPIO13/PM7

E9

PM_SPI_WP2/GPIO14/PM8/INT2

F7

GPIO15/PM9

F6

PM_SPI_CS2/GPIO16/PM10

D8

GPIO17/PM11/INT3

G12

GPIO18/PM12/INT4

F10

PM_SPI_CK/GPIO1

D9

GPIO0/PM_SPI_CZ

D11

PM_SPI_DI/GPIO2

E10

PM_SPI_DO/GPIO3

D10

TS0_CLK

AA9

TS0_VLD

AA5

TS0_SYNC

AA10

TS0_D0

AB5

TS0_D1

AC4

TS0_D2

Y6

TS0_D3

AA6

TS0_D4

W6

TS0_D5

AA7

TS0_D6

Y9

TS0_D7

AA8

TS1_CLK

AC5

TS1_VLD

AC6

TS1_SYNC

AB6

TS1_D0

AC10

TS1_D1

AB10

TS1_D2

AC9

TS1_D3

AB9

TS1_D4

AC8

TS1_D5

AB8

TS1_D6

AC7

TS1_D7

AB7

MPIF_CLK

D12

MPIF_CS_N

D14

MPIF_BUSY

E14

MPIF_D0

E12

MPIF_D1

F12

MPIF_D2

D13

MPIF_D3

E13

LGE101DC-R [S7R DIVX/MS10]

IC400

VDDC_1

H11

VDDC_2

H12

VDDC_3

H13

VDDC_4

H14

VDDC_5

H15

VDDC_6

J12

VDDC_7

J13

VDDC_8

J14

VDDC_9

J15

VDDC_10

J16

VDDC_11

L18

A_DVDD

H16

B_DVDD

K19

VDDC_12

L19

VDDC_13

M18

VDDC_14

M19

VDDC_15

N18

VDDC_16

N19

VDDC_17

N20

VDDC_18

P18

VDDC_19

P19

VDDC_20

P20

NC_13

Y12

AVDD1P2

J11

DVDD_NODIE

L7

AVDD2P5_ADC_1

H7

AVDD2P5_ADC_2

J7

AVDD25_REF

J8

AVDD_AU25

L8

PVDD_1

W15

PVDD_2

Y15

AVDD25_PGA

U8

AVDD_NODIE

M8

AVDD_DVI_1

N9

AVDD_DVI_2

P9

AVDD3P3_CVBS

N8

AVDD_DMPLL

P8

AVDD_AU33

T7

AVDD_EAR33

U7

AVDD33_T

T9

VDDP_1

R8

VDDP_2

R9

VDDP_3

T8

NC_5

V20

NC_8

W20

NC_2

U19

NC_3

U20

NC_4

V19

NC_7

W19

AVDD_LPLL

U18

NC_1

T20

NC_14

Y14

AVDD_MEMPLL

R19

NC_6

W14

AVDD_DDR0_D_1

D15

AVDD_DDR0_D_2

D16

AVDD_DDR0_D_3

E15

AVDD_DDR0_D_4

E16

AVDD_DDR0_C

E17

AVDD_DDR1_D_1

F16

AVDD_DDR1_D_2

F17

AVDD_DDR1_D_3

G16

AVDD_DDR1_D_4

G17

AVDD_DDR1_C

H17

NC_22

AB11

NC_23

AB12

NC_27

AC11

NC_28

AC12

NC_18

AA12

MVREF

G15

NC_9

Y7

NC_10

Y8

GND_1

G18

GND_2

H9

GND_3

H10

GND_4

H18

GND_5

H19

GND_6

J10

GND_7

J17

GND_8

J18

GND_9

J19

GND_10

K9

GND_11

K10

GND_12

K11

GND_13

K12

GND_14

K13

GND_15

K14

GND_16

K15

GND_17

K16

GND_18

K17

GND_19

K18

GND_20

L9

GND_21

L10

GND_22

L11

GND_23

L12

GND_24

L13

GND_25

L14

GND_26

L15

GND_27

L16

GND_28

L17

GND_29

M9

GND_30

M10

GND_31

M11

GND_32

M12

GND_33

M13

GND_34

M14

GND_35

M15

GND_36

M16

GND_37

M17

GND_38

N10

GND_39

N11

GND_40

N12

GND_41

N13

GND_42

N14

GND_43

N15

GND_44

N16

GND_45

N17

GND_46

P10

GND_47

P11

GND_48

P12

GND_49

P13

GND_50

P14

GND_51

P15

GND_52

P16

GND_53

P17

GND_54

R10

GND_55

R11

GND_56

R12

GND_57

R13

GND_58

R14

GND_59

R15

GND_60

R16

GND_61

R17

GND_62

R18

GND_63

T10

GND_64

T11

GND_65

T12

GND_66

T13

GND_67

T14

GND_68

T15

GND_69

T16

GND_70

T17

GND_71

T18

GND_72

T19

GND_73

U10

GND_74

U11

GND_75

U12

GND_76

U13

GND_77

U14

GND_78

U15

GND_79

U16

GND_80

U17

GND_81

V7

GND_82

V8

GND_83

V9

GND_84

V10

GND_85

V11

GND_86

V12

GND_87

V13

GND_88

V14

GND_89

V15

GND_90

V16

GND_91

V17

GND_92

V18

GND_93

W7

GND_94

W8

GND_95

W9

GND_96

W10

GND_97

W11

GND_98

W12

GND_99

W13

GND_100

W16

GND_101

W17

GND_102

W18

GND_103

Y13

GND_104

Y18

GND_106

AA13

GND_107

AB13

GND_108

AC13

GND_109

D17

GND_110

H23

GND_111

AF13

GND_FU

J9

PGA_VCOM

U9

CLose to Saturn7M IC

VDD33_T/VDDP/U3_VD33_2:47mA

VDDC : 2026mA

AU33:31mA

VDD33_DVI:163mA

FRC_MPLL:4mA

AVDD25_PGA:13mA

AVDD_DDR1:55mA

AVDD_DMPLL/AVDD_NODIE:7.362mA

AVDD_DDR0:55mA

AVDD2P5/ADC2P5:162mA

FRC_LPLL:13mA

AVDD_MEMPLL:24mA

AU25:10mA

MODEL_OPT_3

HDB6

MODEL OPTION

LOW

FHD

PIN NO.

PIN NAME

HIGH

<T3 CHIP Config> (AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)

MIPS_no_EJ_NOR8 : 4’h3 (MIPS as host. No EJ PAD. Byte mode NAND flash.) MIPS_EJ1_NOR8 : 4’h4 (MIPS as host. EJ use PAD1. Byte mode NAND flash.) MIPS_EJ2_NOR8 : 4’h5 (MIPS as host. EJ use PAD2. Byte mode NAND flash.) B51_Secure_no scramble : 4’hb (8051 as host. Internal SPI flash secure boot, no scramble) B51_Sesure_scramble : 4’hc (8051 as host. Internal SPI flash secure boot with scarmble)

Boot from SPI flash : 1’b0 Boot from NOR flash : 1’b1

VIDEO/AUDIO

4

GP2R_S7R

MAIN

LVDS

DDR

POWER

Close to MStar

SOC_RESET

2010-08-31

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

B-MVREFDQ

PCM_A[0]

PCM_A[4]

PCM_A[1]

PCM_A[7]

PCM_A[2]

PCM_A[6]

PCM_A[5]

PCM_A[3]

A-MVREFDQ

C_DDR_DQ[15]

DDR_DQ[14]

C_DDR_DQ[8]

DDR_DQ[15]

C_DDR_DQ[10]

DDR_DQ[8]

DDR_A[0]

DDR_DQ[10]

C_DDR_DQ[13]

DDR_DQ[13]

C_DDR_DQ[7]

DDR_A[4]

DDR_DQ[7]

C_DDR_DQ[0]

DDR_DQ[0]

C_DDR_DQ[2]

DDR_DQ[2]

C_DDR_DQ[5]

DDR_DQ[5]

DDR_DQ[0] DDR_DQ[1] DDR_DQ[2] DDR_DQ[3]

DDR_A[2]

DDR_DQ[4] DDR_DQ[5]

DDR_A[6]

DDR_DQ[6] DDR_DQ[7]

DDR_A[7]

DDR_A[10]

DDR_DQ[8] DDR_DQ[9]

DDR_A[5]

DDR_DQ[10]

DDR_A[1]

C_DDR_DQ[6]

DDR_DQ[11]

DDR_A[8]

DDR_DQ[12]

C_DDR_DQ[1]

DDR_DQ[6]

DDR_A[12]

DDR_DQ[13]

C_DDR_DQ[4]

DDR_DQ[1]

DDR_A[9]

DDR_A[11]

DDR_DQ[14]

C_DDR_DQ[3]

DDR_A[3]

DDR_DQ[4]

DDR_DQ[15]

C_DDR_DQ[12]

DDR_DQ[3]

C_DDR_DQ[11]

DDR_DQ[12]

C_DDR_DQ[9]

DDR_DQ[11]

C_DDR_DQ[14]

DDR_DQ[9]

C541 0.1uF

VCC_1.5V_DDR

C536 0.1uF

C535 0.1uF

C526 0.1uF

C537 0.1uF C538 0.1uF

C540 0.1uF

C505

0.1uF

C544 10uF 10V

C529 0.1uF

C527 0.1uF

C531 0.1uF

C534 0.1uF

C532 0.1uF

C503

1000pF

VCC_1.5V_DDR

C533 0.1uF

C530 0.1uF

C501

0.1uF

C524 10uF

+1.5V_DDR_IN

R502

1K 1%

C545

0.1uF 16V

C525 0.1uF

R503

1K 1%

C528 0.1uF

C539 0.1uF

A-TMDMU

A-MA4

A-TMCASB

A-MDQU1

A-MDML

A-MDQL0

A-MDQU6

A-TMDQL0

A-MDQU7

A-MCKB

A-TMODT

A-MDQU0

A-MA3

A-MA9

A-TMA9

A-TMA8

A-MCASB

A-MA0

A-MDQU4

A-MA11

A-MA6

A-TMDML

A-MDQSU

A-MDQL5

A-TMDQL3

A-MA4

R511

56 1%

A-MDMU

A-MBA2

A-MA0

A-TMDQSU

A-MA13

A-TMDQL5

A-TMDQU0

A-MBA1

A-TMDQSL

A-MVREFCA

A-MA8

A-MDQL6

A-MA7

A-MDQU0

A-MA5

A-MDML

A-MA12

A-TMBA0

A-MA8

R505

240 1%

A-MDQSUB

A-MRASB

A-MDQL7

R509

56 1%

A-TMA7

A-MDQL2

A-TMCKE

A-MODT

A-TMDQU7

A-TMDQSUB

A-MCKE

A-MDQL7

A-MDQL5

A-TMA6

A-TMDQL1

A-TMRESETB

A-MA1

A-TMRASB

A-MDQU4

A-MDQSLB

A-TMDQU2

A-MA1

VCC_1.5V_DDR

A-MCK

A-MDQSUB

A-MA7

A-MA10

A-TMA2

A-TMA3

A-TMDQL7

A-MDQU2

A-TMA12

A-TMDQU4

A-MDQL1

A-MDMU

A-TMDQU1

A-TMA5

A-TMDQSLB

A-MBA2

A-MA10

A-MDQU3

A-MDQL3

A-TMCKB

A-MDQU3

A-MODT

A-MCKB

A-MDQU6

A-MA3

A-MRESETB

A-MA12

A-MA11

A-TMDQU6

A-MCKE

A-MDQL3

A-MDQSLB

A-MDQU5

A-TMCK

H5TQ1G63BFR-H9C

IC500

A0

N3

A1

P7

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

A12/BC

N7

A13

T3

A15

M7

BA0

M2

BA1

N8

BA2

M3

CK

J7

CK

K7

CKE

K9

CS

L2

ODT

K1

RAS

J3

CAS

K3

WE

L3

RESET

T2

DQSL

F3

DQSL

G3

DQSU

C7

DQSU

B7

DML

E7

DMU

D3

DQL0

E3

DQL1

F7

DQL2

F2

DQL3

F8

DQL4

H3

DQL5

H8

DQL6

G2

DQL7

H7

DQU0

D7

DQU1

C3

DQU2

C8

DQU3

C2

DQU4

A7

DQU5

A2

DQU6

B8

DQU7

A3

VREFCA

M8

VREFDQ

H1

ZQ

L8

VDD_1

B2

VDD_2

D9

VDD_3

G7

VDD_4

K2

VDD_5

K8

VDD_6

N1

VDD_7

N9

VDD_8

R1

VDD_9

R9

VDDQ_1

A1

VDDQ_2

A8

VDDQ_3

C1

VDDQ_4

C9

VDDQ_5

D2

VDDQ_6

E9

VDDQ_7

F1

VDDQ_8

H2

VDDQ_9

H9

NC_1

J1

NC_2

J9

NC_3

L1

NC_4

L9

NC_6

T7

VSS_1

A9

VSS_2

B3

VSS_3

E1

VSS_4

G8

VSS_5

J2

VSS_6

J8

VSS_7

M1

VSS_8

M9

VSS_9

P1

VSS_10

P9

VSS_11

T1

VSS_12

T9

VSSQ_1

B1

VSSQ_2

B9

VSSQ_3

D1

VSSQ_4

D8

VSSQ_5

E2

VSSQ_6

E8

VSSQ_7

F9

VSSQ_8

G1

VSSQ_9

G9

A-MBA0

A-MDQU2

A-MDQU5

A-MA2

A-TMA13

A-TMBA2

A-TMDQU5

A-MWEB

A-MDQL4

A-MDQSU

A-MDQL1

R506 10K

A-MWEB

A-MRASB

A-MDQSL

A-MDQL6

A-MDQL4

A-TMA1

A-MDQU1

A-TMDQU3

A-MCKE

A-TMA10

A-TMA0

A-MA9

A-MA6

A-MDQL2

A-TMWEB

A-MA5

A-MA13

R512 10K

A-TMBA1

A-MDQU7

A-TMA4

A-MRESETB

A-TMDQL4

A-TMDQL2

A-MCK

A-TMDQL6

A-MDQSL

A-MBA1

A-MDQL0

A-TMA11

A-MCASB

B-MDQSL

B-TMDQL3

B-MA10

B-MDQU0

B-MDQL4

B-TMDML

B-MCK

B-TMDQL5

B-TMA9

B-MA0

B-MBA2

B-TMDQL6

B-TMDQU4

R507 10K

B-MDML

B-TMDQL4

B-MA2

B-TMA1

B-TMBA1

B-MDQU1

B-MDQSU

B-MA8

B-TMCK

B-TMDQSU

B-MA3

B-TMRESETB

B-TMDQU5

B-MDQL4

B-MA8

B-TMCASB

B-MA4

B-TMDQU3

B-TMRASB

B-TMA4

B-MA6

VCC_1.5V_DDR

B-TMA7

B-MA3

B-MDQL7

B-TMDQU7

B-TMA8

B-MA5

B-MA11

R531 10K

B-MA12

B-MBA1

B-MCKB

B-TMA6

B-MDQL0

B-MA13

B-MDQL1

B-MDQL2

B-MA5

B-MODT

B-MDQSL

B-MDQL2

B-MVREFCA

B-MRESETB

B-MBA2

B-TMDQSUB

B-TMDMU

B-TMCKB

B-MA9

B-MA1

B-MDQL1

B-MA6

B-MA4

B-MBA0

R504

240 1%

B-TMDQU0

B-MDQU4

B-MDQSUB

B-MA13

B-TMA12

B-MDQU5

B-MDQU2

H5TQ1G63BFR-H9C

IC501

A0

N3

A1

P7

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

A12/BC

N7

A13

T3

A15

M7

BA0

M2

BA1

N8

BA2

M3

CK

J7

CK

K7

CKE

K9

CS

L2

ODT

K1

RAS

J3

CAS

K3

WE

L3

RESET

T2

DQSL

F3

DQSL

G3

DQSU

C7

DQSU

B7

DML

E7

DMU

D3

DQL0

E3

DQL1

F7

DQL2

F2

DQL3

F8

DQL4

H3

DQL5

H8

DQL6

G2

DQL7

H7

DQU0

D7

DQU1

C3

DQU2

C8

DQU3

C2

DQU4

A7

DQU5

A2

DQU6

B8

DQU7

A3

VREFCA

M8

VREFDQ

H1

ZQ

L8

VDD_1

B2

VDD_2

D9

VDD_3

G7

VDD_4

K2

VDD_5

K8

VDD_6

N1

VDD_7

N9

VDD_8

R1

VDD_9

R9

VDDQ_1

A1

VDDQ_2

A8

VDDQ_3

C1

VDDQ_4

C9

VDDQ_5

D2

VDDQ_6

E9

VDDQ_7

F1

VDDQ_8

H2

VDDQ_9

H9

NC_1

J1

NC_2

J9

NC_3

L1

NC_4

L9

NC_6

T7

VSS_1

A9

VSS_2

B3

VSS_3

E1

VSS_4

G8

VSS_5

J2

VSS_6

J8

VSS_7

M1

VSS_8

M9

VSS_9

P1

VSS_10

P9

VSS_11

T1

VSS_12

T9

VSSQ_1

B1

VSSQ_2

B9

VSSQ_3

D1

VSSQ_4

D8

VSSQ_5

E2

VSSQ_6

E8

VSSQ_7

F9

VSSQ_8

G1

VSSQ_9

G9

B-MDQSLB

B-MDQL3

B-MDML

B-MA0

B-MA7

B-MWEB

B-TMA13

B-MBA1

B-TMA11

B-MDMU

B-TMA5

B-MCK

B-MA9

B-MDQL6

B-MDQSU

B-MDQSLB

B-MA1

B-MBA0

B-MDQU3 B-MDQU5

B-TMDQL0

B-TMDQL1

B-MA7

B-TMDQU2

B-MDQL5

B-MDQU7

B-TMA2

B-TMDQSLB

B-TMA3

B-MDQL6

B-TMDQSL

B-MDQSUB

B-MCKE

B-MCASB

B-MA12

B-MWEB

B-TMBA0

B-MDQU3

B-MA11

B-MA2

B-MCKE

B-TMCKE

B-MDQU6

B-MDMU

R508

56 1%

B-TMDQL7

B-TMA0

R510

56 1%

B-MDQU7

B-MDQU2

B-MDQU4

B-MRASB

B-TMDQL2

B-MDQU0

B-MDQL3

B-MA10

B-TMDQU1

B-MDQL0

B-MCKB

B-TMWEB

B-TMA10

B-TMBA2

B-MRESETB

B-MCASB

B-MDQL7

B-MDQU6

B-TMDQU6

B-MDQU1

B-TMODT

B-MRASB

B-MODT

B-MCKE

I2C_SCL

C549

0.1uF

+3.3V_AVDD

/PF_WP

SPI_SDO

R551

22

PF_ALE

PCM_A[0-7]

R540 0

R536

10K

READY

R546

10K

+3.3V_AVDD

I2C_SCL

/FLASH_WP

SPI_SDI

R548

4.7K

C547

0.1uF

C550

10uF

IC503

MX25L8005M2I-15G

3

WP#

2

SO

4

GND

1

CS#

5

SI

6

SCLK

7

HOLD#

8

VCC

IC505

CAT24WC08W-T

3

A2

2

A1

4

VSS

1

A0

5

SDA

6

SCL

7

WP

8

VCC

/PF_WER535

0

AR521

22

R544 22

/F_RB

C552

0.1uF

SPI_SCK

IC504

M24M01-HRMN6TP

3

E2

2

E1

4

VSS

1

NC

5

SDA

6

SCL

7

WP

8

VCC

C551

0.1uF

R543 22

+3.3V_ST

AR520

22

+3.3V_AVDD

+3.3V_ST

/PF_CE1

R550 4.7K

+3.3V_AVDD

+3.3V_ST

/PF_CE0

R547

4.7K

READY

+3.3V_ST

/PF_OE

I2C_SDA

R552 22

/SPI_CS

+3.3V_AVDD

R549 33

R533

3.3K

I2C_SDA

R532

3.3K

READY

C521 0.1uF

C510 0.1uF

C517 0.1uF

C515 0.1uF

C518 0.1uF

C504

0.1uF

C523 0.1uF

C522 0.1uF

C516 0.1uF

C509 0.1uF

C513 0.1uF

C511 0.1uF

C520 0.1uF

C519 0.1uF

C512 0.1uF

C514 0.1uF

C508 0.1uF

C506 10uF C507 0.1uF

VCC_1.5V_DDR

R500

1K 1%

C500

0.1uF

C502

1000pF

R501

1K 1%

Q501 2SC3052

READY

E

B

C

R539 10K

READY

Q500 2SC3052 READY

E

B

C

R534 10K

READY

L500 Main

500

C548 10pF

READY

C546 10pF

READY

C543

0.01uF 50V

C542

0.01uF 50V

R545

4.7K

R542

1K

R538

1K

READY

R537

1K

R541

1K

READY

AR503 56

AR501 56

AR500 56

AR502 56

AR504 56

AR511 56

AR513 56

AR512 56

AR514 56

AR510 56

R518 22

R526 22

R529 22

R515 22

R528 22

R517 22

R524 22

R516 22

R520 22

R525 22

R527 22

R519 22

AR509 22

AR518 22

AR516

22

AR508 22

AR515 22

AR519 22

AR517 22

AR506 22

AR507 22

AR505 22

R530 22

R521 22

R514 56

R513 56

R522 56 R523 56

IC502

H27U1G8F2BTR-BC

26

NC_17

27

NC_18

28

NC_19

29

I/O0

30

I/O1

31

I/O2

32

I/O3

33

NC_20

34

NC_21

35

NC_22

36

VSS_2

37

VCC_2

38

NC_23

39

NC_24

40

NC_25

41

I/O4

42

I/O5

43

I/O6

44

I/O7

45

NC_26

46

NC_27

47

NC_28

48

NC_29

17

ALE

3

NC_3

6

NC_6

16

CLE

15

NC_10

14

NC_9

13

VSS_1

12

VCC_1

11

NC_8

10

NC_7

9

CE

8

RE

7

R/B

4

NC_4

5

NC_5

25

NC_16

24

NC_15

23

NC_14

2

NC_2

22

NC_13

21

NC_12

1

NC_1

20

NC_11

19

WP

18

WE

DDR_A[3]

AR533 22 1/16W

3D

/C_DDR_RAS

DDR_A[9]

C716 0.1uF

3D

DDR_DQS1M

DDR2_ODT

DDR_DQS1P

C_DDR_A[1]

DDR_BA[0]

C700 10uF

3D

/DDR_WE

DDR_A[0]

C_DDR_BA[0]

C714 0.1uF

3D

DDR_A[8]

C702

0.1uF 16V

3D

C_DDR2_CKE

DDR_A[5]

AR532 22 1/16W

3D

R1467 22

3D

R1466 22

3D

C_DDR_DQM0

R1465 22

3D

DDR_A[7]

C709 0.1uF

3D

R1464 22

3D

R1463 22

3D

C_DDR_DQS0P

R1462 22

3D

DDR_A[6]

R1461 22

3D

+1.8V

R1460 22

3D

/C_DDR_CS

C717 0.1uF

3D

R1459 22

3D

C_DDR_DQS0M

AR527 22 1/16W

3D

C704 470pF 50V

3D

DDR_DQ[15-0]

C_DDR2_CLK

DDR_DQM0

C_DDR_A[5]

C_DDR_A[10]

DDR_DQS0M

C712 0.1uF

3D

C_DDR_A[6]

/DDR2_CLK

DDR_DQ[15-0]

DDR2_CLK

C_DDR_BA[1]

AR530 22 1/16W

3D

DDR_DQM0

DDR_BA[1]

DDR2_CLK

R700

100

3D

DDR_DQS0P

C_DDR_A[0]

DDR_VREF_DDR

/DDR_WE

DDR_A[12]

C_DDR_A[9]

C705

100pF

50V

3D

DDR_A[12-0]

C706 0.1uF

3D

DDR2_CKE

AR535 22 1/16W

3D

C_DDR_A[8]

DDR_A[2]

DDR_BA[1]

/DDR_CS

AR529 22 1/16W

3D

DDR_A[1]

/C_DDR_WE

DDR_A[10]

C_DDR_A[3]

DDR_DQM1

C719 0.1uF

3D

C715 0.1uF

3D

/DDR_CAS

DDR_BA[0]

/C_DDR_CAS

DDR_A[4]

C_DDR_DQS1P

AR534 22 1/16W

3D

DDR_A[11]

C_DDR_DQM1

C718 0.1uF

3D

/DDR_CAS

/DDR_CS

+1.8V

C_DDR_DQS1M

C711 0.1uF

3D

AR528 22 1/16W

3D

C708 0.1uF

3D

/C_DDR2_CLK

DDR_DQS0P

C_DDR_A[12]

C713 0.1uF

3D

C_DDR_A[2]

C_DDR_A[11]

C720 0.1uF

3D

AR531 22 1/16W

3D

/DDR2_CLK

DDR_DQS0M

C707 0.1uF

3D

C_DDR_A[4]

C710 0.1uF

3D

DDR2_CKE

/DDR_RAS

DDR2_ODT

DDR_DQS1M

C_DDR_DQ[15-0]

C703 0.1uF

3D

C_DDR_A[7]

DDR_DQS1P

C701 0.1uF

3D

DDR_DQM1

/DDR_RAS

C_DDR2_ODT

IC701

W9725G6JB-25

J2

VREF

J8

CLK

H2

VSSQ_2

B7

UDQS

N8

A4

P8

A8

L1

NC_4

L2

BA0

R8

NC_3

K7

RAS

F8

VSSQ_3

F3

LDM

P3

A9

M3

A1

N3

A5

K8

CLK

R3

NC_5

L3

BA1

J7

VSSDL

L7

CAS

F2

VSSQ_4

B3

UDM

M2

A10/AP

K2

CKE

R7

NC_6

M7

A2

N7

A6

M8

A0

J1

VDDL

K3

WE

E8

LDQS

P7

A11

K9

ODT

A2

NC_1

N2

A3

P2

A7

H8

VSSQ_1

F7

LDQS

A8

UDQS

R2

A12

L8

CS

E2

NC_2

E7

VSSQ_5

D8

VSSQ_6

D2

VSSQ_7

A7

VSSQ_8

B8

VSSQ_9

B2

VSSQ_10

P9

VSS_1

N1

VSS_2

J3

VSS_3

E3

VSS_4

A3

VSS_5

G9

VDDQ_1

G7

VDDQ_2

G3

VDDQ_3

G1

VDDQ_4

E9

VDDQ_5

C9

VDDQ_6

C7

VDDQ_7

C3

VDDQ_8

C1

VDDQ_9

A9

VDDQ_10

R1

VDD_1

M9

VDD_2

J9

VDD_3

E1

VDD_4

A1

VDD_5

B9

DQ15

B1

DQ14

D9

DQ13

D1

DQ12

D3

DQ11

D7

DQ10

C2

DQ9

C8

DQ8

F9

DQ7

F1

DQ6

H9

DQ5

H1

DQ4

H3

DQ3

H7

DQ2

G2

DQ1

G8

DQ0

Memory

GP2R_S7R

5

HDCP EEPROM 8KBit

Addr:10101--

EEPROM 1MBit

A0’h

SERIAL FLASH 8MBit

2010-08-31

NAND Flash 1GBit

LG8300 DDR3 Memory 256MBit

DDR3 Memory 1GBit x 2

LGE Internal Use Only

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

+3.3V_ST

P601

SMAW200-H18S1

14

9

4

18

13

8

3

17

12

7

2

16

11

6

1

15

10

5

19

+2.5V_AVDD

+3.3V_AVDD

P_17V

RL_ON

C619

100uF

16V

+5V_ST

IC600

AZ1085S-3.3TR/E1

1

ADJ/GND

2

OUTPUT

3

INPUT

C621 100uF

16V

+3.3V

AC_DET

IC601

AP2121N-3.3TRE1

1

GND

2

VOUT

3

VIN

+5V_ST

ERROR_DET

C624 100uF 16V

+5V

C608

0.1uF 16V

C602

0.1uF 16V

C604

0.1uF 16V

C603

0.1uF 16V

C606

0.1uF 16V

C615

0.1uF 16V

C601

0.1uF 16V

C628

0.1uF 16V

C623

0.1uF 16V

C627

0.1uF 16V

C605 100uF 16V

R603 100

R605 100

R606 100

R600

10K

READY

C600

0.1uF 16V

R604

100

IC604

TJ3964S-2.5

2

GND

3

VOUT

1

VIN

R624

3.6K

R623

16K

R627 20K

1%

C636

0.01uF 50V

D600

40V

MBRA340T3G

C635

4.7uF 50V

C638

0.015uF 50V

C643 15pF 50V

C634

4.7uF 50V

R626

105K

1%

C639

0.1uF 50V

P_17V

+5V_TU

C631 22uF 16V

C641 10uF 16V

C642 10uF 16V

C644 10uF 16V

READY

+3.3V_ST

L605 500

Power Main

R618 12K 1/16W 1%

C6250.01uF

0.1uF

C650

16V

0.1uF

C611

16V

C647 10uF 10V

R620

10.7K 1%

C609 10uF

16V

C637 10uF 10V

R636 330K

C613

0.1uF 16V

READY

R616 0

READY

C620

0.1uF 50V

C629 100pF

50V

L606

3.6uH

+1.5V_DDR_IN

R608

10K

READY

L602

120-ohm

Power Main

C658

0.1uF 16V

+3.3V

+5V

C660

0.1uF 16V

C661

0.1uF 16V

0.1uF

C612

16V

0.1uF

C653

16V

R610

10K

READY

C651 10uF 10V

C622

0.1uF 50V

R617 0

READY

C652 10uF 10V

C630 100pF

50V

C6260.01uF

C610 10uF

16V

L607

3.6uH

R637 330K

C614

0.1uF 16V

READY

R621

39K

1%

R619 75K 1/16W 1%

+1.26V_VDDC

Q600

RTR030P02

S

D

G

RL_ON

R609 10K

C657

0.01uF 25V

R612

10K

R607

10K

Q601 RT1C3904-T112

E

B

C

C654 22uF

16V

C656 100uF 16V

+3.3V_ST

+5V_ST

+5V_ST_EN

R602

10K

5V_ON

C655

0.01uF 25V

L603 500

Power Main

R601 10K

L610

120-ohm

Power Main

L611

120-ohm

Power Main

IC605

TPS54231D

3

EN

2

VIN

4

SS

1

BOOT

5

VSENSE

6

COMP

7

GND

8

PH

L604 500

Power Main

C663 10uF 16V READY

C633 22uF 16V

C632 22uF 16V

R613

10K

READY

R638 10K READY

C662 10uF 10V

C607 47uF

6.3V

C616 47uF

6.3V

C659 47uF

6.3V

IC606

AZ1085S-3.3TR/E1

1

ADJ/GND

2

OUTPUT

3

INPUT

L709

BLM18PG121SN1D

3D

+3.3V_3D

C740

0.01uF 3D

C746 10uF 10V

3D

+1.8V

C755

0.1uF 16V

3D

C751

0.1uF 16V

3D

C747 10uF 10V

3D

L703

BLM18PG121SN1D

3D

L710 BLM18PG121SN1D

3D

C745 22uF 10V

3D

0.1uF

C728

3D

R775

330K

3D

C739

0.1uF

50V

3D

+3.3V

C752 47uF

6.3V

3D

R773 0

READY

R704 10K READY

+5V

R779

22K

1%

3D

C734

0.1uF 16V

READY

+1.0V

C725 10uF

16V

3D

0.1uF

C748 16V

3D

R762

10K

READY

L702

3.6uH

3D

R778

5.1K 1%

3D

C743 100pF 50V

3D

R834 0

1/10W

5%

3D

R1440 0

3D

R347

1.2K

L300

120-ohm

2A

C313

0.1uF 16V

C322

0.1uF 16V

+3.3V_TU

+1.26V_TU

+3.3V_AVDD

C309 22uF 10V

CGND4

R2 0

MDS62110205

M2

READY

R7 0

R8 0

R5 0

MDS62110205

M1

CGND3

R6 0

R3 0

CGND2

CGND1

R4 0

R1 0

C325 47uF

6.3V

MDS62110205

M3

IC707

AZ1117BH-1.8TRE1

3D

OUT

INADJ/GND

R1475

1

C797 10uF

16V

L608

22.0uH

EAP61606601

R350

10

IC301

AZ1117BH-ADJTRE1

2

OUTPUT

3

INPUT1ADJ/GND

R774

10K

3D

R614

10K

R615

10K

C640 470pF 50V

R625

51K

C749 47uF

6.3V

READY

R2000

R2001

R2002

R2003

R2004

R2005

R2006

R2007

R611 1K READY

LD600 SAM2333 READY

C

A1[GN]

C738

2200pF

3D

C617 2200pF

C618 2200pF

R641 0

R642 0

R640 0

IC603

SN1007054RTER

1

VIN_1

3

GND_1

7

COMP

9

SS

10

PH_1

11

PH_2

12

PH_3

13

BOOT14PWRGD15EN16VIN_3

5

AGND

8

RT/CLK6VSENSE

4

GND_2

2

VIN_2

17

EP[GND]

IC602

SN1007054RTER

1

VIN_1

3

GND_1

7

COMP

9

SS

10

PH_1

11

PH_2

12

PH_3

13

BOOT14PWRGD15EN16VIN_3

5

AGND

8

RT/CLK6VSENSE

4

GND_2

2

VIN_2

17

EP[GND]

IC704

SN1007054RTER

3D

1

VIN_1

3

GND_1

7

COMP

9

SS

10

PH_1

11

PH_2

12

PH_3

13

BOOT14PWRGD15EN16VIN_3

5

AGND

8

RT/CLK6VSENSE

4

GND_2

2

VIN_2

17

EP[GND]

Power

GP2R_S7R

6

R1

R2

2A

R2

R1

3A

Vout=0.827*(1+R1/R2)

R2

3.2A / P-CHANNEL

R1

2010-08-31

R1

3A

LG8300 1.0V

Switching freq: 600K

R2

Vout=0.8*(1+R1/R2)

1.26V Core

Vout=0.827*(1+R1/R2)

1.5V DDR

5Vst Enable

3.3V_AVDD / 2.5AVDD

3.3Vst

3.3V

5V Tuner

Power Wafer

Switching freq: 600K

LG8300 3.3V / 1.8V

1.8V Control for Power_On Seq of LG8300

1.26V Tuner

R2

R1

SIDE_HDMI/USB GASKET GND

SEPARATE GND

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

C_DDR_A[11]

C_DDR_A[7]

C_DDR_A[6]

C_DDR_A[5]

C_DDR_A[3]

C_DDR_DQ[3]

C_DDR_DQ[4]

C_DDR_DQ[5]

C_DDR_DQ[6]

C_DDR_DQ[7]

C_DDR_DQ[8]

C_DDR_DQ[11]

C_DDR_DQ[14]

C_DDR_A[0]

C_DDR_A[1]

C_DDR_A[2]

C_DDR_A[4]

C_DDR_A[9]

C_DDR_A[10]

C_DDR_A[12]

C_DDR_A[8]

C_DDR_DQ[0]

C_DDR_DQ[1]

C_DDR_DQ[2]

C_DDR_DQ[9]

C_DDR_DQ[10]

C_DDR_DQ[12]

C_DDR_DQ[13]

C_DDR_DQ[15]

+1.0V_LTX

+3.3V_VDD

+3.3V_LRX

+3.3V_LTX

+3.3V_PLL

UART_RXD_3D

TCLK2N

C766 0.1uF

TE3N

/C_DDR_CS

C_DDR_DQ[15-0]

TMODE[2]

LVDS_DATA_1_E-

R776

3.3K

SPI_CK

LVDS_DATA_2_E+

R764

3.3K

LVDS_DATA_2_D+

+3.3V_3D

TC4N

C_DDR_DQS0P

C782 0.1uF16V

C757 0.1uF16V

JTAG_TDO

TB1P

R7220

TE1P

UART_TXD_3D

TE2N

TD3P

/C_DDR_CAS

LVDS_DATA_1_C+

TMODE[0]

TB4P

LVDS_DATA_2_E-

LVDS_DATA_2_C+

C777 0.1uF16V

R7250

C756 0.1uF16V

C_DDR_DQS1M

R758

10K

C765 0.1uF16V

TA1P

TCLK1N

P_SCL

R761

3.3K

READY

TB2P

TD3N

TC3P

C_DDR_BA[0]

LG8300_RESET

C759 0.1uF

TE4N

TB4N

/C_DDR_RAS

LVDS_DATA_1_E+

TMODE[1]

LVDS_DATA_2_B+

LVDS_DATA_2_D-

L704

BLM18PG121SN1D

C804 0.1uF16V

R768

3.3K

L707

BLM18PG121SN1D

L706

BLM18PG121SN1D

TCLK1P

C796 0.1uF16V

TB1N

C_DDR_DQS1P

C778

0.1uF16V

C764 0.1uF16V

P_SDA

TA2P

TCLK3P

TCLK4P

TA4P

C_DDR_BA[1]

TMODE[0]

/C_DDR_WE

LVDS_CLK_1-

LVDS_DATA_1_D+

C811 0.1uF16V

TMODE[3]

LVDS_DATA_2_A-

TD1N

C735

0.1uF 16V

C_DDR_DQS0M

C758 0.1uF16V

TC2N

LG8300_RESET

TA3P

TCLK4N

R744

1M1%

TA4N

C808 0.1uF16V

C_DDR2_CKE

R763

3.3K

TMODE[1]

L705

BLM18PG121SN1D

JTAG_TMS

LVDS_DATA_1_D-

SPI_DO

+3.3V_3D

LVDS_DATA_1_A-

TC1N

LVDS_CLK_2-

BOOT_SEL

C816 0.1uF16V

R770

1K

C812 0.1uF16V

TD2P

TB3P

TC4P

C_DDR_DQM0

TA3N

TE4P

/C_DDR2_CLK

/JTAG_TRST

JTAG_TDI

TMODE[2]

TC1P

LVDS_DATA_1_C-

LVDS_DATA_1_B-

R7260

SPI_DO

SPI_CSZ

LVDS_DATA_2_B-

C800 0.1uF16V

TC2P

C795 0.1uF16V

TE3P

C_DDR_DQM1

C772

0.1uF16V

TB3N

C803 0.1uF16V

C771 0.1uF16V

C770 0.1uF16V

C785 0.1uF16V

JTAG_TCLK

TE1N

C773 0.1uF

C_DDR2_CLK

TE2P

TMODE[3]

R765

3.3K

LVDS_DATA_1_B+

LVDS_CLK_1+

SPI_DI

LVDS_DATA_2_C-

SPI_CK

TB2N

TC3N

C815 0.1uF16V

R7230

TD4N

R7210

R759

0

/JTAG_TRST

C798 0.1uF16V

+3.3V_3D

TD4P

SW700

JTP-1127WEM

1 2

43

+1.0V

TA1N

JTAG_TDI

TD2N

R7080

C_DDR2_ODT

BOOT_SEL

TCLK2P

TCLK3N

LVDS_DATA_1_A+

SPI_CSZ

LVDS_CLK_2+

LVDS_DATA_2_A+

SPI_DI

C790 0.1uF16V

+3.3V_3D

C813 0.1uF16V

JTAG_TCLK

C763 0.1uF16V

TD1P

JTAG_TDO

C781 0.1uF16V

TA2N

+3.3V_3D

3D_L/R_SYNC

R1438

100

R1439

100

R896

100

R894

100

R891

100

R883

100

R878

100

R874

100

R845

100

R840

100

R897

100

R895

100

FLASH_WP

X700

25MHz

C821 0.1uF16V

C828 0.1uF16V

L712

BLM18PG121SN1D

C829 0.1uF16V C831 0.1uF16V

C834 0.1uF

C817 0.1uF16V C837 0.1uF16V

C835 0.1uF16V

R1450 0

R1452 0

Q703 KRC103S READY

E

B

C

FLASH_WP

C818 10uF6.3V C791 10uF6.3V

C820 10uF6.3V

C794 10uF6.3V

C839 10uF

C833 10uF6.3V

C832 10uF6.3V

C836 10uF6.3V

+3.3V

3D_RF_TXD

3D_RF_RXD

3D_RFMODULE_RESET

+3.3V

R1454

2.7K

READY

R1456 100

R1455 22

C_DDR_A[12-0]

TP1 TP2 TP3 TP4 TP5 TP6

TP7

R144522

R905

22

R144622

R902 22

R903

22

R904 22

R144322

R1448 22

R1444

22

R1449 22

R910 22

R90922R907

22

R908 22

R911

22

R753

3.3K

READY

R754

3.3K

R752

3.3K

R749

3.3K

READY

R750

3.3K

R748

3.3K

R751

3.3K

READY

R747

3.3K

READY

R745

3.3K

READY

R746

3.3K

C737

0.1uF 16V

3D_L/R_SYNC

R1470

100

R1453 100

R1469 100

3D_RF_GPIO2

3D_RF_GPIO1

3D_RF_GPIO0

R739

4.7K

IC702

W25X20BVSNIG

3

WP

2

DO

4

GND

1

CS

5

DIO

6

CLK

7

HOLD

8

VCC

R772 10K

R757 0

P704

12507WS-12L

1

2

3

4

5

6

7

8

9

10

11

12

13

C722

27pF

50V

C721

27pF

50V

C767 0.1uF16V

C810 0.1uF16V

C783 0.1uF16V

C802 0.1uF16V

C787 0.1uF16V

C760 0.1uF16V

C779 0.1uF16V

C838 10uF6.3V

C793 0.1uF16V

C774 0.1uF16V

C814 0.1uF16V

C792 10uF6.3V

+3.3V_3D

+1.0V

+1.8V

DDR_VREF_LG8300

R1477 1K

R14781KR14791KR1480

1K

C842

1000pF

+1.8V

DDR_VREF_LG8300

C840

0.1uF

C841

1000pF

+1.8V

DDR_VREF_DDR

R998

4.7K 1%

R999

4.7K 1%

R996

4.7K 1%

R997

4.7K 1%

C843

0.1uF

IC700

LG8300

TE4P

B2

TE4N

B1

TD4P

B3

TD4N

C3

TCLK4P

C1

TCLK4N

C2

TC4P

D2

TC4N

D1

TB4P

D3

TB4N

E3

TA4P

E1

TA4N

E2

TE3P

F2

TE3N

F1

TD3P

F3

TD3N

G3

TCLK3P

G1

TCLK3N

G2

TC3P

H2

TC3N

H1

TB3P

H3

TB3N

J3

TA3P

J1

TA3N

J2

TE2P

K2

TE2N

K1

TD2P

K3

TD2N

L3

TCLK2P

L1

TCLK2N

L2

TC2P

M2

TC2N

M1

TB2P

M3

TB2N

N3

TA2P

N1

TA2N

N2

TE1P

P2

TE1N

P1

TD1P

P3

TD1N

R3

TCLK1P

R1

TCLK1N

R2

TC1P

T2

TC1N

T1

TB1P

T3

TB1N

U3

TA1P

U1

TA1N

U2

DDR_ADDR[0]U5DDR_ADDR[1]V8DDR_ADDR[2]V5DDR_ADDR[3]U8DDR_ADDR[4]R6DDR_ADDR[5]T8DDR_ADDR[6]T6DDR_ADDR[7]R8DDR_ADDR[8]R7DDR_ADDR[9]U7DDR_ADDR[10]R9DDR_ADDR[11]T7DDR_ADDR[12]V7DDR_BA[0]U9DDR_BA[1]T9DDR_CKV6DDR_CK_NU6DDR_CKEV9DDR_CS_NR5DDR_ODTU4DDR_RAS_NV4DDR_CAS_NT5DDR_WE_N

R10

DDR_DQS[0]

V14

DDR_DQS[1]

V12

DDR_DQS_N[0]

U14

DDR_DQS_N[1]

U12

DDR_DM[0]

R15

DDR_DM[1]

T12

DDR_DQ[0]

V15

DDR_DQ[1]

T15

DDR_DQ[2]

U16

DDR_DQ[3]

T16

DDR_DQ[4]

R16

DDR_DQ[5]

V16

DDR_DQ[6]

T14

DDR_DQ[7]

U15

DDR_DQ[8]

T13

DDR_DQ[9]

V11

DDR_DQ[10]

U13

DDR_DQ[11]

U11

DDR_DQ[12]

T11

DDR_DQ[13]

V13

DDR_DQ[14]

R12

DDR_DQ[15]

R13

DDR_TAOUT

U10

DDR_TDOUT[0]

T10

DDR_TDOUT[1]

V10

RA1N

U18

RA1P

U17

RB1N

T18

RB1P

T17

RC1N

R18

RC1P

R17

RCLK1N

P18

RCLK1P

P17

RD1N

N18

RD1P

N17

RE1N

M18

RE1P

M17

RA2N

L18

RA2P

L17

RB2N

K18

RB2P

K17

RC2N

J18

RC2P

J17

RCLK2N

H18

RCLK2P

H17

RD2N

G18

RD2P

G17

RE2N

F18

RE2P

F17

CLK_XIN

A17

CLK_XOUT

B18

PO_RST_N

B17

LR_SYNC

V2

EMITTER_PULSE

V3

UART_TXD

A16

UART_RXD

B16

SPI_CS

C16

SPI_SCLK

D16

SPI_DO

A15

SPI_DI

B15

SCL

C15

SDA

D15

SCL_M

A14

SDA_M

B14

GPIO[0]

C14

GPIO[1]

D14

GPIO[2]

A13

GPIO[3]

B13

GPIO[4]

C13

GPIO[5]

D13

GPIO[6]

A12

GPIO[7]

B12

GPIO[8]

C12

GPIO[9]

D12

GPIO[10]

A11

GPIO[11]

B11

GPIO[12]

C11

GPIO[13]

D11

GPIO[14]

A10

GPIO[15]

B10

GPIO[16]

C10

GPIO[17]

D10

GPIO[18]A9GPIO[19]B9GPIO[20]C9GPIO[21]D9GPIO[22]A8GPIO[23]B8GPIO[24]C8GPIO[25]D8GPIO[26]A7GPIO[27]B7GPIO[28]C7GPIO[29]D7GPIO[30]A6GPIO[31]

B6

TDIC6TMS

D6

TRST

A5

TDOB5TCK

C5

TEST_SE

D5

TMODE[0]A4TMODE[1]B4TMODE[2]C4TMODE[3]D4BOOT_SEL

A3

LG8300

IC700

VDD10_1

F6

VDD10_2

F13

VDD10_3

G6

VDD10_4

G7

VDD10_5

G8

VDD10_6

G9

VDD10_7

G10

VDD10_8

G11

VDD10_9

G12

VDD10_10

G13

VDD10_11

H6

VDD10_12

H13

VDD10_13

J6

VDD10_14

J13

VDD10_15

K6

VDD10_16

K13

VDD10_17

L6

VDD10_18

L7

VDD10_19

L8

VDD10_20

L9

VDD10_21

L10

VDD10_22

L11

VDD10_23

L12

VDD10_24

L13

VDD10_25

M6

VDD10_26

M13

LTX_VDD10_1

H5

LTX_VDD10_2

J5

LTX_VDD10_3

K5

LTX_VDD10_4

L5

LTX_VDD10_5

M5

VDD33_1

E5

VDD33_2

E6

VDD33_3

E7

VDD33_4

E8

VDD33_5

E9

VDD33_6

E10

VDD33_7

E11

VDD33_8

E12

VDD33_9

E13

VDD33_10

E14

VDD33_11

E15

VDD33_12

F15

VDD33_13

G15

LRX_AVDD33_1

L16

LRX_AVDD33_2

N16

LTX_AVDD33_1

E4

LTX_AVDD33_2

G4

LTX_AVDD33_3

L4

LTX_AVDD33_4

N4

LTX_AVDD33_5

J4

DDR_VREF0

T4

DDR_VREF1

R11

DDR_VREF2

V17

DDR_VDDQ_1

N7

DDR_VDDQ_2

N8

DDR_VDDQ_3

N9

DDR_VDDQ_4

N10

DDR_VDDQ_5

N11

DDR_VDDQ_6

N12

DDR_VDDQ_7

N13

DDR_VDDQ_8

N14

DDR_VDDQ_9

P6

DDR_VDDQ_10

P7

DDR_VDDQ_11

P8

DDR_VDDQ_12

P9

DDR_VDDQ_13

P10

DDR_VDDQ_14

P12

DDR_VDDQ_15

P13

DDR_VDDQ_16

P14

DDR_VDDQ_17

P15

GND_1

F5

GND_2

F7

GND_3

F8

GND_4

F9

GND_5

F10

GND_6

F11

GND_7

F12

GND_8

F14

GND_9

G5

GND_10

G14

GND_11

G16

GND_12

H7

GND_13

H8

GND_14

H9

GND_15

H10

GND_16

H11

GND_17

H12

GND_18

H14

GND_19

H15

GND_20

H16

GND_21

J7

GND_22

J8

GND_23

J9

GND_24

J10

GND_25

J11

GND_26

J12

GND_27

J14

GND_28

J15

GND_29

J16

GND_30

K7

GND_31

K8

GND_32

K9

GND_33

K10

GND_34

K11

GND_35

K12

GND_36

K14

GND_37

K15

GND_38

K16

GND_39

L14

GND_40

L15

GND_41

M7

GND_42

M8

GND_43

M9

GND_44

M10

GND_45

M11

GND_46

M12

GND_47

M14

GND_48

M15

GND_49

N5

GND_50

N6

GND_51

N15

GND_52

P5

GND_53

P11

GND_54

R4

GND_55

R14

LRX_AVSS33_1

M16

LRX_AVSS33_2

P16

LTX_AVSS33_1

F4

LTX_AVSS33_2

H4

LTX_AVSS33_3

K4

LTX_AVSS33_4

M4

LTX_AVSS33_5

P4

DDRPLL_AVSS33

C17

SYSPLL_AVSS33

D17

ADPLL_AVSS33

E16

SSPLL_AVSS33

F16

DDRPLL_AVDD33

C18

SYSPLL_AVDD33

D18

SSPLL_AVDD33

E17

ADPLL_AVDD33

E18

GND_0

A2

ZD701

5.6B

ZD702

5.6B

ZD703

5.6B

ZD704

5.6B

ZD705

5.6B

ZD706

5.6B

3D_RFMODULE_DC

3D_RFMODULE_DD

R1481

2.7K

READY

R1482

2.7K

READY

ZD707

5.6B

ZD708

5.6B

R1483 100

R1484 100

3DF

GP2R_S7R

7

L/R_DETECT

2010-08-31

LG8300_RESET

EJTAG

Serial Flash 2MBit

RF Emiiter Interface

Close to LG8300

Close to DDR2(IC701)

LGE Internal Use Only

LG 60PZ250N-ZB, 42PT450, 60PZ250A, 60PZ250N, 42PW450A Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual