PLASMA TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : PD13K
MODEL : 42PT250 42PT250-ZG
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
Internal Use Only
Printed in Korea
P/NO : MFL67289503 (1108-REV00)
- 2 -
LGE Internal Use Only Copyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
CONTENTS
CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS ...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION ..................................................................................................6
BLOCK DIAGRAM ...................................................................................................................13
EXPLODED VIEW ..................................................................................................................14
SCHEMATIC CIRCUIT DIAGRAM ..............................................................................................
- 3 -
LGE Internal Use Only Copyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in
the Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to
prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it
with the specified.
When replacing a high wattage resistor (Oxide Metal Film
Resistor, over 1W), keep the resistor 10mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Due to high vacuum and large surface area of picture tube,
extreme care should be used in handling the Picture Tube.
Do not lift the Picture tube by it's Neck.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect
an electrical jumper across the two AC plug prongs. Place the
AC switch in the on position, connect one lead of ohm-meter to
the AC plug prongs tied together and touch other ohm-meter
lead in turn to each exposed metallic parts such as antenna
terminals, phone jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ .
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC
voltage measurements for each exposed metallic part. Any
voltage measured must not exceed 0.75 volt RMS which is
corresponds to 0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrument’s
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
AC Volt-meter
IMPORTANT SAFETY NOTICE
0.15uF
- 4 -
LGE Internal Use Only Copyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
V Application Range
This spec is applied to PDP TV used PD13K Chassis.
V Specification
Each part is tested as below without special appointment.
(1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 ± 5
(2) Relative Humidity: 65 % ± 10 %
(3) Power Voltage: Standard Input voltage (100 V - 240 V ~, 50 / 60 Hz)
* Standard Voltage of each product is marked by models.
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
SBOM.
(5) The receiver must be operated for about 20 minutes prior to the adjustment.
V Test Method
(1) Performance : LGE TV test method followed.
(2) Demanded other specification
Safety : CE, IEC specification, EMC : CE, IEC
V Module Specification
(1) 2D - 42” HD
No Item Specification Remark
1 Display Screen Device 106 cm (42 inch) wide Color Display Module PDP
2 Aspect Ratio 16:9
3 PDP Module PDP42T3####,
RGB Closed (Well) Type, Glass Filter (38%)
Pixel Format: 1024 horiz. By 768 ver
4 Operating Environment 1) Temp. : 0 deg ~ 40 deg
2) Humidity : 20 % ~ 80 %
5 Storage Environment 3) Temp. : -20 deg ~ 60 deg
LGE SPEC
4) Humidity : 10 % ~ 90 %
6 Input Voltage AC 100 V ~ 240 V, 50 / 60 Hz Maker LG
Model Name
42PT250-ZG
Brand
LG
Market
Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, Czech, Denmark,
Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy,
Kazakhstan, Latvia, Lithuania, Luxembourg, Morocco, Netherlands, Norway,
Poland, Portugal, Romania, Russia, Serbia, Slovakia, Slovenia, Spain,
Sweden, Switzerland, Turkey, Ukraine, UK
Model Name
42PT250-ZG
Appliance
Safety :
IEC/EN60065
EMI : EN55013
EMS : EN55020
Market
Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, Czech, Denmark,
Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy,
Kazakhstan, Latvia, Lithuania, Luxembourg, Morocco, Netherlands,
Norway, Poland, Portugal, Romania, Russia, Serbia, Slovakia,
Slovenia, Spain, Sweden, Switzerland, Turkey, Ukraine, UK
- 5 -
LGE Internal Use Only Copyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
V Model General Specification
No Item Specification Remarks
1 Market Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, 36 Country
Czech, Denmark, Estonia, Finland, France, Germany,
Greece, Hungary, Ireland, Italy, Kazakhstan, Latvia,
Lithuania, Luxembourg, Morocco, Netherlands, Norway,
Poland, Portugal, Romania, Russia, Serbia, Slovenia,
Spain, Sweden, Slovakia, Switzerland, Turkey, Ukraine,
UK
2 Broadcasting system 1) PAL/SECAM BG EU (PAL Market)
2) PAL/SECAM DK
3) PAL Ⅰ/Ⅱ
4) SECAM L/L’
5) DVB T
6) DVB C
3 Receiving system Analog : Upper Heterodyne
Digital : COFDM
4 Scart Jack (1EA) PAL, SECAM
5 Video Input (1EA) PAL, SECAM, NTSC Side AV
6 Component Input (1EA) Y/Cb/Cr, Y/ Pb/Pr
7 RGB Input RGB-PC Analog (D-Sub 15Pin)
8 HDMI Input (4EA) HDMI-PC HDMI/DVI,HDMI2, HDMI3
HDMI-DTV
9 Audio Input (3 EA) RGB/DVI Audio, Component, AV L/R Input
10 SPDIF Out(1 EA) SPDIF Out
11 USB(1EA) For SVC, S/W Download, DivX
12 LAN For UK models
- 6 -
LGE Internal Use Only Copyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range
This spec sheet is applied to all of the PDP TV with PD13K
chassis.
2. Specification
(1) The adjustment is according to the order which is
designated and which must be followed, according to the
plan which can be changed only on agreeing.
(2) Power adjustment : Free Voltage. (100 V ~ 240 V, 50 Hz /
60 Hz.)
(3) Magnetic Field Condition: Nil.
(4) Input signal Unit: Product Specification Standard.
(5) Reserve after operation: Above 5 Minutes (Heat Run)
Temperature : at 25 °C ± 5 °C
Relative humidity 65 % ± 10 %
Input voltage : 220 V, 60 Hz.
(6) Adjustment equipments : Color Analyzer (CA-210 or CA-
110), DDC Adjustment Jig equipment, SVC remote
controller.
(7) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 °C
- In case of keeping module is in the circumstance of 0 °C,
it should be placed in the circumstance of above 15 °C
for 2 hours
- In case of keeping module is in the circumstance of below
-20 °C, it should be placed in the circumstance of above
15 °C for 3 hours,.
O After RGB Full White in HEAT-RUN Mode, the receiver
must be operated prior to the adjustment.
O Enter into HEAT-RUN MODE
1) Press the POWER ON KEY on R/C for adjustment.
2) OSD display and screen display PATTERN MODE.
- Set is activated HEAT run without signal generator in this
mode.
- Single color pattern ( WHITE ) of HEAT RUN MODE uses
to check panel.
- Caution : If you turn on a still screen more than 20
minutes (Especially digital pattern, cross hatch pattern),
an after image may be occur in the black level part of the
screen.
(8) Push The “IN STOP KEY” - For memory initialiLAtion.
Case1 : Software version up
1) After downloading S/W by USB , TV set will reboot
automatically
2) Push “In-stop” key
3) Push “Power on” key
4) Function inspection
5) After function inspection, Push “In-stop” key.
Case2 : Function check at the assembly line
1) When TV set is entering on the assembly line, Push
“In-stop” key at first.
2) Push “Power on” key for turning it on.
-> If you push “Power on” key, TV set will recover
channel information by itself.
3) After function inspection, Push “In-stop” key.
3.
Main PCB check process
* APC - After Manual-Insert, executing APC
3-1. Boot file Download
(1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
(2) Set as below, and then click “Auto Detect” and check “OK”
message
If “Error” is displayed, Check connection between computer,
jig, and set.
(3) Click “Read” tab, and then load download file (XXXX.bin)
by clicking “Read”
(4) Click “Connect” tab. If “Can’t” is displayed, Check
connection between computer, jig, and set.
(5) Click “Auto” tab and set as below.
(6) Click “Run”.
(7) After downloadng, check “OK” message.
- 7 -
LGE Internal Use Only Copyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
4. USB DOWNLOAD
(*.epk file download)
(1) Put the USB Stick to the USB socket
(2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is Low,
it didn’t work.
But your downloaded version is High, USB data is
automatically detecting
(3) Show the message “Copying files from memory”
(4) Updating is staring.
(5) Updating Completed, The TV will restart automatically.
(6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
* After downloading, have to adjust TOOL OPTION again.
(1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push “OK” button.
(3) Punch in the number. (Each of models has their number.)
(4) Completed selecting Tool option.
<LM1R>
5. ADC Process
5-1. ADC
- Enter Service Mode by pushing “ADJ”key,
- Enter Internal ADC mode by pushing “
G” key at “5. ADC
Calibration”
* Caution: Using ‘power on’ button of the Adjustment R/C , power
on TV.
* ADC Calibration Protocol (RS232)
Adjust Sequence
- aa 00 00 [Enter Adjust Mode]
- xb 00 40 [Component1 Input (480i)]
- ad 00 10 [Adjust 480i Comp1]
- xb 00 60 [RGB Input (1024*768)]
- ad 00 10 [Adjust 1024*768 RGB]
- aa 00 90 End Adjust mode
* Required equipment : Adjustment R/C.
6. Function Check
6-1. Check display and sound
- Check Input and Signal items. (cf. work instructions)
(1) TV
(2) AV (SCART1/SCART2/ CVBS)
(3) COMPONENT (480i)
(4) RGB (PC : 1024 x 768 @ 60hz)
(5) HDMI
(6) PC Audio In
* Display and Sound check is executed by Remote
controller.
* Caution : Not to push the INSTOP KEY after completion if the
function inspection.
Model Module Tool Tool Tool Tool Tool
option1 option2 option3 option4 option5
50PT35*- Z* 50T3 37312 21582 54144 27148 3104
50PT250- Z* 50T3 37376 21582 54144 27148 3104
50PT250A- Z* 50T3 37376 21582 54144 27148 3104
50PT250N- Z* 50T3 37376 21582 37760 27148 3104
42PT35*- Z* 42T3 25024 21582 54144 27148 3104
42PT250-Z* 42T3 25088 21582 54144 27148 3104
42PT450-Z* 42T3 25280 37966 54144 27148 2080
NO Item CMD 1 CMD 2 Data 0
Enter Adjust A A 0 0 When transfer the
Adjust ‘ Mode In’‘ Mode In’
Mode Carry the
command.
ADC ADC A D 1 0 Automatically
adjust Adjust adjustment
(The use of
a internal pattern)
- 8 -
LGE Internal Use Only Copyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
7. Total Assembly line process
7-1. POWER PCB Assy voltage adjustment
(Vs voltage adjustment)
O Required Equipment for adjustment
- D.M.M
O Condition for adjustment
- No signal with the snow noise in RF mode)
7-2. Adjustment Preparation
- Required Equipment
O Remote controller for adjustment
O Color Analyzer ( CS-1000, CA-100,100+,CA-210 or same
product : CH 10 (PDP)
* Please adjust CA-210, CA-100+ by CS-1000 before
measuring
O Auto W/B adjustment instrument(only for Auto adjustment)
O 9 Pin D-Sub Jack(RS232C) is connected to the AUTO W/B
EQUIPMENT.
Before Adjust of White Balance, Please press POWER ONLY
key
Adjust Process will start by execute RS232C Command.
O Color temperature standards according to CSM and Module
O CS-1000/CA-100+/CA-210(CH 10)
White balance adjustment coordinates and color temperature.
* Connecting picture of the measuring instrument (On
Automatic control)
- Inside PATTERN is used when W/B is controlled. Connect
to auto controller or push Adjustment R/C POWER-ON
->Enter the mode of White-Balance, the pattern will come
out.
* Auto-control interface and directions
(1) Adjust in the place where the influx of light like floodlight
around is blocked. (Illumination is less than 10ux).
(2) Measure and adjust after sticking the Color Analyzer (CA-
100+, CA210 ) to the side of the module.
(3) Aging time
After aging start, keep the Power on (no suspension of
power supply) and heat-run over 5 minutes
O Auto adjustment Map(RS-232C)
RS-232C COMMAND
[ CMD ID DATA ]
Wb 00 00 White Balance Start
Wb 00 ff White Balance End
* Caution
- Color Temperature : COOL, Medium, Warm.
- One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.
(when R/G/B Gain are all C0, it is the FULL Dynamic Range
of Module)
* Manual W/B process using adjusts Remote control.
(1) After enter Service Mode by pushing “ADJ” key,
(2) Enter White Balance by pushing “
G” key at “. White
Balance”
(3) Stick the sensor to the center of the screen and select
each items(Red/Green/Blue Gain) using
D/ E (CH +/-) key
on R/C.
(4) Adjust R/G/B Gain using
F/ G (VOL +/-) key on R/C.
(5) Adjust three modes all(Cool/Medium/Warm) : Fix the one
of R/G/B Gain and Change the others.
(6) When the adjustment is completed, Enter “COPY ALL”.
(7) Exit adjustment mode using EXIT key on R/C.
CSM PLASMA
Cool 11000K
Medium 9300K
Warm 6500K
CSM
Color Coordinate
Temp ±Color Coordinate
xy
Cool 0.276 0.283 11000K 0.002
Medium 0.285 0.293 9300K 0.002
Warm 0.313 0.329 6500K 0.002
RS-232C COMMAND
CENTER
[CMD ID DATA] MIN (DEFAULT) MAX
Cool Mid Warm Cool Mid Warm
R Gain jg Ja jd 00 192 192 192 192
G Gain jh Jb je 00 192 192 192 192
B Gain ji Jc jf 00 192 192 192 192
R Cut 64 64 64 128
G Cut 64 64 64 128
B Cut 64 64 64 128
- 9 -
LGE Internal Use Only Copyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
* After You finish all adjustments, Press °∞In-start°± button
and compare Tool option and Area option value with its
BOM, if it is correctly same then unplug the AC cable.
If it is not same, then correct it same with BOM and unplug
AC cable.
For correct it to the model’s module from factory JIG model.
* Push The “N STOP KEY” after completing the function
inspection. And Mechanical Power Switch must be set “ON”.
* To check the coordinates of White Balance, you have to
measure at the below conditions.
Picture mode : Vivid, Energy Saving : Off, Below the
Advanced control, Dynamic Contrast : Off, Dynamic Colour :
Off
Colour Temp.
-> Picture Mode change : Vivid ? Vivid(User)
7-3. DPM operation confirmation
(Only Apply for MNT Model)
* Check if Power LED Color and Power Consumption operate
as standard.
(1) Set Input to RGB and connect D-sub cable to set
(2) Measurement Condition: (100~240V@ 50/60Hz)
(3) Confirm DPM operation at the state of screen without
Signal
7-4. DDC EDID Write (RGB 128Byte )
-> Not used any more, Use Auto D/L
(1) Connect D-sub Signal Cable to D-Sub Jack.
(2) Write EDID DATA to EEPROM (24C02) by using DDC2B
protocol.
(3) Check whether written EDID data is correct or not.
* For SVC main Ass’y, EDID have to be downloaded to
Insert Process in advance.
7-5 DDC EDID Write (HDMI 256Byte)
-> Not used any more, Use Auto D/L
(1) Connect HDMI Signal Cable to HDMI Jack.
(2) Write EDID DATA to EEPROM(24C02) by using DDC2B
protocol.
(3) Check whether written EDID data is correct or not.
* For SVC main Ass’y, EDID have to be downloaded to
Insert Process in advance.
7-6. EDID DATA
(1) All Data : HEXA Value
(2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***:Year : Controlled
****:Check sum
7-7. EDID DATA Auto Download
(1) Press Adj. key on the Adj. R/C,
(2) Select EDID D/L menu.
(3) By pressing Enter key, EDID download will begin
(4) If Download is successful, OK is display, but If Download is
failure, NG is displayed.
(5) If Download is failure, Re-try downloads.
*Caution: Never connect HDMI & D-sub Cable when EDID
downloaded.
O Edid data and Model option download (RS232)
7-8. Manual Download
* Caution
* Use the proper signal cable for EDID Download
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
* Caution:
- Never connect HDMI & D-sub Cable at the same time.
- Use the proper cables below for EDID Writing.
- Download HDMI1, HDMI2 separately because HDMI1 is
different from HDMI2.
NO Item CMD 1 CMD 2 Data 0
Enter download A A 0 0 When transfer the
download ‘Mode In’‘ Mode In’
Mode Carry the
command.
EDID data download A E 00 10 Automatically
Model download
option (The use of
download a internal pattern)
No. Item Condition Hex Data
1 Manufacturer ID GSM 1E6D
2 Version Digital : 1 01
3 Revision Digital : 3 03
- 10 -
LGE Internal Use Only Copyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
7-9. EDID DATA
(1) 2D - HD RGB EDID data
(2) 2D - HD HDMI1 EDID data
(3) 2D - HD HDMI2 EDID data
(4) 2D - HD HDMI3 EDID data
ⓐ Vender ID
O Checksum: Changeable by total EDID data.
8. Checking the EYE-Q Operation.
(1) Press the EYE Key on the adjustment remote controller.
(2) Check the Sensor DATA ( It must be under 10) and keep
the data longer than 1.5s
(3) Check ‘OK’
(Sensor DATA 0 ~ 4095, Power Saving Mode 0 ~ 12)
* IF you press IN-STAP Button, change Green Eye-check OSD.
9. Model name & Serial number
download
9-1. Model name & Serial number D/L
(1) Press “Power on” key of service remocon.(Baud rate :
115200 bps)
(2) Connect RS232 Signal Cable to RS-232 Jack.
(3) Write Serial number by use RS-232.
(4) Must check the serial number at signal test of customer
support. (Refer to below).
- 11 -
LGE Internal Use Only Copyright ©2011 LG Electronics Inc. All rights reserved.
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9-2. Signal TABLE
CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 + ... +
Data_n
Delay : 20ms
9-3. Command Set
[Description]
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart,
0, Phase
Data write : Model Name and Serial Number write in
EEPROM,.
9-4. Method & notice
(1) Serial number D/L is using of scan equipment.
(2) Setting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0
* Manual Download (Model Name and Serial Number)
- If the TV set is downloaded By OTA or Service man,
Sometimes model name or serial number is initialized.(
Not always)
- There is impossible to download by bar code scan, so It
need Manual download.
1) Press the ‘instart’ key of ADJ remote controller.
2) Go to the menu ‘5.Model Number D/L’ like below photo.
3) Input the Factory model name or Serial number like
photo.
4) Check the model name Instart menu -> Factory name
displayed.
5) Check the Diagnostics (DTV country only) -> Buyer
model displayed.
10. Download MAC Address,
CI+ Key and widevine Key.
<Check whether the key was downloaded or not at “In Start”
menu. (Refer to below).>
-> MAC Address need only DVB-T2 Model (ex.50PZ550T-ZA).
* Connect TV SET and PC which download keys Writing
program by RS232C-Cable
(1) Start “MAC+CIKeyl.exe” Program and Click (3) Button to
connect TV and PC.
(2) Click (4) to download MAC Address.
(3) Click (5) to download CI+ Key.
(4) When download succeed, you can see “OK” on (6)
* Each Chassis has it’s own MAC Address. Please be careful
of download.
10-1. Check the method of RS232C
Command
(1) into the main ass’y mode (RS232 : aa 00 00)
(2) check the key download for transmitted command
(RS232 : ci 00 10)
(3) result value
- normally status for download : OKx
- abnormally status for download : NGx
CMD 1 CMD 2 Data 0
A A 0 0
CMD 1 CMD 2 Data 0
C 1 1 0
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LGE Internal Use Only Copyright ©2011 LG Electronics Inc. All rights reserved.
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10-2. Check the method of CI+ Key value
(RS232)
(1) into the main ass’y mode (RS232 : aa 00 00)
(2) Check the mothed of CI+ key by command
(RS232 : ci 00 20)
((3) result value
11. SW Download Guide.
※ Put a *.bin to USB Stick and Turn on TV
(1) Put the USB Stick to the USB socket
(2) Automatically detecting update file in USB Stick
* If your downloaded program version in USB Stick is Low,
it didn’t work.
But your downloaded version is High, USB data is
automatically detecting.
(3) Show the message “Copying files from memory”
(4) Updating is staring.
(5)0 Updating Completed, The TV will restart automatically.
After turn on TV, Please press ‘IN-STOP’button on ADJ
Remote-control.
※ IF you don’ t have ADJ R/C, enter ‘Factory Reset’ in
OPTION MENU.
(6) When TV turn on, check the Updated version on
Diagnostics MENU.
CMD 1 CMD 2 Data 0
C 1 2 0
CMD 1 CMD 2 Data 0
A A 0 0
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LGE Internal Use Only Copyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM
- 14 -
LGE Internal Use Only
EXPLODED VIEW
900
910
203
590
204
601
207
520
400
200
240
580
301
305
120
300
206
202
205
302
303
304
501
602
201
570
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
Full SCART
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
PSC008-02
D103 30V
READY
D104
30V
READY
D105 30V
READY
D106 30V
READY
D107
30V
READY
D108 30V
READY
30V
D109
READY
D110
30V
READY
D111 30V
READY
30V
D100
READY
30V
D101
READY
30V
D102
READY
SC1_G+/COMP1_Y+>
GND
SC1_B+/COMP1_Pb+>
GND
SC1_R+/COMP1_Pr+>
GND
EU
JK100
23
SHIELD
AV_DET
22
COM_GND
21
SYNC_IN
20
SYNC_OUT
19
SYNC_GND2
18
SYNC_GND1
17
RGB_IO
16
R_OUT
15
RGB_GND
14
R_GND
13
D2B_OUT
12
G_OUT
11
D2B_IN
10
G_GND
9
ID
8
B_OUT
7
AUDIO_L_IN
6
B_GND
5
AUDIO_GND
4
AUDIO_L_OUT
3
AUDIO_R_IN
2
AUDIO_R_OUT
1
Close to Jack
R103
0
R100
R104
75
R105
0
R101
R106
75
R102
R107
75
R108
0
0
0
0
+3.3V
R114
10K
EU
R115
SC1_R+/COMP1_Pr+>
SC1_R-/COMP1_Pr-
SC1_G+/COMP1_Y+>
SC1_G-/COMP1_Y-
SC1_B+/COMP1_Pb+>
SC1_B-/COMP1_Pb-
READY
C101
27pF
50V
READY
C100
27pF
50V
READY
C102
27pF
50V
1K
EU
SC1_G+/COMP1_Y+
SC1_G-/COMP1_Y-
SC1_B+/COMP1_Pb+
SC1_B-/COMP1_Pb-
AV/SC1_DET
SC1_R+/COMP1_Pr+
SC1_R-/COMP1_Pr-
R126
470K
R127
470K
Half SCART / COMP1 Option
+5V
C119
0.1uF
16V
READY
C121
100uF
16V
EU
B
R167
12K
EU
C
B
Q106
2SC3052
EU
E
OUT4
14
IN4-
13
R170
10K
R168
5.6K
R169
5.6K
EU
EU
EU
SCART2_Lout
SCART2_Rout
SCART1_MUTE
IN4+
12
GND
11
IN3+
10
IN3-
9
OUT3
8
R174
C
E
R171
33K
R172
R173
18K
10K
EU
33K
EU
EU
EU
Q107
2SC3052
EU
R176
470
EU
C
Q108
B
2SC3052
EU
E
R177
180
EU
D112
ENKMC2838-T112
EU
C122
27pF
50V
EU
R175
10K
EU
C123
27pF
50V
EU
B
Q109
ISA1530AC1
EU
R179
240
EU
R178
390
READY
C124
10uF
16V
EU
C125
10uF
16V
EU
R184
R186
R185
R182
C133
100uF
16V
EU
SC2/COMP1_DET
R195
75
EU
R196
470K
EU
R1102
75
EU
E
C
C
R183
330
B
EU
E
Q112
2SC3052
EU
SC2_CVBS_IN
C132
220pF
50V
READY
C134
27pF
50V
EU
SC2_VOUT
R187
R188
0
100
EU
EU
C131
1000pF
50V
READY
REC_8
SC2_ID
SC2/COMP1_L_IN
SC2/COMP1_R_IN
R189
R190
R194
R193
10K
10K
12K
12K
R19 7
2.7 K
EU
C135
1000pF
50V
READY
C136
1000pF
50V
READY
R1101
10K
EU
R199
470K
R1100
470K
MNT_L_OUT
C129
2K
EU
2K
EU
Q111
2SC3052
EU
4700pF
50V
C130
4700pF
50V
R192
R191
0
EU
0
EU
C137
1000pF
50V
C138
1000pF
50V
MNT_R_OUT
2K
EU
2K
EU
Q110
2SC3052
EU
SC1_R+/COMP1_Pr+>
SC1_B+/COMP1_Pb+>
SC1_G+/COMP1_Y+>
C117
100uF
16V
EU
R163
7.5K
EU
P_17V
R162
R161
5.6K
R160
6.8K
EU
5.6K
EU
3K
R1468
EU
EU
C118
0.1uF
16V
READY
ATV_OUT
R164
1K
EU
R165
1K
EU
AS324MTR-E1
OUT1
IN1-
IN1+
VCC
IN2+
IN2-
OUT2
B
1
2
3
4
5
6
7
C
E
IC100
DTV/MNT_VOUT
R166
12K
EU
Q105
2SC3052
EU
R154
R136
0
EU
C107
100uF
16V
EU
R130
33
EU
R128
10K
EU
R131
10K
EU
R129
EU
R132
C110
27pF
50V
EU
C111
1000pF
50V
READY
R133
12K
EU
R134
12K
EU
C108
0
4700pF
50V
C109
0
4700pF
EU
50V
R122
75
EU
R120
R123
75
470K
EU
EU
R124
75
EU
R121
R125
10K
2.7K
EU
EU
C140
1000pF
C105
1000pF
50V
C106
1000pF
50V
50V
READY
C141
1000pF
50V
READY
EU
EU
C112
220pF
50V
READY
SC1_SOG_IN
AV/SC1_CVBS_IN
SC1_VOUT
SC1_FB
SC1_ID
AV/SC1_L_IN
AV/SC1_R_IN
DTV_L_OUT
Q100
2SC3052
EU
2SC3052
R143
100
1/4W
EU
Q101
EU
DTV_R_OUT
Q102
2SC3052
EU
E
C
E
R144
B
Q103
C
ISA1530AC1
B
EU
R145
330
EU
R150
220
0
R147
R146
R148
R149
EU
R151
390
READY
C114
2K
EU
10uF
16V
2K
EU
C113
2K
10uF
EU
16V
2K
EU
EU
470
EU
R156
15K
Q104
2SC3052
EU
R153
180
EU
SC_RE2
SC_RE1
EU
B
R157
10K
EU
C
E
P_17V
50V
EU
R155
6.8K
EU
R159
15K
EU
SCART1_Lout
EU
SCART1_Rout
R158
15K
EU
C115
27pF
EU
C116
27pF
50V
EU
R1107
1K
+3.3V
R1112
10K
R1111 0
NON_EU
R1109 0
NON_EU
R1110 0
NON_EU
R1116
EU
JK101
PSC008-02
SHIELD
23
EU
0
AV_DET
COM_GND
SYNC_IN
SYNC_OUT
SYNC_GND2
SYNC_GND1
RGB_IO
R_OUT
RGB_GND
R_GND
D2B_OUT
G_OUT
D2B_IN
G_GND
ID
B_OUT
AUDIO_L_IN
B_GND
AUDIO_GND
AUDIO_L_OUT
AUDIO_R_IN
AUDIO_R_OUT
[RD]MONO
[RD]R_IN
[WH]L_IN
[RD]R
[BL]B
[GN]C_DET
[GN]G
[GN]GND
FIX-TER
R1118
R1117
0
NON_EU
0
EU
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
13
4
5
6
7
8
9
10
JK105
PPJ-230-01
NON_EU
11
D113
READY
D114
READY
D115
READY
D116
READY
D117
READY
D118 30V
READY
D119
READY
D120
READY
D122 30V
READY
D123 30V
READY
D124 30V
READY
D121 30V
30V
30V
30V
30V
30V
30V
30V
READY
CI SLOT
BUF_FE_TS_DATA[0-7]
/CI_CD1
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
CI_IORD
CI_IOWR
BUF_FE_TS_SYN
BUF_FE_TS_DATA[0]
BUF_FE_TS_DATA[1]
BUF_FE_TS_DATA[2]
BUF_FE_TS_DATA[3]
BUF_FE_TS_DATA[4]
BUF_FE_TS_DATA[5]
BUF_FE_TS_DATA[6]
BUF_FE_TS_DATA[0-7]
BUF_FE_TS_DATA[7]
PCM_RST
/PCM_WAIT
REG
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]
/CI_CD2
EU
R112 100
EU
AR100
EU
R110
EU
R111
AR103
EU
AR104 33
EU
R113
EU
EU
AR110
33
+3.3V_CI
VCC
20
2OE
19
1Y1
18
2A4
17
1Y2
16
2A3
15
1Y3
14
2A2
13
1Y4
12
2A1
11
EU
BUF_FE_TS_SYN
BUF_FE_TS_VAL_ERR
BUF_FE_TS_CLK
EU
R1104
EU
C120
0.1uF
16V
CI_ADDR[0]
PCM_A[7]
CI_ADDR[1]
PCM_A[6]
CI_ADDR[2]
PCM_A[5]
CI_ADDR[3]
PCM_A[4] /PCM_OE
+5V_CI_ON
+5V
EU
R1114
R1105
10K
10K
READY
EU
B
R1106
10K
0
EU
R1108
10K
R1115
C
Q113
2SC3052
E
EU
Q114
RSR025P03
S
G
EU
2K
EU
EU
L101
120-ohm
CI Part
D
EU
C139
R1122
0.1uF
10K
16V
READY
3.3V_CI
+3.3V
EU
C126
0.1uF
16V
EU
L100
120-ohm
CI Part
+3.3V_CI
EU
C128
0.1uF
16V
CI POWER ENABLE CONTROL
+5V_CI_ON
EU
33
33
33
33
100
EU
R118
10K
READY
R119
0
EU
R116
10K
READY
R117
C103
22uF
10V
0
EU
C104
0.1uF
16V
JK104
EAG41860102
10067972-000LF
EU
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
65
66
67
68
2
69
CI_ADDR[12]
CI_ADDR[13]
CI_ADDR[14]
REG
CI_ADDR[8]
AR105 33
PCM_D[3]
EU
R137 33
R138 33
EU
R141
AR106 33
EU
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
EU
EU
100
PCM_D[0]
PCM_D[1]
PCM_D[2]
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
R135 0
18
READY
19
20
21
22
23
24
25
26 60
27 61
28 62
29 63
30 64
31
32
33
34
G1 G2
1
CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[9]
CI_ADDR[8]
CI_ADDR[13]
CI_ADDR[14]
CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]
PCM_D[0-7]
EU
R142
10K
PCM_D[0-7]
/PCM_CE
CI_OE
CI_WE
/PCM_IRQA
BUF_FE_TS_VAL_ERR
BUF_FE_TS_CLK
CI_ADDR[0-14]
CI_ADDR[9]
CI_ADDR[10]
CI_ADDR[11]
CI_OE
CI_WE
CI_IORD
CI_IOWR
BUF_FE_TS_DATA[0-7]
+5V
EU
R198
10K
/CI_CD2
/CI_CD1
BUF_FE_TS_DATA[0]
BUF_FE_TS_DATA[1]
BUF_FE_TS_DATA[2]
BUF_FE_TS_DATA[3]
BUF_FE_TS_DATA[4]
BUF_FE_TS_DATA[5] FE_TS_DATA[5]
BUF_FE_TS_DATA[6]
BUF_FE_TS_DATA[7]
EU
R1103
10K
AR108 33
AR109 33
AR107
AR101
AR102
IC102
KIC7SZ32FU
1IN_B 5 VCC
EU
2IN_A
3GND
EU
EU
EU
33
EU
33
33
EU
+3.3V_CI
4 OUT_Y
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[6]
FE_TS_DATA[7]
PCM_A[12]
PCM_A[13]
PCM_A[14]
/PCM_REG
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[11]
/PCM_WE
/PCM_IORD
/PCM_IOWR
EU
R1119
33
FE_TS_DATA[0-7]
FE_TS_DATA[0-7]
+3.3V_CI
EU
R1120
10K
EU
R1121
33
CI_DET
PCM_A[0]
CI_ADDR[7]
PCM_A[1]
CI_ADDR[6]
PCM_A[2]
CI_ADDR[5]
PCM_A[3]
CI_ADDR[4]
FE_TS_SYN
FE_TS_VAL_ERR
FE_TS_CLK
CI_DET
/PCM_CD
IC101
TC74LCX244FT
1OE
1
1A1
2
2Y4
3
1A2
4
2Y3
5
1A3
6
2Y2
7
1A4
8
2Y1
9
GND
10
PCM_5V_CTL
CI DETECT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2R_S7R
SCART/COMP1
CI Slot
2010-08-31
1
HDMI_1
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
5V_HDMI_2
SHIELD
20
19
18
17
16
15
14
13
12
11
CK+
10
D0-
9
D0_GND
8
D0+
7
D1-
6
D1_GND
5
D1+
4
D2-
3
D2_GND
2
D2+
1
JK200
HDMI1
EAG59023302
HDMI1
IC200
AT24C02BN-SH-T
A0
1
$0.055
A1
2
A2
3
GND
4
8
7
6
5
R200 1K
R201 1.8K
D200
READY
VCC
WP
SCL
SDA
5V_DET_HDMI_2
R204
3.3K
JP200
R203 22
R202 22
Q200
2SC3052
R205 33
R206 33
5V_HDMI_2
R207
10K
R208
10K
C
E
+5V
R209
10K
R212
10K
B
DDC_SDA_2
DDC_SCL_2
CEC_REMOTE
CK-_HDMI2
CK+_HDMI2
D0-_HDMI2
D0+_HDMI2
D1-_HDMI2
D1+_HDMI2
D2-_HDMI2
D2+_HDMI2
A1CA2
ENKMC2838-T112
D205
EDID_WP
DDC_SCL_2
DDC_SDA_2
1K
1.8K
JP203
R228 22
R227 22
5V_DET_HDMI_3
R229
3.3K
R230 33
R231 33
5V_HDMI_3
R232
10K
9
8
7
6
5
4
3
2
1
IC202
$0.055
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
5V_HDMI_4
R248 1K
R249 1.8K
D212
READY
VCC
8
WP
7
SCL
6
SDA
5
SIDE_HDMI
C
R236
Q201
2SC3052
10K
B
E
DDC_SDA_3
DDC_SCL_3
CEC_REMOTE
CK-_HDMI3
CK+_HDMI3
D0-_HDMI3
D0+_HDMI3
D1-_HDMI3
D1+_HDMI3
D2-_HDMI3
D2+_HDMI3
+5V +5V
A1CA2
ENKMC2838-T112
D208
EDID_WP
R234
R233
10K
10K
DDC_SCL_3
DDC_SDA_3
HPD3
HDMI Side
BODY_SHIELD
20
19
18
17
16
15
14
13
12
11
10
JK202
EAG62611201
HDMI Side
AT24C02BN-SH-T
A0
1
A1
2
A2
3
GND
4
5V_DET_HDMI_4
R252
3.3K
JP206
R250 22
R251 22
2SC3052
R253 33
R254 33
5V_HDMI_4
R255
10K
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
5V_HDMI_3
8
7
6
5
R225
R226
D207
READY
VCC
WP
SCL
SDA
HDMI_2
SHIELD
HPD2 Q202
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JK201
HDMI2
EAG59023301
HDMI2
IC201
AT24C02BN-SH-T
A0
1
$0.055
A1
2
A2
3
GND
4
R256
10K
C
E
R257
10K
R258
10K
B
DDC_SDA_4
DDC_SCL_4
CEC_REMOTE
CK-_HDMI4
CK+_HDMI4
D0-_HDMI4
D0+_HDMI4
D1-_HDMI4
D1+_HDMI4
D2-_HDMI4
D2+_HDMI4
A1CA2
ENKMC2838-T112
D213
EDID_WP
DDC_SCL_4
DDC_SDA_4
HPD4
For CEC
CEC_REMOTE
R221
READY
S7_TXD
HDMI
+3.3V_ST
R220
56K
D218
0
30V
D219
READY
MMBD301LT1G
S
READY
R268
0
B D
G
Q203
BSS83
R269
27K
READY
CEC_REMOTE_S7
RS232C
JK203
SPG09-DB-009
1
6
2
7
3
8
4
9
5
10
D226
30V
READY
C232
220pF
50V
READY
R1434
100
R273 0
R274 0
D227
30V
READY
C233
220pF
50V
READY
R1435
100
D228
30V
READY
232C_NO6
R288 100
NON_RGB
NON_RGB
+3.3V_ST
R290
10K
R289
100
D229
30V
READY
232C_NO4
PC_SER_DATA
PC_SER_CLK
10K
R291
R295
R297 0
DOU T1
ROU T1
UART_TXD_3D
UART_RXD_3D
ROU T2
VCC
GND
RIN 1
DIN 1
DIN 2
0
IC203
MAX3232CDR
16
15
14
13
12
11
10
9
S7_RXD
PM_TXD
PM_RXD
+3.3V_ST
C1+
1
C244
0.1uF
V+
2
C241
0.1uF
C1-
3
16V
C2+
4
C242
0.1uF
C2-
5
V-
6
R1436
100
DOU T2
7
0.1uF
RIN 2
8
16V
16V
C243
16V
R1437
100
R1206
10K
READY
232C_NO4
232C_NO6
C245
0.1uF
16V
SPDIF
+5V
+5V
JK204
JST1223-001
Fib er Op tic
4
FIX_POLE
1
2
3
GND
VCC
VINPUT
0.1uF
C234
0.1uF
READY
C235
16V
R29 2
1K
READY
16V
C236
10pF
50V
R293
100
READY
IC204
NL17SZ00DFT2G
READY
VCC
NAND
GATE
Y
4
R296
100
1A5
2
3
SPDIF_OUT
B
GND
RGB PC
JK205
SPG09-DB-010
6
1
7
2
8
3
9
4
10
5
16
SHILED
GND
PC AUDIO
JK208
PEJ027-01
11
12
13
14
15
3
6A
7A
4
5
7B
6B
RED_GND
GND_2
RED
GREEN_GND
DDC_DATA
GREEN
BLUE_GND
H_SYNC
BLUE
NC
V_SYNC
GND_1
SYNC_GND
DDC_CLOCK
DDC_GND
E_SPRING
T_TERMINAL1
B_TERMINAL1
R_SPRING
T_SPRING
B_TERMINAL2
T_TERMINAL2
D201
30V
READY
D204
30V
READY
D202
30V
READY
D203
30V
READY
DSUB_R+>
DSUB_G+>
DSUB_B+>
C204
220pF
50V
READY
C203
220pF
50V
READY
C205
1000pF
50V
C206
1000pF
50V
R211
10
R210
10
+3.3V
R217
C208
220pF
50V
READY
R213
470K
R214
470K
10K
R215
10K
R216
10K
D206
30V
READY
R218
33
R219
33
C209
10pF
50V
C207
220pF
50V
READY
R222
12K
R223
COMPONENT2
R224
1K
PC_SER_DATA
PC_SER_CLK
DSUB_DET
RGB_DDC_SDA
DSUB_HSYNC
DSUB_VSYNC
RGB_DDC_SCL
DSUB_R+>
DSUB_B+>
DSUB_G+>
C210
0.1uF
16V
READY
C211
10pF
50V
RGB EDID
IC205
AT24C02BN-SH-T
PC_R_IN
PC_L_IN
12K
8
1
2
7
3
6
4
5
C214
10pF
50V
Close to Jack
R238
75
D210
30V
READY
R239
D211
30V
READY
R240
D209
30V
READY
R235
10K
EDID_WP
C215
10pF
50V
JK210
R241
0
C216
10pF
R242
0
50V
READY
R243
0
C217
10pF
R244
75
0
50V
READY
R245
0
C218
10pF
R246
75
0
50V
READY
R237
R247
10K
10K
+5V_ST
DSUB_R+
DSUB_R-
DSUB_B+
DSUB_B-
DSUB_G+
DSUB_G-
C219
0.1uF
16V
RGB_DDC_SCL
RGB_DDC_SDA
3AU04S-305-ZC-(LG)
PPJ234-02
6A
5A
4A
7B
[BL]O-SPRING
5B
[RD]E-LUG-S
7C
[RD]O-SPRING_1
5C
[RD]CONTACT_1
4C
5D
[RD]CONTACT_2
4E
[RD]O-SPRING_2
5E
[RD]E-LUG
6E
SIDE USB
JK209
USB DO WN ST REA M
5
10mm
[GN]E-LUG
[GN]O-SPRING
[GN]CONTACT
[BL]E-LUG-S
[WH]O-SPRING
D215
30V
READY
D216
30V
READY
Capacitors on VBUSA should be
placed as closd to connector as possible.
USB1_OCD
C223
C222
100uF
0.1uF
16V
1 2 3 4
16V
D214
30V
READY
COMP2_Y+>
COMP2_Pb+>
COMP2_Pr+>
R259
470K
R260
470K
D217
30V
READY
+3.3V
R264
10K
R271
COMP2_DET
READY
D220
R263
1K
30V
R270
10K
AV/COMP2_DET
R272
READY
D221
1K
30V
R265
12K
12K
+3.3V
R266
COMP2_L_IN
COMP2_R_IN
SWITCH ADDED
IC206
AP2191SG-13
NC
8
OUT_2
7
$0.11
OUT_1
6
FLG
5
R261 10K
C224
1000pF
50V
R26210K
C225
1000pF
50V
R267
10K R277
33
SIDE_USB_DM
SIDE_USB_DP
COMP2_Pr+>
COMP2_Y+>
COMP2_Pb+>
GND
1
IN_1
2
IN_2
3
EN
4
+3.3V
D223
30V
READY
D224
30V
READY
D225
30V
READY
10K
READY
R278
Close to Jack
R279
75
C228
10pF
50V
READY
R280
75
C229
10pF
READY
R281
75
C230
10pF
50V
READY
USB1_CTL
33
R282
COMP2_Pr+
0
COMP2_Pr-
R283
0
R284
COMP2_Y+
0
50V
R286
R287
R285
COMP2_Y-
0
COMP2_Pb+
0
COMP2_Pb-
0
+5V
SIDE CVBS
JK207
PPJ235-01
5A
[YL]E-LUG
4A
[YL]O-SPRING
3A
[YL]CONTACT
4B
[WH]O-SPRING
3C
[RD]CONTACT
4C
[RD]O-SPRING
5C
[RD]E-LUG
R294
10K
D230
30V
READY
D231
30V
READY
D232
30V
READY
D233
30V
READY
+3.3V
C237
0.1uF
16V
R1200
R298
470K
R299
470K
R1203
1K
C240
27pF
75
50V
R1201
10K
C239
1000pF
50V
R1202
10K
C238
1000pF
50V
R1204
12K
R1205
12K
SIDEAV_DET
SIDEAV_CVBS_IN
SIDEAV_L_IN
SIDEAV_R_IN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2R_S7R
HDMI/RGB/RS232C/USB
COMP2/Side CVBS/SPDIF
2010-08-31
2
19
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
SHIELD
TU300
TDTJ-S001D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
ANT_PWR[OPT]
BST_CNTL
+B
NC[RF_AGC]
AS
SCL
SDA
NC[IF_TP]
SIF
NC
VIDEO
GND
1.2V
3.3V
RESET
IF_AGC_CNTL
(Should be guarded by GND)
DIF_1
DIF_2
R313 22
R314 22
C301
0.1uF
16V
C300
0.1uF
16V
+1.26V_TU
C302
0.1uF
16V
+5V_TU
C304
0.1uF
16V
+3.3V_TU
Close to Tuner
+3.3V_TU
C307
22uF
10V
R326
R319
1.2K
1.2K
C305
C306
10pF
10pF
50V
50V
READY
READY
R334 100
IF_AGC_MAIN
IF_N_MSTAR
IF_P_MSTAR
- Should be guarded by GND
- No Via
- Width(Signal) : min 12mm
GND(Signal) : min 24mm
TU_SCL
TU_SDA
+3.3V_TU
10K
R335
C308
0.1uF
16V
TUNER_RESET
R338
4.7K
H-NIM Tuner
+5V_TU
R341
470
R344
82
ISA1530AC1
Q300
R343
0
READY
B
R342
0
READY
+5V_TU
R345
200
E
Q301
ISA1530AC1
C
+5V_TU
R346
200
EU
ISA1530AC1
Q302
EU
TU_SIF
R349
200
R348
200
EU
TU_CVBS
ATV_OUT
+3.3V
AMP_MUTE
AMP_RESET_N
R359 2K
AMP_SDA
R360 2K
AMP_SCL
R367
10K
READY
AC_DET
R365
2.2
R366
0
AUD_MASTER_CLK
AUD_SCK
AUD_LRCK
AUD_LRCH
C327
0.1uF
16V
R370
READY
B
READY
C329
10K
R371
READY
READY
READY
0.1uF
Audio AMP
R373
0
C
READY
C331
E
0.1uF
Q303
2SC3052
READY
50V
EAPD/OUT4B
R374
TWARN/OUT4A
0
VDD_DIG_1
GND_DIG_1
R375
22
C332
0.1uF
50V
C333
680pF
50V
22
22
22
22
R315
22
R316
22
22
VDD_PLL
FILTER_PLL
GND_PLL
R376
R377
R378
R379
R380
INT_LINE
GND_DIG_2
VDD_DIG_2
[EP]GND
2K
C328
4700pF
50V
C355
22pF
50V
C356
22pF
50V
C357
22pF
50V
C358
22pF
50V
R372
10K
50V
PWRDN
XTI
BICKI
LRCKI
SDI
RESET
SDA
SCL
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
@compC
Close-by
THERMA L
37
Close-by
STA368BWG
IC303
Close-by
Close-by
18
OUT3A/FFX3A
17
OUT3B/FFX3B
16
CONFIG
15
VDD
14
GND_REG
13
OUT1A
12
GND1
11
VCC1
10
OUT1B
9
OUT2A
8
VCC2
7
GND2
6
OUT2B
5
VCC_REG
4
VSS
3
TEST_MODE
2
SA
1
GND_SUB
C335
0.1uF
50V
C336
C337 0.1uF 50V
C338 1uF 25V
C339 0.1uF 50V
P_17V
C334
0.1uF
50V
1uF 25V
0.1uF
50V
C340
R381
C342
330pF
C343
330pF
R382
L302
10.0uH
20
50V
50V
L303
10.0uH
L304
10.0uH
20
L305
10.0uH
C341
C344
68uF
68uF
35V
35V
READY
C345
0.22uF
50V
C346
0.22uF
50V
C347
0.22uF
50V
C348
0.22uF
50V
C349
0.22uF
50V
C350
0.22uF
50V
C351
1000pF
50V
C352
1000pF
50V
C353
1000pF
50V
C354
1000pF
50V
4
3
P301
2
1
SMAW250-H04R
FHD
P703
104060-8017
123456789
HD
P701
TF05-51S
UART_RXD
UART_TXD
0
0
R842
R849
1234567
UART_RXD
UART_TXD
0
0
R836
R835
TD4P
TCLK4N
TCLK4P
TD4N
TC4P
TE4N
TE4P
9
8
10111213141516171819202122
DISP_EN
TA1P
TA1N
SDA_3.3V_MOD
SDA_3.3V_MOD
TD2N
TE2N
TD2P
TE2P
1011121314151617181920212223242526272829303132333435363738394041424344454647484950
TB4P
TC4N
TA4P
TA4N
TB4N
TCLK2P
TCLK2N
TD3P
TE3N
TE3P
TD3N
TCLK3P
TCLK3N
23242526272829303132333435
TB2N
TA2N
TA2P
TC2N
TB2P
TE2P
TB3N
TA3N
TA3P
TB3P
373839404142434445464748495051
36
TC3P
TC2P
TC3N
TE2N
TD2P
TD2N
TE1P
TCLK2P
TE1N
TCLK2N
TCLK1P
TD1P
TC2P
TCLK1N
TD1N
TB2N
TC2N
TB2P
TA2P
TA2N
52535455565758596061626364
TE1P
TC1P
TE1N
TC1N
TD1P
TD1N
TB1P
TA1P
TB1N
TA1N
TCLK1N
TC1P
TB1P
TCLK1P
TC1N
TB1N
66676869707172737475767778
65
PC_SER_CLK
SCL_3.3V_MOD
PC_SER_DATA
PC_SER_CLK
DISP_EN
SCL_3.3V_MOD
PC_SER_DATA
80
79
Key/IR LVDS
+3.3V
R809
R807
R781
2.2K
P_SDA
R780
2.2K
51
52
LVDS_DATA_2_E+
LVDS_DATA_2_E-
LVDS_DATA_2_D+
LVDS_DATA_2_D-
LVDS_CLK_2+
LVDS_CLK_2-
LVDS_DATA_2_C+
LVDS_DATA_2_C-
LVDS_DATA_2_B+
LVDS_DATA_2_B-
LVDS_DATA_2_A+
LVDS_DATA_2_A-
LVDS_DATA_1_E+
LVDS_DATA_1_E-
LVDS_DATA_1_D+
LVDS_DATA_1_D-
LVDS_CLK_1+
LVDS_CLK_1-
LVDS_DATA_1_C+
LVDS_DATA_1_C-
LVDS_DATA_1_B+
81
LVDS_DATA_1_BLVDS_DATA_1_A+
LVDS_DATA_1_A-
P_SCL
R794
R795
R796
R797
R798
R799
R800
R801
R802
R803
R804
R805
R782
R783
R784
R785
R786
R787
R788
R789
R790
R791
R792
R793
0
S
2N7002(F)
+3.3V
R806
0
S
Q700
2N7002(F)
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
Q701
4.7K
G
SDA_3.3V_MOD
D
R808
4.7K
G
SCL_3.3V_MOD
D
2D
0
R822
R823
R824
R825
R826
R827
R828
R829
R830
R831
R832
R833
R810
R811
R812
R813
R814
R815
R816
R817
R818
R819
R820
R821
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
2D
0
TE2P
TE2N
TD2P
TD2N
TCLK2P
TCLK2N
TC2P
TC2N
TB2P
TB2N
TA2P
TA2N
TE1P
TE1N
TD1P
TD1N
TCLK1P
TCLK1N
TC1P
TC1N
TB1P
TB1N
TA1P
TA1N
KEY1
KEY2
LED_RED
SUB_SCL
SUB_SDA
TOUCH_VER_CHK
IR
+3.3V_ST
R632
+3.3V_ST
R633
R635
4.7K
4.7K
R634
R628
10K
10K
10K
C
R629
4.7K
Q602
B
2SC3052
E
+3.3V_ST
R630
22
R631
22
C645
10pF
READY
C646
0.1uF
16V
R639
C648
10K
10pF
ZD601
5.6B
C649
10pF
READY
P602
12507WS-15L
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2R_S7R
Tuner/Audio Amp
LVDS / Key-IR
2010-08-31
3
VIDEO/AUDIO
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE101DC-R [S7R DIVX/MS10]
F1
A_RXCP
F2
A_RXCN
G2
A_RX0P
G3
A_RX0N
H3
A_RX1P
G1
A_RX1N
H1
A_RX2P
H2
A_RX2N
F5
3D_RFMODULE_DD
3D_RFMODULE_DC
PCM_5V_CTL
CK+_HDMI2
CK-_HDMI2
D0+_HDMI2
D0-_HDMI2
D1+_HDMI2
D1-_HDMI2
D2+_HDMI2
D2-_HDMI2
DDC_SDA_2
DDC_SCL_2
HPD2
CK+_HDMI4
CK-_HDMI4
D0+_HDMI4
D0-_HDMI4
D1+_HDMI4
D1-_HDMI4
D2+_HDMI4
D2-_HDMI4
DDC_SDA_4
DDC_SCL_4
HPD4
CK+_HDMI3
CK-_HDMI3
D0+_HDMI3
D0-_HDMI3
D1+_HDMI3
D1-_HDMI3
D2+_HDMI3
D2-_HDMI3
DDC_SDA_3
DDC_SCL_3
HPD3
CEC_REMOTE_S7
DSUB_HSYNC
DSUB_VSYNC
DSUB_R+
DSUB_R-
DSUB_G+
DSUB_G-
DSUB_B+
DSUB_B-
SC1_ID
SC1_FB
SC1_R+/COMP1_Pr+
SC1_R-/COMP1_Pr-
SC1_G+/COMP1_Y+
SC1_G-/COMP1_YSC1_B+/COMP1_Pb+
SC1_B-/COMP1_Pb-
SC1_SOG_IN
COMP2_Pr+
COMP2_Pr-
COMP2_Y+
COMP2_YCOMP2_Pb+
COMP2_Pb-
TU_CVBS
AV/SC1_CVBS_IN
COMP2_Y+
SIDEAV_CVBS_IN
SC2_CVBS_IN
DTV/MNT_VOUT
MODEL OPTION
PIN NAME
MODEL_OPT_3
R400
10K
C400
1000pF
READY
PIN NO.
R402 22
R403 22
R404 33 C439 2.2uF
C401 0.047uF
C402 0.047uF
R405 68
R406 33
C403 0.047uF
C404 0.047uF
R407 68
R408 33
C405 0.047uF
R409 68
C406 0.047uF
R410 0
R411 33
R412 68
R413
R414
R415 33
R416 68
R417 0
NON_EU
R418 33
R419 68
R420
R421
R422 33
R423 68
R424 0
R425 33
R426 33
R427 33
R428 33
R429 33
R430 33
R431 33
R432 68
HIGH
FHD
C407 1000pF
C408 0.047uF
C409 0.047uF
C410
33
C411
68
C412
C413
C414 1000pF
C415 0.047uF
C416 0.047uF
C417 0.047uF
33
68
C418 0.047uF
C419 0.047uF
C420 0.047uF
C421 1000pF
C422 0.047uF
C423 0.047uF
C424 0.047uF
C425 0.047uF
C426 0.047uF
C427 0.047uF
C428 0.047uF
C429 0.047uF
LOW
HD B6
0.047uF
0.047uF
0.047uF
0.047uF
R401
10K
+3.3V_AVDD
R451 1K
MODEL_OPT_3
READY
R452 1K
<T3 CHIP Config(AUD_LRCH)>
Boot from SPI flash : 1’b0
Boot from NOR flash : 1’b1
<T3 CHIP Config>
(AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)
MIPS_no_EJ_NOR8 : 4’h3 (MIPS as host. No EJ PAD. Byte mode NAND flash.)
MIPS_EJ1_NOR8 : 4’h4 (MIPS as host. EJ use PAD1. Byte mode NAND flash.)
MIPS_EJ2_NOR8 : 4’h5 (MIPS as host. EJ use PAD2. Byte mode NAND flash.)
B51_Secure_no scramble : 4’hb (8051 as host. Internal SPI flash secure boot, no scramble)
B51_Sesure_scramble : 4’hc (8051 as host. Internal SPI flash secure boot with scarmble)
DDCDA_DA/GPIO24
F4
DDCDA_CK/GPIO23
E6
HOTPLUGA/GPIO19
D3
B_RXCP
C1
B_RXCN
D1
B_RX0P
D2
B_RX0N
E2
B_RX1P
E3
B_RX1N
F3
B_RX2P
E1
B_RX2N
D4
DDCDB_DA/GPIO26
E4
DDCDB_CK/GPIO25
D5
HOTPLUGB/GPIO20
AA2
C_RXCP
AA1
C_RXCN
AB1
C_RX0P
AA3
C_RX0N
AB3
C_RX1P
AB2
C_RX1N
AC2
C_RX2P
AC1
C_RX2N
AB4
DDCDC_DA/GPIO28
AA4
DDCDC_CK/GPIO27
AC3
HOTPLUGC/GPIO21
A2
D_RXCP
A3
D_RXCN
B3
D_RX0P
A1
D_RX0N
B1
D_RX1P
B2
D_RX1N
C2
D_RX2P
C3
D_RX2N
B4
DDCDD_DA/GPIO30
C4
DDCDD_CK/GPIO29
E5
HOTPLUGD/GPIO22
D6
CEC/GPIO5
G5
HSYNC0
G6
VSYNC0
K1
RIN0P
L3
RIN0M
K3
GIN0P
K2
GIN0M
J3
BIN0P
J2
BIN0M
J1
SOGIN0
G4
HSYNC1
H6
VSYNC1
K5
RIN1P
K4
RIN1M
J4
GIN1P
K6
GIN1M
H4
BIN1P
J6
BIN1M
J5
SOGIN1
H5
HSYNC2
N3
RIN2P
N2
RIN2M
M2
GIN2P
M1
GIN2M
L2
BIN2P
L1
BIN2M
M3
SOGIN2
N4
CVBS0P
N6
CVBS1P
L4
CVBS2P
L5
CVBS3P
L6
CVBS4P
M4
CVBS5P
M5
CVBS6P
K7
CVBS7P
M6
CVBS_OUT1
M7
CVBS_OUT2
N5
VCOM0
SOC_RESET
4.7uF
C465
10V
D400
KDS181
+3.3V_ST
IC400
TMUE312GAB
R433
62K
TGPIO2/I2C_CLK
TGPIO3/I2C_SDA
SPDIF_IN/GPIO177
SPDIF_OUT/GPIO178
I2S_IN_BCK/GPIO175
I2S_IN_SD/GPIO176
I2S_IN_WS/GPIO174
I2S_OUT_BCK/GPIO181
I2S_OUT_MCK/GPIO179
I2S_OUT_SD/GPIO182
I2S_OUT_SD1/GPIO183
I2S_OUT_SD2/GPIO184
I2S_OUT_SD3/GPIO185
I2S_OUT_WS/GPIO180
READY
SW400
4 3
5
READY
R435
1 2
100
R434
10
C466
0.1uF
SSIF/SIFP
SSIF/SIFM
IFAGC
RF_TAGC
TGPIO0/UPGAIN
TGPIO1/DNGAIN
XTALIN
XTALOUT
DM_P0
DP_P0
DM_P1
DP_P1
LINE_IN_0L
LINE_IN_0R
LINE_IN_1L
LINE_IN_1R
LINE_IN_2L
LINE_IN_2R
LINE_IN_3L
LINE_IN_3R
LINE_IN_4L
LINE_IN_4R
LINE_IN_5L
LINE_IN_5R
LINE_OUT_0L
LINE_OUT_2L
LINE_OUT_3L
LINE_OUT_0R
LINE_OUT_2R
LINE_OUT_3R
MIC_DET_IN
MICCM
MICIN
AUCOM
HP_OUT_1L
HP_OUT_1R
ET_RXD0
ET_TXD0
ET_RXD1
ET_TXD1
ET_REFCLK
ET_TX_EN
ET_MDC
ET_MDIO
ET_CRS
AVLINK
IRINT
TESTPIN
RESET
NC_16
VIFP
VIFM
IP
IM
QP
QM
VRM
VAG
VRP
W2
W1
V2
V1
Y2
Y1
U3
V3
Y5
Y4
U1
U2
R3
T3
T2
T1
G14
G13
B7
A7
AF17
AE17
F14
F13
F15
D20
E20
D19
F18
E18
D18
E19
N1
P3
P1
P2
P4
P5
R6
T6
U5
V5
U6
V6
U4
W3
W4
V4
Y3
W5
R4
T5
R5
T4
P7
R7
P6
C434
R1
4.7uF
R2
E21
E22
D21
F21
E23
D22
F22
D23
F23
R4411KR1476
F8
G8
K8
A4
Y17
R447
R443
1K
READY
R448
R444
1K
R459100
R474100
R475100
R495100
SOC_RESET
+3.3V_AVDD
R449
1K
1K
READY
READY
R450
1K
1K
R463 1K
R462 10K
C447
0.01uF
50V
R464 100
R465 100
C430 0.1uF
C431
0.1uF
X400
R458
24MHz
1M
C435 2.2uF
C436
C437 2.2uF
C438
C440
C441
C442 2.2uF
C443 2.2uF
C444 2.2uF
C445
C446
R439 22K
C432 0.01uF
C448
C454
1uF
0.1uF
3D
R466 22
3D
R438
3D
R467
R440
1K
R460
1K
R453
1K
READY
READY
R461
R454
1K
1K
C464
0.01uF
50V
C452 0.1uF
C453 0.1uF
R472 47
R473 47
R477 0
R478 0
C450 27pF
C451 27pF
R1408 22
R476 100
R1401 22
2.2uF
2.2uF
2.2uF
2.2uF
2.2uF
2.2uF
R442 22K
C455
10uF
22
22
100
READY
READY
R455 22K
C433 0.01uF
AUD_LRCH
AUD_SCK
AUD_MASTER_CLK
PWM1
PWM0
C449
0.1uF
R457 22K
C467 0.01uF
120-ohm
IF_AGC_MAIN
IF_P_MSTAR
IF_N_MSTAR
AMP_SCL
AMP_SDA
DEMOD_SCL
DEMOD_SDA
TU_SCL
TU_SDA
P_SDA
SPDIF_OUT
SIDE_USB_DM
SIDE_USB_DP
SUB_SDA
P_SCL
SUB_SCL
AUD_SCK
AUD_MASTER_CLK
AUD_LRCH
MODEL_OPT_3
USB1_OCD
USB1_CTL
AUD_LRCK
AV/SC1_L_IN
AV/SC1_R_IN
SC2/COMP1_L_IN
SC2/COMP1_R_IN
SIDEAV_L_IN
SIDEAV_R_IN
COMP2_L_IN
COMP2_R_IN
PC_L_IN
PC_R_IN
SCART1_Lout
SCART2_Lout
SCART1_Rout
SCART2_Rout
C4680.01uF
+3.3V_AVDD
READY
R470
3.3K
SC_RE1
IR
SOC_RESET
L400
+3.3V_AVDD
Main
C456
1000pF
READY
+3.3V_AVDD
R1411
3.3K
READY
R469
3.3K
3D_RF_GPIO1
LG8300_RESET
DSUB_DET
COMP2_DET
SCART1_MUTE
3D_RF_GPIO2
DISP_EN
AMP_RESET_N
TU_SIF
Close to MStar
R1412
3.3K
/PCM_IRQA
/PCM_WAIT
I2C_SDA
I2C_SCL
LVDS
+5V
R481
10K
C457
0.1uF
READY
+3.3V_AVDD
R480
2.2K
LGE101DC-R [S7R DIVX/MS10]
AE1
NC_48
AF16
NC_78
AF1
NC_64
AE3
NC_50
AD14
NC_45
AD3
NC_34
AF15
NC_77
AF2
NC_65
AE15
NC_62
AD2
NC_33
AD16
NC_47
AD15
NC_46
AE16
NC_63
AF3
NC_66
AF14
NC_76
AD1
NC_32
AD13
NC_44
AE14
NC_61
AE13
NC_60
AE4
NC_51
AD5
NC_36
AF4
NC_67
AD4
NC_35
AE2
NC_49
AF8
NC_71
AD9
NC_40
AE9
NC_56
AF9
NC_72
AE11
NC_58
AF6
NC_69
AE6
NC_53
AF11
NC_74
AD6
NC_37
AD12
NC_43
AE5
NC_52
AF12
NC_75
AF5
NC_68
AE12
NC_59
AE10
NC_57
AF7
NC_70
AD11
NC_42
AD7
NC_38
AD10
NC_41
AE7
NC_54
AF10
NC_73
AD8
NC_39
AE8
NC_55
Y11
NC_12
Y19
GND_105
PCM_D[0-7]
PCM_A[0-14]
/PCM_IORD
/PCM_IOWR
R479
10K
C458
0.1uF
R482
2.2K
RGB_DDC_SDA
RGB_DDC_SCL
AV/COMP2_DET
TOUCH_VER_CHK
IC400
/PCM_REG
/PCM_OE
/PCM_WE
/PCM_CE
/PCM_CD
PCM_RST
/PF_CE0
/PF_CE1
/PF_OE
/PF_WE
PF_ALE
/PF_WP
/F_RB
S7_TXD
S7_RXD
PWM0
PWM1
SC_RE2
KEY1
KEY2
SC2_ID
AMP_MUTE
LVACLKP/LLV6P/BLUE[3]
LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BLUE[1]
LVA3N/LLV7N/BLUE[0]
LVA4P/LLV8P
LVA4N/LLV8N
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
RLV3P/RED[7]
RLV3N/RED[6]
RLV0P/LVSYNC
RLV0N/LHSYNC
RLV2P/RED[9]
RLV2N/RED[8]
RLV4P/RED[5]
RLV4N/RED[4]
RLV5P/RED[3]
RLV5N/RED[2]
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
TCON13/LEDON
TCON17/CS6/GCLK4
RLV1N/LCK
RLV1P/LDE
TCON12/DPM
NC_26
NC_19
NC_30
NC_15
NC_31
NC_29
NC_21
NC_20
NC_11
NC_17
NC_25
NC_24
PCM_D[0]
PCM_D[1]
PCM_D[2]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[3]
PCM_A[4]
PCM_A[5]
PCM_A[6]
PCM_A[7]
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[11]
PCM_A[12]
PCM_A[13]
PCM_A[14]
AR401
22
AR400
22
R483 22
R484 22
R485 22
R486 22
R487 22
R488 22
W26
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AD23
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22
AF22
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
AB22
AB23
AC23
AC22
AB16
AA14
AC15
Y16
AC16
AC14
AA16
AA15
Y10
AA11
AB15
AB14
LGE101DC-R [S7R DIVX/MS10]
U22
PCM_D0
T21
PCM_D1
T22
PCM_D2
AB18
PCM_D3
AC18
PCM_D4
AC19
PCM_D5
AC20
PCM_D6
AC21
PCM_D7
U21
PCM_A0
V21
PCM_A1
Y22
PCM_A2
AA22
PCM_A3
R22
PCM_A4
R21
PCM_A5
T23
PCM_A6
T24
PCM_A7
AA23
PCM_A8
Y20
PCM_A9
AB17
PCM_A10
AA21
PCM_A11
U23
PCM_A12
Y23
PCM_A13
W23
PCM_A14
W22
PCM_REG_N
AA17
PCM_OE_N
V22
PCM_WE_N
W21
PCM_IORD_N
Y21
PCM_IOWR_N
AA20
PCM_CE_N
V23
PCM_IRQA_N
P23
PCM_CD_N
R23
PCM_WAIT_N
P22
PCM_RESET
AC17
PCM_PF_CE0Z
AB20
PCM_PF_CE1Z
AA18
PCM_PF_OEZ
AB21
PCM_PF_WEZ
AB19
PCM_PF_ALE
AD17
PCM_PF_AD[15]
AA19
PCM_PF_RBZ
M23
UART_TX2/GPIO65
N23
UART_RX2/GPIO64
M22
DDCR_DA/GPIO71
N22
DDCR_CK/GPIO72
A5
DDCA_DA/UART0_TX
B5
DDCA_CK/UART0_RX
K23
PWM0/GPIO66
K22
PWM1/GPIO67
G23
PWM2/GPIO68
G22
PWM3/GPIO69
G21
PWM4/GPIO70
C6
SAR0/GPIO31
B6
SAR1/GPIO32
C8
SAR2/GPIO33
C7
SAR3/GPIO34
A6
SAR4/GPIO35
LVDS_CLK_1LVDS_CLK_1+
LVDS_DATA_1_ALVDS_DATA_1_A+
LVDS_DATA_1_BLVDS_DATA_1_B+
LVDS_DATA_1_CLVDS_DATA_1_C+
LVDS_DATA_1_DLVDS_DATA_1_D+
LVDS_DATA_1_ELVDS_DATA_1_E+
LVDS_CLK_2LVDS_CLK_2+
LVDS_DATA_2_ALVDS_DATA_2_A+
LVDS_DATA_2_BLVDS_DATA_2_B+
LVDS_DATA_2_CLVDS_DATA_2_C+
LVDS_DATA_2_DLVDS_DATA_2_D+
LVDS_DATA_2_ELVDS_DATA_2_E+
IC400
TCON2/GSP_R/GCLK1
TCON4/CPV/GSC/GCLK3
TCON8/CS2/FLK3
GPIO36/UART3_RX
GPIO37/UART3_TX
GPIO50/UART1_RX
GPIO51/UART1_TX
GPIO6/PM0/INT0
GPIO7/PM1/PM_UART_TX
GPIO11/PM5/PM_UART_RX/INT1
PM_SPI_CS1/GPIO12/PM6
PM_SPI_WP1/GPIO13/PM7
PM_SPI_WP2/GPIO14/PM8/INT2
PM_SPI_CS2/GPIO16/PM10
GPIO17/PM11/INT3
GPIO18/PM12/INT4
PM_SPI_CK/GPIO1
GPIO0/PM_SPI_CZ
PM_SPI_DI/GPIO2
PM_SPI_DO/GPIO3
DDR
A-TMA0
A-TMA1
A-TMA2
A-TMA3
A-TMA4
A-TMA5
A-TMA6
A-TMA7
A-TMA8
A-TMA9
A-TMA10
A-TMA11
A-TMA12
A-TMA13
A-TMBA0
A-TMBA1
A-TMBA2
A-TMCK
A-TMCKB
A-TMCKE
A-TMODT
A-TMRASB
A-TMCASB
A-TMWEB
A-TMRESETB
A-TMDQSL
A-TMDQSLB
A-TMDQSU
A-TMDQSUB
A-TMDML
A-TMDMU
A-TMDQL0
A-TMDQL1
A-TMDQL2
A-TMDQL3
A-TMDQL4
A-TMDQL5
A-TMDQL6
A-TMDQL7
A-TMDQU0
A-TMDQU1
A-TMDQU2
A-TMDQU3
A-TMDQU4
A-TMDQU5
A-TMDQU6
A-TMDQU7
CLose to Saturn7M IC
VCC_1.5V_DDR
R489
1K 1%
R490
1K 1%
N21
TCON0/POL
M21
L22
L21
TCON6/FLK
P21
K21
L23
K20
GPIO38
L20
GPIO39
M20
GPIO40
G20
GPIO41
G19
GPIO42
F20
F19
E7
D7
E11
GPIO8/PM2
G9
GPIO9/PM3
F9
GPIO10/PM4
C5
E8
E9
F7
F6
GPIO15/PM9
D8
G12
F10
D9
D11
E10
D10
AA9
TS0_CLK
AA5
TS0_VLD
AA10
TS0_SYNC
AB5
TS0_D0
AC4
TS0_D1
Y6
TS0_D2
AA6
TS0_D3
W6
TS0_D4
AA7
TS0_D5
Y9
TS0_D6
AA8
TS0_D7
AC5
TS1_CLK
AC6
TS1_VLD
AB6
TS1_SYNC
AC10
TS1_D0
AB10
TS1_D1
AC9
TS1_D2
AB9
TS1_D3
AC8
TS1_D4
AB8
TS1_D5
AC7
TS1_D6
AB7
TS1_D7
D12
MPIF_CLK
D14
MPIF_CS_N
E14
MPIF_BUSY
E12
MPIF_D0
F12
MPIF_D1
D13
MPIF_D2
E13
MPIF_D3
LGE101DC-R [S7R DIVX/MS10]
B8
A_DDR3_A0/DDR2_A13
B9
A_DDR3_A1/DDR2_A8
A8
A_DDR3_A2/DDR2_A9
C21
A_DDR3_A3/DDR2_A1
B10
A_DDR3_A4/DDR2_A2
A22
A_DDR3_A5/DDR2_A10
A10
A_DDR3_A6/DDR2_A4
B22
A_DDR3_A7/DDR2_A3
C9
A_DDR3_A8/DDR2_A6
C23
A_DDR3_A9/DDR2_A12
B11
A_DDR3_A10/DDR2_RASZ
A9
A_DDR3_A11/DDR2_A11
C10
A_DDR3_A12/DDR2_A0
B23
A_DDR3_A13/DDR2_A7
B21
A_DDR3_BA0/DDR2_BA2
A11
A_DDR3_BA1/DDR2_CASZ
A23
A_DDR3_BA2/DDR2_A5
A12
A_DDR3_MCLK/DDR2_MCLK
C11
A_DDR3_MCLKZ/DDR2_MCLKZ
B12
A_DDR3_CKE/DDR2_DQ5
C20
A_DDR3_ODT/DDR2_ODT
A20
A_DDR3_RASZ/DDR2_WEZ
B20
A_DDR3_CASZ/DDR2_BA1
A21
A_DDR3_WEZ/DDR2_BA0
C22
A_DDR3_RESETB
C16
A_DDR3_DQSL/DDR2_DQS0
B16
A_DDR3_DQSLB/DDR2_DQSB0
A16
A_DDR3_DQSU/DDR2_DQSB1
C15
A_DDR3_DQSUB/DDR2_DQS1
A14
A_DDR3_DML//DDR2_DQ13
B18
A_DDR3_DMU/DDR2_DQ6
C18
A_DDR3_DQL0/DDR2_DQ3
B13
A_DDR3_DQL1/DDR2_DQ7
A19
A_DDR3_DQL2/DDR2_DQ1
C13
A_DDR3_DQL3/DDR2_DQ10
C19
A_DDR3_DQL4/DDR2_DQ4
A13
A_DDR3_DQL5/DDR2_DQ0
B19
A_DDR3_DQL6/DDR2_CKE
C12
A_DDR3_DQL7/DDR2_DQ2
A15
A_DDR3_DQU0/DDR2_DQ15
A17
A_DDR3_DQU1/DDR2_DQ9
B14
A_DDR3_DQU2/DDR2_DQ8
C17
A_DDR3_DQU3/DDR2_DQ11
B15
A_DDR3_DQU4/DDR2_DQM1
A18
A_DDR3_DQU5/DDR2_DQ12
C14
A_DDR3_DQU6/DDR2_DQM0
B17
A_DDR3_DQU7/DDR2_DQ14
0.1uF
1000pF
C460
C459
R446
R492
R493
R494 22
R436 100
R496 33
R437 10K
R468 22
R456 0
R445 0
R497 33
R498 33
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
R491 1K
A-MVREFCA
0
0
22
3D
READY
READY
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
FE_TS_CLK
FE_TS_VAL_ERR
FE_TS_SYN
IC400
B_DDR3_MCLKZ/DDR2_MCLKZ
B_DDR3_DQSLB/DDR2_DQSB0
B_DDR3_DQSU/DDR2_DQSB1
B_DDR3_DQSUB/DDR2_DQS1
5V_DET_HDMI_2
5V_DET_HDMI_4
5V_DET_HDMI_3
SIDEAV_DET
3D_RF_RXD
3D_RF_TXD
3D_RFMODULE_RESET
SC2/COMP1_DET
AV/SC1_DET
ERROR_DET
TUNER_RESET
UART_RXD
UART_TXD
+3.3V_AVDD
AC_DET
READY
PM_TXD
R471
3.3K
LED_RED
5V_ON
RL_ON
PM_RXD
/SPI_CS
/FLASH_WP
B
3D_RF_GPIO0
SPI_SCK
SPI_SDI
SPI_SDO
B_DDR3_A0/DDR2_A13
B_DDR3_A1/DDR2_A8
B_DDR3_A2/DDR2_A9
B_DDR3_A3/DDR2_A1
B_DDR3_A4/DDR2_A2
B_DDR3_A5/DDR2_A10
B_DDR3_A6/DDR2_A4
B_DDR3_A7/DDR2_A3
B_DDR3_A8/DDR2_A6
B_DDR3_A9/DDR2_A12
B_DDR3_A10/DDR2_RASZ
B_DDR3_A11/DDR2_A11
B_DDR3_A12/DDR2_A0
B_DDR3_A13/DDR2_A7
B_DDR3_BA0/DDR2_BA2
B_DDR3_BA1/DDR2_CASZ
B_DDR3_BA2/DDR2_A5
B_DDR3_MCLK/DDR2_MCLK
B_DDR3_CKE/DDR2_DQ5
B_DDR3_ODT/DDR2_ODT
B_DDR3_RASZ/DDR2_WEZ
B_DDR3_CASZ/DDR2_BA1
B_DDR3_WEZ/DDR2_BA0
B_DDR3_RESETB
B_DDR3_DQSL/DDR2_DQS0
B_DDR3_DML/DDR2_DQ13
B_DDR3_DMU/DDR2_DQ6
B_DDR3_DQL0/DDR2_DQ3
B_DDR3_DQL1/DDR2_DQ7
B_DDR3_DQL2/DDR2_DQ1
B_DDR3_DQL3/DDR2_DQ10
B_DDR3_DQL4/DDR2_DQ4
B_DDR3_DQL5/DDR2_DQ0
B_DDR3_DQL6/DDR2_CKE
B_DDR3_DQL7/DDR2_DQ2
B_DDR3_DQU0/DDR2_DQ15
B_DDR3_DQU1/DDR2_DQ9
B_DDR3_DQU2/DDR2_DQ8
B_DDR3_DQU3/DDR2_DQ11
B_DDR3_DQU4/DDR2_DQM1
B_DDR3_DQU5/DDR2_DQ12
B_DDR3_DQU6/DDR2_DQM0
B_DDR3_DQU7/DDR2_DQ14
CLose to Saturn7M IC
VCC_1.5V_DDR
R499
1K 1%
0.1uF
R1400
1K 1%
C461
EDID_WP
C
Q400
2SC3052
E
CI_TS_DATA[0-7]
FE_TS_DATA[0-7]
A25
B-TMA0
B24
B-TMA1
A24
B-TMA2
P25
B-TMA3
C24
B-TMA4
P26
B-TMA5
B26
B-TMA6
R24
B-TMA7
B25
B-TMA8
T26
B-TMA9
D24
B-TMA10
A26
B-TMA11
C25
B-TMA12
T25
B-TMA13
P24
B-TMBA0
C26
B-TMBA1
R26
B-TMBA2
D26
B-TMCK
D25
B-TMCKB
E24
B-TMCKE
N25
B-TMODT
M26
B-TMRASB
N24
B-TMCASB
N26
B-TMWEB
R25
B-TMRESETB
J25
B-TMDQSL
J24
B-TMDQSLB
H26
B-TMDQSU
H25
B-TMDQSUB
F26
B-TMDML
L24
B-TMDMU
L25
B-TMDQL0
F24
B-TMDQL1
L26
B-TMDQL2
F25
B-TMDQL3
M25
B-TMDQL4
E26
B-TMDQL5
M24
B-TMDQL6
E25
B-TMDQL7
G26
B-TMDQU0
J26
B-TMDQU1
G24
B-TMDQU2
K25
B-TMDQU3
H24
B-TMDQU4
K26
B-TMDQU5
G25
B-TMDQU6
K24
B-TMDQU7
1000pF
C462
B-MVREFCA
POWER
VDDC : 2026mA
+1.26V_VDDC
L401
120-ohm
Main
L402
120-ohm
Main
+2.5V_AVDD
L404
120-ohm
Main
L405
120-ohm
+3.3V_AVDD
Main
+3.3V_ST
L410
120-ohm
VDD33_T/VDDP/U3_VD33_2:47mA
+1.5V_DDR_IN
L408
C463
120-ohm
0.1uF
Main
AVDD2P5/ADC2P5:162mA
AVDD25_PGA:13mA
VDD33_DVI:163mA
L406
120-ohm
L409
120-ohm
Main
Main
FRC_LPLL:13mA
FRC_MPLL:4mA
L412
120-ohm
Main
AVDD_MEMPLL:24mA
AVDD_DDR0:55mA
AVDD_DDR1:55mA
R1403
+1.26V_VDDC
C469 0.1uF
C470 0.1uF
C471 0.1uF
C472 0.1uF
C473 0.1uF
C474 0.1uF
C475 10uF
MIU0VDDC
MIU1VDDC
C476
C478
C477 0.1uF
C479 0.1uF
C480 0.1uF
C488 1uF
C489 0.1uF
AU25:10mA
AVDD2P5
AVDD25_PGA
Main
AVDD_DMPLL/AVDD_NODIE:7.362mA
VDD33_DVI
AVDD_DMPLL
AU33:31mA
C490 0.1uF
C491 10uF
C492 0.1uF
C493 0.1uF
C494
C495
C496
C497 0.1uF
C498 0.1uF
C499 0.1uF
C1400 0.1uF
C1401 0.1uF
C1405 0.1uF
C1406 0.1uF
C1407 0.1uF
C1411 0.1uF
FRC_LPLL
C1412 0.1uF
C1413 0.1uF
C1414 10uF
C1415 10uF
1K
1%
AVDD_DDR0
MVREF
R1404
1K
1%
C1416 0.1uF
C1417 0.1uF
C1418 0.1uF
C1419 0.1uF
C1420 0.1uF
C1421 10uF
C1422 10uF
C1423 0.1uF
C1424 0.1uF
C1425 0.1uF
C1426 0.1uF
C1427 0.1uF
LGE101DC-R [S7R DIVX/MS10]
H11
VDDC_1
H12
VDDC_2
H13
VDDC_3
H14
VDDC_4
H15
VDDC_5
J12
VDDC_6
J13
VDDC_7
J14
VDDC_8
J15
VDDC_9
J16
VDDC_10
L18
H16
K19
L19
M18
M19
N18
N19
N20
P18
P19
P20
Y12
J11
L7
H7
J7
J8
L8
W15
Y15
U8
M8
N9
P9
N8
P8
T7
U7
T9
R8
R9
T8
V20
W20
U19
U20
V19
W19
U18
T20
Y14
R19
W14
D15
D16
E15
E16
E17
F16
F17
G16
G17
H17
AB11
AB12
AC11
AC12
AA12
G15
Y7
Y8
VDDC_11
A_DVDD
B_DVDD
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
NC_13
AVDD1P2
DVDD_NODIE
AVDD2P5_ADC_1
AVDD2P5_ADC_2
AVDD25_REF
AVDD_AU25
PVDD_1
PVDD_2
AVDD25_PGA
AVDD_NODIE
AVDD_DVI_1
AVDD_DVI_2
AVDD3P3_CVBS
AVDD_DMPLL
AVDD_AU33
AVDD_EAR33
AVDD33_T
VDDP_1
VDDP_2
VDDP_3
NC_5
NC_8
NC_2
NC_3
NC_4
NC_7
AVDD_LPLL
NC_1
NC_14
AVDD_MEMPLL
NC_6
AVDD_DDR0_D_1
AVDD_DDR0_D_2
AVDD_DDR0_D_3
AVDD_DDR0_D_4
AVDD_DDR0_C
AVDD_DDR1_D_1
AVDD_DDR1_D_2
AVDD_DDR1_D_3
AVDD_DDR1_D_4
AVDD_DDR1_C
NC_22
NC_23
NC_27
NC_28
NC_18
MVREF
NC_9
NC_10
0.1uF
10uF
10uF C487
10uF
0.1uF
0.1uF
10uF C1404
IC400
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_FU
PGA_VCOM
G18
H9
H10
H18
H19
J10
J17
J18
J19
K9
K10
K11
K12
K13
K14
K15
K16
K17
K18
L9
L10
L11
L12
L13
L14
L15
L16
L17
M9
M10
M11
M12
M13
M14
M15
M16
M17
N10
N11
N12
N13
N14
N15
N16
N17
P10
P11
P12
P13
P14
P15
P16
P17
R10
R11
R12
R13
R14
R15
R16
R17
R18
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
U10
U11
U12
U13
U14
U15
U16
U17
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
V18
W7
W8
W9
W10
W11
W12
W13
W16
W17
W18
Y13
Y18
AA13
AB13
AC13
D17
H23
AF13
J9
U9
L413
120-ohm
Main
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2R_S7R
MAIN
2010-08-31
4
VCC_1.5V_DDR
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
R502
1K
1%
R503
1K
1%
VCC_1.5V_DDR
R500
1K
1%
R501
1K
1%
C501
0.1uF
C500
0.1uF
A-MVREFCA
A-MVREFDQ
C503
1000pF
C524 10uF
C525 0.1uF
C526 0.1uF
C527 0.1uF
C528 0.1uF
C529 0.1uF
C530 0.1uF
C531 0.1uF
C532 0.1uF
C533 0.1uF
C505
0.1uF
C534 0.1uF
C535 0.1uF
C536 0.1uF
C537 0.1uF
C538 0.1uF
C539 0.1uF
C540 0.1uF
C541 0.1uF
B-MVREFCA
B-MVREFDQ
C502
1000pF
C506 10uF
C507 0.1uF
C508 0.1uF
C509 0.1uF
C510 0.1uF
C511 0.1uF
C512 0.1uF
C513 0.1uF
C514 0.1uF
C515 0.1uF
C504
0.1uF
C516 0.1uF
C517 0.1uF
C518 0.1uF
C519 0.1uF
C520 0.1uF
C521 0.1uF
C522 0.1uF
C523 0.1uF
240
R504
1%
R505
240
1%
M8
H1
L8
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
IC500
H5TQ1G63BFR-H9C
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
IC501
H5TQ1G63BFR-H9C
VREFCA
VREFDQ
ZQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
NC_1
NC_2
NC_3
NC_4
NC_6
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
A10/AP
A12/BC
RESET
A10/AP
A12/BC
RESET
DQSL
DQSL
DQSU
DQSU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSL
DQSL
DQSU
DQSU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
A11
A13
A15
BA0
BA1
BA2
CKE
ODT
RAS
CAS
DML
DMU
DDR3 Memory
DDR_VREF_DDR
1GBit x 2
3D
R700
3D
C704
C702
470pF
0.1uF
50V
16V
DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[6]
DDR_A[7]
DDR_A[8]
DDR_A[9]
DDR_A[10]
DDR_A[11]
DDR_A[12]
100
+1.8V
3D
C705
100pF
50V
AR531
3D
22
1/16W
AR532
3D
22
1/16W
AR533
22
3D
1/16W
AR534
22
3D
1/16W
AR535
22
3D
1/16W
R1459
22
3D
R1460
3D
22
R1461
3D
22
R1462
3D
22
R1463
3D
22
R1464
3D
22
R1465
3D
22
R1466
3D
22
R1467
3D
22
/DDR_CS
A10/AP
VSSDL
/DDR_WE
DDR2_CKE
DDR_BA[1]
DDR_BA[0]
DDR_A[2]
DDR_A[0]
/DDR_RAS
DDR2_ODT
DDR_A[1]
DDR_A[3]
DDR_A[12]
DDR_A[9]
DDR_A[10]
DDR_A[5]
DDR_A[7]
DDR_A[11]
DDR_A[8]
DDR_A[6]
DDR_A[4]
/DDR_CAS
DDR2_CLK
/DDR2_CLK
DDR_DQS0P
DDR_DQS1P
DDR_DQM0
DDR_DQM1
DDR_DQS0M
DDR_DQS1M
W9725G6JB-25
VREF
J2
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
M2
A11
P7
A12
R2
BA0
L2
BA1
L3
CLK
J8
CLK
K8
CKE
K2
ODT
K9
CS
L8
RAS
K7
CAS
L7
WE
K3
LDQS
F7
UDQS
B7
LDM
F3
UDM
B3
LDQS
E8
UDQS
A8
NC_4
L1
NC_5
R3
NC_6
R7
NC_1
A2
NC_2
E2
NC_3
R8
J7
VDDL
J1
C_DDR_DQ[15-0]
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
R7
A11
N7
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
F3
G3
C7
B7
E7
DML
D3
DMU
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
R7
N7
T3
M7
M2
N8
M3
J7
CK
K7
CK
K9
L2
CS
K1
J3
K3
L3
WE
T2
F3
G3
C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
A-MA0
A-MA1
A-MA2
A-MA3
A-MA4
A-MA5
A-MA6
A-MA7
A-MA8
A-MA9
A-MA10
A-MA11
A-MA12
A-MA13
A-MBA0
A-MBA1
A-MBA2
A-MCKE
B-MA0
B-MA1
B-MA2
B-MA3
B-MA4
B-MA5
B-MA6
B-MA7
B-MA8
B-MA9
B-MA10
B-MA11
B-MA12
B-MA13
B-MBA0
B-MBA1
B-MBA2
B-MCKE
A-MODT
A-MRASB
A-MCASB
A-MWEB
A-MRESETB
A-MDQSL
A-MDQSLB
A-MDQSU
A-MDQSUB
A-MDML
A-MDMU
A-MDQL0
A-MDQL1
A-MDQL2
A-MDQL3
A-MDQL4
A-MDQL5
A-MDQL6
A-MDQL7
A-MDQU0
A-MDQU1
A-MDQU2
A-MDQU3
A-MDQU4
A-MDQU5
A-MDQU6
A-MDQU7
B-MODT
B-MRASB
B-MCASB
B-MWEB
B-MRESETB
B-MDQSL
B-MDQSLB
B-MDQSU
B-MDQSUB
B-MDML
B-MDMU
B-MDQL0
B-MDQL1
B-MDQL2
B-MDQL3
B-MDQL4
B-MDQL5
B-MDQL6
B-MDQL7
B-MDQU0
B-MDQU1
B-MDQU2
B-MDQU3
B-MDQU4
B-MDQU5
B-MDQU6
B-MDQU7
R509
56
1%
VCC_1.5V_DDR
R506
10K
R508
56
1%
VCC_1.5V_DDR
R507
10K
R511
C543
0.01uF
50V
R510
56
1%
C542
0.01uF
50V
R513 56
A-MA0
R514 56
A-MA2
AR500 56
A-MA11
A-MA1
A-MA8
A-MA6
AR501 56
A-MBA0
A-MA3
A-MA5
A-MA7
AR502 56
A-MA4
A-MA12
A-MBA1
A-MA10
A-MCK
A-MRESETB
A-MCKB
56
1%
A-MRASB
A-MCASB
A-MDQSL
A-MDQSLB
A-MDQSU
A-MDQSUB
A-MDQL1
A-MDQL3
A-MDQU2
A-MDQL7
A-MDQL5
A-MDQL0
A-MDQL2
A-MDQL6
A-MDQL4
A-MDQU7
A-MDQU3
A-MDQU5
A-MDQU6
A-MDQU0
A-MDQU4
A-MDQU1
B-MRESETB
B-MRASB
B-MCASB
B-MCK
B-MCKB
B-MDQSL
B-MDQSLB
B-MDQSU
B-MDQSUB
B-MDQL1
B-MDQL3
B-MDQU2
B-MDQL7
B-MDQL5
B-MDQL0
B-MDQL2
B-MDQL6
B-MDQL4
B-MDQU7
B-MDQU3
B-MDQU5
B-MDQU6
B-MDQU0
B-MDQU4
B-MDQU1
+1.5V_DDR_IN
A-MBA2
A-MA13
A-MA9
A-MCK
A-MCKB
A-MODT
A-MWEB
A-MDML
A-MCKE
A-MDMU
A-MCKE
B-MA0
B-MA2
B-MA11
B-MA1
B-MA8
B-MA6
B-MBA0
B-MA3
B-MA5
B-MA7
B-MA4
B-MA12
B-MBA1
B-MA10
B-MBA2
B-MA13
B-MA9
B-MCK
B-MCKB
B-MODT
B-MWEB
B-MDML
B-MCKE
B-MDMU
B-MCKE
AR503 56
R515 22
R516 22
AR504 56
R517 22
R518 22
R519 22
R520 22
AR505 22
AR506 22
AR507 22
AR508 22
AR509 22
R521 22
R512 10K
R522 56
R523 56
AR510 56
AR511 56
AR512 56
AR513 56
R524 22
R525 22
AR514 56
R526 22
R527 22
R528 22
R529 22
AR515 22
AR516
AR517 22
AR518 22
AR519 22
R530 22
R531 10K
L500
500
Main
C544
10uF
10V
22
A-TMA0
A-TMA2
A-TMA11
A-TMA1
A-TMA8
A-TMA6
A-TMBA0
A-TMA3
A-TMA5
A-TMA7
A-TMA4
A-TMA12
A-TMBA1
A-TMA10
A-TMRESETB
A-TMBA2
A-TMA13
A-TMA9
A-TMCK
A-TMCKB
A-TMRASB
A-TMCASB
A-TMODT
A-TMWEB
A-TMDQSL
A-TMDQSLB
A-TMDQSU
A-TMDQSUB
A-TMDQL1
A-TMDQL3
A-TMDML
A-TMDQU2
A-TMCKE
A-TMDQL7
A-TMDQL5
A-TMDQL0
A-TMDQL2
A-TMDQL6
A-TMDQL4
A-TMDQU7
A-TMDQU3
A-TMDQU5
A-TMDMU
A-TMDQU6
A-TMDQU0
A-TMDQU4
A-TMDQU1
B-TMA0
B-TMA2
B-TMA11
B-TMA1
B-TMA8
B-TMA6
B-TMBA0
B-TMA3
B-TMA5
B-TMA7
B-TMA4
B-TMA12
B-TMBA1
B-TMA10
B-TMRESETB
B-TMBA2
B-TMA13
B-TMA9
B-TMCK
B-TMCKB
B-TMRASB
B-TMCASB
B-TMODT
B-TMWEB
B-TMDQSL
B-TMDQSLB
B-TMDQSU
B-TMDQSUB
B-TMDQL1
B-TMDQL3
B-TMDML
B-TMDQU2
B-TMCKE
B-TMDQL7
B-TMDQL5
B-TMDQL0
B-TMDQL2
B-TMDQL6
B-TMDQL4
B-TMDQU7
B-TMDQU3
B-TMDQU5
B-TMDMU
B-TMDQU6
B-TMDQU0
B-TMDQU4
B-TMDQU1
VCC_1.5V_DDR
C545
0.1uF
16V
DDR2_CLK
/DDR2_CLK
DDR_A[12-0]
DDR_BA[0]
DDR_BA[1]
DDR2_CKE
DDR2_ODT
/DDR_CS
/DDR_RAS
/DDR_CAS
/DDR_WE
DDR_DQS0P
DDR_DQS1P
DDR_DQM0
DDR_DQM1
DDR_DQS0M
DDR_DQS1M
/C_DDR_WE
C_DDR2_CKE
C_DDR_BA[1]
C_DDR_BA[0]
C_DDR_A[2]
C_DDR_A[0]
/C_DDR_RAS
C_DDR2_ODT
C_DDR_A[1]
C_DDR_A[3]
C_DDR_A[12]
C_DDR_A[9]
C_DDR_A[10]
C_DDR_A[5]
C_DDR_A[7]
C_DDR_A[11]
C_DDR_A[8]
C_DDR_A[6]
C_DDR_A[4]
/C_DDR_CAS
C_DDR2_CLK
/C_DDR2_CLK
C_DDR_DQS0P
C_DDR_DQS1P
C_DDR_DQM0
C_DDR_DQM1
C_DDR_DQS0M
C_DDR_DQS1M
/C_DDR_CS
3D
LG8300 DDR3 Memory
256MBit
IC701
DQ0
G8
DQ1
G2
DQ2
H7
DQ3
H3
DQ4
H1
DQ5
H9
DQ6
F1
DQ7
F9
DQ8
C8
DQ9
C2
DQ10
D7
DQ11
D3
DQ12
D1
DQ13
D9
DQ14
B1
DQ15
B9
VDD_5
A1
VDD_4
E1
VDD_3
J9
VDD_2
M9
VDD_1
R1
VDDQ_10
A9
VDDQ_9
C1
VDDQ_8
C3
VDDQ_7
C7
VDDQ_6
C9
VDDQ_5
E9
VDDQ_4
G1
VDDQ_3
G3
VDDQ_2
G7
VDDQ_1
G9
VSS_5
A3
VSS_4
E3
VSS_3
J3
VSS_2
N1
VSS_1
P9
VSSQ_10
B2
VSSQ_9
B8
VSSQ_8
A7
VSSQ_7
D2
VSSQ_6
D8
VSSQ_5
E7
VSSQ_4
F2
VSSQ_3
F8
VSSQ_2
H2
VSSQ_1
H8
AR527
22
C_DDR_DQ[5]
C_DDR_DQ[2]
C_DDR_DQ[0]
C_DDR_DQ[7]
C_DDR_DQ[13]
C_DDR_DQ[10]
C_DDR_DQ[8]
C_DDR_DQ[15]
C_DDR_DQ[14]
C_DDR_DQ[9]
C_DDR_DQ[11]
C_DDR_DQ[12]
C_DDR_DQ[3]
C_DDR_DQ[4]
C_DDR_DQ[1]
C_DDR_DQ[6]
1/16W
3D
AR528
22
1/16W
3D
AR529
22
1/16W
3D
AR530
22
1/16W
3D
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]
DDR_DQ[13]
DDR_DQ[10]
DDR_DQ[15]
DDR_DQ[14]
DDR_DQ[11]
DDR_DQ[12]
+1.8V
DDR_DQ[15-0]
DDR_DQ[5]
DDR_DQ[2]
DDR_DQ[0]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[1]
DDR_DQ[6]
DDR_DQ[15-0]
C720 0.1uF
C719 0.1uF
C718 0.1uF
C717 0.1uF
C716 0.1uF
C715 0.1uF
C714 0.1uF
C713 0.1uF
C712 0.1uF
C711 0.1uF
C710 0.1uF
C709 0.1uF
C708 0.1uF
C707 0.1uF
C706 0.1uF
C703 0.1uF
C701 0.1uF
C700 10uF
NAND Flash
1GBit
/F_RB
/PF_OE
/PF_CE0
3D
3D
3D
3D
3D
3D
3D
3D
3D
3D
3D
3D
3D
3D
3D
3D
3D
3D
/PF_WP
+3.3V_ST
R532
3.3K
READY
R533
3.3K
R534
10K
READY
0
B
R536
10K
READY
+3.3V_AVDD
/PF_CE1
C
Q500
2SC3052
READY
E
READY
READY
PF_ALE
/PF_WE R535
SERIAL FLASH
8MBit
R546
10K
R540
/FLASH_WP
0
R539
10K
READY
B
R537
1K
R538
1K
R541
1K
R542
+3.3V_ST
C
E
1K
READY
Q501
2SC3052
+3.3V_AVDD
R545
4.7K
C549
0.1uF
/SPI_CS
SPI_SDO
VCC_1
VSS_1
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
+3.3V_ST
R547
4.7K
READY
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
NC_9
CLE
ALE
WE
WP
EEPROM
1MBit
IC504
M24M01-HRMN6TP
NC
1
E1
2
E2
3
VSS
4
VCC
8
WP
7
SCL
6
SDA
5
HDCP EEPROM
IC502
H27U1G8F2BTR-BC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
IC503
MX25L8005M2I-15G
CS#
1
SO
2
WP#
3
GND
4
+3.3V_AVDD
C547
0.1uF
R543 22
R544 22
C548
C546
10pF
10pF
READY
READY
+3.3V_AVDD
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O7
44
I/O6
43
I/O5
42
I/O4
41
NC_25
40
NC_24
39
NC_23
38
VCC_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O3
32
I/O2
31
I/O1
30
I/O0
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
VCC
8
HOLD#
7
SCLK
6
SI
5
10uF
C551
0.1uF
+3.3V_ST
R549
33
AR520
22
C550
AR521
22
C552
0.1uF
SPI_SCK
SPI_SDI
PCM_A[0-7]
PCM_A[7]
PCM_A[6]
PCM_A[5]
PCM_A[4]
PCM_A[3]
PCM_A[2]
PCM_A[1]
PCM_A[0]
A0’h
I2C_SCL
I2C_SDA
Addr:10101--
8KBit
+3.3V_AVDD
IC505
CAT24WC08W-T
R548
4.7K
A0
A1
A2
VSS
VCC
1
8
WP
7
6
5
SCL
SDA
R550 4.7K
R551
R552 22
22
I2C_SCL
I2C_SDA
2
3
4
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2R_S7R
Memory
2010-08-31
5
C600
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
0.1uF
16V
+5V_ST
RL_ON
5V_ON
+5V_ST_EN
C601
0.1uF
16V
ERROR_DET
R601
10K
+3.3V
R600
10K
READY
AC_DET
IC600
AZ1085S-3.3TR/E1
INPUT
3
1
ADJ/GND
IC601
AP2121N-3.3TRE1
VIN
2
3
1
GND
+3.3V_ST
R602
10K
R606 100
R603 100
R604
R605 100
OUTPUT
2
VOUT
C603
0.1uF
16V
100
C602
0.1uF
16V
C607
47uF
6.3V
3.3Vst
+3.3V_ST
C605
100uF
16V
C608
0.1uF
16V
C604
0.1uF
L602
120-ohm
Power Main
C606
0.1uF
16V
Power Wafer
P601
SMAW200-H18S1
2
1
4
3
6
5
8
7
9
10
12
11
14
13
16
15
18
17
16V
19
L603
500
Power Main
L604
500
Power Main
L605
500
Power Main
C619
100uF
16V
C621
100uF
16V
C624
100uF
16V
P_17V
+5V_ST
C627
0.1uF
16V
C628
0.1uF
16V
+5V
C631
22uF
16V
RL_ON
+3.3V_ST
R607
10K
R609
10K
R612
+5V_ST
10K
B
C65 4
22u F
C
Q601
RT1C3904-T112
E
16V
3.2A / P-CHANNEL
S
C655
0.01uF
25V
G
Q600
RTR030P02
D
5Vst Enable
C657
C656
0.01uF
100uF
25V
16V
+5V_ST_EN
+5V_ST_EN
C610
10uF
16V
READY
R610
10K
C612
0.1uF
16V
0.1uF
R638
10K
READY
READY
C614
16V
VIN_1
VIN_2
GND_1
GND_2
VIN_3
EP[GND]
1
THERMAL
2
17
IC603
3
SN1007054RTER
4
5
AGND
VSENSE
R615
C618
2200pF
READY
R617
0
R642
0
BOOT14PWRGD
13
15EN16
12
11
10
3A
7
8
6
COMP
RT/CLK
10K
R637
330K
C622
0.1uF
50V
L607
C626 0.01uF
3.6uH
R621
R619
75K
1/16W
1%
R1
C630
39K
100pF
1%
50V
R2
PH_3
PH_2
PH_1
SS
9
1.26V Core
+1.26V_VDDC
C651
C633
10uF
22uF
10V
16V
C652
10uF
10V
C653
0.1uF
16V
Switching freq: 600K
Vout=0.827*(1+R1/R2)
C620
0.1uF
50V
L606
3.6uH
R1
R620
C629
10.7K
100pF
C632
50V
22uF
16V
R2
R618
12K
1/16W
1%
1%
Vout=0.827*(1+R1/R2)
1.5V DDR
+1.5V_DDR_IN
C647
C637
C650
10uF
10uF
10V
0.1uF
16V
10V
Switching freq: 600K
+3.3V_AVDD
R611
1K
READY
A1[GN]
LD600
SAM2333
C
READY
+5V
C658
0.1uF
16V
3.3V_AVDD / 2.5AVDD
IC604
TJ3964S-2.5
C662
C615
10uF
0.1uF
10V
16V
IC606
AZ1085S-3.3TR/E1
INPUT
2
3
1
ADJ/GND
VIN
OUTPUT
C797
10uF
16V
R1475
3
1
2
GND
C659
47uF
6.3V
1
VOUT
C663
10uF
16V
READY
+2.5V_AVDD
C616
C623
47uF
0.1uF
6.3V
16V
3.3V
C660
0.1uF
16V
L611
120-ohm
Power Main
+3.3V
C661
0.1uF
16V
5V Tuner
P_17V
C634
4.7uF
50V
+3.3V_AVDD
C635
4.7uF
50V
L300
120-ohm
2A
C636
0.01uF
50V
+3.3V_TU
C309
22uF
10V
C313
0.1uF
16V
R623
R624
16K
3.6K
C639
0.1uF
50V
AZ1117BH-ADJTRE1
INPUT
3
OUTPUT
C322
0.1uF
16V
C638
0.015uF
50V
IC301
2
1
C325
47uF
6.3V
ADJ/GND
R1
R347
1.2K
TPS54231D
BOOT
1
VIN
2
EN
3
SS
4
1.26V Tuner
R2
R350
10
IC605
2A
+1.26V_TU
+5V_TU
EAP61606601
L608
22.0uH
C641
C642
C643
15pF
50V
10uF
16V
C644
10uF
16V
READY
10uF
R625
16V
C640
470pF
50V
51K
D600
40V
MBRA340T3G
PH
8
GND
7
COMP
6
VSENSE
5
R627
20K
L610
120-ohm
Power Main
R1
1%
R626
105K
R2
1%
+5V_ST_EN
C609
10uF
16V
READY
R608
10K
C611
16V
0.1uF
READY
C613
0.1uF
R613
10K
READY
READY
R616
0
R640
15EN16
17
IC602
6
VSENSE
10K
7
COMP
3A
BOOT14PWRGD
13
12
11
10
8
RT/CLK
R636
330K
0
PH_3
PH_2
PH_1
SS
9
C625 0.01uF
16V
EP[GND]
VIN_3
VIN_1
1
THERMAL
VIN_2
2
GND_1
3
SN1007054RTER
GND_2
4
5
AGND
R614
C617
2200pF
C725
3D
10uF
16V
+5V
3D
L710
BLM18PG121SN1D
READY
R762
10K
3D
C728
0.1uF
R704
10K
READY
READY
C734
0.1uF
LG8300 1.0V
3D
R1440
0
16V
VIN_1
VIN_2
GND_1
GND_2
R773 0
EP[GND]
VIN_3
15EN16
1
THERMAL
2
17
IC704
3
SN1007054RTER
4
3A
5
6
AGND
VSENSE
10K
R774
3D
C738
2200pF
READY
R641
0
3D
BOOT14PWRGD
13
3D
7
8
COMP
3D
RT/CLK
3D
R775
330K
C739
0.1uF
3D
50V
L702
C740
0.01uF
3D
3.6uH
R778
R779
5.1K
R1
3D
1%
3D
R2
22K
1%
PH_3
12
PH_2
11
PH_1
10
SS
9
3D
C743
100pF
50V
BLM18PG121SN1D
3D
C745
22uF
10V
3D
C746
10uF
10V
3D
L709
3D
C747
10uF
10V
+1.0V
3D
C748
0.1uF
16V
L703
BLM18PG121SN1D
+3.3V
3D
+3.3V_3D
READY
C749
47uF
6.3V
LG8300 3.3V / 1.8V
3D
IC707
AZ1117BH-1.8TRE1
INADJ/GND
3D
OUT
C751
0.1uF
16V
3D
C752
47uF
6.3V
3D
R834
0
+1.8V
1/10W
3D
C755
0.1uF
16V
5%
SEPARATE GND
R1
0
R2000
R2
0
R2001
R3
0
R2002
R4
0
R2003
R5
0
R2004
R6
0
R2005
R7
0
R2006
R8
0
R2007
CGND1
CGND2
CGND3
CGND4
Switching freq: 600K
Vout=0.8*(1+R1/R2)
1.8V Control for Power_On Seq of LG8300
SIDE_HDMI/USB GASKET GND
M1
MDS62110205
M2
MDS62110205
READY
M3
MDS62110205
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2R_S7R
Power
2010-08-31
6
TE4P
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
TE4N
TD4P
TD4N
TCLK4P
TCLK4N
TC4P
TC4N
TB4P
TB4N
TA4P
TA4N
TE3P
TE3N
TD3P
TD3N
TCLK3P
TCLK3N
TC3P
TC3N
TB3P
TB3N
TA3P
TA3N
TE2P
TE2N
TD2P
TD2N
TCLK2P
TCLK2N
TC2P
TC2N
TB2P
TB2N
TA2P
TA2N
TE1P
TE1N
TD1P
TD1N
TCLK1P
TCLK1N
TC1P
TC1N
TB1P
TB1N
TA1P
TA1N
B2
TE4P
B1
TE4N
B3
TD4P
C3
TD4N
C1
TCLK4P
C2
TCLK4N
D2
TC4P
D1
TC4N
D3
TB4P
E3
TB4N
E1
TA4P
E2
TA4N
F2
TE3P
F1
TE3N
F3
TD3P
G3
TD3N
G1
TCLK3P
G2
TCLK3N
H2
TC3P
H1
TC3N
H3
TB3P
J3
TB3N
J1
TA3P
J2
TA3N
K2
TE2P
K1
TE2N
K3
TD2P
L3
TD2N
L1
TCLK2P
L2
TCLK2N
M2
TC2P
M1
TC2N
M3
TB2P
N3
TB2N
N1
TA2P
N2
TA2N
P2
TE1P
P1
TE1N
P3
TD1P
R3
TD1N
R1
TCLK1P
R2
TCLK1N
T2
TC1P
T1
TC1N
T3
TB1P
U3
TB1N
U1
TA1P
U2
TA1N
C_DDR_A[12-0]
UART_TXD_3D
UART_RXD_3D
R1448
R1449
22
22
A16
B16
UART_TXD
UART_RXD
DDR_ADDR[0]
DDR_ADDR[1]
U5
V8
V5
C_DDR_A[0]
C_DDR_A[1]
C_DDR_A[2]
SPI_CK
SPI_DI
SPI_CSZ
R902
R904
R905
R903
22
22
22
22
C16
D16
A15
B15
SPI_CS
SPI_DO
SPI_SCLK
DDR_ADDR[2]
DDR_ADDR[3]
DDR_ADDR[4]
DDR_ADDR[5]
U8
R6
T8
T6
C_DDR_A[5]
C_DDR_A[3]
C_DDR_A[4]
P_SCL
SPI_DO
R1443 22
R1444
22
C15
D15
SCL
SPI_DI
DDR_ADDR[6]
DDR_ADDR[7]
DDR_ADDR[8]
R8
R7
U7
C_DDR_A[7]
C_DDR_A[6]
C_DDR_A[9]
C_DDR_A[8]
P_SDA
FLASH_WP
L/R_DETECT
R1445 22
R1446 22
R708 0
A14
B14
C14
D14
A13
B13
C13
D13
A12
B12
C12
SDA
SCL_M
SDA_M
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
GPIO[4]
GPIO[5]
GPIO[6]
GPIO[7]
GPIO[8]
LG8300
DDR_ADDR[9]
DDR_ADDR[10]
DDR_ADDR[11]
DDR_ADDR[12]V7DDR_BA[0]U9DDR_BA[1]T9DDR_CKV6DDR_CK_NU6DDR_CKEV9DDR_CS_NR5DDR_ODTU4DDR_RAS_NV4DDR_CAS_NT5DDR_WE_N
R9
T7
C_DDR_A[11]
C_DDR_A[10]
C_DDR_A[12]
/C_DDR_CS
C_DDR2_CLK
C_DDR2_CKE
C_DDR_BA[0]
C_DDR_BA[1]
/C_DDR2_CLK
R722 0
R721 0
D12
A11
B11
C11
D11
A10
B10
GPIO[9]
GPIO[10]
GPIO[11]
GPIO[12]
GPIO[13]
GPIO[14]
IC700
R10
V14
/C_DDR_WE
/C_DDR_CAS
/C_DDR_RAS
C_DDR2_ODT
R725 0
R726 0
R723 0
C10
D10
GPIO[15]
GPIO[16]
GPIO[17]
GPIO[18]A9GPIO[19]B9GPIO[20]C9GPIO[21]D9GPIO[22]A8GPIO[23]B8GPIO[24]C8GPIO[25]D8GPIO[26]A7GPIO[27]B7GPIO[28]C7GPIO[29]D7GPIO[30]A6GPIO[31]
DDR_DQS[0]
DDR_DQS[1]
DDR_DQS_N[0]
DDR_DQS_N[1]
DDR_DM[0]
DDR_DM[1]
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
V12
U14
U12
R15
T12
V15
T15
U16
T16
C_DDR_DQ[0]
C_DDR_DQ[3]
C_DDR_DQ[1]
C_DDR_DQ[2]
C_DDR_DQM0
C_DDR_DQS1M
C_DDR_DQS0M
C_DDR_DQM1
C_DDR_DQS0P
C_DDR_DQS1P
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
R16
V16
T14
C_DDR_DQ[4]
C_DDR_DQ[5]
C_DDR_DQ[6]
JTAG_TDI
R908
R907
22
22
B6
D6
TDIC6TMS
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
U15
T13
V11
U13
C_DDR_DQ[7]
C_DDR_DQ[8]
C_DDR_DQ[9]
C_DDR_DQ[10]
/JTAG_TRST
JTAG_TDO
JTAG_TMS
JTAG_TCLK
R910
R911
R909
22
22
22
4.7K
A5
C5
D5
TDOB5TCK
TRST
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
U11
T11
V13
R12
C_DDR_DQ[11]
C_DDR_DQ[14]
C_DDR_DQ[12]
C_DDR_DQ[13]
TMODE[0]
TMODE[1]
TMODE[2]
R739
TEST_SE
TMODE[0]A4TMODE[1]B4TMODE[2]C4TMODE[3]D4BOOT_SEL
DDR_DQ[14]
DDR_DQ[15]
DDR_TAOUT
R13
U10
C_DDR_DQ[15]
C_DDR_DQ[15-0]
BOOT_SEL
TMODE[3]
A3
RA1N
RA1P
RB1N
RB1P
RC1N
RC1P
RCLK1N
RCLK1P
RD1N
RD1P
RE1N
RE1P
RA2N
RA2P
RB2N
RB2P
RC2N
RC2P
RCLK2N
RCLK2P
RD2N
RD2P
RE2N
RE2P
CLK_XIN
CLK_XOUT
PO_RST_N
LR_SYNC
EMITTER_PULSE
DDR_TDOUT[0]
DDR_TDOUT[1]
T10
V10
U18
U17
T18
T17
R18
R17
P18
P17
N18
N17
M18
M17
L18
L17
K18
K17
J18
J17
H18
H17
G18
G17
F18
F17
A17
B18
B17
V2
V3
BOOT_SEL
TMODE[3]
TMODE[2]
TMODE[1]
TMODE[0]
R1438
R1439
R883
R896
R894
R891
R878
R845
R895
R874
R840
R897
R1452
0
R1450
0
+3.3V_3D
READY
R747
R745
3.3K
3.3K
R748
R746
3.3K
3.3K
100
100
100
100
100
100
100
100
100
100
100
100
R744
1M1%
LVDS_DATA_1_A-
LVDS_DATA_1_A+
LVDS_DATA_1_B-
LVDS_DATA_1_B+
LVDS_DATA_1_C-
LVDS_DATA_1_C+
LVDS_CLK_1-
LVDS_CLK_1+
LVDS_DATA_1_DLVDS_DATA_1_D+
LVDS_DATA_1_ELVDS_DATA_1_E+
LVDS_DATA_2_ALVDS_DATA_2_A+
LVDS_DATA_2_B-
LVDS_DATA_2_B+
LVDS_DATA_2_C-
LVDS_DATA_2_C+
LVDS_CLK_2-
LVDS_CLK_2+
LVDS_DATA_2_DLVDS_DATA_2_D+
LVDS_DATA_2_ELVDS_DATA_2_E+
50V
X700
25MHz
50V
LG8300_RESET
3D_L/R_SYNC
R749
3.3K
R750
3.3K
27pF
27pF
C721
C722
R751
3.3K
R752
3.3K
R753
3.3K
R754
3.3K
+1.0V
L704
BLM18PG121SN1D
+3.3V_3D
L705
BLM18PG121SN1D
L712
BLM18PG121SN1D
L706
BLM18PG121SN1D
DDR_VREF_LG8300
C818 10uF 6.3V
C791 10uF 6.3V
C798 0.1uF 16V
C756 0.1uF 16V
C763 0.1uF 16V
C770 0.1uF 16V
C777 0.1uF 16V
C781 0.1uF 16V
C785 0.1uF 16V
C790 0.1uF 16V
C800 0.1uF 16V
C808 0.1uF 16V
C813 0.1uF 16V
C757 0.1uF 16V
C764 0.1uF 16V
C771 0.1uF 16V
C820 10uF 6.3V
C795 0.1uF 16V
C803 0.1uF 16V
C811 0.1uF 16V
C828 0.1uF 16V
C821 0.1uF 16V
C794 10uF 6.3V
C758 0.1uF 16V
C765 0.1uF 16V
C778
C772
C782 0.1uF 16V
C832 10uF 6.3V
C829 0.1uF 16V
C831 0.1uF 16V
C833 10uF 6.3V
C796 0.1uF 16V
C804 0.1uF 16V
C812 0.1uF 16V
C815 0.1uF 16V
C816 0.1uF 16V
C836 10uF 6.3V
C835 0.1uF 16V
C817 0.1uF 16V
C837 0.1uF 16V
C838 10uF 6.3V
C792 10uF 6.3V
C760 0.1uF 16V
C767 0.1uF 16V
C774 0.1uF 16V
C779 0.1uF 16V
C783 0.1uF 16V
C787 0.1uF 16V
C793 0.1uF 16V
C802 0.1uF 16V
C810 0.1uF 16V
C814 0.1uF 16V
0.1uF 16V
0.1uF 16V
+1.0V_LTX
+3.3V_VDD
+3.3V_LRX
+3.3V_LTX
+1.8V
+1.0V
F6
F13
G6
G7
G8
G9
G10
G11
G12
G13
H6
H13
J6
J13
K6
K13
L6
L7
L8
L9
L10
L11
L12
L13
M6
M13
H5
J5
K5
L5
M5
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
F15
G15
L16
N16
E4
G4
L4
N4
J4
T4
R11
V17
N7
N8
N9
N10
N11
N12
N13
N14
P6
P7
P8
P9
P10
P12
P13
P14
P15
READY
READY
READY
READY
LG8300
VDD10_1
VDD10_2
VDD10_3
VDD10_4
VDD10_5
VDD10_6
VDD10_7
VDD10_8
VDD10_9
VDD10_10
VDD10_11
VDD10_12
VDD10_13
VDD10_14
VDD10_15
VDD10_16
VDD10_17
VDD10_18
VDD10_19
VDD10_20
VDD10_21
VDD10_22
VDD10_23
VDD10_24
VDD10_25
VDD10_26
LTX_VDD10_1
LTX_VDD10_2
LTX_VDD10_3
LTX_VDD10_4
LTX_VDD10_5
VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD33_6
VDD33_7
VDD33_8
VDD33_9
VDD33_10
VDD33_11
VDD33_12
VDD33_13
LRX_AVDD33_1
LRX_AVDD33_2
LTX_AVDD33_1
LTX_AVDD33_2
LTX_AVDD33_3
LTX_AVDD33_4
LTX_AVDD33_5
DDR_VREF0
DDR_VREF1
DDR_VREF2
DDR_VDDQ_1
DDR_VDDQ_2
DDR_VDDQ_3
DDR_VDDQ_4
DDR_VDDQ_5
DDR_VDDQ_6
DDR_VDDQ_7
DDR_VDDQ_8
DDR_VDDQ_9
DDR_VDDQ_10
DDR_VDDQ_11
DDR_VDDQ_12
DDR_VDDQ_13
DDR_VDDQ_14
DDR_VDDQ_15
DDR_VDDQ_16
DDR_VDDQ_17
IC700
DDRPLL_AVSS33
SYSPLL_AVSS33
DDRPLL_AVDD33
SYSPLL_AVDD33
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
LRX_AVSS33_1
LRX_AVSS33_2
LTX_AVSS33_1
LTX_AVSS33_2
LTX_AVSS33_3
LTX_AVSS33_4
LTX_AVSS33_5
ADPLL_AVSS33
SSPLL_AVSS33
SSPLL_AVDD33
ADPLL_AVDD33
A2
F5
F7
F8
F9
F10
F11
F12
F14
G5
G14
G16
H7
H8
H9
H10
H11
H12
H14
H15
H16
J7
J8
J9
J10
J11
J12
J14
J15
J16
K7
K8
K9
K10
K11
K12
K14
K15
K16
L14
L15
M7
M8
M9
M10
M11
M12
M14
M15
N5
N6
N15
P5
P11
R4
R14
M16
P16
F4
H4
K4
M4
P4
C17
D17
E16
F16
C18
D18
E17
E18
+3.3V_PLL
C834 0.1uF
C773 0.1uF
C766 0.1uF
C759 0.1uF
C839 10uF
L707
BLM18PG121SN1D
+3.3V_3D
RF Emiiter Interface
P704
12507WS-12L
1
2
3
4
5
6
7
8
9
10
11
12
13
ZD702
5.6B
ZD708
5.6B
ZD706
5.6B
+3.3V
ZD701
ZD707
ZD704
ZD705
5.6B
5.6B
5.6B
5.6B
ZD703
5.6B
READY
R1454
2.7K
R1456
100
R1483
100
R1484
100
R1453 100
R1469 100
R1470
100
R1455 22
R14781KR14791KR1480
+3.3V
READY
R1481
2.7K
R1477
1K
READY
R1482
2.7K
3D_RF_RXD
3D_RF_TXD
3D_RFMODULE_RESET
3D_RFMODULE_DC
3D_RFMODULE_DD
3D_RF_GPIO0
3D_RF_GPIO1
3D_RF_GPIO2
3D_L/R_SYNC
1K
Serial Flash
2MBit
R758
SPI_CSZ
SPI_DO
FLASH_WP
10K
C
Q703
B
KRC103S
READY
E
W25X20BVSNIG
CS
DO
WP
GND
+3.3V_3D
IC702
1
8
2
7
3
6
4
5
C735
0.1uF
VCC
16V
HOLD
CLK
DIO
LG8300_RESET
+3.3V_3D
SW700
JTP-1127WEM
1 2
4 3
R757
0
R772
10K
C737
0.1uF
16V
LG8300_RESET
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPI_CK
SPI_DI
/JTAG_TRST
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TCLK
READY
0
+3.3V_3D
R761
3.3K
R759
R763
3.3K
R764
3.3K
R765
3.3K
R770
EJTAG
R776
3.3K
R768
3.3K
TP7
TP1
TP2
TP3
TP4
TP5
TP6
1K
Close to LG8300
R999
R998
4.7K
1%
4.7K
1%
+1.8V
C843
0.1uF
C842
1000pF
DDR_VREF_LG8300
+1.8V
C841
1000pF
DDR_VREF_DDR
R996
R997
4.7K
1%
4.7K
1%
C840
0.1uF
Close to DDR2(IC701)
GP2R_S7R
3DF
2010-08-31
7