LG 42PT250B Diagram

PLASMA TV

SERVICE MANUAL

CAUTION

BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

CHASSIS : PB12K

MODEL : 42PT250B 42PT250B-SG

North/Latin America http://aic.lgservice.com Europe/Africa http://eic.lgservice.com Asia/Oceania http://biz.lgservice.com

Internal Use Only

Printed in KoreaP/NO : MFL67320203 (1110-REV00)

- 2 -

Only for training and service purposes

CONTENTS

CONTENTS ............................................................................................................................... 2

SAFETY PRECAUTIONS ...........................................................................................................3

SPECIFICATION.........................................................................................................................4

ADJUSTMENT INSTRUCTION ..................................................................................................6

BLOCK DIAGRAM ...................................................................................................................13

EXPLODED VIEW ...................................................................................................................14

SCHEMATIC CIRCUIT DIAGRAM .............................................................................................

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Only for training and service purposes

SAFETY PRECAUTIONS

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.

It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this monitor is blown, replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Due to high vacuum and large surface area of picture tube, extreme care should be used in handling the Picture Tube. Do not lift the Picture tube by it's Neck.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1MΩ and 5.2MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.

Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

Leakage Current Hot Check circuit

1.5 Kohm/10W

To Instrument’s exposed METALLIC PARTS

Good Earth Ground such as WATER PIPE, CONDUIT etc.

AC Volt-meter

IMPORTANT SAFETY NOTICE

0.15uF

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Only for training and service purposes

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement

.

1. Application Range

(1) This spec sheet is applied all of PDP TV with PB12K chassis.

2. Specification

Each part is tested as below without special appointment. (1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 °C ± 5 °C (2) Relative Humidity : 65 % ± 10 % (3) Power Voltage : Standard input voltage (100 V - 240 V ~ 50 / 60 Hz)

* Standard Voltage of each product is marked by models

(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with

BOM.

(5) The receiver must be operated for about 5 minutes prior to the adjustment.

3. Test Method

(1) Performance : LGE TV test method followed. (2) Demanded other specification

Safety : CE, IEC specification

Model Name Market Brand

42PT250B-SG Brazil LG

Model Name Market Appliance

42PT250B-SG Brazil Safety : IEC / EN60065

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Only for training and service purposes

4. General Specification

No Item Specification Remark

1. Receiving System 1) SBTVD / NTSC / PAL-M / PAL-N PW350B, PV550B, PT250B, PT350B

2) DVB-T PW350E, PV550E, PT250E, PT260E

2. Available Channel 1) VHF : 02~13 PW350B, PV550B, PT250B, PT260E

2) UHF : 14~69

3) DTV : 07-69 (VHF high/UHF)

4) CATV : 02~135

1) VHF : 02~13 PW350E, PV550E, PT250E, PT260E

2) UHF : 14~69

3) DTV : 14~69 (UHF)

4) CATV : 02~135

3. Input Voltage 1)AC 100 ~ 240V 50/60Hz

4. Market Brazil / chile / Peru / Venezuela PW350B, PV550B, PT250B, PT350B / Costarica / Uruguay Colombia / Panama PW350E, PV550E, PT250E, PT260E

5 Screen Size 42 inch Wide(1024 × 768) PW350B, PW350E, PT350B

PT250B, PT250E, PT260E

50 inch Wide(1024 × 768) PW350B, PW350E, PT350B

PT250B, PT250E, PT260E

50 inch Wide(1024 × 768) PV550B, PV550E 60 inch Wide(1024 × 768) PV550B, PV550E

6. Aspect Ratio 16:9 50/42PW350B-SA

50/42PW350E-DC

7. Tuning System FS

8. Module PDP42T3 (3D)#### (1024 × 768) 42PW### PDP42T3N (2D)#### (1024 × 768) 42PT### PDP50T3 (3D)#### (1024 × 768) 50PW### PDP50T3N (2D)#### (1024 × 768) 50PT### PDP60R3 #### (1920 × 1080) 60PZ###, 60PV### PDP50R3 #### (1920 × 1080) 50PZ###, 50PV###

9. Operating Environment 1) Temp : 0 ~ 40 deg

2) Humidity : ~ 80 %

10. Storage Environment 1) Temp : -20 ~ 60 deg

2) Humidity : 0 ~ 90 %

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Only for training and service purposes

ADJUSTMENT INSTRUCTION

1. Application Range

This spec. sheet applies to PB12K Chassis applied PDP TV all models manufactured in TV factory.

2. Specification

(1) Because this is not a hot chassis, it is not necessary to use

an isolation transformer. However, the use of isolation transformer will help protect test instrument.

(2) Adjustment must be done in the correct order. But it is

flexible when its factory local problem occurs.

(3) The adjustment must be performed in the circumstance of

25 cC ± 5 cC of temperature and 65 % ± 10 % of relative

humidity if there is no specific designation.

(4) The input voltage of the receiver must keep 100 V - 240 V,

50 / 60 Hz.

(5) Before adjustment, execute Heat-Run for 5 minutes.

V After Receive 100% Full white pattern (06CH) then

process Heat-run

(or “8. Test pattern” condition of Ez-Adjust status)

V How to make set white pattern

1) Press Power ON button of Service Remocon

2) Press ADJ button of Service remocon. Select “10. Test pattern” and, after select “White” using navigation button, and then you can see 100% Full White pattern.

* In this status you can maintain Heat-Run useless any

pattern generator

* Notice: if you maintain one picture over 20 minutes

(Especially sharp distinction black with white pattern – 13Ch, or Cross hatch pattern – 09Ch) then it can appear image stick near black level.

3. Adjustment items

3-1. PCB Assembly adjustment

(1) Adjust 480i Comp1 (2) Adjust 1080p Comp1/RGB

- If it is necessary, it can adjustment at Manufacture Line

- You can see set adjustment status at “9. ADJUST CHECK” of the “In-start menu”

3-2. Set Assembly Adjustment

(1) EDID (The Extended Display Identification Data ) (2) Color Temperature (White Balance) Adjustment (3) Make sure RS-232C control (4) Selection Factory output option

4. PCB Assembly Adjustment

4-1. Using RS-232C

- Adjust 3 items at 3-1 PCB assembly adjustments “ (3) Adjustment sequence” one after the order.

(1) Adjustment protocol

(2) Necessary items before Adjustment items

O Pattern Generator : (MSPG-925FA) O Adjust 480i Comp1

(MSPG-925FA:model :209, pattern :65) – Comp1 Mode

O Adjust 1080p Comp1

(MSPG-925FA:model :225 , pattern :65) – Comp1 Mode

O Addjust RGB (MSPG-925FA:model :225 , pattern :65)

– RGB-PC Mode

* If you want more information then see the below Adjustment

method (Factory Adjustment)

(3) Adjustment sequence

O aa 00 00: Enter the ADC Adjustment mode. O xb 00 40: Change the mode to Component1 (No actions) O ad 00 10: Adjust 480i Comp O ad 00 10: Adjust 1080p comp O xb 00 60: Change to RGB-PC mode(No action) O ad 00 10: Adjust 1080p RGB O xb 00 90: Endo of Adjustmennt

< See ADC Adjustment RS232C Protocol_Ver1.0 >

Order Command Set response

1. Inter the aa 00 00 a 00 OK00x

Adjustment mode

2. Change the XB 00 40 b 00 OK40x (Adjust 480i Comp1 )

Source XB 00 60 (Adjust 1080p Comp1)

b 00 OK60x (Adjust 1080p RGB)

3. Start ad 00 10

Adjustment

4. Return the OKx ( Success condition )

Response NGx ( Failed condition )

5. Read data ( main ) (main : component1 480i, RGB 1080p)

Adjustment ad 00 20 00000000000000000000000007c007b006dx data ( main ) (main : component1 480i, RGB 1080p)

ad 00 30 000000070000000000000000007c00830077x

6. Confirm ad 00 99 NG 03 00x (Failed condition)

Adjustment NG 03 01x (Failed condition)

NG 03 02x (Failed condition) OK 03 03x (Success condition)

7. End of ad 00 90 d 00 OK90x

Adjustment

5. Factory Adjustment

5-1. Auto Adjust Component

480i/1080p RGB 1080p

(1) Summary : Adjustment component 480i/1080i and RGB

1080p is Gain and Black level setting at Analog to Digital converter, and compensate the RGB deviation

(2) Using instrument

1) Adjustment remocon, 801GF(802B, 802F, 802R) or MSPG925FA pattern generator

(It can output 480i/1080i horizontal 100 % color bar pattern signal, and its output level must setting

0.7 V ± 0.1 V p-p correctly)

* You must make it sure its resolution and pattern cause every

instrument can have different setting

2) Adjustment method 480i Comp1, Adjust 1080p Comp1/RGB (Factory adjustment)

O ADC 480i Component1 adjustment -

- Check connection of Component1

- MSPG-925FA Ë Model: 209, Pattern 65

O Set Component 480i mode and 100% Horizontal

Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL”

O ADC 1080p Component1 / RGB adjustment

- Check connection both of Component1 and RGB

- MSPG-925FA Ë Model: 225, Pattern 65

O Set Component 1080p mode and 100% Horizontal

Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL”

O After get each the signal, wait more a second and

enter the “IN-START” with press IN-START key of Service remocon. After then select “7. External ADC” with navigator button and press “Enter”.

O After Then Press key of Service remocon “Right

Arrow(VOL+)”

O You can see “ADC Component1 Success” O Component1 1080p, RGB 1080p Adjust is same

method.

O Component 1080p Adjustment in Component1 input

mode

O RGB 1080p adjustment in RGB input mode O If you success RGB 1080p Adjust. You can see “ADC

RGB-DTV Success”

Caution : Set Volume 0 after adjustment

5-2. Use Internal ADC(S7R)

- ADJ(EZ ADJUST) -> 6.ADC Calibration -> ADC Calibration(START)

5-3. EDID(The Extended Display

Identification Data) / DDC(Display Data Channel) download

(1) Summary

1) It is established in VESA, for communication between PC and Monitor without order from user for building user condition. It helps to make easily use realize “Plug and Play” function.

2) For EDID data write, we use DDC2B protocol.

5-4. Auto Download

(1) After enter Service Mode by pushing “ADJ” key, (2) Enter EDID D/L mode. (3) Enter “START” by pushing “OK” key.

Caution

- Never connect HDMI & D-sub Cable when the user downloading .

- Use the proper cables below for EDID Writing.

O It only needs to PCM EDID D/L for North America Product.

(PU11A)

- 7 -

Only for training and service purposes

< Adjustment pattern : 480i / 1080p 60Hz Pattern >

* Edid data and Model option download(RS232)

5-5. Manual Download

(1) Write HDMI EDID data

1) Using instruments

- Jig. (PC Serial to D-Sub connection) for PC, DDC adjustment.

- S/W for DDC recording (EDID data write and read)

- D-sub jack

- Additional HDMI cable connection Jig.

2) Preparing and setting.

- Set instruments and Jig. Like pic.5), then turn on PC and Jig.

- Operate DDC write S/W (EDID write & read)

- It will operate in the DOS mode.

EDID data (Model name = LG TV)

HDMI-1 EDID table(2D HD) - South Centural America (PT250B/E, PT260E)

HDMI-2 EDID table(2D HD) - South Centural America (PT250B/E, PT260E)

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Only for training and service purposes

< For write EDID data, setting Jig and another instruments >

0123456789ABCDEF

0 00FFFFFFFFFFFF001E6D010001010101 10 01 15 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01 30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20 50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 0F

0 020327F14E0203111293041516051410 10 1F 22 20 26 15 07 50 09 57 07 68 03 0C 00 10 00 20 B8 2D 00 E3 05 03 01 02 3A 80 18 71 38 2D 40 58 30 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16 40 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51 50 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00 60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 D2

0123456789ABCDEF

0 00FFFFFFFFFFFF001E6D010001010101 10 01 15 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01 30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20 50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 0F

0 020327F14E0203111293041516051410 10 1F 22 20 26 15 07 50 09 57 07 68 03 0C 00 20 00 20 B8 2d 00 E3 05 03 01 02 3A 80 18 71 38 2D 40 58 30 2C 45 00 40 84 63 00 00 1E 01 1E 80 18 71 1C 16 40 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51 50 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00 60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 C2

HDMI-3 EDID table(2D HD) - South Centural America (PT250B/E, PT260E)

RGB EDID table(2D HD) - Brazil GP4 Replace only (PT350B, PT250B)

* See Working Guide if you want more information about EDID

communication.

5-6. Adjustment Color Temperature

(White balance)

(1) Using Instruments

1) Color Analyzer: CA-210 (CH 9)

- Using LCD color temperature, Color Analyzer (CA-

210) must use CH 9, which Matrix compensated (White, Red, Green, Blue compensation) with CS-

2100. See the Coordination bellowed one.

2) Auto-adjustment Equipment (It needs when Autoadjustment – It is availed communicate with RS-232C : Baud rate: 115200)

3) Video Signal Generator MSPG-925F 720p, 216Gray (Model: 217, Pattern 78)

(2) Connection Diagram (Auto Adjustment)

1) Using Inner Pattern

2) Using HDMI input

(3) White Balance Adjustment

- If you can’t adjust with inner pattern, then you can adjust it using HDMI pattern. You can select option at “Ez-Adjust Menu – 7. White Balance” there items “NONE, INNER, HDMI”. It is normally setting at inner basically. If you can’t adjust using inner pattern you can select HDMI item, and you can adjust.

- In manual Adjust case, if you press ADJ button of service remocon, and enter “Ez-Adjust Menu – 7. White Balance”, then automatically inner pattern operates. (In case of “Inner” originally “Test-Pattern. On” will be selected in The “Test-Pattern. On/Off”.

O Connect all cables and equipments like Pic.5) O Set Baud Rate of RS-232C to 115200. It may set

115200 orignally.

O Connect RS-232C cable to set O Connect HDMI cable to set

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Only for training and service purposes

< Connection Diagram for Adjustment White balance >

0123456789ABCDEF

0 00FFFFFFFFFFFF001E6D01 000101 0101 10 01 15 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01 30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20 50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 0F

0 020327F14E0203111293041516051410 10 1F 22 20 26 15 07 50 09 57 07 68 03 0C 00 30 00 20 B8 2d 00 E3 05 03 01 02 3A 80 18 71 38 2D 40 58 30 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16 40 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51 50 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00 60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B2

0123456789ABCDEF

0 00FFFFFFFFFFFF001E6D01 0001010101

10 01 15 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26 20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01 30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20 50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A 60 3E 1E 32 07 00 0A 20 20 20 20 20 20 00 00 00 FC 70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 52

V RS-232C COMMAND(Commonly apply)

O wb 00 00”: Start Auto-adjustment of white balance. O “wb 00 10”: Start Gain Adjustment (Inner pattern) O “jb 00 c0” : O … O “wb 00 1f”: End of Adjustment

* If it needs, offset adjustment (wb 00 20-start, wb 00 2f-

end)

O “wb 00 ff”: End of white balance adjustment (inner

pattern disappear)

V Adjustment Mapping information

O When Color temperature (White balance) Adjustment

(Automatically)

- Press “Power only key” of service remocon and operate automatically adjustment.

- Set BaudRate to 115200.

O You must start “wb 00 00” and finish it “wb 00 ff”. O If it needs, then adjustment “Offset”.

(4) White Balance Adjustment (Manual adjustment)

1) Test Equipment: CA-210

- Using PDP color temperature, Color Analyzer (CA-

210) must use CH 10, which Matrix compensated (White, Red, Green, Blue compensation) with CS-

2100. See the Coordination bellowed one.

2) Manual adjustment sequence is like bellowed one.

- Turn to “Ez-Adjust” mode with press ADJ button of service remocon.

- Select “10.Test Pattern” with CH+/- button and press enter. Then set will go on Heat-run mode. Over 30 minutes set let on Heat-run mode.

- Let CA-210 to zero calibration and must has gap more 10cm from center of PDP module when adjustment.

- Press “ADJ” button of service remocon and select “7.White-Balance” in “Ez-Adjust” then press “

G” button

of navigation key. (When press “

G” button then set will

go to full white mode)

- Adjust at three mode (Cool, Medium, Warm)

- If “cool” mode Let B-Gain to 192 and R, G, B-Cut to 64 and then control R, G gain adjustment High Light adjustment.

- If “Medium” and “Warm” mode Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment.

- All of the three mode Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment.

- With volume button (+/-) you can adjust.

- After all adjustment finished, with Enter (_ key) turn to Ez-Adjust mode. Then with ADJ button, exit from adjustment mode

* Attachment: White Balance adjustment coordination and color

temperature.

O Using CS-1000 Equipment.

- COOL : T=11000K, _uv=0.000, x=0.276 y=0.283

- MEDIUM : T=9300K, _uv=0.000, x=0.285 y=0.293

- WARM : T=6500K, _uv=0.000, x=0.313 y=0.329

O Using CA-210 Equipment. (10 CH)

- Contras value : 216 Gray

- Brighness spec.

- 10 -

Only for training and service purposes

RS-232C COMMAND [CMD ID DATA] Meaning wb 00 00 White Balance adjustment start. wb 00 10 Start of adjust gain

(Inner white pattern) wb 00 1f End of gain adjust wb 00 20 Start of offset adjust

(Inner white pattern) wb 00 2f End of offset adjust wb 00 ff End of White Balance adjust

(Inner pattern disappeared)

RS-232C COMMAND

CENTER

[CMD ID DATA] MIN (DEFAULT) MAX

Cool Mid Warm Cool Mid Warm R Gain jg Ja jd 00 184 192 192 192 G Gain jh Jb je 00 187 183 159 192 B Gain ji Jc jf 00 192 161 95 192

R Cut 64 64 64 127 G Cut 64 64 64 127 B Cut 64 64 64 127

Color Test Color Coordination

temperature Equipment x y

COOL CA-210 0.276±0.002 0.283±0.002

MEDIUM CA-210 0.285±0.002 0.293±0.002

WARM CA-210 0.313±0.002 0.329±0.002

Item Min Typ Max Unit Remark White 49 60 - cd/m - 100%Window White average Pattern brightness - 100IRE(255Gray)

- Picture: Vivid(Medium ) Brightness -20 +20 % - 85IRE(216Gray) 100% uniformity Window White Pattern

- Picture: Vivid(Medium)

6. Test of RS-232C control.

- Press In-Start button of Service Remocon then set the “4.Baud Rate” to 115200. Then check RS-232C control and

7. Selection of Country option.

- Selection of country option is allowed only North American model (Not allowed Korean model). It is selection of Country about Rating and Time Zone.

(1) Models: All models which PB82C Chassis (See the first

page.)

(2) Press “In-Start” button of Service Remocon, then enter the

“Option” Menu with “PIP CH-“ Button

(3) Select one of these three (USA, CANADA, MEXICO)

defends on its market using “Vol. +/-“button.

Caution : Don’t push The INSTOP KEY after completing the

function inspection

Caution : Inspection only PAL M / NTSC

8. GND and ESD Testing

8-1. Prepare GND and ESD Testing.

- Check the connection between set and power cord

8-2. Operate GND and ESD auto-test.

(1) Fully connected (Between set and power cord) set enter

the Auto-test sequence. (2) Connect D-Jack AV jack test equipment. (3) Turn on Auto-controller(GWS103-4) (4) Start Auto GND test. (5) If its result is NG, then notice with buzzer. (6) If its result is OK, then automatically it turns to ESD Test. (7) Operate ESD test (8) If its result is NG, then notice with buzzer. (9) If its result is OK, then process next steps. Notice it with

Good lamp and STOPER Down.

8-3. Check Items.

(1) Test Voltage

GND: 1.5KV/min at 100mA

Signal: 3KV/min at 100mA (2) Test time: just 1 second. (3) Test point

- GND test: Test between Power cord GND and Signal cable metal GND.

- ESD test: Test between Power cord GND and Live and

neutral.

(4) Leakage current: Set to 0.5mA(rms)

9. POWER PCB Ass’y Voltage Adjustment

(Va/Vs Voltage Adjustment)

(1)Test equipment : D.M.M 1EA (2) Connection Diagram for Measuring : refer to fig.1

9-1. Adjustment method

(1) Vs adjustment (refer fig.1)

1) Connect + terminal of D.M.M. to Vs pin of P811, connect

-terminal to GND pin of P811

2) After turning VR901, voltage of D.M.M adjustment as same as Vs voltage which on label of panel left/top ( deviation ; ±0.5V)

(2) Va adjustment (refer fig.1)

1) After receiving 100% Full White Pattern, HEAT RUN.

2) Connect + terminal of D.M.M. to Va pin of P811, connect

-terminal to GND pin of P811.

3) After turning VR502,voltage of D.M.M adjustment as same as Va voltage which on label of panel left/top (deviation; ±0.5V)

10. Default Service option.

10-1. ADC-Set.

V R-Gain adjustment Value (default 128) V G-Gain adjustment Value (default 128) V B-Gain adjustment Value (default 128) V R-Offset adjustment Value (default 128) V G-Offset adjustment Value (default 128) V B-Offset adjustment Value (default 128)

10-2. White balance. Value.

- 11 -

Only for training and service purposes

CENTER (DEFAULT)

Cool Mid Warm R Gain 192 192 192 G Gain 192 192 192 B Gain 192 192 192 R Cut 64 64 64 G Cut 64 64 64 B Cut 64 64 64

< fig.1 : 42 inch Power PCB Assy Voltage adjustment >

10-3. Temperature Threshold

V Threshold Down Low 20 V Threshold Up Low 23 V Threshold Down High 70 V Threshold Up High 75

11. USB DOWNLOAD (*.epk file download)

V Put the USB Stick to the USB socket V Press Menu key, and move OPTION

V Press “FAV” Press 7 times.

V Select download file (epk file)

V After download is finished, remove the USB stick.

V Press “IN-START” key of ADJ remote control, check the

S/W version.

- 12 -

Only for training and service purposes

- 13 -

Only for training and service purposes

BLOCK DIAGRAM

- 14 -

LGE Internal Use Only

EXPLODED VIEW

900

910

203

590

204

601

207

520

400

200

240

580

301

305

120

300

206

202

205

302

303

304

501

602

201

570

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

IMPORTANT SAFETY NOTICE

A10

A9

LV1

A12

A21

A2

A4

HDMI_1

LGE Internal Use Only

SHIELD

20

19

18

17

16

15

14

13

12

11 10

JK200 HDMI1

EAG59023302

9

8

7

6

5

4

3

2

1

5V_HDMI_1

CK+

D0-

D0_GND

D0+

D1-

D1_GND

D1+

D2-

D2_GND

D2+

+5V

A2

A1

D20 1

C

5V_DET_HDMI_1

ENKMC2838-T112

R200 1K

R201 1.8K

R203

10K

D200

READY

2SC3875S(ALY)

R204

3.3K JP201

JP2 02

5V_HDMI_1

R205

R206 33

Q200

HDMI

5V_HDMI_3

5V_HDMI_2

+5V

A2

A1

R6003 10K

1/16W 5%

C

R212

10K

B

E

33

DDC_SDA_1

DDC_SCL_1

HDMI_ARC

CEC_REMOTE

CK-_HDMI1

CK+_HDMI1

D0-_HDMI1

D0+_HDMI1

D1-_HDMI1

D1+_HDMI1

D2-_HDMI1

D2+_HDMI1

HPD1

HDMI_2

SHIELD

20

19

18

17

16

15

14

13

12

11 10

9

8

7

6

5

4

3

2

1

JK201 HDMI2

EAG59023301

5V_HDMI_2

CK+

D0-

D0_GND

D0+

D1-

D1_GND

D1+

D2-

D2_GND

D2+

D20 2

C

5V_DET_HDMI_2

ENKMC2838-T112

R225

R226

R208

10K

D207 READY

1K

1.8K

R229

3.3K

Q201

2SC3875S(ALY)

JP204

R230 33

R231 33

JP2 05

5V_HDMI_2

C

E

R6004 10K

1/16W 5%

B

R236

10K

HPD2

DDC_SDA_2

DDC_SCL_2

CEC_REMOTE

CK-_HDMI2

CK+_HDMI2

D0-_HDMI2

D0+_HDMI2

D1-_HDMI2

D1+_HDMI2

D2-_HDMI2

D2+_HDMI2

SIDE_HDMI

BODY_SHIELD

20

19

18

17

16

15

14

13

12

11 10

9

8

7

6

5

4

3

2

1

JK202

HDMI Side

EAG62611201

5V_HDMI_3

CK+

D0-

D0_GND

D0+

D1-

D1_GND

D1+

D2-

D2_GND

D2+

+5V

A2

A1

D20 3

C

ENKMC2838-T112

5V_DET_HDMI_3

R248 1K

R249 1.8K

R219

10K

D212 READY

2SC3875S(ALY)

R252

JP207

3.3K

JP2 08

R253 33

R254 33

5V_HDMI_3

Q202

R6005 10K

1/16W 5%

C

R258

10K

B

E

DDC_SDA_3

DDC_SCL_3

CEC_REMOTE

CK-_HDMI3

CK+_HDMI3

D0-_HDMI3

D0+_HDMI3

D1-_HDMI3

D1+_HDMI3

D2-_HDMI3

D2+_HDMI3

HPD3

For CEC

CEC_REMOTE

R221

READY

R220 56K

READY

0

D219

READY

D218

30V

+3.3V_ST

BAT54_SUZHO

S

READY

G

R268 100

B D

Q203 BSS83

R269

27K

READY

CEC_REMOTE_S7

RS232C

JK203

1

6

2

7

3

8

4

9

5

10

SPDIF

FIX_POLE

JK204

Fiber Optic

4

1

2

3

GND

VCC

VINPUT

R273 0

R274 0

READY

+3.3V_ST

R290

10K

R288

100

R289

100

PC_SER_DATA

PC_SER_CLK

+5V

C235

0.1uF 16V

C236 10pF

R295

R297 0

R291

10K

VCC

GND

DOU T1

RIN 1

ROU T1

DIN 1

DIN2

ROUT2

+5V

R29 2

1K

READY

VCC

Y

R293 100

READY

50V

R296

0

IC203

MAX3232CDR

16

15

14

13

12

11

10

9

IC204

READY

1A5

NAND

2

GATE

4

3

100

B

GND

S7_TXD

S7_RXD

PM_TXD

PM_RXD

1

2

3

4

5

6

7

8

C1+

V+

C1-

C2+

C2-

V-

DOUT2

RIN2

SPDIF_OUT

+3.3V_ST

C244

0.1uF 16V

C241

0.1uF

16V

C242

0.1uF 16V

C243

0.1uF 16V

C245

0.1uF 16V

RGB PC

JK205

SPG09-DB-010

6

1

7

2

8

3

9

4

10

5

16

SHILED

GND

PC AUDIO

JK208

PEJ027-04

11

12

13

14

15

6A

7A

7B

6B

E_SPRING

3

T_TERMINAL1

B_TERMINAL1

R_SPRING

4

T_SPRING

5

B_TERMINAL2

T_TERMINAL2

RED_GND GND_2 RED GREEN_GND DDC_DATA GREEN BLUE_GND H_SYNC BLUE NC V_SYNC GND_1 SYNC_GND DDC_CLOCK DDC_GND

R238

+3.3V

R217

10K

R224

1K

DSUB_DET

+5V_ST

R239

R240 75

75

DSUB_R+

DSUB_G+

DSUB_B+

C209 10pF 50V

R211 10

R210

R227 10K

C211 10pF 50V

10

R228 10K

C208

0.1uF 16V

RGB_DDC_SDA

DSUB_HSYNC

DSUB_VSYNC

RGB_DDC_SCL

PC_SER_DATA

PC_SER_CLK

75

SIDE CVBS

JK207

PPJ235-01

5A

[YL]E-LUG

4A

[YL]O-SPRING

3A

[YL]CONTACT

4B

[WH]O-SPRING

3C

[RD]CONTACT

4C

[RD]O-SPRING

5C

[RD]E-LUG

R294

10K

+3.3V

C237

0.1uF 16V

R1200

R298 470K

R299 470K

R1203 1K

C240 27pF

75

50V

R1201 10K

C239 1000pF

50V

R1202 10K

C238 1000pF 50V

R1204 12K

R1205

12K

SIDEAV_DET

SIDEAV_CVBS_IN

SIDEAV_L_IN

SIDEAV_R_IN

+3.3V

C205 1000pF 50V

C206

1000pF

50V

R213 470K

R214 470K

R215 10K

R216

10K

R222 12K

R223

SIDE USB

D217

30V

READY

R263

33

R267

10K

SIDE_USB_DM

SIDE_USB_DP

Capacitors on VBUSA should be

JK209

USB DO WN ST REA M

PC_R_IN

PC_L_IN

12K

10mm

placed as closd to connector as possible.

C223

C222

22uF

0.1uF 16V

1234

5

16V

READY

D214

30V

READY

USB1_OCD

IC206

AP2191SG-13

NC

8

OUT_2

7

$0.11

OUT_1

6

FLG

5

+3.3V

GND

1

IN_1

2

IN_2

3

EN

4

R277

10K

READY

R278

33

+5V

USB1_CTL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP4 LM1 20110531

FLASH/EEPROM/GPIO

1

7

+3.3V

LGE Internal Use Only

AMP_DEMOD_SDA

AMP_MUTE

AUD_MASTER_CLK

AMP_RESET_N

R320 2K

R321 2K

AMP_DEMOD_SCL

R323

R324

2.2

0

R326 10K

READY

AC_DET

AUD_SCK

AUD_LRCK

AUD_LRCH

C308

0.1uF

16V

R353

READY

C311

B

R355

READY

10K

0.1uF 50V

C314

2K

R382 0

C

READY

Q305

2SC3875S(ALY)

READY

E

0.1uF 50V

C310 4700pF 50V

C309 22pF 50V

C312 22pF 50V

C313 22pF 50V

R381 10K

C315 22pF 50V

R383 0

C317 680pF 50V

C316

0.1uF 50V

22

R390 22

R391 22

EAPD/OUT4B

TWARN/OUT4A

VDD_DIG_1

GND_DIG_1

R384

VDD_PLL

FILTER_PLL

GND_PLL

R385

22

R386

22

R387

22

R388

22

R389

22

INT_LINE

GND_DIG_2

VDD_DIG_2

[EP]GND

PWRDN

XTI

BICKI

LRCKI

SDI

RESET

SDA

SCL

19

20

21

22

23

24

25

26

Close-by

27

28

29

30

31

32

33

34

35

Close-by

36

STA368BWG

@compC

THERMAL

37

IC300

Close-by

18

OUT3A/FFX3A

17

OUT3B/FFX3B

16

CONFIG

15

VDD

14

GND_REG

13

OUT1A

12

GND1

11

VCC1

10

OUT1B

9

OUT2A

8

VCC2

7

GND2

6

OUT2B

5

VCC_REG

4

VSS

3

TEST_MODE

2

SA

1

GND_SUB

C319

0.1uF 50V

C320

C321 0.1uF 50V

C322 1uF 25V

C323 0.1uF 50V

P_17V

C318

0.1uF 50V

1uF 25V

0.1uF 50V

C324

R1300

C326

330pF

C327

330pF

R1301

Audio AMP

L300

10.0uH

20

50V

L301

10.0uH

L302

10.0uH

20

L303

10.0uH

C325

68uF

35V

C333

0.22uF 50V

C334

0.22uF 50V

C335

0.22uF 50V

C336

0.22uF 50V

C337

0.22uF 50V

C338

0.22uF 50V

C339 1000pF 50V

C340 1000pF 50V

C341 1000pF 50V

C342 1000pF 50V

4

3

P300

2

1

SMAW250-H04R

FHD

P303

104060-8017

123456789

HD

P302

TF05-51S

UART_TXD

UART_RXD

123456789

P_SDA

P_SCL

TE2P

UART_RXD

UART_TXD

1011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980

TE2N

1011121314151617181920212223242526272829303132333435363738394041424344454647484950

TD2P

TD2N

TCLK2P

TCLK2N

TC2P

TC2N

TB2P

TB2N

TA2P

TE2P

TA2N

TE2N

TD2P

TD2N

TE1P

TCLK2P

TE1N

TCLK2N

TD1P

TC2P

TC2N

TD1N

TB2P

TB2N

TCLK1P

TA2P

TA2N

TCLK1N

TE1P

TC1P

TE1N

TD1P

TC1N

TD1N

TB1P

TB1N

TCLK1N

TCLK1P

TA1P

TC1P

TA1N

TC1N

TB1P

TB1N

TA1P

TA1N

DISP_EN

P_SDA

DISP_EN

P_SCL

PC_SER_CLK

PC_SER_DATA

51

PC_SER_CLK

PC_SER_DATA

LVDS

Key/IR

P301

IR

KEY1

KEY2

52

LED_RED

R379

4.7K

C

Q306

B

2SC3052

E

SUB_SCL

SUB_SDA

+3.3V_ST

R392

4.7K

+3.3V_ST

R394

10K

R393

4.7K

R396

C331

5.1V

ZD301

10pF

R398 22

R399 22

R1302

10K

5.1V

ZD302

READY

5.1V

ZD303

READY

5.1V

ZD304

R397

10K

+3.3V_ST

C330

0.1uF 16V

TOUCH_VER_CHK

81

READY

ZD306



5.1V



5.1V

ZD305

READY



1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP4 LM1 20110531

Main/Power/GPIO

2

7

VIDEO/AUDIO

LGE Internal Use Only

R4371K

READY

R438 1K

READY

R403

2.4K

PIN NO.

M4

READY

R4391K

1K

R440

R404 22 R405 22 R406 33 R407 68 R408 33 R409 68 R410 33 R411 68

R413 33 R414 68 R415 R416 R417 33 R418 68

R420 33 R421 68 R422 R423 R424 33 R425 68

R427 33

R430 33

R431 33

R432 68

DSUB_HSYNC DSUB_VSYNC

DSUB_R+

DSUB_G+

DSUB_B+

R402

10K

COMP1_Pr+

COMP1_Y+

COMP1_Pb+

COMP2_Pr+

COMP2_Y+

COMP2_Pb+

TU_CVBS

SIDEAV_CVBS_IN

COMP2_Y+

MODEL OPTION

PIN NAME

MODEL_OPT_3

+3.3V_AVDD

R400

READY

1K

R401 1K

READY

<LM1 CHIP Config> (AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)

B51_NO_EJ : 4’b0000 Boot from 8051 with SPI flash SB51_WOS : 4’b0001 Secure B51 without scramble SB51_WS : 4’b0010 Secure B51 with scramble MIPS_SPI_NO_EJ : 4’b0100 Boot from MIPS with SPI flash MIPS_SPI_EJ_1 : 4’b0101 Boot from MIPS with SPI flash MIPS_SPI_EJ_2 : 4’b0110 Boot from MIPS with SPI flash MIPS_WOS : 4’b1001 Secure MIPS without scramble MIPS_WO : 4’b1010 Secure MIPS with scramble

CK+_HDMI1 CK-_HDMI1 D0+_HDMI1 D0-_HDMI1 D1+_HDMI1 D1-_HDMI1 D2+_HDMI1 D2-_HDMI1 DDC_SDA_1 DDC_SCL_1

CK+_HDMI3 CK-_HDMI3 D0+_HDMI3 D0-_HDMI3 D1+_HDMI3 D1-_HDMI3 D2+_HDMI3 D2-_HDMI3 DDC_SDA_3 DDC_SCL_3

CK+_HDMI2 CK-_HDMI2 D0+_HDMI2 D0-_HDMI2 D1+_HDMI2 D1-_HDMI2 D2+_HDMI2 D2-_HDMI2 DDC_SDA_2 DDC_SCL_2

CEC_REMOTE_S7

C401 0.047uF C402 0.047uF C403 0.047uF C404 0.047uF C405 0.047uF C406 0.047uF C407 1000pF

C408 0.047uF C409 0.047uF C410

33

C411

68

C412 C413 C414 1000pF

C415 0.047uF C416 0.047uF C417 0.047uF

33 68

C418 0.047uF C419 0.047uF C420 0.047uF C421 1000pF

C422 0.047uF

C425 0.047uF

C426 0.047uF

C427 0.047uF

HIGH

HPD1

HPD3

HPD2

0.047uF

LOW

MODEL_OPT_3

RF_SWITCH_CTL FE_BOOSTER_CTL

J2 J3 K3 J1 K2 K1 L2 L3 T5 T4 V5

R5

AE9 AC9

AC10

AD9 AC11 AD10 AE11 AD11

AE8

AD8

AC8

F2 F3 G3 F1 G2 G1 H2 H3 R6 U6 P5 R4

P2 R3 N2 P3 N3 N1 M3 M2 M1

V2 V3 U3 U2 T1 T2 R2 R1 T3

AA2

Y2

AA3

W2 Y3 V1 W3 W1

AA8

Y4 W4

AA5

Y5

AA4

Y6

AA1

AB4

RXACKP RXACKN RXA0P RXA0N RXA1P RXA1N RXA2P RXA2N DDCDA_DA/GPIO24 DDCDA_CK/GPIO23 HOTPLUGA/GPIO19

HOTPLUGB/GPIO20

RXCCKP RXCCKN RXC0P RXC0N RXC1P RXC1N RXC2P RXC2N DDCDC_DA/GPIO28 DDCDC_CK/GPIO27 HOTPLUGC/GPIO21

RXDCKP RXDCKN RXD0P RXD0N RXD1P RXD1N RXD2P RXD2N DDCDD_DA/GPIO30 DDCDD_CK/GPIO29 HOTPLUGD/GPIO22 CEC/GPIO5

HSYNC0 VSYNC0 RIN0P RIN0M GIN0P GIN0M BIN0P BIN0M SOGIN0

HSYNC1 VSYNC1 RIN1P RIN1M GIN1P GIN1M BIN1P BIN1M SOGIN1

HSYNC2 RIN2P RIN2M GIN2P GIN2M BIN2P BIN2M SOGIN2

CVBS0 CVBS1 CVBS2 CVBS3 CVBS4 CVBS5 CVBSOUT0 CVBSOUT1

VCOM

SOC_RESET

C428 22uF

10V

D400 KDS181

LGE2112-T8

+3.3V_ST

SOC_RESET

IC400

ET_TXD[1]/LED1/GPIO56

SOC_RESET TMUE312GAB

C439 10uF 16V

R433

100K

SOC_RESET

IF_AGC RF_AGC

I2C_SCKM1/GPIO75 I2C_SDAM1/GPIO76

SPDIF_IN/GPIO152

SPDIF_OUT/GPIO153

USB0_DM USB0_DP

USB1_DM USB1_DP

I2S_IN_BCK/GPIO150

I2S_IN_SD/GPIO151 I2S_IN_WS/GPIO149

I2S_OUT_BCK/GPIO156 I2S_OUT_MCK/GPIO154

I2S_OUT_SD/GPIO157

I2S_OUT_WS/GPIO155

AUOUTL0 AUOUTL2 AUOUTL3 AUOUTR0 AUOUTR2 AUOUTR3

AUVRM

AUVAG AUVRP

EARPHONE_OUTL EARPHONE_OUTR

ET_RXD[0]/RP/GPIO60 ET_TXD[0]/TP/GPIO57

ET_RXD[1]/RN/GPIO63

ET_TX_CLK/TN/GPIO59

ET_TX_EN/GPIO58

ET_MDC/GPIO61

ET_MDIO/GPIO62

ET_COL/LED0/GPIO55

IRIN/GPIO4

HWRESET

SW400

43

5

SOC_RESET

R434

1 2

100

SOC_RESET R435

10

SOC_RESET

C429

0.1uF

IC400

LGE2112-T8

W21

PCMDATA[0]/GPIO126

AA18

PCMDATA[1]/GPIO127

AB22

R47722 R478

PCMDATA[2]/GPIO128

AE20

PCMDATA[3]/GPIO120

AA15

PCMDATA[4]/GPIO119

AE21

PCMDATA[5]/GPIO118

AB21

PCMDATA[6]/GPIO117

Y15

PCMDATA[7]/GPIO116

W20

PCMADR[0]/GPIO125

V20

PCMADR[1]/GPIO124

W22

PCMADR[2]/GPIO122

AB18

PCMADR[3]/GPIO121

AA20

PCMADR[4]/GPIO99

AA21

PCMADR[5]/GPIO101

Y19

PCMADR[6]/GPIO102

AB17

PCMADR[7]/GPIO103

Y16

PCMADR[8]/GPIO108

AB19

PCMADR[9]/GPIO110

AB20

PCMADR[10]/GPIO114

AA16

PCMADR[11]/GPIO112

AA19

PCMADR[12]/GPIO104

AC21

PCMADR[13]/GPIO107

AA17

PCMADR[14]/GPIO106

Y20

PCMREG_N/GPIO123

AB15

PCMOE_N/GPIO113

AA22

PCMWE_N/GPIO197

AD22

PCMIORD_N/GPIO111

AD20

PCMIOWR_N/GPIO109

AD21

PCMCE_N/GPIO115

AC20

PCMIRQA_N/GPIO105

Y18

PCMCD_N/GPIO130

Y21

PCMWAIT_N/GPIO100

Y22

PCM_RESET/GPIO129

U21

PCM2_CE_N/GPIO131

V21

PCM2_IRQA_N/GPIO132

R20

PCM2_CD_N/GPIO135

T20

PCM2_WAIT_N/GPIO133

U22

PCM2_RESET/GPIO134

D4

UART1_TX/GPIO43

E4

UART1_RX/GPIO44

N25

UART2_TX/GPIO65

N24

UART2_RX/GPIO64

B8

UART3_TX/GPIO47

A8

UART3_RX/GPIO48

P23

I2C_SCKM2/DDCR_CK/GPIO72

P24

I2C_SDAM2/DDCR_DA/GPIO71

D2

DDCA_DA/UART0_TX

D1

DDCA_CK/UART0_RX

P21

PWM0/GPIO66

N23

PWM1/GPIO67

P22

PWM2/GPIO68

R21

PWM3/GPIO69

P20

PWM4/GPIO70

F6

PWM_PM/GPIO199

H6

SAR0/GPIO31

G5

SAR1/GPIO32

G4

SAR2/GPIO33

J5

SAR3/GPIO34

J4

SAR4/GPIO35

R23

VSYNC_LIKE/GPIO145

R24

SPI1_CK/GPIO201

R25

SPI1_DI/GPIO202

T21

SPI2_CK/GPIO203

T22

SPI2_DI/GPIO204

NF_CE1Z/GPIO138

NF_WPZ/GPIO198 NF_CEZ/GPIO137 NF_CLE/GPIO136 NF_REZ/GPIO139 NF_WEZ/GPIO140 NF_ALE/GPIO141 NF_RBZ/GPIO142

GPIO_PM[0]/GPIO6

PM_UART_TX/GPIO_PM[1]/GPIO7

GPIO_PM[2]/GPIO8 GPIO_PM[3]/GPIO9

GPIO_PM[4]/GPIO10

PM_UART_RX/GPIO_PM[5]/GPIO11

PM_SPI_SCZ1/GPIO_PM[6]/GPIO12

GPIO_PM[7]/GPIO13 GPIO_PM[8]/GPIO14 GPIO_PM[9]/GPIO15

PM_SPI_SCZ2/GPIO_PM[10]/GPIO16

GPIO_PM[11]/GPIO17

PM_SPI_SCK/GPIO1

PM_SPI_CZ0/GPIO_PM[12]/GPIO0

PM_SPI_SDI/GPIO2 PM_SPI_SDO/GPIO3

TS0CLK/GPIO87

TS0VALID/GPIO85

TS0SYNC/GPIO86

TS0DATA_[0]/GPIO77 TS0DATA_[1]/GPIO78 TS0DATA_[2]/GPIO79 TS0DATA_[3]/GPIO80 TS0DATA_[4]/GPIO81 TS0DATA_[5]/GPIO82 TS0DATA_[6]/GPIO83 TS0DATA_[7]/GPIO84

TS1CLK/GPIO98 TS1VALID/GPI96 TS1SYNC/GPIO97

TS1DATA_[0]/GPIO88 TS1DATA_[1]/GPIO89 TS1DATA_[2]/GPIO90 TS1DATA_[3]/GPIO91 TS1DATA_[4]/GPIO92 TS1DATA_[5]/GPIO93 TS1DATA_[6]/GPIO94 TS1DATA_[7]/GPIO95

DDR

A-TMA0 A-TMA1 A-TMA2 A-TMA3 A-TMA4 A-TMA5 A-TMA6 A-TMA7 A-TMA8

A-TMA9 A-TMA10 A-TMA11 A-TMA12 A-TMA13 A-TMA14

A-TMBA0 A-TMBA1 A-TMBA2

A-TMCK

A-TMCKB A-TMCKE

A-TMODT A-TMRASB A-TMCASB

A-TMWEB

A-TMRESETB

A-TMDQSL

A-TMDQSLB

A-TMDQSU

A-TMDQSUB

A-TMDML

A-TMDMU

A-TMDQL0 A-TMDQL1 A-TMDQL2 A-TMDQL3 A-TMDQL4 A-TMDQL5 A-TMDQL6 A-TMDQL7

A-TMDQU0 A-TMDQU1 A-TMDQU2 A-TMDQU3 A-TMDQU4 A-TMDQU5 A-TMDQU6 A-TMDQU7

CLose to Saturn7LR IC

VCC_1.5V_DDR

R487

1K 1%

R488

1K 1%

C465

0.1uF

A11 C14 B11 F12 C15 E12 A14 D11 B14 D12 C16 C13 A15 E11 B13

F13 B15 E13

C17 A17 B16

E14 B12 A12 C12

F11

B19 C18

B18 A18

E15 A21

D17 G15 B21 F15 B22 F14 A22 D15

G16 B20 F16 C21 E16 A20 D16 C20

C466

AE18 AC17 AD18 AC18 AC19 AD17 AE17 AD19

H5 K6 K5 J6 K4 L6 C2 L5 M6 M5 C1 M4

A2 D3 B2

R489 22

B1

Y14 AA10 Y12

Y13 Y11 AA12 AB12 AA14 AB14 AA13 AB11

AC15 AD15 AC16

AD16 AE15 AE14 AC13 AC14 AD12 AD13 AD14

A_DDR3_A[0] A_DDR3_A[1] A_DDR3_A[2] A_DDR3_A[3] A_DDR3_A[4] A_DDR3_A[5] A_DDR3_A[6] A_DDR3_A[7] A_DDR3_A[8] A_DDR3_A[9] A_DDR3_A[10] A_DDR3_A[11] A_DDR3_A[12] A_DDR3_A[13] A_DDR3_A[14]

A_DDR3_BA[0] A_DDR3_BA[1] A_DDR3_BA[2]

A_DDR3_MCLK A_DDR3_MCLKZ A_DDR3_MCLKE

A_DDR3_ODT A_DDR3_RASZ A_DDR3_CASZ A_DDR3_WEZ

A_DDR3_RESET

A_DDR3_DQSL A_DDR3_DQSLB

A_DDR3_DQSU A_DDR3_DQSUB

A_DDR3_DQML A_DDR3_DQMU

A_DDR3_DQL[0] A_DDR3_DQL[1] A_DDR3_DQL[2] A_DDR3_DQL[3] A_DDR3_DQL[4] A_DDR3_DQL[5] A_DDR3_DQL[6] A_DDR3_DQL[7]

A_DDR3_DQU[0] A_DDR3_DQU[1] A_DDR3_DQU[2] A_DDR3_DQU[3] A_DDR3_DQU[4] A_DDR3_DQU[5] A_DDR3_DQU[6] A_DDR3_DQU[7]

1000pF

AR401 22

1/16W

AR400 22

R486

1K

R476100

R491 100

READY

R492 33

BRAZIL DEMOD OPT

FE_TS_CLK FE_TS_VAL_ERR FE_TS_SYN

LGE2112-T8

A-MVREFCA

1/16W

R493 33

R419 33 R494 33

FE_TS_SERIAL

IC400

CLose to Saturn7LR IC

VCC_1.5V_DDR

DISP_EN

B_DDR3_A[0] B_DDR3_A[1] B_DDR3_A[2] B_DDR3_A[3] B_DDR3_A[4] B_DDR3_A[5] B_DDR3_A[6] B_DDR3_A[7] B_DDR3_A[8]

B_DDR3_A[9] B_DDR3_A[10] B_DDR3_A[11] B_DDR3_A[12] B_DDR3_A[13] B_DDR3_A[14]

B_DDR3_BA[0] B_DDR3_BA[1] B_DDR3_BA[2]

B_DDR3_MCLK B_DDR3_MCLKZ B_DDR3_MCLKE

B_DDR3_ODT B_DDR3_RASZ B_DDR3_CASZ

B_DDR3_WEZ

B_DDR3_RESET

B_DDR3_DQSL

B_DDR3_DQSLB

B_DDR3_DQSU

B_DDR3_DQSUB

B_DDR3_DQML B_DDR3_DQMU

B_DDR3_DQL[0] B_DDR3_DQL[1] B_DDR3_DQL[2] B_DDR3_DQL[3] B_DDR3_DQL[4] B_DDR3_DQL[5] B_DDR3_DQL[6] B_DDR3_DQL[7]

B_DDR3_DQU[0] B_DDR3_DQU[1] B_DDR3_DQU[2] B_DDR3_DQU[3] B_DDR3_DQU[4] B_DDR3_DQU[5] B_DDR3_DQU[6] B_DDR3_DQU[7]

R495

1K 1%

R496

1K 1%

/PF_WP /PF_CE0 /PF_CE1 /PF_OE /PF_WE PF_ALE /F_RB

AC_DET PM_TXD

5V_ON RL_ON PM_RXD

/FLASH_WP

MODEL_OPT_3

SPI_SCK

/SPI_CS

SPI_SDI SPI_SDO

B23 D25 F22 G22 E24 F21 E23 D22 D24 D21 C24 C25 F23 E21 D23

G20 F24 F20

G25 G23 F25

D20 B25 B24 A24

E20

K24 K25

J21 J20

H24 L20

L23 J24 L24 J23 M24 H23 M23 K23

G21 L22 H22 K20 H20 L21 H21 K21

0.1uF

C468

C467

1000pF

B-TMA0 B-TMA1 B-TMA2 B-TMA3 B-TMA4 B-TMA5 B-TMA6 B-TMA7 B-TMA8 B-TMA9 B-TMA10 B-TMA11 B-TMA12 B-TMA13 B-TMA14

B-TMBA0 B-TMBA1 B-TMBA2

B-TMCK B-TMCKB B-TMCKE

B-TMODT B-TMRASB B-TMCASB B-TMWEB

B-TMRESETB

B-TMDQSL B-TMDQSLB

B-TMDQSU B-TMDQSUB

B-TMDML B-TMDMU

B-TMDQL0 B-TMDQL1 B-TMDQL2 B-TMDQL3 B-TMDQL4 B-TMDQL5 B-TMDQL6 B-TMDQL7

B-TMDQU0 B-TMDQU1 B-TMDQU2 B-TMDQU3 B-TMDQU4 B-TMDQU5 B-TMDQU6 B-TMDQU7

B-MVREFCA

AC4

VIFP

AD3

VIFM

AC3

IP

AE3

IM

AD4 AC5

AD2 AE2

AE6 AD6

AD1 AC1

D7 D6

E3 E2

AC12 AE12

C8 D8 D9

B10 C9 B9

C10

AB9 AA11 Y9 AA9 AA7 AB8 Y8 Y10 AC7 AD7

W6 V6 V4 Y7 W5 U5

AD5

AE5 AC6

AA6 AB6

C6 C5

A6 C4

B5 C3 A3 B3 B4

N4

R499 33

T6 N5

R436

C430

4.7uF

1M

READY

C431 0.1uF C432

X400

24MHz

C433

1uF

SIFP SIFM

XIN

XOUT

AUL0 AUR0 AUL1 AUR1 AUL2 AUR2 AUL3 AUR3 AUL4 AUR4

ARC0

0.1uF

C447 22pF

C448

22pF

R45722 R458100

R459 22

C437 2.2uF C438

C441 2.2uF C442 C443 C444 2.2uF C445 2.2uF C446 2.2uF

C449

0.1uF

DSUB_DET

AV_CVBS2_DET

C488 0.047uF

READY

R462 47 R463 47

2.2uF

C453

10uF

GND

R465

3.3K

TU_SIF

C462

1000pF

READY

TU_SCL

TU_SDA

+3.3V_AVDD

R466

3.3K P_SDA

SPDIF_OUT

SIDE_USB_DM

SIDE_USB_DP

SUB_SDA

SUB_SCL

P_SCL

AUD_SCK AUD_MASTER_CLK AUD_LRCH

AUD_LRCK

AV_LIN_COM1 AV_RIN_COM1

SIDEAV_L_IN SIDEAV_R_IN

AV_LIN_COM2

AV_RIN_COM2 PC_L_IN PC_R_IN

IR

HDMI_ARC

SOC_RESET

+3.3V_AVDD

R468

2.2K

R469

2.2K

PCM_A[0-7]

I2C_SCL I2C_SDA

AMP_RESET_N

UART_TXD UART_RXD

S7_TXD S7_RXD

RGB_DDC_SDA RGB_DDC_SCL

PWM0 PWM1

COMP2_DET

LED_RED

KEY1 KEY2

TOUCH_VER_CHK

AMP_MUTE

USB1_CTL USB1_OCD

3D_RF_TXD 3D_RF_RXD

PCM_A[0] PCM_A[1] PCM_A[2] PCM_A[3] PCM_A[4] PCM_A[5] PCM_A[6] PCM_A[7]

LGE 8300_RESET

22 R479 22 R480 22

R474 22 R475 22

R483 22 R484 22

3D_SYNC

3D_GPIO_0 3D_GPIO_1 3D_GPIO_2

3D_RF_RESET

SOC_RESET

+3.3V_AVDD

R454

1K

R447

R451

1K

READY

1K

R442

1K

R443

1K

READY

R448

READY

1K

R452

1K

READY

1K

R455

READY

1K

AUD_SCK AUD_MASTER_CLK PWM1

PWM0 LED_RED

R444

R445

POWER

+1.10V_VDDC

+1.5V_DDR_IN

C469 1000pF

LVDS

AMP_DEMOD_SCL AMP_DEMOD_SDA

+2.5V_AVDD

+3.3V_ST

+3.3V_AVDD

L411

120-ohm

Main

VDDC : 2026mA

MIUVDDC

L403

C423

120-ohm

10uF

Main

L404

120-ohm

Main

L405

C455

Main

120-ohm

0.1uF

L406 Main

L407 Main

CLOSE TO MAIN IC

C434

AVDD33

10uF

L408

CLOSE TO MAIN IC

Main

AU33:31mA

C435

10uF

L409 Main

VDD33_T/VDDP/U3_VD33_2:47mA VDD33_NAND

C436

10uF

AVDD_DDR0:55mA AVDD_DDR1:55mA

C424

10uF

CLOSE TO MAIN IC

5V_DET_HDMI_1 5V_DET_HDMI_2 5V_DET_HDMI_3

COMP1_DET

ERROR_DET

TUNER_RESET

DEMOD_RESET

FE_BOOSTER_CTL

RF_SWITCH_CTL

SIDEAV_DET

CLOSE TO MAIN IC

C454

0.1uF FB_CORE

AVDD2P5:172mA

AVDD25_PGA:13mA

L412

120-ohm

Main

C456

0.1uF

AVDD_NODIE:7.362mA

C457

0.1uF

C458

0.1uF

CLOSE TO MAIN IC

C459

0.1uF

CLOSE TO MAIN IC

0.1uF

1uF

C461

C460

C1410 0.1uF C1411 0.1uF

C1412 0.1uF C1413 10uF C1414 10uF

C1416 0.1uF



C1419 0.1uF C1420 0.1uF C1421 10uF

C1402 0.1uF

C1401 0.1uF

C471 0.1uF

C473 0.1uF C474 10uF

C475

C477 0.1uF

C478 0.1uF C479 0.1uF

C485 10uF

C487 0.1uF

C490 0.1uF C494 10uF

C497 0.1uF C498 0.1uF

C499 10uF

C1400 10uF

C7

GPIO36

E6

GPIO37

F5

GPIO38

B6

GPIO39

E5

GPIO40

D5

GPIO41

B7

GPIO42

E7

GPIO45

F7

GPIO46

AB5

GPIO49

AB3

GPIO50

A9

GPIO51

F4

GPIO52

AB1

I2C_SCKM0/GPIO53

N6

I2C_SDAM0/GPIO54

AB2

GPIO73

AC2

GPIO74

10uFC1415

1uF

10uFC486

0.1uF C463

IC400

LGE2112-T8

IC400

LGE2112-T8

K12

AVDDLV_USB

G9

VDDC_1

H9

VDDC_2

K10

VDDC_3

K11

VDDC_4

L10

VDDC_5

M12

VDDC_6

M13

VDDC_7

N12

VDDC_8

P14

VDDC_9

P15

VDDC_10

R10

VDDC_11

R14

VDDC_12

R15

VDDC_13

T10

VDDC_14

P10

AVDD1P0

P19

FB_CORE

R16

AVDDL_MOD

L11

AVDD10_LAN

M14

DVDD_DDR

W9

AVDD2P5_ADC_1

W10

AVDD2P5_ADC_2

W11

AVDD2P5_ADC_3

W12

AVDD25_REF

Y17

AVDD25_LAN

V18

AVDD_MOD_1

U19

AVDD_MOD_2

W14

AVDD25_PGA

W15

AVSS_PGA

U7

AVDD_NODIE

L7

AVDD_DVI_USB_1

M7

AVDD_DVI_USB_2

P7

AVDD3P3_MPLL

R7

AVDD_DMPLL

M19

DVDD_NODIE

V7

AVDD_AU33

W7

AVDD_EAR33

R19

VDDP_1

T19

VDDP_2

W18

AVDD_LPLL_1

W19

AVDD_LPLL_2

V19

VDDP_NAND

J17

AVDD_DDR0_D_1

K15

AVDD_DDR0_D_2

K16

AVDD_DDR0_D_3

L15

AVDD_DDR0_C

K17

AVDD_DDR1_D_1

L17

AVDD_DDR1_D_2

M17

AVDD_DDR1_D_3

L16

AVDD_DDR1_C

E9

GND_EFUSE

A23

GND_1

B17

GND_2

C23

GND_3

A5

GND_4

C11

GND_5

C19

GND_6

C22

GND_7

D14

GND_8

D18

GND_9

D19

GND_10

E17

GND_11

E18

GND_12

E19

GND_13

E22

GND_14

F8

GND_15

F17

GND_16

F18

GND_17

F19

GND_18

G8

GND_19

H8

GND_20

N22

GND_21

N21

GND_22

N20

GND_23

M22

GND_24

M21

GND_25

M20

GND_26

F10

GND_27

V15

GND_28

W16

GND_29

V8

GND_30

T18

GND_31

NEED TO SWAP LVDS POLARITY

AB25

LVA0P

AB23

LVA0N

AC25

LVA1P

AB24

LVA1N

AD25

LVA2P

AC24

LVA2N

AE23

LVA3P

AC23

LVA3N

AC22

LVA4P

AD23

LVA4N

V23

LVB0P

U24

LVB0N

V25

LVB1P

V24

LVB1N

W25

LVB2P

W23

LVB2N

AA23

LVB3P

Y24

LVB3N

AA25

LVB4P

AA24

LVB4N

AE24

LVACKP

AD24

LVACKN

Y23

LVBCKP

W24

LVBCKN

T25

GPIO196

U23

GPIO193

T24

GPIO194

T23

GPIO195

GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79 GND_80 GND_81 GND_82 GND_83 GND_84 GND_85 GND_86 GND_87 GND_88 GND_89 GND_90 GND_91 GND_92 GND_93 GND_94 GND_95 GND_96 GND_97 GND_98

GND_99 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136

G10 G11 G12 G13 G14 G17 G18 G19 G24 H11 H12 H13 H14 H15 H16 H17 H18 H19 J9 J10 J11 J12 J13 J14 J15 J16 J18 J19 J25 K9 K13 K14 H10 K18 K19 K22 L8 L9 J8 L12 L13 L18 L19 M8 K8 M10 M11 L14 M15 M16 M18 M25 N10 N11 N13 N14 N15 N16 N17 N19 K7 P8 P9 M9 P11 P13 P16 P17 P18 P12 R8 R9 R11 R12 R13 R17 T8 T9 N7 T11 T12 T13 T14 T15 T16 T17 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 R18 V9 V10 V11 V12 V14 V17 T7 E8

TA2P TA2N TB2P TB2N TC2P TC2N TD2P TD2N TE2P TE2N

TA1P TA1N TB1P TB1N TC1P TC1N TD1P TD1N TE1P TE1N

TCLK2P TCLK2N TCLK1P TCLK1N

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP4 LM1 20110531

RGB/RS232/PC/USA IR

SUB IR

3 7

VCC_1.5V_DDR

LGE Internal Use Only

R502

1K 1%

R503

1K 1%

VCC_1.5V_DDR

R500

1K 1%

R501

1K 1%

C501

0.1uF

C500

0.1uF

A-MVREFCA

A-MVREFDQ

C503

1000pF

C524 10uF C525 0.1uF C526 0.1uF C527 0.1uF C528 0.1uF

0.1uF

C529 C530 0.1uF C531 0.1uF C532 0.1uF C533 0.1uF

A-TMA14

B-MVREFCA

B-MVREFDQ

C502

1000pF

C506 10uF C507 0.1uF C508 0.1uF C509 0.1uF C510 0.1uF C511 0.1uF C512 0.1uF C513 0.1uF C514 0.1uF C515 0.1uF

B-TMA14

IC501

H5TQ1G63DFR-H9C

A10/AP

A12/BC

RESET

A10/AP

A12/BC

NC_5

RESET

DQSL DQSL

DQSU DQSU

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

NC_5

DQSL DQSL

DQSU DQSU

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

A11

A13

BA0 BA1 BA2

CKE

ODT RAS CAS

DML DMU

N3

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9

A11

A13

BA0 BA1 BA2

CK CK

CKE

CS ODT RAS CAS

WE

DML DMU

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9

CK CK

CS

WE

A-TMA0

P7

A-TMA1

P3

A-TMA2

N2

A-TMA3

P8

A-TMA4

P2

A-TMA5

R8

A-TMA6

R2

A-TMA7

T8

A-TMA8

R3

A-TMA9

L7

A-TMA10

R7

A-TMA11

N7

A-TMA12

T3

A-TMA13

M7

M2

A-TMBA0

N8

A-TMBA1

M3

A-TMBA2

J7 K7 K9

A-TMCKE

L2 K1

A-TMODT

J3

A-TMRASB

K3

A-TMCASB

L3

A-TMWEB

T2

F3

A-TMDQSL

G3

A-TMDQSLB

C7

A-TMDQSU

B7

A-TMDQSUB

E7

A-TMDML

D3

A-TMDMU

E3

A-TMDQL0

F7

A-TMDQL1

F2

A-TMDQL2

F8

A-TMDQL3

H3

A-TMDQL4

H8

A-TMDQL5

G2

A-TMDQL6

H7

A-TMDQL7

D7

A-TMDQU0

C3

A-TMDQU1

C8

A-TMDQU2

C2

A-TMDQU3

A7

A-TMDQU4

A2

A-TMDQU5

B8

A-TMDQU6

A3

A-TMDQU7

N3

B-TMA0

P7

B-TMA1

P3

B-TMA2

N2

B-TMA3

P8

B-TMA4

P2

B-TMA5

R8

B-TMA6

R2

B-TMA7

T8

B-TMA8

R3

B-TMA9

L7

B-TMA10

R7

B-TMA11

N7

B-TMA12

T3

B-TMA13

R509

A-TMRESETB

56 1%

VCC_1.5V_DDR

R506 10K

M7

M2

B-TMBA0

N8

B-TMBA1

M3

B-TMBA2

J7 K7 K9

B-TMCKE

L2 K1

B-TMODT

J3

B-TMRASB

K3

B-TMCASB

L3

B-TMWEB

T2

F3

B-TMDQSL

G3

B-TMDQSLB

C7

B-TMDQSU

B7

B-TMDQSUB

E7

B-TMDML

D3

B-TMDMU

E3

B-TMDQL0

F7

B-TMDQL1

F2

B-TMDQL2

F8

B-TMDQL3

H3

B-TMDQL4

H8

B-TMDQL5

G2

B-TMDQL6

H7

B-TMDQL7

D7

B-TMDQU0

C3

B-TMDQU1

C8

B-TMDQU2

C2

B-TMDQU3

A7

B-TMDQU4

A2

B-TMDQU5

B8

B-TMDQU6

A3

B-TMDQU7

B-TMRESETB

R508

56 1%

R507 10K

R511

56 1%

C543

0.01uF 50V

R510

56 1%

C542

0.01uF 50V

VCC_1.5V_DDR

A-TMCK A-TMCKB

B-TMCK B-TMCKB

+1.5V_DDR_IN

M8

VREFCA

H1

VREFDQ

R505

L8

ZQ 240 1%

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

IC500

H5TQ1G63DFR-H9C

M8

VREFCA

H1

VREFDQ

R504

L8

ZQ

240

1%

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

DDR3 Memory 1GBit x 2

L500

C544

500

10uF

Main

10V

Hynix 2nd

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3

M7

M2 N8 M3

J7 K7 K9

L2 K1 J3 K3 L3

T2

F3 G3

C7 B7

E7 D3

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

SS N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3

M7

M2 N8 M3

J7 K7 K9

L2 K1 J3 K3 L3

T2

F3 G3

C7 B7

E7 D3

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

Hynix 2nd

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3

M7

M2 N8 M3

J7 K7 K9

L2 K1 J3 K3 L3

T2

F3 G3

C7 B7

E7 D3

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

SS N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3

M7

M2 N8 M3

J7 K7 K9

L2 K1 J3 K3 L3

T2

F3 G3

C7 B7

E7 D3

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

H5TQ1G63DFR-H9C

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13

NC_5

BA0 BA1 BA2

CK CK CKE

CS ODT RAS CAS WE

RESET

DQSL DQSL

DQSU DQSU

DML DMU

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

K4B1G1646G-BCH9

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13

NC_5

BA0 BA1 BA2

CK CK CKE

CS ODT RAS CAS WE

RESET

DQSL DQSL

DQSU DQSU

DML DMU

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

IC501-*1

H5TQ1G63DFR-H9C

A0

VREFCA A1 A2 A3

VREFDQ A4 A5 A6 A7 A8 A9

VDD_1 A10/AP

VDD_2 A11

VDD_3 A12/BC

VDD_4 A13

VDD_5

VDD_6 NC_5

VDD_7

VDD_8 BA0

VDD_9 BA1 BA2

VDDQ_1 CK

VDDQ_2 CK

VDDQ_3 CKE

VDDQ_4

VDDQ_5 CS

VDDQ_6 ODT

VDDQ_7 RAS

VDDQ_8 CAS

VDDQ_9 WE

NC_1

RESET

NC_2 NC_3 NC_4

DQSL

NC_6

DQSL

DQSU

VSS_1 DQSU

VSS_2

VSS_3 DML

VSS_4 DMU

VSS_5

VSS_6 DQL0

VSS_7 DQL1

VSS_8 DQL2

VSS_9 DQL3

VSS_10 DQL4

VSS_11 DQL5

VSS_12 DQL6 DQL7

VSSQ_1 DQU0

VSSQ_2 DQU1

VSSQ_3 DQU2

VSSQ_4 DQU3

VSSQ_5 DQU4

VSSQ_6 DQU5

VSSQ_7 DQU6

VSSQ_8 DQU7

VSSQ_9

IC501-*2

K4B1G1646G-BCH9

A0

VREFCA A1 A2 A3

VREFDQ A4 A5 A6 A7 A8 A9

VDD_1 A10/AP

VDD_2 A11

VDD_3 A12/BC

VDD_4 A13

VDD_5

VDD_6 NC_5

VDD_7

VDD_8 BA0

VDD_9 BA1 BA2

VDDQ_1 CK

VDDQ_2 CK

VDDQ_3 CKE

VDDQ_4

VDDQ_5 CS

VDDQ_6 ODT

VDDQ_7 RAS

VDDQ_8 CAS

VDDQ_9 WE

NC_1

RESET

NC_2 NC_3 NC_4

DQSL

NC_6

DQSL

DQSU

VSS_1 DQSU

VSS_2

VSS_3 DML

VSS_4 DMU

VSS_5

VSS_6 DQL0

VSS_7 DQL1

VSS_8 DQL2

VSS_9 DQL3

VSS_10 DQL4

VSS_11 DQL5

VSS_12 DQL6 DQL7

VSSQ_1 DQU0

VSSQ_2 DQU1

VSSQ_3 DQU2

VSSQ_4 DQU3

VSSQ_5 DQU4

VSSQ_6 DQU5

VSSQ_7 DQU6

VSSQ_8 DQU7

VSSQ_9

IC500-*1

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

IC500-*2

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

VCC_1.5V_DDR

C545

0.1uF 16V

M8

H1

L8

ZQ

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

J1 J9 L1 L9 T7

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

M8

H1

L8

ZQ

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

J1 J9 L1 L9 T7

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

NAND Flash 1GBit

/F_RB

/PF_OE

/PF_CE0

IC504-*1

K9F1G08U0D-SCB0

SS

NC_1

1

NC_2

2

NC_3

3

NC_4

4

NC_5

5

NC_6

6

R/B

7

RE

8

CE

9

NC_7

10

NC_8

11

VCC_1

12

VSS_1

13

NC_9

14

NC_10

15

CLE

16

ALE

17

WE

18

WP

19

NC_11

20

NC_12

21

NC_13

22

NC_14

23

NC_15

24

SERIAL FLASH 8MBit

IC505-*1

MX25L8006EM2I-12G

MX

VCC

CS#

8

1

SO/SIO1

HOLD#

7

2

SCLK

WP#

6

3

SI/SIO0

GND

5

4

EEPROM 1MBit

IC503-*1

M24256-BRMN6TP

SGS

E0

VCC

1

8

WC

E1

7

2

SCL

E2

6

3

VSS

SDA

4

5

HDCP EEPROM 8KBit

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

NC_29

NC_28

NC_27

NC_26

I/O7

I/O6

I/O5

I/O4

NC_25

NC_24

NC_23

VCC_2

VSS_2

NC_22

NC_21

NC_20

I/O3

I/O2

I/O1

I/O0

NC_19

NC_18

NC_17

NC_16

/FLASH_WP

R522

1K

READY

R523

1K

/PF_CE1

PF_ALE

/PF_WE

/PF_WP

R524

1K

+3.3V_ST

R521

10K

GND

CAT24C08WI-GT3-H-RECV(TV)

R520

4.7K

NC_1

NC_2

A2

VSS

+3.3V_AVDD

R525

4.7K

C546

0.1uF

R512

3.3K

+3.3V_ST

R526

4.7K

READY

/SPI_CS

SPI_SDO

IC503

AT24C256C-SSHL-T

A0

1

A1

2

A2

3

4

IC502

VCC

1

8

WP

2

7

SCL

3

6

SDA

4

5

H27U1G8F2BTR-BC

NC_1

1

NC_2

2

NC_3

3

NC_4

4

NC_5

5

NC_6

6

R/B

7

RE

8

CE

9

NC_7

10

NC_8

11

VCC_1

12

VSS_1

13

NC_9

14

NC_10

15

CLE

16

ALE

17

WE

18

WP

19

NC_11

20

NC_12

21

NC_13

22

NC_14

23

NC_15

24

DO[IO1]

%WP[IO2]

GND

C548

0.1uF

VCC

8

WP

7

SCL

6

SDA

5

C547 10pF

READY

+3.3V_AVDD

R527 4.7K

IC504

IC505

W25Q80BVSSIG

CS

1

2

3

4

+3.3V_AVDD

C549 10pF

READY

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

8

7

6

5

NC_29

NC_28

NC_27

NC_26

I/O7

I/O6

I/O5

I/O4

NC_25

NC_24

NC_23

VCC_2

VSS_2

NC_22

NC_21

NC_20

I/O3

I/O2

I/O1

I/O0

NC_19

NC_18

NC_17

NC_16

VCC

HOLD[IO3]

CLK

DI[IO0]

I2C_SCL

I2C_SDA

+3.3V_AVDD

AR500

C550

10uF

10V

C551

0.1uF

AR501

+3.3V_ST

I2C_SCL

I2C_SDA

C552

0.1uF

PCM_A[7]

PCM_A[6]

PCM_A[5]

PCM_A[4]

22

PCM_A[3]

PCM_A[2]

PCM_A[1]

PCM_A[0]

22

SPI_SCK

SPI_SDI

Addr:10101--

PCM_A[0-7]

A0’h

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP4 LM1 20110810

CVBS/COMP/SPDIF JACK

4

7

RL_ON

LGE Internal Use Only

5V_ON

C603

0.1uF 16V

+3.3V_ST

R600

10K

0.1uF

C604 16V

P600

SMAW200-H18S1

1 3 5 7 9

10 12

11

14

13

16

15

18

17

19

Power Wafer

2 4 6 8

C607

0.1uF 16V

C608

0.1uF 16V

P_17V

L601

120-ohm

ERROR_DET

120-ohm

AC_DET

C609 10uF 10V

+5V

C612

0.1uF 16V

+5V_ST

L608

READY

C644 10uF 10V

READY

AP2121N-3.3TRE1

VIN

3

C645

0.1uF 16V

READY

IC608

READY

1

GND

+3.3V_TU

VOUT

2

READY

C650 1uF

6.3V

READY

L609

+3.3V_DE

L610

READY

+3.3V

C602

0.1uF 16V

L600

120-ohm

Power Main

+3.3V Multi

C627

0.1uF 16V

+3.3V_TU

L611

+3.3V

C623 10uF

6.3V

R2

IC604

AP1117EG-13

IN

3

R605

150

R606

C648 10uF

25V

+5V

C617 10uF 25V

C618

0.1uF 50V

+3.3V

IC603

C622 3300pF 50V

VREG5

TPS54327DDAR

EN

1

VFB

2

3

SS

4

R601

10K

R603 59K

R1

1%

C619

22pF

50V

R604

17.4K 1%

R2

C621 1uF 10V

9

THERMAL

8

7

6

5

[EP]GND

VIN

VBST

SW

GND

C624

NR5040T2R2N

0.1uF 50V

L603

2.2uH

C649 10uF

C626 10uF

16V

3.3V_AVDD / 2.5AVDD

+3.3V_AVDD

C605

C606

0.1uF

10uF

16V

6.3V

+1.5V_DDR_IN

OUT

2

1%

75 1%

1

ADJ/GND

R607 1K 1%

R608 1

C625 22uF

R1

6.3V

Vout=1.25*(1+R2/R1)

IC601

TJ3940S-2.5V-3L

VIN

3

1

1.53V DDR

3.3Vst

+2.5V_AVDD

VOUT

2

GND

R602 1

C611 10uF

6.3V

+5V_ST

C615 10uF 10V

AP2121N-3.3TRE1

VIN

3

C616

0.1uF 16V

IC602

1

GND

+3.3V_ST

VOUT

2

C620 1uF

6.3VL602

C610

P_17V

10uF

25V

C600 10uF 25V

C601

0.1uF 50V

1

R615

1.2K

ADJ/GND

R1

1.26V Tuner

+1.2V_DE

R2

R616 10

Vout=0.765*(1+R1/R2)

+3.3V_TU

L604

120-ohm

2A

+3.3V_DE

C631 10uF

6.3V

AZ1117BH-ADJTRE1

INPUT

3

OUTPUT

R614

C634

0.1uF 16V

IC606

2

1

Vout=1.25*(1+R2/R1)

1.24V Core

R2 R609

+5V_TU

+5V

C647 10uF

16V

+1.10V_VDDC

C637

C636 10uF

0.1uF

16V

330

C646

10uF

C628

C629

10uF

0.1uF

25V

READY

R623

50V

R1

R611

R612

100

62K

1%

C630 100pF

50V

0

R613

R2

100K

R618

10K

1%

C632

C633

1uF

3300pF

10V

50V

25V

TPS54327DDAR

EN

VFB

VREG5

SS

IC605

1

2

3

4

9

THERMAL

8

7

6

5

[EP]GND

VIN

VBST

SW

GND

C635

0.1uF

50V

L605

NR5040T3R3N

3.3uH

IC607

C643

0.1uF 16V

AZ1117BH-ADJTRE1

INPUT

3

2

OUTPUT

R619

1

C651

0.1uF 16V

Vout=1.25*(1+R2/R1)

1

110

ADJ/GND

R1

R610

L606 NR5040T3R3N

3.3uH

C613 10uF

16V

C642 10uF

7V

16V

IC600

C640 3300pF 50V

VREG5

TPS54327DDAR

EN

1

VFB

2

3

SS

4

R617

10K

7V

1%

R620

R1

180K

C638 22pF

50V

R621

22K

1%

R2

C639 1uF 10V

9

THERMAL

8

7

6

5

[EP]GND

VIN

VBST

SW

GND

C641

0.1uF 50V

Vout=0.765*(1+R1/R2)

FB_CORE

Vout=0.765*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP4 LM1 20110531

POWER

5

7