LG 42LX6500, 42LX6800 Schematic

INPUT

MENU

P

OK

LED LCD TV

SERVICE MANUAL

CAUTION

BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

CHASSIS : LD03R

MODEL: 42LX6500/650N 42X6500/650N-ZD

MODEL: 42LX6800/6900 42X6800/6900-ZD

North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com

Internal Use Only

Printed in KoreaP/NO : MFL63748401 (1006-REV01)

- 2 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

CONTENTS

CONTENTS .............................................................................................. 2

PRODUCT SAFETY ................................................................................. 3

SPECIFICATION ....................................................................................... 4

ADJUSTMENT INSTRUCTION ................................................................ 8

BLOCK DIAGRAM.................................................................................. 17

EXPLODED VIEW .................................................................................. 19

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

- 3 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

SAFETY PRECAUTIONS

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.

It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.

Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to

0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit

1.5 Kohm/10W

To Instrument's
exposed
METALLIC PARTS

Good Earth Ground
such as WATER PIPE,
CONDUIT etc.

AC Volt-meter

When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1

*Base on Adjustment standard

IMPORTANT SAFETY NOTICE

0.15 uF

Ω

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LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement

.

4. Module General Specification

1. Application range

This specification is applied to the LCD TV used LD03R
chassis.

2. Requirement for Test

Each part is tested as below without special appointment.

1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC

2) Relative Humidity : 65 % ± 10 %

3) Power Voltage
: Standard input voltage (AC 100-240 V~ 50 / 60 Hz)
* Standard Voltage of each products is marked by models.

4) Specification and performance of each parts are followed

each drawing and specification by part number in
accordance with BOM.

5) The receiver must be operated for about 5 minutes prior to

the adjustment.

3. Test method

1) Performance: LGE TV test method followed

2) Demanded other specification

- Safety : CE, IEC specification

- EMC :CE, IEC

No. Item Specification Remark

1 Display Screen Device 107 cm(42 inch) wide color display module

2 Aspect Ratio 16:9

3 LCD Module 107 cm(42 inch) TFT LCD FHD 240 Hz(Edge)

4 Operating Environment Temp. : 0 deg ~ 50 deg

Humidity : 20 % ~ 90 %

5 Storage Environment Temp. : -20 deg ~ 60 deg

Humidity : 10 ~ 90 %

6 Input Voltage AC 100-240V~, 50 / 60Hz

7 Power Consumption Power on (White) LCD (Module) + Backlight(EDGE LED)

LGD Typ : 112.2(Edge)

8 Module Size 973.2 (H) x 566.2 (V) x 10.8 mm(D)

8 Pixel Pitch 0.4845 (H) x 0.4845 (V)

9 Back Light LED(EDGE)

10 Display Colors 1.06 B(true) colors

11 Coating 3H

- 5 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

5. Module optical specification

1) Standard Test Condition(The unit has been ‘ON’).

2) Stable for approximately 60 minutes in a dark environment at 25 ºC.

3) The values specified are at approximate distance 50 cm from the LCD surface.

No. Item Specification Min. Typ. Max. Remark

1. Viewing Angle [CR>10] Right/Left/Up/Down 89 CR > 10

2. Luminance 2D Luminance (cd/m

2

) 360 450

Variation 1.3 MAX /MIN

3D Luminance (cd/m

2

)48 61

3. Contrast Ratio CR 1000 1300

4. 3D Cross talk % 14 18

5. CIE Color Coordinates White Wx 0.279

Wy 0.292

RED Xr 0.642

Yr Typ. 0.335 Typ.

Green Xg -0.03 0.308 +0.03

Yg 0.602

Blue Xb 0.156

Yb 0.061

6. Component Video Input (Y, CB/PB, CR/PR)

No.

Specification

Remark

Resolution H-freq(kHz) V-freq(Hz)

1. 720x480 15.73 60.00 SDTV,DVD 480i

2. 720x480 15.63 59.94 SDTV,DVD 480i

3. 720x480 31.47 59.94 480p

4. 720x480 31.50 60.00 480p

5. 720x576 15.625 50.00 SDTV,DVD 625 Line

6. 720x576 31.25 50.00 HDTV 576p

7. 1280x720 45.00 50.00 HDTV 720p

8. 1280x720 44.96 59.94 HDTV 720p

9. 1280x720 45.00 60.00 HDTV 720p

10. 1920x1080 31.25 50.00 HDTV 1080i

11. 1920x1080 33.75 60.00 HDTV 1080i

12. 1920x1080 33.72 59.94 HDTV 1080i

13. 1920x1080 56.250 50 HDTV 1080p

14. 1920x1080 67.5 60 HDTV 1080p

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LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

No.

Specification

Proposed Remarks

Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)

1. 720*400 31.468 70.08 28.321 For only DOS mode

2. 640*480 31.469 59.94 25.17 VESA Input 848*480 60 Hz, 852*480 60 Hz

-> 640*480 60 Hz Display

3. 800*600 37.879 60.31 40.00 VESA

4. 1024*768 48.363 60.00 65.00 VESA(XGA)

5. 1280*768 47.78 59.87 79.5 WXGA

6. 1360*768 47.72 59.8 84.75 WXGA

7. 1280*1024 63.595 60.0 108.875 SXGA FHD model

8. 1920*1080 66.587 59.93 138.625 WUXGA FHD model

7. RGB (PC)

8. HDMI Input

(1) DTV Mode

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark

1. 720*400 31.468 70.08 28.321 HDCP

2. 640*480 31.469 59.94 25.17 VESA HDCP

3. 800*600 37.879 60.31 40.00 VESA HDCP

4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP

5. 1280*768 47.78 59.87 79.5 WXGA HDCP

6. 1360*768 47.72 59.8 84.75 WXGA HDCP

7. 1280*1024 63.595 60.0 108.875 SXGA HDCP/FHD model

8. 1920*1080 67.5 60.00 138.625 WUXGA HDCP/FHD model

(2) PC Mode

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark

1. 720*480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P

2. 720*576 31.25 50 54 SDTV 576P

3. 1280*720 37.500 50 74.25 HDTV 720P

4. 1280*720 44.96 /45 59.94 /60 74.17/74.25 HDTV 720P

5. 1920*1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I

6. 1920*1080 28.125 50.00 74.25 HDTV 1080I

7. 1920*1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P

8. 1920*1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P

9. 1920*1080 56.250 50 148.5 HDTV 1080P

10. 1920*1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P

- 7 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

9. 3D Mode - HDMI & USB

(1) HDMI Input (1.4)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1920*1080 53.95 / 54 23.98 / 24 148.35/148.5 HDTV 1080P Frame packing

2 1280*720 89.9 / 90 59.94/60 148.35/148.5 HDTV 720P Frame packing

3 1280*720 75 50 148.5 HDTV 720P Frame packing

4 1920*1080 67.5 60 148.5 HDTV 1080P Side by Side(half), Top and bottom

5 1920*1080 56.3 50 148.5 HDTV 1080P Side by Side(half), Top and bottom

6 1280*720 45 60 74.25 HDTV 720P Side by Side(half), Top and Bottom

7 1280*720 37.5 50 74.25 HDTV 720P Side by Side(half), Top and Bottom

8 1920*1080 33.7 60 74.25 HDTV 1080i Side by Side(half), Top and Bottom

9 1920*1080 28.1 50 74.25 HDTV 1080i Side by Side(half), Top and Bottom

10 1920*1080 27 24 74.25 HDTV 1080P Side by Side(half), Top and Bottom

11 1920*1080 33.7 30 89.1 HDTV 1080P Side by Side(half), Top and Bottom

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1280*720 45.00 60.00 74.25 HDTV 720P Side by Side, Top & Bottom

2 1280*720 37.500 50 74.25 HDTV 720P Side by Side, Top & Bottom

3 1920*1080 33.75 60.00 74.25 HDTV 1080I Side by Side, Top & Bottom

4 1920*1080 28.125 50.00 74.25 HDTV 1080I Side by Side, Top & Bottom

5 1920*1080 27.00 24.00 74.25 HDTV 1080P Side by Side, Top & Bottom,

Checkerboard

6 1920*1080 33.75 30.00 74.25 HDTV 1080P Side by Side, Top & Bottom,

Checkerboard

7 1920*1080 67.50 60.00 148.5 HDTV 1080P Side by Side, Top & Bottom,

Checkerboard, Single Frame Sequential

8 1920*1080 56.250 50 148.5 HDTV 1080P Side by Side, Top & Bottom,

Checkerboard, Single Frame Sequential

(2) HDMI Input (1.3)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Remark

1. 1920*1080 33.75 30.000 74.25 Side by Side HDTV 1080P

Top & Bottom

Checkerboard

(3) USB Input

No. Side by Side Top & Bottom Checkerboard Single Frame Sequential Frame Packing

1.

(4) 3D Input mode

RL

L

- 8 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

ADJUSTMENT INSTRUCTION

1. Application Range

This specification sheet is applied to all of the LCD TV with
LD03R chassis.

2. Designation

(1) Because this is not a hot chassis, it is not necessary to use

an isolation transformer. However, the use of isolation

transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of

25 ºC ± 5 ºC of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.

(4) The input voltage of the receiver must keep AC 100-240

V~ 50 / 60Hz.
(5) The receiver must be operated for about 5 minutes prior to

the adjustment when module is in the circumstance of over

15.

In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours

In case of keeping module is in the circumstance of below ­20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.

[Caution]
When still image is displayed for a period of 20 minutes or
longer (especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.

3. Automatic Adjustment

3.1. ADC Adjustment

(1) Overview

ADC adjustment is needed to find the optimum black level
and gain in Analog-to-Digital device and to compensate
RGB deviation.

(2) Equipment & Condition

1) Jig (RS-232C protocol)

2) MSPG-925 Series Pattern Generator(MSPG-925FA,
pattern - 65)

- Resolution : 480i Comp1
1080P Comp1
1920*1080 RGB

- Pattern : Horizontal 100% Color Bar Pattern

- Pattern level : 0.7±0.1 Vp-p

- Image

(3) Adjustment

1) Adjustment method

- Using RS-232, adjust items listed in 3.1 in the other
shown in “3.1.(3).3)”

2) Adj. protocol

Ref.) ADC Adj. RS232C Protocol_Ver1.0

3) Adj. order

- aa 00 00 [Enter ADC adj. mode]

- xb 00 04 [Change input source to Component1(480i&1080p)]

- ad 00 10 [Adjust 480i Comp1]

- xb 00 06 [Change input source to RGB(1024*768)]

- ad 00 10 [Adjust 1024*768 RGB]

- ad 00 90 End adj.

3.2. MAC Address

(1) Equipment & Condition

- Play file: Serial.exe

- MAC Address edit

- Input Start / End MAC address

(2) Download method

1) Communication Prot connection

Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port

Protocol Command Set ACK

Enter adj. mode aa 00 00 a 00 OK00x

Source change xb 00 40 b 00 OK40x (Adjust 480i, 1080p Comp1 )

xb 00 60 b 00 OK60x (Adjust 1920*1080 RGB)

Begin adj. ad 00 10

Return adj. result OKx (Case of Success)

NGx (Case of Fail)

Read adj. data (main) (main)

ad 00 20 000000000000000000000000007c007b006dx

(sub) (Sub)

ad 00 21 000000070000000000000000007c00830077x

Confirm adj. ad 00 99 NG 03 00x (Fail)

NG 03 01x (Fail)

NG 03 02x (Fail)

OK 03 03x (Success)

End adj. aa 00 90 a 00 OK90x

PCBA

PC(RS-232C)

RS-232C Por t

- 9 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

2) MAC Address Download

- Com 1,2,3,4 and 115200(Baud rate)

- Port connection button click(1)

- Load button click(2) for MAC Address write.

- Start MAC Address write button(3)

- Check the OK Or NG

3.3. LAN

(1) Equipment & Condition

A Each other connection to LAN Port of IP Hub and Jig

(2) LAN inspection solution

A LAN Port connection with PCB
A Network setting at MENU Mode of TV
A setting automatic IP
A Setting state confirmation

-> If automatic setting is finished, you confirm IP and
MAC Address.

3.4. LAN PORT INSPECTION(PING TEST)

Connect SET -> LAN port == PC -> LAN Port

(1) Equipment setting

1) Play the LAN Port Test PROGRAM.

2) Input IP set up for an inspection to Test
Program.
*IP Number : 12.12.2.2

(2) LAN PORT inspection (PING TEST)

1) Play the LAN Port Test Program.

2) Connect each other LAN Port Jack.

3) Play Test (F9) button and confirm OK Message.

4) Remove LAN CABLE

3.5. V-COM Adjust(Only LGD(M+S) Module)

- Why need Vcom adjustment?

A The Vcom (Common Voltage) is a Reference Voltage of

Liquid Crystal Driving.

-> Liquid Crystal need for Polarity Change with every frame.

Row Li ne

Column Li ne

CLC

CST

Pane l

S

Y

S

T

E

M

Gat e Driv e IC

So urce D r iv e I C

Circuit Block

Tim i ng
Cont r o ll er

Po w er
Blo ck

V

COM

Gamma
Ref er ence V o ltage

Gamm a Reference
Volta ge

Data (R,G ,B) & C on tro l signal

Cont rol si gnal

Data (R,G,B ) &
Cont rol si gnal

In t er fa ce

TFT

Po w er I np ut

Power Input

Da ta I n pu t

Da ta I n pu t

V

COM

Liquid
Crys tal

V

COM

SET PC

- 10 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- Adjust sequence

A Press the PIP key of the ADJ remote control. (This PIP

key is hot key to enter the VCOM adjusting mode)
(Or After enter Service Mode by pushing “ADJ” key, then
Enter V-Com Adjust mode by pushing “G” key at “10. V­Com”)

A As pushing the right or the left button on the remote

control, And find the V-COM value Which is no or
minimized the Flicker.
(If there is no flicker at default value, Press the exit key
and finish the VCOM adjustment.)

A Push the OK key to store value. Then the message

“Saving OK” is pop.

A Press the exit key to finish VCOM adjustment.

3.6. Model name & serial number download

(1) Model name & Serial number D/L

A Press “Power on” key of service remote control.(Baud

rate : 115200 bps)

A Connect RS232 Signal Cable to RS-232 Jack.
A Write Serial number by use RS-232.
A Must check the serial number at Instart menu.

(2) Method & notice

A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing

Technology Group.

C.Serial number D/L must be conformed when it is

produced in production line, because serial number D/L
is mandatory by D-book 4.0

* Manual Download (Model Name and Serial Number)

If the TV set is downloaded by OTA or service man,
sometimes model name or serial number is initialized.(Not
always)
There is impossible to download by bar code scan, so It
need Manual download.
a. Press the ‘instart’ key of ADJ remote control.
b. Go to the menu ‘5.Model Number D/L’ like below photo.
c. Input the Factory model name(ex 42LD450-ZA) or Serial

number like photo.

d. Check the model name Instart menu -> Factory name

displayed (ex 42LE7500-ZA)

e. Check the Diagnostics (DTV country only) -> Buyer model

displayed (ex 42LE7500-ZA)

3.7. CI+ Key Download method

(1) Download Procedure

1) Press "Power on" button of a service R/C.(Baud rate :

115200 bps)

2) Connect RS232-C Signal Cable.

3) Write CI+ Key through RS-232-C.

4) Check whether the key was downloaded or not at ‘In

Start’ menu. (Refer to below).

=> Check the Download to CI+ Key value in LGset.

1. check the method of CI+ Key value

a. check the method on Instart menu
b. check the method of RS232C Command

1) into the main ass’y mode (RS232 : aa 00 00)

2) check the key download for transmitted command

(RS232 : ci 00 10)

3) result value

- normally status for download : OKx

- abnormally status for download : NGx

2. Check the method of CI+ Key value (RS232)

1) into the main ass’y mode (RS232 : aa 00 00)

2) Check the method of CI+ key by command (RS232 :

ci 00 20)

3) Result value

i 01 OK 1d1852d21c1ed5dcx

[Visual Adjust and control the Voltage level]

CMD 1 CMD 2 Data 0

AA00

CMD 1 CMD 2 Data 0

CI10

CMD 1 CMD 2 Data 0

AA00

CMD 1 CMD 2 Data 0

CI20

CI+ key Value

- 11 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

4. Manual Adjustment

4.1. ADC(GP2) Adjustment

4.1.1. Overview

ADC adjustment is needed to find the optimum black level and
gain in Analog-to-Digital device and to compensate RGB
deviation.

4.1.2. Equipment & Condition

(1) Adjust Remote control
(2) 801GF(802B, 802F, 802R) or MSPG925FA Pattern

Generator

- Resolution :
480i, 720*480 (MSPG-925FA -> Model: 209, Pattern: 65)

- 480i
1080p, 1920*1080 (MSPG-925FA -> Model: 225, Pattern:

65) - 1080p

- Pattern : Horizontal 100% Color Bar Pattern

- Pattern level: 0.7 ± 0.1 Vp-p

- Image

(3) Must use standard cable

4.1.3. Adjust method

(1) ADC 480i, 1080p Comp1

1) Check connected condition of Comp1 cable to the equipment

2) Give a 480i, 1080p Mode, Horizontal 100% Color Bar

Pattern to Comp1.

(MSPG-925FA -> Model: 209, Pattern: 65) - 480i
(MSPG-925FA -> Model: 225, Pattern: 65) - 1080p

3) Change input mode as Component1 and picture mode

as “Standard”

4) Press the In-start Key on the ADJ remote after at least 1

min of signal reception. Then, select 7. External ADC ->

1. COMP 1080p on the menu. Press enter key. The
adjustment will start automatically.

5) If ADC calibration is successful, “ADC RGB Success” is

displayed.

If ADC calibration is failure, “ADC RGB Fail” is displayed.

6) If ADC calibration is failure, after recheck ADC pattern or

condition retry calibration Error message refer to 5).

(2) ADC 1920*1080 RGB

1) Check connected condition of Component & RGB cable

to the equipment

2) Give a 1920*1080 Mode, 100 % Horizontal Color Bar

Pattern to RGB port.

(MSPG-925 Series -> model: 225 , pattern: 65 )

3) Change input mode as RGB and picture mode as “Standard”.

4) Press the In-start Key on the ADJ remote after at least 1

min of signal reception. Then, select 7. External ADC ->

1. COMP 1080p on the menu. Press enter key. The
adjustment will start automatically.

5) If ADC calibration is successful, “ADC RGB Success” is

displayed.

If ADC calibration is failure, “ADC RGB Fail” is displayed.

6) If ADC calibration is failure, after recheck ADC pattern or

condition retry calibration Error message refer to 5).

4.2. EDID(The Extended Display Identification
Data)/DDC(Display Data Channel) download

(1) Overview

It is a VESA regulation. A PC or a MNT will display an
optimal resolution through information sharing without any
necessity of user input. It is a realization of “Plug and Play”.

(2) Equipment

- Adjust remote control

- Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.

(3)Download method

1) Press Adj. key on the Adj. R/C, then select “10.EDID

D/L”, By pressing Enter key, enter EDID D/L menu.

2) Select [Start] button by pressing Enter key, HDMI1 /

HDMI2 / HDMI3 / HDMI4 / RGB are Writing and display
OK or NG.

(4) EDID DATA

A HDMI

A RGB

A Reference

- HDMI1 ~ HDMI4 / RGB

- In the data of EDID, bellows may be different by S/W or

Input mode.

D-sub to D-sub DVI-D to HDMI or HDMI to HDMI

For HDMI EDIDFor Analog EDID

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C0x0D 0x0E 0x0F

0x00 00 FF FF FF FF FF FF 00 1E 6D

ⓐⓑ

0x01 ⓒ 01 03 80 10 09 78 0A EE 91 A3 54 4C 99 26

0x02 0F 50 54 A1 08 00 71 4F 81 80 01 01 01 01 01 01

0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C

0x04 45 00 A0 5A 00 00 00 1E 01 1D 00 72 51 D0 1E 20

0x05 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
0x07 ⓓ 01 ⓔ1

0x00 02 03 37 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
0x01 22 15 01 26 15 07 50 09 57 07 ⓕ
0x02 ⓕ
0x03 ⓕ E3 05 03 01 01 1D 80 18 71 1C 16 20 58

0x04 2C 25 00 A0 5A 00 00 00 9E 01 1D 00 80 51 D0 1A

0x05 20 6E 88 55 00 A0 5A 00 00 00 1A 02 3A 80 18 71

0x06 38 2D 40 58 2C 45 00 A0 5A 00 00 00 1E 00 00 00
0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ⓔ2

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C0x0D 0x0E 0x0F

0x00 00 FF FF FF FF FF FF 00 1E 6D ⓐⓑ
0x01 ⓒ 01 03 68 10 09 78 0A EE 91 A3 54 4C 99 26

0x02 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01

0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C

0x04 45 00 A0 5A 00 00 00 1E 01 1D 00 72 51 D0 1E 20

0x05 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
0x07 ⓓ 00 ⓔ3

- 12 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

ⓐ Product ID

ⓑ Serial No. : Controlled on product line
ⓒ Month, Year: Controlled on production line:

ex) Monthly : ‘01’ -> ‘01’

Year : ‘2010’ -> ‘14’

ⓓ Model Name(Hex):

ⓔ Checksum: Changeable by total EDID data.

ⓕ Vendor Specific(HDMI)

4.3. White Balance Adjustment

4.3.1 Overview

(1) W/B adj. Objective & How-it-works
(2) Objective: To reduce each Panel’s W/B deviation
(3) How-it-works : When R/G/B gain in the OSD is at 192, it

means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find
the desired value.

(4) Adj. condition : normal temperature

1) Surrounding Temperature : 25 ºC ± 5 ºC

2) Warm-up time: About 5 Min

3) Surrounding Humidity : 20 % ~ 80 %

4.3.2 Equipment

1) Color Analyzer: CA-210 (LED Module : CH 14)

2) Adj. Computer(During auto adj., RS-232C protocol is
needed)

3) Adjust Remote control

4) Video Signal Generator MSPG-925F 720p/216-Gray
(Model:217, Pattern:78)

-> Only when internal pattern is not available

A Color Analyzer Matrix should be calibrated using CS-1000

4.3.3. Equipment connection MAP

4.3.4. Adj. Command (Protocol)

<Command Format>

- LEN: Number of Data Byte to be sent

- CMD: Command

- VAL: FOS Data value

- CS: Checksum of sent data

- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]

A RS-232C Command used during auto-adj.

Ex) wb 00 00 -> Begin white balance auto-adj.

wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f -> Gain adj. completed

*(wb 00 20(Start), wb 00 2f(completed)) -> Off-set adj.

wb 00 ff -> End white balance auto-adj.

A Adj. Map

Model Name HEX EDID Table DDC Function

ALL 0001 0100 Analog

0001 0100 Digital

MODEL MODEL NAME(HEX)

all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20

INPUT MODEL NAME(HEX)

HDMI1 78 03 0C 00 10 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10

HDMI2 78 03 0C 00 20 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10

HDMI3 78 03 0C 00 30 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10

HDMI4 78 03 0C 00 40 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10

HDMI5 78 03 0C 00 50 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10

INPUT 1 2 3

HDMI1 D7 CB X

HDMI2 D7 BB X

HDMI3 D7 AB X

HDMI4 D7 9B X

HDMI5 X X 1D

Color Analyzer

Comp uter

Pattern Generator

RS- 232C

RS-232C

RS-232C

Probe

Signal Source

* If TV internal pattern is used, not needed

LEN CMD VAL

CS

RS-232C COMMAND Explanation

[CMD ID DATA]

wb 00 00 Begin White Balance adj.

wb 00 10 Gain adj.(internal white pattern)

wb 00 1f Gain adj. completed

wb 00 20 Offset adj.(internal white pattern)

wb 00 2f Offset adj. completed

wb 00 ff End White Balance adj.(Internal pattern disappears)

ITEM Command Data Range(Hex.) Default(Decimal)

Cmd 1 Cmd 2 Min Max

Cool R-Gain j g 00 C0

G-Gain j h 00 C0

B-Gain j i 00 C0

R-Cut

G-Cut

B-Cut

Medium R-Gain j a 00 C0

G-Gain j b 00 C0

B-Gain j c 00 C0

R-Cut

G-Cut

B-Cut

Warm R-Gain j d 00 C0

G-Gain j e 00 C0

B-Gain j f 00 C0

R-Cut

G-Cut

- 13 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

4.3.5. Adj. method

(1) Auto adj. method

1) Set TV in adj. mode using POWER ON key.

2) Zero calibrate probe then place it on the center of the
Display.

3) Connect Cable (RS-232C)

4) Select mode in adj. Program and begin adjustment.

5) When adj. is complete (OK Sing), check adj. status pre
mode. (Warm, Medium, Cool)

6) Remove probe and RS-232C cable to complete adj.

A W/B Adj. must begin as start command “wb 00 00” , and

finish as end command “wb 00 ff”, and Adj. offset if need.

(2) Manual adj. method

1) Set TV in Adj. mode using POWER ON

2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10cm of the surface.

3) Press ADJ key -> EZ adjust using adj. R/C -> 7. White­Balance then press the cursor to the right (KEY G).

(When KEY(G) is pressed 216 Gray internal pattern will
be displayed)

4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.

5) Adj. is performed in COOL, MEDIUM, WARM 3 modes
of color temperature.

A If internal pattern is not available, use RF input. In EZ

Adj. menu 7.White Balance, you can select one of 2
Test-pattern: ON, OFF. Default is inner(ON). By
selecting OFF, you can adjust using RF signal in 216
Gray pattern.

A Adj. condition and cautionary items

1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.

2) Probe location
: Color Analyzer (CA-210) probe should be within
10cm and perpendicular of the module surface (80°~
100°)

3) Aging time

- After Aging Start, Keep the Power ON status during

5 Minutes.

- In case of LCD, Back-light on should be checked

using no signal or Full-white pattern.

4.3.6. Reference (White Balance Adj. coordinate
and temperature)

A Luminance : 216 Gray
A Standard color coordinate and temperature using CS-1000

(over 26 inch)

A Standard color coordinate and temperature using CA-

210(CH 9)

4.3.7. IOP & Edge LED White balance table

A IOP & Edge LED module change color coordinate because

of aging time.

A apply under the color coordinate table, for compensated

aging time.

- EDGE LED(LX65)

Mode Color Coordination Temp ∆UV

xy

COOL 0.269 0.273 13000 K 0.0000

MEDIUM 0.285 0.293 9300 K 0.0000

WARM 0.313 0.329 6500 K 0.0000

Mode Color Coordination Temp ∆UV

xy

COOL 0.269 ± 0.002 0.273 ± 0.002 13000 K 0.0000

MEDIUM 0.285 ± 0.002 0.293 ± 0.002 9300 K 0.0000

WARM 0.313 ± 0.002 0.329 ± 0.002 6500 K 0.0000

GP2 Aging Time Cool Medium Warm

(Min.) X Y X Y X Y

269 273 285 293 313 329

1 0-2 280 291 296 311 319 340

2 3-5 278 288 294 308 317 338

3 6-9 276 285 292 305 315 335

4 10-15 274 282 290 302 313 332

5 20-35 273 279 289 299 312 329

6 36-49 270 276 287 296 310 326

7 50-79 269 273 286 293 308 323

8 Over 80 269 273 285 293 308 323

- 14 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

4.4. Wireless function check

Step 1) Connect set and Dongle of Wireless to Cable of HDMI

& TTA 20Pin
Step 2) At OSD of SET, check the message like Fig.3
Step 3) Detach Cable of Wireless Dongle

4.5. EYE-Q function check

Step 1) Turn on TV
Step 2) Press EYE key of Adj. R/C
Step 3) Cover the Eye Q II sensor on the front of the using

your hand and wait for 6 seconds
Step 4) Confirm that R/G/B value is lower than 10 of the “Raw

Data (Sensor data, Back light)”. If after 6 seconds,

R/G/B value is not lower than 10, replace Eye Q II

sensor.
Step 5) Remove your hand from the Eye Q II sensor and wait

for 6 seconds.
Step 6) Confirm that “ok” pop up. If change is not seen,

replace Eye Q II sensor.

4.6. Local Dimming Function Check

Step 1) Turn on TV.
Step 2) At the Local Dimming mode, module Edge Backlight

moving right to left Back light of IOP module moving.
Step 3) Confirm the Local Dimming mode.
Step 4) Press “exit” key

4.7. 3D function test

(Pattern Generator MSHG-600, MSPG-6100 [Support HDMI 1.4])
* HDMI mode No. 872, pattern No. 83)

1) Please input 3D test pattern like below

2) When 3D OSD appear automatically, then select OK button.

3) Don’t wear a 3D Glasses, Check the picture like below.

Fig. 1

<Dongle>

Fig. 3 Connect the Dongle

(Dongle Connection Display)

Fig. 2

<Wireless Ready Set>

Connect

Local Dimming Demo (Edge LED Model)

Local Dimming Demo (IOP Model)

- 15 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

4.8. IR emitter inspection

(1) Start 3D pattern inspection
(2) If IR emitter emitter signal is correctly received to IR

receiver, the lamp of IR tester turn on

4.9. Option selection per country

(1) Overview

- Option selection is only done for models in Non-EU.

- Applied model: LD03D/03E Chassis applied EU model.

(2) Method

1) Press ADJ key on the Adj. Remote Control, then select
Country Group Menu.

2) Depending on destination, select Country Group Code
04 or Country Group EU then on the lower Country
option, select US, CA, MX. Selection is done using +, ­or

GF KEY.

4.10. Tool Option selection

- Method : Press Adj. key on the Adj. Remote Control, then
select Tool option.

4.11. Ship-out mode check(In-stop)

After final inspection, press IN-STOP key of the Adj. R/C and
check that the unit goes to Stand-by mode.

5. GND and Internal Pressure check

5.1. Method

1) GND & Internal Pressure auto-check preparation

- Check that Power Cord is fully inserted to the SET.
(If loose, re-insert)

2) Perform GND & Internal Pressure auto-check

- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.

- Connect D-terminal to AV JACK TESTER

- Auto CONTROLLER(GWS103-4) ON

- Perform GND TEST

- If NG, Buzzer will sound to inform the operator.

- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)

- Perform I/P test

- If NG, Buzzer will sound to inform the operator.

- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.

5.2. Checkpoint

• TEST voltage

- GND: 1.5KV/min at 100mA

- SIGNAL: 3KV/min at 100mA

• TEST time: 1 second

• TEST POINT

- GND TEST = POWER CORD GND & SIGNAL CABLE
METAL GND

- Internal Pressure TEST = POWER CORD GND & LIVE &
NEUTRAL

• LEAKAGE CURRENT: At 0.5mArms

6. Audio

Measurement condition:

1. RF input: Mono, 1KHz sine wave signal, 100% Modulation

2. CVBS, Component: 1KHz sine wave signal 0.4Vrms

3. RGB PC: 1KHz sine wave signal 0.7Vrms

<IR Tester Lamp turned off(NG)>

<IR Emitter inspection>

<IR Tester Lamp turned on(OK)>

No. Item Min. Typ. Max. Unit

1. Audio practical max 4.5 5 6 W EQ Off

Output, L/R AVL Off

(Distortion=10 % 6.33 6.93 Vrms Clear Voice Off

max Output)

2. Speaker (8 Ω 5 7 W EQ On

Impedance) AVL On

Clear Voice On

Mode Tool 1 Tool 2 Tool 3 Tool 4 Tool 5

42LX6500 33760 31795 54316 22956 2874

- 16 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

7. USB S/W Download (option, Service only)

1) Put the USB Stick to the USB socket

2) Automatically detecting update file in USB Stick

- If your downloaded program version in USB Stick is Low,
it didn’t work. But your downloaded version is High, USB
data is automatically detecting

3) Show the message “Copying files from memory”

4) Updating is starting.

5) Updating Completed, The TV will restart automatically

6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)

* If downloading version is more high than your TV have,

TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.

* After downloading, have to adjust TOOL OPTION again.

1) Push "IN-START" key in service remote control.

2) Select "Tool Option 1" and Push “OK” button.

3) Push in the number. (Each model has their number.)

- 17 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

BLOCK DIAGRAM

1. MAIN

- 18 -

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

3DF

FPGA

FPGA

config .

Oscillator

LVDS Rx

(2 Ch)

LVDS Rx

(2 Ch)

LVDS Rx

(2 Ch)

LVDS Rx

(2 Ch)

LVDS Tx

(2 Ch)

LVDS Tx

(2 Ch)

LVDS Tx

(2 Ch)

LVDS Tx

(2 Ch)

3.3V

2.5V 1.8V 1.26V

LVDS

LVDS

FRC

240Hz

(LG1120)

LVDS Rx

(2 Ch)

LVDS Tx

(2 Ch)

LVDS Tx

(2 Ch)

LVDS Tx

(2 Ch)

LVDS Tx

(2 Ch)

51P LVDS

LVDS,12V,I/ F

Main

51P LVDS

LVDS

LVDS

LVDS

LVDS

LVDS

LVDS

LVDS

TCON

240HZ

mini LVDS

mini LVDS

240Hz FRC + 3D Formatter + TCON

Main Board I/ F

12V

Pow er

Bloc k

IR Emitter

P2402

HW option

SPI - Fla sh

(2MBI T)

DDR2 * 4

(512 MBI T)

DDR2 * 2

(512 MBI T)

SPI - Fla sh

EPCS16 SI 8 N

(2MBI T)

TCON

240240HZ

EEPROM

EEPROM

Module

80P

mini LVDS

80P

mini LVDS

VCOM &

P-gamma

I2C(SCL/SDA)

3D_SYNC_OUT

3DF

FPGA

FPGA

config .

Oscillator

LVDS Rx

(2 Ch)

LVDS Rx

(2 Ch)

LVDS Rx

(2 Ch)

LVDS Rx

(2 Ch)

LVDS Tx

(2 Ch)

LVDS Tx

(2 Ch)

LVDS Tx

(2 Ch)

LVDS Tx

(2 Ch)

3.3V

2.5V 1.8V 1.26V

LVDS

LVDS

FRC

240Hz

(LG1120)

LVDS Rx

(2 Ch)

LVDS Tx

(2 Ch)

LVDS Tx

(2 Ch)

LVDS Tx

(2 Ch)

LVDS Tx

(2 Ch)

51P LVDS

LVDS,12V,I/ F

Main

51P LVDS

LVDS

LVDS

LVDS

LVDS

LVDS

LVDS

LVDS

TCON

240HZ

mini LVDS

mini LVDS

240Hz FRC + 3D Formatter + TCON

Main Board I/ F

12V

Pow er

Bloc k

IR Emitter

P2402

HW option

SPI - Fla sh

(2MBI T)

DDR2 * 4

(512 MBI T)

DDR2 * 2

(512 MBI T)

SPI - Fla sh

EPCS16 SI 8 N

(2MBI T)

TCON

240240HZ

EEPROM

EEPROM

Module

80P

mini LVDS

80P

mini LVDS

VCOM &

P-gamma

I2C(SCL/SDA)

3D_SYNC_OUT

2. 3F BOARD

- 19 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All rights reserved.

Only for training and service purposes

A10

A13

A2

810

530

820

LV1

LV2

300

120

570

500

200

400

710

800

521

830

540

880

840

541

A21

900

920

910

A5

EXPLODED VIEW

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

IMPORTANT SAFETY NOTICE

SMD GASKET

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

GAS 1

MDS 6211 020 4

GAS 3

GAS 2

MDS 6211 020 4

MDS 6211 020 4

OPT

SOC_RESET

RESET

+3.3V_NORMAL

R1027

10K

R1030 0

SYS_RESETb

NVRAM

VCC

8

WP

7

SCL

6

SDA

5

+3.3V_NORMAL

C103

0.1uF

C171
8pF
OPT

+3.3V_NORMAL

R1000

R1036

OPT

R1040

OPT

R1039

R1037

OPT

R1002

OPT

R1034

R1006

OPT

R158

OPT

R157

OPT

2.7K

2.7K

2.7K

2.7K

2.7K

2.7K

2.7K

2.7K

2.7K

2.7K

R1026 22

R1028 22

C167
8pF

OPT

OPT

R1008

2.7K

R1005

2.7K

R169

2.7K

OPT

R1004

2.7K

R1003

2.7K

R1035

2.7K

OPT

R1007

2.7K

R1038

2.7K

R156

2.7K

R1001

2.7K

SCL3_3.3V

SDA3_3.3V

* NAND FLASH MEMORY 4Gbit (512M for BB)

NAND_RBb

NAND_REb

NAND_CEb

NAND_CLE

NAND_ALE

NAND_WEb

FLASH_WP

+3.3V_NORMAL

IC102

M24M01-HRMN6TP

4.7K

R1025

NC

1

R1032

E1

0

2

E2

A8’h

3

VSS

4

Boot Strap

Default Res. of all NAND pin is Pull-down

NAND_DATA[0-7]

NAND_ALE

NAND_CLE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

NAND_DATA[0]

NAND_DATA[1]

NAND_DATA[2]

NAND_DATA[3]

NAND_DATA[4]

NAND_DATA[5]

NAND_DATA[6]

NAND_DATA[7]

NAND_IO[0] : Flash Select (1)
0 : Boot From Serial Flash
1 : Boot From NAND Flash

NAND_IO[1] : NAND Block 0 Write (DNS)
0 : Enable Block 0 Write
1 : Disable Block 0 Write

NAND_IO[3:2] : NAND ECC (1, DNS)
00 : No ECC
01 : 1 ECC Bit
10 : 4 ECC Bit
11 : 8 ECC Bit

NAND_IO[4] : CPU Endian (0)
0 : Little Endian
1 : Big Endian

NAND_IO[6:5] : Xtal Bias Control (1, DNS)
00 : 1.2mA (Fundmental Recommand)
01 : 1.8mA
10 : 2.4mA (3rd over tune Recommand)
11 : 3.0mA

NAND_IO[7] : MIPS Frequency (DNS)
0 : 405MHz
1 : 378MHz

NAND_ALE : I2C Level (DNS)
0 : 3.3V Switching
1 : 5V Switching

NAND_CLE
0 : Enable D2CDIFF AC (DNS)
1 : Disabe D2CDIFF AC

GAS 4

MDS 6211 020 4

Open Drain

+3.3V_NORMAL

R136

4.7K

C

Q101

B

KRC103S

E

EXT IRQ
GPIO_00, GPIO_01, GPIO_02,
GPIO_11, GPIO_11, GPIO_39

IR_INT : GPIO_23
IR1_IN : GPIO_25
IR2_IN : GPIO_29
IR_OUT : GPIO_26

PWM0 : GPIO_24
PWM1 : GPIO_09

For LEX8(ALEF)

E_TCK

+3.3V_NORMAL

4.7K

1.2K

1.2K

R171

R176

R177

HIGH

URSA3

MAIN_MINI_LVDSHDMAIN_LVDS

DDR-512M

FHD

FRC

GIP

OLED

NO FRC
URSA3 Internal
URSA3 External

PWIZ Pannel T-con
with LG FRC

26page:USB_PWRON3

4.7K

EU

R170

SIDE_AV_DET

HDMI_HPD_4

BT_RESET

/RST_HUB

SIDE_COMP_DET

HP_DET

SIDE_COMP_DET

HP_DET

5V_HDMI_4

WIRELESS_DL_RX

WIRELESS_DL_TX

USB_PWRFLT3

SCL0_3.3V
SDA0_3.3V
SCL1_3.3V
SDA1_3.3V
SCL2_3.3V
SDA2_3.3V
SCL3_3.3V
SDA3_3.3V

NON_URSA3

DDR-236M

NON_FRC

NON-GIP

NON_OLED

2009.06.18

1

LOW

EBI_ADDR3
EBI_ADDR4
EBI_ADDR2
EBI_ADDR1
EBI_ADDR0
EBI_ADDR5
EBI_ADDR6
EBI_ADDR8
EBI_ADDR9
EBI_ADDR13
EBI_ADDR12
EBI_ADDR11
EBI_ADDR10
EBI_ADDR7
EBI_TAB
EBI_WE1B
EBI_CLK_IN
EBI_CLK_OUT
EBI_RWB
EBI_CS0B

NAND_DATA0
NAND_DATA1
NAND_DATA2
NAND_DATA3
NAND_DATA4
NAND_DATA5
NAND_DATA6
NAND_DATA7
NAND_CS0B
NAND_ALE
NAND_REB
NAND_CLE
NAND_WEB
NAND_RBB

SF_MISO
SF_MOSI
SF_SCK
SF_CSB

IF_AGC_SEL

RF_SWITCH_CTL

E_TMS

/CI_SEL

IC100

GPIO_00
GPIO_01
GPIO_02
GPIO_03
GPIO_04
GPIO_05
GPIO_06
GPIO_07
GPIO_08
GPIO_09
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
GPIO_43
GPIO_44
GPIO_45
GPIO_46
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56

GPIO_57
SGPIO_00
SGPIO_01
SGPIO_02
SGPIO_03
SGPIO_04
SGPIO_05
SGPIO_06
SGPIO_07

R1012 100
R1019 100
R1024 100

R1061

22

R130

BT_RESET

MODEL_OPT_2

N26
L26
N25
L25
K27
K28
K24
K26
K25
AA27
AA28
AA26
L1
L3
L2
Y25
Y26
M27
AA25
R25
N28
N27
AH18
P23
M23
AD19
AE19
M4
M5
L23
Y28
Y27
G2
G3
G5
G6
G4
L24
P25
L5
K4
K1
L27
M26
N23
R28
R27
R26
P28
P27
K6
K5
P26
M3
M2
M1
L4
L6
W27
W28
W26
W25
J2
J1
K3
K2

NON_LEX8

R1029

R111

R106

R1048
R109 100
R110 100

R107
R108

R1033

R1046

R132

R1050

R161 100

R133

R103 0

22

22
22

22

LOCAL DIMMING

FOR ESD 12V Pattern

+12V

GIP

OLED

R118 1K

R1009 1K

0

NON_OLED

NON_GIP

R119 1K

R1023 1K

OPT

R1047

0

R1920

R1141K

R1042

1K

22

22

100

NON_LEX8

22

C179

0.1uF
50V

+3.3V_NORMAL

DDR_512MB

R1022 1K

R1017 1K

DDR_256MB

R1015 1K

R1021 1K

0

22

R1011 1K

MINI_LVDS/NO LOCAL_D

LVDS/LOCAL_D

R1014 1K

1K

22

R199

1K

100

100
100

R1044

0

22

R129

R160100

R102

R1049

R1051

C178

0.1uF
50V

FHD

R1013 1K

EXTERNEL FRC/T_CON FRC

HD

R1010 1K

NO FRC/INTERNER FRC

R1064

0

R1062

POWER_DET

DC DC

ERROR_OUT

MODEL_OPT_4
MODEL_OPT_5

SIDE_AV_DET

CI_5V_CTL

HDMI_HPD_4

USB_PWRFLT3

PWM_DIM

HDMI_HPD_3

MODEL_OPT_1

DSUB_DET

BT_RESET

/RST_HUB

SC_RE1

SC_RE2
CI_MOD_RESET

MODEL_OPT_0

DD

HDMI_HPD_2

HDMI_HPD_1

5V_HDMI_1

/CI_CD1

L/R_SYNC

TUNER_RESET

DTV_ATV_SELECT
5V_HDMI_2
REAR_AV_DET

FRC

R1020 1K

NO_FRC

R1018 1K

E_TDO

E_TDI

INTERRUPT PIN
INTERRUPT PIN
INTERRUPT PIN

R1053 2.7K

DD

IR_IN

IR_IN

EPHY_ACTIVITY
EPHY_LINK

R115 1.8K

FE_TS_VAL_ERR
5V_HDMI_3
5V_HDMI_4
MODEL_OPT_2

SCART1_DET
SIDE_COMP_DET

M_RFModule_RESET

RGB_DDC_SCL
FRC_RESET

RGB_DDC_SDA

COMP1_DET

LG5111_RESET

HP_DET

MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3

MODEL_OPT_4
MODEL_OPT_5

MODEL_OPT_6

For CI

17page : Motion Remocon

R105 56

R104112K

BB Add.

For CI

M_REMOTE_TX
M_REMOTE_RX

External Demod.

+3.3V_NORMAL

R1052

4.7K

LG5111_RESET

+3.3V_NORMAL

EMI

C173

C180

22uF

100pF

16V

50V

MODEL_OPT_3

MODEL_OPT_4

MODEL_OPT_5

CI_OUTCLK

/CI_CD2

/CI_IREQ

MODEL_OPT_6

17page : Motion Remocon

BCM_RX
BCM_TX

AUD_MASTER_CLK

A_DIM

17page : Motion Remocon

17page : Motion Remocon

R1063

0

For CI

MODEL_OPT_3

1.2K

R187

1.2K

R184

1.2K

R183

M_REMOTE_RX

M_REMOTE_TX

MODEL OPTION

PIN NAME

MODEL_OPT_0

MODEL_OPT_1 AA26

MODEL_OPT_2

MODEL_OPT_3

MODEL_OPT_4

MODEL_OPT_5

MODEL_OPT_6

*MODEL_OPT_0 & MODEL_OPT_4
REFER TO THIS OPTION

MODEL_OPT_0
LOW
HIGH
HIGH
LOW

CHINA

43page:/BT_ON_OFF

15page:/TW_9910_RESET

15page:/CHB_RESET

1.2K

R180

PIN NO.

N28

R26

K1

L25

K27

K4

MODEL_OPT_4
LOW
LOW
HIGH
HIGH

For LEX8(ALEF)

GAS 6

GAS 5

MDS 6211 020 4

MDS 6211 020 4

OPT

GAS 8

GAS 7

MDS 6211 020 4

GAS 9

MDS 6211 020 4

MDS 6211 020 4

NAND_CEb
NAND_ALE
NAND_REb
NAND_CLE
NAND_WEb
NAND_RBb

CI_A[0-13]

EBI_CS

/CI_WAIT

EBI_WE

EBI_RW
EBI_CS

NAND_DATA[0-7]

+3.3V_NORMAL

+3.3V_NORMAL

R1045

4.7K

R193 4.7K

R194 4.7K

CI_A[3]
CI_A[4]
CI_A[2]
CI_A[1]
CI_A[0]
CI_A[5]
CI_A[6]
CI_A[8]
CI_A[9]
CI_A[13]
CI_A[12]
CI_A[11]
CI_A[10]

CI_A[7]
22
22

22
22

NAND_DATA[0]
NAND_DATA[1]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[4]
NAND_DATA[5]
NAND_DATA[6]
NAND_DATA[7]

LGE3556CP (C0 3D PIP)

J23
J24
H25
H24
H23
J25
F26
H28
J26
H27
G26
J27
J28
F27
G24

R116

H26

R122

R117

G27

33

R140

G28
K23
G25

U24
T26
T27
U26
U27
V26
V27
V28
T24
R23
T23
T25
R24
U25

W24
U23
V23
V24

R127

* I2C MAP

* I2C_0 :

* I2C_1 :

* I2C_2 :

* I2C_3 :

+3.3V_NORMAL

IC101

NAND04GW3B2DN6E

R134 2.7K

C114

0.1uF

R191 2.7K

C116

4700pF

NC_1

NC_2

NC_3

NC_4

NC_5

NC_6

NC_7

NC_8

VDD_1

VSS_1

NC_9

NC_10

NC_11

NC_12

NC_13

NC_14

NC_15

1

NAND FLASH

2

3

4

5

6

RB

7

R

8

E

9

10

11

12

13

14

15

CL

16

AL

17

W

18

WP

19

20

21

22

23

24

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

NC_29

NC_28

NC_27

NC_26

I/O7

I/O6

I/O5

I/O4

NC_25

NC_24

+3.3V_NORMAL

NC_23

VDD_2

VSS_2

NC_22

NC_21

NC_20

I/O3

I/O2

I/O1

I/O0

NC_19

NC_18

NC_17

NC_16

NAND_DATA[7]

NAND_DATA[6]

NAND_DATA[5]

NAND_DATA[4]

C136 10uF

10V

C115

0.1uF

NAND_DATA[3]

NAND_DATA[2]

NAND_DATA[1]

NAND_DATA[0]

NAND_DATA[0-7]

NAND_DATA[0-7]

LNA2_CTL/BOSTER_CTL

BCM (EUROBBTV)

BCM3556 & NAND FLASH

FE_TS_DATA_CLK

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

FE_TS_SERIAL

FE_TS_SYNC

CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID

BLM18PG121SN1D

L202

A3.3V

045:V14

A1.2V

R2360R237

A2.5V

0

BROAD BAND STUDIO

R220 : BCM recommened resistor 562 ohm

75

1%

R238

A2.5V

L200

R209

3.9K

R210
120

BLM18PG121SN1D

C244

0.1uF
16V

C206 0.015uF
C210 0.015uF

NON_LEX8

C211 0.015uF
C232 0.015uF

NON_LEX8
C220 0.015uF
C221 0.015uF

NON_LEX8

C224 0.015uF
C225 0.015uF

NON_LEX8
C226 0.015uF
C227 0.015uF

R264 0

C20 7 0 .1uF

C208 4.7uF

C20 3 0.1 uF

C20 2 0.1 uF

BLM18PG121SN1D

L209

L210

C2020

0.1uF

0

0.047uF

C277

C2027 0.047uF

R265

C20 9 0 .1uF

C2021

C279 0.047uF

4.7uF

C296 0.047uF

EPHY_RDN
EPHY_RDP

EPHY_TDN
EPHY_TDP

Route INCM between associated
left and right signals of same channel

The INCM trace ends at the
same point where the connector
ground connects to the board ground
(thru-hole connector pin).

Place test points, resistors
near audio connector.
Connect the other side of
the resistor to GND as close
as possible to the ground
connection of the associated
audio connector.

For LEX8(ALEF)

C206-*1

C210-*1

0.015uF
50V

C277-*1

0.047uF
350V

C211-*1

0.015uF
50V

15nF_U2J

47nF_X7T

C279-*1

0.047uF
350V

15nF_U2J

47nF_X7T

0.015uF
50V

15nF_U2J

C2027-*1

0.047uF
350V

47nF_X7T

15nF_U2J

47nF_X7T

P200

TJC2508-4A

COMP1_L_IN
COMP1_R_IN

SIDE_AV_L_IN

SIDE_AV_R_IN

COMP1_L_IN

COMP1_R_IN

AUDIO IN CAP Replacement of MLCC

C232-*1

0.015uF
50V

C296-*1

0.047uF
350V

15nF_U2J

47nF_X7T

C220-*1

0.015uF
50V

C298-*1

0.047uF
350V

C221-*1

0.015uF
50V

15nF_U2J

C299-*1

0.047uF
350V

47nF_X7T

15nF_U2J

47nF_X7T

1

2

3

4

C224-*1

0.015uF
50V

C252-*1

0.047uF
350V

+3.3V_NORMAL

C225-*1

0.015uF
50V

15nF_U2J

C253-*1

0.047uF
350V

47nF_X7T

R200

1.5K

R201

1.5K

4.7uF

C2028

A2.5V A1.2V

BLM18PG121SN1D

041:B5

REAR_AV_L_IN

041:B5

REAR_AV_R_IN

002:J6

REAR_AV_LR_INCM

COMP1_L_IN
COMP1_R_IN

COMP1_LR_INCM

002:J6
041:B5
041:B5

002:J7
041:B5
041:B5
002:J6

009:I3

009:I3

002:J7

SIDE_AV_LR_INCM

C226-*1

0.015uF
50V

15nF_U2J

C254-*1

0.047uF
350V

47nF_X7T

SC1_L_IN
SC1_R_IN

SC1_LR_INCM

SIDE_AV_L_IN

SIDE_AV_R_IN

PC_LR_INCM

15nF_U2J

47nF_X7T

L212

PC_L_IN

PC_R_IN

C227-*1

0.015uF
50V

C256-*1

0.047uF
350V

DTV/MNT_V_OUT

A3.3V

BLM18PG121SN1D

C201
100pF

C2026

4.7uF

R204 51
R214 51

NON_LEX8

R215 51
R228 51

NON_LEX8
R229 51
R230 51

NON_LEX8

R231 51
R232 51

NON_LEX8
R233 51
R234 51

A1.2V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

4.7uF
C212

D3.3V

C247

C298 0.047uF

C299 0.047uF

0.1uF

C215

0.1uF

C213

0.01uF

0.1uF

C252 0.047uF

0.1uF

C214

SIDE_USB_DM
SIDE_USB_DP

R266

R235

2.7K

2.7K

R218
240

4.7uF

C2018

C253 0.047uF

C256 0.047uF

C254 0.047uF

TP4021
TP4022
TP4023

CI_A[14]
CI_OUTDATA[0]
CI_OUTDATA[1]
CI_OUTDATA[2]
CI_OUTDATA[3]
CI_OUTDATA[4]
CI_OUTDATA[5]
CI_OUTDATA[6]
CI_OUTDATA[7]
CI_OUTSTART
CI_OUTVALID

0.1uF

C219

C223

R220 560

1K

R219

C222

0.1uF

LGE3556CP (C0 3D PIP)

D23

PKT0_CLK

C24

PKT0_DATA

B26

PKT0_SYNC

A25

RMX0_CLK

B25

RMX0_DATA

A26

RMX0_SYNC

G23

POD2CHIP_MCLKI

D25

POD2CHIP_MDI0

D24

POD2CHIP_MDI1

C25

POD2CHIP_MDI2

E27

POD2CHIP_MDI3

E26

POD2CHIP_MDI4

D28

POD2CHIP_MDI5

D27

POD2CHIP_MDI6

D26

POD2CHIP_MDI7

E23

POD2CHIP_MISTRT

E24

POD2CHIP_MIVAL

F25

CHIP2POD_MCLKO

C27

CHIP2POD_MDO0

C26

CHIP2POD_MDO1

B28

CHIP2POD_MDO2

B27

CHIP2POD_MDO3

A27

CHIP2POD_MDO4

F24

CHIP2POD_MDO5

F23

CHIP2POD_MDO6

E25

CHIP2POD_MDO7

C28

CHIP2POD_MOSTRT

A28

CHIP2POD_MOVAL

AC18

VDAC_AVDD2P5

AF20

VDAC_AVDD1P2

AG20

VDAC_AVDD3P3_1

AG21

VDAC_AVDD3P3_2

AF19

VDAC_AVSS_1

AD20

VDAC_AVSS_2

AE20

VDAC_AVSS_3

AH22

VDAC_RBIAS

AH20

VDAC_1

AG19

VDAC_2

AH21

VDAC_VREG

M25

BSC_S_SCL

M24

BSC_S_SDA

R6

USB_AVSS_1

T6

USB_AVSS_2

R7

USB_AVSS_3

T7

USB_AVSS_4

T8

USB_AVSS_5

R3

USB_AVDD1P2

U3

USB_AVDD1P2PLL

T4

USB_AVDD2P5

T3

USB_AVDD2P5REF

R4

USB_AVDD3P3

U4

USB_RREF

V1

USB_DM1

V2

USB_DP1

U1

USB_DM2

U2

USB_DP2

T5

USB_MONCDR

R5

USB_MONPLL

R1

USB_PWRFLT_1

R2

USB_PWRFLT_2

T2

USB_PWRON_1

T1

USB_PWRON_2

P6

EPHY_VREF

P5

EPHY_RDAC

P3

EPHY_RDN

P2

EPHY_RDP

N3

EPHY_TDN
EPHY_TDP
EPHY_AVDD1P2
EPHY_AVDD2P5
EPHY_PLL_VDD1P2
EPHY_AGND_1
EPHY_AGND_2
EPHY_AGND_3

AUDMX_LEFT1
AUDMX_RIGHT1
AUDMX_INCM1
AUDMX_LEFT2
AUDMX_RIGHT2
AUDMX_INCM2
AUDMX_LEFT3
AUDMX_RIGHT3
AUDMX_INCM3
AUDMX_LEFT4
AUDMX_RIGHT4
AUDMX_INCM4
AUDMX_LEFT5
AUDMX_RIGHT5
AUDMX_INCM5
AUDMX_LEFT6
AUDMX_RIGHT6
AUDMX_INCM6
AUDMX_AVSS_1
AUDMX_AVSS_2
AUDMX_AVSS_3
AUDMX_AVSS_4
AUDMX_AVSS_5
AUDMX_AVSS_6
AUDMX_LDO_CAP
AUDMX_AVDD2P5

A2.5V

C217
10uF

PLL_MAIN_MIPS_EREF_TESTOUT

AA10
AB10
AA11
AB11

N2
P1
P4
N4
N1
N5
P7

AE6
AD7
AF6
AH4
AG5
AG4
AG6
AF7
AE7
AH5
AG7
AH6
AD8
AF8
AE8
AH7
AH8
AG8
AF5
AB9

AC8
AE5

IC100

LVDS_TX_0_DATA0_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA4_N

LVDS_TX_0_CLK_P

LVDS_TX_0_CLK_N
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA4_N

LVDS_TX_1_CLK_P

LVDS_TX_1_CLK_N

LVDS_PLL_VREG

LVDS_TX_AVDDC1P2
LVDS_TX_AVDD2P5_1
LVDS_TX_AVDD2P5_2

LVDS_TX_AVSS_1
LVDS_TX_AVSS_2
LVDS_TX_AVSS_3
LVDS_TX_AVSS_4
LVDS_TX_AVSS_5
LVDS_TX_AVSS_6
LVDS_TX_AVSS_7
LVDS_TX_AVSS_8

LVDS_TX_AVSS_9
LVDS_TX_AVSS_10
LVDS_TX_AVSS_11

CLK54_AVDD1P2
CLK54_AVDD2P5

CLK54_AVSS
CLK54_XTAL_N
CLK54_XTAL_P

CLK54_MONITOR

PM_OVERRIDE

VCXO_AGND_1
VCXO_AGND_2
VCXO_AGND_3

VCXO_AVDD1P2

VCXO_PLL_AUDIO_TESTOUT

RESET_OUTB

RESETB

NMIB
TMODE_0
TMODE_1
TMODE_2
TMODE_3

SPI_S_MISO

POR_OTP_VDD2P5

POR_VDD1P2

EJTAG_TCK
EJTAG_TDI
EJTAG_TDO
EJTAG_TMS

EJTAG_TRSTB

EJTAG_CE0
EJTAG_CE1

PLL_MAIN_AVDD1P2

PLL_MAIN_AGND

PLL_RAP_AVD_TESTOUT
PLL_RAP_AVD_AVDD1P2

PLL_RAP_AVD_AGND

BYP_CPU_CLK

BYP_DS_CLK
BYP_SYS216_CLK
BYP_SYS175_CLK

B4
A4
C6
B6
B3
A3
A1
A2
D5
D6
C5
B5
B1
B2
C2
C3
D1
D2
E1
E2
E3
E4
D3
D4
F5
F1
F4
F2
C1
F3
C4
A5
E5
E6
D7
E7
F7
G7
H7

AD27
AD28
AD26
AC26
AC27
AE25
Y23

AA23
AB24
AC24
AF25
AF24

P24
F6
N24
J5
J4
J6
J3
V25
AH3
AB8

H4
H3
H2
H1
G1
H6
H5

AB26
AC25
AB27
M6
N6
N7

AA24
Y24
AE24
AD25

OPT

C228

10uF

C233

0.1uF

4.7K

R221

L211

BLM18PG121SN1D

C231

10uF

R240

390
OPT

TP is Necessory

0.1 uF

C23 6

A1.2V

0.1 uF

C20 12

C235

4.7uF

+3.3V_NORMAL

A2.5V

1K

R249

C23 8

0.1 uF

R2221K
R2621K

LVDS_TX_1_DATA4_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA0_P
LVDS_TX_1_CLK_N
LVDS_TX_1_CLK_P
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA0_P
LVDS_TX_0_CLK_N
LVDS_TX_0_CLK_P

0.1 uF

0.1 uF

4.7uF
C29 5

C242

C23 9

A2.5V

C25 1

0.1 uF

L203

BLM18PG121SN1D

C234

0.1uF

C241

4.7uF

4.7uF

C2013

A1.2V

BLM18PG121SN1D

BLM18PG121SN1D

C240

C23 7

0.1 uF

013:E7;035:AK20
013:E7;035:AK19
013:E7;035:AK19
013:E7;035:AK19
013:E7;035:AK17
013:E7;035:AK17
013:E7;035:AK17
013:E7;035:AK16
013:E7;035:AK16
013:E7;035:AK16
013:E7;035:AK18
013:E7;035:AK18
013:F7;035:AK15
013:F7;035:AK14
013:F7;035:AK14
013:F7;035:AK14
013:F7;035:AK12
013:F7;035:AK12
013:E7;035:AK12
013:E7;035:AK11
013:E7;035:AK11
013:E7;035:AK11
013:E7;035:AK13
013:E7;035:AK13

54MHz_XTAL_N
54MHz_XTAL_P

SYS_RESETb

L204

L207

4.7uF

002:I1
002:I2

A1.2V

001:A6;001:B7

A1.2V

A1.2V

+3.3V_NORMAL

OPT

R224

2.7K

R226

2.7K

A1.2V

A2.5V

R225

2.7K

R227

2.7K

54MHz X-TAL

54MHz_XTAL_N

54MHz_XTAL_P

When usding FUNDMENTAl then series R = 0 ohm and CL = 8 pF

When usding Dip-type X-tal then series R = 22 ohm and CL = 12 pF

C230
12pF

3

12pF

C229

33pF

C257

L208

1008LS-272XJLC

R243

604

R212

R211

22

21

X903

54MHz

22

VIDEO INCM

PLACE NEAR BCM CHIP

R248

34

R244

34

R245

34

NON_LEX8

R24634R247

34

C2011 0.1uF

R260

34

C2023 0.1uF

NON_LEX8

R261

34

NON_LEX8

C258 0.1uF

C2019 0.1uF

C261 0.1uF

R250

34

C262 0.1uF

NON_LEX8

C2015 0.1uF

C2016 0.1uF

C264 0.1uF

R251

34

Near Q1705

Near J1500

Near J1603

Near P1600

OPT

Near J1500

Near J1501

Run Along TUNER_CVBS_IF_P Trace

Run Along SC1_R,SC_G,SC_B Trace

Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace

Run Along DSUB_R Trace

Run Along DSUB_G Trace

Run Along DSUB_B Trace

Run Along SC1_CVBS_IN Trace

Run Along SC2_CVBS_IN Trace

TU_CVBS_INCM

003:A3

SC1_RGB_INCM
003:A4

REAR_AV_CVBS_INCM
003:A3

COMP1_VID_INCM

R_VID_INCM
003:A5

G_VID_INCM
003:A5

B_VID_INCM
003:A5

SC1_CVBS_INCM

SIDE_AV_CVBS_INCM

003:A3

003:A3

AUDIO INCM

PLACE NEAR Jacks

Near J1501

Near J1600

Near J1603

Near J1500

Near J1602

Near Q1704

5.1

R256

5.1

R258

5.1

R259

5.1

R257

5.1

R252

BCM3556 AUD_IN/LVDS

Route Between SC2_L_IN & SC2_R_IN

Route Between AV1_L_IN & AV1_R_IN

Route Between COMP1_L_IN & COMP1_R_IN

Route Between SC1_L_IN & SC1_R_IN

Route Between PC_L_IN & PC_R_IN

Route Along With TUNER_SIF_IF_N

BCM (EUROBBTV)

PLACE NEAR BCM CHIP

NON_LEX8

0.15uF
C2014

0.15uF
C2024

0.15uF
C265

NON_LEX8

0.15uF

C2022

0.15uF
C269

0.47uF
C271

NON_LEX8

0.47uF
C2017

C2025

0.47uF
NON_LEX8

0.47uF
C270

0.47uF
C2010

TU_SIF_INCM

SIDE_AV_LR_INCM
002:C6

002:C6

COMP1_LR_INCM

SC1_LR_INCM
002:C6

PC_LR_INCM

002:C6

2009.06.18

2

REAR_AV_LR_INCM

002:C6

003:A3

Place here for common circuit with ATSC

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+1.8V_HDMI+1.8V_AMP

L111

BLM18PG121SN1D

C2008

0.1uF
16V

L112

CIC21J501NE

C288
1000pF

D1.2V

C290

0.01uF

C245

4.7uF

C255
1000pF

C377

0.01uF

C375

0.1uF

C263

4.7uF

C373
1000pF

C267

0.01uF

D1.2V

A3.3V+3.3V_NORMAL

C2007

0.1uF
16V

C243

0.1uF

4.7uF

1000pF

C382

0.01uF

C381

0.1uF

C380

10uF

C379

10uF

C286
33uF

C287
100uF

FOR ESD

C383
1000pF

C246

0.01uFC250

C378

0.1uF

C376

4.7uFC249

C259
1000pF

C374

0.01uF

C366

0.1uF

C266

4.7uF

C289

0.1uF

D3.3V

C291

10uF

COMPONENT

COMP1_Y
COMP1_Pr
COMP1_Pb

COMP1_VID_INCM

SC1_RGB(EU)

SC1_RGB_INCM

SIDE COMPONENT

SIDE_COMP_Y
SIDE_COMP_Pr
SIDE_COMP_Pb

SIDE_COMP_INCM

For LEX8(ALEF)

SC1_G

SC1_R
SC1_B

CVBS

SIDE_AV_CVBS

26page : TUNER(HALF NIM)

TU_IF_AGC_1
TU_IF_AGC_2

TU_IF_N_1
TU_IF_P_1

TU_IF_N_1

TU_IF_P_1

DSUB

R195 10

R138 0

TU_SIF_INCM

R_VID_INCM

G_VID_INCM

B_VID_INCM

1%

82

1%

R120

R138-*110

NON_EU

1%

EU

75

1%

OPT

R13 5

TU_CVBS

REAR_AV_CVBS

SC1_CVBS_IN
SIDE_AV_CVBS
TU_CVBS_INCM

REAR_AV_CVBS_INCM

SC1_CVBS_INCM

SIDE_AV_CVBS_INCM

TU_SIF

SC1_FB

DSUB_R

DSUB_G

DSUB_B

75

OPT

1%

R312

C104

OPT

1%

R31 5 75

C105

NON_EU

NON_EU

R196
10

1%

SIDE_COMP_Y
SIDE_COMP_Pr
SIDE_COMP_Pb
SIDE_COMP_INCM

R128

OPT

CONNECT NEAR BCM CHIP

TU_IF_AGC_1

TU_IF_AGC_2

75

R131

1%

R31 3 75

0

OPT

120

R3056

1%

R135-*1

R2112

R3055
240

EU

0.1uF
C106

C4020

0.1uF

C293

0.01uF

C2005

0.01uF

D3.3V

D1.8V

C294

0.1uF

C2006

0.01uF

C365

0.1uF

C272

0.1uF

C357

10uF

10V

DVSS_1
DVSS_2
DVSS_3
DVSS_4
DVSS_5
DVSS_6
DVSS_7
DVSS_8
DVSS_9
DVSS_10
DVSS_11
DVSS_12
DVSS_13
DVSS_14
DVSS_15
DVSS_16
DVSS_17
DVSS_18
DVSS_19
DVSS_20
DVSS_21
DVSS_22
DVSS_23
DVSS_24
DVSS_25
DVSS_26
DVSS_27
DVSS_28
DVSS_29
DVSS_30
DVSS_31
DVSS_32
DVSS_33
DVSS_34
DVSS_35
DVSS_36
DVSS_37
DVSS_38
DVSS_39
DVSS_40
DVSS_41
DVSS_42
DVSS_43
DVSS_44
DVSS_45
DVSS_46
DVSS_47
DVSS_48
DVSS_49
DVSS_50
DVSS_51
DVSS_52
DVSS_53
DVSS_54
DVSS_55
DVSS_56
DVSS_57
DVSS_58
DVSS_59
DVSS_60
DVSS_61

C275

0.1uF

C356

0.1uF
16V

IC100

0.1uF

C348

0.1uF
16V

DVSS_62
DVSS_63
DVSS_64
DVSS_65
DVSS_66
DVSS_67
DVSS_68
DVSS_69
DVSS_70
DVSS_71
DVSS_72
DVSS_73
DVSS_74
DVSS_75
DVSS_76
DVSS_77
DVSS_78
DVSS_79
DVSS_80
DVSS_81
DVSS_82
DVSS_83
DVSS_84
DVSS_85
DVSS_86
DVSS_87
DVSS_88
DVSS_89
DVSS_90
DVSS_91
DVSS_92
DVSS_93
DVSS_94
DVSS_95
DVSS_96
DVSS_97
DVSS_98

DVSS_99
DVSS_100
DVSS_101
DVSS_102
DVSS_103
DVSS_104
DVSS_105
DVSS_106
DVSS_107
DVSS_108
DVSS_109
DVSS_110
DVSS_111
DVSS_112
DVSS_113
DVSS_114
DVSS_115
DVSS_116
DVSS_117

0.1uF

C274

0.1uF

C363

C364

0.1uF

0.1uF
16V

16V

16V

LGE3556CP (C0 3D PIP)

AD5
AD6

J7
K7
L7

M7
AB7
AC7

G8

D9
AA9
G10
A11
L11
M11
N11
P11
R11
T11
U11
V11
D12
G12
L12
M12
N12
P12
R12
T12
U12
V12
L13
M13
N13
P13
R13
T13
U13
V13
G14
L14
M14
N14
P14
R14
T14
U14
V14
L15
M15
N15
P15
R15
T15
U15
V15
A16
G16
L16
M16
N16

C276

C320

P16
R16
T16
U16
V16
AA16
D17
L17
M17
N17
P17
R17
T17
U17
V17
AA17
AC19
G18
L18
M18
N18
P18
R18
T18
U18
V18
D20
G20
H20
A21
E21
F21
G21
E22
F22
G22
H22
J22
K22
L22
M22
N22
P22
R22
T22
U22
V22
W22
Y22
AA22
W23
AB23
F28
M28
T28
AC28

16V

C278

4.7uF

C319

0.1uF

C280

4.7uF

16V

LGE3556CP (C0 3D PIP)

AG28

DS_AGCI_CTL

AH28

DS_AGCT_CTL

AA21

EDSAFE_AVSS_1

A1.2V

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

AB22
AF26
AF27
AF28
AG27
AE26
AE28
AE27
AD24
AB19
AB25

AB18
AC17
AB17
AD14
AD16
AB15
AC15
AD13
AE13
AC13
AB14
AC14
AC12
AD12
AB13
AA14
AC11
AD11
AB12
AD10
AC10

AG15
AE15
AF15
AH15
AG16
AF16
AH17
AH16
AG14
AE14
AF14
AH14
AH10
AG10
AE10
AE11
AF11
AH11
AH13
AE12
AF12

AG11
AG12
AF13

AF10
AH12
AG13
AF17
AG17
AD15
AE16
AE17
AB16
AA15
AC16

AE9
AF9
AH9
AG9

AD9

AC9

AG3
AF4

EDSAFE_AVSS_2
EDSAFE_AVSS_3
EDSAFE_AVSS_4
EDSAFE_AVSS_5
EDSAFE_AVDD2P5
EDSAFE_DVDD1P2
EDSAFE_IF_N
EDSAFE_IF_P
PLL_DS_AGND
PLL_DS_AVDD1P2
PLL_DS_TESTOUT

SD_V5_AVDD1P2
SD_V5_AVDD2P5
SD_V5_AVSS
SD_V1_AVDD1P2
SD_V1_AVDD2P5
SD_V1_AVSS_1
SD_V1_AVSS_2
SD_V2_AVDD1P2
SD_V2_AVDD2P5
SD_V2_AVSS_1
SD_V2_AVSS_2
SD_V2_AVSS_3
SD_V3_AVDD1P2
SD_V3_AVDD2P5
SD_V3_AVSS_1
SD_V3_AVSS_2
SD_V4_AVDD1P2
SD_V4_AVDD2P5
SD_V4_AVSS
SD_R
SD_INCM_R
SD_G
SD_INCM_G
SD_B
SD_INCM_B
SD_Y1
SD_PR1
SD_PB1
SD_INCM_COMP1
SD_Y2
SD_PR2
SD_PB2
SD_INCM_COMP2
SD_Y3
SD_PR3
SD_PB3
SD_INCM_COMP3
SD_L1
SD_C1
SD_INCM_LC1
SD_L2
SD_C2
SD_INCM_LC2
SD_L3
SD_C3
SD_INCM_LC3
SD_CVBS1
SD_CVBS2
SD_CVBS3
SD_CVBS4
SD_INCM_CVBS1
SD_INCM_CVBS2
SD_INCM_CVBS3

SD_INCM_CVBS4

SD_SIF1
SD_INCM_SIF1
SD_FB
SD_FS

SD_FS2
PLL_VAFE_AVDD1P2

PLL_VAFE_AVSS
PLL_VAFE_TESTOUT

RGB_HSYNC
RGB_VSYNC

A2.5V

BLM18PG121SN1D

L102

C113

A1.2V

L103

BLM18PG121SN1D

A1.2V

C111

0.1uF

47pF

C169 47pF

C101

NON_EU

ONLY USE NON_EU
FOR COMP 1

82 1%

75

82

OPT

1%

R166

R165

C177

R2113

181%

R2114

12

R2115

0

12

A2.5V

A2.5V

R4020

R137

10K

10K

R139
12K

R4021

12K

R2117
0

OPT

47pF

C170

75

1%

R167

R100
R142
R143

R141 1%

0

R2116

C112

0.1uF

1%

62

OPT

75

A2.5V

62

A1.2V

0.1uF

BLM18PG121SN1D

L104

BLM18PG121SN1D

L105
C117
1000pF

NON_EU

R2112-*1

125%

EU

L106
BLM18PG121SN1D

C121

0.1uF

RGB_HSYNC

RGB_VSYNC

C172

4.7uF

C119

0.1uF

C120
1000pF

NON_EU
R141-*1

5%

62

C118

0.01uF

C140

4.7uF

C144

0.1uF

C127

C128

C129

C130
C131
C132

C133
C134
C135

C174
C175

C176

C110
C124
C125
C100

SC1_ID

C122

4.7uF

C123

0.01uF

IC100

I2S_CLK_IN
I2S_CLK_OUT
I2S_DATA_IN

I2S_DATA_OUT

I2S_LR_IN

I2S_LR_OUT
AUD_LEFT0_N
AUD_LEFT0_P

AUD_AVDD2P5_0

AUD_AVSS_0_1
AUD_AVSS_0_2
AUD_AVSS_0_3
AUD_AVSS_0_4
AUD_AVSS_0_5
AUD_RIGHT0_N
AUD_RIGHT0_P

AUD_LEFT1_N
AUD_LEFT1_P

AUD_RIGHT1_N
AUD_RIGHT1_P

AUD_AVDD2P5_1

AUD_AVSS_1_1
AUD_AVSS_1_2
AUD_AVSS_1_3

AUD_LEFT2_N
AUD_LEFT2_P

AUD_RIGHT2_N
AUD_RIGHT2_P

AUD_AVDD2P5_2

AUD_AVSS_2_1
AUD_AVSS_2_2

AUD_SPDIF

SPDIF_AVDD2P5

SPDIF_AVSS

SPDIF_IN_N

SPDIF_IN_P

HDMI_RX_0_CEC_DAT

HDMI_RX_0_HTPLG_IN

HDMI_RX_0_HTPLG_OUT

HDMI_RX_0_DDC_SCL
HDMI_RX_0_DDC_SDA

HDMI_RX_0_RESREF

HDMI_RX_0_CLK_N

HDMI_RX_0_CLK_P
HDMI_RX_0_DATA0_N
HDMI_RX_0_DATA0_P
HDMI_RX_0_DATA1_N
HDMI_RX_0_DATA1_P
HDMI_RX_0_DATA2_N
HDMI_RX_0_DATA2_P

HDMI_RX_0_VDD3P3
HDMI_RX_0_VDD1P2
HDMI_RX_0_VDD2P5
HDMI_RX_0_AVSS_1
HDMI_RX_0_AVSS_2
HDMI_RX_0_AVSS_3
HDMI_RX_0_AVSS_4
HDMI_RX_0_AVSS_5
HDMI_RX_0_AVSS_6

HDMI_RX_0_PLL_AVSS

HDMI_RX_0_PLL_DVDD1P2

HDMI_RX_0_PLL_DVSS

HDMI_RX_1_CEC_DAT

HDMI_RX_1_HTPLG_IN
HDMI_RX_1_HTPLG_OUT

HDMI_RX_1_DDC_SCL
HDMI_RX_1_DDC_SDA

HDMI_RX_1_RESREF

HDMI_RX_1_CLK_N

HDMI_RX_1_CLK_P
HDMI_RX_1_DATA0_N

HDMI_RX_1_DATA0_P
HDMI_RX_1_DATA1_N

HDMI_RX_1_DATA1_P
HDMI_RX_1_DATA2_N

HDMI_RX_1_DATA2_P

HDMI_RX_1_VDD3P3
HDMI_RX_1_VDD1P2
HDMI_RX_1_VDD2P5
HDMI_RX_1_AVSS_1
HDMI_RX_1_AVSS_2
HDMI_RX_1_AVSS_3
HDMI_RX_1_AVSS_4
HDMI_RX_1_AVSS_5
HDMI_RX_1_AVSS_6
HDMI_RX_1_AVSS_7
HDMI_RX_1_AVSS_8
HDMI_RX_1_AVSS_9

HDMI_RX_1_PLL_AVSS

HDMI_RX_1_PLL_DVDD1P2

HDMI_RX_1_PLL_DVSS

AE18
AF18
AD17
AH19
AD18
AG18
AG26
AH26
AF23
AA20
AB21
AC22
AC23
AD23
AH25
AG25
AH23
AG23
AG24
AH24
AE22
AB20
AC21
AE23
AF21
AE21
AF22
AG22
AD21
AC20
AD22
AH2
AC6
AE4
AF3
AH1

AG1
AA6
AA5
AB3
Y6
AC4
AC1
AC2
AD1
AD2
AE1
AE2
AF1
AF2
AD3
AE3
AC3
AD4
AB5
AB6
AG2
AB4
AA7
Y8
AC5
W8

AA3
V4
U6
V5
V3
W4
W2
W3
Y1
Y2
AA2
AA1
AB2
AB1
Y3
Y4
W5
W1
U5
W6
U7
V7
W7
U8
V8
Y5
V6
AA4
Y7

BT_LOUT_N
BT_LOUT_P
BT_ROUT_N
BT_ROUT_P

R2036
1K

R309

OPT

C150

0.1uF

10K

R152499

R2037

R153499

C145

4.7uF

10K

OPT

C158
1000pF

R310 10K

R2035

0

R2038 10K

SPDIF_OUT

+5V_NORMAL

R3070
R3080

C153

0.1uF

C151

0.01uF

10K

R2039

C146

4.7uF

C159
1000pF

C147

0.01uF

HP_ROUT_N
HP_ROUT_P

C148

0.01uF

SCART1_Lout_N

SCART1_Lout_P
SCART1_Rout_N
SCART1_Rout_P

C149

0.01uF

HDMI_CLK­HDMI_CLK+
HDMI_RX0­HDMI_RX0+
HDMI_RX1-

HDMI_RX1+
HDMI_RX2­HDMI_RX2+

C160

0.1uF

C165

10uF

D3.3V

C154

0.1uF

C152

0.01uF

AUD_SCK

AUD_LRCH

AUD_LRCK

HP_LOUT_N
HP_LOUT_P

C155

0.1uF

C156

0.1uF

C157

0.1uF

BLM18PG121SN1D

L107

C161

0.1uF

BLM18PG121SN1D

L108

C166

10uF

C162

10uF

C163

10uF

C164

10uF

HDMI_SCL
HDMI_SDA

A3.3V

BLM18PG121SN1D

L109

A1.2V

A3.3V

BLM18PG121SN1D

L110

A1.2V

FOR ESD

C384
33uF
10V

A2.5V

For LEX8(ALEF)

A2.5V

C3006

0.1uF
16V

A2.5V

A2.5V

HP_LOUT_N
HP_LOUT_P
HP_ROUT_N
HP_ROUT_P

C248
1000pF

C216

0.1uF

C281
1000pF

C2003

0.1uF

R205

C268
1000pF

A3.3V

20

C370

C371

0.1uF

0.01uF

C283

C282

1000pF

1000pF

D1.2V

LGE3556CP (C0 3D PIP)

H8

VDDC_1

J8

VDDC_2

K8

VDDC_3

L8

VDDC_4

M8

VDDC_5

N8

VDDC_6

P8

VDDC_7

R8

VDDC_8

AA8

VDDC_9

H9

VDDC_10

H10

VDDC_11

H11

VDDC_12

H12

VDDC_13

H13

VDDC_14

H14

VDDC_15

H15

VDDC_16

H16

VDDC_17

H17

VDDC_18

H18

VDDC_19

H19

VDDC_20

H21

VDDC_21

J21

VDDC_22

K21

VDDC_23

L21

VDDC_24

M21

VDDC_25

N21

VDDC_26

P21

VDDC_27

R21

VDDC_28

T21

VDDC_29

U21

VDDC_30

V21

VDDC_31

W21

VDDC_32

Y21

VDDC_33

AH27

AA12
AA13
AA18
AA19

AB28

AGC_VDDO

VDDO_1
VDDO_2
VDDO_3
VDDO_4

E28

VDDO_5

L28

VDDO_6

U28

VDDO_7
VDDO_8

A9

DDRV_1

G9

DDRV_2

G11

DDRV_3

G13

DDRV_4

A14

DDRV_5

G15

DDRV_6

G17

DDRV_7

A19

DDRV_8

G19

DDRV_9

D3.3V

D1.8V

C369

4.7uF

C284

0.01uF

IC100

C292
1000pF

C285

0.01uF

C318

0.1uF

D1.8V

C297

C2004

4.7uF

33uF

D1.8V

C304

0.1uF

16V

16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EUROBBTV

BCM3556 VIDEO IN

2009.06.18

3

IC100

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LGE3556CP (C0 3D PIP)

DDR_BVDD0
DDR_BVDD1
DDR_BVSS0
DDR_BVSS1

DDR_PLL_TEST

DDR_PLL_LDO

DDR01_CKE

DDR_COMP

DDR01_ODT

DDR_EXT_CLK

DDR0_CLK

DDR0_CLKB

DDR1_CLK
DDR1_CLKB
DDR01_A00
DDR01_A01
DDR01_A02
DDR01_A03

DDR0_A04

DDR0_A05

DDR0_A06
DDR01_A07
DDR01_A08
DDR01_A09
DDR01_A10
DDR01_A11
DDR01_A12
DDR01_A13

DDR1_A04

DDR1_A05

DDR1_A06
DDR01_BA0
DDR01_BA1
DDR01_BA2

DDR01_CASB

DDR0_DQ00
DDR0_DQ01
DDR0_DQ02
DDR0_DQ03
DDR0_DQ04
DDR0_DQ05
DDR0_DQ06
DDR0_DQ07
DDR0_DQ08
DDR0_DQ09
DDR0_DQ10
DDR0_DQ11
DDR0_DQ12
DDR0_DQ13
DDR0_DQ14
DDR0_DQ15
DDR1_DQ00
DDR1_DQ01
DDR1_DQ02
DDR1_DQ03
DDR1_DQ04
DDR1_DQ05
DDR1_DQ06
DDR1_DQ07
DDR1_DQ08
DDR1_DQ09
DDR1_DQ10
DDR1_DQ11
DDR1_DQ12
DDR1_DQ13
DDR1_DQ14
DDR1_DQ15

DDR0_DM0

DDR0_DM1

DDR1_DM0

DDR1_DM1
DDR0_DQS0

DDR0_DQS0B

DDR0_DQS1

DDR0_DQS1B

DDR1_DQS0

DDR1_DQS0B

DDR1_DQS1

DDR1_DQS1B
DDR01_RASB

DDR_VREF0
DDR_VREF1
DDR01_WEB

DDR_VDDP1P8_1
DDR_VDDP1P8_2

* DDR_VTT

C426

C425

10uF

16V

C417
10uF

10V

10uF

16V

DDR1_VREF0

DDR0_VREF0

C411

0.1uF
16V

DDR_VTT

C412

0.1uF
16V

R414

R415

0

0

A6
A24
B7
B24
F20
B23
B17
C22
E16
C23
B12
C12
A13
A12
B15
E14
A15
D15
E13
E12
F13
C14
F14
B14
D14
C13
D13
B13
F15
C15
D16
F16
B16
E15
A17
A8
B11
B8
D11
E11
C8
C11
C9
D8
E10
E9
F11
F12
E8
D10
F8
C18
C20
A18
B21
C21
B18
B20
D18
E18
D21
F18
E20
A22
F17
B22
E17
A10
C10
A20
F19
B10
B9
F10
F9
B19
C19
E19
D19
C16
A7
A23
C17
C7
D22

0.1uF

C423

10uF

10V

C406

C419
10uF
10V

A1.2V

R411 0
OPT

D1.8V

R412 240

DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]

DDR0_A[4]
DDR0_A[5]

DDR0_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]

DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]

DDR1_A[4]

DDR1_A[5]

DDR1_A[6]

DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]
DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]

DDR1_DQ[8]
DDR1_DQ[9]

DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]

C415

0.1uF

C413

0.1uF
16V

C414

0.1uF 16V

D1.8V

D1.8V

C4030.1uF
C4040.1uF

DDR01_CKE

1%

C427 0.1uF OPT

C428 0.1uF OPT

R418

10K

C405

1uF

BD35331F-E2

GND

1

EN

2

VTTS

3

VREF

4

DDR01_ODT

DDR0_CLK

DDR0_CLKb

DDR1_CLK

DDR1_CLKb

DDR01_BA0
DDR01_BA1
DDR01_BA2

DDR01_CASb

DDR0_DM0
DDR0_DM1
DDR1_DM0
DDR1_DM1

DDR0_DQS0

DDR0_DQS0b

DDR0_DQS1

DDR0_DQS1b

DDR1_DQS0

DDR1_DQS0b

DDR1_DQS1

DDR1_DQS1b

DDR01_RASb

DDR01_WEb

OPT

OPT

C408

C402

470pF

470pF

IC404

C407

1uF

004:C7;004:C4
004:C7;004:C4
004:F7;004:F4
004:F7;004:F4

004:E6
004:E3
004:H6
004:H3
004:E6
004:E6
004:E3
004:E3
004:H6
004:H6
004:H3
004:H3

VTT

8

VTT_IN

7

VCC

6

VDDQ

5

C422

1uF

10V

DDR01_A[0-3]

DDR0_A[4-6]

DDR01_A[7-13]

DDR1_A[4-6]

DDR0_DQ[8-15]

DDR1_DQ[8-15]

C400

C401

1uF

470pF

D3.3V

R417
220

DDR0_DQ[0-7]

DDR1_DQ[0-7]

DDR0_VREF0

C410

C409

1uF

470pF

C416
10uF
10V

004:A7;004:C4

004:A7;004:C4

004:A7;004:C7

004:A7;004:C7

004:A7;004:C7;004:F7;004:F4

DDR1_VREF0

D1.8V

C418

C420

1uF

0.1uF
10V

16V

DDR0_CLK

DDR0_CLKb
DDR01_CKE

DDR01_RASb
DDR01_CASb
DDR01_WEb

DDR01_BA0
DDR01_BA1

DDR01_BA2

DDR01_A[0-3,7-13]

DDR0_A[4-6]

DDR01_ODT

DDR0_CLK

DDR0_CLKb
DDR01_CKE

DDR01_RASb
DDR01_CASb
DDR01_WEb

DDR01_BA0
DDR01_BA1

DDR01_BA2

DDR01_A[0-3,7-13]

DDR0_A[4-6]

DDR01_ODT

R406

NT5TU128M8DE_BD

100

1%

DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR0_A[4]
DDR0_A[5]
DDR0_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]

E8
F8
F2

F7
G7
F3
G8

G2
G3
G1

H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8

L3
L7

F9

CK
CK
CKE

RAS
CAS
WE
CS

BA0
BA1
NC_1/BA2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13

NC_2/A14
NC_3/A15

ODT

NT5TU128M8DE_BD

E8

CK

F8

CK

F2

CKE

F7

RAS

G7

CAS

F3

WE

G8

CS

G2

BA0

G3

BA1

G1

NC_1/BA2

DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR0_A[4]
DDR0_A[5]
DDR0_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]

H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8

L3
L7

F9

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13

NC_2/A14
NC_3/A15

ODT

C440

470pF

IC400

IC401

C441

0.047uF

C442

0.1uF

DM/RDQS
NU/RDQS

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

DM/RDQS
NU/RDQS

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

VDD_1
VDD_2
VDD_3
VDD_4

VSS_1
VSS_2
VSS_3
VSS_4

VREF
VDDL

VSSDL

VDD_1
VDD_2
VDD_3
VDD_4

VSS_1
VSS_2
VSS_3
VSS_4

VREF
VDDL

VSSDL

C445

C446

C444

C443

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DQS
DQS

10uF

C8
C2
D7
D3
D1
D9
B1
B9

B7
A8
B3
A2

A9
C1
C3
C7
C9
A1
L1
E9
H9

A7
B2
B8
D2
D8
A3
E3
J1
K9

E2
E1
E7

470pF

DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]

0.047uF

0.1uF

D1.8V

DDR0_VREF0

C449

0.1uF

Close to IC

C8

DDR0_DQ[9]

DQ0

C2

DDR0_DQ[8]

DQ1

D7

DDR0_DQ[12]

DQ2

D3

DDR0_DQ[13]

DQ3

D1

DDR0_DQ[15]

DQ4

D9

DDR0_DQ[11]

DQ5

B1

DDR0_DQ[10]

DQ6

B9

DDR0_DQ[14]

DQ7

B7

DQS

A8

DQS

B3
A2

A9
C1
C3
C7
C9
A1
L1
E9
H9

A7
B2
B8
D2
D8
A3
E3
J1
K9

E2
E1
E7

D1.8V

DDR0_VREF0

C450

0.1uF

Close to IC

C447

10uF

DDR0_DQS0

DDR0_DQS0b

DDR0_DM0

C452

470pF

DDR0_DQS1

DDR0_DQS1b

DDR0_DM1

C453

470pF

C451

C448

10uF

22uF

DDR0_DQ[0-7]

004:B6;004:F3;004:I7

DDR0_DQ[8-15]

C456

C457

C455

C454

10uF

0.1uF

004:A7;004:F4

004:A7;004:F4

004:A4
004:A4
004:A4

004:A7;004:C5;004:C2;004:F2;004:I4;004:I6

004:A4
004:A4
004:A4

004:B6;004:F6;004:I7

C458

470pF

0.047uF

004:B6

DDR1_CLK

DDR1_CLKb
DDR01_CKE

DDR01_RASb
DDR01_CASb
DDR01_WEb

DDR01_BA0
DDR01_BA1

DDR01_BA2

DDR01_A[0-3,7-13]

DDR1_A[4-6]

DDR01_ODT

DDR1_CLK

DDR1_CLKb
DDR01_CKE

DDR01_RASb
DDR01_CASb
DDR01_WEb

DDR01_BA0
DDR01_BA1

DDR01_BA2

DDR01_A[0-3,7-13]

DDR1_A[4-6]

DDR01_ODT

10uF

C459

0.1uF

C460

R407

100

1%

0.047uF

C461

470pF

DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]

DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]

IC402

NT5TU128M8DE_BD

E8

CK

F8

CK

F2

CKE

F7

RAS

G7

CAS

F3

WE

G8

CS

G2

BA0

G3

BA1

G1

NC_1/BA2

H8

A0

H3

A1

H7

A2

J2

A3

J8

A4

J3

A5

J7

A6

K2

A7

K8

A8

K3

A9

H2

A10/AP

K7

A11

L2

A12

L8

A13

L3

NC_2/A14

L7

NC_3/A15

F9

ODT

IC403

NT5TU128M8DE_BD

E8

CK

F8

CK

F2

CKE

F7

RAS

G7

CAS

F3

WE

G8

CS

G2

BA0

G3

BA1

G1

NC_1/BA2

H8

A0

H3

A1

H7

A2

J2

A3

J8

A4

J3

A5

J7

A6

K2

A7

K8

A8

K3

A9

H2

A10/AP

K7

A11

L2

A12

L8

A13

L3

NC_2/A14

L7

NC_3/A15

F9

ODT

DM/RDQS
NU/RDQS

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5

VDD_1
VDD_2
VDD_3
VDD_4

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

VSS_1
VSS_2
VSS_3
VSS_4

VREF
VDDL

VSSDL

DM/RDQS
NU/RDQS

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5

VDD_1
VDD_2
VDD_3
VDD_4

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

VSS_1
VSS_2
VSS_3
VSS_4

VREF
VDDL

VSSDL

C477

C471

C470

C472

C469

0.047uF

004:A4
004:A3
004:A4

C468

0.1uF

004:B5

10uF

470pF

DDR01_A[0-3,7-13]

DDR1_A[4-6]

DDR0_A[4-6]

C465

C462

470pF

DDR1_DQ[0-7]

C8

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DQS
DQS

DDR1_DQ[0]

C2

DDR1_DQ[1]

D7

DDR1_DQ[5]

D3

DDR1_DQ[3]

D1

DDR1_DQ[4]

D9

DDR1_DQ[2]

B1

DDR1_DQ[6]

B9

DDR1_DQ[7]

B7
A8
B3
A2

A9
C1
C3
C7
C9
A1
L1
E9
H9

A7
B2
B8
D2
D8
A3
E3
J1
K9

E2
E1
E7

D1.8V

DDR1_VREF0

DDR1_DQS0

DDR1_DQS0b

DDR1_DM0

C463

470pF

C466

0.1uF

0.047uF

0.1uF

C473

10uF

C474

10uF

C475

22uF

DDR01_RASb

DDR01_CASb

DDR01_BA1
DDR01_BA0
DDR01_BA2
DDR01_WEb

DDR01_CKE

DDR01_ODT

DDR01_RASb

DDR01_BA1

Close to IC

DDR01_BA0
DDR01_BA2
DDR01_WEb

DDR01_CKE
DDR01_ODT

DDR1_DQ[8-15]

004:B5

C8

DDR1_DQ[9]

DQ0

C2

DDR1_DQ[8]

DQ1

D7

DDR1_DQ[12]

DQ2

D3

DDR1_DQ[13]

DQ3

D1

DDR1_DQ[15]

DQ4

D9

DDR1_DQ[14]

DQ5

B1

DDR1_DQ[10]

DQ6

B9

DDR1_DQ[11]

DQ7

B7

DQS

A8

DQS

B3
A2

A9
C1
C3
C7
C9
A1
L1
E9
H9

A7
B2
B8
D2
D8
A3
E3
J1
K9

E2
E1
E7

D1.8V

DDR1_VREF0

DDR1_DQS1

DDR1_DQS1b

DDR1_DM1

C464

470pF

C467

0.1uF

004:A3
004:A3
004:A4

C476

10uF

DDR01_A[2]
DDR01_A[0]
DDR1_A[6]

DDR01_A[12]
DDR01_A[9]
DDR01_A[7]
DDR1_A[5]
DDR1_A[4]
DDR01_A[11]
DDR01_A[8]
DDR01_A[13]
DDR01_A[3]
DDR01_A[1]
DDR01_A[10]

DDR01_A[2]
DDR01_A[0]
DDR0_A[6]
DDR01_A[3]
DDR01_A[1]
DDR01_A[10]

DDR01_A[12]
DDR01_A[9]
DDR01_A[7]
DDR0_A[5]
DDR0_A[4]
DDR01_A[11]
DDR01_A[8]
DDR01_A[13]

0.1uF

C478

0.047uF

75

AR400

R408 75

R409 75

75

AR401

AR402

75

AR403

75

AR404

R410 75

75

AR405

75

AR406

75

AR407

75

AR408

75

AR409

R404 75

470pF

C479

C481

C480

10uF

DDR_VTT

75

DDR_VTT

0.1uF

SI

C482

0.047uF

SI

C485

0.1uF

C486

0.1uF

C487

0.1uF

C488

0.1uF

C489

0.1uF

C490

0.1uF

C499

0.1uF

C421

0.1uF

PI

C491

0.1uF

C483

0.1uF

C484

0.1uF

C492

0.1uF

C493

0.1uF

C494

0.1uF

C496

0.1uF

C497

0.1uF

C498

0.1uF

C495

470pF

Close to IC

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

HONG YEON HYUK

BCM (EUROBBTV) 2009.06.18

DDR Memory

4

EARPHONE BLOCK - spec out

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

COMPONENT

PPJ234-01

JK900

[GN]E-LUG

6A

[GN]O-SPRING

5A

[GN]CONTACT

4A

[BL]E-LUG-S

7B

[BL]O-SPRING

5B

[RD]E-LUG-S

7C

[RD]O-SPRING_1

5C

[WH]O-SPRING

5D

[RD]CONTACT

4E

[RD]O-SPRING_2

5E

[RD]E-LUG

6E

+3.3V_NORMAL

R902

10K

D900

5.6V

D903

5.1V
D910

5.1V

D904

5.5V

5.5V
D905

D901

5.6V

D902

5.6V

C931
100pF
50V

C932
27pF

R907

470K

R961

470K

R903
1K

50V

C933
27pF

50V

C934
27pF

50V

C935

C936

Rear CVBS

COMP1_DET

L904
270nH

C904
27pF
50V

L903
270nH

C906
27pF

50V
L902
270nH

C905

27pF

50V

25V

1uF

25V

1uF

R910
0

R909
0

C939
100pF
50V

C937
100pF
50V

COMP1_Y

COMP1_Pb

COMP1_Pr

COMP1_L_IN

COMP1_R_IN

REAR_AV

JK902

PPJ233-01

[RD]E-LUG

5C

[RD]O-SPRING

4C

[RD]CONTACT

3C

[WH]C-LUG

4B

[YL]CONTACT

3A

[YL]O-SPRING

4A

[YL]E-LUG

5A

REAR_AV

D907

5.6V

REAR_AV

D906

5.1V
REAR_AV

D911

5.1V

D908

5.6V

REAR_AV

REAR_AV

R920
470K

REAR_AV

R957
0

D909

5.6V

REAR_AV

R921

470K

REAR_AV

REAR_AV

C909
47pF
50V

+3.3V_NORMAL

REAR_AV

C910
100pF
50V

C941

25V

1uF

REAR_AV

C940

25V

1uF

REAR_AV

REAR_AV
R925
10K

REAR_AV

R926

1K

R928
0

REAR_AV

REAR_AV

R927
0

C916
100pF
50V

REAR_AV

REAR_AV

C915
100pF
50V

REAR_AV_CVBS

REAR_AV_DET

REAR_AV_R_IN

REAR_AV_L_IN

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

ETC SUB BOARD I/F

2009.06.18EUROBBTV

9

Motion Remote controller

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Motion Remocon Interface

P1700

12507WR-08L

9

M_REMOTE

+3.3V_NORMAL

M_REMOTE_RX
9:F3;9:G4

M_REMOTE_TX

9:F3;9:G4

+3.3V_NORMAL

R1705

2.7K

R1706

L1700

1

2

3

4

5

6

7

8

120-ohm

BLM18PG121SN1D

R1700
100

R1701
100

R1702
100

R1703
100

R1704
100

ALL M_REMOTE OPTION

2.7K

R1707

2.7K

M_RFModule_RESET

9:F3;9:G4

DC

9:F3;9:G3

DD

9:F3;9:G3

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP2_BCM_ATSC

MOTION_REMOCON

09/10/xx

20 100

Sub AMP.

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+24V_AMP

AUD_LRCH

AUD_LRCK

AUD_SCK
SDA2_3.3V
SCL2_3.3V

+1.8V_AMP

L2100

BLM18PG121SN1D

3AMP OPT

C2100

10uF

10V

AMP_RESET_N

AUD_MASTER_CLK

+1.8V_AMP

L2102

BLM18PG121SN1D

C2102

0.1uF
16V

3AMP OPT

C2104

10uF

10V

R2101 100

R2102 100
R2103 100

R2104 100
R2105 100

1000pF

R2100

C2111

56

50V

C2106
100pF

50V

C2107

0.1uF
16V

C2110
100pF

OPT

C2118

0.1uF

C2115
1000pF

50V

R2157

3.3K

C2114
33pF
50V

+3.3V_NORMAL

L2104

BLM18PG121SN1D

R21 59 1 00

R2161

10K

OPT

C2120
33pF
50V

3AMP OPT

C2122
22pF
50V

C21 28

1uF 25V

3AMP OPT

C2125
10uF

C2124
22pF
50V

3AMP OPT

DGND_PLL
AGND_PLL

AVDD_PLL
DVDD_PLL

+1.8V_AMP

10V

3AMP OPT

C2134

22000pF

50V

BST1A
VDR1A

/RESET

DGND_1
GND_IO

CLK_I

VDD_IO

GND

C2132

0.1uF
16V

C2130
22pF
50V

D2100

3AMP OPT

R2121

3.3
3AMP OPT

C2152

22000pF

50V

C2155

0.01uF
50V

+24V_AMP

C2154

0.1uF
50V

POWER_DET

AMP_MUTE1

C2142
22000pF

50V

C2144
1uF
25V

VDR1B44BST1B45PGND1B_1

43

28

PGND2B_1

42
41
40
39
38
37
36
35
34
33
32
31
30
29

C2146
10uF
35V

NC
VDR2A
BST2A
PGND2A_2
PGND2A_1
OUT2A_2
OUT2A_1
PVDD2A_2
PVDD2A_1
PVDD2B_2
PVDD2B_1
OUT2B_2
OUT2B_1
PGND2B_2

R2118 100

C21 48

1uF25V

R2162
0

3AMP OPT

C2149
22000pF

50V

C2136

0.1uF
50V

SIGN60000

PGND1B_2

OUT1B_1

OUT1B_2

PVDD1B_1

PVDD1B_2

PVDD1A_1

PVDD1A_2

OUT1A_1

OUT1A_2

PGND1A_1

PGND1A_2

EP_PAD

46

47

48

49

50

51

52

53

54

55

56

1

THERMAL

2

57

3

AD

4
5
6

IC2100
7
8
9
10

LF

11

NTP-7000
12
13
14

15

DVDD

DGND_2

16

17

SDATA

EAN60969601

18

WCK19BCK20SDA21SCL

22

25

VDR2B27BST2B

/FAULT

MONITOR023MONITOR124MONITOR2

C21 40
1uF
25V

C2138
1000pF
50V

26

1N4148W

100V

3AMP OPT

D2101

1N4148W

3AMP OPT

D2102

1N4148W

100V

3AMP OPT

D2103

1N4148W

3AMP OPT

100V

100V

C2157
10uF
35V

R2127

12

C2158
390pF

50V

C2159
390pF

50V

R2128

12

R2129

12

C2160
390pF

50V

C2161
390pF

50V

R2130

12

R2136

12

R2134

12

R2135

12

R2133

12

L2107

AD-9060

2S

1S 1F

15uH

L2106

AD-9060

2S

1S 1F

15uH

R2139

C2167

2F

2F

C2164

0.47uF
50V

C2165

0.47uF
50V

0.1uF
50V

C2168

0.1uF
50V

C2169

0.1uF
50V

C2170

0.1uF

50V

4.7K

R2140

4.7K

R2141

4.7K

R2142

4.7K

3AMP OPT

C2173

0.01uF
50V

3AMP OPT

R2145

3.3

3AMP OPT

R2146

3.3
3AMP OPT

C2174

0.01uF

50V

3AMP OPT

C2175

0.01uF

50V

3AMP OPT

R2147

3.3

3AMP OPT

R2148

3.3

C2176

0.01uF

50V

3AMP OPT

SPK2_L+

SPK2_L-

SPK2_R+

SPK2_R-

SPEAKER2_L

SPK2_L+

SPK2_L-

SPK2_R+

SPK2_R-

SPEAKER2_R

R2151
0

R2152
0

R2153
0

R2154
0

WAFER-ANGLE

4

3

2

1

P2101

Woofer AMP.

+1.8V_AMP

L2101

BLM18PG121SN1D

3AMP OPT

AUD_LRCH

AUD_LRCK

AUD_SCK
SDA2_3.3V
SCL2_3.3V

C2101

10uF

10V

AMP_RESET_N

AUD_MASTER_CLK

+1.8V_AMP

L2103

BLM18PG121SN1D

C2103

0.1uF
16V

3AMP OPT

C2105

10uF

10V

R2106 100

R2107 100
R2108 100

R2109 100
R2110 100

C2112

1000pF

R2111

56

50V

C2108
100pF

50V

C2109

0.1uF
16V

C2113
100pF

OPT

C2116
33pF
50V

C2119

0.1uF

C2117
1000pF
50V

R2158

3.3K

+3.3V_NORMAL

L2105

BLM18PG121SN1D

R21 60 1 00

OPT

C2121
33pF
50V

3AMP OPT

C2123
22pF
50V

C21 29

1uF 25V

3AMP OPT

C2127
10uF

10V

C2126
22pF
50V

3AMP OPT

C2135

22000pF

BST1A
VDR1A

/RESET

DGND_1
GND_IO

CLK_I

VDD_IO
DGND_PLL
AGND_PLL

AVDD_PLL
DVDD_PLL

+1.8V_AMP

C2131
22pF
50V

3AMP OPT

50V

AD

LF

GND

C2133

0.1uF
16V

+24V_AMP

PGND1A_2

EP_PAD

1
2
3
4
5
6
7
8
9
10
11
12
13
14

DGND_2

OUT1A_2

PGND1A_1

54

55

56

THERMAL

57

IC2101

NTP-7000

15

16

17

DVDD

SDATA

PVDD1A_1

PVDD1A_2

OUT1A_1

51

52

53

EAN60969601

18

WCK19BCK20SDA21SCL

C2137

0.1uF
50V

OUT1B_1

OUT1B_2

PVDD1B_1

PVDD1B_2

48

49

50

22

MONITOR023MONITOR124MONITOR2

C21 41
1uF
25V

PGND1B_2

46

47

25

/FAULT

26

VDR2B27BST2B

C2139
1000pF
50V

C2143
22000pF
50V

C2145
1uF
25V

VDR1B44BST1B45PGND1B_1

43

28

PGND2B_1

42
41
40
39
38
37
36
35
34
33
32
31
30
29

C2147
10uF
35V

NC
VDR2A
BST2A
PGND2A_2
PGND2A_1
OUT2A_2
OUT2A_1
PVDD2A_2
PVDD2A_1
PVDD2B_2
PVDD2B_1
OUT2B_2
OUT2B_1
PGND2B_2

C21 50

1uF25V

C2151
22000pF

50V

R2119
0

3AMP OPT

R2120 100

3AMP OPT

R2122

3.3

C2153

22000pF

50V

3AMP OPT

R2124

4.7K

R2123

4.7K

C2156

0.01uF
50V

+24V_AMP

POWER_DET

AMP_MUTE1

R21 25 1 00

1N4148W

3AMP OPT

1N4148W

3AMP OPT

3AMP OPT

R21 26 1 00

D2104

100V

D2105

100V

3AMP OPT

R2131
12

C2162
390pF
50V

C2163
390pF

50V

R2132
12

R2138

12

R2137

12

L2108

AD-9060

2S

1S 1F

15uH

C2171

2F

C2166

0.47uF
50V

0.1uF
50V

C2172

0.1uF
50V

4.7K

R2144

4.7K

3AMP OPT

R2149

3.3

3AMP OPT

R2150

3.3
3AMP OPT

C2178

0.01uF

50V

3AMP OPT

C2177

0.01uF

50V

R2143

SPK_Woofer+

SPK_Woofer-

Woofer

SPK_Woofer-

SPK_Woofer+

R2156
0

R2155
0

3AMP

1

2

FW25001-02(SPK 2P)

P2100

Development Item(Slim Depth)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP2_BCM_ATSC

AMP_SUB_NTP

09.10

21 100

LG LOGO FOR LE9500

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LED_B/LG_LOGO

100

R2200

+5V_NORMAL

1/10W
33

OPT

R2299

B

D2200

CDS3C05HDMI1

5.6V
OPT

C

Q2200
2SC3052

E

+3.5V_ST

1/10W
0
R2298

P2200

12507WR-04L

1

2

3

4

5

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP2_BCM_ATSC

LG_LOGO_LE9500

09/10/xx

22 100

SIDE IR Emitter sync USB JACK

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+5V_USB

P2402

12507WR-03L

1

2

3

4

L2403

120-ohm

D2403

5.5V
3DTV

R2404
0

3DTV

C2401
10pF
50V

3DTV

3D_SYNC_OUT

78:T9

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP2_BCM_ATSC

3D_IR_GENDER

09/11/18

24 100

VERTICAL_NIM

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

TU2701-*1
TDFR-G155D

31

SHIELD

CN_VERTICAL_LGS8G85

TU2701-*2
TDFR-C155D

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

SHIELD

CN_HORIZONTAL_LGS8G85

TU2701-*3
TDFR-C135D

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

SHIELD

TU2701-*4
TDFR-G055D

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

SHIELD

RF_S/W_CNTL

1

BST_CNTL

2

+B1[5V]

3

NC[RF_AGC]

4

AS

5

SCL[A_DEMOD]

6

SDA[A_DEMOD]

7

NC(IF_TP)

8

SIF

9

NC

10

VIDEO

11

GND

12

1.2V

13

3.3V

14

RESET

15

2.5V

16

SCL[D_DEMOD]

17

SDA[D_DEMOD]

18

ERR

19

SYNC

20

VALID

21

MCL

22

D0

23

D1

24

D2

25

D3

26

D4

27

D5

28

D6

29

D7

30

RF_S/W_CNTL

1

BST_CNTL

2

+B1[+5V]

3

NC[RF_AGC]

4

NC_1

5

SCLT

6

SDAT

7

NC_2

8

SIF

9

NC_3

VIDEO

GND

+B2[1.2V]

+B3[3.3V]

RESET

NC_4

SCL

SDA

ERR

SYNC

VALID

MCL

D0

D1

D2

D3

D4

D5

D6

D7

RF_S/W_CNTL

1

BST_CNTL

2

+B1[+5V]

3

NC[RF_AGC]

4

NC_1

5

SCLT

6

SDAT

7

NC_2

8

SIF

9

NC_3

VIDEO

GND

+B2[1.2V]

+B3[3.3V]

RESET

+B4[2.5V]

SCL

SDA

ERR

SYNC

VALID

MCL

D0

D1

D2

D3

D4

D5

D6

D7

EU_VERTICAL_NIM_T2

RF_S/W_CNTL

1

BST_CNTL

2

+B1[5V]

3

NC[RF_AGC]

4

AS

5

SCL[A_DEMOD]

6

SDA[A_DEMOD]

7

NC(IF_TP)

8

SIF

9

NC

VIDEO

GND

1.2V

3.3V

RESET

2.5V

SCL[D_DEMOD]

SDA[D_DEMOD]

ERR

SYNC

VALID

MCL

D0

D1

D2

D3

D4

D5

D6

D7

CAN H-NIM/NIM TUNER for EU

HORIZONTAL_NIM

31

SHIELD

TU2701
TDFR-G135D

close to TUNER

RF_S/W_CNTL

1

BST_CNTL

2

+B1[5V]

3

NC[RF_AGC]

4

AS

5

SCL[A_DEMOD]

6

SDA[A_DEMOD]

7

NC(IF_TP)

8

SIF

9

NC

10

VIDEO

11

GND

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

CN

1.2V

3.3V

RESET

2.5V

SCL[D_DEMOD]

SDA[D_DEMOD]

ERR

SYNC

VALID

MCL

D0

D1

D2

D3

D4

D5

D6

D7

C2701

0.1uF
16V

R2700 0

C2702

0.1uF 16V

C2737
4700pF
50V

C2733

0.1uF

16V

OPT

close to TUNER

CN

C2738
1000pF
50V

R2701 0

C2700
100pF
50V

R2754 0

CN

+1.2V_TU

C2703

0.1uF
16V

RF_SWITCH_CTL

+5V_TU

C2706

C2704

0.1uF

100pF

16V

50V

+3.3V_TU

C2705
100pF
50V

C2707

0.1uF
16V

R2720 0

+2.5V_TU

EU

R2757

CN

0

EU

R2717

CN

0

EU

R2716

CN

0

R2711-*1

EU

47

R2711

CN

0

EU

R2709-*1

R2709

R2708

R2707

R2710

R2705

R2706

R2704

R2703

0

EU

0

EU

0

EU

0

EU

0

EU

0

EU

0

EU

0

47

R2708-*1
47

CN

CN

CN

CN

CN

CN

CN

CN

Close to the tuner

C2708

0.1uF
16V

OPT

R2757-*1
47

R2717-*1
47

R2716-*1
47

R2707-*1
47

R2710-*1
47

R2705-*1
47

R2706-*1
47

R2704-*1
47

R2703-*1
47

Q2700

2SC3052

OPT

R2721
100

R2722 0

C2709
10uF
10V

C

E

OPT

B

+3.3V_TU

CN

OPTION : RF AGC

R2724
10K

OPT

R2723
100K

TUNER_RESET

C2710

0.1uF

16V

C2711
10pF
50V

FE_TS_ERR

FE_TS_SYNC

FE_TS_VAL

FE_TS_DATA_CLK

0

EU

R2725

IF_AGC_SEL

C2712
18pF
50V

R2728 33

R2729 33

C2713
10pF
50V

FE_TS_DATA[0]

FE_TS_DATA[1]

FE_TS_DATA[2]

FE_TS_DATA[3]

FE_TS_DATA[4]

FE_TS_DATA[5]

FE_TS_DATA[6]

FE_TS_DATA[7]

C2714
18pF
50V

33

R2726

33

R2727

FE_TS_SERIAL

C2791

C2790

10pF

10pF

50V

50V

OPT

FE_TS_DATA[0-7]

OPT

R2736 0

SCL2_3.3V

SDA2_3.3V

SCL0_3.3V

SDA0_3.3V

R2738
0

C2718

0.01uF
25V

+5V_TU

E

C

L2700

BLM18PG121SN1D

Q2701
ISA1530AC1

B

+5V_TU

R2739
200

B

+5V_TU

R2702
200

B

R2740

2.2K

Q2703

2SC3052

R2743

4.7K

R2741

200

E

Q2702

ISA1530AC1

C

R2712

200

E

Q2705

ISA1530AC1

C

+3.3V_NORMAL

C2722

0.1uF
16V

+5V_NORMAL

C2721

0.1uF
16V

R2742
10K

C

R2755
10K

B

E

+5V_TU

R2746

L2702

CIC21J501NE

C2724

0.1uF
16V

L2701

BLM18PG121SN1D

C2725

0.1uF
16V

LNA2_CTL/BOSTER_CTL

470

E

B

Q2704

C

TU_CVBS

ATV_OUT

+3.3V_TU

C2728

22uF

10V

+5V_TU

C2729

C2727

10uF

16V

R2749
82

ISA1530AC1

22uF

10V

CIC21J501NE

C2734

0.1uF
16V

200mA

TU_SIF

60mA

L2703

+3.3V_TU

C2715
22uF

10V

CN
R2713-*1
56K

1/8W
1%

FE_TS_VAL

FE_TS_ERR

EU
R2713
75K

1/8W

1%

R2

MP2212DN

FB

1

GND

2

IN

3

BS

4

+3.3V_TU

C2719

0.1uF
16V

IC2701

3A

R2718

10

1/10W

AZ2940D-2.5TRE1

VIN

IC2702-*1
TC7SZ02FU

1IN_B 5 VCC

DVB_T2

2IN_A

3GND

IC2702

NL17SZ08DFT2G

1 5

DVB_T/C

2

3

CN

R2731-*1
0

1/16W
5%

C2716

100pF

EU

50V

R2731

1%

Close to IC

EN/SYNC

8

SW_2

7

SW_1

6

VCC

5

R2719 0

1%

IC2700

3

1

$0.11

2

GND

22K

VOUT

C2717
1uF

10V

OUT_Y

4

+3.3V_TU

4

CN

R2756-*1
30K

1/10W
1%

EU
R2756
18K

1%

R1

10K

R2732

Reduce analog beat noise
NR8040T3R6N

3.6uH
L2704

C2720

0.1uF
16V

Vout=0.8*(1+R1/R2)

+2.5V_TU

R2744

1

C2723

C2726

10uF

0.1uF

10V

16V

C2736

0.1uF

16V

R2758
47

POWER_ON/OFF2_2

C2730
22uF
10V

FE_TS_VAL_ERR

+1.2V_TU

C2731

0.1uF

C2735
10uF
16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

27

USB2 OPTION

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.3V_USB

C2201
1uF
10V

+3.3V_NORMAL

C2202

0.1uF

L2201

BLM18PG121SN1D

USB_DM1

USB_DP1

USB_DM2

USB_DP2

C2203

0.1uF

C2204

0.1uF

+3.3V_USB

C2205

0.1uF

USBDN1_DM

USBDN1_DP

USBDN2_DM

USBDN2_DP

VDDA33_1

NC_1

NC_2

NC_3

NC_4

VSS

1

2

3

4

5

6

7

8

9

C2206

1uF

C2207

R2201

12K

RBIAS

VDD33PLL

35

36

THERMAL

37

10

11

TEST

VDDA33_2

10V

0.1uF

C2208

15pF

C2210

15pF

R2202

1%

1M

X2201
24MHz

1/10W 1%

XTAL2

XTAL1/CLKIN

VDD18PLL

32

33

34

IC2201

USB2512A_AEZG

12

13

14

VDD18

OCS1_N

PRTPWR1

SIDE_USB_DP

SIDE_USB_DM

VDDA33_3

USBUP_DM

USBUP_DP

29

30

31

15

17

OCS2_N

VDD33CR16PRTPWR2

R2203

100K

SUSP_IND/LOCAL_PWR/NON_REM0

28

VBUS_DET

27

RESET_N

26

HS_IND/CFG_SEL1

25

SCL/SMBCLK/CFG_SEL0

24

VDD33

23

SDA/SMBDATA/NON_REM1

22

NC_8

21

NC_7

20

NC_6

19

18

R2204

NC_5

100K

C2212

0.1uF

R2205

100K

R2209
100K

R2210

100K

R2206

+3.3V_USB

OPT

100K

R2212 100K

R2211 100K

R2213 100K

0

R2208

0

+3.3V_USB

C2215

0.1uF
OPT

R2207

OPT

OPT

R2214
0

OPT

OPT

OPT

+3.3V_USB

SCL2_3.3V

SDA2_3.3V

/RST_HUB

USB / DVR Ready

L2202

MLB-201209-0120P-N2

120-ohm
C2218
100uF

KJA-UB-4-0004

JK2201

1234

USB D OWN STRE AM

5

16V

D2201

CDS3C05HDMI1

5.6V

USB

L2203

MLB-201209-0120P-N2

120-ohm
C2219
100uF

KJA-UB-4-0004

JK2202

1234

USB D OWN STRE AM

16V

NC
OUT_2
OUT_1

FLG

R2225 0

D2203

CDS3C05HDMI1

5.6V

IC2203

AP2191SG-13

NC

8

OUT_2

7

OUT_1

6

FLG

5

EAN60921001

R2227 0

IC2202

AP2191SG-13

8
7
6
5

EAN60921001

GND

1

IN_1

2

IN_2

3

EN

4

GND

1

IN_1

2

IN_2

3

EN

4

+3.3V_NORMAL

R2220

4.7K
OPT

USB_CTL1

+3.3V_NORMAL

R2221

4.7K
OPT

USB_CTL2

USB_DM2

USB_DM1

USB_DP1

R2223

2.7K

R2226

2.7K

/USB_OCD1

C2221
10uF
10V

040:J6

C2220
10uF
10V

+5V_USB

/USB_OCD2

+5V_USB

C2223

0.1uF

C2222

0.1uF

C2213

0.1uF

C2209

USB_CTL1

/USB_OCD1

C2211

0.1uF

1uF

10V

USB_CTL2

/USB_OCD2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

USB

C2214

4.7uF

USB_DP2

D2202

5

CDS3C05HDMI1

5.6V

D2204

CDS3C05HDMI1

5.6V

40

[SCART2 PIN 8]

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

EU_SCART [OPT]

SC_RE1

SC_RE2

11

PPJ-230-01

JK4101

CN

FIX-TER

10

9

8

7

6

5

4

13

R4152

4.7K
EU

EU

R4154
1K

EU

R4155
1K

[GN]GND

[GN]G

[GN]C_DET

[BL]B

[RD]R

[WH]L_IN

[RD]R_IN

[RD]MONO

B

R4156
10K

EU

+12V

CN

C

EU
Q4108
2SC3052

E

R4157

R6166

0

EU

+5V_NORMAL

L4105

EU

EU

+12V

EU

C4134

C4119

0.1uF
16V

0.1uF
16V

EU

EU

EU

R4163

10K

NLASB3157DFT2G

SELECT

6

VCC

5

A

4

Selece = High ==> A = B1

Selece = Low ==> A = B0

IC4101

EU

DTV_ATV_SELECT

B1

1

GND

2

B0

3

75

R4178

ATV_OUT

DTV/MNT_V_OUT

1%

Audio Out Amp

EU_SCART [OPT]

OPT
R4139
68K

C4121

33pF

EU

R4146

EU

DTV/MNT_L_OUT

OPT

OPT

+12V

EU

C4120

0.1uF
16V

OPT
R4140
68K

OPT

R4141
68K

C4122

33pF

R4142
68K

OPT

SCART1_Lout_N
SCART1_Lout_P

SCART1_Rout_P
SCART1_Rout_N

DTV/MNT_R_OUT

Q4106

2SC3052

Q4107

2SC3052

EU

C4123

10uF
16V

5.6K

EU

EU

C4124

10uF

16V

1/16W

EU

EU

EU
R4151

2K

1/16W

EU

R4153

2K

R41445.6K

1K

6800pF

EU

5.6K

5.6K
EU

R4143

R4145
1K

EU

C4126

50V

EU

R4148

R4147

EU

C4125
6800pF
50V

EU
R4149
33K

C4127
33pF

EU

EU
R4150
33K

C4128 33pF

EU

RT1P141C-T112

Q4109

EU

3

1

2

R4176
10K

R4177
10K

EU

EU

EU

C4130

0.1uF

IC4100
LM324D

1

1

2

2

3

3

4

4

5

5

6

6

7

7

14

14

13

13

12

12

11

11

10

10

9

9

8

8

SCART1_MUTE

+3.3V_NORMAL

D4107

5.6V
CN

D4101

30V

D4113

5.1V

D4100

5.6V
OPT

OPT

D4102

5.6V
OPT

D4103

5.6V

CN

CN

D4106

30V

OPT

D4104

5.1V
CN

L4100

BLM18PG121SN1D

EU

D4105

5.6V
OPT

L4101

BLM18PG121SN1D

EU

EU
R4101
75

1%

D4108

5.6V
CN

D4109

5.6V
CN

EU

EU

0

R4160

0

EU

B

R4159

EU

12K

C

EU

Q4110

B

2SC3052

E

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

PSC008-01

JK4100

EU

C

EU
Q4111
2SC3052

E

AV_DET

COM_GND

SYNC_IN

SYNC_OUT

SYNC_GND2

SYNC_GND1

RGB_IO

R_OUT

RGB_GND

R_GND

R4168

D2B_OUT

G_OUT

D2B_IN

G_GND

ID

B_OUT

AUDIO_L_IN

B_GND

AUDIO_GND

AUDIO_L_OUT

AUDIO_R_IN

AUDIO_R_OUT

REC_8

0

EU

EU

R4164

12

EU
R4104
75

R4108-*1

CM2012FR27KT

1%

CN

R4108
0

C4147

EU

27pF
50V

EU

D4110

R4102

5.6V

75
1%

CN

R4103

470K

R4100

470K

R4105
0

EU

1/16W
5%

C4100

1000pF

50V

EU

R4107
0

1/16W

5%
C4101
1000pF
50V

For Frequency Response

CN270nH

C4105

25V

1uF

C4104

25V

1uF

EU

CN

EU

C4148
27pF
50V

C4107
4700pF
50V

C4108
4700pF
50V

EU

EU

R4115
62

EU

R4112
75

R4111

EU

75
1%

R4116
0

C4112
100pF
50V

R4113
0

C4111
100pF
50V

SC1_R

SC1_G

SC1_B

C4113
47pF
50V

EU

R4123

0

EU

C4114

100uF

16V

EU
R4122

22

OPT
D4111

30V

SC1_L_IN

SC1_R_IN

DTV/MNT_L_OUT

DTV/MNT_R_OUT

C4115
220pF
50V

OPT

002:C6

041:F4;041:G2

041:F3;041:G2

C4116

0.1uF
16V

R4126

10K

R4128

R4129

EU

0

R4127
15K

D4112

EU

R4130

3.9K

SCART1_DET

EU

E

ISA1530AC1

REC_8

Q4104

R4131

OPT

0

C

EU
R4133

390

EU
R4132
390

Rf

Gain=1+Rf/Rg

SC1_CVBS_IN

SC1_FB

EU

30V

SC1_ID

EU
R4135
470

B

Q4105
2SC3052

C

E

Rg

R4134
180

EU

EU

R4136
47K

EU
R4137
15K

DTV/MNT_L_OUT

DTV/MNT_R_OUT

C4117
47uF
16V

B

EU

C4118

0.1uF
16V

EU

R4138
0

+12V

1K

EU

EARPHONE BLOCK

EARPHONE AMP - Spec out

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

ETC SUB BOARD I/F

2009.06.18EUROBBTV

41

016:G13;016:AJ2

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

016:T13;016:AJ2

016:H12
016:T12
016:G13
016:T13

CI CONTROL BUFFER

/CI_CE1
/CI_CE2
/CI_WE

/CI_IOWR
/CI_OE
/CI_IORD

CI

C4500

D3.3V

0.1uF

CI POWER ENABLE CONTROL

+5V_NORMAL

CI

0.1uF

C4506

CI_5V_CTL

007:E6

016:F16

16V

[GP27]007:H7

EBI_RW

CI_D[0-7]

R4512

10K

OPT

CI

R4513
10K

CI

CI

B

CI

R4514

CI_D[0]
CI_D[1]
CI_D[2]
CI_D[3]
CI_D[4]
CI_D[5]
CI_D[6]
CI_D[7]

CI

AR4515
10K

D3.3V

IC4500

MC74LCX541DTR2G

VCC

1

20

16V

OE2

19

2

O0

18

3

O1

17

4

O2

16

5

O3

15

6

O4

14

7

O5

8

13

O6

9

12

O7

10

11

CI

OE1

CI

D0

D1

D2

D3

D4

D5

D6

D7

GND

10K

R4503

EBI_CS

007:E7;007:E6;016:AL23

NAND_WEb
EBI_WE

NAND_REb

NAND_ALE

/CI_SEL

007:C2;007:E5

007:E6

007:C3;007:E6

007:H5

007:C2;007:E6

CI
AR4517

10K

CI

AR4501
10K

CI
AR4504

10K

CI_A[0]
CI_A[1]
CI_A[2]
CI_A[3]

CI_A[4]
CI_A[5]
CI_A[6]
CI_A[7]

CI_A[8]

CI_A[9]
CI_A[10]
CI_A[11]

CI_A[12]
CI_A[13]

CI_A[0-13]

007:E7;016:C13

22K

C

E

R4526

2.2K

Q4500
2SC3052

C4509

4.7uF
16V

CI

DIR

A0

A1

A2

A3

A4

A5

A6

A7

GND

S

CI

Q4501

RSR025P03

CI

IC4501

74LVC245A

1

2

3

4

5

6

7

8

9

10

D

G

CI

C4508
47uF
16V

CI

C4510

0.1uF
16V

D3.3V

CI

+5V_CI_Vs

VCC

20

OE

19

B0

18

B1

17

B2

16

B3

15

B4

14

B5

13

B6

12

B7

11

0.1uF

C4507

NAND_DATA[0]

NAND_DATA[1]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[4]
NAND_DATA[5]
NAND_DATA[6]
NAND_DATA[7]

16V

EBI_CS

007:E7;007:E6;016:K26

NAND_DATA[0-7]

CI_A[0-14]

016:AG22

CI_A[10]
CI_A[11]
CI_A[9]
CI_A[8]
CI_A[13]
CI_A[14]
CI_A[12]

CI_A[7]
CI_A[6]
CI_A[5]
CI_A[4]
CI_A[3]
CI_A[2]
CI_A[1]
CI_A[0]

CI_D[0-7]

33

AR4518

AR4509

33

33

AR4506

AR4513

33

CI

CI

CI

CI

/CI_CE1

/CI_OE

/CI_WE

/CI_IREQ

[GP39]

007:H5;016:AJ3

[GP41]016:AJ3

CI_D[3]
CI_D[4]
CI_D[5]
CI_D[6]

CI_D[7]
CI_D[0]
CI_D[1]
CI_D[2]

33

33

/CI_IOIS16

AR4511

AR4507

C4501

+5V_CI_Vs

CI

P4500

10067972-000LF

CI

CI

0

100

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26 60
27 61
28 62
29 63
30 64
31
32
33
34

CI

CI

R450147

CI
R450247

CI
R450047

CI

16V

0.1uF

R4505

CI

C4502

0.1uF

R4504

OPT

G1 G2

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59

65
66
67
68

R4507 100

R4506

OPT

OPT

016:AL9

100

CI

C4503

0.1uF

/CI_INPACK

CI

R45080

69

R4509

100

R4510

C4504

CI

100

CI

C4505

0.1uF

AR4502 33

CI

CI

AR4512 33

CI
R451147

CI

AR4514 33

CI

CI

AR4520 33

CI

0.1uF

/CI_CD1

CI_OUTDATA[4]
CI_OUTDATA[5]
CI_OUTDATA[6]
CI_OUTDATA[7]

/CI_CE2

007:G6;016:AJ2

CI_MOD_RESET
/CI_WAIT

CI_OUTVALID

CI_OUTSTART

CI_OUTDATA[0]
CI_OUTDATA[1]
CI_OUTDATA[2]
CI_OUTDATA[3]

[GP38]

007:H6;016:AJ3

/CI_VS1

/CI_IORD
/CI_IOWR

[GP49]

007:E6;016:AJ3

CI_OUTCLK

/CI_CD2

007:H5;016:AJ2

CI_OUTCLK,CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID

016:H25;016:AJ2

016:AJ3

[GP26]
016:H24
016:H25

CI

AR4516

CI

AR4505 33

CI

AR4519

33

FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]

33

FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]

FE_TS_DATA[0-7]

FE_TS_SYNC
FE_TS_VAL_ERR

DVB-CI PULL-DOWN (Near CI Slot)

/CI_INPACK

016:O9

External Demod.

DVB-CI PULL-UP (Near CI Slot)

+5V_NORMAL

10K

OPT

/CI_IOIS16

/CI_IREQ

/CI_VS1

/CI_WAIT

CI_OUTCLK

/CI_CD1
/CI_CD2
/CI_CE1
/CI_CE2

CI_MOD_RESET

CI

R4515

R4517 10K

R4516 10K

10K

CI

R4520

OPT

OPT

OPT

R4519 10K

R4521 10K

R45 18 2 2K

OPT

R4524 10K

R4523 10K

R4522 10K

R4525 10K

FE_TS_DATA_CLK

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EUROBBTV

CI

2009.06.18
45

[51Pin LVDS Connector]

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

(For FHD 60/120Hz)

P7800

TF05-51S

TM480Hz

PANEL_VCC

L7800
120-ohm
TM480Hz

C7801

C7800
10uF
25V

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

OPT

R7810 0

OPT

R7809 0

3D_DIMMING

R7808 0

3DTV

R7800 0

TM480Hz

R7801 0

TM480Hz

R7802 0

TM480Hz

R7803 0

TM480Hz

R7807 0

3DTV

1000pF
50V

TM480Hz

RRXB4+/RLV0P

RRXB4-/RLV0N

RRXB3+/RLV1P

RRXB3-/RLV1N

RRXBCK+/RLV2P

RRXBCK-/RLV2N

RRXB2+

RRXB2-

RRXB1+

RRXB1-

RRXB0+/RLCLKP

RRXB0-/RLCLKN

RRXA4+/RLV3P

RRXA4-/RLV3N

RRXA3+

RRXA3-

RRXACK+/RLV4P

RRXACK-/RLV4N

RRXA2+/RLV5P

RRXA2-/RLV5N

RRXA1+

RRXA1-

RRXA0+

RRXA0-

3D_DIMMING_2

3D_DIMMING

L/R_SYNC

FRC_RESET

SCL3_3.3V

SDA3_3.3V

V_SYNC

3D_SYNC_OUT

C7802

0.1uF
50V

TM480Hz

I2C_#3 Check(LG5111,LG1120,etc)

For Debugging

If current of 12V is over 2A, use another power cable for 3DTV

P7802

12507WR-04L

5

12507WR-04L

1

2

3

4

OPT

P7801

1

2

3

4

5

L7801

120-ohm

R7806 0

OPT

R7805 0

OPT

R7804 0

OPT

PANEL_VCC

SCL3_3.3V

SDA3_3.3V

V_SYNC

P7803

12507WR-06L

7

1

R7811

R7812

R7813

R7814

0

E_TCK

0

E_TDO

0

E_TMS

0

E_TDI

2

3

4

5

6

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

COMMON

LG5111 60Hz LVDS

09/10/xx

78 100

[To MASTER LED DRIVER]

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

P7900

12507WR-10L

IOP

11

1

2

3

4

5

6

7

8

9

10

R7904 22

IOP

R7905 22

IOP

R7906 22

IOP

C7901
100pF
50V

OPT

C7903
100pF
50V

OPT

C7905
100pF
50V

OPT

C7907
100pF
50V

OPT

+3.3V_NORMAL

R7907

3.3K
Edge

C7909

C7911

100pF

100pF

50V

50V

OPT

L_VS

M0_MOSI

M0_SCLK

M1_MOSI

R7909

3.3K
Edge

C7914
100pF
50V

OPT

M1_SCLK

S_CS_N

S_MOSI

S_SCLK

R7908

3.3K
Edge

C7913
100pF
50V

OPT

OPT

[To SLAVE LED DRIVER]

P7901

12507WR-08L

Except Edge(42/47")

1

2

3

4

5

6

7

8

9

R7900 22

OPT

R7901 22

Edge(55")

R7902 22

IOP

R7916 22

Edge(55")

R7917 22

Edge(55")

R7903 22

IOP

C7900
100pF
50V

OPT

C7902
100pF
50V

OPT

C7904
100pF
50V

OPT

C7906
100pF
50V

OPT

C7908
100pF
50V

OPT

OPT

C7910
100pF
50V

R7910 22

R7911 22
R7912 22

R7913 22

R7914 22

R7918 22

R7919 22

R7915 22

C7912
100pF
50V

OPT

IOP

IOP

Edge(55")

IOP

Edge(55")

IOP

IOP

Edge(55")

R_VS

M2_MOSI
M2_SCLK

M2_SCLK

M2_MOSI

M3_MOSI

M3_SCLK

R_VS

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP2_Saturn7M

Interface for LG5111

Ver. 1.0

72

RL_ON

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

C8000
100uF

C8001
100uF

+3.5V_ST

16V

+12V

25V

PANEL_CTL

1:AK10

R8000

PIN No

FROM LIPS & POWER B/D

+3.5V_ST

10K

C8003

0.1uF

<OS MODULE PIN MAP>

C

Q8000

B

2SC3052

E

L8003

MLB-201209-0120P-N2

C8004

0.1uF
16V

L8002

MLB-201209-0120P-N2

50V

LGD

INV_ON

18

V4:VBR-A

20

V5:NC

PWM_DIM

22

Err_out

24

+12V

L8000

CIC21J501NE

OPT
R8002
10K

R8001
47K

+12V

500

L8001

C8002
10uF
25V

C8005

0.1uF
50V

CMO(09)

B

A-DIM

PWM_DIM

RT1P141C-T112

Q8002

R8004

4.7K

C8006

0.1uF
16V

400Hz_MD_MDSI

3

1

2

0

0

R8076

R8005

MO_MOSI

M2_MOSI

400Hz_MD_MDSI/42_47_LOCAL DIMMING

AUO

INV_ON

Err_out

NC

A-DIM

R8003
22K

C

Q8001
2SC3052

E

PWM_DIM

C8008

0.01uF
25V

INV_ON

+5V_USB

MP8706EN-C247-LF-Z

SW_1

SW_2

C8007

0.1uF

BST

R8006
22

0

R8007

IN

SCAN_PSU

C8009

0.1uF
50V

B

R8008

22K

1

2

3

4

NR8040T3R6N

GND/P.DIM2

R8085

0

R80090SCAN

SCAN_BLK2

SHARP

INV_ON

Err_out

PWM_DIM

R8010

10K

R8011

1.8K

IC8000

3A

L8004

3.6uH

PWR ON

3.5V

3.5V

SCAN_LIPS

GND

C

Q8003
2SC3052

E

NORMAL_26~52

P8000
FW20020-24S

24V

1

2

2

1

24V

3

3

GND

5

5

GND

7

7

9

9

11

11

GND

13

13

GND

15

15

12V

17

17

12V

19

19

12V

21

21 22

23

23 24

SLIM_32~52

SMAW200-H24S2

OPT

C8011

0.1uF

16V

OPT

C8012

1uF

25V

C8010
10uF
25V

OPT

C8013
10uF

16V

GND

8

VCC

7

FB

6

EN/SYNC

5

10

10
12

12
14

14
16

16
18

18
20

20
22
24

25

P8001

R8084
0

SCAN_PSU

C8014
1uF
50V

4

4
6

6
8

8

24V
GND
GND

3.5V

3.5V
GND
GND/V-sync
INV ON
A.DIM
P.DIM1
Err OUT

Q8004

AO3407A

S

G

R8012
10K

POWER_ON/OFF2_1

R8013

10K

+5V_USB

MLB-201209-0120P-N2

LD

R8015

0

SHARP

R8014

D

OPT

C8015

1uF
25V

OPT

C8016

100pF

50V

Vout=(1+R1/R2)*0.8

L8005

C8018

0.1uF
50V

R8082 0

400Hz_VSYNC

NON_CMO

R8019
100

0

R8018
100

CMO

R8021

AUO

0

R8020

NON_SCAN_PSU

0

PANEL_POWER

MAX 1500mA

R8016

33K

R1

R8017

6.2K

R2

1%

1%

R8023

6.8K
OPT

R8022

SCAN_PSU

0

C8017

0.1uF
OPT

R8024

AUO/SHARP

R8025

OPT
C8019

100pF

50V

+24V

400Hz_VSYNC/42_47_LOCAL DIMMING

C8024

68uF
35V

400Hz_MO_SCLK/42_47_LOCAL DIMMING

V_SYNC

R8077 0

R8028 0

400Hz_MO_SCLK

+3.3V_NORMAL

R8026
1K

C

R8032
10K

B

Q8005
2SC3052

E

R8029

CMO

0

R8030

AUO

0

R8031
LGD_IOP
R8027

0

C8022

0.1uF
50V

0

LGD_V4

NON_OPC

R8033

0

SCAN/FHD_OPC

R8034

0

HD_OPC
R8035

+3.3V_NORMAL

0

+5V_USB

C8023

0.1uF
16V

0

OPT

R8083

0

0

C8021
1uF
25V

OPT

PANEL_VCC

C8020
22uF
10V

R8078
0

R_VS

400Hz_VSYNC

R8036
0

L_VS

M2_SCLK
MO_SCLK

INV_CTL

R8039
10K
OPT

A_DIM

PWM_DIM

SCAN_BLK1/OPC_OUT

OPC_OUT

OPT

R8037

4.7K

ERROR_OUT

C8069

0.1uF
OPT

C8025

0.1uF
16V

PIN No

L_VS
R_VS
MO_SCLK
M2_SCLK
MO_MOSI
M2_MOSI

SCAN_BLK1/OPC_OUT

OPC_OUT

SCAN_BLK2

+12V

L8007

CIC21J501NE

C8028
10uF
25V

C8030
10uF
25V

16

18

23

Vout=0.8*(1+R1/R2)

BCM core 1.2V volt

AGND

1

SS

15

2

PGND_1

3

IC8001

SW_1

4

IN_1

5

NC

6

BS

7

MP2208DL-LF-Z

C8032

0.1uF

THERMAL

+3.5V_ST

L8006

C8027

0.1uF

C8026

0.1uF

MLB-201209-0120P-N2

C8029

22uF
16V

BCM DDR 1.8V

+3.5V_ST

L8008

CIC21J501NE

Placed on SMD-TOP

C8031

C IN

22uF
10V

LX95

N.C

Driver
On

N.C22

N.C

+5V_NORMAL

IC8003

AOZ1072AI

PGND

1

VIN

2

C8068

0.1uF
AGND

16V

3

FB

4

ESD

D8000

5.6V

Vout=0.9*(1+R1/R2)

IC8002

MP2108DQ

25V

BST

1

VIN

2

3A

LX

3

PGND

4

SGND

5

14

13

12

11

10

9

8

C8033
1uF
10V

EP

FB

EN/SYNC

PGND_2

SW_2

IN_2

POK

VCC

R8040

100K

R8041

C8034

10

C8035
22uF

0.01uF

LX_2

2A

L8009

2uH

C8036

0.1uF

R8042
0

R8044

R8045

0

NON_ESD

R8043
470K

1%

8

LX_1

7

EN

6

COMP

5

10K

ESD
R8045-*1
100K

R8046
30K
1%

R1 R2

C8037
22uF
10V

OPT

R8047

NR8040T3R6N

R8050

10K

12K

R8049

POWER_ON/OFF2_1

3.9K

D1.2V

R8048

910K
1%

C8041
22uF
10V

Vout=0.8*(1+R1/R2)

Replaced Part

10K

C8038

0.01uF
25V

R8052

RUN

10

VREF

9

COMP

8

FB

7

SS

6

L8010

3.6uH

POWER_ON/OFF2_2

2200pF

C8040

L8011

BLM18PG121SN1D

C8043
10uF
16V

L8012

3.6uH

NR8040T3R6N

C8042

0.01uF
25V

C8039
3300pF

50V

R8051

6.8K

MAX 350mA

1%

R8053

47K

R1

1%

5.6K

R8054

OPT

C8046

100pF

50V

1%

R2

R8055

10K

A1.2V

C8045

0.1uF
16V

Max 1100 mA

POWER_ON/OFF1

OPT
50V

100pF

C8044

R2

R8056
10K

1/10W

1%

MAX 3.1A

R1

R8057

10K

1%

C8047
22uF
10V

C8048
22uF
10V

+5V_NORMAL

C8049

C8066

0.1uF

22uF

16V

10V

D1.8V

Placed on SMD-TOP

C8050

0.1uF

15V-->3.6V

20V-->3.5V

24V-->3.48V
12V-->3.58V

ST_3.5V-->3.5V

Power_DET

+3.5V_ST

R8058

20K

C8054
2200pF

50V

+3.3V_NORMAL

POWER 18.5V

POWER 18.5V

500

L8014

C8055

0.1uF

C8051

0.1uF

50V

OPT

R8080

14K 1%

+12V

L8013

CIC21J501NE

C8052
22uF
25V

C8053

10uF

16V

+12V

R8063

12K

1%

PD_+12V

R8064

5.1K

1/16W

5%

NON_PD_+3.5V

+24V

R8061-*2
22K 1%

R8062-*2

4.7K 1%

POWER 24V
R8061-*1
24K 1%

POWER 24V
R8062-*1

4.3K 1%

POWER 20V
R8061
24K 1%

POWER 20V
R8062

5.1K 5%

+3.3V_NORMAL

R8060

10K

VIN

3

AGND

2

1

PGND

LX

7

COMP

EN

6

IC8005

FB

4

AOZ1024DI

5

A2.5V

SC4215ISTRT

1

NC_1
R8059
10K

OPT

C8056

0.1uF

Vout=0.8*(1+R1/R2)

NC_2

2

EN

3

VIN

4

+3.5V_ST

R80671K1%

R8064-*1

27K

OPT

3.9K

IC8004

PD_+3.5V

1%

PD_+3.5V

R8066

R8068
100K

IC8007

NCP803SN293

VCC

3

GND

R8079
100K

IC8008

NCP803SN293

VCC

3

1

GND

POWER_ON/OFF2_2

L8015

3.6uH

R8069

27K

4.7K

R8070

R8071

10K

8

GND

7

ADJ

6

VO

5

NC_3

RESET

2

1

RESET

2

MAX 2.3A

1%

C8057

1%

22uF
10V

1%

VOUT : 2.533V

C8058

R8073
18K
1%

R8072
39K
1%

10uF

16V

R8074
100

C8059
22uF
10V

R2

R1

R8081
100

+3.5V_ST

R8075

OPT

+3.3V_NORMAL

C8067
10uF
10V

C8061
10uF

10K

POWER_DET

ESD
C8065

0.1uF
16V

not to RESET at 8kV ESD

L8016

CIC21J501NE

C8063

0.1uF
16V

A2.5V

500

L8017

C8062

16V

0.1uF

D3.3V

C8064

0.1uF
16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM (EUROBBTV)

POWER

15

12505WS-12A00

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.5V_ST

EEPROM for Micom

IC8100

M24C16-WMN6T

NC_1

1

NC_2

47K

R81 00

NC_3

2

3

VSS

4

MICOM MODEL OPTION

AMP_RESET_N

PANEL_CTL

OPC_EN

P8100

1

2

3

4

5

6

7

8

9

10

11

12

R8104 10K

13

8

7

6

5

R8102 100
R8103 100
R8101 100

OPC

+3.5V_ST

+3.5V_ST

R8108

R8105

R8106

R8107

VCC

WC

SCL

SDA

R81 13 2 2

R81 15 2 2

R81 16 2 2

R81 18 2 2

R81 19 2 2

10K

10K

10K

10K

+3.5V_ST

PDP/3D

R8109 10K

LCD/OLED

R8110 10K

R8117

22

R8114

22

TOUCH_KEY

LOGO_BUZZ

R8111 10K

PWM_LED

TACT_KEY

R8112 10K

GND

+3.5V_ST

R8139
10K

OPT

OPT

47K

R8140

15pF

C8101

50V

50V

15pF

C8102

10MHz
X8100

0

R8138

10Mhz Crystal Ready

+3.5V_ST

for Debugger

C8103

0.1uF

MICOM_RESET
NEC_ISP_Tx

NEC_ISP_Rx

OCD1A

OCD1B

FLMD0

NEC_ISP_Tx

NEC_ISP_Rx

OCD1A

OCD1B

+3.5V_ST

+3.5V_ST

OPT

R8126
10K

POWER_ON/OFF2_1

SCL1_3.3V

SDA1_3.3V

NEC_EEPROM_SCL

NEC_EEPROM_SDA

HDMI_CEC

AMP_MUTE

MODEL1_OPT_0

SOC_RESET

INV_CTL

MODEL1_OPT_1

OCD1B

22

R8127

22

R8128

P33/TI51/TO51/INTP4

R8129 22

R8130 22

R8131 22

R8132 22

R8133 22

R8134 22

R8135 22

R8136 22

P32/INTP3/OCD1B

NON_M-REMOTE

P60/SCL0
P61/SDA0

P62/EXSCL0

P63

P75

P74
P73/KR3
P72/KR2
P71/KR1
P70/KR0

1
2
3
4
5
6
7
8
9
10
11
12

VDD

48

13

C8100

R8125 4.7K

0.1uF

NEC_EEPROM_SCL

NEC_EEPROM_SDA

R8122 4.7K

P31/INTP2/OCD1A

MODEL OPTION

OLED/3D

R8123 10K

R8120 10K

LCD/PDP

R8124 10K

R8121 10K

MODEL1_OPT_0
MODEL1_OPT_1
MODEL1_OPT_2
MODEL1_OPT_3

PIN NAME

MODEL_OPT_0

MODEL_OPT_1

MODEL_OPT_2

MODEL_OPT_3

MODEL_OPT_0

MODEL_OPT_3

MODEL_OPT_1

MODEL_OPT_2

PIN NO.

8

11

30

31

0

0

LOW

0

HIGH

OLED/3D

LOGO_BUZZ

TOUCH_KEY

PDP/3D

PDPLCD

0

1

LOW_SMALL

0

LOW

LCD/PDP

PWM_LED

TACT_KEY

LCD/OLED

OLED

1

0

LX9500

10

01

3D

1

1

HIGH

1

1

NON_M-REMOTE

R81 42 22

OCD1A

FLMD0

0

R8146

R8143 10K

22p F

C81 05

X8101

32.768KHz
R8175

4.7M

MICOM_DOWNLOAD

C8106 27pF

GND

C8104 0.1uF

RESET

P124/XT2/EXCLKS

P123/XT1

FLMD0

P122/X2/EXCLK/OCD0B

P121/X1/OCD0A

REGC

VSS

41

42

43

44

45

46

47

IC8101

UPD78F0513AGA-GAM-AX

NEC_MICOM

14

15

16

17

18

19

20

P15/TOH0

P14/RXD6

P13/TXD6

LED_R/BUZZ

NEC_ISP_Rx

P12/SO10

P11/SL10/RXD0

22

R81 76

NEC_ISP_Tx

POWER_ON/OFF2_2

P30/INTP1

P17/TI50/TO50

P16/TOH1/INTP5

22

22

TACT_KEY

R81 45

R81 44

IR

POWER_DET

LED_B/LG_LOGO

WIRELESS_PWR_EN

WIRELESS_DETECT

MICOM_RESET

47K

22

R8184

R8180

C8108

0.1uF

R8178 22

P120/INTP0/EXLVI

P41

P40

37

38

39

40

36
35
34
33
32
31
30
29
28
27
26
25

21

22

23

24

AVSS

AVREF

P10/SCK10/TXD0

22

R81 77

NEC_RXD

22

R81 79

R8181 10K

R8182 10K

R8183 10K

NEC_TXD

+3.5V_ST

OPT

OPT

OPT

+3.5V_ST

SW8100

JTP-1127WEM

12

4 3

R8186 20K

1/16W
1%

R8185

20K

1/16W

1%

P140/PCL/INTP6
P00/TI000
P01/TI010/TO00
P130
P20/ANI0
ANI1/P21
ANI2/P22
ANI3/P23
ANI4/P24
ANI5/P25
ANI6/P26
ANI7/P27

+3.5V_ST

C8107 1uF

R8187 22

R8188 22

R8189 10K





R8192 22

R8194 22

R8195 22

R81 96 22

R8190 22

R8193 22

R8191 22

SCART1_MUTE

SIDE_HP_MUTE

OPC_EN

C

Q8100

B

2SC3052

E

FOR ATSC Assy

EDID_WP

RL_ON

SCART1_MUTE

WIRELESS_SW_CTRL

FLASH_WP

MODEL1_OPT_3

MODEL1_OPT_2

POWER_ON/OFF1

MICOM_DOWNLOAD

SIDE_HP_MUTE

KEY2

KEY1

TP8100

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP2_Saturn7M

MICOM

Ver. 1.4

5

+3.5V_ST

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

EYEQ
R8225

50V

R8227 1.5K

R8224
100

C8212
100pF

LED_R/BUZZ

100

EYEQ

R8226
100

TACT_KEY

50V

IR & KEY

KEY1

KEY2

+3.5V_ST

R8202

Q8200

2SC3052

47K

R8203

C

B

E

R8201
0

OPT

R8200

IR

22

+3.5V_ST

R8205

47K

R8206

3.3K
OPT

+3.5V_ST

COMMERCIAL

IR_OUT

COMMERCIAL

R8207

22

R8204

47K

10K

C

B

Q8201

E

2SC3052

R8211

10K

1%

R8209
100

R8210
100

COMMERCIAL_EU

Q8202

2SC3052

COMMERCIAL_EU

R8213

10K
1%

BLM18PG121SN1D

BLM18PG121SN1D

+3.5V_ST

R8214

47K

C

B

E

COMMERCIAL_EU

R8212
0

COMMERCIAL_US

L8200

L8201

+3.5V_ST

R8216

10K

C8206

0.1uF

R8218

COMMERCIAL

Q8204

2SC3052

COMMERCIAL

C8207

0.1uF

L8202

BLM18PG121SN1D

C8208

0.1uF

+3.5V_ST

47K

C

B

COMMERCIAL

E

16V

R8220

47K

D8200

5.6V

AMOTECH

D8201

AMOTECH

C8209
1000pF
50V

+3.3V_NORMAL

5.6V

LED_B/LG_LOGO

L8203

BLM18PG121SN1D

C8210

0.1uF
16V

NEC_EEPROM_SCL

NEC_EEPROM_SDA

C8211
1000pF

Zener Diode is

WIRELESS

IR_PASS

R8208

WIRELESS

+3.5V_ST

R8215

47K

WIRELESS

22

R8217

C

Q8203

B

2SC3052

WIRELESS

WIRELESS

E

+3.5V_ST

R8219

47K

WIRELESS

10K

Q8205

2SC3052

WIRELESS

R8221

47K

C

B

WIRELESS

E

close to wafer

C8213
1000pF
50V

OPT

C8214
1000pF
50V

OPT

AMOTECH

D8204

CDS3C05HDMI1

5.6V

OPT

C8215

0.1uF
16V

D8206

5.6V

R8276

1.5K

D8205

CDS3C05HDMI1

5.6V

OPT

R8280

10K

P8200

12507WR-12L

1

2

3

4

5

6

7

8

9

10

11

12

13

ETHERNET CONNECT

R8283

EPHY_LINK

0

R8284
0

R8285
0

OPT
C8221
10pF

50V

R8286
0

OPT
C8218
10pF

50V

EPHY_TDP

EPHY_TDN

EPHY_RDP

EPHY_RDN

EPHY_ACTIVITY

OPT
C8220
10pF

50V

OPT
C8222
10pF

50V

D8210

5.6V

D8208

D8207

5.6V

5.6V

D8209

D8211

D8212

5.6V

5.6V

5.6V

C8216
1000pF
50V

1000pF

C8217

A2.5V

L8204

CIC21J501NE

D3.3V

R8281 510

R8282 510

JK8200

XRJV-01V-D12-180

1

2

3

4

5

6

7

8

D1

D2

D3

D4

9

RS232C

+3.5V_ST

C8200 0.33uF

C8201

0.1uF

C8202

0.1uF

C8203

0.1uF

C8204

0.1uF
DOUT2

RIN2

C1+

C1-

C2+

C2-

V+

V-

IC8200

MAX3232CDR

1

2

3

4

5

6

7

8

EAN41348201

C8205

0.1uF

VCC

16

GND

15

DOUT1

14

RIN1

13

ROUT1

12

DIN1

11

DIN2

10

ROUT2

9

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

+3.5V_ST

4.7K

R8222

OPT

4.7K
OPT

R8223

D8202
CDS3C30GTH
30V

IR_OUT

D8203
CDS3C30GTH
30V

R8273 0

R8274

R8272

R8275

R8277
100

R8278
100

0

0

0

OPT

R8279

Trace impedance : 100 ohm differenctial impedance to GND plane

10

5

9

JK8201

4

8

3

7

2

6

1

0

SPG09-DB-009

BCM_RXD1

NEC_RXD

BCM_TXD1

NEC_TXD

5 mils trace width with 7 mils air gap on P/N pair.
Adjacent TX/RX differential pairs should be separated by more than
15 mils to each other

SHIELD

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

20

JK8302

EAG59023302

19

18

17

16

15

14

13

12

11
10

9

8

7

6

5

4

3

2

1

HP_DET

5V

GND

DDC_DATA

DDC_CLK

NC

CE_REMOTE

CK-

CK_GND

CK+

D0-

D0_GND

D0+

D1-

D1_GND

D1+

D2-

D2_GND

D2+

R8302

D8302

5.5V
OPT

1K

GND

R8307
0

R8308

0

GND

KRC104S

Q8302

JP8304

JP8305

E

C

KRC104S

Q8305

B

DDC_SDA_1

DDC_SCL_1

* HDMI CEC

E

C

KRC104S

Q8307

B

DDC_SDA_4

DDC_SCL_4

E

C

B

R8321

4.7K

GND

D8311

5.5V
ESD

HDMI_HPD_4

5V_HPD4

5V_HDMI_4

CEC_REMOTE

CK-_HDMI4

CK+_HDMI4

D0-_HDMI4

D0+_HDMI4

D1-_HDMI4

D1+_HDMI4

D2-_HDMI4

D2+_HDMI4

CEC_REMOTE

R8326

D8312

MMBD301LT1G

+3.5V_ST

22K

G

SBD

Q8308

BSS83

+3.3V_HDMI

100K

R8349

HDMI_CEC

+3.3V_NORMAL

E

C

R8311

4.7K

HDMI_HPD_1

B

5V_HPD1

5V_HDMI_1

D8305

5.5V
OPT

GND

CEC_REMOTE

CK-_HDMI1

CK+_HDMI1

D0-_HDMI1

D0+_HDMI1

D1-_HDMI1

D1+_HDMI1

D2-_HDMI1

D2+_HDMI1

JACK_GND

GND

20

JK8303

EAG42463001

19

18

17

16

15

14

13

12

11
10

9

8

7

6

5

4

3

2

1

HP_DET

5V

GND

DDC_DATA

DDC_CLK

NC

CE_REMOTE

CK-

CK_GND

CK+

D0-

D0_GND

D0+

D1-

D1_GND

D1+

D2-

D2_GND

D2+

R8316

D8313

5.6V

CDS3C05HDMI1

D8308

5.5V
ESD

GND

1K

D8314

5.6V

CDS3C05HDMI1

GND

R8317
82

R8318
82

GND

KRC104S

Q8306

JP8306

JP8307

+3.3V_HDMI

L8300

BLM18PG121SN1D

C8324

0.1uF

YKF45-7058V

SHIELD

20

JK8300

EAG59023302

HDMI_3

YKF45-7058V

SHIELD

20

JK8301

EAG59023302

YKF45-7058V

19

18

17

16

15

14

13

12

11
10

9

8

7

6

5

4

3

2

1

19

18

17

16

15

14

13

12

11
10

HP_DET

5V

GND

DDC_DATA

DDC_CLK

NC

CE_REMOTE

CK-

CK_GND

CK+

D0-

D0_GND

D0+

D1-

D1_GND

D1+

D2-

D2_GND

D2+

HP_DET

5V

GND

DDC_DATA

DDC_CLK

NC

CE_REMOTE

CK-

CK_GND

CK+

D0-

9

D0_GND

8

D0+

7

D1-

6

D1_GND

5

D1+

4

D2-

3

D2_GND

2

D2+

1

5V_HDMI_1

A1CA2

5V_HDMI_3

A1CA2

R8314
47K

R8315
47K

GND

C8308

DDC_SDA_1

DDC_SCL_1

DDC_SDA_3

DDC_SCL_3

SIDE_HDMI_PORT4

+5V_NORMAL

5V_HDMI_2

R8319

47K

HDMI_3

+5V_NORMAL

R8320

4.7K

A1CA2
HDMI_3

D8309

HDMI_3

5V_HDMI_4

A1CA2

R8322
47K

R8323

4.7K

5V_HPD2

5V_HPD4

D8310

EDID Pull-up

DDC_SDA_2

DDC_SCL_2

DDC_SDA_4

DDC_SCL_4

HDMI1

HDMI_HPD_1

DDC_SDA_1

DDC_SCL_1
CK-_HDMI1
CK+_HDMI1

D0-_HDMI1
D0+_HDMI1

D1-_HDMI1
D1+_HDMI1

D2-_HDMI1
D2+_HDMI1

+5V_NORMAL

0.1uF

+5V_NORMAL

+1.8V_HDMI

R8325

1.8K

R8324

1.8K

C8302

16V

C8300

0.1uF

5V_HDMI_1

R8327

C8301

0.1uF
16V

0.1uF

C8305

0.1uF

C8307

0.1uF

HDMI_CLK-

HDMI_CLK+

HDMI_SDA

HDMI_SCL

OPT

R8328

0

0

C8303

C8304

0.1uF

0.1uF

16V

16V

HDMI_RX1-

HDMI_RX0+

HDMI_RX0-

33

R8330

R8329 33

R8331 33

VSS_1
OUT_C+
OUT_C-

VDDO[3V3]
OUT_DDC_CLK
OUT_DDC_DAT

VSS_2

VDDDC[1V8]_1

RXA_HPD

RXA_5V
RXA_DDC_DAT
RXA_DDC_CLK

RXA_C-

RXA_C+
VDDH[3V3]_1

RXA_D0­RXA_D0+

VSS_3
RXA_D1­RXA_D1+

VDDH[3V3]_2

RXA_D2­RXA_D2+

VDDH[1V8]_1

AUX_5V

HDMI_RX1+

R8332 33

5V_HDMI_2

HDMI2

HDMI_RX2-

HDMI_RX2+

33

R8334 33

R8333

OUT_D0-

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

VSS_427TEST1

C8306

0.1uF
16V

OUT_D0+

100

26

99

R8335

0.1uF

OUT_D1+

OUT_D1-

VSS_12

97

98

28

29

RXB_5V

RXB_HPD

RXB_DDC_DAT

OPT

0

HDMI_HPD_2

C8310

0.1uF

C8309

OUT_D2+

OUT_D2-

VDDO[1V8]

93

94

95

96

TDA19997

30

31

32

RXB_C-33RXB_C+

RXB_DDC_CLK

DDC_SCL_2

DDC_SDA_2

CK-_HDMI2

C8311

0.1uF

D2-_HDMI4

D2+_HDMI4

RXD_D2-

RXD_D2+

VDDDC[1V8]_3

VSS_11

89

90

91

92

IC8300

34

35

37

VSS_5

RXB_D0-36RXB_D0+

VDDH[3V3]_3

D0+_HDMI2

CK+_HDMI2

D0-_HDMI2

D1-_HDMI4

D1+_HDMI4

VSS_1086RXD_D1-

RXD_D1+

VDDH[3V3]_8

87

88

38

40

RXB_D1-39RXB_D1+

RXB_D2-42RXB_D2+

VDDH[3V3]_4

D1+_HDMI2

D1-_HDMI2

D0+_HDMI4

RXD_D0-

RXD_D0+

83

84

85

41

43

VSS_6

D2-_HDMI2

D2+_HDMI2

CK+_HDMI4

D0-_HDMI4

44

45

CDEC_DDC

VDDDC[1V8]_2

CK-_HDMI4

DDC_SDA_4

DDC_SCL_4

RXD_5V

RXD_DDC_DAT

RXD_DDC_CLK

RXD_C-81RXD_C+82VDDH[3V3]_7

77

78

79

80

46

47

48PD49

TEST2

I2C_SDA50I2C_SCL

R8336 0

VDDDC[1V8]_4

22

R8338

R8337

0

SDA2_3.3V

HDMI_HPD_4

5V_HDMI_4

C8312

0.1uF
16V

0

OPT

R8339

Place close
to TDA9996

RXD_HPD

76

VDDH[1V8]_2

75

R12K

74

VSS_9

73

RXC_D2+

72

RXC_D2-

71

VDDH[3V3]_6

70

RXC_D1+

69

RXC_D1-

68

VSS_8

67

RXC_D0+

66

RXC_D0-

65

VDDH[3V3]_5

64

RXC_C+

63

RXC_C-

62

RXC_DDC_CLK

61

RXC_DDC_DAT

60

RXC_5V

59

RXC_HPD

58

CEC

57

VSS_7

56

VDDS[3V3]

55

CDEC_STBY

54

INT_N/MUTE

53

RXE_DDC_DAT

52

RXE_DDC_CLK

51

C8313

0.1uF
16V

22

R8340

SCL2_3.3V

HDMI4

R8343

C8319

0.1uF

C8320

0.1uF

C8321

0.1uF

C8322

0.1uF

+1.8V_HDMI

C8323

C8318

C8316

0.1uF
16V

5V_HDMI_3

R8344
12K

R8345
0
OPT

R8346 0

OPT

C8315

0.1uF

0

OPT

C8314

0.1uF
16V

0.1uF

0.1uF
16V

16V

C8317

0.1uF
16V

Ready for TDA19997

+3.3V_HDMI

OPT
R8347

4.7K
OPT

4.7K

R8348

D2+_HDMI3
D2-_HDMI3

D1+_HDMI3
D1-_HDMI3

D0+_HDMI3

D0-_HDMI3

CK+_HDMI3
CK-_HDMI3

DDC_SCL_3

DDC_SDA_3

HDMI_HPD_3

HDMI3

KJA-ET-0-0032

GND

D8300

5.5V
GND

OPT

HDMI_3
KRC104S

GND

HDMI_3

R8303
0

R8304

0

HDMI_3

GND

R8305
0

R8306

0

Q8300

JP8300

JP8301

GND

KRC104S

Q8301

JP8302

JP8303

HDMI_3

R8300

1K

GND

D8301

5.5V
OPT

R8301

1K

GND

UI_HW_PORT1

E

HDMI_3

KRC104S

Q8303

E

C

B

C

DDC_SDA_2

DDC_SCL_2

UI_HW_PORT3

E

KRC104S

Q8304

E

C

B

C

DDC_SDA_3

DDC_SCL_3

UI_HW_PORT2

R8309

4.7K

R8310

4.7K

+5V_NORMAL

HDMI_HPD_2

B

HDMI_3

5V_HPD2

5V_HDMI_2

D8303

5.5V
OPT

GND

CEC_REMOTE

CK-_HDMI2

CK+_HDMI2

D0-_HDMI2

D0+_HDMI2

D1-_HDMI2

D1+_HDMI2

D2-_HDMI2

D2+_HDMI2

HDMI_HPD_3

B

5V_HPD3

5V_HDMI_3

D8304

5.5V
OPT

GND

CEC_REMOTE

CK-_HDMI3

CK+_HDMI3

D0-_HDMI3

D0+_HDMI3

D1-_HDMI3

D1+_HDMI3

D2-_HDMI3

D2+_HDMI3

5V_HPD1

5V_HPD3

D8306

R8312

47K

+5V_NORMAL

D8307

R8313
47K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LEE GI YOUNG

BCM (EUROBBTV)

HDMI

2009.06.18

8

SPDIF_OUT

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.3V_NORMAL

R8400

1K

D8400
30V

OPT

C8400

0.1uF
16V

JP8401

JP8400

JP8402

VINPUT

JK8400

JST1223-001

GND

1

VCC

2

3

Fib er O pti c

4
FIX_POLE

RGB PC

RGB_HSYNC

RGB_VSYNC

BCM Reference

DSUB_B

DSUB_G

DSUB_R

R8401

22

R8402

22

D0A

D0B

D1A

D1B

GND

IC8401-*1

IC8400
74F08D

1

2

Q0

3

4

5

Q1

6

7

+5V_NORMAL

VCC

14

D3B

13

12

11

10

9

8

R8403
75

PEJ027-01

C8401

0.1uF

D3A

Q3

D2B

D2A

Q2

R8406

22

R8405

22

R8404
75

RGB AUDIO IN

JK8401

3

6A

7A

4

5

7B

6B

R8407
75

E_SPRING

T_TERMINAL1

B_TERMINAL1

R_SPRING

T_SPRING

B_TERMINAL2

T_TERMINAL2

R1EX24002ASAS0A

A0

1

A1

2

A2

3

DEV

VSS

4

RGB_EDID_RENESAS

IC8401

M24C02-RMN6T

E0

1

E1

2

E2

3

VSS

4

0IMMR00014A

RGB_EDID_ST

OPT

50V

22pF

30V

D8401

ADUC30S03010L_AMODIODE

C8402

30V

D8403

ADUC30S03010L_AMODIODE

D8402

D8404

D8405

30V

30V

30V

VCC

8

WP

7

SCL

6

SDA

5

C8404

VCC

8

WC

7

SCL

6

SDA

5

OPT

50V

22pF

C8403

L8408

60-ohm

RGB_BEAD

L8409

60-ohm

RGB_BEAD

L8410

60-ohm

RGB_BEAD

BCM Reference

L8408-*1 0

RGB_0OHM

L8409-*1 0

RGB_0OHM

L8410-*10

RGB_0OHM

D8406
AMOTECH

5.6V

D8407

AMOTECH

5.6V

0.1uF

16V

R8411
470K

R8412
470K

ENKMC2838-T112

R8414

2.7 K

R84 13

18pF 50V

18pF 50V

C8405

C8406

OPT

D8408

CDS3C05HDMI1

5.6V

RED_G ND

6

+5V_NORMAL

D8409

A1

C

A2

2.7K

R8416

22

R8415

22

R8417

0

H_SYN C

NC10SYNC_ GND

DDC_D ATA

BLUE_ GND

GND_2

RED2GREEN3BLUE4GND_15DDC_G ND

GREEN _GND

13

12

11

8

7

1

SPG09 -DB-01 0

JK840 2

C8407

1uF

25V

C8408

1uF

25V

9

V_SYN C

14

R8418
0

R8420

10K

R8421

R8419
0

R8422
100

0

OPT

D8410

CDS3C05HDMI1

5.6V

OPT

0
R8423

DDC_C LOCK

15

SHILE D

16

PC_R_IN

PC_L_IN

EDID_WP

RGB_DDC_SCL

RGB_DDC_SDA

+3.3V_NORMAL

R8424
10K

OPT

D8411

5.6V

ADMC5M03200L_AMODIODE

RGB IN

1K

R8425

C8409
100pF
50V

DSUB_DET

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

ETC SUB BOARD I/F

2009.06.18EUROBBTV

9

SIDE CVBS PHONE JACK

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

(New Item Developmen)

JK8600

KJA-PH-1-0177

5 M5_GND

4 M4

3 M3_DETECT

1 M1

6 M6

D8602

5.6V

D8600

5.5V

D8601

5.6V

D8603

5.6V

R8601

470K

R8603
0

C8600
100pF
50V

R8602
470K

C8607

25V

1uF

C8606

25V

1uF

ALL for SIDE_GENDER option

C8605
47pF
50V

+3.3V_NORMAL

R8605
10K

R8606
0

R8607
0

R8608

1K

C8611
100pF
50V

C8612
100pF
50V

SIDE_AV_CVBS

SIDE_AV_DET

SIDE_AV_L_IN

SIDE_AV_R_IN

SIDE COMPONENT PHONE JACK

(New Item Developmen)

D8064

5.1V
D8068

5.1V

+3.3V_NORMAL

JK8601

KJA-PH-1-0177

5 M5_GND

4 M4

3 M3_DETECT

1 M1

6 M6

R8600

10K

D8606

5.6V

D8607

5.5V

D8605

5.5V

C8601
27pF

50V

C8603
27pF
50V

C8602
27pF

50V

L8600
270nH

R8604
1K

C8604
100pF

50V

L8602
270nH

L8601
270nH

C8608

27pF
50V

C8610

27pF
50V

C8609

27pF
50V

SIDE_COMP_Y

SIDE_COMP_DET

SIDE_COMP_Pb

SIDE_COMP_Pr

Near J

Run Along SIDE_COMP_Y_IN,SIDE_COMP_Pr_IN,SIDE_COMP_Pb_IN Trace

C8613 0.1uF

R8609

36

SIDE_COMP_INCM

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SIDE_GENDER

11

WIRELESS READY MODEL

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

JK8700

KJA-PH-3-0168

From wireless_I2C to micom I2C

Q103

FDV301N

WIRELESS_SDA

WIRELESS_SCL

D

+3.3V_NORMAL

G

S

OPT

D

OPT

R123 0

R124

10K

OPT

G

Q104

FDV301N

S

WIRELESS

0

WIRELESS

R173

Wireless power

+24V

C8700

0.1uF
50V

WIRELESS_PWR_EN

SDA2_3.3V

SCL2_3.3V

WIRELESS

WIRELESS_DL_RX

WIRELESS_TX

BCM_TX

R8700

0

R8701

WIRELESS

Y1

Y0

Z1

Z0

INH

VEE

0

VSS

R8705

2.2K

R8702
10K

B

NON_WIRELESS

R8703

IC8700

MC14053BDR2G

1

WIRELESS

2

3

Z

4

5

6

7

8

0

R8704
22K

C

Q8700

E

16

15

14

13

12

11

10

9

C8701

2.2uF
S

G

Q8701

AO3407A

VDD

Y

X

X1

X0

A

B

C

D

MLB-201209-0120P-N2

C8702

0.01uF

50V

+3.5V_ST

WIRELESS

R8707

0

BCM_TXD1

BCM_RXD1

R8708

WIRELESS

R8706
0

NON_WIRELESS

L8700

C8704
10uF
35V

0

WIRELESS_DETECT

WIRELESS_SCL

WIRELESS_SDA

C8705
10uF

WIRELESS_RX

35V

WIRELESS_TX

IR_PASS

C8703

0.1uF

WIRELESS_DL_TX
WIRELESS_RX

+3.5V_ST

BCM_RX

OPT

OPT

4.7K
R8711

WIRELESS_SW_CTRL

47K

R8712

+3.3V_NORMAL

R8714

10K

R8713 1K

VCC[24V/20V/17V]_1

VCC[24V/20V/17V]_2

VCC[24V/20V/17V]_3

VCC[24V/20V/17V]_4

VCC[24V/20V/17V]_5

VCC[24V/20V/17V]_6

INTERRUPT

TP8700

TP8701

I2C_SCL

I2C_SDA

UART_RX

UART_TX

DETECT

GND_1

RESET

GND_2

GND_3

GND_4

GND_5

GND_6

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

IR

18

19

20

21

SHIELD

RS232C & Wireless

WIRELESS_SW_CTRL

LOW

SELECT PIN

X1/Y1/Z1

STATUS

WIRELESS Dongle connect --> WIRELESS RS232HIGH

WIRELESS Dongle Dis_con --> S7 RS232X0/Y0/Z0

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

WIRELESS

12

+24V

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

L8803

MLB-201209-0120P-N2

+24V_AMP

C8827

0.1uF
50V

+3.3V_NORMAL

C8800

0.1uF
16V

IC8800

AP1117E18G-13

Vd=1.4V

3IN1

2

OUT

ADJ/GND

AUD_LRCH

AUD_LRCK

AUD_SCK
SDA1_3.3V
SCL1_3.3V

R8800

1

+1.8V_AMP

L8800

BLM18PG121SN1D

OPT
C8801

10uF

10V

C8802
10uF
10V

+1.8V_AMP

+1.8V_AMP

C8803

0.1uF
16V

AMP_RESET_N

AUD_MASTER_CLK

L8801

BLM18PG121SN1D

C8804

0.1uF
16V

OPT

C8805

10uF

10V

R8801 100

R8802 100
R8803 100

R8804 100
R8805 100

C8808

1000pF

50V

C8806
100pF

0.1uF

50V

C8807

16V

120 mA

C8809
33pF
50V

C8811

0.1uF

C8810
1000pF
50V

R8806

3.3K

+3.3V_NORMAL

L8802

BLM18PG121SN1D

C8812
33pF
50V

C8813
47pF
50V

EMI

C88 16

1uF 25V

+1.8V_AMP

OPT
C8815
10uF

10V

C8814
47pF
50V

EMI

C8819

22000pF

BST1A
VDR1A

/RESET

DGND_1
GND_IO

CLK_I

VDD_IO
DGND_PLL
AGND_PLL

AVDD_PLL
DVDD_PLL

C8818

0.1uF

C8817
47pF
50V

EMI

CCFL = 20V

Edge_LED 32~47 Inch = 20V

55 Inch & IOP Module = 24V

+24V_AMP

D8800

C8833

0.1uF
50V

R8811

10K

1N4148W

100V

OPT

D8801

1N4148W

100V

OPT

D8802

1N4148W

100V

OPT

D8803

1N4148W

100V

OPT

C8834
10uF
35V

EMI

R8809

3.3
EMI

C8830

22000pF

50V

R8810

Q8800

2SC3052

10K

C8831

0.1uF
50V

POWER_DET

+3.5V_ST

C

E

C8832

0.01uF
50V

+24V_AMP

B

C8820

0.1uF
50V

50V

PGND1B_2

OUT1B_1

OUT1B_2

PVDD1B_1

PVDD1B_2

PVDD1A_1

PVDD1A_2

OUT1A_1

OUT1A_2

PGND1A_1

PGND1A_2

EP_PAD

46

47

48

49

50

51

52

53

54

55

56

1

THERMAL

2

57

3

AD

4
5
6

IC8801
7
8

EAN60969601
9

10

LF

11

NTP-7000
12
13

GND

14

15

16

17

18

22

25

26

WCK19BCK20SDA21SCL

DVDD

SDATA

DGND_2

16V

VDR2B27BST2B

/FAULT

MONITOR023MONITOR124MONITOR2

C88 22
1uF
25V

C8821
1000pF
50V

0.1uF
50V

C8823
22000pF

50V

C8825
1uF
25V

VDR1B44BST1B45PGND1B_1

43

28

PGND2B_1

42
41
40
39
38
37
36
35
34
33
32
31
30
29

10uF
35V

NC
VDR2A
BST2A
PGND2A_2
PGND2A_1
OUT2A_2
OUT2A_1
PVDD2A_2
PVDD2A_1
PVDD2B_2
PVDD2B_1
OUT2B_2
OUT2B_1
PGND2B_2

R8808 100

C88 28

R8807
0

OPT

1uF25V

C8829
22000pF

50V

C8826

C8824

R8812

12

C8835
390pF

50V

C8836
390pF

50V

R8813

12

R8814

12

C8837
390pF

50V

C8838
390pF

50V

R8815

12

AMP_MUTE

R8819

12

R8817

12

R8818

12

R8816

12

L8805

AD-9060

2S

1S 1F

15uH

L8804

AD-9060

2S

1S 1F

15uH

R8820

C8841

2F

2F

C8839

0.47uF
50V

C8840

0.47uF
50V

0.1uF
50V

C8842

0.1uF
50V

C8843

0.1uF
50V

C8844

0.1uF

50V

SPK_L+

SPK_L-

SPK_R+

SPK_R-

4.7K

R8821

4.7K

R8822

4.7K

R8823

4.7K

R8824
0

R8825
0

R8826
0

R8827
0

SPK_L+

SPEAKER_L

SPK_L-

SPK_R+

SPEAKER_R

SPK_R-

WAFER-ANGLE

4

3

2

1

P8800

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

KIM JONG HYUN

BCM (EUROBBTV)

NTP7000

2009.06.18

38

Close to LG5111 LVDS Input PIN

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LVDS_TX_0_DATA0_P
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA2_P

LVDS_TX_0_CLK_P
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA4_P

LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA2_P

LVDS_TX_1_CLK_P
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA4_P

+3.3V_NORMAL

R9700

3.3K
TM480Hz

R9701
10K

TM240Hz

TX Output Mode Selection

- High : LVDS(TM480Hz, LE9500)

- LOW : Mini-LVDS
(TM240Hz, LE5500/7500/8500)

+3.3V_NORMAL

R9702

3.3K
TM480Hz

R9703
10K

TM240Hz

Master/Slave Mode Selection

- High : Slave Mode(TM480Hz,LE9500)

- LOW : Master Mode
(TM240Hz,LE5500/7500/8500)

/TCON_EN

VS_SLAVE_MODE

[RESET for LG5111]

SW9700

JTP-1127WEM

12

4 3

R9704 100
R9705 100
R9706 100
R9707 100
R9708 100 LVDS_TX_0_DATA3_N

R9710 100
R9711 100
R9712 100
R9713 100
R9714 100
R9715 100

+3.3V_NORMAL

R9729

3.3K
TM480Hz

R9730
10K

TM240Hz

Dual/Quad-Link LVDS Input Selection

- High : Dual-Link LVDS(TM480Hz,LE9500)

- LOW : Quad-Link LVDS
(TM240Hz, LE5500/7500/8500)

+3.3V_NORMAL

R9731

3.3K

OPT

R9732
10K

External Serial EEPROM Avalibility

- High : Not Available

- LOW : Use EEPROM

+3.3V_NORMAL

R9728
1K

IC9700

C9700

0.1uF
16V

I

KIA7027AF

1

2

3

G

R9777
330

LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA2_N

LVDS_TX_0_CLK_N

LVDS_TX_0_DATA4_NR9709 100

LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA2_N

LVDS_TX_1_CLK_N

LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA4_N

DUAL_LVDS

EEPROM_NA

+3.3V_NORMAL

R9733
10K

O

R9734 22

C9701

4.7uF
10V

LVDS_TX_0_DATA0_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA2_N

LVDS_TX_0_CLK_P

LVDS_TX_0_CLK_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA4_N

LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA2_N

LVDS_TX_1_CLK_P

LVDS_TX_1_CLK_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA3_N

LVDS_TX_1_DATA4_N

OPT

LG5111_RESET

IC9701
LG5111

G3
H3
J3
K3
L3
M3

E4
C4

C5

D6

G7

H7

J7

K7

L7

M7
M8
M9

C6
C7
C8
C9

D7
D8
D9

G8
G9

IC9701
LG5111

RXVDD_18_1
RXVDD_18_2
RXVDD_18_3
RXVDD_18_4
RXVDD_18_5
RXVDD_18_6

TXVDD_18_1
TXVDD_18_2
TXVDD_18_3
TXVDD_18_4
TXVDD_18_5
TXVDD_18_6
TXVDD_18_7
TXVDD_18_8
TXVDD_18_9
TXVDD_18_10
TXVDD_18_11
TXVDD_18_12

PLL_AVDD
PLL2_AVDD

VDD_18_1
VDD_18_2
VDD_18_3
VDD_18_4
VDD_18_5
VDD_18_6
VDD_18_7
VDD_18_8
VDD_18_9
VDD_18_10
VDD_18_11
VDD_18_12
VDD_18_13
VDD_18_14
VDD_18_15
VDD_18_16
VDD_18_17
VDD_18_18
VDD_18_19
VDD_18_20

VDD_33_1
VDD_33_2
VDD_33_3
VDD_33_4
VDD_33_5
VDD_33_6
VDD_33_7
VDD_33_8
VDD_33_9
VDD_33_10
VDD_33_11
VDD_33_12
VDD_33_13
VDD_33_14
VDD_33_15
VDD_33_16
VDD_33_17
VDD_33_18

R9766 22

R97 71

10K

R97 72

10K

RX_GND_1
RX_GND_2
RX_GND_3
RX_GND_4
RX_GND_5
RX_GND_6

TX_GND_1
TX_GND_2
TX_GND_3
TX_GND_4
TX_GND_5
TX_GND_6
TX_GND_7
TX_GND_8

TX_GND_9
TX_GND_10
TX_GND_11
TX_GND_12

GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8

GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42

R97 73

10K

R97 74

10K

C9751

0.1uF
16V

C9752

0.1uF
16V

C9753

0.1uF
16V

C9754

0.1uF
16V

C9755

0.1uF
16V

+1.8V_VDD

C9756
10uF
10V

+1.8V_PLL

C9762

0.1uF
16V

C9757

0.1uF
16V

C9758

0.1uF
16V

C9759

0.1uF
16V

C9760

0.1uF
16V

C9761

0.1uF
16V

+3.3V_NORMAL

C9768

0.1uF
16V

C9769

C9764

0.1uF

0.1uF
16V

16V

C9770

C9765

0.1uF

0.1uF
16V

16V

C9771

C9766

0.1uF

0.1uF
16V

16V

C9772

C9767

0.1uF

0.1uF
16V

16V

+3.3V_VDD+1.8V_L/DIMMING

L9706 120-ohm

C9773

0.1uF
16V

C9774
10uF
10V

C9775

0.1uF
16V

+1.8V_RXVDD

G4
H4
J4
K4
L4
M4

F14
G14
H14
H15
J14
J15
K14
K15
L14
L15
M14
N14

C15
D4
D5
D14
D15
E5
E14
F4
F5
G5
H5
H8
H9
H10
H11
J5
J8
J9
J10
J11
K5
K8
K9
K10
K11
L5
L8
L9
L10
L11
M5
N4
N5
P5
P14
R15
T7
T9
T10
T12
T15
U15

C9712

0.1uF
16V

+1.8V_TXVDD

C9713

0.1uF
16V

+1.8V_VDD

C9714

0.1uF
16V

+1.8V_VDD

C9715

0.1uF
16V

+3.3V_VDD

C9716

0.1uF
16V

+3.3V_VDD

C9717

0.1uF
16V

L9702 120-ohm

L9703 120-ohm

L9704 120-ohm

L9705 120-ohm

C9718

0.1uF
16V

C9719

0.1uF
16V

C9720

0.1uF
16V

C9721

0.1uF
16V

C9722

0.1uF
16V

C9723

0.1uF
16V

+1.8V_RXVDD

C9724

0.1uF
16V

C9725

0.1uF
16V

C9726

0.1uF
16V

C9727

0.1uF
16V

C9728

0.1uF
16V

C9729

0.1uF
16V

C9730
10uF
10V

C9731

0.1uF
16V

C9732

0.1uF
16V

C9733

0.1uF
16V

C9734

0.1uF
16V

C9735

0.1uF
16V

C9736

0.1uF
16V

+1.8V_TXVDD

C9737
10uF
10V

C9738

0.1uF
16V

C9739

0.1uF
16V

C9740

0.1uF
16V

C9741

0.1uF
16V

C9742

0.1uF
16V

C9743

0.1uF
16V

+1.8V_PLL

C9744
10uF
10V

C9745

0.1uF
16V

C9746

0.1uF
16V

C9747

0.1uF
16V

C9748

0.1uF
16V

C9749

0.1uF
16V

C9750

0.1uF
16V

[UART for LG5111]

R9775
1K

TDO

TDI

TCK

TMS

TRST_N

FOr Debugging

P9701

12505WS-04A00

1

2

3

4

5

OPT

.

+3.3V

GND

RX

TX

+3.3V_NORMAL

C9763

0.1uF
16V

R9776 22

OPT

M_SCL R9366 22

UART_RXD

UART_TXD

OPT

R9367 22

M_SDA

A3

R1A1P

A2

R1A1M

A4

R1B1P

B3

R1B1M

B1

R1C1P

B2

R1C1M

C2

R1CLK1P

C1

R1CLK1M

C3

R1D1P

D3

R1D1M

D1

R1E1P

D2

R1E1M

E2

R1A2P

E1

R1A2M

E3

R1B2P

F3

R1B2M

F1

R1C2P

F2

R1C2M

G1

R1CLK2P

G2

R1CLK2M

H1

R1D2P

H2

R1D2M

J1

R1E2P

J2

R1E2M

K1

R2A1P

K2

R2A1M

L1

R2B1P

L2

R2B1M

M1

R2C1P

M2

R2C1M

N2

R2CLK1P

N1

R2CLK1M

N3

R2D1P

P3

R2D1M

P1

R2E1P

P2

R2E1M

R2

R2A2P

R1

R2A2M

R3

R2B2P

T3

R2B2M

T1

R2C2P

T2

R2C2M

U2

R2CLK2P

U1

R2CLK2M

U3

R2D2P

V4

R2D2M

V2

R2E2P

V3

R2E2M

T1CLK1P/RLV1N
T1CLK1N/RLV1P

T1CLK2P/RLV3N
T1CLK2N/RLV3P

T2CLK1P/LLV2N
T2CLK1N/LLV2P

T2CLK2P/LLV4N
T2CLK2N/LLV4P

EAN60997801

T1C1P/RLV0N
T1C1N/RLV0P

T1E1P/RLV2N
T1E1N/RLV2P

T1A2P/RCLKN
T1A2N/RCLKP

T1D2P/RLV4N
T1D2N/RLV4P
T1E2P/RLV5N
T1E2N/RLV5P

T2B1P/LLV0N
T2B1N/LLV0P
T2C1P/LLV1N
T2C1N/LLV1P

T2E1P/LCLKN
T2E1N/LCLKP

T2C2P/LLV3N
T2C2N/LLV3P

T2E2P/LLV5N
T2E2N/LLV5P

A17

T1A1P

A16

T1A1N

B16

T1B1P

A15

T1B1N

B17
B18
C18
C17
D16

T1D1P

C16

T1D1N

D17
D18

E18
E17
F16

T1B2P

E16

T1B2N

F17

T1C2P

F18

T1C2N

G18
G17
H18
H17
J18
J17

K18

T2A1P

K17

T2A1N

L18
L17
M18
M17
N18
N17
P16

T2D1P

N16

T2D1N

P17
P18

R18

T2A2P

R17

T2A2N

T16

T2B2P

R16

T2B2N

T17
T18
U18
U17
V15

T2D2P

U16

T2D2N

V16
V17

[+1.8V for LG5111]

+12V

L9700

120-ohm

C9703

10uF

10uF

25V

25V

[EEPROM for LG5111]

+3.3V_NORMAL

R9735

3.3K

EEPROM_A1

R9736
10K

OPT

RRXA0+
RRXA0­RRXA1+
RRXA1­RRXA2+/RLV5P
RRXA2-/RLV5N
RRXACK+/RLV4P
RRXACK-/RLV4N
RRXA3+
RRXA3­RRXA4+/RLV3P
RRXA4-/RLV3N

RRXB0+/RLCLKP
RRXB0-/RLCLKN
RRXB1+
RRXB1­RRXB2+
RRXB2­RRXBCK+/RLV2P
RRXBCK-/RLV2N
RRXB3+/RLV1P
RRXB3-/RLV1N
RRXB4+/RLV0PLVDS_TX_1_DATA4_P
RRXB4-/RLV0N

PGND

VIN

C9776

0.1uF
AGND

16V

FB

VS_SLAVE_MODE

/TCON_EN

DUAL_LVDS

LG5111_RESET

[Mini-LVDS Signal Strength]

1. Adjust Mini-LVDS Tx voltage swing level
(swing level can be affected by FFC cable)

2. Add resistor and make option for each model

IC9702

AOZ1072AI

1

2

3

4

IC9703

LX_2

8

LX_1

7

EN

6

COMP

5

C9706

0.1uF
16V

8

7

6

5

1

2

3

4

EAN60922901

M24512-WMW6G(REV.B)

E0

E1

E2

VSS

M0_SCLK
M0_MOSI
M1_SCLK
M1_MOSI
M2_SCLK
M2_MOSI
M3_SCLK
M3_MOSI

S_CS_N
S_SCLK
S_MOSI

R_VS

+3.3V_NORMAL

V_SYNC

L_VS

C9705
1000pF
50V

+3.3V_NORMAL

VCC

WC

SCL

SDA

C9704
27pF
50V

X9700
25MHz

R9741

1M 1%

R9742 22
R9743 22
R9744 22
R9745 22
R9746 22
R9747 22
R9748 22
R9749 22

R9750 22

R9737

3.3K
TM240Hz

R9751 22

R9739

12K

Vout = 0.8*(1+R1/R2)

L9701

3.6uH

+3.3V_NORMAL

R9740
10K

C9708

R9738

2200pF

9.1K

I2C Slave Address : 0xA4

R9752

3.3K
OPT

R9753
10K

C9707
27pF
50V

IC9701
LG5111

A5

CLK25_XOUT

B5

CLK25_XIN

A7

M0_SCLK

B7

M0_MOSI

A6

M1_SCLK

B6

M1_MOSI

R6

M2_SCLK

T6

M2_MOSI

U6

M3_SCLK

V6

M3_MOSI

A8

S_CS

B8

S_SCLK

B9

S_MOSI

R5

VS_SLAVE_MODE

T5

TCON_EN

U5

R_VS

V5

DUAL_LVDS

A9

VS_IN

A10

L_VS

A11

H_CONV

A12

DPM

A13

SOE

B4

PORES_N

B10

OPT_N

B11

POL

B12

FLK

A14

VDD_ODD[GSC]

B13

VDD_EVEN[GOE]

B14

VST[GSP]

B15

RMLVDS

+1.8V_L/DIMMING

R1
R9754

10.5K
C9709

1%

22uF
10V

R9755
2K
1%

R9756
10K
1%

R2

Write Protection
Low : Normal Operation
High : Write Protection

R9758

R9757

2K

2K

EEPROM_WP
EEPROM_NA
EEPROM_A1

GCLK1[GSP_R]

GCLK4[OPT_P]

C9710

0.1uF
16VC9702

EEPROM_WP

M_SCL

M_SDA

TMODE3
TMODE2
TMODE1
TMODE0

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7

M_SDA
M_SCL

S_SDA
S_SCL

UARTRXD
UARTTXD

TRST_N

GCLK2
GCLK3

GCLK5
GCLK6

+1.8V_RXVDD

P4
R4
T4
U4

R7
R8
R9
R10
R11

R9716 0

R12
R13
R14

T8

R9759 22

U8
V8

U7

R9760 22

V7

R9761 22

U9

R9762 22

V9

R9763 22

V10
U10

R9764 22

T11

TMS

U11

TCK

V12

TDI

U12

TDO

V11

V13
U13
T13
T14
V14
U14

V_SYNC

3D_DIMMING_2

3D_DIMMING

EEPROM_WP
EEPROM_NA
EEPROM_A1

M_SDA
M_SCL

SDA3_3.3V
SCL3_3.3V

UART_RXD
UART_TXD

TMS
TCK
TDI
TDO
TRST_N

+1.8V_TXVDD

+1.8V_PLL

+1.8V_VDD

+3.3V_VDD

E15
F15
G15
G16
H16
J16
K16
L16
M15
M16
N15
P15

C14

D13

G12

H12

J12

K12

L12

M10
M11
M12

C10
C11
C12
C13

D10
D11
D12

G10
G11

[JTAG for LG5111]

R9765 22

R9767 22

R9768 22

R9769 22

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

COMMON_LD_400/480HZ

LG5111 (L.D.) from BCM 97

09/10/13

008:V20

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

008:V20
008:V22
008:V22
008:V21
008:V22
008:V21
008:V21
008:V19
008:V19
008:V18
008:V19

+3.3VD

R102

3.3K

[TEST MODE SETTING]

- SMODE = 0 : Serial Flash Setting

- TMODE(All) = 1 : Normal Mode

For 3D Formatter I2C (Ready)

FPGA_SCL

P100

12505WR-04A00

OPT

5

.

C106

C105

0.1uF

0.1uF
16V

16V

C107

0.1uF
16V

C108

0.1uF
16V

OPT
R101

1K

+3.3VD

OPT
C112

0.1uF
50V

1

2

3

4

+3.3V

GND

RX

TX

I

FPGA_SDA

C109

0.1uF
16V

C110

0.1uF
16V

C111

0.1uF
16V

005:AA16;008:F18;008:V24;008:AL4;009:AP8

005:AA15;008:N18;008:V25;008:AL4;009:AP11

SW100

JTP-1127WEM

12

OPT

4 3

+3.3V_IO

C100

0.1uF
16V

+2.5LVDS_TX

C103

C101

0.1uF

0.1uF
16V

16V

+1.8V_DDR

C104

C102

0.1uF

0.1uF
16V

16V

LVRX1_CLKP
LVRX1_CLKM

R103

3.3K

I2C_SCL
I2C_SDA

IC100

KIA7029AF

OPT

2

LVRX1_AP
LVRX1_AM
LVRX1_BP
LVRX1_BM
LVRX1_CP
LVRX1_CM
LVRX1_DP
LVRX1_DM
LVRX1_EP
LVRX1_EM

G

+3.3VD

C113

0.1uF
50V

C114

0.1uF
16V

C115

0.1uF
16V

C116

0.1uF
16V

3O1

R1186
33

R105

3.3K

OPT

R106

+3.3VD

10K

C117

0.1uF
16V

C118

0.1uF
16V

C119

0.1uF
16V

OPT

R109

3.3K

R1071KR110

+3.3VD

C123

0.1uF
50V

R104

R108

100

100

009:E22
009:E22
009:O11
009:O11

009:O9
009:O9
009:O8
009:O8
009:O6
009:O6
009:O5
009:O6

009:E21
009:E21
009:E16
009:E17

009:O5

009:O5
009:E14
009:E14
009:E15
009:E15
009:E17
009:E17

009:E20
009:E20
009:E16
009:E16
009:E11
009:E12

009:E8

009:E8
009:E12
009:E12
009:E10
009:E11

009:E5

009:E5
009:E10
009:E10

009:E8

009:E8

009:E7

009:E7

009:E6

009:E6
009:E11
009:E11

R1181

1K

3.3K

001:AO35;001:AX5
001:AO36;001:BD4
001:AO37;001:AX5
001:AO36;001:BD4

OPT

UART_RX

001:H18

UART_TX

001:H18

C120

0.1uF
16V

C124

C121

0.1uF

0.1uF
16V

16V

C125

C122

0.1uF

0.1uF
16V

16V

OPT

001:E12
001:E12
008:W24

R111

33
001:AX10
001:BA10

C126

0.1uF
16V

R112
100

LVTX1_CLK+

LVTX1_CLK-

LVTX1_A+
LVTX1_A­LVTX1_B+
LVTX1_B­LVTX1_C+
LVTX1_C­LVTX1_D+
LVTX1_D­LVTX1_E+
LVTX1_E-

LVTX2_CLK+
LVTX2_CLK-

LVTX2_A+
LVTX2_A­LVTX2_B+
LVTX2_B­LVTX2_C+
LVTX2_C­LVTX2_D+
LVTX2_D­LVTX2_E+
LVTX2_E-

LVTX3_CLK+
LVTX3_CLK-

LVTX3_A+
LVTX3_A­LVTX3_B+
LVTX3_B­LVTX3_C+
LVTX3_C­LVTX3_D+
LVTX3_D­LVTX3_E+
LVTX3_E-

LVTX4_CLK+
LVTX4_CLK-

LVTX4_A+
LVTX4_A­LVTX4_B+
LVTX4_B­LVTX4_C+
LVTX4_C­LVTX4_D+
LVTX4_D­LVTX4_E+
LVTX4_E-

TMODE[0]

R1182

3.3K
OPT

SPI_CS

SPI_SCLK

SPI_DI
SPI_DO

UART_RX
UART_TX

XTAL_IN
XTAL_OUT

C127

0.1uF
16V

C128

0.1uF
16V

C129

0.1uF
16V

R113
100

FRC_TCK
FRC_TMS
FRC_TDI
FRC_TDO

FRC_RESET

001:AO38

C130

0.1uF
16V

C131

0.1uF
16V

C132

0.1uF
16V

R114
100

R121

3.3K

R1183 0
R1184 0
R115 33
R116 33

R117 33
R118 33

R122 33

R123 33

C133

0.1uF
16V

C134

0.1uF
16V

C135

0.1uF
16V

R120
100

R11910K

OPT
OPT

+0.9VREFS

C137

0.1uF
16V

C136

0.1uF
16V

C138

0.1uF
16V

IC102

IC102

DDR_ADDR[0-12]

002:E39;002:W39;002:AH39;002:BD39

DDR_ADDR[0]

DDR_ADDR[1]

DDR_ADDR[2]

DDR_ADDR[3]

DDR_ADDR[4]

DDR_ADDR[5]

+0.9VREF

AF31

W31

K31

AN18

RCLK1P

DDR_VREF0

DDR_VREF1

AP18
AP15
AN15
AP16
AN16
AP17
AN17
AN19
AP19
AN20
AP20

A12
B12
A10
B10
C11
C10
B11
A11
C13
C12
B13
A13

A16
B16
A14
B14
C15
C14
B15
A15
C17
C16
B17
A17

AL12
AN10
AP10
AL11
AM11

AP31
AN31
AM31
AK31
AL31

AN8
AM8
AL9
AP8

AL10

AP9
AN9
AM9

AL8
AP7

AM10

AP11
AN11

DDR_VREF2
RCLK1M
RA1P
RA1M
RB1P
RB1M
RC1P
RC1M
RD1P
RD1M
RE1P
RE1M

A4

TCLK1P

B4

TCLK1N

A2

TA1P

B2

TA1N

C3

TB1P

C2

TB1N

B3

TC1P

A3

TC1N

C5

TD1P

C4

TD1N

B5

TE1P

A5

TE1N

A8

TCLK2P

B8

TCLK2N

A6

TA2P

B6

TA2N

C7

TB2P

C6

TB2N

B7

TC2P

A7

TC2N

C9

TD2P

C8

TD2N

B9

TE2P

A9

TE2N

TCLK3P
TCLK3N
TA3P
TA3N
TB3P
TB3N
TC3P
TC3N
TD3P
TD3N
TE3P
TE3N

TCLK4P
TCLK4N
TA4P
TA4N
TB4P
TB4N
TC4P
TC4N
TD4P
TD4N
TE4P
TE4N

SMODE
TMODE[0]
TMODE[1]
TMODE[2]
TMODE[3]

TRST_N
TCK
TMS
TDI
TDO

M_SCL
M_SDA
SCL
SDA

SPI_CS
SPI_SCLK
SPI_DI
SPI_DO

UART_RXD
UART_TXD

PORES_N

XTALI
XTALO

DDRS_VREF0L4DDRS_VREF1V4DDRS_VREF2

AE4

DDRS_ADDR[0-12]

002:E16;002:W13;002:AK17;002:BD12

C139

C142

0.1uF

0.1uF

16V

16V

C143

C140

0.1uF

0.1uF
16V

16V

C141

C144

0.1uF

0.1uF

16V

16V

DDR_ADDR[6]

R193 22

R194 22

R195 22

R196 22

R197 22

R198 22

U34

Y34

U33

Y33

AA34

Y32

AA33

DDR_A[0]

DDR_A[1]

DDR_A[2]

DDR_A[3]

DDR_A[4]

DDR_A[5]

DDRS_A[0]W1DDRS_A[1]T1DDRS_A[2]W2DDRS_A[3]T2DDRS_A[4]R1DDRS_A[5]T3DDRS_A[6]R2DDRS_A[7]Y2DDRS_A[8]U1DDRS_A[9]Y3DDRS_A[10]R3DDRS_A[11]U2DDRS_A[12]

R113 7 2 2

R114 2 2 2

R114 1 2 2

R114 0 2 2

R113 9 2 2

R113 8 2 2

DDRS_ADDR[0]

DDRS_ADDR[1]

DDRS_ADDR[2]

DDRS_ADDR[3]

DDRS_ADDR[4]

DDRS_ADDR[5]

C148

C145

0.1uF

0.1uF
16V

16V

C146

C149

0.1uF

10uF

16V

10V

C147

C150

0.1uF

0.1uF

16V

16V

DDR_ADDR[7]

DDR_ADDR[8]

DDR_ADDR[9]

R199 22

R1100 22

R1101 22

R1102 22

T33

W34

T32

DDR_A[6]

DDR_A[7]

DDR_A[8]

R114 6 2 2

R114 5 2 2

R114 4 2 2

R114 3 2 2

DDRS_ADDR[6]

DDRS_ADDR[7]

DDRS_ADDR[8]

DDRS_ADDR[9]

C151

0.1uF
16V

C152
22uF
16V

C153

0.1uF
16V

DDR_DATA[0-31]

002:N40;002:AQ40

DDR_DATA[0]

DDR_DATA[1]

DDR_DATA[2]

DDR_DATA[3]

DDR_DATA[4]

DDR_DATA[5]

DDR_DATA[6]

DDR_ADDR[12]DDRS_ADDR[12]

DDR_ADDR[10]

DDR_ADDR[11]

R124 22

R1103 22

R1104 22

AA32

W33

N34

DDR_A[9]

DDR_A[10]

DDR_A[11]

DDR_A[12]

AC1

22

R114 8 2 2

R114 7 2 2

DDRS_ADDR[10]

DDRS_ADDR[11]

DDRS_DATA[0-31]

002:N17;002:AT17

C154

0.1uF
16V

+2.5LVDS_RX

C155

0.1uF
16V

R125

DDR_DATA[7]

R1105 22

R1106 22

R1107 22

R1108 22

R1109 22

R1110 22

R1111 22

AM33

AH32

AN34

AG32

AJ32

AN33

AK32

AM34

DDR_DQ[0]

DDR_DQ[1]

DDR_DQ[2]

DDR_DQ[3]

DDR_DQ[4]

DDR_DQ[5]

DDR_DQ[6]

DDRS_DQ[0]F3DDRS_DQ[1]H4DDRS_DQ[2]E1DDRS_DQ[3]J4DDRS_DQ[4]H3DDRS_DQ[5]E2DDRS_DQ[6]G4DDRS_DQ[7]F2DDRS_DQ[8]K3DDRS_DQ[9]N2DDRS_DQ[10]J1DDRS_DQ[11]M1DDRS_DQ[12]N1DDRS_DQ[13]J2DDRS_DQ[14]M2DDRS_DQ[15]K2DDRS_DQ[16]

R115 5 2 2

R115 4 2 2

R115 3 2 2

R115 2 2 2

R115 1 2 2

R115 0 2 2

R114 9 2 2

DDRS_DATA[0]

DDRS_DATA[1]

DDRS_DATA[2]

DDRS_DATA[3]

DDRS_DATA[4]

DDRS_DATA[5]

DDRS_DATA[6]

C162

C159

C156

0.1uF

0.1uF

0.1uF
16V

16V

16V

C160

C157

C163

0.1uF

0.1uF

0.1uF

16V

16V

16V

C161

C158

0.1uF

0.1uF
16V

16V

DDR_DATA[8]

DDR_DATA[9]

DDR_DATA[10]

R1112 22

R1113 22

R1114 22

R1115 22

AG33

AC33

AH34

DDR_DQ[7]

DDR_DQ[8]

DDR_DQ[9]

R115 9 2 2

R115 8 2 2

R115 7 2 2

R115 6 2 2

DDRS_DATA[7]

DDRS_DATA[8]

DDRS_DATA[9]

DDRS_DATA[10]

C165

0.1uF
16V

C164

0.1uF
16V

DDR_DATA[11]

DDR_DATA[12]

DDR_DATA[13]

DDR_DATA[14]

R1116 22

R1117 22

R1118 22

R1119 22

AD34

AC34

AJ33

AD33

DDR_DQ[10]

DDR_DQ[11]

DDR_DQ[12]

DDR_DQ[13]

DDR_DQ[14]

LG1120

R116 3 2 2

R116 2 2 2

R116 1 2 2

R116 0 2 2

DDRS_DATA[11]

DDRS_DATA[12]

DDRS_DATA[13]

DDRS_DATA[14]

C168

0.1uF
16V

C166

0.1uF
16V

C167

0.1uF
16V

DDR_DATA[15]

DDR_DATA[16]

DDR_DATA[17]

DDR_DATA[18]

DDR_DATA[19]

DDR_DATA[20]

R1120 22

R1121 22

R1122 22

R1123 22

R1124 22

R1125 22

AG34

G33

F34

H31

E34

E33

DDR_DQ[15]

DDR_DQ[16]

DDR_DQ[17]

DDR_DQ[18]

DDR_DQ[19]

DDR_DQ[20]

IC102

DDRS_DQ[17]

DDRS_DQ[18]

DDRS_DQ[19]

DDRS_DQ[20]

AJ2

AM1

AH4

AN1

AM2

R116 9 2 2

R116 8 2 2

R116 7 2 2

R116 6 2 2

R116 5 2 2

R116 4 2 2

DDRS_DATA[15]

DDRS_DATA[16]

DDRS_DATA[17]

DDRS_DATA[18]

DDRS_DATA[19]

DDRS_DATA[20]

C170

0.1uF
16V

+2.5VPLL

C172

0.1uF
16V

C169

C171

10uF

22uF

10V

16V

DDR_DATA[21]

DDR_DATA[22]

DDR_DATA[23]

DDR_DATA[24]

R1126 22

R1127 22

R1128 22

H32

F33

G34

DDR_DQ[21]

DDR_DQ[22]

DDR_DQ[23]

DDRS_DQ[21]

DDRS_DQ[22]

DDRS_DQ[23]

AH3

AL2

AJ1

R117 2 2 2

R117 1 2 2

R117 0 2 2

DDRS_DATA[21]

DDRS_DATA[22]

DDRS_DATA[23]

C173

0.1uF
16V

C175

0.1uF
16V

C174
22uF
16V

DDR_DATA[25]

DDR_DATA[26]

DDR_DATA[27]

R1129 22

R1130 22

R1131 22

R1132 22

K33

H34

L34

J33

DDR_DQ[24]

DDR_DQ[25]

DDR_DQ[26]

DDRS_DQ[24]

DDRS_DQ[25]

DDRS_DQ[26]

AE2

AH1

AD1

AG2

R117 6 2 2

R117 5 2 2

R117 4 2 2

R117 3 2 2

DDRS_DATA[24]

DDRS_DATA[25]

DDRS_DATA[26]

DDRS_DATA[27]

C176

0.1uF
16V

C177

0.1uF
16V

C178
22uF
16V

DDR_DATA[28]

DDR_DATA[29]

DDR_DATA[30]

DDR_DATA[31]

R1133 22

R1134 22

R1135 22

J34

L33

H33

DDR_DQ[27]

DDR_DQ[28]

DDR_DQ[29]

DDR_DQ[30]

DDRS_DQ[27]

DDRS_DQ[28]

DDRS_DQ[29]

DDRS_DQ[30]

AG1

AD2

AH2

R117 9 2 2

R117 8 2 2

R117 7 2 2

DDRS_DATA[28]

DDRS_DATA[29]

DDRS_DATA[30]

C179

0.1uF
16V

C180
22uF
16V

002:F33

002:F32

002:F35;002:AI35

002:F35;002:AI35

DDR_CLK

DDR_CLK

DDR_DQS0

DDR_DQS0

R126 22

R128 22

R130 22

R132 22

R134 22

R1136 22

K34

V34

V33

AL33

AL34

AF34

DDR_CK

DDR_CK_N

DDR_DQ[31]

DDR_DQS[0]

DDR_DQS_N[0]

DDRS_DQ[31]

DDRS_CKV1DDRS_CK_NV2DDRS_DQS[0]G2DDRS_DQS_N[0]G1DDRS_DQS[1]L1DDRS_DQS_N[1]L2DDRS_DQS[2]

AE1

R127 22

R129 22

R131 22

R133 22

R135 22

R118 0 2 2

DDRS_DATA[31]

DDRS_CLK

DDRS_CLK

DDRS_DQS0

DDRS_DQS0

002:F9

002:F10

002:F12;002:AK12

002:F12;002:AK13

C182

C181

10uF

0.1uF
10V

16V

002:AI33

002:F33

002:F32

DDR_DQS1

DDR_DQS1

DDR_DQS2

R136 22

R138 22

AF33

F32

DDR_DQS[1]

DDR_DQS[2]

DDR_DQS_N[1]

AK3

R137 22

R139 22

DDRS_DQS2

DDRS_DQS1

DDRS_DQS1

002:F9

002:F10

002:AK10

002:AI32

002:AI33

DDR_DQS3

DDR_DQS2

R140 22

R142 22

R144 22

F31

J31

J32

DDR_DQS[3]

DDR_DQS_N[2]

DDRS_DQS_N[2]

DDRS_DQS[3]

AK4

AF4

AF3

R141 22

R143 22

R145 22

DDRS_DQS2

DDRS_DQS3

002:AK9

002:AK10

+1.8V_DDRS

+1.0VDC

+1.0VDC

002:AI32

DDR_DQS3

DDR_DQS_N[3]

DDRS_DQS_N[3]

DDRS_DQS3

002:AK9

002:F32

002:F34;002:U31;002:AI34;002:BB32

002:F34;002:U32;002:AI34;002:BB32

002:F34;002:U33;002:AI34;002:BB33

002:F34;002:U32;002:AI34;002:BB32

DDR_WE

DDR_RAS

DDR_CKE

DDR_CS

DDR_CAS

DDR_ODT

DDR_DM0

R146 22

R148 22

R150 22

R152 22

R154 22

R156 22

R158 22

T34

R34

N33

P33

R33

P34

AM32

AD32

DDR_CKE

DDR_ODT

DDR_CS_N

DDR_WE_N

DDR_RAS_N

DDR_CAS_N

DDR_DM[0]

DDRS_CKEY1DDRS_CS_N

DDRS_WE_N

DDRS_RAS_N

DDRS_CAS_N

DDRS_ODT

DDRS_DM[0]F4DDRS_DM[2]

M3

AA1

AC2

AB2

AA2

AB1

R147 22

R149 22

R151 22

R153 22

R155 22

R157 22

R159 22

DDRS_WE

DDRS_CS

DDRS_RAS

DDRS_CAS

DDRS_ODT

DDRS_DM0

DDRS_CKE

002:F9

002:F11;002:U7;002:AK12;002:BB6

002:F11;002:U6;002:AK11;002:BB5

002:F11;002:U6;002:AK11;002:BB5

002:F11;002:U6;002:AK11;002:BB5

002:F11;002:U5;002:AK12;002:BB4

002:F12;002:U7;002:AK12;002:BB6

C189

C186

C183

0.1uF

0.1uF

0.1uF
16V

16V

16V

C190

C187

C184

0.1uF

0.1uF

0.1uF
16V

16V

16V

C191

C188

C185

0.1uF

0.1uF

0.1uF
16V

16V

16V

002:AI32

002:AI32

002:F32

002:F36;002:U33;002:AI36;002:BB34

002:F36;002:U33;002:AI36;002:BB33

DDR_DM1

DDR_DM2

DDR_DM3

DDR_BA0

DDR_BA1

R160 22

R162 22

R164 22

R166 22

R168 22

G32

K32

V32

U32

AC32

N32

DDR_DM[1]

DDR_DM[2]

DDR_DM[3]

DDR_BA[0]

DDR_BA[1]

DDR_TAOUT

DDRS_DM[1]

DDRS_DM[3]

DDRS_BA[0]V3DDRS_BA[1]W3DDRS_TAOUTN3DDRS_TDOUT[0]

AJ3

AE3

AB3

R161 22

R163 22

R165 22

R167 22

R169 22

DDRS_DM1

DDRS_DM2

DDRS_DM3

DDRS_BA0

DDRS_BA1

002:F9

002:AK10

002:AK10

002:F13;002:U8;002:AK13;002:BB7

002:F13;002:U7;002:AK13;002:BB6

C195

C193

0.1uF

0.1uF
16V

16V

C196

C192

0.1uF

0.1uF
16V

16V

C197

C194

0.1uF

0.1uF
16V

16V

P32

RCLK2P
RCLK2M

DDR_TDOUT[0]

DDR_TDOUT[1]

RA2P
RA2M
RB2P
RB2M
RC2P
RC2M
RD2P
RD2M
RE2P
RE2M

TCLK5P
TCLK5N

TA5P
TA5N
TB5P
TB5N
TC5P
TC5N
TD5P
TD5N
TE5P
TE5N

TCLK6P
TCLK6N

TA6P
TA6N
TB6P
TB6N
TC6P
TC6N
TD6P
TD6N
TE6P
TE6N

TCLK7P
TCLK7N

TA7P
TA7N
TB7P
TB7N
TC7P
TC7N
TD7P
TD7N
TE7P
TE7N

TCLK8P
TCLK8N

TA8P
TA8N
TB8P
TB8N
TC8P
TC8N
TD8P
TD8N
TE8P
TE8N

M_VS
M_SCLK
M_MOSI

S_VS
S_SCLK
S_MOSI

GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
GPIO[4]
GPIO[5]
GPIO[6]
GPIO[7]
GPIO[8]

GPIO[9]
GPIO[10]
GPIO[11]
GPIO[12]
GPIO[13]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]
GPIO[18]
GPIO[19]
GPIO[20]
GPIO[21]
GPIO[22]
GPIO[23]
GPIO[24]

DDRS_TDOUT[1]

AC3

C198

0.1uF
16V

C199

0.1uF
16V

C1100

0.1uF
16V

R170

R171

100

100

AN24
AP24
AN21
AP21
AN22
AP22
AN23
AP23
AN25
AP25
AN26
AP26

A20
B20
A18
B18
C19
C18
B19
A19
C21
C20
B21
A21

A24
B24
A22
B22
C23
C22
B23
A23
C25
C24
B25
A25

A28
B28
A26
B26
C27
C26
B27
A27
C29
C28
B29
A29

A32
B32
A30
B30
C31
C30
B31
A31
C33
C32
B33
A33

AL30
AM30
AN30
AP5
AN5
AM5

AL4
AM4

R1190 33

AN4

R1219 33 L/R_SYNC

AP4

R173 33

AL5

R1191 33
AL6
AM6
AN6
AP6

R180 33
AL7
AM7

R1220 33
AN7

R1214 0
AL27
AN28
AP29

R1215 33
AN29

R1216 33
AN27

R1217 33
AP27

R1218 33
AP30

R1192

33

AM27

R1193

33

AP28

R1194

33

AM28

R1195

33

AL28

R1196

33

AM29

R1201

33

AL29

R1221

33

OPT

C1104

C1101

0.1uF

0.1uF
16V

16V

C1105

C1102

0.1uF

0.1uF

16V

16V

C1106

C1103

0.1uF

0.1uF

16V

16V

C1107

0.1uF
16V

C1108

0.1uF
16V

C1109

0.1uF
16V

+3.3VD

R1222
10K

R1185
10K

R172
100

R174
100

LVTX5_CLK+
LVTX5_CLK­LVTX5_A+
LVTX5_A­LVTX5_B+
LVTX5_B­LVTX5_C+
LVTX5_C­LVTX5_D+
LVTX5_D­LVTX5_E+
LVTX5_E-

LVTX6_CLK+
LVTX6_CLK­LVTX6_A+
LVTX6_A­LVTX6_B+
LVTX6_B­LVTX6_C+
LVTX6_C­LVTX6_D+
LVTX6_D­LVTX6_E+
LVTX6_E-

LVTX7_CLK+
LVTX7_CLK­LVTX7_A+
LVTX7_A­LVTX7_B+
LVTX7_B­LVTX7_C+
LVTX7_C­LVTX7_D+
LVTX7_D­LVTX7_E+
LVTX7_E-

LVTX8_CLK+
LVTX8_CLK­LVTX8_A+
LVTX8_A­LVTX8_B+
LVTX8_B­LVTX8_C+
LVTX8_C­LVTX8_D+
LVTX8_D­LVTX8_E+
LVTX8_E-

WP_EEPROM_TCON

R175

R1197

10K

10K

OPT

VSYNC
/FPGA_RESET
3D_FRAME_INFO

L/R_SYNC_FRC_OUT

For 3D Formatter

C1113

C1110

0.1uF

0.1uF
16V

16V

C1114

C1111

0.1uF

0.1uF
16V

16V

C1115

C1112

0.1uF

0.1uF
16V

16V

R176
100

008:Y25

009:E36
009:E37
009:E35
009:E35
009:E35
009:E35
009:E33
009:E34

009:E5

009:E5
009:E33
009:E33

009:H22
009:H22
009:E32
009:E32
009:E28
009:E29
009:E27
009:E27
009:E31
009:E31
009:E36
009:E36

009:H21

009:H21

009:E31

009:E32

009:E29

009:E30

009:E29

009:E29

009:E26

009:E27

009:E26

009:E26

009:O24

009:O23

009:E28

009:E28

009:O34

009:O34

009:E25

009:E26

009:O35

009:O35

009:O33

009:O33

R179
100

004:AL21;005:AJ5

004:K10;005:I9

PWM_SEQ

LVDS_IN
LVDS_OUT
VIDEO_OUT
M_TCON_EN
I2CEN
S_TCON_EN
FPGA_D/L_CTRL
INCH_OPT_1
INCH_OPT_2
TCON_SCL_M
TCON_SDA_M
TCON_SCL_S
TCON_SDA_S

009:AN29
010:AN12

C1116

0.1uF
16V

C1117

0.1uF
16V

C1118

0.1uF
16V

P102

YFW254-06

OPT

LVRX2_CLKP
LVRX2_CLKM
LVRX2_AP
LVRX2_AM
LVRX2_BP
LVRX2_BM
LVRX2_CP
LVRX2_CM
LVRX2_DP
LVRX2_DM
LVRX2_EP
LVRX2_EM

+3.3VD

R177

4.7K
Serial Flash Boot Mode

OPT

- GPIO[0]=1 : 50MHz Booting

- GPIO[0]=0 : 25MHz Booting

R178

4.7K
+3.3VD

R1225
10K

005:AA14

005:AG12

OD data D/L,
during 2D/3D mode switching

R1226 0

GAMMA_BKSEL

OPT

DPM_CTRL1

R1227 0

OPT

C1122

C1121

C1127

0.1uF

0.1uF

0.1uF

16V

16V

16V

C1125

C1123

C1119

0.1uF

0.1uF

0.1uF
16V

16V

16V

C1126

C1124

C1120

0.1uF

0.1uF

0.1uF
16V

16V

16V

008:V15
008:V15
008:V17
008:V18
008:V17
008:V17
008:V16
008:V16
008:V14
008:V15
008:V14
008:V14

1

2

3

4

5

6

C1128

0.1uF
16V

INCH_1_HIGH

INCH_1_LOW

C1129

0.1uF
16V

C1130

0.1uF
16V

R1223 0
R1224 0

+3.3VD

R1210
22

FRC_TDI

R1211
22

FRC_TMS

R1212
22

FRC_TCK

R1213
22

FRC_TDO

TCON_POWER_EN
DPM_CTRL

OPT

+3.3VD

R1187

4.7K
OPT

LVDS_IN LVDS_OUT

R1188

4.7K

Input LVDS Data Mapping Selection

- GPIO[5] = 1 : JEIDA

- GPIO[5] = 0 : VESA

008:M17
008:M17

R1204

R1205

4.7K

4.7K

42

INCH_2_HIGH

INCH_OPT_1

INCH_1

LOW LOW

47

HIGH55

C1136

C1133

C1139

0.1uF

0.1uF

0.1uF

16V

16V

16V

C1131

C1137

C1134

0.1uF

0.1uF

0.1uF

16V

16V

16V

C1135

C1132

C1138

0.1uF

0.1uF

0.1uF

16V

16V

16V

P101

12505WR-10

+2.5VQ

+3.3V

+1.0VDC

R1206

R1207

INCH_2_LOW

INCH_2

HIGHLOW

LOW

C1140

0.1uF
16V

C1141

0.1uF
16V

C1142

0.1uF
16V

1

2

3

4

5

6

7

8

9

10

11

007:Q15;006:P14

+3.3VD+3.3VD

4.7K

4.7K

C1143

0.1uF
16V

C1144

0.1uF
16V

C1145

0.1uF
16V

+2.5VPLL

+2.5LVDS_TX

L100

120-ohm

L101

120-ohm

L102

120-ohm

C1162
22uF
16V

+3.3VD

L103

120-ohm

L104

120-ohm

004:AM14

R1189

4.7K
OPT

R1198

+3.3V_IO

C1165
22uF
16V

+1.0VPLL

L105

120-ohm

+3.3VD

4.7K

Output LVDS Data Mapping Selection

- GPIO[6] = 1 : JEIDA

- GPIO[6] = 0 : VESA

INCH_OPT_2

C1148

C1151

C1152

0.1uF

10uF

22uF

16V

10V

16V

C1149

C1146

10uF

10uF

10V

10V

C1147

C1150

10uF

10uF

10V

10V

C1163
22uF
16V

C1166
22uF
16V

C1167

0.1uF
16V

TCON_SCL

TCON_SDA

TMODE[0]

SPI_DI

SPI_SCLK

SPI_DO

SPI_CS

+2.5LVDS_RX

C1153
22uF
16V

004:AA9

004:AE9

001:H22

001:H18;001:AX5

001:H19;001:BD4

001:H18;001:BD4

001:H19;001:AX5

C1164
22uF
16V

+3.3VD

R1199

4.7K

R1200

4.7K
OPT

C1154
22uF
16V

VIDEO_OUT

Video Output Selection

- GPIO[7] = 1 : Reverse(LED Model)

- GPIO[7] = 0 : Normal(LAMP Model)

+1.0VPLL

C1155
22uF
16V

C1157

0.1uF
16V

+3.3V_IO

+2.5LVDS_TX

+1.0VDC

C1158

0.1uF
16V

LG1120

D3

VDD33_1

D4

VDD33_2

D5

VDD33_3

D6

VDD33_4

D7

VDD33_5

D28

VDD33_6

D29

VDD33_7
VDD33_8
VDD33_9
VDD33_10
VDD33_11
VDD33_12
VDD33_13
VDD33_14
VDD33_15
VDD33_16
VDD33_17
VDD33_18
VDD33_19
VDD33_20
VDD33_21
VDD33_22

LVTX_VDD_1
LVTX_VDD_2
LVTX_VDD_3
LVTX_VDD_4
LVTX_VDD_5
LVTX_VDD_6
LVTX_VDD_7
LVTX_VDD_8
PVCC1
PVCC2

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDD_64
VDD_65
VDD_66
VDD_67

DDRS_VDDQ_1
DDRS_VDDQ_2
DDRS_VDDQ_3
DDRS_VDDQ_4
DDRS_VDDQ_5
DDRS_VDDQ_6
DDRS_VDDQ_7
DDRS_VDDQ_8

DDRS_VDDQ_9
DDRS_VDDQ_10
DDRS_VDDQ_11
DDRS_VDDQ_12
DDRS_VDDQ_13
DDRS_VDDQ_14
DDRS_VDDQ_15
DDRS_VDDQ_16
DDRS_VDDQ_17
DDRS_VDDQ_18
DDRS_VDDQ_19
DDRS_VDDQ_20
DDRS_VDDQ_21
DDRS_VDDQ_22

DDR_VDDQ_10

DDR_VDDQ_11

DDR_VDDQ_12

DDR_VDDQ_13

DDR_VDDQ_14

DDR_VDDQ_15

DDR_VDDQ_16

DDR_VDDQ_17

DDR_VDDQ_18

DDR_VDDQ_19

DDR_VDDQ_20

DDR_VDDQ_21

DDR_VDDQ_22

SS_DISP_DVDD

DDRPLL_DVDD

DDRPLL_AVDD

D30
D31
D32
AJ5
AK5
AK6
AK7
AK8

AK9
AK10
AJ30
AK27
AK28
AK29
AK30

D8
D10
D12
D14
D20
D22
D24
D26
D16
D18

E9
E11
E13
E15
E17
E19
E21
E23
E25
E27

G5

H5

J5

K5

L5

M5

N5

P5

R5

T5

U5

V5

W5

Y5
AA5
AB5
AC5
AD5
AE5
AG5
AF5
G30
H30
J30
K30
L30
M30
N30
P30
R30
T30
U30
V30
W30
Y30

AA30
AB30
AC30
AD30
AE30
AF30
AG30
AL14
AL15
AL16
AL17
AL18
AL19
AL20
AL21
AL22
AL23
AL24
AM15
AM16
AM25
AM26

LVRX_VDD1
LVRX_VDD2
LVRX_VDD3
LVRX_VDD4

DDR_VDDQ_1
DDR_VDDQ_2
DDR_VDDQ_3
DDR_VDDQ_4
DDR_VDDQ_5
DDR_VDDQ_6
DDR_VDDQ_7
DDR_VDDQ_8
DDR_VDDQ_9

SS_AVDD

DISP_AVDD

XTAL

XTAL_IN

001:H17

AM18
AM20
AM22
AM24

H1
K4
L3
M4
N4
P4
R4
T4
U3
U4
Y4
AA3
AA4
AB4
AC4
AD4
AF1
AG4
AJ4
AK1
P1
P3

L31
M31
M34
N31
P31
R31
R32
T31
U31
V31
Y31
AA31
AB31
AB34
AC31
AD31
AE31
AE32
AE34
AG31
AH31
AK34

AM14
AN12

AL13
AN13
AP14

+2.5LVDS_RX

+1.8V_DDRS

+1.8V_DDR

+1.0VPLL

+2.5VPLL

C1159
15pF
50V

25MHz

R191
1M

X100

C1160
15pF
50V

XTAL_OUT

001:H17

SPI FLASH(2Mbit)

R190
10K

GND

IC101

W25X20AVSNIG

CS

1

DO

2

WP

3

4

VCC

8

HOLD

7

CLK

6

DIO

5

SPI_CS

001:H19;001:AO35

SPI_DI

001:H18;001:AO37

R188

4.7K

R189

33

LG1120

B1

VSS_1

B34

VSS_2

C1

VSS_3

C34

VSS_4

D1

VSS_5

D2

VSS_6

D33

VSS_7

D34

VSS_8

E3

VSS_9

E4

VSS_10

E5

VSS_11

E6

VSS_12

E7

VSS_13

E8

VSS_14

E10

VSS_15

E12

VSS_16

E14

VSS_17

E16

VSS_18

E18

VSS_19

E20

VSS_20

E22

VSS_21

E24

VSS_22

E26

VSS_23

E28

VSS_24

E29

VSS_25

E30

VSS_26

E31

VSS_27

E32

VSS_28

F1

VSS_29

F5

VSS_30

F30

VSS_31

G3

VSS_32

G31

VSS_33

H2

VSS_34

J3

VSS_35

K1

VSS_36

L32

VSS_37

M12

VSS_38

M13

VSS_39

M14

VSS_40

M15

VSS_41

M16

VSS_42

M17

VSS_43

M18

VSS_44

M19

VSS_45

M20

VSS_46

M21

VSS_47

M22

VSS_48

M23

VSS_49

M32

VSS_50

M33

VSS_51

N12

VSS_52

N13

VSS_53

N14

VSS_54

N15

VSS_55

N16

VSS_56

N17

VSS_57

N18

VSS_58

N19

VSS_59

N20

VSS_60

N21

VSS_61

N22

VSS_62

N23

VSS_63

P2

VSS_64

P12

VSS_65

P13

VSS_66

P14

VSS_67

P15

VSS_68

P16

VSS_69

P17

VSS_70

P18

VSS_71

P19

VSS_72

P20

VSS_73

P21

VSS_74

P22

VSS_75

P23

VSS_76

R12

VSS_77

R13

VSS_78

R14

VSS_79

R15

VSS_80

R16

VSS_81

R17

VSS_82

R18

VSS_83

R19

VSS_84

R20

VSS_85

R21

VSS_86

R22

VSS_87

R23

VSS_88

T12

VSS_89

T13

VSS_90

T14

VSS_91

T15

VSS_92

T16

VSS_93

T17

VSS_94

T18

VSS_95

T19

VSS_96

T20

VSS_97

T21

VSS_98

T22

VSS_99

T23

VSS_100

U12

VSS_101

U13

VSS_102

U14

VSS_103

U15

VSS_104

U16

VSS_105

U17

VSS_106

U18

VSS_107

U19

VSS_108

U20

VSS_109

U21

VSS_110

U22

VSS_111

U23

VSS_112

V12

VSS_113

V13

VSS_114

V14

VSS_115

V15

VSS_116

V16

VSS_117

V17

VSS_118

V18

VSS_119

V19

VSS_120

V20

VSS_121

V21

VSS_122

V22

VSS_123

V23

VSS_124

W4

VSS_125

W12

VSS_126

+3.3VD

R192

3.3K

001:H19;001:AO36

001:H18;001:AO36

LVTX_VSS_1
LVTX_VSS_2
LVTX_VSS_3
LVTX_VSS_4
LVTX_VSS_5
LVTX_VSS_6
LVTX_VSS_7
LVTX_VSS_8

LVRX_VSS1
LVRX_VSS2
LVRX_VSS3
LVRX_VSS4

DDRPLL_DVSS

DISP_AVSS

DDRPLL_AVSS

SS_DISP_DVSS

C1161

0.1uF

SPI_SCLK

SPI_DO

VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229

SS_AVSS

PGND1
PGND2

W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W32
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AB12
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB32
AB33
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AD3
AE33
AF2
AF32
AG3
AH5
AH30
AH33
AJ31
AJ34
AK2
AK11
AK12
AK13
AK14
AK15
AK16
AK17
AK18
AK19
AK20
AK21
AK22
AK23
AK24
AK25
AK26
AK33
AL1
AL3
AL25
AL26
AL32
AM3
AN2
AN3
AN32
AP2
AP3
AP32
AP33

D9
D11
D13
D15
D21
D23
D25
D27

D17
D19

AM17
AM19
AM21
AM23

AM12
AM13
AN14
AP12
AP13

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

3D + 240 FRC + TCON BOARD 2009. 11. 13

฀

LG1120(FRC 240Hz Chip) 1

10

DDR_ADDR[0-12]

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

001:L40;002:W39;002:AH39;002:BD39

001:Z38;002:U33;002:AI36;002:BB34

001:AA38;002:U33;002:AI36;002:BB33

001:X38;002:U32;002:AI35;002:BB33

001:Y38;002:U31;002:AI34;002:BB31

001:X38;002:U33;002:AI34;002:BB33
001:Y38;002:U31;002:AI34;002:BB32
001:Y38;002:U32;002:AI34;002:BB32
001:X38;002:U32;002:AI34;002:BB32

001:V38;002:AI35
001:V38;002:AI35

001:V38
001:W38

001:Y38
001:Z38

001:V38
001:W38

+1.8V_DDR

+1.8V_DDR

C200

0.1uF
16V

C201

0.1uF
16V

DDR_BA0
DDR_BA1

DDR_CLK
DDR_CLK
DDR_CKE

DDR_ODT

DDR_CS
DDR_RAS
DDR_CAS

DDR_WE

DDR_DQS0
DDR_DQS1

DDR_DM0
DDR_DM1

DDR_DQS0
DDR_DQS1

DDR_ADDR[0]
DDR_ADDR[1]
DDR_ADDR[2]
DDR_ADDR[3]
DDR_ADDR[4]
DDR_ADDR[5]
DDR_ADDR[6]
DDR_ADDR[7]
DDR_ADDR[8]
DDR_ADDR[9]
DDR_ADDR[10]
DDR_ADDR[11]
DDR_ADDR[12]

C203

0.1uF
16V

C204

0.1uF
16V

C206

0.1uF
16V

C207

0.1uF
16V

R202

OPT

100

+1.8V_DDR

+0.9VREF

R204

R205

C209

0.1uF
16V

C210

0.1uF
16V

200

100

OPT

H5PS5162FFR-S6C

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC4

L1

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

C212

C215

0.1uF

0.1uF

16V

16V

C216

C213

0.1uF

0.1uF
16V

16V

IC200

C218

0.1uF
16V

C219

0.1uF
16V

C221

0.1uF
16V

C222

0.1uF
16V

H5PS5162FFR-S6C

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC4

L1

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

C290

C293

0.1uF

0.1uF

16V

16V

C291

C294

0.1uF

0.1uF

16V

16V

IC205

C296

0.1uF
16V

C297

0.1uF
16V

C298

0.1uF
16V

C299

0.1uF
16V

DDR_DATA[0-31]

C1210

0.1uF
16V

C1211

0.1uF
16V

001:O40;002:N40

C1212

0.1uF
16V

C1213

0.1uF
16V

C1214
10uF
10V

C1215
10uF
10V

C1226

C1220

0.1uF

0.1uF

0.9V DDR VREF POWER DIVIDER

- For Main Chip Side

+0.9VREF

C1216

C1222

0.1uF

0.01uF

16V

50V

+1.8V_DDRS

+0.9VREFS

C1217

C1223

0.1uF

0.01uF

16V

50V

C1228

0.1uF

+1.8V_DDR

C1230

R250

R251

4.7K

R252

R253

4.7K

0.1uF

4.7K
OPT

OPT

4.7K
OPT

OPT

DQ0

DDR_DATA[16]

G8

DQ1

DDR_DATA[17]

G2

DQ2

DDR_DATA[18]

H7

DQ3

DDR_DATA[19]

H3

DQ4

DDR_DATA[20]

H1

DQ5

DDR_DATA[21]

H9

DQ6

DDR_DATA[22]

F1

DQ7

DDR_DATA[23]

F9

DQ8

DDR_DATA[24]

C8

DQ9

DDR_DATA[25]

C2

DQ10

DDR_DATA[26]

D7

DQ11

DDR_DATA[27]

D3

DQ12

DDR_DATA[28]

D1

DQ13

DDR_DATA[29]

D9

DQ14

DDR_DATA[30]

B1

DQ15

DDR_DATA[31]

B9

+1.8V_DDR

VDD5

A1

VDD4

E1

VDD3

J9

VDD2

M9

VDD1

R1

VDDQ10

A9

VDDQ9

C1

VDDQ8

C3

VDDQ7

C7

VDDQ6

C9

VDDQ5

E9

VDDQ4

G1

VDDQ3

G3

VDDQ2

G7

VDDQ1

G9

VSS5

A3

VSS4

E3

VSS3

J3

VSS2

N1

VSS1

P9

VSSQ10

B2

VSSQ9

B8

VSSQ8

A7

VSSQ7

D2

VSSQ6

D8

VSSQ5

E7

VSSQ4

F2

VSSQ3

F8

VSSQ2

H2

VSSQ1

H8

C1200

0.1uF
16V

C1201

0.1uF
16V

C1202

0.1uF
16V

C1203

0.1uF
16V

C1204

0.1uF
16V

C1205

0.1uF
16V

C1206

0.1uF
16V

C1207

0.1uF
16V

C1208

0.1uF
16V

C1209

0.1uF
16V

C1232

0.1uF

C1234

+0.9VTT

0.1uF

+0.9VREF

+0.9VREFS

For Termination of DDR

R2212150

DDR_ADDR[0]
DDR_ADDR[1]

R2213150
R2214150

DDR_ADDR[2]

R2215150

DDR_ADDR[3]

R2216150

DDR_ADDR[4]

R2217150

DDR_ADDR[5]

R2218150

DDR_ADDR[6]

R2219150

DDR_ADDR[7]

R2220150

DDR_ADDR[8]

R2221150

DDR_ADDR[9]

R2222150

DDR_ADDR[10]

R2223150

DDR_ADDR[11]

R258150

DDR_ADDR[12]

R259150

R260150

R261150

R262150

R263150

R264150

R265150

R266150

+1.8V_DDR

R276

4.7K

OPT

C1240

C1236

0.1uF
16V

C1237

0.1uF
16V

50V

C1241

50V

0.01uF

0.01uF

+1.8V_DDRS

R277

4.7K
OPT

R278

4.7K

OPT

R279

4.7K
OPT

DDR_ADDR[0-12]

001:L40;002:E39;002:W39;002:AH39

DDR_BA0

001:Z38;002:F36;002:U33;002:AI36

001:AA38;002:F36;002:U33;002:AI36

DDR_BA1

DDR_CS

001:X38;002:F34;002:U33;002:AI34

DDR_CKE

001:X38;002:F35;002:U32;002:AI35

001:X38;002:F34;002:U32;002:AI34

DDR_WE

001:Y38;002:F34;002:U32;002:AI34

DDR_CAS

DDR_RAS

001:Y38;002:F34;002:U31;002:AI34

DDR_ODT

001:Y38;002:F34;002:U31;002:AI34

+0.9VREF

C1244

0.1uF
16V

+0.9VREFS

C1245

0.1uF
16V

C1246

0.01uF

50V

+1.8V_DDRS

C1247

0.01uF

50V

+1.8V_DDR

R284

4.7K

OPT

R285

4.7K
OPT

R286

4.7K

OPT

R287

4.7K
OPT

DDR_ADDR[0]
DDR_ADDR[1]
DDR_ADDR[2]
DDR_ADDR[3]
DDR_ADDR[4]
DDR_ADDR[5]
DDR_ADDR[6]
DDR_ADDR[7]
DDR_ADDR[8]
DDR_ADDR[9]
DDR_ADDR[10]
DDR_ADDR[11]
DDR_ADDR[12]

C281

0.1uF
16V

C282

0.1uF
16V

R246

R247

C284

0.1uF
16V

C285

0.1uF
16V

OPT

200

100

+1.8V_DDR

+0.9VREF

R249

100
OPT

C287

0.1uF
16V

C288

0.1uF
16V

DDR_DATA[0-31]

C229

0.1uF
16V

C230

0.1uF
16V

001:O40;002:AQ40

C231

0.1uF
16V

C232

0.1uF
16V

C233

0.1uF
16V

C234

0.1uF
16V

C235

0.1uF
16V

C236

0.1uF
16V

For Termination of DDR

+0.9VTT

R288150

DDR_ADDR[0]

R289150

DDR_ADDR[1]

R290150

C240

C246

0.1uF

0.1uF

C237

C243

0.1uF

10uF

16V

10V

C244

C238

10uF

0.1uF
10V

16V

0.1uF

0.1uF

0.1uF

+0.9VTT

C259

0.1uF
16V

0.1uF

C255

4.7uF
10V

C248

C252

C250

C242

DDR_ADDR[2]

R291150

DDR_ADDR[3]

R292150

DDR_ADDR[4]

R293150

DDR_ADDR[5]

R294150

DDR_ADDR[6]

R295150

DDR_ADDR[7]

R296150

DDR_ADDR[8]

R297150

DDR_ADDR[9]

R298150

DDR_ADDR[10]

R299150

DDR_ADDR[11]

R215150

DDR_ADDR[12]

R216150

R217150

R218150

R219150

R220150

R221150

R222150

R223150

C253

C254

47uF

47uF

10V

10V

C263

C261

0.01uF

0.1uF

50V

16V

DDR_ADDR[0-12]

001:L40;002:E39;002:AH39;002:BD39

DDR_BA0

001:Z38;002:F36;002:AI36;002:BB34

001:AA38;002:F36;002:AI36;002:BB33

DDR_BA1

001:X38;002:F34;002:AI34;002:BB33

DDR_CS

DDR_CKE

001:X38;002:F35;002:AI35;002:BB33

001:X38;002:F34;002:AI34;002:BB32

DDR_WE

001:Y38;002:F34;002:AI34;002:BB32

DDR_CAS

DDR_RAS

001:Y38;002:F34;002:AI34;002:BB32

DDR_ODT

001:Y38;002:F34;002:AI34;002:BB31

+3.3VD

IC202

R224

BD35331F-E2

10K

GND

1

EN

2

VTTS

3

VREF

4

C257
10uF

6.3V

VTT

8

VTT_IN

7

VCC

6

VDDQ

5

RC FILTER

R236
220

C265

C269

1uF

2.2uF

10V

25V

+1.8V_DDR+0.9VREF

C267

10uF

6.3V

C273

C271

0.01uF

0.1uF

50V

16V

DDR_ADDR[0-12]

001:L40;002:E39;002:W39;002:BD39

001:Z38;002:F36;002:U33;002:BB34

001:AA38;002:F36;002:U33;002:BB33

001:X38;002:F35;002:U32;002:BB33

001:V38;002:F35
001:V38;002:F35

001:Y38;002:F34;002:U31;002:BB31
001:X38;002:F34;002:U33;002:BB33
001:Y38;002:F34;002:U31;002:BB32
001:Y38;002:F34;002:U32;002:BB32
001:X38;002:F34;002:U32;002:BB32

+1.8V_DDRS

+1.8V_DDRS

001:W38
001:W38

001:W38
001:X38

C275

0.1uF
16V

C276

0.1uF
16V

001:Z38
001:Z38

C278

0.1uF
16V

C279

0.1uF
16V

DDR_BA0
DDR_BA1

DDR_CLK
DDR_CLK
DDR_CKE

DDR_ODT

DDR_CS
DDR_RAS
DDR_CAS

DDR_WE

DDR_DQS2
DDR_DQS3

DDR_DM2
DDR_DM3

DDR_DQS2
DDR_DQS3

DQ0

C223

0.1uF
16V

C224

0.1uF
16V

DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VDD5
VDD4
VDD3
VDD2
VDD1

VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1

VSS5
VSS4
VSS3
VSS2
VSS1

VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1

+1.8V_DDR

C225

0.1uF
16V

C226

0.1uF
16V

DDR_DATA[0]
DDR_DATA[1]
DDR_DATA[2]
DDR_DATA[3]
DDR_DATA[4]
DDR_DATA[5]
DDR_DATA[6]
DDR_DATA[7]
DDR_DATA[8]

DDR_DATA[9]
DDR_DATA[10]
DDR_DATA[11]
DDR_DATA[12]
DDR_DATA[13]
DDR_DATA[14]
DDR_DATA[15]

C227

0.1uF

16V

C228

0.1uF

16V

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

A1
E1
J9
M9
R1

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A3
E3
J3
N1
P9

B2
B8
A7
D2
D8
E7
F2
F8
H2
H8

DDRS_ADDR[0-12]

001:K12;002:W13;002:AK17;002:BD12

001:Z13;002:U8;002:AK13;002:BB7

001:AA13;002:U7;002:AK13;002:BB6

001:V13;002:AK13
001:V13;002:AK12

001:X13;002:U7;002:AK12;002:BB6

001:Y13;002:U5;002:AK12;002:BB4
001:X13;002:U7;002:AK12;002:BB6
001:Y13;002:U6;002:AK11;002:BB5
001:Y13;002:U6;002:AK11;002:BB5
001:X13;002:U6;002:AK11;002:BB5

001:V13
001:W13

001:Y13
001:Z13

001:V13
001:W13

+0.9VREF

DDRS_DQS0
DDRS_DQS1

DDRS_DQS0
DDRS_DQS1

C202

0.1uF
16V

DDRS_BA0
DDRS_BA1

DDRS_CLK
DDRS_CLK
DDRS_CKE

DDRS_ODT

DDRS_CS
DDRS_RAS
DDRS_CAS

DDRS_WE

DDRS_DM0
DDRS_DM1

C205

0.1uF
16V

DDRS_ADDR[0]
DDRS_ADDR[1]
DDRS_ADDR[2]
DDRS_ADDR[3]
DDRS_ADDR[4]
DDRS_ADDR[5]
DDRS_ADDR[6]
DDRS_ADDR[7]
DDRS_ADDR[8]
DDRS_ADDR[9]
DDRS_ADDR[10]
DDRS_ADDR[11]
DDRS_ADDR[12]

R200

R201

OPT

200

100

C208

0.1uF
16V

+1.8V_DDRS

C211

0.1uF
16V

+0.9VREFS

R203

100

OPT

C214

C217

0.1uF

0.1uF

16V

16V

H5PS5162FFR-S6C

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC4

L1

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

C220

0.1uF
16V

IC201

C2202
47uF
10V

50V

DDRS_ADDR[10]
DDRS_ADDR[11]

DDRS_ADDR[12]

C262

0.1uF
16V

DDRS_ADDR[0]
DDRS_ADDR[1]
DDRS_ADDR[2]
DDRS_ADDR[3]

DDRS_ADDR[4]
DDRS_ADDR[5]
DDRS_ADDR[6]
DDRS_ADDR[7]

DDRS_ADDR[8]
DDRS_ADDR[9]

+3.3VD

R225

BD35331F-E2

10K

GND

EN

VTTS

VREF

C258
10uF

6.3V

DDRS_ADDR[0-12]

001:K12;002:E16;002:AK17;002:BD12

DDRS_BA0

001:Z13;002:F13;002:AK13;002:BB7

001:AA13;002:F13;002:AK13;002:BB6

DDRS_BA1

001:X13;002:F11;002:AK12;002:BB6

DDRS_CS

DDRS_CKE

001:X13;002:F12;002:AK12;002:BB6

001:X13;002:F11;002:AK11;002:BB5

DDRS_WE

001:Y13;002:F11;002:AK11;002:BB5

DDRS_CAS

DDRS_RAS

001:Y13;002:F11;002:AK11;002:BB5

001:Y13;002:F11;002:AK12;002:BB4

DDRS_ODT

IC203

VTT

1

8

VTT_IN

2

7

VCC

3

6

VDDQ

4

5

RC FILTER

R237
220

C266

C270

1uF

2.2uF

10V

25V

+1.8V_DDRS

C268

10uF

6.3V

C272

C274

0.1uF

0.01uF
16V

50V

+0.9VTTS

C256

C260

0.1uF
16V

DQ0

DDRS_DATA[0]

G8

DQ1

DDRS_DATA[1]

G2

DQ2

DDRS_DATA[2]

H7

DQ3

DDRS_DATA[3]

H3

DQ4

DDRS_DATA[4]

H1

DQ5

DDRS_DATA[5]

H9

DQ6

DDRS_DATA[6]

F1

DQ7

DDRS_DATA[7]

F9

DQ8

DDRS_DATA[8]

C8

DQ9

DDRS_DATA[9]

C2

DQ10

DDRS_DATA[10]

D7

DQ11

DDRS_DATA[11]

D3

DQ12

DDRS_DATA[12]

D1

DQ13

DDRS_DATA[13]

D9

DQ14

DDRS_DATA[14]

B1

DQ15

DDRS_DATA[15]

B9

+1.8V_DDRS

VDD5

A1

VDD4

E1

VDD3

J9

VDD2

M9

VDD1

R1

VDDQ10

A9

VDDQ9

C1

VDDQ8

C3

VDDQ7

C7

VDDQ6

C9

VDDQ5

E9

VDDQ4

G1

VDDQ3

G3

VDDQ2

G7

VDDQ1

G9

VSS5

A3

VSS4

E3

VSS3

J3

VSS2

N1

VSS1

P9

VSSQ10

B2

VSSQ9

B8

VSSQ8

A7

VSSQ7

D2

VSSQ6

D8

VSSQ5

E7

VSSQ4

F2

VSSQ3

F8

VSSQ2

H2

VSSQ1

H8

DDRS_DATA[0-31]

001:N11;002:AT17

C239

C241

0.1uF

0.1uF

C247

C249

C251

C245

0.1uF

0.1uF

0.1uF

C2201

4.7uF

47uF

10V

10V

+0.9VREFS

For Termination of DDR

+0.9VTTS

R2200150
R2201150
R2202150

0.1uF

R2203150

R2204150
R2205150
R2206150
R2207150

R2208150

R2209150
R2210150
R2211150

C264

0.01uF

R206150

R207150

R208150

R209150

R210150

R211150

R212150

R213150

R214150

+0.9VREFS

C280

C283

C277

0.1uF

0.1uF

0.1uF
16V

16V

16V

DDRS_ADDR[0-12]

001:K12;002:E16;002:W13;002:BD12

001:Z13;002:F13;002:U8;002:BB7

001:AA13;002:F13;002:U7;002:BB6

001:V13;002:F12
001:V13;002:F12

001:X13;002:F12;002:U7;002:BB6

001:Y13;002:F11;002:U5;002:BB4
001:X13;002:F11;002:U7;002:BB6
001:Y13;002:F11;002:U6;002:BB5
001:Y13;002:F11;002:U6;002:BB5
001:X13;002:F11;002:U6;002:BB5

001:W13
001:W13

001:Z13
001:Z13

001:W13
001:X13

C286

0.1uF
16V

C289

0.1uF
16V

DDRS_BA0
DDRS_BA1

DDRS_CLK
DDRS_CLK
DDRS_CKE

DDRS_ODT

DDRS_CS
DDRS_RAS
DDRS_CAS

DDRS_WE

DDRS_DQS2
DDRS_DQS3

DDRS_DM2
DDRS_DM3

DDRS_DQS2
DDRS_DQS3

C292

0.1uF
16V

DDRS_ADDR[0]
DDRS_ADDR[1]
DDRS_ADDR[2]
DDRS_ADDR[3]
DDRS_ADDR[4]
DDRS_ADDR[5]
DDRS_ADDR[6]
DDRS_ADDR[7]
DDRS_ADDR[8]
DDRS_ADDR[9]
DDRS_ADDR[10]
DDRS_ADDR[11]
DDRS_ADDR[12]

R245

200

R244

100
OPT

C295

0.1uF
16V

R248

100
OPT

+1.8V_DDRS

+0.9VREFS

H5PS5162FFR-S6C

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC4

L1

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

IC204

- For SDRAM Side

+1.8V_DDR

+0.9VREF

C1218

C1224

0.1uF

0.01uF

16V

50V

DDRS_DATA[0-31]

DQ0

DDRS_DATA[16]

G8

DQ1

DDRS_DATA[17]

G2

DQ2

DDRS_DATA[18]

H7

DQ3

DDRS_DATA[19]

H3

DQ4

DDRS_DATA[20]

H1

DQ5

DDRS_DATA[21]

H9

DQ6

DDRS_DATA[22]

F1

DQ7

DDRS_DATA[23]

F9

DQ8

DDRS_DATA[24]

C8

DQ9

DDRS_DATA[25]

C2

DQ10

DDRS_DATA[26]

D7

DQ11

DDRS_DATA[27]

D3

DQ12

DDRS_DATA[28]

D1

DQ13

DDRS_DATA[29]

D9

DQ14

DDRS_DATA[30]

B1

DQ15

DDRS_DATA[31]

B9

+1.8V_DDRS

VDD5

A1

VDD4

E1

VDD3

J9

VDD2

M9

VDD1

R1

VDDQ10

A9

VDDQ9

C1

VDDQ8

C3

VDDQ7

C7

VDDQ6

C9

VDDQ5

E9

VDDQ4

G1

VDDQ3

G3

VDDQ2

G7

VDDQ1

G9

VSS5

A3

VSS4

E3

VSS3

J3

VSS2

N1

VSS1

P9

VSSQ10

B2

VSSQ9

B8

VSSQ8

A7

VSSQ7

D2

VSSQ6

D8

VSSQ5

E7

VSSQ4

F2

VSSQ3

F8

VSSQ2

H2

VSSQ1

H8

001:N11;002:N17

+0.9VREFS

C1219

0.1uF
16V

C1221

0.1uF

C1227

0.1uF

+1.8V_DDRS

C1225

0.01uF

50V

C1229

0.1uF

R254

R255

4.7K

R256

R257

4.7K

C1231

+0.9VREF

4.7K
OPT

OPT

+0.9VREFS

4.7K

OPT

OPT

+0.9VTTS

C1235

C1233

0.1uF

0.1uF

0.1uF

+1.8V_DDR

R280

4.7K

OPT

C1238

C1242

50V

C1243

50V

0.01uF

0.01uF

+1.8V_DDRS

R281

4.7K
OPT

R282

4.7K

OPT

R283

4.7K
OPT

0.1uF
16V

C1239

0.1uF
16V

For Termination of DDR

R2224150

DDRS_ADDR[0]

R2225150

DDRS_ADDR[1]

R2226150

DDRS_ADDR[2]

R2227150

DDRS_ADDR[3]

R2228150

DDRS_ADDR[4]

R2229150

DDRS_ADDR[5]

R2230150

DDRS_ADDR[6]

R2231150

DDRS_ADDR[7]

R2232150

DDRS_ADDR[8]

R2233150

DDRS_ADDR[9]

R2234150

DDRS_ADDR[10]

R2235150

DDRS_ADDR[11]

R267150

DDRS_ADDR[12]

R268150

R269150

R270150

R271150

R272150

R273150

R274150

R275150

DDRS_ADDR[0-12]

001:K12;002:E16;002:W13;002:AK17

DDRS_BA0

001:Z13;002:F13;002:U8;002:AK13

001:AA13;002:F13;002:U7;002:AK13

DDRS_BA1

001:X13;002:F11;002:U7;002:AK12

DDRS_CS

DDRS_CKE

001:X13;002:F12;002:U7;002:AK12

001:X13;002:F11;002:U6;002:AK11

DDRS_WE

001:Y13;002:F11;002:U6;002:AK11

DDRS_CAS

DDRS_RAS

001:Y13;002:F11;002:U6;002:AK11

DDRS_ODT

001:Y13;002:F11;002:U5;002:AK12

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

3D + 240 FRC + TCON BOARD 2009. 11. 13

DDR2 SDRAM 2 10

MAIN 3.3V & 3.3V IO POWER

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

VLCD_POWER

L301

120-ohm

C301
22uF
25V

C302

0.1uF

R301

22

IC301

MP8706EN-C247-LF-Z

IN

1

SW_1

2

SW_2

3

BST

4

L305

3.6uH

4.9A

1.0V DIGITAL CORE POWER

+3.3V

L303

120-ohm

C304

R302

100pF

3K

1%
R1

C306
10uF

6.3V

R303

9.1K
1%

R2

OPT

Vout= 0.8*(1+R1/R2)

C303
22uF

16V

GND

8

7

6

5

FB

IN

BS

GND

VCC

FB

EN/SYNC

C309

0.47uF
50V

OPT

IC302

MP2212DN

1

2

3

4

R305

100K

C308
1uF
50V

R306
39K

VLCD_POWER

R307

100K

EN/SYNC

8

SW_2

7

SW_1

6

VCC

5

C311
100pF

50V

OPT

(+12V)

Vout= 0.8*(1+R1/R2)

R308

39K
1%

R1

R309

12.4K
1%

R2

C314

0.22uF
50V

L306

3.6uH

NR8040T3R6N

C315

0.1uF
50V

C316
22uF
16V

C318
22uF

16V

C377
22uF
16V

C319

0.1uF
16V

C374
22uF
16V

+1.0VDC

+3.3V

C317
22uF
16V

DDR2 SDRAM SOURCE POWER for FRC

VLCD_POWER

(+12V)

L304

120-ohm

C320
10uF
25V

R310
100K

C325

0.1uF
16V

R318

100K

PGOOD

EN/PSV

C330

1uF
25V

22

25

ENL

28

FB

1

TON

27

DDR2 SDRAM SOURCE POWER for FPGA

VLCD_POWER

L310

120-ohm

C321
22uF
25V

C326

0.1uF

R311

22

C334

0.1uF
50V

V5V2VLDO6VIN_15VIN_28VIN_39VIN_410VIN_511VIN_6P2VOUT

IC304

SC424MLTRT

AGND_13AGND_226AGND_3P1PGND_113PGND_214PGND_316PGND_417PGND_518PGND_6

IC310

MP8706EN-C247-LF-Z

IN

1

SW_1

2

SW_2

3

BST

4

L314

3.6uH

4.9A

8

7

6

5

GND

VCC

FB

EN/SYNC

C337

0.47uF
50V

4

15

20

21

P3

12

24

23

19

7

C335
1uF
50V

LX_1

LX_2

LX_3

LX_4

LXBST

LXS

ILIM

BST

R319
39K

VLCD_POWER

R321

100K

C339

100pF

50V

R320

8.2K

OPT

(+12V)

L307

3.3uH

4.1A

C338

R334
39K

0.1uF
OPT

50V

Vout= 0.8*(1+R1/R2)

R336
10K
1%

R1

R337

4.7K
1%

R2

C340
1000pF
OPT

C368

0.01uF

OPT

C375
22uF
16V

R335
10K
1%

R1

R338

4.3K
1%

R2

C376
22uF
16V

C369
100pF
50V

2V5

C371
22uF
16V

C370
22uF
16V

C372
22uF
16V

+2.5VQ

C373

22uF
16V

1.8V DDR SDRAM POWER

IC307

+2.5VQ

+2.5VQ

C349
10uF
10V

C350
10uF
10V

C353

0.1uF
16V

C354

0.1uF
16V

R323
91K

R324
100K

C356

0.22uF
50V

C357

0.22uF
50V

SC4215ISTRT

NC_1

EN

VIN

NC_2

SC4215ISTRT

NC_1

EN

VIN

NC_2

1

2

3

4

IC308

1

2

3

4

1.8V FPGA DDR SDRAM POWER

2V5

R322
100K

C352

C348
10uF
10V

0.1uF
16V

C355

0.22uF
50V

SC4215ISTRT

NC_1

EN

VIN

NC_2

IC306

1

2

3

4

Vout= 0.8*(1+R1/R2)

GND

8

ADJ

7

VO

6

NC_3

5

Vout= 0.8*(1+R1/R2)

GND

8

ADJ

7

VO

6

NC_3

5

Vout= 0.8*(1+R1/R2)

GND

8

ADJ

7

VO

6

NC_3

5

R327
15K
1/10W
1%

R1

R328
12K
1/10W
1%

R2

R330
15K
1%

R1

R331
12K
1%

R2

R332
15K
1/10W
1%

R1

R333
12K
1/10W
1%

R2

C360
22uF
16V

C361
22uF
16V

C362
22uF
16V

+1.8V_DDR

C365

0.1uF
16V

+1.8V_DDRS

C366

0.1uF
16V

1V8

C364

0.1uF
16V

R304

10

1%

C312
1uF
10V

1.2V FPGA CORE POWER

+3.3V

L308

120-ohm

Vout= 0.8*(1+R1/R2)

OPT

C323

C322

0.1uF

22uF
16V

50V

R312
10K

C324

22uF

16V

OPT
D302
1N4148W_DIODES

100V

R313
0

GND

R314
100K

FB

IN

BS

C327 100pF

IC305

MP2212DN

1

2

3

4

R315
10

R316
10

R317

5.1K

C328

8

7

6

5

0.1uF

EN/SYNC

SW_2

SW_1

VCC

C329
1uF
25V

L309

3.6uH

C331

22uF
16V

C332

0.47uF
50V

C333

0.1uF
50V

DDR_VTT

1V2

C336

22uF
16V

OPT

1.8V FPGA DDR SDRAM VTT & VREF

OPT

C310
22uF
16V

C305
22uF
16V

DDR_VREF1

C342

0.1uF
16V

C307
22uF
16V

DDR_VREF0

C344
10uF
16V

BLM18PG121SN1D

C343

0.1uF
16V

C345

0.1uF
16V

C347

0.1uF
16V

L311

C346

0.1uF
16V

L312

BLM18PG121SN1D

OPT

C351

0.1uF
16V

R325

10K

OPT

R326

1M

C358

0.1uF
16V

BD35331F-E2

GND

1

EN

2

VTTS

3

VREF

4

IC309

VTT

8

VTT_IN

7

VCC

6

R329

VDDQ

220

5

C359
10uF
25V

+3.3V

1V8

C367

C363

0.1uF

2.2uF
16V

10V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

3D + 240 FRC + TCON BOARD

FRC & FPGA Power Block

2009. 11. 13

3

10

+1.8V_TCON

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

120-ohm

+1.8V_TCON_M

L400

[T-CON LEFT => Master]

004:R6;009:O8

004:U6;009:O7
004:R5;009:O10
004:U5;009:O10
004:R5;009:O11
004:U5;009:O11
004:R5;009:O13
004:U5;009:O13
004:R5;009:O12
004:U5;009:O12
004:R5;009:O14
004:U5;009:O13
004:R4;009:O14
004:U4;009:O14
004:R3;009:O15
004:U3;009:O15

004:R3;009:Y6

004:U3;009:Y5

004:R3;009:Y5

004:U3;009:Y5

004:R3;009:Y8

004:U3;009:Y7

004:R3;009:Y7

004:U3;009:Y7

004:X6;009:Y6
004:AA6;009:Y6

004:X5;009:Y8
004:AA5;009:Y8

004:X5;009:Y9
004:AA5;009:Y9
004:X5;009:Y10

004:AA5;009:Y10

004:X5;009:Y12

004:AA5;009:Y12

004:X5;009:Y14

004:AA5;009:Y14

004:X4;009:Y13

004:AA4;009:Y12

004:X3;009:Y11

004:AA3;009:Y10

004:X3;009:Y11

004:AA3;009:Y11

004:X3;009:Y13

004:AA3;009:Y13

004:X3;009:Y14

004:AA3;009:Y14

004:X3;009:Y16

004:AA3;009:Y16

TA5­TA5+
TB5­TB5+
TC5-

TC5+
TCLK5­TCLK5+

TD5-

TD5+

TE5-

TE5+

TA6-

TA6+

TB6-

TB6+

TC6-

TC6+
TCLK6­TCLK6+

TD6-

TD6+

TE6-

TE6+

TA7-

TA7+

TB7-

TB7+

TC7-

TC7+
TCLK7­TCLK7+

TD7-

TD7+

TE7-

TE7+

TA8-

TA8+

TB8-

TB8+

TC8-

TC8+
TCLK8­TCLK8+

TD8-

TD8+

TE8-

TE8+

GOE_A

GSP_A

SOE_A

R417
2K

R418
2K

OPT

C402

0.1uF
16V

C403

0.1uF
16V

C404

0.1uF
16V

C405

0.1uF
16V

R422
2K

R423
2K

OPT

R419

R420

OPT

R421

33

33

R424

C409

0.1uF
16V

C407

0.1uF
16V

R425
2K

R426
2K

OPT

33

270

C400

004:C8

001:AF18;004:AE10;004:AL20;005:AA14

001:AF18;004:AA10;004:AL20;005:AA15

TCON_SCL_M

TCON_SDA_M

LVDS_SEL_M

+1.8V_TCON_M+3.3V_TCON_M

R1AN

1

R1AP

2

R1BN

3

R1BP

4

R1CN

5

R1CP

6

R1CLKN

7

R1CLKP

8

R1DN

9

R1DP

10

R1EN

11

R1EP

12

R2AN

13

R2AP

14

R2BN

15

R2BP

16

LVDD_1

17

R2CN

18

R2CP

19

R2CLKN

20

R2CLKP

21

LGND_1

22

R2DN

23

R2DP

24

R2EN

25

R2EP

26

R3AN

27

R3AP

28

R3BN

29

R3BP

30

LVDD_2

31

R3CN

32

R3CP

33

R3CLKN

34

R3CLKP

35

LGND_2

36

R3DN

37

R3DP

38

R3EN

39

R3EP

40

R4AN

41

R4AP

42

R4BN

43

R4BP

44

R4CN

45

R4CP

46

R4CLKN

47

R4CLKP

48

R4DN

49

R4DP

50

R4EN

51

R4EP

52

INT_SSC2

OGND_11

CVDD_11

LVDD_5

LGND_5

205

206

207

208

53

LVDD_354LGND_355LVDD_456LGND_4

EIVSS_158EIVDD_1

CGND_11

204

57

203

DISN

OVDD_9

INT_VCO2

EOVDD_7

EOVSS_6

CVDD_10

197

198

199

200

201

202

TL2425MC (GLORY)

59

60

61

62

63

64

RBF

RESET

CGND_1

CVDD_1

PWR_SEO65PAT_DET

INT_SSC1

EOVSS_5

EOVDD_6

195

196

66

INT_VCO1

33

R443

SCL

CVDD_9

194

67

FLK1

OVDD_169OGND_1

SDA

192

193

68

33

R444

OGND_10

EOVDD_5

EOVSS_4

189

190

191

70

DPN71GOE72GSC73GSP

EOVDD_4

OVDD_8

CGND_10

187

188

IC400

74

GSP_R

OVDD_276CGND_277CVDD_2

186

75

CVDD_8

EOVSS_3

184

185

OVDD_7

OGND_9

182

183

78

79

OGND_2

EIVSS_2

004:C5

004:G8

REVERSE_M

BIT_SEL_M

FRCON

C10S8

REVERSE

180

181

80

81

VCORES

N_S_SEL

EIVDD_2

004:K5

FRC_ON_M

OGND_8

EIVSS_4

EIVDD_4

176

177

178

179

82

83

H_CONV84I2C_EN85CVDD_386CGND_3

OGND_7

OVDD_6

175

VCO_SYNC

CGND_9

EOVDD_3

172

173

174

87

88

TESTA89TESTB90TESTC

SCLKO

EOVDD_2

EOVSS_2

CVDD_7

169

170

171

91

OVDD_392OGND_393CVDD_494CGND_495OVDD_4

EOVSS_1

166

167NC168

SCLKI

EOVDD_1

164

165

96

97

POL98SOE

SSC_SYNC

CGND_7

CGND_8

163

99

OPT_P

162

CVDD_6

161

100

OPT_N

OVDD_5

OGND_6

160

101

FSEL

OGND_4

159

102

EIVSS_3

TCON_AGP

OGND_5

158

103

EIVDD_3

004:AC20

157

156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105

104

TCON_AGP_M

RLV0+
RLV0­NLVDD_6
RLV1+
RLV1­NLVSS_6
RLV2+
RLV2­RLV3+
RLV3­NLVDD_5
RLV4+
RLV4­RLV5+
RLV5­NLVSS_5
RLV6+
RLV6­RLV7+
RLV7­NLVDD_4
RLV8+
RLV8­LLV0+
LLV0­NLVSS_4
LLV1+
LLV1­LLV2+
LLV2­NLVDD_3
LLV3+
LLV3­LLV4+
LLV4­NLVSS_3
LLV5+
LLV5­LLV6+
LLV6­NLVDD_2
LLV7+
LLV7­NLVSS_2
LLV8+
LLV8­NLVSS_1
NLVDD_1
RNLVDS
CGND_6
CVDD_5
CGND_5

R414
18K

42/47LX6500

RRMV6N
RRMV6P

RRMV5N
RRMV5P
RRMV4N
RRMV4P

RRMVCLKN
RRMVCLKP

RRMV2N
RRMV2P
RRMV1N
RRMV1P

RRMV0N
RRMV0P

RLMV6N
RLMV6P
RLMV5N
RLMV5P

RLMV4N
RLMV4P
RLMVCLKN
RLMVCLKP

RLMV2N
RLMV2P

RLMV1N
RLMV1P

RLMV0N
RLMV0P

R414-*1
24K

55LX6500

008:AE10
008:AE10

008:AE10
008:AE11
008:AE11
008:AE11

008:AE11
008:AE12

008:AE12
008:AE12
008:AE12
008:AE13

008:AE13
008:AE13

008:AE13
008:AE14
008:AE14
008:AE14

008:AE14
008:AE14
008:AE15
008:AE15

008:AE15
008:AE16

008:AE16
008:AE16

008:AE16

008:AE16

0.1uF
16V

+3.3V_TCON

120-ohm

C401

0.1uF
16V

+3.3V_TCON_M

R415
2K

R416
2K

OPT

L401

004:M10

004:M10

GSP_R_A
004:M10

004:R10;004:AF13

C412

C410

0.1uF

0.1uF
16V

16V

C411

0.1uF

16V

R427
2K

R428
2K

OPT

008:AE23;008:AL12

C406

10pF

OPT

008:AE18;008:AL18

C408

10pF

OPT

C413

0.1uF
16V

008:AL18

C414
1uF
10V

C415

0.1uF
16V

MS_SEL_M

I2CEN_M

VCO_SYNC_M

SSC_SYNC_M

TCON_AGP_M

GOE

GSP

SOE_L

C416
1uF
10V

C417

0.1uF
16V

004:N10

004:O10;004:X8

004:P10

004:R10

004:S26

POL_A

004:R10

FLK_A

004:L10

SOE_A

004:R10;004:AA13

C418

C419

0.1uF
16V

C423

0.1uF

0.1uF

16V

16V

IC401

M24C16-WMN6T

NC/E0

1

NC/E1

2

NC/E2

3

VSS

4

Write Protection
Low/NC : Normal Operation
High : Write Protection

I2C Slave Address : 0xA0

R436

100

R437

33

R438

220

C424

0.1uF
16V

8

7

6

5

008:AE18;008:AL18

C420

220pF

OPT

006:D12

C421

10pF
50V

008:AE17

C422

10pF
50V

C425

0.1uF
16V

C428

0.1uF

VCC

WC

SCL

SDA

+3.3V_TCON

16V

POL

FLK

SOE_R

C426

0.1uF
16V

C427

0.1uF
16V

GSC_A

004:M10

DPM_A

004:L10

R44 8

3.3 K
OPT

C429

0.1uF
16V

R433

3.3K

C436

10pF

OPT

C430
1uF
10V

R434

3.3K

R446

R447

+3.3V_TCON_M

C433

C432

1uF

1uF

10V

10V

WP_EEPROM_TCON

TCON_SCL_M

001:AF18;004:L27;004:AA10;005:AA15

TCON_SDA_M

001:AF18;004:L27;004:AE10;005:AA14

33

33

008:AE23;008:AL12

C431

10pF

OPT

007:W8;006:D12;006:Q5

R477

R480

0

OPT

001:AJ20

DPM_CTRL

DPM_CTRL1

C435
1uF
10V

001:AD21;005:AJ5

GSC

DPM

0

OPT

004:L10

+3.3V_TCON_M

R400

3.3K
OPT

R401

LVDS Data mapping seletion

10K

L:VESA format
H:JEIDA format

+3.3V_TCON_M

R402

3.3K
OPT

R403

10K

L : Normal operation
H : Reverse operation

LVDS_SEL_M

REVERSE_M

004:K26

004:N26

+3.3V_TCON_M

R404

3.3K

R405

10bit or 8bit Seletion

10K

OPT

+3.3V_TCON_M

R406

3.3K
OPT

R407

10K

L:8bit
H:10bit

When No Video input, Pattern SelectionReverse option Selection
L:Black Pattern
H:Rotate Pattern

BIT_SEL_M

RBF_M

004:O26

004:J10

+3.3V_TCON_M

R408

3.3K

FRC Funtion Seletion
L:Disable(8Bit)

R409

H:Enable(10Bit(D))

10K
OPT

R4100R411

RBF_M

004:G5

PWM_SEQ

TCON_RST

INT_SSC1_M

005:H25

004:AN7;005:I9

001:AF20;005:I9

0

FLK_A

INT_VCO1_M

005:I25

004:AF15

FRC_ON_M

DPM_A

GOE_A

GSC_A

004:AK15

004:AA17

004:AK17

004:O26

GSP_A

GSP_R_A

+1.8V_TCON_M

004:AA15

004:AA14

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R412
1K

1%

R413
1K

1%

H_CONV

MS_SEL_M

004:AC21

008:AE17;008:AL18

I2CEN_M

VCO_SYNC_M

004:AC20

004:X8;004:AC21

TA5­TB5­TC5-

TCLK5­TD5-

TE5-

TA6­TB6-

TC6-

TCLK6-

TD6­TE6-

R478

0

POL_A

SOE_A

OPT_P

OPT_N

SSC_SYNC_M

004:AF17

004:AC20

008:AE24

004:AA13;004:AF13

008:AE17;008:AL19

0

R479

R451

R452
R453

R455
R456

R457
R458
R459
R460
R461

R454

R462

SW400

JS2235S

001:AF18;004:L27;004:AL20;005:AA15

001:AF18;005:J26;005:AA13;005:AJ4

R475
33

I2CEN

100
100
100

100
100
100

100

100
100
100
100
100

TA5+

TB5+
TC5+
TCLK5+
TD5+

TE5+

TA6+

TB6+

TC6+
TCLK6+
TD6+
TE6+

TB7-

TC7-

TCLK7-

TD7­TE7-

TA8-

TB8­TC8- TC8+

TCLK8-

TD8-

TE8-

R476
33

I2CEN_M

I2CEN_S

001:AO39

R463
R464
R465
R466
R467
R468

R469
R470
R471
R472
R473

R474

TCON_SCL_M

TCON_SCL

TCON_SCL_S

100
100
100
100

100

100

100
100
100
100
100

100

TA7+TA7-

TB7+
TC7+
TCLK7+
TD7+
TE7+

TA8+
TB8+

TCLK8+

TD8+
TE8+

1

2

3

6

5

4

001:AF18;004:L27;004:AL20;005:AA14

TCON_SDA_M

TCON_SDA

001:AO39

TCON_SDA_S

001:AF17;005:J26;005:AA13;005:AJ4

3D + 240 FRC + TCON BOARD

240Hz T-Con (Master,Left)

[TCON Reset Block]

+3.3V_TCON

R440

6.8K

R441

R445
1K

20K

1%

R449

10K

Q400

2SA1530A-T112-1R

R450

10K

TCON_RST

004:K10;005:I9

C434

0.47uF
50V

2009. 11. 13

4 10

[T-CON RIGHT => Slave]

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

005:Q6;009:Y26
005:T6;009:Y27
005:Q6;009:Y28
005:T6;009:Y28
005:Q6;009:Y27
005:T6;009:Y27
005:Q6;009:Y29
005:T6;009:Y29
005:Q6;009:Y30
005:T6;009:Y31
005:Q5;009:Y31
005:T5;009:Y31
005:Q4;009:Y29
005:T4;009:Y29
005:Q4;009:Y32
005:T4;009:Y33

005:Q3;009:Y24
005:T3;009:Y25
005:Q3;009:Y25
005:T3;009:Y26

005:Q3;009:Y33
005:T3;009:Y33
005:Q3;009:Y34

005:T3;009:Y34
005:W6;009:Y30
005:Y6;009:Y30
005:W6;009:Y32
005:Y6;009:Y32

005:W6;009:Y36
005:Y6;009:Y36
005:W6;009:Y35
005:Y6;009:Y35

005:W6;009:Y35
005:Y6;009:Y35
005:W5;009:O28
005:Y5;009:O29
005:W4;009:O32
005:Y4;009:O32
005:W4;009:O31
005:Y4;009:O31
005:W4;009:O26
005:Y4;009:O27
005:W3;009:O27
005:Y3;009:O28
005:W3;009:O35
005:Y3;009:O35
005:W3;009:O30
005:Y3;009:O30

TA3­TA3+
TB3­TB3+
TC3-

TC3+
TCLK3­TCLK3+

TD3-

TD3+

TE3-

TE3+

TA4-

TA4+

TB4-

TB4+

TC4-

TC4+
TCLK4­TCLK4+

TD4-

TD4+

TE4-

TE4+

TA1-

TA1+

TB1-

TB1+

TC1-

TC1+
TCLK1­TCLK1+

TD1-

TD1+

TE1-

TE1+

TA2-

TA2+

TB2-

TB2+

TC2-

TC2+
TCLK2­TCLK2+

TD2-

TD2+

TE2-

TE2+

+1.8V_TCON

L500

120-ohm

C504

C502

C500

0.1uF

0.1uF
16V

16V

004:K10

004:L10

005:B6

TCON_SCL_S

TCON_SDA_S

001:AF18;004:AA9;005:AA13;005:AJ4

INT_SSC1_M

+1.8V_TCON_S+3.3V_TCON_S

CVDD_10

CGND_11

INT_SSC2

OGND_11

CVDD_11

LVDD_5

LGND_5

R1AN
R1AP
R1BN
R1BP
R1CN

R1CP
R1CLKN
R1CLKP

R1DN

R1DP

R1EN

R1EP

R2AN

R2AP

R2BN

R2BP
LVDD_1

R2CN

R2CP
R2CLKN
R2CLKP
LGND_1

R2DN

R2DP

R2EN

R2EP

R3AN

R3AP

R3BN

R3BP
LVDD_2

R3CN

R3CP
R3CLKN
R3CLKP
LGND_2

R3DN

R3DP

R3EN

R3EP

R4AN

R4AP

R4BN

R4BP

R4CN

R4CP
R4CLKN
R4CLKP

R4DN

R4DP

R4EN

R4EP

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52

205

206

207

208

53

LVDD_354LGND_355LVDD_456LGND_4

EIVSS_158EIVDD_1

203

204

57

CGND_1

LVDS_SEL_S

INT_VCO1_M

DISN

OVDD_9

INT_VCO2

EOVDD_7

EOVSS_6

197

198

199

200

201

202

TL2425MC (GLORY)

59

60

61

62

63

64

RBF

RESET

CVDD_1

PWR_SEO65PAT_DET

INT_SSC1

001:AF17;004:AE9;005:AA13;005:AJ4

33

R525 33

R524

OGND_10

EOVDD_5

EOVSS_4

SDA

SCL

CVDD_9

EOVSS_5

EOVDD_6

189

190

191

192

193

194

195

196

66

67

68

70

DPN71GOE72GSC73GSP

FLK1

OVDD_169OGND_1

INT_VCO1

EOVDD_4

OVDD_8

CGND_10

186

187

188

IC500

74

75

GSP_R

OVDD_276CGND_277CVDD_2

CVDD_8

EOVSS_3

184

185

OVDD_7

OGND_9

182

183

78

79

OGND_2

EIVSS_2

005:F6

005:B3

BIT_SEL_S

REVERSE_S

C10S8

REVERSE

180

181

80

81

VCORES

N_S_SEL

005:K3

FRC_ON_S

OGND_8

EIVSS_4

EIVDD_4

FRCON

177

178

179

82

83

H_CONV84I2C_EN85CVDD_386CGND_3

EIVDD_2

176

OGND_7

OVDD_6

175

VCO_SYNC

CGND_9

EOVDD_3

172

173

174

87

88

TESTA89TESTB90TESTC

SCLKO

EOVDD_2

EOVSS_2

CVDD_7

169

170

171

91

OVDD_392OGND_393CVDD_494CGND_495OVDD_4

EOVSS_1

166

167NC168

CGND_8

SCLKI

EOVDD_1

164

165

96

97

POL98SOE

SSC_SYNC

163

CVDD_6

CGND_7

162

99

OPT_P

OPT_N

161

100

OVDD_5

OGND_6

160

101

FSEL

OGND_4

159

102

005:AD23

TCON_AGP_S

TCON_AGP

OGND_5

157

158

156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105

103

104

EIVSS_3

EIVDD_3

RLV0+
RLV0­NLVDD_6
RLV1+
RLV1­NLVSS_6
RLV2+
RLV2­RLV3+
RLV3­NLVDD_5
RLV4+
RLV4­RLV5+
RLV5­NLVSS_5
RLV6+
RLV6­RLV7+
RLV7­NLVDD_4
RLV8+
RLV8­LLV0+
LLV0­NLVSS_4
LLV1+
LLV1­LLV2+
LLV2­NLVDD_3
LLV3+
LLV3­LLV4+
LLV4­NLVSS_3
LLV5+
LLV5­LLV6+
LLV6­NLVDD_2
LLV7+
LLV7­NLVSS_2
LLV8+
LLV8­NLVSS_1
NLVDD_1
RNLVDS
CGND_6
CVDD_5
CGND_5

0.1uF
16V

R512
18K

42/47LX6500

C507

0.1uF
16V

LRMV6N
LRMV6P

LRMV5N
LRMV5P
LRMV4N
LRMV4P

LRMVCLKN
LRMVCLKP

LRMV2N
LRMV2P
LRMV1N
LRMV1P

LRMV0N
LRMV0P

LLMV6N
LLMV6P
LLMV5N
LLMV5P

LLMV4N
LLMV4P
LLMVCLKN
LLMVCLKP

LLMV2N
LLMV2P

LLMV1N
LLMV1P

LLMV0N
LLMV0P

C508

0.1uF
16V

R512-*1
24K

55LX6500

C510

0.1uF
16V

008:AL19
008:AL19

008:AL19
008:AL20
008:AL20
008:AL20

008:AL20
008:AL21

008:AL21
008:AL21
008:AL21
008:AL22

008:AL22
008:AL22

008:AL22
008:AL23
008:AL23
008:AL23

008:AL23
008:AL23
008:AL24
008:AL24

008:AL24
008:AL25

008:AL25
008:AL25

008:AL25
008:AL25

+1.8V_TCON_S

C512

C515

1uF

1uF

10V

10V

+3.3V_TCON

L501

120-ohm

C503

C501

0.1uF

0.1uF
16V

16V

+3.3V_TCON_S

R595

3.3K
OPT

OPT

R515
2K

R516
2K

R596

3.3K
OPT

R517
2K

R518
2K

OPT

R597

3.3K
OPT

R513
2K

OPT

R514
2K

001:E19;008:F18;008:V24;008:AL4;009:AP8

001:E19;008:N18;008:V25;008:AL4;009:AP11

I2C_SCL

I2C_SDA

TCON_SCL_M

TCON_SDA_M

001:AF19

M_TCON_EN

TCON_SCL_S

TCON_SDA_S

C505

0.1uF
16V

R519
2K

R520
2K
OPT

R598

3.3K
OPT

R599 33

R1500 33

R1503 33

R1504 33

R1505 33

C506

0.1uF
16V

R521
2K

R522
2K

OPT

+3.3V_TCON

C533
10pF
OPT

R1501 33

R1502 33

C509

0.1uF
16V

L502

120-ohm

C534
10pF

OPT

R1506
2K

C511

0.1uF
16V

MS_SEL_S

I2CEN_S

VCO_SYNC_S

SSC_SYNC_S

TCON_AGP_S

+3.3V

120-ohm

OPT

SCL0

SDA0

SCL1

SDA1

EN1

SCL2

SDA2

GND

C513

0.1uF
16V

L503

IC502

PA9516APW

1

2

3

4

5

6

7

8

C516

0.1uF
16V

005:L9

004:X7;005:M9

005:N9

005:P9

005:Q25

+3.3V_FET

16

15

14

13

12

11

10

9

VCC

EN4

SDA4

SCL4

EN3

SDA3

SCL3

EN2

C517

0.1uF
16V

C535

0.1uF

R1512

R1511

R1508

R1507
2K

C518

0.1uF
16V

+3.3V_FET

2K

2K

33

S_TCON_EN

001:AF19

C519

0.1uF
16V

3.3K

R1513

0

OPT

R1514

R1517

3.3K

0

OPT

C520

0.1uF
16V

R1515

OPT

R1518

3.3K

0

R1516

R1519

3.3K

0

OPT

C521

0.1uF
16V

R1520

C522

0.1uF
16V

C523

0.1uF
16V

C524

0.1uF
16V

C525
1uF
10V

C526
1uF
10V

+3.3V_TCON_S

C527
1uF
10V

C528
1uF
10V

RBF_S

PWM_SEQ

TCON_RST

005:I25

005:L25

+3.3V_TCON_S

R504

3.3K

R505

10bit or 8bit Seletion

10K

L:8bit

OPT

H:10bit

+3.3V_TCON_S

R506

3.3K
OPT

R507

When No Video input, Pattern Selection

10K

L:Black Pattern
H:Rotate Pattern

BIT_SEL_S

RBF_S

005:M25

005:H9

005:F3

004:K10;004:AN7

+3.3V_TCON_S

R508

3.3K

R509
10K

001:AF20;004:K10

FRC Funtion Seletion
L:Disable(8Bit)
H:Enable(10Bit(D))

OPT

+1.8V_TCON_S

FRC_ON_S

+3.3V_TCON_S

R500

3.3K
OPT

R501

LVDS Data mapping seletion

10K

L:VESA format
H:JEIDA format

+3.3V_TCON_S

R502

3.3K

OPT

R503

Reverse option Selection

10K

L : Normal operation
H : Reverse operation

LVDS_SEL_S

REVERSE_S

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R510
1K

1%

R511
1K

1%

MS_SEL_S

005:AD24

005:M25

I2CEN_S

VCO_SYNC_S

005:AD24

004:X7;005:AD24

SSC_SYNC_S

005:AD23

R527

TA3­TB3-

TCLK3-

TD3­TE3-

TA4­TB4­TC4- TC4+

TCLK4-

TD4-

TE4- TE4+

R528

R529

R530

R531

R536
R537
R538

R532

R533
R534
R535

100
100
100

100
100

100

100
100
100

100
100
100

TA3+
TB3+
TC3+TC3­TCLK3+
TD3+
TE3+

TA4+
TB4+

TCLK4+
TD4+

TA1­TB1-

TC1-

TCLK1-

TD1­TE1-

TA2­TB2­TC2-

TCLK2-

TD2­TE2-

R539

R540
R541
R542

R543

R544

R545

R546

R547

R549
R550

R548

[TCON EEPROM(16Kbit)]

100

100
100
100

100

100

100

100

100

100
100
100

TA1+
TB1+
TC1+
TCLK1+
TD1+
TE1+

TA2+
TB2+
TC2+
TCLK2+
TD2+
TE2+

IC501

M24C16-WMN6T

NC/E0

1

NC/E1

2

NC/E2

3

VSS

4

Write Protection
Low/NC : Normal Operation
High : Write Protection

8

7

6

5

+3.3V_TCON

C514

0.1uF
16V

VCC

WC

SCL

SDA

R52 6

3.3 K

R551

R552

3.3K

OPT

3.3K

WP_EEPROM_TCON

TCON_SCL_S

TCON_SDA_S

001:AD21;004:AL21

001:AF18;004:AA9;005:J26;005:AA13

001:AF17;004:AE9;005:J26;005:AA13

I2C Slave Address : 0xA0

3D + 240 FRC + TCON BOARD

240Hz T-Con(Slave,Right)

2009. 11. 13

5 10

[POWER-VDD/VCC/VGH/VGL]

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

C649
10uF
25V

C660
10uF
25V

C662
10uF
25V

C664
10uF
25V

C666
10uF
25V

C668
10uF
25V

C670
10uF
25V

C672
10uF
25V

C674
10uF
25V

VDD_LCM

(+16V)

C676
10uF
25V

008:AL13

007:W8;004:AN15;006:Q5

004:AI15

VCOMLOUT

VGH_I

(+27V)

R602

5%

1/10W

FLK
DPM

C600

1uF
25V

D600

BAV99W_NXP

C654
10uF
25V

C675
10uF
25V

C641

0.1uF
50V

VDD_LCM

(+16V)

VDD_LCM

(+16V)

7.5K

C655
10uF
25V

C677
10uF
25V

R636

5%

C656
10uF
25V

C657
10uF
25V

C658
10uF
25V

VLCD_POWER

(+12V)

C671
10uF
25V

C648
10uF
25V

C653
10uF
25V

C673
10uF
25V

R635

5.1K

C644
10uF
25V

C665
10uF
25V

C645
10uF
25V

C650
10uF
25V

DPM_VDD

C635
10uF
25V

006:S16;006:S5

VLCD_POWER

(+12V)

C637

C634

22uF

22uF

25V

25V

C636
22uF
16V

10uF
25V

006:Q12;006:S5

C638
10uF
25V

VLCD_POWER

(+12V)

R633 0

R634

C639
22uF
16V

10uF
25V

C640
10uF
25V

OPT

1K

VCC_LCM
(+3.3V)

L600
22uH

2.2A

36
35
34
33
32
31
30
29
28
27
26
25

SMAB34
KEC_DIODE

R623

5.6K

22000pF

50V

PGND3
PGND2
PGND1
EN1
EN2
VC
SS
DLY2
FREQ
VIN
PVIN_2
PVIN_1

D602
40V

D603-*1

ONSEMI_DIODE

D603
SMAB34

40V
KEC_DIODE

C617

R624

30K
1%

1/16W

R625

5.1K

L601
22uH

2.2A

C624

680pF

R629

5.1K
1%

R626

5.6K

C642

OPT

C618
1uF
25V

C619
470pF
50V

50V

C622

C626

22uF

22uF

25V

25V

001:AJ20;007:Q15

TCON_POWER_EN

R646

0

OPT

C625 22000pF

50V

C621
22000pF
50V

C623
10uF
25V

R627

4.7K
1%

VLCD_LCM_OUT

(+16V)

C629

0.1uF
50V

C630
10uF
25V

VLCD_POWER

(+12V)

R630
15K

C627
22000pF
50V

R632
10

1/10W
1%

C628
22uF
25V

R631

3.9K
1%

DPM_VDD

C631
22uF
25V

D604

100V

C632
10uF
25V

C633
22uF
16V

C615

C611

22uF

OUT2

46

NEG2

POS2

44

45

IC600

16

FBN17REF

22uF

25V

25V

VLCD_LCM_OUT

(+16V)

SWO43AVIN

41FB42

18

21

FBB

DLY119NC_120NC_2

C612

0.047uF
50V

OPT

C613

0.22uF

16V

SW_1

SW_2

SWI40NC_3

37

38

39

22

CBOOT23SWB_124SWB_2

C616

0.1uF
50V

R615 1K

008:AE22

008:AE22

008:AL13

0

R603
0

C601

100pF

VGH_M

(+24V)

50V
OPT

R604

4.7K

R645

4.7K

R605

330K

1/8W

R606
OPT

VCOMROUT

VCOMRFB

VCOMLFB

VDD_LCM

(+16V)

008:N25

1%

5%

R607
82K

C602
10uF
35V

C688
10uF
35V

P_VCOM

R608-*2
150

55LX6500

R608-*1
300

47LX6500

R608
200

42LX6500

C604
68pF

C603
10uF
35V

C689
10uF
35V

R638 0

R639 0

R610-*2
180

55LX6500

R610-*1
330

47LX6500

50V

R611

220K

1%
1/16W

R612
18K
1%

R609

0

R610
200

42LX6500

R614

27K

1%

R637 0

OPT

R613
0

OPT

R616 1K

R618 1K

R617 1K

C606

1uF
25V

POS1
OUT1

VDD

VFLK
VDPM

VGHM

VGH
FBP
GND

DRVP

VLCD_LCM_OUT

(+12V)

C605
1uF
50V

C690
1uF
50V

OGND

NEG1

47

48

1
2
3

CE

4
5

TPS65162RGZR

6

RE

7
8
9
10
11
12

13

14

SUP

DRVN15AGND

C607

1uF
25V

C663

C661

C667
10uF
25V

C646
10uF
25V

VDD_LCM

(+16V)

C651
10uF
25V

C669
10uF
25V

C647
10uF
25V

C652
10uF
25V

VGL(-7V)

C610

10uF

10V

R621

30K

R619
33K
1%

R620
100K
1%

1/16W

1%

C614
10uF

10V

VGH

(+24V)

R600 0

OPT

R601 0

VGH_I

(+24V)

VGH_M

(+24V)

0.47uF

D601

BAV99W_NXP

C608

50V

C609
10uF

10V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

D602-*1

ONSEMI_DIODE

VGL

(-5V)

R622
1K

1%

R628

C620

1.3K

470pF

1%

50V
OPT

007:W8;004:AN15;006:D12

DPM

R640

33

C643

10pF

OPT

DPM_VDD

006:Q12;006:S16

3D + 240 FRC + TCON BOARD

2009. 11. 13

Power Block (TCON) 6 10

VLCD_POWER

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

(+12V)

VLCD_POWER

(+12V)

R700

5.1K

+3.3V_TCON

C700

0.1uF

C701
22uF

50V

Vout = 0.6*(1+R1/R2)

16V

0.1uF

C703
22uF

16V

C704

50V

R704

510

C706

820pF

50V

C711
22uF

25V

R1

R705

R706

30K

R707

6.8K
1%

C730
22uF

L702
10uH

3.1A

25V

R735
510

C732
820pF
50V

Q700

SI4804BDY

LX1

7

6

5

4

3

2

1

24

COMP1

R728

PGND1

DL1

PGOOD1

EN2

EN1

FB1

10

G2

S2

G1

S1

R729

OPT

0

C727
2200pF

50V

R719

R718
0

C720

10uF
25V

10

PGND2

OPT

PGOOD2

COMP2

VLCD_POWER

(+12V)

DL2

VCC

FB2

13

14

15

16

17

18

C722

0.22uF
16V

R745

4.7

DH1

DH2

BST2

LX2

9

10

11

12

IC700

MAX15023ETG+T

19RT20

21IN22

SGND

LIM223LIM1

R722
27K

R723

C723

11K

1uF

50V

C724

0.22uF
16V

R746

4.7

BST1

8

R725
16K

C716

47pF

50V

4

3

2

1

G2

S2

G1

S1

C717

2200pF

50V

5

D2_1

L700

10uH

3.1A

R713

1K

1%

1%

R2

2.2

C713

2200pF

50V

D2_2

D1_1

D1_2

6

7

8

R716
10K

Q702

SI4804BDY

4

3

2

1

TCON_POWER_EN

C728

47pF
50V

5

D2_1

6

D2_2

7

D1_1

8

D1_2

001:AJ20;006:P14

R731

10K

R734

9.1K

C729

2200pF
50V

C734

0.1uF
50V

+1.8V_TCON

R1

C735
22uF
16V

C737
22uF
16V

C738

0.1uF
50V

R742

5.1K

C733

R736
1K

1%

R737
36K

Vout = 0.6*(1+R1/R2)

R738

R2

18K
1%

C708
22uF
16V

22uF
16V

R703

5.1K

HVDD

(+8V)

C702

0.1uF
50V

VLCD_POWER

(+12V)

C709

0.1uF
50V

C707

C705

22uF

22uF

16V

16V

R708

510

C710

820pF

50V

Vout = 0.592*(1+R1/R2)

C712
22uF

25V

R710

6.8K

R711
120K

1%

R712

10K

1%

C714
22uF

25V

D2_1

L701

R1

1%

10uH

3.1A

R715

2.2

C715

2200pF

50V

R2

D2_2

D1_1

D1_2

R717

10K

5

6

7

8

Q701

SI4804BDY

C718

47pF

50V

4

3

2

1

C719

2200pF

50V

R721

10

G2

S2

VLCD_POWER

C726

1uF

50V

C721

10uF

25V

(+12V)

R720

0

OPT

R726

11K

VCC

PGOOD

LIM

COMP

G1

S1

DPM_HVDD

007:Z8

MAX15026BETD+

IN

1

2

3

EN

4

5

6

FB

7

IC701

DH

14

LX

13

BST

12

DL

11

DRV

10

GND

9

RT

8

C740

2.2uF
25V

R724
27K

R748

2.2

R747

4.7

C725

0.22uF
16V

DPM

004:AN15;006:D12;006:Q5

D700

OPT

R701

22K

C731

1uF

DPM_HVDD

007:O6

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

3D + 240 FRC + TCON BOARD

2009. 11. 13

Power Block (TCON) 7 10

008:AE21;008:AL17

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

008:AE21;008:AL17

008:AE21;008:AL17

008:AE21;008:AL17

008:AE20;008:AL16

008:AE20;008:AL16

008:AE20;008:AL16

008:AE20;008:AL16

008:AE20;008:AL16

001:E19;005:AA16;008:V24;008:AL4;009:AP8

V1

V2

V3

V4

V5

V6

V7

V9

V10

I2C_SCL

P803

12507WR-04L

5

P804

12507WR-06L

7

R805 0

R822 0

R823 0

R824 0

R825 0

R826 0

R827 0

R806 0

R807 0

R808

1

2

3

4

1

2

3

4

5

6

C824

OPT

VCC_LCM
(+3.3V)

33

VCOM2

OUT1

OUT2

OUT3

OUT4

OUT5

OUT6

GNDA_1

VS_1

OUT7

OUT8

OUT9

L802

120-ohm

BUF16821AIPWPR

1

2

3

4

5

6

7

8

9

10

11

12

VSD

13

SCL

14

VLCD_POWER

IC801

E_TCK

E_TDO

E_TMS

E_TDI

VDD_LCM

(+16V)

L800

120-ohm

C804

C801

0.1uF

0.1uF
50V

50V

VCOM1

28

27

26

25

24

23

22

21

20

19

18

17

16

15

OUT16

OUT15

OUT14

GNDA_2

VS_2

OUT13

OUT12

OUT11

OUT10

GNDD

BKSEL

AO

SDA

R809 0

R810 0

R828 0

R829 0

R830 0

R831 0

R832 0

R833 0

R835

1K

1%

R811

C825
OPT

R834 0

OPT

33

10uF

10uF

25V

25V

P_VCOM

006:H14

V18

008:AE18;008:AL14

V17

008:AE18;008:AL14

V16

008:AE19;008:AL15

V15

008:AE19;008:AL15

V14

008:AE19;008:AL15

V13

008:AE19;008:AL15

V12

008:AE19;008:AL15

GAMMA_BKSEL

I2C_SDA

001:E19;005:AA15;008:V25;008:AL4;009:AP11

C803

C802

C807
10uF
25V

001:AD16

C808
10uF
25V

P802

FI-R51S-HF

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

For Shutter Glasses Sync

R801 0

R821 33

R813 0

R802 0

R803 0

OPT

For LED Sync from 3D Formatter

R804

3D_SYNC_OUT
009:AK20

I2C_SDA

001:E19;005:AA15;008:N18;008:AL4;009:AP11

I2C_SCL

001:E19;005:AA16;008:F18;008:AL4;009:AP8

FRC_RESET
001:I17

L/R_SYNC

3D_DIMMING

010:AY5

3D_DIMMING_2

010:BE5

LVRX1_AM

001:E35

LVRX1_AP

001:E35

LVRX1_BM

001:E34

LVRX1_BP

001:E34

LVRX1_CM

001:E34

LVRX1_CP

001:E34

LVRX1_CLKM

001:E35

LVRX1_CLKP

001:E35

LVRX1_DM

001:E33

LVRX1_DP

001:E34

LVRX1_EM

001:E33

LVRX1_EP

001:E33

001:AG35

LVRX2_AM

001:AG35

LVRX2_AP

001:AG34

LVRX2_BM

001:AG34

LVRX2_BP

001:AG34

LVRX2_CM

001:AG34

LVRX2_CP

001:AG35

LVRX2_CLKM

001:AG35

LVRX2_CLKP

001:AG33

LVRX2_DM

001:AG34

LVRX2_DP

001:AG33

LVRX2_EM

001:AG33

LVRX2_EP

L801

120-ohm

C805
10uF
25V

C806
10uF
25V

0

R812

0

VLCD_POWER

OPT

FPGA_VSYNC

010:AX10

VSYNC

001:AD17

[RIGHT FFC CONNECTOR]

P805

104060-8017

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80

81

C814

0.1uF
50V

HVDD

(+8V)

VDD_LCM

(+16V)

OPT_P

GOE
GSC

VCOMRFB
VCOMROUT

Z_OUT

V1
V2
V3
V4
V5
V6
V7
V9
V10
V12
V13
V14
V15
V16
V17
V18

GSP
POL

SOE_R
H_CONV
OPT_N

RLMV0P
RLMV0N
RLMV1P
RLMV1N
RLMV2P
RLMV2N

RLMVCLKP
RLMVCLKN

RLMV4P
RLMV4N
RLMV5P
RLMV5N
RLMV6P
RLMV6N

RRMV0P
RRMV0N
RRMV1P
RRMV1N
RRMV2P
RRMV2N

RRMVCLKP
RRMVCLKN

RRMV4P
RRMV4N
RRMV5P
RRMV5N
RRMV6P
RRMV6N

C815
10uF
25V

C810
10uF
25V

VGL

(-5V)

004:R10

004:AC17;008:AL12

004:AN17;008:AL12

006:H17
006:H18

008:AL14

008:F24;008:AL17
008:F24;008:AL17
008:F23;008:AL17
008:F23;008:AL17
008:F22;008:AL16
008:F22;008:AL16
008:F20;008:AL16
008:F20;008:AL16
008:F19;008:AL16
008:N20;008:AL15
008:N21;008:AL15
008:N21;008:AL15
008:N22;008:AL15
008:N23;008:AL15
008:N24;008:AL14
008:N24;008:AL14

004:AD15;008:AL18
004:AI17;008:AL18

004:AI13
004:O10;008:AL18
004:R10;008:AL19

004:V14
004:V14
004:V15
004:V15
004:V15
004:V16

004:V16
004:V17

004:V17
004:V17
004:V17
004:V18
004:V18
004:V18

004:V19
004:V19
004:V19
004:V20
004:V20
004:V20

004:V21
004:V21

004:V21
004:V22
004:V22
004:V22
004:V22
004:V23

C816

0.1uF
50V

[LEFT FFC CONNECTOR]

VCC_LCM
(+3.3V)

C817

0.01uF
50V

VGH

(+24V)

P806

104060-8017

81

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80

LLMV0P
LLMV0N
LLMV1P
LLMV1N
LLMV2P
LLMV2N

LLMVCLKP
LLMVCLKN

LLMV4P
LLMV4N
LLMV5P
LLMV5N
LLMV6P
LLMV6N

LRMV0P
LRMV0N
LRMV1P
LRMV1N
LRMV2P
LRMV2N

LRMVCLKP
LRMVCLKN

LRMV4P
LRMV4N
LRMV5P
LRMV5N
LRMV6P
LRMV6N

OPT_N
H_CONV
GSP
POL

SOE_L

V1
V2
V3
V4
V5
V6
V7
V9
V10
V12
V13
V14
V15
V16
V17
V18

Z_OUT

VCOMLOUT
VCOMLFB

GSC

004:AN17;008:AE23

GOE

004:AC17;008:AE23

C819

0.1uF
50V

005:T14
005:T14
005:T14
005:T14
005:T15
005:T15

005:T16
005:T16

005:T16
005:T16
005:T17
005:T17
005:T17
005:T17

005:T18
005:T18
005:T19
005:T19
005:T19
005:T19

005:T20
005:T20

005:T21
005:T21
005:T21
005:T21
005:T22
005:T22

004:R10;008:AE17

004:O10;008:AE17
004:AD15;008:AE18
004:AI17;008:AE18

004:AD13

008:F24;008:AE21
008:F24;008:AE21
008:F23;008:AE21
008:F23;008:AE21
008:F22;008:AE20
008:F22;008:AE20
008:F20;008:AE20
008:F20;008:AE20
008:F19;008:AE20
008:N20;008:AE19
008:N21;008:AE19
008:N21;008:AE19
008:N22;008:AE19
008:N23;008:AE19
008:N24;008:AE18
008:N24;008:AE18

008:AE22

006:D13
006:H16

VDD_LCM

(+16V)

C809

C821

10uF

10uF

25V

25V

(+24V)

VGL

(-5V)

C818

0.1uF
50V

VGH

HVDD

(+8V)

VCC_LCM

(+3.3V)

C820

0.01uF
50V

E_TCK

+3.3V

OPT

R814

0

5.6K

R815

D

FDV301N

Q801

2V5

4.7K

R817

R849

22

R818

22

C811

OPT

18pF

50V

R816

2K

G

S

TCK_FLASH

E_TDO

TCK

OPT

R819

0

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

+3.3V

For P-Gamma Data Download

P807

12505WR-04A00

OPT

5.6K

R840

D

FDV301N

Q803

2V5

4.7K

R842

R851

22

R843

22

C813

OPT

18pF

50V

R841

2K

G

S

1

TMS_FLASH

E_TDI

TMS

OPT

R844

0

+3.3V

2V5

R845

5.6K

OPT

D

FDV301N

Q804

R846

2K

G

S

4.7K

R847

R852

22

R848

22

C822

OPT

18pF

50V

TDI_FLASH

TDI

OPT

3D + 240 FRC + TCON BOARD

2V5

4.7K

R837

R850

22

R838

22

C812

OPT

18pF

50V

OPT

D

FDV301N

Q802

G

S

R836

2K

R820

5.6K

TDO_FLASH

TDO

OPT

E_TMS

+3.3V

OPT

R839

0

VDD_LCM

(+16V)

1

2

3

4

5

OPT
ZD800

5.5V

TVS

OPT
ZD801

5.5V
TVS

I2C_SCL

I2C_SDA

2009. 11. 13

8Interface 10

IC1000

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

EP3C55F484C6N

R901 100

R916 100

R903 100

R904 100

R905 100

R907 100

R909 100

R912 100

R915 100

R914 100

R934 100

R908 100

R932 100

R911 100

R936 100

R935 100

R910 100

R926 100

R943 100

R925 100

R923 100

R921 100

R918 100

R920 100

R929 100

R924 100

R927 100

R928 100

R919 100

R930 100

R931 100

R906 100

R933 100

LVTX6_CLK-

LVTX6_CLK+

LVTX7_CLK-

LVTX7_CLK+

A11

B11

D10

E10

A10

B10

A9

B9

C10

G11

A8

B8

A7

B7

A6

B6

E9

C8

C7

D8

E8

A5

B5

G10

F10

C6

D7

A4

B4

F8

G8

A3

B3

D6

E7

C3

C4

F7

G7

F9

E6

E5

G9

EP3C55F484C6N

F16

E16

F15

G16

G15

F14

C18

D18

D17

C19

D19

A20

B20

C17

B19

A19

A18

B18

D15

E15

G14

G13

A17

B17

A16

B16

C15

E14

F13

A15

B15

C13

D13

E13

A14

B14

A13

B13

E12

E11

F11

A12

B12

B8_IO[0]

B8_IO[1]

B8_IO[2]

B8_IO[3]

B8_IO[4]

B8_IO[5]

B8_IO[6]

B8_IO[7]

B8_IO[8]

B8_IO[9]

B8_IO[10]

B8_IO[11]

B8_IO[12]

B8_IO[13]

B8_IO[14]

B8_IO[15]

B8_IO[16]

B8_IO[17]

B8_IO[18]

B8_IO[19]

B8_IO[20]

B8_IO[21]

B8_IO[22]

B8_IO[23]

B8_IO[24]

B8_IO[25]

B8_IO[26]

B8_IO[27]

B8_IO[28]

B8_IO[29]

B8_IO[30]

B8_IO[31]

B8_IO[32]

B8_IO[33]

B8_IO[34]

B8_IO[35]

B8_IO[36]

B8_IO[38]

B8_IO[39]

B8_IO[40]

B8_IO[41]

B8_IO[42]

B8_IO[43]

IC1000

B7_IO[0]

B7_IO[1]

B7_IO[2]

B7_IO[3]

B7_IO[4]

B7_IO[5]

B7_IO[6]

B7_IO[7]

B7_IO[8]

B7_IO[9]

B7_IO[10]

B7_IO[11]

B7_IO[12]

B7_IO[13]

B7_IO[14]

B7_IO[15]

B7_IO[16]

B7_IO[17]

B7_IO[18]

B7_IO[19]

B7_IO[20]

B7_IO[21]

B7_IO[22]

B7_IO[23]

B7_IO[24]

B7_IO[25]

B7_IO[26]

B7_IO[27]

B7_IO[28]

B7_IO[29]

B7_IO[30]

B7_IO[31]

B7_IO[32]

B7_IO[33]

B7_IO[34]

B7_IO[35]

B7_IO[36]

B7_IO[37]

B7_IO[38]

B7_IO[39]

B7_IO[40]

CLK8

CLK9

R1904 100

R1905 100

LVTX8_CLK+

LVTX8_CLK-

/RESET2V5

CONFIG_DONE

2V5

1V2

LVTX5_CLK-

LVTX5_CLK+

LVTX6_E-

LVTX6_E+

LVTX5_A-

LVTX5_A+

LVTX5_B-

LVTX5_B+

LVTX5_C-

LVTX5_C+

LVTX5_E-

LVTX5_E+

LVTX6_A-

LVTX6_A+

LVTX7_A-

LVTX7_A+

LVTX6_D-

LVTX6_D+

LVTX7_B-

LVTX7_B+

LVTX7_C-

LVTX7_C+

LVTX6_B-

LVTX6_B+

LVTX8_A-

LVTX8_A+

LVTX6_C-

LVTX6_C+

LVTX7_D-

LVTX7_D+

LVTX7_E-

LVTX7_E+

LVTX8_C-

LVTX8_C+

LVTX1_CLK-

R1901 100

LVTX1_CLK+

LVTX2_CLK-

R1902 100

LVTX2_CLK+

LVTX3_CLK-

R1903 100

LVTX3_CLK+

LVTX2_E-

LVTX2_E+

LVTX2_A-

LVTX2_A+

LVTX3_A-

LVTX3_A+

LVTX2_D-

LVTX2_D+

LVTX2_C-

LVTX2_C+

VS_STATUS2V5

SDA2V5

SCL2V5

LVTX3_D-

LVTX3_D+

LVTX3_B-

LVTX3_B+

LVTX4_E-

LVTX4_E+

LVTX3_E-

LVTX3_E+

LVTX4_A-

LVTX4_A+

LVTX4_B-

LVTX4_B+

LVTX3_C-

LVTX3_C+

LVTX4_C-

LVTX4_C+

LVTX4_D-

LVTX4_D+

LVTX5_D-

LVTX5_D+

LVTX4_CLK-

LVTX4_CLK+

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

TD2+

TD2-

LVTX8_D+

LVTX8_D-

LVTX8_B+

LVTX8_B-

LVTX8_E+

LVTX8_E-

ASDO

TA2+

TA2-

TB2+

TB2-

/CSO

TE2+

TE2-

/STATUS

TE1+

TE1-

TCLK2+

TCLK2-

TC2+

TC2-

DCLK

DATA0

/CONFIG

TDI

TCK

TMS

TDO

/CE

SYSCLK

MSEL[0]

MSEL[1]

MSEL[2]

MSEL[3]

TB6-

TB6+

TA6-

TA6+

TE5-

TE5+

TCLK5-

TCLK5+

TD5-

TD5+

LVTX1_A-

LVTX1_A+

TC5-

TC5+

TB5-

TB5+

LVTX1_B-

LVTX1_B+

LVTX1_C-

LVTX1_C+

TA5-

TA5+

LVTX1_D-

LVTX1_D+

LVTX1_E-

LVTX1_E+

LVTX2_B-

LVTX2_B+

2V5 1V2

R913 100

R902 100

R917 100

R937 100

R938 100

R939 100

R940 100

R941 100

R942 100

R922 100

2V5

L902

+3.3V

R1914

R1919

C

E

5.6K

5.6K

/3D_FPGA_RESET

R1929

B

2V5+3.3V

R1922

5.6K

G

D

FDV301N

Q905

OPT

R1915

0

R1927

OPT

R1920

0

R1926
0

BLM18PG121SN1D

C917
10uF
16V

NCS

DATA

VCC

GND

+3.3V

10K

R1930

10K

C

Q907

2SC3052

E

R19232KR1924

S

0

OPT

OPT

C919

0.1uF
16V

IC904

EPCS16SI8N_

1

2

3

4

R1931

B

10K

OPT

4.7K

I2C_SDA

FPGA_SDA

I2C_SCL

FPGA_SCL

C920
100pF
50V

VCC_2

8

VCC_1

7

6

5

R967

DCLK

22

R968

ASDI

22

FPGA Reset Level Shifter (3.3V to 2.5V)

/3D_FPGA_RESET

R1932

R1925

22

R1906

10K

VS_STATUS2V5

OPT

VS_STATUS2V5

R1907

C921
10pF

B

EJTAG_TO_FLASH

EJTAG_TO_FLASH

+3.3V

10K

C

Q901
2SC3052

E

R947
0

TCK_FLASH

DCLK

ASDO

R956
0

TDO_FLASH

2V5

R1909

4.7K

C

R1908

B

Q902
2SC3052

10K

E

1V2

2V5

2V5

C905

0.1uF
16V

EP3C55F484C6N

T2

T1

L6

M6

M2

M1

M4

M3

N2

N1

M5

P2

P1

R2

R1

N5

P4

P3

U2

U1

V2

V1

P5

N6

R4

R3

W2

W1

Y2

Y1

T3

N7

P7

AA2

AA1

V4

V3

P6

R5

T4

T5

R6

T6

U5

U6

2V5 1V2

C906

0.1uF
16V

EP3C55F484C6N

1V2

V17

V18

U18

AA22

AA21

T17

T18

W20

W19

Y22

Y21

U20

U19

W22

W21

T20

T19

R17

P17

V22

V21

R20

U22

U21

R18

R19

N16

R22

R21

P20

P22

P21

N20

N19

N17

N18

N22

N21

M22

M21

M20

M19

M16

T22

T21

C907

0.1uF
16V

IC1000

CLK2

CLK3

B2_IO[0]

B2_IO[1]

B2_IO[2]

B2_IO[3]

B2_IO[4]

B2_IO[5]

B2_IO[6]

B2_IO[7]

B2_IO[8]

B2_IO[9]

B2_IO[10]

B2_IO[11]

B2_IO[12]

B2_IO[13]

B2_IO[14]

B2_IO[15]

B2_IO[16]

B2_IO[17]

B2_IO[18]

B2_IO[19]

B2_IO[20]

B2_IO[21]

B2_IO[22]

B2_IO[23]

B2_IO[24]

B2_IO[25]

B2_IO[26]

B2_IO[27]

B2_IO[28]

B2_IO[29]

B2_IO[30]

B2_IO[31]

B2_IO[32]

B2_IO[33]

B2_IO[34]

B2_IO[35]

B2_IO[36]

B2_IO[37]

B2_IO[38]

B2_IO[39]

VCCA1

GNDA1

VCCD_PLL1

C908

0.1uF
16V

IC1000

VCCD_PLL4

GNDA4

VCCA4

B5_IO[0]

B5_IO[1]

B5_IO[2]

B5_IO[3]

B5_IO[4]

B5_IO[5]

B5_IO[6]

B5_IO[7]

B5_IO[8]

B5_IO[9]

B5_IO[10]

B5_IO[11]

B5_IO[12]

B5_IO[13]

B5_IO[14]

B5_IO[15]

B5_IO[16]

B5_IO[17]

B5_IO[18]

B5_IO[19]

B5_IO[20]

B5_IO[21]

B5_IO[22]

B5_IO[23]

B5_IO[24]

B5_IO[25]

B5_IO[26]

B5_IO[27]

B5_IO[28]

B5_IO[29]

B5_IO[30]

B5_IO[31]

B5_IO[32]

B5_IO[33]

B5_IO[34]

B5_IO[35]

B5_IO[36]

B5_IO[37]

B5_IO[38]

B5_IO[39]

CLK7

CLK6

1V22V5

C901

C903

0.1uF

0.1uF

16V

16V

IC1000

EP3C55F484C6N

F6

VCCD_PLL3

F5

GNDA3

G6

VCCA3

G4

B1_IO[0]

G3

B1_IO[1]

B2

B1_IO[2]

B1

B1_IO[3]

G5

B1_IO[4]

E4

B1_IO[5]

E3

B1_IO[6]

C2

B1_IO[7]

C1

B1_IO[8]

D2

B1_IO[9]

D1

B1_IO[10]

H7

B1_IO[11]

H6

B1_IO[12]

J6

B1_IO[13]

H4

B1_IO[14]

H3

B1_IO[15]

E2

B1_IO[16]

E1

B1_IO[17]

F2

B1_IO[18]

F1

B1_IO[19]

J5

B1_IO[20]

H5

B1_IO[21]

K6

nSTATUS

J7

B1_IO[22]

K7

B1_IO[23]

J4

B1_IO[24]

H2

B1_IO[25]

H1

B1_IO[26]

J3

B1_IO[27]

J2

B1_IO[28]

J1

B1_IO[29]

K2

DCLK

K1

B1_IO[30]

K5

nCONFIG

L5

TDI

L2

TCK

L1

TMS

L4

TDO

L3

nCE

G2

CLK0

G1

CLK1

1V2

2V5

C904

C902

0.1uF

0.1uF
16V

16V

IC1000

EP3C55F484C6N

G22

CLK5

G21

CLK4

M18

CONF_DONE

M17

MSEL0

L18

MSEL1

L17

MSEL2

K20

MSEL3

L22

B6_IO[0]

L21

B6_IO[1]

K19

B6_IO[2]

K22

B6_IO[3]

K21

B6_IO[4]

J22

B6_IO[5]

J21

B6_IO[6]

H22

B6_IO[7]

H21

B6_IO[8]

K17

B6_IO[9]

K18

B6_IO[10]

J18

B6_IO[11]

F22

B6_IO[12]

F21

B6_IO[13]

J20

B6_IO[14]

J19

B6_IO[15]

J17

B6_IO[16]

H20

B6_IO[17]

H19

B6_IO[18]

E22

B6_IO[19]

E21

B6_IO[20]

H18

B6_IO[21]

H16

B6_IO[22]

D22

B6_IO[23]

D21

B6_IO[24]

F20

B6_IO[25]

F19

B6_IO[26]

G18

B6_IO[27]

H17

B6_IO[28]

C22

B6_IO[29]

C21

B6_IO[30]

B22

B6_IO[31]

B21

B6_IO[32]

C20

B6_IO[33]

D20

B6_IO[34]

F17

B6_IO[35]

G17

B6_IO[36]

F18

VCCA2

E18

GNDA2

E17

VCCD_PLL2

TC1+

TC1-

TCLK1+

TCLK1-

TD1+

TD1-

TE4+

TE4-

TD4+

TD4-

TB4+

TB4-

TB1+

TB1-

TE3+

TE3-

TD3+

TD3-

TA1+

TA1-

TA4+

TA4-

TCLK3+

TCLK3-

TB3+

TB3-

TC3+

TC3-

TA3+

TA3-

TCLK4+

TCLK4-

2V51V2

TC4+

TC4-

TE8-

TE8+

TD8-

TD8+

TE7-

TE7+

TCLK8-

TCLK8+

TA8-

TA8+

TD7-

TD7+

TC8-

TC8+

TB8-

TB8+

TCLK7-

TCLK7+

TC7-

TC7+

TB7-

TB7+

TD6-

TD6+

TE6-

TE6+

TA7-

TA7+

TC6-

TC6+

TCLK6-

TCLK6+

2V5

R944

10K

TRISTATE/OPEN

X901

54.0000MHz
4

1

GND3OUTPUT

2

CONFIG_DONE

/STATUS

/CONFIG

/CE

OPT

SW901

JTP-1127WEM

1 2

43

VDD

C909

0.1uF
16V

R949
22

SYSCLK

TMS_FLASH

2V5

R950
10K

R951
10K

R952
10K

R953
1K

OPT

+3.3V

OPT

R954

1K

OPT
R948
330

OPT

C911

0.1uF
16V

I

IC901

KIA7029AF

OPT

2

TDI_FLASH

3O1

G

/CSO

DATA0

OPT

R958

4.7K

EJTAG_TO_FLASH

R945
0

R946
0

EJTAG_TO_FLASH

OPT
R959
0

OPT

C914

0.1uF
16V

/FPGA_RESET

R964
22

R965
27

R963
0

IR Emitter Vsync Level Shift (2.5V to 3.3V)

3.3K

R1928

22

Q906

2K

2K

C915
18pF
50V

2V5 +3.3V

R1913

FDV301N

Q903

2V5 +3.3V

R1918

FDV301N

Q904

2SC3052

R1921

OPT

22

2K

G

D

S

2K

G

D

S

3D_SYNC_OUT

SDA2V5

SCL2V5

R955
0

OPT

FPGA I2C Level Shift (3.3V <-> 2.5V)

R1912

R1911

22
C910
18pF

OPT

50V

R1917

R1916

22
C913
18pF

OPT

50V

P901

12505WR-10

11

R1910
22

/RESET2V5

SMD Gasket - 4.5T (8x6)

GAS1

MDS62110208

GAS1_4.5T(8x6)

GAS5

MDS62110208

GAS5_4.5T(8x6)

GAS9

MDS62110208

GAS9_4.5T(8x6)

SMD Gasket - 4.5T (8x5)

GAS1-*1

MDS62110201

GAS1_4.5T(8x5)

GAS5-*1

MDS62110201

GAS5_4.5T(8x5)

GAS9-*1

MDS62110201

GAS9_4.5T(8x5)

SMD Gasket - 5.5T (8x6)

GAS1-*2

MDS62110204

GAS1_5.5T(8x6)

GAS5-*2

MDS62110204

GAS5_5.5T(8x6)

GAS9-*2

MDS62110204

GAS9_5.5T(8x6)

1

2

3

4

5

6

7

8

9

10

FPGA_D/L_CTRL

R991 1K

OPT

16V

C924

0.1uF

R2239

0

/CONFIG

GAS2

MDS62110208

GAS2_4.5T(8x6)

GAS6

MDS62110208

GAS6_4.5T(8x6)

GAS10

MDS62110208

GAS10_4.5T(8x6)

GAS2-*1

MDS62110201

GAS2_4.5T(8x5)

GAS6-*1

MDS62110201

GAS6_4.5T(8x5)

GAS10-*1

MDS62110201

GAS10_4.5T(8x5)

GAS2-*2

MDS62110204

GAS2_5.5T(8x6)

GAS6-*2

MDS62110204

GAS6_5.5T(8x6)

GAS10-*2

MDS62110204

GAS10_5.5T(8x6)

2V5

R992

FPGA DOWNLOAD CONTROL

R2236

10K

MSEL[3]
MSEL[2]
MSEL[1]
MSEL[0]

GAS3

MDS62110208

GAS3_4.5T(8x6)

GAS7

MDS62110208

GAS7_4.5T(8x6)

GAS11

MDS62110208

GAS11_4.5T(8x6)

GAS3-*1

MDS62110201

GAS3_4.5T(8x5)

GAS7-*1

MDS62110201

GAS7_4.5T(8x5)

GAS11-*1

MDS62110201

GAS11_4.5T(8x5)

GAS3-*2

MDS62110204

GAS3_5.5T(8x6)

GAS7-*2

MDS62110204

GAS7_5.5T(8x6)

GAS11-*2

MDS62110204

GAS11_5.5T(8x6)

1K

R993

1K

R994

R2237

B

GAS4_4.5T(8x6)

GAS8_4.5T(8x6)

GAS12_4.5T(8x6)

R995

22

R996

22

R997

22

22

2V5

4.7K
R2238

C

Q908
2SC3052

E

R982

AR90 1

1/16 W

22

R9831KR989

GAS4

MDS62110208

GAS8

MDS62110208

GAS12

MDS62110208

GAS4-*1

MDS62110201

GAS4_4.5T(8x5)

GAS8-*1

MDS62110201

GAS8_4.5T(8x5)

GAS12-*1

MDS62110201

GAS12_4.5T(8x5)

GAS4-*2

MDS62110204

GAS4_5.5T(8x6)

GAS8-*2

MDS62110204

GAS8_5.5T(8x6)

GAS12-*2

MDS62110204

GAS12_5.5T(8x6)

TCK

TDO

TMS

TDI

22

/CE

2V5

OPT

OPT

OPT

R988

0

R986

4.7K

0

R984

0

OPT

1K

R987

0

R985

1K

3D + 240 FRC + TCON BOARD 2009. 11. 13

EP3C55_C6N (FPGA IC) 109

DDR_A[12-0]

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

DDR2_CLK

/DDR2_CLK

DDR_BA[0]
DDR_BA[1]

R1001

DDR2_CKE

DDR2_ODT
/DDR_CS
/DDR_RAS
/DDR_CAS
/DDR_WE

DDR_LDQS[0]
DDR_UDQS[0]

DDR_LDM[0]
DDR_UDM[0]

100

C1028

0.1uF
16V

DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[6]

DDR_A[12-0]

DDR_A[7]
DDR_A[8]
DDR_A[9]
DDR_A[10]
DDR_A[11]
DDR_A[12]

R1007 33

R1008 33

DDR_VREF1

C1031
470pF
50V

R1009 1K

R1010 1K

H5PS5162FFR-S6C

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC4

L1

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

IC1002

1V2

AR1005

SDDR_DQ[21]
SDDR_DQ[18]
SDDR_DQ[16]
SDDR_DQ[23]

33

AR1006

SDDR_DQ[29]
SDDR_DQ[26]
SDDR_DQ[24]
SDDR_DQ[31]

33

AR1007

SDDR_DQ[30]
SDDR_DQ[25]
SDDR_DQ[28]
SDDR_DQ[27]

33

AR1008

SDDR_DQ[22]
SDDR_DQ[17]
SDDR_DQ[19]
SDDR_DQ[20]

33

DDR_DQ[31-16]

1V8

C1042
100pF

50V

DDR_DQ[21]
DDR_DQ[18]
DDR_DQ[16]
DDR_DQ[23]

DDR_DQ[29]
DDR_DQ[26]
DDR_DQ[24]
DDR_DQ[31]

DDR_DQ[30]
DDR_DQ[25]
DDR_DQ[28]
DDR_DQ[27]

DDR_DQ[22]
DDR_DQ[17]
DDR_DQ[19]
DDR_DQ[20]

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

A1
E1
J9
M9
R1

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A3
E3
J3
N1
P9

B2
B8
A7
D2
D8
E7
F2
F8
H2
H8

DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VDD5
VDD4
VDD3
VDD2
VDD1

VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1

VSS5
VSS4
VSS3
VSS2
VSS1

VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1

DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]

1V8

DDR_DQ[16]

DQ0

SDDR_DQ[31-16]

C1047
10uF
16V

C1050

0.1uF
16V

C1053
100pF
50V

EP3C55F484C6N

J11

J12

L14

M14

P11

P12

L9

M9

J13

J14

K14

J10

K9

N9

P9

P10

P13

P14

N14

J16

K15

L16

M15

R12

R10

R8

H9

G12

J8

M8

T7

T9

T13

P15

H15

H11

K8

L7

IC1000

VCCINT[0]

VCCINT[1]

VCCINT[2]

VCCINT[3]

VCCINT[4]

VCCINT[5]

VCCINT[6]

VCCINT[7]

VCCINT[8]

VCCINT[9]

VCCINT[10]

VCCINT[11]

VCCINT[12]

VCCINT[13]

VCCINT[14]

VCCINT[15]

VCCINT[16]

VCCINT[17]

VCCINT[18]

VCCINT[19]

VCCINT[20]

VCCINT[21]

VCCINT[22]

VCCINT[23]

VCCINT[24]

VCCINT[25]

VCCINT[26]

VCCINT[27]

VCCINT[28]

VCCINT[29]

VCCINT[30]

VCCINT[31]

VCCINT[32]

VCCINT[33]

VCCINT[34]

VCCINT[35]

VCCINT[36]

VCCINT[37]

VCCIO1[0]

VCCIO1[1]

VCCIO1[2]

VCCIO2[0]

VCCIO2[1]

VCCIO2[2]

VCCIO3[0]

VCCIO3[1]

VCCIO3[2]

VCCIO3[3]

VCCIO4[0]

VCCIO4[1]

VCCIO4[2]

VCCIO4[3]

VCCIO5[0]

VCCIO5[1]

VCCIO5[2]

VCCIO6[0]

VCCIO6[1]

VCCIO6[2]

VCCIO7[0]

VCCIO7[1]

VCCIO7[2]

VCCIO7[3]

VCCIO8[0]

VCCIO8[1]

VCCIO8[2]

VCCIO8[3]

2V5

D4

F4

C1066

C1068

C1070

100pF

0.1uF

C1067
100pF

10uF

50V

16V

16V

1V8

C1069

C1071

0.1uF

10uF

16V

16V

50V

2V5

K4

N4

U4

W4

AB2

W5

W9

W11

AB21

W12

W16

W18

P18

V19

Y19

E19

G19

L19

A21

D12

D14

D16

A2

D5

D9

D11

EP3C55F484C6N

L10

L11

M10

M11

L12

L13

M12

M13

N11

K11

N12

K12

K13

N13

N10

K10

J9

F12

H12

H13

J15

K16

L15

N15

R13

R11

R9

P8

H14

H10

H8

N8

R7

T8

T12

P16

L8

M7

A1

C5

C9

C11

IC1000

GND[0]

GND[1]

GND[2]

GND[3]

GND[4]

GND[5]

GND[6]

GND[7]

GND[8]

GND[9]

GND[10]

GND[11]

GND[12]

GND[13]

GND[14]

GND[15]

GND[16]

GND[17]

GND[18]

GND[19]

GND[20]

GND[21]

GND[22]

GND[23]

GND[24]

GND[25]

GND[26]

GND[27]

GND[28]

GND[29]

GND[30]

GND[31]

GND[32]

GND[33]

GND[34]

GND[35]

GND[36]

GND[37]

GND[38]

GND[39]

GND[40]

GND[41]

GND[42]

GND[43]

GND[44]

GND[45]

GND[46]

GND[47]

GND[48]

GND[49]

GND[50]

GND[51]

GND[52]

GND[53]

GND[54]

GND[55]

GND[56]

GND[57]

GND[58]

GND[59]

GND[60]

GND[61]

GND[62]

GND[63]

GND[64]

GND[65]

C12

C14

C16

A22

E20

G20

L20

P19

V20

Y20

AB22

Y18

Y16

Y12

Y11

Y9

Y5

AB1

N3

U3

W3

D3

F3

K3

DDR_VREF0

C1006

C1004

470pF

0.1uF
50V

16V

DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[6]

DDR_A[12-0]

DDR_A[7]
DDR_A[8]
DDR_A[9]
DDR_A[10]
DDR_A[11]
DDR_A[12]

100

R1002 33

R1003 33

R1004 1K

R1005 1K

H5PS5162FFR-S6C

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC4

L1

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

IC1001

SDDR_DQ[15-0]

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

A1
E1
J9
M9
R1

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A3
E3
J3
N1
P9

B2
B8
A7
D2
D8
E7
F2
F8
H2
H8

DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VDD5
VDD4
VDD3
VDD2
VDD1

VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1

VSS5
VSS4
VSS3
VSS2
VSS1

VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1

DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]

DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]

1V8

DDR_DQ[15-0]

1V8

C1019
100pF

50V

DDR_DQ[5]
DDR_DQ[2]
DDR_DQ[0]
DDR_DQ[7]

DDR_DQ[13]
DDR_DQ[10]
DDR_DQ[8]
DDR_DQ[15]

DDR_DQ[14]
DDR_DQ[9]
DDR_DQ[12]
DDR_DQ[11]

DDR_DQ[6]
DDR_DQ[1]
DDR_DQ[3]
DDR_DQ[4]

AR1001

SDDR_DQ[5]
SDDR_DQ[2]
SDDR_DQ[0]
SDDR_DQ[7]

33

AR1002

SDDR_DQ[13]
SDDR_DQ[10]

SDDR_DQ[8]

SDDR_DQ[15]

33

AR1003

SDDR_DQ[14]

SDDR_DQ[9]
SDDR_DQ[12]
SDDR_DQ[11]

33

AR1004

SDDR_DQ[6]

SDDR_DQ[1]

SDDR_DQ[3]

SDDR_DQ[4]

33

DDR_DQ[0]

DQ0

DDR_A[12-0]

DDR2_CLK

/DDR2_CLK

DDR_BA[0]
DDR_BA[1]

DDR2_CKE

DDR2_ODT
/DDR_CS
/DDR_RAS
/DDR_CAS
/DDR_WE

DDR_LDQS[1]
DDR_UDQS[1]

DDR_LDM[1]
DDR_UDM[1]

R1006

1V8

C1001
10uF
16V

SDDR_DQ[15-0]

C1002

0.1uF
16V

C1003

0.1uF
16V

C1005

0.1uF
16V

SDDR_DQ[14]

SDDR_DQ[9]

SDDR_DQ[8]

SDDR_DQ[15]

SDDR_DQ[12]

SDDR_DQ[13]

SDDR_DQ[10]

SDDR_DQ[11]

SDDR_DQ[4]

SDDR_DQ[1]

SDDR_DQ[3]

SDDR_DQ[6]

SDDR_DQ[7]

SDDR_DQ[2]

SDDR_DQ[0]

SDDR_DQ[5]

C1007

0.1uF
16V

DDR_UDQS[0]

/DDR_CAS

DDR_A[11]

DDR_LDM[0]

DDR_LDQS[0]

DDR_A[1]

DDR_A[9]

/DDR_RAS

DDR_A[0]

DDR_A[2]

DDR2_ODT

/DDR_CS

DDR_A[4]

DDR2_CLK

/DDR2_CLK

DDR_A[8]

DDR_A[6]

DDR_A[5]

FPGA_VSYNC_1V8

C1008

0.1uF
16V

C1009

0.1uF
16V

C1010

0.1uF
16V

C1011
470pF
50V

C1012

0.1uF
16V

DDR_VREF0

C1013

0.1uF
16V

C1014

0.1uF
16V

EP3C55F484C6N

AA12

AB12

AA13

AB13

AA14

AB14

V12

W13

Y13

AA15

AB15

U12

Y14

Y15

AA16

AB16

V13

W14

U13

V14

U14

U15

V15

W15

T14

T15

AB18

AA17

AB17

AA18

AA19

AB19

W17

Y17

AA20

AB20

V16

U16

U17

T16

R16

R14

R15

IC1000

CLK13

CLK12

B4_IO[0]

B4_IO[1]

B4_IO[2]

B4_IO[3]

B4_IO[4]

B4_IO[5]

B4_IO[6]

B4_IO[7]

B4_IO[8]

B4_IO[9]

B4_IO[10]

B4_IO[11]

B4_IO[12]

B4_IO[13]

B4_IO[14]

B4_IO[15]

B4_IO[16]

B4_IO[17]

B4_IO[18]

B4_IO[19]

B4_IO[20]

B4_IO[21]

B4_IO[22]

B4_IO[23]

B4_IO[24]

B4_IO[25]

B4_IO[26]

B4_IO[27]

B4_IO[28]

B4_IO[29]

B4_IO[30]

B4_IO[31]

B4_IO[32]

B4_IO[33]

B4_IO[34]

B4_IO[35]

B4_IO[36]

B4_IO[37]

B4_IO[38]

B4_IO[39]

B4_IO[40]

C1015

0.1uF
16V

C1016

0.1uF
16V

C1017

0.1uF
16V

C1018

0.1uF
16V

C1020

0.1uF
16V

C1021

0.1uF
16V

C1022

0.1uF
16V

C1023

0.1uF

16V

SDDR_DQ[31-16]

C1051

0.1uF
16V

C1052

0.1uF
16V

AR1009

AR1010

AR1011

AR1012

AR1013

R1011
56

C1054

0.1uF
16V

C1055

0.1uF
16V

DDR_VTT

56

56

56

56

56

C1056

0.1uF
16V

C1057

0.1uF
16V

L/R_SYNC_FRC_OUT

C1058

0.1uF
16V

C1059

0.1uF
16V

L/R_SYNC

56
AR10 14

56
AR10 15

56
AR10 16

56
AR10 17

56
AR10 18

R1012

1V2

DDR2_ODT

/DDR_CS
DDR_A[0]
DDR_A[2]

DDR_A[4]
DDR_A[6]
DDR_A[8]

DDR_A[11]

/DDR_CAS
/DDR_RAS

DDR_A[1]
DDR_A[5]

DDR_A[9]

DDR_A[12]

DDR_A[7]
DDR_A[3]

DDR_BA[0]
DDR_BA[1]

DDR2_CKE

56

DDR_A[10]

C1064

C1060

0.1uF
16V

C1061

0.1uF
16V

R1023

R1028

C1062

0.1uF
16V

C1063

0.1uF
16V

C1065

0.1uF

0.1uF

16V

16V

+3.3V

R1024

10K

R1025

C

OPT

B

Q1005
2SC3052

10K

E

10K

C1072

0.1uF
16V

1V2

C1073

0.1uF
16V

1V8

R1026

3.3K
R1027
22

C

B

Q1006
2SC3052

10K

E

C1077

0.1uF
16V

C1078

0.1uF
16V

C1082

0.1uF
16V

C1083

0.1uF
16V

3D_FRAME_INFO

L/R_SYNC_1V8

FPGA_D/L_CTRL

C1087

0.1uF
16V

C1088

0.1uF
16V

C1092

0.1uF
16V

C1093

0.1uF
16V

R1013

10K

R1029

C1097

0.1uF
16V

C1098

0.1uF
16V

R1014

B

R1030

OPT

10K

OPT

C2012

C2002

C2007

C2016

0.1uF

0.1uF

0.1uF

0.1uF

16V

16V

16V

16V

C2008

C2003

C2013

0.1uF

0.1uF

0.1uF

16V

16V

16V

3D Frame Info Level Shift (3.3V to 1.8V)

FPGA V-SYNC Level Shift (1.8V to 3.3V)

C

E

10K

R1015

Q1001
2SC3052

10K

C

Q1007
2SC3052

E

10K

R1031

OPT

1V8

R1016

3.3K
R1017
22

C

Q1002

B

2SC3052

E

1V8

R1032

3.3K

OPT

C

Q1008

B

2SC3052

10K

OPT

OPT

E

+3.3V

+3.3V

B

FPGA_VSYNC_1V8

R1033
22

OPT

3D_DIMMING_1V8

2V5

C1074

0.1uF
16V

2V5

C1075

0.1uF
16V

1V8

C1076

0.1uF
16V

FRAME_INFO_1V8

LVDS_STABLE_1V8

R1018

R1022
22

C

E

C2004

0.1uF
16V

C2005

0.1uF
16V

C2006

0.1uF
16V

1K

Q1010
2SC3052

R1038
22

C2009

0.1uF
16V

C2010

0.1uF
16V

C2011

0.1uF
16V

C2014

C2017

0.1uF

0.1uF

16V

16V

C2018

C2015

0.1uF

0.1uF
16V

16V

FPGA_VSYNC

3D_DIMMING

3D_DIMMING_2_1V8

R1039

+3.3V+3.3V

10K

C

E

R1041

Q1011
2SC3052

R1042

1K

R1043
22

C

Q1012

B

2SC3052

10K

E

3D_DIMMING_2

R1040

B

10K

C1079

0.1uF
16V

C1080

0.1uF
16V

C1081

0.1uF
16V

10K

R1034

10K

R1019

C1084

0.1uF
16V

C1085

0.1uF
16V

C1086

0.1uF
16V

B

+3.3V

R1035

C

E

B

10K

Q1003
2SC3052

C1089

0.1uF
16V

C1090

0.1uF
16V

C1091

0.1uF
16V

+3.3V

R1020

C1094

C1099

0.1uF

0.1uF

16V

16V

C1095

C2000

0.1uF

0.1uF

16V

16V

C1096

C2001

0.1uF

0.1uF

16V

16V

+3.3V

R1021

1K

C

B

Q1004
2SC3052

10K

E

+3.3V

R1037

10K

R1036

B

10K

C

Q1009
2SC3052

E

1V8

C1024

0.1uF
16V

C1025

0.1uF
16V

LVDS_STABLE_1V8

3D_DIMMING_1V8

SDDR_DQ[20]

SDDR_DQ[22]

SDDR_DQ[19]

SDDR_DQ[17]

SDDR_DQ[21]

SDDR_DQ[18]

SDDR_DQ[23]

SDDR_DQ[16]

SDDR_DQ[27]

SDDR_DQ[25]

3D_DIMMING_2_1V8

FRAME_INFO_1V8

SDDR_DQ[26]

SDDR_DQ[30]

SDDR_DQ[28]

SDDR_DQ[31]

SDDR_DQ[29]

SDDR_DQ[24]

C1026

0.1uF
16V

C1027

0.1uF
16V

DDR_LDM[1]

L/R_SYNC_1V8

/DDR_WE

DDR_BA[0]

DDR2_CKE

DDR_BA[1]

DDR_A[10]

DDR_A[3]

DDR_UDM[1]

DDR_LDQS[1]

DDR_UDQS[1]

DDR_A[12]

DDR_UDM[0]

DDR_A[7]

C1029

0.1uF
16V

C1030
470pF
50V

C1032

0.1uF
16V

C1033

0.1uF
16V

DDR_VREF1

C1034

0.1uF
16V

V6

V5

U7

U8

Y4

Y3

Y6

AA3

AB3

W6

V7

AA4

AB4

AA5

AA6

AB6

AB5

W7

Y7

U9

V8

W8

AA7

AB7

Y8

T10

T11

V9

V10

U10

AA8

AB8

AA9

AB9

U11

V11

W10

Y10

AA10

AB10

AA11

AB11

C1035

C1036

0.1uF

0.1uF

16V

16V

IC1000

EP3C55F484C6N

B3_IO[0]

B3_IO[1]

B3_IO[2]

B3_IO[3]

B3_IO[4]

B3_IO[5]

B3_IO[6]

B3_IO[7]

B3_IO[8]

B3_IO[9]

B3_IO[10]

B3_IO[11]

B3_IO[12]

B3_IO[13]

B3_IO[14]

B3_IO[15]

B3_IO[16]

B3_IO[17]

B3_IO[18]

B3_IO[19]

B3_IO[20]

B3_IO[21]

B3_IO[22]

B3_IO[23]

B3_IO[24]

B3_IO[25]

B3_IO[26]

B3_IO[27]

B3_IO[28]

B3_IO[29]

B3_IO[30]

B3_IO[31]

B3_IO[32]

B3_IO[33]

B3_IO[34]

B3_IO[35]

B3_IO[36]

B3_IO[37]

B3_IO[38]

B3_IO[39]

CLK15

CLK14

C1037

0.1uF
16V

C1038

0.1uF
16V

C1039

0.1uF
16V

C1040

0.1uF
16V

C1041

0.1uF
16V

C1043

0.1uF
16V

C1044

DDR2_ODT

0.1uF
/DDR_CS

16V

DDR_A[0]
DDR_A[2]

DDR_A[4]
DDR_A[6]
DDR_A[8]
DDR_A[11]

/DDR_CAS
/DDR_RAS

DDR_A[1]
DDR_A[5]

DDR_A[9]
DDR_A[12]
DDR_A[7]
DDR_A[3]

DDR_BA[0]
DDR_BA[1]
DDR2_CKE

/DDR_WE /DDR_WE

DDR_A[10]

DDR_VTT

C1048

C1045

0.1uF

0.1uF
16V

16V

DDR_VTT

C1049

C1046

0.1uF

0.1uF
16V

16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

3D + 240 FRC + TCON BOARD

2009. 11. 13

10DDR2 10