LG 42LT777H Schematic

Page 1
Internal Use Only
LED LCD TV
SERVICE MANUAL
CHASSIS : LA2FZ
MODEL : 42LT777H 42LT777H-UA
CAUTION
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
Printed in KoreaP/NO : MFL67603807 (1308-REV00)
Page 2
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 4
ADJUSTMENT INSTRUCTION ................................................................ 9
TROUBLESHOOTING ............................................................................. 25
BLOCK DIAGRAM .................................................................................. 26
EXPLODED VIEW .................................................................................. 27
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Only for training and service purposes
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LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 3
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.
It will also protect the receiver and it's components from being damage d by accidental sho rt s of the circuitr y th at may be inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 MΩ and 5.2 MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check. Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic par t. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Only for training and service purposes
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Page 4
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
1. Application range
This spec sheet is applied Commercial LCD TV with LA2FZ chassis
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC: CE, IEC specification
2. Test condition
Each part is tested as below without special notice.
1) Temperature : 20 ºC ± 5 ºC
2) Relative Humidity: 65 % ± 10 %
3) Power Voltage : Standard input voltage (AC 110-240 V~, 50/60 Hz) * Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
ea ch dr awi ng an d spe cif icat ion by pa rt nu mbe r in accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
4. General Specification
No Item Specication Remark
1 Receiving System 1) ATSC / NTSC-M, 64 & 256 QAM
2 Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
5) CADTV : 01~135
3 Input Voltage 1) AC 100 ~ 240V 50/60Hz Mark : 110V, 60Hz (N.America)
4 Market NORTH AMERICA
5 Screen Size 32/37/42/47/55 inches
6 Aspect Ratio 16:9
7 Tuning System FS
8 Module LC320EXN-SEA2 LGD 32LT770H-UA / 32LT777H-UA
LC370EUN-SEM2 LGD 37LT770H-UA / 37 LT777H-UA
LC420EUE-SEM1 LGD 42 LT770H-UA / 42 LT777H-UA
LC470EUE-SEM1 LGD 47 LT770H-UA / 47 LT777H-UA
9 Operating
Environment
10 Storage
Environment
LC420EUG-PFF1 / LC420EUH-PFP1 / LC420EUH-PFM1
LC470EUG-PFF1 / LC470EUH-PFP1 LGD 47 LP870H-UA
LC550EUG-PFF1 / LC550EUH-PFP1 LGD 55 LP870H-UZ
1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %
LGD 42 LP870H-UA
Only for training and service purposes
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Page 5
5. Supported video resolutions
5.1. RGB 2D input(PC)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed DDC
1 640*350 31.468 70.09 25.17 EGA X
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 37.879 60.31 40.00 VESA(SVGA) O
5 1024*768 48.363 60.00 65.00 VESA(XGA) O
6 1152*864 54.348 60.053 80.002 VESA O
1360*768 47.712 60.015 85.50 FHD only VESA (WXGA) X
7 1920*1080 67.5 60 148.5 FHD only HDTV 1080P O
5.2. RGB 3D input(PC) (OPTION)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 640*350 31.468 70.09 25.17 Side by Side Top & Bottom
2 720*400 31.469 70.08 28.32 Side by Side Top & Bottom
3 640*480 31.469 59.94 25.17 Side by Side, Top and Bottom
5.3. HDMI 2D Input (PC/DTV)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed DDC
PC
1 640*350 31.468 70.09 25.17 EGA X
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 37.879 60.31 40.00 VESA(SVGA) O
5 1024*768 48.363 60.00 65.00 VESA(XGA) O
6 1360*768 47.712 60.015 85.50 VESA (WXGA) X
7 1280*1024 63.981 60.020 108.00 FHD only VESA (SXGA) O
8 1920*1080 67.5 60 148.5 FHD only HDTV 1080P O
DTV
1 720*480 31.50 60 27.027 SDTV 480P
2 720*480 31.469 59.94 27.00 SDTV 480P
3 1280*720 45.00 60.00 74.25 HDTV 720P
4 1280*720 44.96 59.94 74.176 HDTV 720P
5 1920*1080 33.75 60.00 74.25 HDTV 1080I
6 1920*1080 33.72 59.94 74.176 HDTV 1080I
7 1920*1080 67.500 60 148.50 HDTV 1080P
8 1920*1080 67.43 59.94 148.352 HDTV 1080P
9 1920*1080 27.000 24.000 74.25 HDTV 1080P
10 1920*1080 26.97 23.97 74.176 HDTV 1080P
11 1920*1080 33.75 30.000 74.25 HDTV 1080P
12 1920*1080 33.716 29.976 74.176 HDTV 1080P
Only for training and service purposes
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5.4. HDMI 3D Input(1.4b) (OPTION)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed
62.938 / 63
1 640*480
31.469 / 31.5
62.938 / 63
2 720*480
31.469 / 31.5
89.91 / 90
3 1280*720
44.96 / 45
67.432 / 67.5
4 1920*1080
33.72 / 33.75
53.946 / 54
5 1920*1080
26.973 / 27
67.432 / 67.5
6 1920*1080
33.716 / 33.75
7 1920*1080 67.43 / 67.5 59.94 / 60 148.35/148.50
59.94/ 60
59.94 / 60
59.94 / 60
59.94 / 60
23.976 / 24
29.97 / 30.00
50.35/50.4
50.35/50.4 Side-by-side(Full)
25.175/25.2
54.001/54.054
54.001/54.054 Side-by-side(Full)
27.00/27.027
148.351/148.5
148.351/148.5 Side-by-side(Full)
74.17/74.25
148.35/148.5
148.35/148.5 Side-by-side(Full)
74.17/74.25
148.351/148.5
148.351/148.5 Side-by-side(Full)
74.176/74.25
148.35/148.5
148.35/148.5 Side-by-side(Full)
74.175/74.25
Frame packing Line alternative
Top-and-Bottom Side-by-side(half)
Frame packing Line alternative
Top-and-Bottom Side-by-side(half)
Frame packing Line alternative
Top-and-Bottom Side-by-side(half)
Frame packing Field alternative
Top-and-Bottom Side-by-side(half)
Frame packing Line alternative
Top-and-Bottom Side-by-side(half)
Frame packing Line alternative
Top-and-Bottom Side-by-side(half)
Top-and-Bottom Side-by-side(half)
(SDTV 480P) (SDTV 480P) Secondary(SDTV 480P) Secondary(SDTV 480P)
(SDTV 480P) Secondary(SDTV 480P) Secondary(SDTV 480P)
Primary(HDTV 720P) (HDTV 720P) (HDTV 720P) Primary(HDTV 720P) Primary(HDTV 720P)
Primary(HDTV 1080I) (HDTV 1080I) (HDTV 1080I) Secondary(HDTV 1080I) Primary(HDTV 1080I)
Primary(HDTV 1080P) (HDTV 1080P) (HDTV 1080P) Primary(HDTV 1080P) Primary(HDTV 1080P)
(HDTV 1080P) (HDTV 1080P) (HDTV 1080P) (HDTV 1080P) Secondary(HDTV 1080P)
Primary(HDTV 1080P) Secondary(HDTV 1080P)
5.5. HDMI-PC 3D Input (OPTION)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 1024*768 48.363 60.004 65.000 Side by Side , Top & Bottom
2 1360*768 47.712 60.015 85.500 Side by Side , Top & Bottom
3
1920*1080 67.50 60.00 148.50
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Only for training and service purposes
Side by Side , Top & Bottom Checkerboard, Single Frame Sequential Row Interleaving, Column Interleaving
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5.6. HDMI 3D Input(1.3) (OPTION)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1
1280*720 45.00 60.00 74.25 HDTV 720P
2 1920*1080 33.75 60.00 74.25 HDTV 1080I Side by Side, Top & Bottom
3
1920*1080 67.50 60.00 148.5 HDTV 1080P
4 1920*1080 27.00 24.00 74.25 HDTV 1080P Side by Side, Top & Bottom, Checkerboard
5 1920*1080 33.75 30.00 74.25 HDTV 1080P Side by Side, Top & Bottom, Checkerboard
Side by Side, Top & Bottom, Single Frame Sequential
Side by Side, Top & Bottom, Checkerboard Single Frame Sequential, Row Interleaving, Column Interleaving
No Side by Side Top & Bottom Checkerboard Single Frame
Sequential
1
Frame Packing 2D to 3D
5.6. USB Input (OPTION)
5.6.1. 3D Auto detection
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) 3D input proposed mode Proposed
1 1920*1080 33.75 30.000 74.25 Side by Side
Top & Bottom
Checkerboard
MPO(Photo)
5.6.1. 3D Auto detection
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) 3D input proposed mode Proposed
1 1920*1080 33.75 30.000 74.25 Side by Side
Top & Bottom
Single Frame Sequential
Row Interleaving
Column Interleaving
[Photo: Side by Side(half)
Top & Bottom]
HDTV 1080P
HDTV 1080P
Only for training and service purposes
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5.7. RF 3D Input(DTV) (OPTION)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1 1280*720 45.000 60 74.25 HDTV 720P Side by Side, Top & Bottom
2 1920*1080 33.75 60 74.25 HDTV 1080I Side by Side, Top & Bottom
5.8. DLNA Input (OPTION)
5.8.1. 3D Auto detection
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) 3D input proposed mode Proposed
1 1920*1080 33.75 30.000 74.25 Side by Side
Top & Bottom
Checkerboard
5.8.2. 3D Manual
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) 3D input proposed mode Proposed
1 1920*1080 33.75 30.000 74.25 Side by Side
Top & Bottom
Checkerboard
Single Frame Sequential
Row Interleaving
Column Interleaving
[Photo: Side by Side(half)
Top & Bottom]
HDTV 1080P
HDTV 1080P
Only for training and service purposes
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Page 9
ADJUSTMENT INSTRUCTION
1. Application Range
This spec. sheet applies to LA2FZ Chassis applied LED TV all models manufactured in TV factory
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument. (2) Adjustment must be done in the correct order. (3) The adjustment must be performed in the circumstance of
25 ±5 °C of temperature and 65±10% of relative humidity if
there is no specific designation. (4) The input voltage of the receiver must keep 100~240V,
50/60Hz. (5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 °C In case of keeping module is in the circumstance of 0°C, it
should be placed in the circumstance of above 15°C for 2 hours
In case of keeping module is in the circumstance of below
-20°C, it should be placed in the circumstance of above 15°C for 3 hours.
[Caution] When still image is displayed for a period of 20 minutes or longer (especially where W/B scale is strong. Digital pattern 13ch and/or Cross hatch pattern 09ch), there can some afterimage in the black level area
4. MAIN PCBA Adjustments
4.1. ADC Calibration
- An ADC calibration is not necessary because MAIN SoC (LGE35230) is already calibrated from IC Maker
- If it needs to adjust manually, refer to appendix.
4.2. MAC Address, ESN Key and Widevine Key download
4.2.1. Equipment & Condition
1) Play file: keydownload.exe
4.2.2. Communication Port connection
1) Key Write: Com 1,2,3,4 and 115200 (Baudrate)
2) Barcode: Com 1,2,3,4 and 9600 (Baudrate)
4.2.3. Download process
1) Select the download items.
2) Mode check: Online Only
3) Check the test process
- US , C anada m o d els: D E T E CT - > M AC_WRI T E -> WIDEVINE_WRITE
- Korea, Me xic o mo del s: D ETE CT - > MA C_W RIT E -> WIDEVINE_WRITE
4) Play : START
5) Check of result: Ready, Test, OK or NG
4.2.4. Communication Port connection
1) Connect: PCBA Jig -> RS-232C Port == PC -> RS-232C
Port
3. Adjustment items
3.1. Main PCBA Adjustments
(1) ADC adjustment: Component 480i, 1080p / RGB-PC 1080p (2) EDID downloads for HDMI and RGB-PC
3.2. Final assembly adjustment
(1) White Balance adjustment (2) RS-232C functionality check (3) Factory Option setting per destination (4) Shipment mode setting (IN-STOP) (5) GND and HI-POT test
3.3. Appendix
(1) Tool option menu, USB Download (S/W Update, Option and
Service only) (2) Manual adjustment for ADC calibration and White balance. (3) Shipment conditions, Channel pre-set
Only for training and service purposes
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4.2.5. Download
4.2.6. Inspection
- In INSTART menu, check these keys.
4.3. LAN Inspection
4.3.1. Equipment & Condition
▪ Each other connection to LAN Port of IP Hub and Jig
4.4. LAN PORT INSPECTION(PING TEST)
4.4.1. Equipment setting
1) Play the LAN Port Test PROGRAM.
2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2.
4.4.2. LAN PORT inspection (PING TEST)
1) Play the LAN Port Test Program.
2) connect each other LAN Port Jack.
3) Play Test (F9) button and confirm OK Message.
4) remove LAN CABLE
4.3.2. LAN inspection solution
▪ LAN Port connection with PCB ▪ Network setting at MENU Mode of TV (Installer Menu -> 119
-> 253 -> Menu)
▪ setting automatic IP ▪ Setting state confirmation
- If automatic setting is finished, you confirm IP and MAC Address.
Only for training and service purposes
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4.5. Model name & Serial number Download
4.5.1. Model name & Serial number D/L
■ Press “Power on” key of service remocon.(Baud rate :
115200 bps)
■ Connect RS232 Signal Cable to RS-232 Jack.
■ Write Serial number by use RS-232.
■ Must check the serial number at Instart menu
4.5.2. Method & notice
A. Serial number D/L is using of scan equipment. B. Setting of scan equipment operated by Manufacturing
Technology Group.
C. Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory by D-book 4.0
Manual Download (Model Name and Serial Number) If th e TV set is do wnl oaded By OTA or Servic e man, Sometimes model name or serial number is initialized.( Not always) There is impossible to download by bar code scan, so It need Manual download. a. Press the ‘instart’ key of ADJ remote controller. b. Go to the menu ‘16.Model Number D/L’ like below photo. c. Input the Factory model name(ex 47LM960V-ZA) or Serial
number like photo.
4.6. EDID Download
4.6.1. Overview
- It is a VESA regulation. A PC or a MNT will display an optimal resolution through information sharing without any necessity
of user input. It is a realization of “Plug and Play”.
4.6.2. Equipment
(1) Since EDID data is embedded, EDID download JIG, HDMI
cable and D-sub cable are not need.
(2) Adjust by using remote controller.
4.6.3. Download method
(1) Press Adj. key on the Adj. R/C, (2) Select EDID D/L menu. (3) By pressing Enter key, EDID download will begin (4) If Download is successful, OK is display, but If Download is
failure, NG is displayed.
(5) If Download is failure, Re-try downloads.
Caution: When EDID Download, must remove RGB/HDMI
Cable.
4.6.4. EDID DATA
4.6.4.1. PCM(US) _ XvYcc : 0n
d. Check the model name Instart menu -> Factory name
displayed (ex 47LM960V-ZA)
e. Check the Diagnostics (DTV country only) -> Buyer model
displayed (ex 47LM960V-ZA)
Only for training and service purposes
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▪Reference
- HDMI1 ~ HDMI3 / RGB
- In the data of EDID, bellows may be different by S/W or Input mode.
Product ID
HEX EDID Table DDC Function
0001 0100 Analog
0001 0100 Digital
Serial No: Controlled on production line. Month, Year: Controlled on production line:
ex) Monthly : ‘01’ -> ‘01’ Year : ‘2012’ -> ‘16’ Model Name(Hex): LGTV
Chassis MODEL NAME(HEX)
LA2FF/ LA2FZ/
LA3BF
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
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Checksum(LG TV): Changeable by total EDID data.
1 2 3
HDMI1 43 B5 X
HDMI2 43 A5 X
HDMI3 43 95 X
RGB X X 5C
Vendor Specific(HDMI)
INPUT MODEL NAME(HEX)
HDMI1 67 03 0C 00 10 00 80 2D
HDMI2 67 03 0C 00 20 00 80 2D
HDMI3 67 03 0C 00 30 00 80 2D
Vendor Specific(HDMI)
INPUT MODEL NAME(HEX)
HDMI1 67 03 0C 00 10 00 80 2D
HDMI2 67 03 0C 00 20 00 80 2D
HDMI3 67 03 0C 00 30 00 80 2D
4.6.4.2. PCM(US) _XvYcc : off
▪Reference
- HDMI1 ~ HDMI3 / RGB
- In the data of EDID, bellows may be different by S/W or Input mode.
Product ID
HEX EDID Table DDC Function
0001 0100 Analog
0001 0100 Digital
Serial No: Controlled on production line. Month, Year: Controlled on production line:
ex) Monthly : ‘01’ -> ‘01’ Year : ‘2012’ -> ‘16’ Model Name(Hex): LGTV
Chassis MODEL NAME(HEX)
LA2FF/ LA2FZ/
LA3BF
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
5. Final Assembly Adjustment
5.1. White Balance Adjustment
5.1.1. Overview
5.1.1.1. W/B adj. Objective & How-it-works (1) Objective: To reduce each Panel’s W/B deviation (2) How-it-works: When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to prevent saturation of Full Dynamic range and data, one of R/G/B is fixed at 192, and the other two is lowered to find the desired value.
(3) Adj. condition: normal temperature
- Surrounding Temperature: 25±5 °C
- Warm-up time: About 5 Min
- Surrounding Humidity: 20% ~ 80%
- Before White balance adjustment, Keep power on status, don’t power off
5.1.1.2. Adj. condition and cautionary items
(1) Lighting condition in surrounding area surrounding lighting
should be lower 10 lux. Try to isolate adj. area into dark surrounding.
(2) Probe location: Color Analyzer (CA-210) probe should be
within 10cm and perpendicular of the module surface (80°~ 100°) (3) Aging time
- After Aging Start, Keep the Pow er ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked using no
signal or Full-white pattern.
5.1.2. Equipment
(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
CH14) (2) Adj. Computer (During auto adj., RS-232C protocol is
needed) (3) Adjust Remocon (4) Vid eo Sign al Gene rator MSP G-925 F 720p/20 4-Gray
(Model: 217, Pattern: 49)
Color Analyzer Matrix should be calibrated using CS-1000
Checksum(LG TV): Changeable by total EDID data.
1 2 3
HDMI1 43 68 X
HDMI2 43 58 X
HDMI3 43 48 X
RGB X X 5C
Only for training and service purposes
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Page 13
5.1.3. Equipment connection
If TV internal pattern is used, not needed
Color Analyzer
Probe
RS-232C
Signal Source
Pattern Generator
RS-232C
Computer
RS-232C
5.1.4. Adjustment Command (Protocol)
(1) RS-232C Command used during auto-adj.
RS-232C COMMAND
CMD DATA ID
Explanation
Wb 00 00 Begin White Balance adj.
Wb 00 ff End White Balance adj.
(internal pattern disappears )
(2) Adjustment Map
Adj. item Command
(lower caseASCII)
CMD1 CMD2 MIN MAX
Cool R Gain j g 00 C0
G Gain j h 00 C0
B Gain j i 00 C0
Medium R Gain j a 00 C0
G Gain j b 00 C0
B Gain j c 00 C0
Warm R Gain j d 00 C0
G Gain j e 00 C0
B Gain j f 00 C0
Data Range (Hex.)
5.1.5. Adjustment method
5.1.5.1 Auto WB calibration (1) Set TV in ADJ mode using P-ONLY key (or POWER ON
key)
(2) Place optical probe on the center of the display
- It need to check probe condition of zero calibration before adjustment.
(3) Connect RS-232C Cable (4) Select mode in ADJ Program and begin a adjustment. (5) When WB adjustment is completed with OK message,
check adjustment status of pre-set mode (Cool, Medium, Warm)
(6) Remove probe and RS-232C cable.
▪ W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need
5.1.7. Reference (White Balance Adj. coordinate and color temperature)
LT Series (don’t use G Gain fix(172))
▪ Luminance: 204 Gray ▪ Standard color coordinate and temperature using CS-1000
(over 26 inch)
Mode
Cool 0.269 0.273 13,000K 0.0000
Medium 0.285 0.293 9,300K 0.0000
Warm 0.313 0.329 6,500K 0.0000
▪ St a n d a r d color coord i n a t e a n d t emperatu r e u s i n g
CA-210(CH 14)
(1) LGD
Mode
Cool 0.269±0.002 0.273±0.002 13,000K 0.0000
Medium 0.285±0.002 0.293±0.002 9,300K 0.0000
Warm 0.313±0.002 0.329±0.002 6,500K 0.0000
(2) O/S Module(AUO, CMI, Sharp,IPS…)
Mode
Cool 0.271±0.002 0.276±0.002 13,000K 0.0000
Medium 0.287±0.002 0.296±0.002 9,300K 0.0000
Warm 0.315±0.002 0.332±0.002 6,500K 0.0000
▪ St a n d a r d color coord i n a t e a n d t emperatu r e u s i n g
CA-210(CH-14) – by aging time
(1) Edge LED models (applied only LGD Module) in LGERS
GP4
1 0-2 279 288 295 308 319 338
2 3-5 278 286 294 306 318 336
3 6-9 277 285 293 305 317 335
4 10-19 276 283 292 303 316 333
5 20-35 274 280 290 300 314 330
6 36-49 272 277 288 297 312 327
7 50-79 271 275 287 295 311 325
8 80-149 270 274 286 294 310 324
9 Over 150 269 273 285 293 309 323
Coordinate
X Y
X Y
X Y
Aging time
(Min)
Temp uv
Coordinate
Coordinate
Cool Medium Warm
X Y X Y X Y
269 273 285 293 313 329
Temp uv
Temp uv
5.1.6. Reference (White Balance Adj. coordinate and color temperature)
(1) Luminance: 204 Gray, 80IRE (2) Standard color coordinate and temperature using CS-1000
(over 26 inch)
Only for training and service purposes
- 13 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 14
5.2. Tool Option selection
▪ Method: Press Adj. key on the Adj. R/C, then select Tool
option
Model 32LT777H-UA
tool option 1 4100 5 6 7
tool option 2 8389 8389 8389 8389
tool option 3 9229 9229 9229 9229
tool option 4 13006 13006 13004 13004
tool option 5 4315 4187 4187 4187
tool option 6 1305 1305 1305 1305
Tool option 7 128 128 4224 4224
Commercial
Tool Option
Country Group 02 02 02 02
(LGD)
1555 1555 1555 1555
● Tool option can be reconstructed by Software
37LT777H-UA 42LT777H-UA 47LT777H-UA
5.4. Wi-Fi MAC Address Check
5.4.1. Using RS232 Command
Command Set ACK
Transmission [A][l][][Set ID][][20][Cr] [O][K][x] or [N][G]
5.4.2. Check the menu on in-start
5.3. EYE-Q Check
Step 1) Turn on the TV.. Step 2) Press 'EY E bu tto n' on the adj ustment rem ote -
controller.
Step 3) Cover 'Eye Q sensor' on the front of set with your
hands, hold it for 6 seconds.
Step 4) Check "the Sensor Data" on the screen, make certain
that Data is below 10. If Data isn’t below 10 in 6 seconds, Eye Q sensor would be bad. You should change Eye Q sensor.
Step 5) Uncover your hands from Eye Q sensor, hold it for 6
seconds.
Step 6) Check "Back Light(xxx)" on the screen, check data
<Step 2>
<Step 4>
increase . You should change Eye Q sensor.
<Step 3>
<Step 5>
<Step 6>
5.5. Wi-Fi Test
Step 1) Turn on TV Step 2) Select Network Connection option in Network Menu. Installer menu -> 119 -> 253 -> Menu
Step 3) Select Start Connection Button in Network Connection.
Only for training and service purposes
- 14 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 15
Step 4) If the system finds any AP like blow PIC, it is working
well
5.6. HDMI ARC Function Inspection
5.6.1. Test equipment
- Optic Receiver Speaker
- MSHG-600 (SW: 1220 ↑)
- HDMI Cable (for 1.4 version)
5.6.2. Test method
(1) Insert the HDMI Cable to the HDMI ARC port from the
master equipment (HDMI1)
6. Check Commercial features
Model info. Commercial Feature
Name inch IR Out DC
Power
(12V)
LT770H-UA 32/37/42/47/55 O O O O O
6.1. External SPK Out
6.1.1. Equipment & Condition
▪ Jig (Speaker out JIG) or Oscilloscope ▪ Power only mode
6.1.2. Check the speaker out
1) Connect the External Speaker : check the sound Connect oscilloscope, you can see this waveform
Out
Ext
SPK
Out
RJP
(RJ-45
inter­face)
Pro:Idiom
(2) Check the sound from the TV Set
(3) Check the Sound from the Speaker or using AV & Optic
TEST program (It’s connected to MSHG-600)
* Remark: Inspect in Power Only Mode and check SW version
in a master equipment
6.2. IR Out and DC Power Outlet (12V)
6.2.1. Equipment & Condition
▪ Jig (commercial check JIG) ▪ Special 232C Cable for commercial check Jig ▪ Power only mode ▪ PCB Mode (installer menu -> 118 -> 9 )
Only for training and service purposes
- 15 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 16
6.2.2. Check the power out & IR out – commercial check jig
(1) Connect each other RS232c port on the Commercial Check
JIG
(2) Press RED Color Button on SVC Remote-controller in
power only mode (or PCB Mode)
(3) Check the LED of jig board
- +12V LED (OK condition: Turn On)
- IR LED (OK condition: blinking)
6.2.3. Check the power out & IR out – mini jig
(1) Connect mini jig on RS232c port (2) Press RED Color Button on SVC Remote-controller in
power only mode (or PCB Mode)
(3) Check the LED of mini jig
6.3. RJP Check
6.3.1. Initial setting
(1) Select Power switch ( up ) as the picture (2) Set the Switch No.5 to ON (up) as the picture Others should be set to OFF (down)
6.3.2. Checking Guide
(1) Press the P-ONLY key of R/C (2) Press the Exit key of R/C (3) Connect with the TV through RJP cable (wait for the JIG
on) (4) RJP Pin check is carried out automatically (5) The result is shown as below (6) If RJP Pin check finished or you check other function, must
remove the RJP cable from TV
6.2.4. Check the power out & IR out – New jig
(1) Of the DFT process performance tests showing Waite
Massage automatically scan pause
(2) Adjust the remote control Press any Key IR Out Make sure
that only Nomal LED blinks. (3) ETC Key -> red Pressing the Info Key i) 5V Out Output 3 seconds ii) 5V output OFF iii) 12V Out Output 3 seconds iv) 12V output OFF(Given the ST output time adjustable) (4) Nomal LED, 5V LED, 12V LED flicker worker using the
PASS. (5) After the check is complete automatic test is initiated.
Only for training and service purposes
- 16 -
* RJP Cable : Direct LAN Cable
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 17
6.4. Pro:Idiom Check
(1) Connect the RF Cable (2) Turn to the Pro:Idiom channel (No. 96-1) (3) Check the video & sound
** Only displayed at “POWER ONLY” mode
6.5. b-LAN Main board Check
6.5.1. Overview
It is LNET RF modem & FTG card
6.5.2. Equipment
(1) b-LAN Checker: UTC-1000 (with Cable accessory) (2) Computer(for test result monitoring) (3) Connection JIG
6.5.3. Equipment connection map & b-LAN Check
6.5.4. Check
6.5.4.1. Setting Procedure (1) Setting JIG i) Connect UTC-1000 Equipment to JIG device as a like left
picture
(2) Working procedure i) Connection UTC-1000 LAN <- -> PC LAN Port UTC-1000 TOP1 <- -> Game port(RJ21)
-> TV-LINK CFG (Phone Jack) UTC-1000 RF1 <- -> b-LAN RF IN ii) Power on JIG : Switch on front of the JIG iii) Test Start UTC-1000 TOP2 <- -> JIG 11pin Connection iv) Checking b-LAN MAC Address Check whether it is same their address numbers or not
between b-LAN Label and on the pc address numbers.
Checking JIG contents
(1) Check whether displaying all “Pass” or not at the number
3.4.6.7.9 contents of UTC-1000 on the PC
(2) Check “Version 6.27” of the 1. b-LAN Application version
(3) Check whether it is same their address numbers or not
between b-LAN Label and
(4) MAC Address on the pc.
6.6. Ship-out mode check (In-stop)
▪ After final inspection, press In-Stop key of the Adj. R/C and
check that the unit goes to Stand-by mode
Only for training and service purposes
- 17 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 18
7. AUDIO output check
7.1. Audio input condition
(1) RF input: Mono, 1KHz sine wave signal, 100% Modulation (2) CVBS, Component: 1KHz sine wave signal (0.4Vrms) (3) RGB PC: 1KHz sine wave signal (0.7Vrms)
7.2. Specification
No Item Min Typ Max Unit Remark
1 Audio
practical max Output, L/R
9.0
8.5
10.0
8.9
12.0
9.9WVrms
(1) Measurement
condition
- EQ/AVL/Clear Voice: Off
(2) Speaker (8Ω
Impedance)
8. GND and HI-POT Test
8.1. GND & HI-POT auto-check preparation
(1) Check the POWER CABLE and SIGNAL CABE insertion
condition
8.2. GND & HI-POT auto-check
(1) Pallet moves in the station. (POWER CORD / AV CORD is
tightly inserted) (2) Connect the AV JACK Tester. (3) Controller (GWS103-4) on. (4) GND Test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, execute next process (Hi-pot test). (Remove A/V CORD from A/V JACK BOX) (5) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next process
automatically.
9. USB S/W Download (Optional, Service only)
(1) Put the USB Stick to the USB socket (2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is Lower, it didn’t work. But your downloaded version is Higher, USB data is automatically detecting
(Download Version Hig h & Powe r on ly mode, Set is
automatically Download)
(3) Show the message “Copying files from memory”
(4) Updating is staring
8.3. Checkpoint
(1) Test voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA (2) TEST time: 1 second (3) TEST POINT
- GND Test = POWER CORD GND and SIGNAL CABLE GND.
- Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL. (4) LEAKAGE CURRENT: At 0.5mArms
Only for training and service purposes
- 18 -
(5) Updating Completed, The TV will restart automatically (6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel recover. if all channel data is cleared, you didn’t have a DTV/ATV test on production line.
* After downloading, have to adjust TOOL OPTION again. (1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push “OK” button.
(3) Punch in the number. (Each model has their number.)
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 19
10. Optional adjustments
10.1. Manual ADC Calibration
10.1.1. Equipment & Condition
(1) Adjustment Remocon (2) 801GF (80 2B, 802F, 80 2R) or MSPG92 5FA Pat tern
Generator
- Resolution : 48 0 i Comp1 ( MSPG-925FA : m o d e l - 2 0 9 , pattern-65)
- Resolution : 10 80p C o mp1 ( MSPG -925 FA : mod e l-2 2 5, pattern-65)
- Resolution : 1080p R G B ( M S P G - 9 2 5 F A : model-22 5 , pattern-65)
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level : 0.7±0.1 Vp-p
10.1.2. Adjust method
8.1.2.1 ADC 480i/1080p Comp1, RGB
(1) Check connected condition of Comp1/RGB cable to the
equipment
(2) Give a 480i Mode, Horizontal 100% Color Bar Pattern to
Comp1. (MSPG-925FA -> Model: 209, Pattern: 65)
(3) Change input mode as Component1 and picture mode as
“Standard”
(4) Press the In-start Key on the ADJ remote after at least 1
min of signal reception. Then, select 7.External ADC. And
Press OK or Right Button for going to sub menu. (5) Press OK in Comp 480i menu (6) Give a 1080p Mode, Horizontal 100% Color Bar Pattern to
Comp1. (MSPG-925FA -> Model: 225, Pattern: 65) (7) Press OK in Comp 1080p menu (8) Perform (6) and (7) in RGB-PC
(9) If ADC Comp is successful, “ADC Component Success” is
displayed. If ADC calibration is failure, “ADC Component
Fail” is displayed.
(10) If ADC calibration is failure, after rechecking ADC pattern
or condition, retry calibration
(11) If AD C RG B ca lib rat ion is s ucc ess ful , “A DC R GB
Success” is displayed. If ADC calibration is failure, “ADC RGB Fail” is displayed.
(12) If ADC calibration is failure, after recheck ADC pattern or
condition, retry calibration
10.2. Manual White balance Adjustment
10.2.1. Adj. condition and cautionary items
(1) Lighting condition in surrounding area surrounding lighting
should be lower 10 lux. Try to isolate adj. area into dark surrounding.
(2) Probe location: Color Analyzer (CA-210) probe should be
within 10cm and perpendicular of the module surface (80°~ 100°) (3) Aging time
▪ After Aging Start, Keep the Power ON status dur ing 5
Minutes.
▪ In case of LCD, Back-light on should be checked using no
signal or Full-white pattern.
10.2.2. Equipment
(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
CH14) (2) Adj. Computer (During auto adj., RS-232C protocol is
needed) (3) Adjust Remocon (4) Vid eo Si gnal Ge nerat or MSPG -925F 720p/2 16-Gr ay
(Model: 217, Pattern: 78)
10.2.3. Adjustment
(1) Set TV in Adj. mode using POWER ON (2) Zero Calibrate the probe of Color Analyzer, then place it on
the center of LCD module within 10cm of the surface.
(3) Press ADJ key -> EZ adjust using adj. R/C -> 6. White-
Balance then press the cursor to the right (KEY►).
When KEY(►) is pressed 216 Gray internal pattern will be
displayed. (4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
(5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of
color temperature.
▪ If internal pattern is not available, use RF input. In EZ Adj.
menu 6.White Balance, you can select one of 2 Test-pattern: ON, OFF. Default is inner(ON). By selecting OFF
Only for training and service purposes
- 19 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 20
TROUBLESHOOTING
Power-Up Boot Fail Trouble Shooting guide
Check P2401 All
Voltage Level (3.5V, 12V, 24V)
Y
Check Q2407 output Voltage(12V)
Y
Check LVDS Cable
Y
Check LCD Module
Control board
N
Check power connector and
RL_ON signal OK ?
N
Check Q2407 application circuit
Or replace Q2407
N
Replace Cable
No OSD Trouble Shooting guide
Check P2401 All
Voltage Level (3.5V, 12V, 24V)
N
Check power connector and
RL_ON signal OK ?
N
Replace Power Board
N
Replace Power Board
Y
Check IC8701 RESET and
UPDATE pin
Y
Check X8700 Clock
32.768KHz
Y
Check IC8701 IIC
Comm unication status
Y
Check IR input state of IC8701
57pin
Y
Re-down load PTC Micom
N
Check switch SW8700, SW8701
N
Check X8700 application circuit
or Replace X8700
N
Check IIC lin e or replace IC8701
N
Check IR board
Only for training and service purposes
- 20 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 21
Analog RF Video Trouble Shooting guide
Check RF cable & signal
Y
Check TU8900 Pin5
(Video output)
Y
Check tu ner 5V power R8953
Y
Check tu ner 3.3V power L8904
Y
Check tu ner 1.8V power IC8900
2pin : 1.8V
Y
Check MTK LVDS output
N
N
N
N
N
Replace Tu ner.
Y
Check IC2404
Replace L8904
Replace IC8900
Replace IC105
N
Replace IC2404
Only for training and service purposes
- 21 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 22
Digital RF Trouble Shooting guide
Check RF cable & signal
Y
Check tu ner 5V power R8953
Y
Check IIC Sign al
TU8900 Pin#4,12
Y
Check DIF Signal TU8900 Pin#6,14
Y
Check X100
and application circuit
Replace IC105
N
N
N
N
Check IC2404
Replace TU8900
Replace TU8900
Replace X100
N
Replace IC2404
Only for training and service purposes
- 22 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 23
Composite Video Trouble Shooting guide
Check inpu t signal format. Is it supported?
Y
Check AC cable for damage For damage or open condu ctor
Y
Check JK3800 Can you see the normal waveform?
Y
Check th e input of MTK(IC105). Measure waveform at C360 becau se it’s more easy to check. Can you see the normal waveform?
Y
This board has big problem because Main chip (MTK) have some trou bles. After checking th oroughly all path once again, You should decide to replace MTK or not.
N
Replace JK3800
HDMI Video Trouble Shooting guide
Check inpu t signal format. Is it supported?
Y
Check AC cable for damage For damage or open condu ctor
Y
Check JK3301/JK3302/JK3303 Can you see the normal waveform?
Y
Check HDCP key NVRAM(IC100) Power & I2C signal
Y
Check th e input of MTK(IC105). Measure waveform at R3314, R3315, R3308, R3309, R3328, R3329 becau se it’s more easy to check. Can you see the normal waveform?
Y
This board has big problem because Main chip (MTK) have some trou bles. After checking th oroughly all path once again, You should decide to replace MTK or not.
N
Replace JK3301, JK3302, JK3303
N
Replace IC100
Only for training and service purposes
- 23 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 24
RGB-PC Video Trouble Shooting guide
Check inpu t signal format. Is it supported?
Y
Check AC cable for damage For damage or open condu ctor
Y
Check JK3603 Can you see the normal waveform?
Y
Check th e input of MTK(IC105). Measure waveform at R323, R324 because it’s more easy to check. Can you see the normal waveform?
Y
This board has big problem because Main chip (MTK) have some trou bles. After checking th oroughly all path once again, You should decide to replace MTK or not.
N
Replace JK3603
Analog RF Audio Trouble Shooting guide
Check RF cable & signal
Check TU8900 Pin2
(SIF output)
Y
Check Audio AMP ou tput
L5402,L5403,L5404,L5405
Y
Check IC5400
Y
Check C352
(SIF signal to IC105)
Y
Replace IC105
N
N
N
Replace Tu ner
Replace L5402,L5403,L5404,L5405
Replace IC5400
Only for training and service purposes
- 24 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 25
Composite / RGB-PC Audio in Trouble Shooting guide
Check inpu t signal format. Is it supported?
Y
Check AC cable for damage For damage or open condu ctor
Y
Check JK3800 Can you see the normal waveform?
Y
Check th e input of MTK(IC105). Measure waveform at C345, C346, C319, C320 because it’s more easy to check. Can you see the normal waveform?
Y
Check Audio AMP ou tput
L5402,L5403,L5404,L5405
Y
This board has big problem because Main chip (MTK) have some trou bles. After checking th oroughly all path once again, You should decide to replace MTK or not.
N
N
Replace L5402,L5403,L5404,L5405
Replace JK3800
HDMI Audio in Trouble Shooting guide
Check inpu t signal format. Is it supported?
Y
Check AC cable for damage For damage or open condu ctor
Y
Check JK3301/JK3302/JK3303 Can you see the normal waveform?
Y
Check Audio AMP ou tput
L5402,L5403,L5404,L5405
Y
This board has big problem because Main chip (MTK) have some trou bles. After checking th oroughly all path once again, You should decide to replace MTK or not.
Only for training and service purposes
N
N
Replace L5402,L5403,L5404,L5405
Replace JK3301, JK3302, JK3303
- 25 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 26
BLOCK DIAGRAM
RJ12
RF
Rear
(256Kb)
SYSTEM EEPROM X 1
SYSTEM
DDR3 X 4
I2C
(2Gb)
b-L AN
SM ART
I2C
IC
Dmod.
A/V
M ain
SIF
CVBS(M)
DIF(+/-)
CVBS
Demod
MPI/SPI
Pro:idiom
I2C
TS_S
TS_S/P
S/W
PTC
(MICOM)
( RX/TX)
DEBUG
RS-232C
IR &Key
RJP
Speaker
S e nsor
Inteligent
( HD)
( FHD)
I2C
MDC/MDIO
37 / 4 2/47
30P
51P
(8bit)
LVDS
L
32
R
AMP
Audio
HDCP
I2C
EEPROM
I2S Out
최대 동작주파수 : 800 MHz
MT5369
NAND
Flash(2GB)
I2C
Side
USB
(DP/D M)
(HUB)
USB1
USB2
HDMI3
Local Dimming
S/W
HDMI
(ARC)
HDMI1
HDMI2
(RX/TX)
Ethernet
PHY
HUB IC
Ethernet
LAN1
LAN2
Chip
MDC/MDIO
CVBS
L/R OUT
Video
Video
Audio
Audio
RGB,H/V
Audio
SPDIF OUT
AMP
Ext SPK
Rear
A/V1
PC-Audio
PC-RGB
OPTIC
Ext SPK
Wi-Fi
Only for training and service purposes
- 26 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 27
521
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essenti al that these spe cial safe ty parts should be replace d with the same compon ents as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
400
510
500
IMPORTANT SAFETY NOTICE
LV1
200
800
540
530
501
550
810
120
910
A10
A7
900
* Set + Stand
* Stand Base + Body
300
Only for training and service purposes
- 27 -
A21
A2
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 28
M_RFModule_ISP
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
EAX6430790* : LD22* / LC22* EAX6443420* : LT22* / LJ22* / LA22* / LB22*
+3.3V_NORMAL
R103
R104
4.7K OPT
4.7K R105
NVRAM
IC104
AT24C256C-SSHL-T
OPT
4.7K
A0
1
A1
2
A2
3
GND
4
8
7
6
5
NVRAM_ATMEL
HDCP EEPROM
HDCP_EEPROM_ST
IC100
M24C16-R
VCC
8
1
WC
2
7
SCL
3
6
SDA
4
5
I2C
R128
1.2K
R110 33 R111 33
R112 33 R113 33 R114 33 R115 33 R116 33 R117 33 R118 33 R121 33 R122 33 R123 33
R108
R106
4.7K MTK_FHD
MTK_Int_FRC/URSA5
R107
4.7K
R109
MTK_HD
MTK_NO_FRC/FRC3
STB_SCL STB_SDA
OPCTRL_11_SCL OPCTRL_10_SDA
OSCL1
OSDA1 OSCL2 OSDA2 OSCL0 OSDA0
OPCTRL_1_SCL
OPCTRL_0_SDA
+3.3V_NORMAL
R179
22
NC_1
NC_2
NC_3
VSS
R101
4.7K
MTK_FRC3/URSA5
R102
4.7K
MTK_NO_FRC/Int_FRC
IC104-*1
M24256-BRMN6TP
E0
1
E1
2
E2
3
+3.3V_NORMAL
VCC
WP
SCL
SDA
VSS
4
NVRAM_ST
Write Protection
- Low : Normal Operation
- High : Write Protection
R136 33
R137 33
+3.3V_NORMAL
C101
0.1uF 16V
R181 4.7K
R191 22
R192 22
R131
1.2K
R134
2.7K
R139
2.7K
R142
2.7K
Model Option
R130
4.7K
R132
R125
4.7K
4.7K
MTK_OPTIC_Tx_IC
R127
4.7K
4.7K
MTK_NON_OPTIC_Tx_IC
4.7K
MTK_3D_DEPTH_IC
MTK_DDR_768MB
R133
4.7K
R129
4.7K
MTK_DDR_DEFAULT
MTK_NON_3D_DEPTH_IC
VCC
8
WC
7
SCL
6
SDA
5
I2C_SCL1
I2C_SDA1
R173
2.7K
R135
4.7K
MTK_CP_BOX
R138
4.7K
MTK_NON_CP_BOX
IC104-*2
R1EX24256BSAS0A
A0
8
1
A1
7
2
A2
6
3
VSS
5
4
NVRAM_RENESAS
I2C_SCL5
I2C_SDA5
HDCP_EEPROM_MICRO
IC100-*1
24LC16B
A0
A1
A2
VSS
VCC
8
1
WP
7
2
SCL
6
3
SDA
4
5
+3.3V_NORMAL
R188
R185
2.7K
2.7K
R140
4.7K
R175
4.7K
R186
MTK_DVB_S_TUNER
MTK_DVB_T2_TUNER
R141
MTK_NON_DVB_T2_TUNER
4.7K
R184
4.7K
MTK_NON_DVB_S_TUNER
MTK_DVB_C2_TUNER
R187
MTK_NON_DVB_C2_TUNER
VCC
WP
SCL
SDA
I2C_1 : AMP, L/DIMMING I2C_2 : T-CON I2C_3 : MICOM I2C_4 : S/Demod,T2/Demod, LNB I2C_5 : NVRAM, HDCP KEY I2C_6 : TUNER_MOPLL(T/C,ATV)
R160
R156
2.7K
4.7K
2.7K
R189
4.7K
MTK_EPI
R164
2.7K
R177
2.7K
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3 /S2_RESET
MODEL_OPT_4
MODEL_OPT_5
MODEL_OPT_6 MODEL_OPT_7
MODEL_OPT_8
MODEL_OPT_9
MODEL_OPT_10
4.7K
R190
4.7K
MTK_NON_EPI
JTAG
JTRST#
JTDI JTMS JTCLK
JTDO
+3.3V_NORMAL
R147 1K
OPT
R148 1K
R143 33
JTAG
I2C_SCL1
I2C_SDA1
I2C_SCL2 I2C_SDA2 I2C_SCL3 I2C_SDA3 I2C_SCL4 I2C_SDA4 I2C_SCL5 I2C_SDA5
I2C_SCL6 I2C_SDA6
R150 1K
R151 1K OPT
+3.3V_NORMAL
AR100 10K
JTAG
+3.3V_NORMAL
R144 10K
JTAG
R145 10K
JTAG
R153 1K
OPT
LED_PWM0 LED_PWM1 OPCTRL3
R154 1K
NO_FRC
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
MODEL_OPT_6
MODEL_OPT_7
MODEL_OPT_8
MODEL_OPT_9
3D DEPTH
CP BOX
T2 Tuner
S Tuner
Reserved
MODEL_OPT_10
MODEL OPTION 8 is just for CP Box It should not be appiled at MP
R146 10K
JTAG
R149 10K
JTAG
0
0
DDR
EPI
+3.3V_NORMAL
R152 1K
JTAG
JTAG
P100
12507WS-12L
1
2
3
4
5
6
7
8
9
10
11
12
13
Close to eMMC Flash (IC8100)
EMMC_CLK
R174
10K
STRAPPING LED_PWM0 LED_PWM1 OPCTRL3
ICE mode + 27M + Serial boot 0 0 0
ICE mode + 27M + ROM to Nand boot 0 0 1
ICE mode + 27M + Rom to eMMC boot 0 1 0 from eMMC pins (share pins w/s NAND)
ICE mode + 27M + ROM to eMMC boot 0 1 1 from SDIO pins
SoC
LG FRC2
internal FRC
0
1
HIGH
FHD
OPTIC
3D_Depth_IC
DDR_768MB
Enable
Support
Support
Support
Reserved
1
0
LOW
HD
NON_OPTIC
NON_3D_Depth_IC
DDR_Default
Disable
Not Support
Not Support
Default
Not Support
1
1
M22
M21
M20
MDS62110213
MTK_H/S_3.5T
MTK_H/S_3.5T
MDS62110213
MDS62110213
MTK_H/S_3.5T
To HDMI
M23
MDS62110213
MTK_H/S_3.5T
HDMI_CEC_MTK
/USB_OCD1
M24
MDS62110214
MTK_H/S_9.5T
USB_CTL1
R1014 0
C102
0.1uF OPT
OPT
C106
0.1uF
OPT
/TU_RESET_1
R193 R176 R162 R163
MODEL_OPT_4
JTCLK JTDI JTDO JTMS
JTRST#
OSDA0 OSCL0
OSDA1 OSCL1
AVDD_33SB
C116
0.1uF
AVDD_33SB
C117
0.1uF
VDD3V3
C118
0.1uF
LAN1_DET LAN2_DET
EXT_PWR_DET
OPC_EN
RESET_BY_CPU
PTC_WOL
/UPDATE_BY_CPU
/USB2SER_RESET
/PROIDIOM_RESET_SOC
R1013
ERROR_OUT
M_RFModule_ISP
10K 10K 10K 10K
M_RFModule_RESET
/LGDT3305_RESET
/TU_RESET /S2_RESET
Crystal Matching Test result : 27pF -> 20pF -> 24pF
X-TAL
X100
27MHz
C113 24pF
IC105
LGE2112
AP14
JTCK
AM14
JTDI
AR14
JTDO
AR15
JTMS
AN14
JTRST
AP12
OSDA0
AN12
OSCL0
AP15
OSDA1
AN15
OSCL1
MT5369_XTAL_IN
MT5369_XTAL_OUT
C107
2.2uF 10V
EXT_PWR_DET R1015 R1016 R1004
R1010
R1012
MODEL_OPT_0
0
MODEL_OPT_1 LED_PWM0
OPT
MODEL_OPT_3 MODEL_OPT_7 MODEL_OPT_5 MODEL_OPT_6
AT34
XTALI
AU34
XTALO
AK27
AVDD33_XTAL_STB
AH26
AVSS33_XTAL_STB
AK18
AVDD33_VGA_STB
AK17
AVSS33_VGA_STB
AK23
AVDD33_PLLGP
AM27
AVSS33_PLLGP
AJ20
AVDD10_LDO
C108
2.2uF 10V
H32
GPIO0
F37
GPIO1
F36
GPIO2
G37
GPIO3
G36
GPIO4
G35
GPIO5
G34
GPIO6
H34
GPIO7
L34
GPIO8
L32
GPIO9
K33
GPIO10
K32
GPIO11
H33
GPIO12
L35
GPIO13
K36
GPIO14
J32
GPIO15
J34
GPIO16
K34
GPIO17
K35
GPIO18
K37
GPIO19
J36
GPIO20
J37
GPIO21
J35
GPIO22
J33
GPIO23
G33
GPIO24
H35
GPIO25
H31
GPIO26
F34
GPIO27
E36
100
OPT
100
OPT
100
OPT
GPIO28
N33
GPIO29
P32
GPIO30
M35
GPIO31
M37
GPIO32
M33
GPIO33
F35
GPIO34
E35
GPIO35
E37
GPIO36
N32
GPIO37
M34
GPIO38
M36
GPIO39
M32
GPIO40
L33
GPIO41
E33
GPIO42
E32
GPIO43
F32
GPIO44
100
A29
GPIO45
D31
GPIO46
C31
GPIO47
E30
0
GPIO48
E31
GPIO49
F31
GPIO50
E29
GPIO51
AP9
GPIO52
AT9
GPIO53
AR9
GPIO54
AU9
GPIO55
AN23
ADIN0_SRV
AN24
ADIN1_SRV
AP23
ADIN2_SRV
AR23
ADIN3_SRV
AU23
ADIN4_SRV
AT23
ADIN5_SRV
AM24
ADIN6_SRV
AM23
ADIN7_SRV
C115 24pF
U0TX U0RX
U1RX U1TX
POWE
POOE POCE1 POCE0
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
PARB PACLE PAALE
EMMC_CLK
OPWRSB
ORESET
OIRI
FSRC_WR
STB_SCL STB_SDA
DEMOD_RST
DEMOD_TSCLK DEMOD_TSDATA0 DEMOD_TSDATA1 DEMOD_TSDATA2 DEMOD_TSDATA3 DEMOD_TSDATA4 DEMOD_TSDATA5 DEMOD_TSDATA6 DEMOD_TSDATA7
DEMOD_TSSYNC
DEMOD_TSVAL
CI_INT
CI_TSCLK
CI_TSDATA0
CI_TSSYNC
CI_TSVAL
PVR_TSCLK PVR_TSVAL
PVR_TSSYNC PVR_TSDATA0 PVR_TSDATA1
SPI_CLK1
SPI_CLK
SPI_DATA
SPI_CLE
OPWM2 OPWM1 OPWM0
SD_D0 SD_D1 SD_D2
SD_D3 SD_CMD SD_CLK
LDM_CS
LDM_CLK
LDM_VSYNC
LDM_DO LDM_DI
LED_PWM1 LED_PWM0
OPCTRL11 OPCTRL10
OPCTRL9 OPCTRL8 OPCTRL7 OPCTRL6 OPCTRL5 OPCTRL4 OPCTRL3 OPCTRL2 OPCTRL1 OPCTRL0
R119
MT5369_XTAL_OUTMT5369_XTAL_IN
0
AR18 AP18
AU16 AT16
A35 C33 B34 D33 D29 C30 D30 B31 A31 B32 A32 C32 D32 A34 C34 C29
SOC_TX SOC_RX
AM20
AM22
R158
AU21
D27
AT21 AR21
T34 T32 T36 U36 T33 T30 V33 V32 V31 V30 T35 T31
N36 T37 R35 R37 R36
R34 R32 R33 P33 P34
N37 P35 N34 N35
AU12 AT12 AR12
A37 C35 A36 B35 B36 B37
AT11 AU11 AR10 AM9 AP10
AN22 AP21
AU20 AT20 AN18 AP20 AM18 AN19 AP19 AR19 AN21 AM19 AN20 AR20
OPT
R159
SOC <- Ext. Demod.
R1005 R1006 R1007 R1008
R1011
R1009
0
EMMC_CMD
EMMC_DATA[7] EMMC_DATA[6] EMMC_DATA[5] EMMC_DATA[4] EMMC_DATA[3] EMMC_DATA[2]
EMMC_DATA[1] EMMC_DATA[0] EMMC_CLK
33
IR
4.7K
STB_SCL STB_SDA
TS_S_IN_1_CLK TS_S_IN_1_VAL TS_S_IN_1_SYNC TS_S_IN_1_DATA
SOC -> P:I
22 22 22 22
+3.3V_NORMAL
R166
2.7K OPT
R169 10K
L/DIM0_SCLK L/DIM0_VS L/DIM0_MOSI
LED_PWM1
5V Tolerance
OPCTRL_11_SCL OPCTRL_10_SDA
100
OPT
DSUB_DET
AV1_CVBS_DET AMP_RESET_SOC OPCTRL3 EXT_SPK_DET
OPCTRL_1_SCL OPCTRL_0_SDA
12pF crystal & load cap.
12pF crystal
PTC Interface
PTC_TX_MTK
PTC_RX_MTK_3.3V
+3.3V_NORMAL
R1001 100
C
E
R172 22
TS_S_OUT_CLK TS_S_OUT_VAL TS_S_OUT_SYNC TS_S_OUT_DATA
R168
4.7K OPT
OPT
R197 1K
PWM1_PULL_DOWN_1K
0.1uF
X100-*1
27.0MHZ
12pF Crystal
C113-*1 8pF 50V
12pF crystal
EMMC_DATA[2-7]
+3.3V_NORMAL
R155 10K
Q1001
MMBT3904(NXP)
B
R1002
10K
OPT
TS_S_IN_0_CLK TS_S_IN_0_DATA
SOC <- P:I
TS_S_IN_0_SYNC TS_S_IN_0_VAL
R161
4.7K OPT
R171
R170
R198 1K
PWM2_PULL_DOWN_1K
C122
C121
0.1uF
OPT
OPT
C115-*1 8pF 50V
R157
4.7K OPT
R178
4.7K OPT
SOC_RESET
C114
0.1uF 16V
OPT
22
PWM_DIM2 PWM_DIM1
22
A_DIM
C120
2.2uF 10V OPT
/USB_OCD2
USB_CTL2
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
xxLT760H-UA
MID_MAIN_1
2011.09.29
8
Page 29
PLACE AT JACK SIDE
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
Port was changed !!!!
To HDMI
+1.2V_MTK_AVDD
VDD3V3
USB2 w/o HUB
HDMI_CEC_MTK
DDC_SCL_2_JACK DDC_SCL_3_JACK
DDC_SCL_4_JACK
DDC_SDA_2_JACK DDC_SDA_3_JACK
DDC_SDA_4_JACK
5V_HDMI_2_JACK 5V_HDMI_3_JACK
5V_HDMI_4_JACK
HDMI_HPD_3_JACK
HDMI_HPD_4_JACK
C303
0.1uF
C304
0.1uF
USB1 w/ HUB
VDD3V3
C308
0.1uF
C302
0.1uF
MTK_HPD
0.1uF
VDD3V3
C306
C307
0.1uF
USB2SER_DP USB2SER_DM
R304 R305
R307 1K
USB_DP1 USB_DM1
USB_DP2 USB_DM2
WIFI_DP WIFI_DM
+1.2V_MTK_AVDD
C316
0.1uF
C314 100pF 50V OPT
C315 100pF 50V OPT
R308
1.2K OPT
R309 100K
Panel Power On/Off
PANEL_CTL
C336
1uF
10V
C337 1uF
10V
C319 10uF 16V
C320 10uF 16V
+1.2V_MTK_AVDD
C350
0.1uF
C312
33pF
Close to MT5369
C310
33pF
R332 10K
C341
0.047uF
For PCB Pattern
PC_L_IN_SOC
PC_R_IN_SOC
HDMI_ARC
Panel Inverter On/Off
PC_R_IN_SOC PC_L_IN_SOC
AV1_R_IN_SOC AV1_L_IN_SOC
TUNER_SIF
R334 51
R335 51
Close to Tuner
MODEL_OPT_8 MODEL_OPT_9
MODEL_OPT_10
AMP_MUTE
EXT_SPK_MUTE
INV_CTL
MODEL_OPT_2
EMMC_RST
C354
0.1uF
AV1_CVBS_IN_SOC
VDD3V3
C347
0.1uF
For PCB Pattern
R311 30K
TU_CVBS
R318 22 R319
R347 0 R348 0
R310 30K
R339
2.2K OPT
+1.2V_MTK_AVDD
DSUB_VSYNC
DSUB_HSYNC
OPT
22
OPT
R338 0
C305
1uF 25V
C352 0.01uF
C351
0.1uF
Close to MT5369
R341 100 R340 100
C358
0.01uF 50V
VDD3V3
R342 10K
0.047uF C355
OSCL2 OSDA2
R343
24K 1%
R337 0
VDD3V3
C362
0.1uF
C363
1uF 25V
TP300
C360 0.047uF C359 0.047uF
C361 1uF
VDD3V3
C329
C330
C364
0.1uF
R333
AV1_CVBS_IN
AV1_L_IN
2K
2K
AVDD33_DAC
AVDD33_DAC1
AVSS33_DAC
AVSS33_DAC1
VDACX_OUT VDACY_OUT
AVDD33_VDAC
AVDD12_RGB
AVSS12_RGB
AVSS33_VDAC
AOCLKN AOCLKP
AECLKN AECLKP
BOCLKN BOCLKP
BECLKN BECLKP
AR0_ADAC AL0_ADAC
AR1_ADAC AL1_ADAC
AR2_ADAC AL2_ADAC
AR3_ADAC AL3_ADAC
ASPDIF0 ASPDIF1
AOBCK AOLRCK AOMCLK
AOSDATA4 AOSDATA3 AOSDATA2 AOSDATA1 AOSDATA0
HSYNC
VSYNC
VGA_SDA VGA_SCL
AO3N AO3P AO4N AO4P
AO2N AO2P AO1N AO1P AO0N AO0P
AE4N AE4P AE3N AE3P
AE2N AE2P AE1N AE1P AE0N AE0P
BO4N BO4P BO3N BO3P
BO2N BO2P BO1N BO1P BO0N BO0P
BE4N BE4P BE3N BE3P
BE2N BE2P BE1N BE1P BE0N BE0P
ALIN
COM SOG
COM1 PB1P PR1P
Y1P SOY1 COM0 PB0P PR0P
Y0P SOY0
RP GP BP
DSUB_VSYNC_SOC
DSUB_HSYNC_SOC
CHANGE SYMBOL
AG3 AG4 AG1 AG2 AF3 AF4 AE3 AE4 AE1 AE2 AD1 AD2
AL3 AL4 AL1 AL2 AK3 AK4 AJ3 AJ4 AJ1 AJ2 AH3 AH4
AT2 AU2 AT1 AU1 AR1 AR2 AP1 AP2 AN1 AN2 AM3 AM4
AT6 AU6 AP6 AR6 AP5 AR5 AT4 AU4 AP4 AR4 AP3 AR3
AN35 AN34
AM32 AM34
AM37 AM33
AM36 AM35
AG30 AF30
AK30 AE30
Y33 AR16 Y32 AR11 AP11 AM12 AM10 AM11 AN11 AN10 AN9
AN25 AM25 AR25 AR24 AU24 AP24 AT24 AR22 AP22
AT26 AR26 AP26 AU26 AP25 AU28 AT28 AR28 AP27 AR27
AU30 AP29
AD20 AD21
AD19
AJ22 AJ21 AL24
TXA4N
TXA4P
TXB4N
TXB4P
R3761.2K R3771.2K
Don’t use as GPIO
C3660.01uF C3670.01uF C3680.01uF C3690.01uF C3701500pF
OPT
R3490 R3500
TXA4N TXA4P TXA3N TXA3P TXACLKN TXACLKP TXA2N TXA2P TXA1N TXA1P TXA0N TXA0P
TXB4N TXB4P TXB3N TXB3P TXBCLKN TXBCLKP TXB2N TXB2P TXB1N TXB1P TXB0N TXB0P
C365
0.01uF
VDD3V3
C397 1200pF
TP301
TP302
TP303
TP304
CH3
CH2
CH1
CH6 CH5 CH4
C398
1200pF
C380
0.1uF
R366 100 R367 100 R368 100
R371 100
R356100 R357100 R358100 R359100
RGB_DDC_SDA RGB_DDC_SCL
DTV/MNT_V_OUT_SOC
+1.2V_MTK_AVDD
C382
0.1uF
AV1_R_IN
R3781.2K R3791.2K
DAC_3V3
C387 22pF
OPT
DSUB_HSYNC_SOC DSUB_VSYNC_SOC
C399 1200pF
C389 22pF OPT
OPT
R324
22
R323
F27 E27 F30 F29 B27 A27 B28 A28 C28 D28 E28 F28 B29
AG6 AJ6 AF6 AE6 AH7
AJ5 AG5 AF5 AE5 AH5
AG7
U35 U34
V35 V34
22
LGE2112
TCON0 TCON1 TCON2 TCON3 TCON4 TCON5 TCON6 TCON7 TCON8 TCON9 TCON10 TCON11 TCON12
AVDD12_LVDS_1 AVDD12_LVDS_2 AVDD12_VPLL AVDD33_LVDSB AVDD33_LVDSA
AVSS12_LVDS_2 AVSS12_LVDS_1 AVSS12_VPLL AVSS33_LVDSB AVSS33_LVDSA
REXT_VPLL
AIN0_R_AADC AIN0_L_AADC AIN1_R_AADC AIN1_L_AADC AIN2_R_AADC AIN2_L_AADC AIN3_R_AADC AIN3_L_AADC AIN4_R_AADC AIN4_L_AADC AIN5_R_AADC AIN5_L_AADC AIN6_R_AADC AIN6_L_AADC
AVDD33_AADC AVSS33_AADC
VMID_AADC
MPXP
ADCINP_DEMOD ADCINN_DEMOD
AVDD33_DEMOD
AVDD12_DEMOD
AVSS33_DEMOD AVSS12_DEMOD
IF_AGC RF_AGC
LOUTN LOUTP
OSCL2 OSDA2
SC0 SY0
CVBS3P CVBS2P CVBS1P CVBS0P CVBS_COM
AVDD33_CVBS_1 AVDD33_CVBS_2
AVSS33_CVBS_1 AVSS33_CVBS_2
R325
OPT
R326
IC105
AVDD33_VDAC_BG
AVSS33_VDAC_BG
5pF 50V OPT
5pF 50V OPT
AU37 AU35 AT35 AT37 AU36 AP34 AT36 AR37 AR33 AP32 AR36 AP37 AR35 AP36
AL31 AJ28
AJ27
AN28
AU32 AT32
AD22
AL27
AM28 AJ26
AP31 AN30
AP28 AR29
AT30 AR30 AR31 AN29 AP30
AK24 AK25
AL25 AM26
ZD300
5.48VTO5.76V
ZD301
5.48VTO5.76V
R328 470K
OPT
R329 470K
OPT
C393 22pF OPT
C3001 1200pF
SPDIF_OUT
ARC
C396 33pF OPT
BLM18PG121SN1D
C344 27pF 50V OPT
1608 sizs For EMI
C338 560pF 50V OPT
1608 sizs For EMI
R345 30K
C339 560pF 50V OPT
AUD_SCK AUD_LRCK AUD_MASTER_CLK AUD_LRCH
R344 30K
C348
R330
C342 100pF 50V
C343 100pF 50V
C340
75
47pF
1%
50V
C345 10uF 16V
C346 10uF 16V
For PCB Pattern
EXT_SPK_ROUT_MAIN EXT_SPK_LOUT_MAIN
100pF 50V
PLACE AT JACK SIDE
C333 / C334 / C335 MTK Recommend : 10 pF
AV1_CVBS_IN_SOC
AV1_L_IN_SOC
AV1_R_IN_SOC
C333 47pF 50V
C335 47pF 50V
C334 47pF 50V
L300
L301
BLM15BD121SN1
L304
BLM15BD121SN1
DSUB_R+
DSUB_G+
DSUB_B+
DTV/MNT_V_OUT_SOC
TP373
BLM15BD121SN1
R322
D301
75
ADLC 5S 02 015
5.5V
R321
D300
75
ADLC 5S 02 015
5.5V
R320
D302
75
ADLC 5S 02 015
5.5V
1608 sizs For EMI
180
C300 560pF 50V
OPT
1608 sizs For EMI
C301 560pF 50V
OPT
C311 1uF
R303
82
C309
OPT
R314
0
R336
0
10V
MAIN_IF_AGC
+5V_NORMAL
PC_L_IN
PC_R_IN
IC105
LGE2112
AA32
HDMI_CEC
AG33
HDMI_0_SCL
AE33
HDMI_1_SCL
AC33
HDMI_2_SCL
AH32
HDMI_3_SCL
AF33
HDMI_0_SDA
AD33
HDMI_1_SDA
AB33
HDMI_2_SDA
AH33
HDMI_3_SDA
AG31
1K
HDMI_0_PWR5V
AE31
1K
HDMI_1_PWR5V
AC31
HDMI_2_PWR5V
AH31
HDMI_3_PWR5V
AG32
HDMI_0_HPD
AE32
HDMI_1_HPD
AC32
HDMI_2_HPD
AJ32
HDMI_3_HPD
AA24
AVDD12_HDMI_0_RX
Y24
AVDD12_HDMI_1_RX
W24
AVDD12_HDMI_2_RX
AB24
AVDD12_HDMI_3_RX
AB29
AVDD33_HDMI_0_RX
AA29
AVDD33_HDMI_1_RX
Y29
AVDD33_HDMI_2_RX
AC29
AVDD33_HDMI_3_RX
AB30
AVSS33_HDMI_RX_1
AD30
AVSS33_HDMI_RX_2
AF31
AVSS33_HDMI_RX_3
AF32
AVSS33_HDMI_RX_4
C36
USB_DP_P0
C37
USB_DM_P0
D36
USB_DP_P1
D37
USB_DM_P1
AT13
USB_DP_P2
AU13
USB_DM_P2
AT14
USB_DP_P3
AU14
USB_DM_P3
D35
AVDD33_USB_P0P1
AP13
AVDD33_USB_P2P3
D34
AVSS33_USB_P1
AR13
AVSS33_USB_P2
W35
PCIE11_TXP
W34
PCIE11_TXN
Y34
PCIE11_RXN
Y35
PCIE11_RXP
U24
AVDD12_PCIE11
V24
AVDD33_PCIE11
W30
AVSS12_PCIE11
W36
PCIE11_REFCKN
W37
PCIE11_REFCKP
HDMI_0_RX_0
HDMI_0_RX_0B
HDMI_0_RX_1
HDMI_0_RX_1B
HDMI_0_RX_2
HDMI_0_RX_2B
HDMI_0_RX_C
HDMI_0_RX_CB
HDMI_1_RX_0
HDMI_1_RX_0B
HDMI_1_RX_1
HDMI_1_RX_1B
HDMI_1_RX_2
HDMI_1_RX_2B
HDMI_1_RX_C
HDMI_1_RX_CB
HDMI_2_RX_0
HDMI_2_RX_0B
HDMI_2_RX_1
HDMI_2_RX_1B
HDMI_2_RX_2
HDMI_2_RX_2B
HDMI_2_RX_C
HDMI_2_RX_CB
HDMI_3_RX_0
HDMI_3_RX_0B
HDMI_3_RX_1
HDMI_3_RX_1B
HDMI_3_RX_2
HDMI_3_RX_2B
HDMI_3_RX_C
HDMI_3_RX_CB
TXVP_0 TXVN_0
RXVN_1 RXVP_1
PHYLED1 PHYLED0
AVDD12_REC
AVDD33_COM
AVDD33_LD
AVSS33_LD AVSS33_COM AVSS12_REC
AG35 AG34 AG37 AG36 AF35 AF34 AH35 AH34
AE37 AE36 AD35 AD34 AC35 AC34 AE35 AE34
AB35 AB34 AA35 AA34 AA37 AA36 AC37 AC36
AK35 AK34 AJ35 AJ34 AJ37 AJ36 AJ33 AK33
AT18 AU18
AU17 AT17
AN16 AM16
AD15
REXT
+1.2V_MTK_AVDD
AD14
AD16 AD17
AL16 AL15 AL14
C323
0.1uF
D0+_HDMI2_JACK D0-_HDMI2_JACK D1+_HDMI2_JACK D1-_HDMI2_JACK D2+_HDMI2_JACK D2-_HDMI2_JACK CK+_HDMI2_JACK CK-_HDMI2_JACK
D0+_HDMI3_JACK D0-_HDMI3_JACK D1+_HDMI3_JACK D1-_HDMI3_JACK D2+_HDMI3_JACK D2-_HDMI3_JACK CK+_HDMI3_JACK CK-_HDMI3_JACK
D0+_HDMI4_JACK D0-_HDMI4_JACK D1+_HDMI4_JACK D1-_HDMI4_JACK D2+_HDMI4_JACK D2-_HDMI4_JACK CK+_HDMI4_JACK CK-_HDMI4_JACK
R31524K
VDD3V3
C328
0.1uF
EPHY_TDP EPHY_TDN
EPHY_RDN EPHY_RDP
EPHY_ACTIVITY EPHY_LINK
MAIN_PDIF
MAIN_NDIF
R300 470K
OPT
R301 470K
OPT
ARC
Close to Tuner
R302
R346 0
R331 0
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
xxLT760H-UA
MID_MAIN_2
2011.09.29
9
Page 30
+3.3V_NORMAL
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
BLM18PG121SN1D
C500 10uF
VDD3V3
L500
L501
BLM18PG121SN1D
POWER_ON/OFF1
VDD3V3
C503 10uF
60mA
C510
0.1uF
AVDD_33SB
C501
0.1uF
TP500
C504
2.2uF
+1.2V_MTK_CORE
+1.2V_MTK_CORE
+1.2V_MTK_CORE +1.2V_MTK_AVDD
+5V_NORMAL
C526 10uF 10V
C506
C524
10uF
10uF
C539
C543
10uF
0.1uF
L502
BLM18PG121SN1D
5600mA
C505 10uF
C546
0.1uF
C525 10uF
IC501
AP1117E33G-13
INADJ/GND
OUT
C529
0.1uF
C548
0.1uF
C502
0.1uF
C532
0.1uF
C550
0.1uF
DAC_3V3
C535
0.1uF
C552
0.1uF
R500 1
C540 10uF 10V
C553
0.1uF
C544
0.1uF 16V
+1.2V_MTK_CORE
AA14 AB14 AC14 AC19
AC15
AC16
AA23
IC105
LGE2112
AR7
VCCK_43
AT7
VCCK_45
AU7
VCCK_47
AP8
VCCK_42
AR8
VCCK_44
AT8
VCCK_46
AU8
VCCK_48
AM7
VCCK_37
AN7
VCCK_39
AP7
VCCK_41
AM8
VCCK_38
AN8
VCCK_40
P14
VCCK_1
R14
VCCK_9
T14
VCCK_11
U14
VCCK_13
V14
VCCK_14
W14
VCCK_16
Y14
VCCK_18 VCCK_20 VCCK_22 VCCK_23 VCCK_28
P15
VCCK_2 VCCK_24
P16
VCCK_3 VCCK_25
V23
VCCK_15
W23
VCCK_17
Y23
VCCK_19 VCCK_21
VCCK_31 VCCK_32 VCCK_36
VCCK_8 VCCK_10 VCCK_12 VCCK_33 VCCK_30
VCCK_7 VCCK_29
VCCK_6 VCCK_27
VCCK_5 VCCK_26
VCCK_4 VCCK_34 VCCK_35
VCC3IO_B_4 VCC3IO_B_2 VCC3IO_B_1 VCC3IO_B_3 VCC3IO_A_5 VCC3IO_A_7 VCC3IO_A_6 VCC3IO_A_8 VCC3IO_A_3 VCC3IO_A_4 VCC3IO_A_2 VCC3IO_A_1
AC22 AC23 AD24 P23 R24 T24 AC24 AC21 P20 AC20 P19 AC18 P18 AC17 P17 AD18 AD23
AL9 AK10 AK9 AK11 H29 J29 H30 J30 G31 G32 F33 E34
+1.2V_MTK_CORE
VDD3V3
AA15 AB15
AA16 AB16
AA17 AB17
R2 R3 J4 R4 Y4 F5 J5 R5 Y5 W5 L7 M7
R7 AA5 AB5
K7
U7
W7
E9
E8
F9 G14
J6 R15 T15 U15 V15 W15 Y15
H11 R16 T16 U16 V16 W16 Y16
R17 T17 U17 V17 Y17 T18 V18 Y18 T19 V19 Y19 W17
R18 AB6 H19 H22 J11 J12 J22
DVSS_51 DVSS_52 DVSS_37 DVSS_53 DVSS_107 DVSS_20 DVSS_38 DVSS_54 DVSS_108 DVSS_95 DVSS_44 DVSS_46 DVSS_56 DVSS_120 DVSS_130 DVSS_43 DVSS_77 DVSS_97 DVSS_13 DVSS_12 DVSS_22 DVSS_28 DVSS_39 DVSS_57 DVSS_68 DVSS_78 DVSS_87 DVSS_99 DVSS_112 DVSS_122 DVSS_132 DVSS_34 DVSS_58 DVSS_69 DVSS_79 DVSS_88 DVSS_100 DVSS_113 DVSS_123 DVSS_133 DVSS_59 DVSS_70 DVSS_80 DVSS_89 DVSS_114 DVSS_71 DVSS_90 DVSS_115 DVSS_72 DVSS_91 DVSS_116 DVSS_101 DVSS_124 DVSS_134 DVSS_60 DVSS_131 DVSS_35 DVSS_36 DVSS_40 DVSS_41 DVSS_42
IC105
LGE2112
DVSS_55 DVSS_62 DVSS_73 DVSS_83
DVSS_92 DVSS_104 DVSS_117 DVSS_127 DVSS_137
DVSS_29
DVSS_63
DVSS_74
DVSS_84
DVSS_93 DVSS_105 DVSS_118 DVSS_128 DVSS_138
DVSS_64
DVSS_75
DVSS_85
DVSS_94 DVSS_106 DVSS_119 DVSS_129 DVSS_139
DVSS_65
DVSS_76
DVSS_86 DVSS_140
DVSS_96
DVSS_30
DVSS_27 DVSS_109
DVSS_17
DVSS_25
DVSS_45
DVSS_66
DVSS_7
DVSS_14
DVSS_8 DVSS_18 DVSS_26 DVSS_33
DVSS_136 DVSS_126
DVSS_49
DVSS_103
DVSS_82 DVSS_61
DVSS_110 DVSS_135 DVSS_125 DVSS_102
DVSS_81
DVSS_121
DVSS_47 DVSS_67 DVSS_98
DVSS_111
DVSS_11 DVSS_21
R6 R20 T20 U20 V20 W20 Y20 AA20 AB20 G16 R21 T21 U21 V21 W21 Y21 AA21 AB21 R22 T22 U22 V22 W22 Y22 AA22 AB22 R23 T23 U23 AB23 W6 G17 F25 Y6 E21 F21 L8 T7 D11 E11 D12 E22 F22 G25 AB19 AA19 P22 W19 U19 R19 Y7 AB18 AA18 W18 U18 AA7 N22 T8 W8 Y8 E7 F8
+3.3V_NORMAL
3.3V_EMMC
L504 BLM18PG121SN1D
C512
0.1uF 16V
+3.3V_NORMAL
EMMC_VCCQ
L506 BLM18PG121SN1D
C522
0.1uF 16V
DECAP FOR SOC (HIDDEN - UCC)
+1.2V_MTK_CORE
C514
0.1uF
+1.5V_DDR
C508
0.1uF
C520
0.1uF
C523
0.1uF
C527
0.1uF
DECAP FOR SOC (BOTTOM)
+1.2V_MTK_CORE
C531
0.1uF
+1.5V_DDR
C536
C533
0.1uF
0.1uF
C537
0.1uF
C545
0.1uF
C547
0.1uF
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
xxLT760H-UA
MID_MAIN_3
2011.09.29
10
Page 31
IC701-*3
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
H5TQ2G63DFR-PBC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
DDR_HYNIX_NEW
H5TQ2G63DFR-PBC
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
M7
M2 N8 M3
J7 K7 K9
L2 K1 J3 K3 L3
T2
F3 G3
C7 B7
E7 D3
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
RVREF_A
RVREF_B
+1.5V_DDR
+1.5V_DDR
R730 1K 1%
R731 1K 1%
R732 1K 1%
R733 1K 1%
+1.5V_DDR
+1.5V_DDR
C750
0.1uF
C745
0.1uF
RVREF_A
C746
0.1uF
C747
0.1uF
C748
0.1uF
C749
0.1uF
@optio
RVREF_B
ARA[0-14]
C752
0.1uF
C751
0.1uF
ARCKE
ARCLK1
/ARCLK1
ARCLK0
/ARCLK0
ARODT /ARRAS /ARCAS
/ARCS
/ARWE
ARREST
ARBA0
ARBA1
ARBA2
C754
0.1uF
C753
0.1uF
+1.5V_DDR
TP700 TP701
ARA[14] ARA[13] ARA[12] ARA[11] ARA[10] ARA[9] ARA[8] ARA[7] ARA[6] ARA[5] ARA[4] ARA[3] ARA[2] ARA[1] ARA[0]
C756
0.1uF
C755
0.1uF
C758
0.1uF
C757
0.1uF
LGE2112
AC1
DDRV_44
AC2
DDRV_45
A3
DDRV_1
A4
DDRV_2
B4
DDRV_5
C4
DDRV_8
D4
DDRV_10
B3
DDRV_4
C3
DDRV_7
AC3
DDRV_46
AC4
DDRV_47
G10
MEMTP
G9
MEMTN
G13
RVREF_B
G21
RVREF_A
F10
ARCKE
D9
ARCLK1
C9
ARCLK1
A20
ARCLK0
A21
ARCLK0
E18
ARODT
F17
ARRAS
E17
ARCAS
E16
ARCS
D14
ARWE
B14
ARRESET
A13
ARBA0
G11
ARBA1
D16
ARBA2
F18
ARCSX
C15
ARA14
A15
ARA13
F13
ARA12
C14
ARA11
F11
ARA10
E15
ARA9
D13
ARA8
B15
ARA7
E14
ARA6
F16
ARA5
E13
ARA4
B13
ARA3
A14
ARA2
F14
ARA1
F15
ARA0
IC105
1uF
C702 1uF
ARDQM0 ARDQS0 ARDQS0
ARDQ0 ARDQ1 ARDQ2 ARDQ3 ARDQ4 ARDQ5 ARDQ6 ARDQ7
ARDQM1 ARDQS1 ARDQS1
ARDQ8
ARDQ9 ARDQ10 ARDQ11 ARDQ12 ARDQ13 ARDQ14 ARDQ15
ARDQM2 ARDQS2 ARDQS2 ARDQ16 ARDQ17 ARDQ18 ARDQ19 ARDQ20 ARDQ21 ARDQ22 ARDQ23
ARDQM3 ARDQS3 ARDQS3 ARDQ24 ARDQ25 ARDQ26 ARDQ27 ARDQ28 ARDQ29 ARDQ30 ARDQ31
AVDD33_MEMPLL AVSS33_MEMPLL
DVSS_50 DVSS_48
10uF 10V
C704 10uF 10V
C19
ARDQM0
C21
ARDQS0
B21 C23 B17 D23 C17 D24 C16 C24 D15
D21 B20 C20 A17 A23 D17 B23 D20 D22 D19 C22
A7 B9 A9 C12 D6 B12 C5 C13 A5 A12 B5
E10 C8 D8 C6 D10 D7 C11 C7 C10 B7 B10
N14 N15
R1 P21
/ARDQS0
ARDQM1 ARDQS1 /ARDQS1
ARDQM2 ARDQS2 /ARDQS2
ARDQM3 ARDQS3 /ARDQS3
AVDD3V3_MEMPLL
AVDD3V3_MEMPLL
0.1uF
ARDQ[0-7]
ARDQ[8-15]
ARDQ[16-23]
ARDQ[24-31]
+3.3V_NORMAL
L700
BLM18PG121SN1D
C700
C701
C703
IC701
H5TQ2G63BFR-PBC
R710
ARA[14]
A_RVREF4
A_RVREF1
+1.5V_DDR
A10/AP
A12/BC
RESET
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
ARA[10]
L7
ARA[11]
R7
A11
ARA[12]
N7
ARA[13]
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
M8
VREFCA
H1
VREFDQ
1%
240
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
DDR_HYNIX
+1.5V_DDR
A_RVREF1
C713
R706
0.1uF 1K 1%
R707 1K
C714
1%
0.1uF
+1.5V_DDR
A_RVREF4
IC701-*2
K4B2G1646C-HCK0
M8
N3
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
VREFCA
A0
P7
A1
P3
A2
H1
N2
VREFDQ
A3
P8
A4
P2
A5
L8
R8
ZQ
A6
R2
A7
T8
A8
B2
R3
VDD_1
A9
D9
L7
VDD_2
A10/AP
G7
R7
VDD_3
A11
K2
N7
VDD_4
A12/BC
K8
T3
VDD_5
A13
N1
VDD_6
N9
M7
VDD_7
NC_5
R1
VDD_8
R9
M2
VDD_9
BA0
N8
BA1
M3
BA2
A1
VDDQ_1
A8
J7
VDDQ_2
CK
C1
K7
VDDQ_3
CK
C9
K9
VDDQ_4
CKE
D2
VDDQ_5
E9
L2
VDDQ_6
CS
F1
K1
VDDQ_7
ODT
H2
J3
VDDQ_8
RAS
K3
H9
VDDQ_9
CAS
L3
WE
J1
NC_1
J9
T2
NC_2
RESET
L1
NC_3
L9
NC_4
T7
F3
NC_6
DQSL
G3
DQSL
C7
A9
DQSU
VSS_1
B3
B7
DQSU
VSS_2
E1
VSS_3
G8
E7
VSS_4
DML
J2
D3
VSS_5
DMU
J8
VSS_6
M1
E3
VSS_7
DQL0
M9
F7
VSS_8
DQL1
P1
F2
VSS_9
DQL2
P9
F8
VSS_10
DQL3
T1
H3
VSS_11
DQL4
T9
H8
VSS_12
DQL5
G2
DQL6
H7
DQL7
B1
VSSQ_1
B9
D7
VSSQ_2
DQU0
D1
C3
VSSQ_3
DQU1
D8
C8
VSSQ_4
DQU2
E2
C2
VSSQ_5
DQU3
E8
A7
VSSQ_6
DQU4
F9
A2
VSSQ_7
DQU5
G1
B8
VSSQ_8
DQU6
G9
A3
VSSQ_9
DQU7
DDR_SS
IC701-*1
NT5CB128M16BP-DI
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_7
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
DDR_NANYA
C715
R708
0.1uF 1K 1%
R709 1K
C716
1%
0.1uF
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
NC_6
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
ARA[0] ARA[1] ARA[2] ARA[3] ARA[4] ARA[5] ARA[6] ARA[7] ARA[8] ARA[9]
ARBA0 ARBA1 ARBA2
ARCKE
/ARCS ARODT /ARRAS /ARCAS /ARWE
ARREST
ARDQS0 /ARDQS0
ARDQS1 /ARDQS1
ARDQM0 ARDQM1
ARA[0-13]
ARCLK0
R712 100 5%
/ARCLK0
ARDQ[0-7]
ARDQ[8-15]
ARCLK1
/ARCLK1
ARDQ[16-23]
ARDQ[24-31]
ARA[0-13]
R714 100 5%
/ARRAS /ARCAS
ARREST
ARDQS2
/ARDQS2
ARDQS3
/ARDQS3
ARDQM2
ARDQM3 ARDQ[16] ARDQ[17] ARDQ[18] ARDQ[19] ARDQ[20] ARDQ[21] ARDQ[22] ARDQ[23]
ARDQ[24] ARDQ[25] ARDQ[26] ARDQ[27] ARDQ[28] ARDQ[29] ARDQ[30] ARDQ[31]
ARBA1 ARBA2
ARCKE
/ARCS ARODT
/ARWE
ARBA0
ARA[0] ARA[1] ARA[2] ARA[3] ARA[4] ARA[5] ARA[6] ARA[7] ARA[8] ARA[9] ARA[10] ARA[11] ARA[12] ARA[13]
IC703
H5TQ2G63BFR-PBC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
DDR_HYNIX
VREFCA
VREFDQ
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
A_RVREF2
M8
A_RVREF3
H1
1%
240
R716
L8
ZQ
+1.5V_DDR
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
ARA[14]
NC_6
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
A_RVREF2
A_RVREF3
IC703-*1
NT5CB128M16BP-DI
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
NC_6
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
DDR_NANYA
+1.5V_DDR
+1.5V_DDR
VREFCA
VREFDQ
ZQ
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
NC_1 NC_2 NC_3 NC_4 NC_7
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
C735
R720
0.1uF 1K 1%
R721 1K
C736
1%
0.1uF
C733
R718
0.1uF 1K 1%
R719 1K
C734
1%
0.1uF
IC703-*2
K4B2G1646C-HCK0
N3
M8
H1
L8
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
J1 J9 L1 L9 T7
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
VREFCA
A0
P7
A1
P3
A2
N2
VREFDQ
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
VDD_1
A9
L7
VDD_2
A10/AP
R7
VDD_3
A11
N7
VDD_4
A12/BC
T3
VDD_5
A13
VDD_6
M7
VDD_7
NC_5
VDD_8
M2
VDD_9
BA0
N8
BA1
M3
BA2
VDDQ_1
J7
VDDQ_2
CK
K7
VDDQ_3
CK
K9
VDDQ_4
CKE
VDDQ_5
L2
VDDQ_6
CS
K1
VDDQ_7
ODT
J3
VDDQ_8
RAS
K3
VDDQ_9
CAS
L3
WE
NC_1
T2
NC_2
RESET
NC_3 NC_4
F3
NC_6
DQSL
G3
DQSL
C7
VSS_1
DQSU
B7
VSS_2
DQSU
VSS_3
E7
VSS_4
DML
D3
VSS_5
DMU
VSS_6
E3
VSS_7
DQL0
F7
VSS_8
DQL1
F2
VSS_9
DQL2
F8
VSS_10
DQL3
H3
VSS_11
DQL4
H8
VSS_12
DQL5
G2
DQL6
H7
DQL7
VSSQ_1
D7
VSSQ_2
DQU0
C3
VSSQ_3
DQU1
C8
VSSQ_4
DQU2
C2
VSSQ_5
DQU3
A7
VSSQ_6
DQU4
A2
VSSQ_7
DQU5
B8
VSSQ_8
DQU6
A3
VSSQ_9
DQU7
DDR_SS
IC703-*3
H5TQ2G63DFR-PBC
M8
H1
L8
ZQ
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
J1 J9 L1 L9 T7
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
M8
N3
VREFCA
A0
P7
A1
P3
A2
H1
N2
VREFDQ
A3
P8
A4
P2
A5
L8
R8
ZQ
A6
R2
A7
T8
A8
B2
R3
VDD_1
A9
D9
L7
VDD_2
A10/AP
G7
R7
VDD_3
A11
K2
N7
VDD_4
A12/BC
K8
T3
VDD_5
A13
N1
VDD_6
N9
M7
VDD_7
NC_5
R1
VDD_8
R9
M2
VDD_9
BA0
N8
BA1
M3
BA2
A1
VDDQ_1
A8
J7
VDDQ_2
CK
C1
K7
VDDQ_3
CK
C9
K9
VDDQ_4
CKE
D2
VDDQ_5
E9
L2
VDDQ_6
CS
F1
K1
VDDQ_7
ODT
H2
J3
VDDQ_8
RAS
H9
K3
VDDQ_9
CAS
L3
WE
J1
NC_1
J9
T2
NC_2
RESET
L1
NC_3
L9
NC_4
T7
F3
NC_6
DQSL
G3
DQSL
A9
C7
VSS_1
DQSU
B3
B7
VSS_2
DQSU
E1
VSS_3
G8
E7
VSS_4
DML
J2
D3
VSS_5
DMU
J8
VSS_6
M1
E3
VSS_7
DQL0
M9
F7
VSS_8
DQL1
P1
F2
VSS_9
DQL2
P9
F8
VSS_10
DQL3
T1
H3
VSS_11
DQL4
T9
H8
VSS_12
DQL5
G2
DQL6
H7
DQL7
B1
VSSQ_1
B9
D7
VSSQ_2
DQU0
D1
C3
VSSQ_3
DQU1
D8
C8
VSSQ_4
DQU2
E2
C2
VSSQ_5
DQU3
E8
A7
VSSQ_6
DQU4
F9
A2
VSSQ_7
DQU5
G1
B8
VSSQ_8
DQU6
G9
A3
VSSQ_9
DQU7
DDR_HYNIX_NEW
+1.5V_DDR
C718
0.1uF
C720
0.1uF
C722
0.1uF
C724
0.1uF
C726
0.1uF
C728
0.1uF
10uF
1uF
10V
C707
C705
@optio
+1.5V_DDR
C708
C719
0.1uF
C721
0.1uF
0.1uF
C725
0.1uF
C717
0.1uF
C723
@optio
IC702
+1.5V_DDR
M8
H1
1% 240
L8
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
J1 J9 L1 L9 T7
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
H5TQ2G63BFR-PBC
VREFCA
VREFDQ
ZQ
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
NC_1 NC_2 NC_3 NC_4 NC_6
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
DDR_HYNIX
A10/AP
A12/BC
RESET
BRBA0 BRBA1 BRBA2
BRCKE
/BRCS BRODT /BRRAS /BRCAS /BRWE
BRREST
BRDQS0 /BRDQS0
BRDQS1 /BRDQS1
BRDQM0 BRDQM1
BRA[0-13]
R713 100 5%
BRCLK0
/BRCLK0
BRDQ[0-7]
BRDQ[8-15]
BRA[0]
N3
A0
BRA[1]
P7
A1
BRA[2]
P3
A2
BRA[3]
N2
A3
BRA[4]
P8
A4
BRA[5]
P2
A5
BRA[6]
R8
A6
BRA[7]
R2
A7
BRA[8]
T8
A8
BRA[9]
R3
A9
BRA[10]
L7
BRA[11]
R7
A11
BRA[12]
N7
BRA[13]
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B_RVREF6
B_RVREF5
R711
B_RVREF5
+1.5V_DDR
C709
R702
0.1uF 1K 1%
R703 1K
C710
1%
0.1uF
+1.5V_DDR
B_RVREF6
IC702-*3
M8
A0
VREFCA A1 A2
H1
A3
VREFDQ A4 A5
L8
A6
ZQ A7 A8
B2
A9
VDD_1
D9
A10/AP
VDD_2
G7
A11
VDD_3
K2
A12/BC
VDD_4
K8
VDD_5
A13
N1
VDD_6
N9
VDD_7
NC_5
R1
VDD_8
R9
VDD_9
BA0 BA1 BA2
A1
VDDQ_1
A8
VDDQ_2
CK
C1
VDDQ_3
CK
C9
VDDQ_4
CKE
D2
VDDQ_5
E9
CS
VDDQ_6
F1
VDDQ_7
ODT
H2
VDDQ_8
RAS
H9
VDDQ_9
CAS WE
J1
NC_1
J9
NC_2
RESET
L1
NC_3
L9
NC_4
T7
NC_6
DQSL DQSL
A9
DQSU
VSS_1
B3
DQSU
VSS_2
E1
VSS_3
G8
VSS_4
DML
J2
VSS_5
DMU
J8
VSS_6
M1
VSS_7
DQL0
M9
VSS_8
DQL1
P1
VSS_9
DQL2
P9
VSS_10
DQL3
T1
VSS_11
DQL4
T9
VSS_12
DQL5 DQL6 DQL7
B1
VSSQ_1
B9
VSSQ_2
DQU0
D1
VSSQ_3
DQU1
D8
VSSQ_4
DQU2
E2
VSSQ_5
DQU3
E8
VSSQ_6
DQU4
F9
VSSQ_7
DQU5
G1
VSSQ_8
DQU6
G9
VSSQ_9
DQU7
DDR_HYNIX_NEW
K4B2G1646C-HCK0
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
IC702-*2
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
DDR_SS
R704 1K 1%
R705 1K 1%
IC702-*1
NT5CB128M16BP-DI
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_7
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
DDR_NANYA
C711
0.1uF
C712
0.1uF
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
NC_6
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
BRA[14]
C727
0.1uF
BRCLK1
/BRCLK1
C706 1uF
BRDQ[16-23]
BRDQ[24-31]
10uF 10V
IC704
BRA[0-13]
R715
100
5%
/BRRAS /BRCAS
BRREST
BRDQS2
/BRDQS2
BRDQS3
/BRDQS3
BRDQM2
BRDQM3 BRDQ[16] BRDQ[17] BRDQ[18] BRDQ[19] BRDQ[20] BRDQ[21] BRDQ[22] BRDQ[23]
BRDQ[24] BRDQ[25] BRDQ[26] BRDQ[27] BRDQ[28] BRDQ[29] BRDQ[30] BRDQ[31]
BRBA0 BRBA1 BRBA2
BRCKE
/BRCS BRODT
/BRWE
BRA[0] BRA[1] BRA[2] BRA[3] BRA[4] BRA[5] BRA[6] BRA[7] BRA[8] BRA[9] BRA[10] BRA[11] BRA[12] BRA[13]
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
VREFCA
VREFDQ
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
NC_1 NC_2 NC_3 NC_4 NC_6
H5TQ2G63BFR-PBC
B_RVREF8
M8
B_RVREF7
H1
1%
240
R717
L8
ZQ
+1.5V_DDR
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
J1 J9 L1 L9 T7
BRA[14]
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
DDR_HYNIX
B_RVREF7
B_RVREF8
+1.5V_DDR
+1.5V_DDR
NT5CB128M16BP-DI
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
NC_6
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
DDR_NANYA
IC704-*1
C739
R724
0.1uF 1K 1%
R725 1K
C740
1%
0.1uF
C737
R722
0.1uF 1K 1%
R723 1K
C738
1%
0.1uF
IC704-*2
K4B2G1646C-HCK0
M8
N3
VREFCA
VREFDQ
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
A0
P7
A1
P3
A2
H1
N2
A3
P8
A4
P2
A5
L8
R8
ZQ
A6
R2
A7
T8
A8
B2
R3
A9
D9
L7
A10/AP
G7
R7
A11
K2
N7
A12/BC
K8
T3
A13
N1 N9
M7
NC_5
R1 R9
M2
BA0
N8
BA1
M3
BA2
A1 A8
J7
CK
C1
K7
CK
C9
K9
CKE
D2 E9
L2
CS
F1
K1
ODT
H2
J3
RAS
H9
K3
CAS
L3
WE
J1
NC_1
J9
T2
NC_2
RESET
L1
NC_3
L9
NC_4
T7
F3
NC_7
DQSL
G3
DQSL
A9
C7
DQSU
B3
B7
DQSU
E1 G8
E7
DML
J2
D3
DMU
J8 M1
E3
DQL0
M9
F7
DQL1
P1
F2
DQL2
P9
F8
DQL3
T1
H3
DQL4
T9
H8
DQL5
G2
DQL6
H7
DQL7
B1 B9
D7
DQU0
D1
C3
DQU1
D8
C8
DQU2
E2
C2
DQU3
E8
A7
DQU4
F9
A2
DQU5
G1
B8
DQU6
G9
A3
DQU7
DDR_SS
+1.5V_DDR
RVREF_C
C741
R726
0.1uF 1K 1%
R727 1K
C742
1%
0.1uF
+1.5V_DDR
RVREF_D
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
R728 1K 1%
R729 1K 1%
IC704-*3
H5TQ2G63DFR-PBC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
DDR_HYNIX_NEW
C743
0.1uF
C744
0.1uF
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
BRA[0-14]
RVREF_D
RVREF_C
BRCLK0
/BRCLK0
BRCLK1
/BRCLK1
BRCKE
BRODT /BRRAS /BRCAS
/BRCS
BRBA0
BRBA1
BRBA2
/BRWE BRA[14] BRA[13] BRA[12] BRA[11] BRA[10] BRA[9] BRA[8] BRA[7] BRA[6] BRA[5] BRA[4] BRA[3] BRA[2] BRA[1] BRA[0]
+1.5V_DDR
IC105
LGE2112
P13
RVREF_C
V7
RVREF_D
F4
BRCLK0
F3
BRCLK0
V4
BRCLK1
V3
BRCLK1
P6
BRCKE
H6
BRODT
H4
BRRAS
H5
BRCAS
K3
BRCS
N1
BRBA0
P5
BRBA1
K4
BRBA2
L4
BRWE
L5
BRA14
M4
BRA13
N5
BRA12
M5
BRA11
P4
BRA10
M3
BRA9
L6
BRA8
L3
BRA7
N4
BRA6
K5
BRA5
N6
BRA4
N2
BRA3
M1
BRA2
N3
BRA1
K6
BRA0
G5
BRCSX
D5
DDRV_11
E5
DDRV_13
T5
DDRV_38
V5
DDRV_42
U5
DDRV_40
E6
DDRV_14
F6
DDRV_18
G6
DDRV_23
U6
DDRV_41
T6
DDRV_39
AC5
DDRV_48
F7
DDRV_19
G7
DDRV_24
AC6
DDRV_49
N7
DDRV_36
P7
DDRV_37
V6
DDRV_43
J10
DDRV_35
H10
DDRV_32
H13
DDRV_33
E20
DDRV_15
F20
DDRV_20
G20
DDRV_27
G15
DDRV_25
G18
DDRV_26
D25
DDRV_12
C25
DDRV_9
B25
DDRV_6
A25
DDRV_3
H7
DDRV_30
H8
DDRV_31
J8
DDRV_34
BRDQM0 BRDQS0 BRDQS0
BRDQ0 BRDQ1 BRDQ2 BRDQ3 BRDQ4 BRDQ5 BRDQ6 BRDQ7
BRDQM1 BRDQS1 BRDQS1
BRDQ8
BRDQ9 BRDQ10 BRDQ11 BRDQ12 BRDQ13 BRDQ14 BRDQ15
BRDQM2 BRDQS2 BRDQS2 BRDQ16 BRDQ17 BRDQ18 BRDQ19 BRDQ20 BRDQ21 BRDQ22 BRDQ23
BRDQM3 BRDQS3 BRDQS3 BRDQ24 BRDQ25 BRDQ26 BRDQ27 BRDQ28 BRDQ29 BRDQ30 BRDQ31
BRRESET
DDRV_16 DDRV_22 DDRV_29 DDRV_21 DDRV_28 DDRV_17 DVSS_15 DVSS_23
DVSS_1 DVSS_3 DVSS_5 DVSS_9
DVSS_16 DVSS_24 DVSS_31 DVSS_32 DVSS_19
DVSS_2 DVSS_4 DVSS_6
DVSS_10
G2
BRDQM0
E4
BRDQS0
E3
/BRDQS0
A1 J1 B2 J2 C2 K1 A2 K2
D1
BRDQM1
F1
BRDQS1
F2
/BRDQS1
J3 B1 H3 D3 G3 C1 G4 D2
Y1
BRDQM2
V2
BRDQS2
V1
/BRDQS2
T4 AB4 P2 AB3 P3 AB1 P1 AB2
U1
BRDQM3
W3
BRDQS3
W4
/BRDQS3
AA3 U4 AA4 T3 Y3 U3 Y2 U2
M2
BRREST
E23 F24 G24 F23 G23 E24 E12 F12 A18 B18 C18 D18 E19 F19 G19 G22 E25 A26 B26 C26 D26
BRDQ[0-7]
BRDQ[8-15]
BRDQ[16-23]
BRDQ[24-31]
+1.5V_DDR
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
xxLT760H-UA
DDR ONE SIDE 12
2011.09.06
Page 32
FROM LIPS & POWER B/D
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
R2461
10K
RL_ON
R2453
10K
L2402-*1
UBW2012-121F
SHENCHEN_NEW
L2402-*2
MLB-201209-0120P-N2
MAG_NEW
L2401-*1
UBW2012-121F
SHENCHEN_NEW
L2401-*2
MLB-201209-0120P-N2
MAG_NEW
OPT
Power_DET
Diodes_NEW IC2402-*1 APX803D29
RESET
2
On-semi
Diodes_NEW
IC2401-*1
APX803D29
RESET
2
+3.5V_ST
+12V
+3.5V_ST
R2463 0
OPT
C
Q2402
B
R2401
+3.5V_ST C2443
C2401
0.1uF 50V
MMBT3904(NXP)
10K
E
L2402
CIS21J121
SS_OLD
C2406
0.1uF 16V
SS_OLD
L2401
CIS21J121
#16/#20/#23 LD - GND OR USE LE(N.L.D.) - OPEN LE(L.D.) - USE
R2408
4.7K
RT1P141C-T112
Q2401 EBC
PWM_DIM2
NORMAL_EXCEPT_32
P2400 FW20020-24S
PWR ON
24V GND GND
3.5V
3.5V GND GND 12V 12V 12V
GND/P.DIM2
1
1
1 3
3
3 5
5
5 7
7
7 9
9
9 11
11
11 13
13
13 15
15
15 17
17
17 19
19
19 21
21 22
21 22 23
23 24
23 24
SLIM_32~55
25
25
SMAW200-H24S2
P2401
NORMAL_32
P2402
FM20020-24
24V
2
2
2
24V
4
4
4
GND
6
6
6
GND
8
8
8
3.5V
10
10
10
3.5V
12
12
12
GND
14
14
14
GND/V-sync
16
16
16
INV ON
18
18
18
A.DIM
20
20
20
P.DIM1
22
Err OUT
24
L2403
CIS21J121
SS_OLD
R2420
0
POWER_16_GND
L2403-*1
UBW2012-121F
SHENCHEN_NEW
C2413
0.1uF 50V
R2423 0 POWER_16_VSYNC
R2462 0
NON_37_LGD
0
R2422
L2403-*2
MLB-201209-0120P-N2
MAG_NEW
+24V
L/DIM0_VS
+3.3V_NORMAL
POWER_24_GND
R2424
4.7K OPT
R2425 100
A_DIM
PWM_DIM1
ERROR_OUT
R2426
10K
INV_CTL
+12V
L2408
BLM18SG121TN1D
C2432
0.01uF 50V
PANEL_CTL
PANEL_POWER
C2433
0.1uF 50V
33K
R2442
10K
R2442-*1
5.6K
R2441-*1
R2437 10K
R2460
10K
MTK_NON_EPI
R2441
1.8K
MTK_NON_EPI
B
MTK_EPI
MTK_EPI
C
Q2406 MMBT3904(NXP)
E
C2435
4.7uF 50V
Q2407
AO3407A
S
D
C2440
1uF
G
25V
OPT
2K
1/8W
R2451
R2452
PANEL_DISCHARGE_REG
PANEL_DISCHARGE_REG
FOR LPB Download
[To LED DRIVER]
FOR LPB MODEL
P2403
12507WR-08L
+12V
VCC
3
1
GND
+24V
VCC
3
1
GND
PD_12V
R2410
2.7K 1%
R2409
1.2K 1%
PD_24V R2412
8.2K 1%
PD_24V R2411
1.5K 1%
PD_12V
+3.5V_ST
+3.5V_ST
OPT R2413 0 5%
PD_3.5V R2429 0 5%
C2411
0.1uF 16V
C2410
0.1uF 16V
VCC
VCC
R2417 100K
IC2402
NCP803SN293
Onsemi_OLD 3
1
GND
R2416 100K
OPT
IC2401
NCP803SN293
3
1
GND
+3.5V_ST
R2421 10K OPT
R2419
RESET
2
RESET
2
100
R2418 100
OPT
POWER_DET
C2412
0.1uF 16V
not to RESET at 8kV ESD
24V-->3.48V 12V-->3.58V
ST_3.5V-->3.5V
+12V
L2407 BLM18PG121SN1D
C2415 10uF 16V
+5V_Normal
+3.5V_ST
1%
R2415
R2439
10K
56K
10K 1%
POWER_ON/OFF2_3
R1
C2416 100pF
50V
R2
R2457
R2435 10K
C24001
0.1uF 16V
C2417 1uF 10V
VREG5
C2428 3300pF 50V
VFB
IC2404
TPS54327DDAR
EN
1
2
3
SS
4
3A
9
THERMAL
8
7
6
5
[EP]GND
VIN
VBST
SW
GND
C2429
0.1uF 16V
L2409
3.6uH
NR8040T3R6N
+5V_NORMAL
C2430 22uF 10V
1
2
3
4
JP2411
5
6
7
8
9
FOR LPB MODEL
R2458
33
FOR LPB MODEL
R2459
33
I2C_SCL5
I2C_SDA5
TYP 1450mA
PANEL_VCC
2K
0.1uF
1/8W
50V
L2400
BLM18PG121SN1D
Placed on SMD-TOP
C2402
C2400
10uF
10uF
16V
16V
+12V
C2403
0.1uF 16V OPT
IC2400
AOZ1038PI
[EP]LX
THERMAL
*NOTE 17
NC_2
8
OPT
R24000
NC_1
9
7
EN
6
R2402
3.3K
COMP
5
C2404
0.1uF 16V
PGND
1
VIN
2
AGND
3
FB
4
Vout=0.8*(1+R1/R2)
C2405
4700pF
50V
R2403
L2412
+3.3V_TU_IN
C2436
0.1uF 16V
POWER_ON/OFF1
POWER_ON/OFF2_1 POWER_ON/OFF2_2 POWER_ON/OFF2_3 POWER_ON/OFF2_4
+3.5V_ST
BLM18PG121SN1D
DDR MAIN 1.5V
+3.5V_ST
10K
VIN_3
EP[GND]
1
THERMAL
2
3
TPS54319TRE
4
5
AGND
10K
R2430
17
IC2403
3A
3A
15EN16
6
VSENSE
R2455
C2420
0.1uF 16V
7
COMP
BOOT14PWRGD
13
12
11
10
9
8
RT/CLK
1/16W 5%
$ 0.145
POWER_ON/OFF2_1
C2423
0.1uF
16V
PH_3
PH_2
PH_1
SS/TR
R2432
330K1/16W 5%
R2431 15K
C2422
0.01uF 50V
4700pF
NR8040T3R6N
C2421
50V
L2406
3.6uH
C2424 10uF
10V
C2425 10uF
10V
C2446 10uF 10V
C2447 10uF
10V
R2433 56K
1/16W
1%
R2434
47K 1%
R1
R2
+1.5V_DDR
C2426 100pF 50V
C2427
0.1uF 16V
+12V
L2410
BLM18PG121SN1D
C2431 10uF 16V
+3.3V_NORMAL
VIN2
VIN1
VBST
PGND2
PGND1
SW2
SW1
IC2405
TPS54425PWPR
14
13
12
4A
11
10
9
8
THERMAL
15
C2434
0.1uF 50V
[EP]PGND
1
2
3
4
5
6
7
+3.3V_NORMAL
VO
VFB
VREG5
SS
GND
PG
EN
R2407
100K
C2437
0.1uF
Vout=(0.763+0.0017*Vout.set)*(1+R1/R2)
C2438 1uF 10V
C2439
3300pF
50V
R2414 10K
L2411
2uH
+3.5V_ST
R1
10K
R2456
POWER_ON/OFF2_2
C2442 22uF 10V
MAX 3.4 A
R2
R2427 33K 1%
C2444 22uF 10V
R2428 10K
1%
C2445 22pF 50V
+3.3V_NORMAL
+1.2V_MTK_CORE
L2404
2uH
C2407
C2408
10uF
10uF
10V
10V
+3.5V_ST
10K
10K
R2454
POWER_ON/OFF1
C2409 10uF 10V
C2414 10uF 10V
C2441 3300pF 50V OPT
R2404
R2406
10K
1%
5.6K
1%
R1
R2
+3.5V_ST
C2448 10uF 10V
L2405
BLM18PG121SN1D
C2418
C2419
10uF
0.1uF
10V
16V
VIN_1
VIN_2
GND_1
GND_2
Vout=0.827*(1+R1/R2)=1.521V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
xxLT760H-UA
MID_POWER
2011.09.29
24
Page 33
SHIELD
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
YKF45-7058V
20
JK3301
19
HPD
18
+5V_POWER
17
DDC/CEC_GND
16
SDA
15
SCL
14
NC
13
CEC
12
CLK-
11
CLK_SHIELD
10
CLK+
9
DATA0-
8
DATA0_SHIELD
7
DATA0+
6
DATA1-
5
DATA1_SHIELD
4
DATA1+
3
DATA2-
2
DATA2_SHIELD
1
DATA2+
5V_HDMI_4_JACK
MMBT3904(NXP)
R3307
100K
R3308 100
R3309 100
0
0
0
0
0
0
0
0
CEC_REMOTE
CK-_HDMI4_JACK
CK+_HDMI4_JACK
D0-_HDMI4_JACK
D0+_HDMI4_JACK
D1-_HDMI4_JACK
D1+_HDMI4_JACK
D2-_HDMI4_JACK
D2+_HDMI4_JACK
R33 41
R33 42
R33 43
R33 44
R33 45
R33 46
R33 47
R33 48
Close to Connector
For ESD
C
Q3301
E
DDC_SDA_4_JACK
DDC_SCL_4_JACK
R3310
1K
R3311 1K
B
R3312
4.7K
HPD_PULL_UP
HDMI_HPD_4_JACK
R3372 10K HPD_PULL_DOWN
UI : HDMI2
BODY_SHIELD
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
RSD-105156-100
JK3303
HOT_PLUG_DETECT
VDD[+5V]
DDC/CEC_GND
SDA
SCL
RESERVED
CEC
TMDS_CLK-
TMDS_CLK_SHIELD
TMDS_CLK+
TMDS_DATA0-
TMDS_DATA0_SHIELD
TMDS_DATA0+
TMDS_DATA1-
TMDS_DATA1_SHIELD
TMDS_DATA1+
TMDS_DATA2-
TMDS_DATA2_SHIELD
TMDS_DATA2+
5V_HDMI_3_JACK
MMBT3904(NXP)
R3327
100K
R3328 100
R3329 100
C
Q3303
E
DDC_SDA_3_JACK
DDC_SCL_3_JACK
CEC_REMOTE
CK-_HDMI3_JACK
CK+_HDMI3_JACK
D0-_HDMI3_JACK
D0+_HDMI3_JACK
D1-_HDMI3_JACK
D1+_HDMI3_JACK
D2-_HDMI3_JACK
D2+_HDMI3_JACK
R3330
1K
R3331 1K
B
UI : HDMI3
R3336
4.7K HPD_PULL_UP
HDMI_HPD_3_JACK
R3373
10K
HPD_PULL_DOWN
5V_HDMI_2_JACK
C3301
0.1uF 16V
R3324 47K
+5V_NORMAL
A1
A2 MMBD6100 D3301
C
R3326 47K
DDC_SCL_2_JACK
DDC_SDA_2_JACK
5V_HDMI_3_JACK
C3302
0.1uF 16V
R3337 47K
5V_HDMI_4_JACK
C3303
0.1uF 16V
R3338 47K
+5V_NORMAL
A1
A2
MMBD6100 D3302
C
R3339 47K
+5V_NORMAL
A1
A2
MMBD6100 D3303
C
R3340 47K
DDC_SCL_3_JACK
DDC_SDA_3_JACK
DDC_SCL_4_JACK
DDC_SDA_4_JACK
SHIELD
YKF45-7058V
20
JK3302
19
HPD
18
+5V_POWER
17
DDC/CEC_GND
16
SDA
15
SCL
14
NC
13
CEC
12
CLK-
11
CLK_SHIELD
10
CLK+
9
DATA0-
8
DATA0_SHIELD
7
DATA0+
6
DATA1-
5
DATA1_SHIELD
4
DATA1+
3
DATA2-
2
DATA2_SHIELD
1
DATA2+
5V_HDMI_2_JACK
Q3302
R3313
MMBT3904(NXP)
100K
R3314 100
R3315 100
R33 00 0
JP3300 R33 49
0
R33 50
0
R33 51
0
R33 52
0
R33 53
0
R33 54
0
R33 55
0
R33 56
0
Close to Connector
For ESD
R3317 1K
R3318
4.7K HPD_PULL_UP
R3374 10K HPD_PULL_DOWN
R3316
1K
C
B
E
DDC_SDA_2_JACK
DDC_SCL_2_JACK
CEC_REMOTE
CK-_HDMI2_JACK
CK+_HDMI2_JACK
D0-_HDMI2_JACK
R3300 MTK Recommend : 0 Ohm
D0+_HDMI2_JACK
D1-_HDMI2_JACK
D1+_HDMI2_JACK
D2-_HDMI2_JACK
D2+_HDMI2_JACK
UI : HDMI1
HDMI_HPD_2_JACK
HDMI_ARC
HDMI_HPD_2_JACK
HPD SWITCH
HPD_CTL CONNECTION
HPD_CTL
+3.5V_ST
B0 - AL MTK_HPD
H B1 - A
C3306
0.1uF
SELECT
VCC
A
IC3301
NLASB3157DFT2G
6
5
4
R3375 0
OPT
PTC_HPD
1
2
3
For CEC
+3.5V_ST
R3302 68K
OPT
OPT
D3304
CEC_REMOTE
From HDMI Connector
B1
R3376 0
GND
B0
R3377 0
PTC_HPD
MTK_HPD
OPT
D3306
AVRL161A1R1NT
GND
SBD
Q3300
G
BSS83
C3304
0.1uF MMBT3904(NXP)
16V
GND
+3.5V_ST
R3360 68K
D3305
SBD
OPT
D3307
AVRL161A1R1NT
GND
Q3304
G
BSS83
GND
C3305
0.1uF 16V
R3361
+3.5V_ST
Q3306
62K
MMBT3904(NXP)
C
E
GND
R3303
62K
OPT
R3365
10K
B
+3.5V_ST
Q3305
R3370 22
R3367
10K
R3371 22
R3362
10K
C
E
GND
HDMI_CEC_MTK
To MTK
IC3300
74LX1G14CTR
VCC
5
1Y
4
NC
1
1A
2
GND
3
HDMI_CEC_PTC
R3368 10K
R3369
GND
OPT
CEC_CTL
POWER_ON/OFF1
10K
To PTC
R3363 10K
B
R3366 10K OPT
R3364 10K
OPT
CEC_CTL
POWER_ON/OFF1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
xxLT760H-UA
HDMI 4
2011.09.29
33
Page 34
RGB PC
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
DSUB_VSYNC
DSUB_HSYNC
DSUB_B+
E0
E1
E2
VSS
IC3600
M24C02-RMN6T
1
2
3
4
D3615
D3616 30V
RGB_5V
RGB_5V
A1
C
A2
MMBD6100
D3620
R3641
R3642
2.7K
2.7K
VCC
8
WC
7
SCL
6
SDA
5
OPT
30V
OPT
C3633
C3634 18pF
18pF
50V
50V
D3621 ADUC 5S 02 0R5L
5.5V OPT
+5V_NORMAL
R3643 22
R3644 22
D3622 ADUC 5S 02 0R5L
5.5V OPT
RGB_DDC_SCL
RGB_DDC_SDA
SPDIF OUT
SPDIF_OUT
OPT
R3620
2.7K R3615 33
D3613
5.5V
OPT
ADUC 5S 02 0R5L
+3.3V_NORMAL
C3615
0.1uF
16
SHILED
+3.3V_NORMAL
R3646 10K
D3623
5.6V
DSUB_DET
DSUB_G+
DSUB_R+
RED2GREEN3BLUE4GND_15DDC_GND
RED_GND7GREEN_GND8BLUE_GND9NC10SYNC_GND
Closed to JACK
Diode_OLD
Diode_OLD
D3625
5.6V
PC AUDIO
D3624
5.6V
PC_R_IN
for EMI_Cap
D3624-*1 18pF 50V
PC_L_IN
for EMI_Cap
D3625-*1 18pF 50V
JK3604
PEJ027-04
E_SPRING
3
T_TERMINAL1
6A
B_TERMINAL1
JK3602
2F01TC1-CLM97-4F
GND
JP3605
JP3606
JP3607
16V
1
VCC
2
VIN
3
Fiber Optic
4
SHIELD
7A
4
5
7B
6B
R_SPRING
T_SPRING
B_TERMINAL2
T_TERMINAL2
GND_212DDC_DATA13H_SYNC14V_SYNC15DDC_CLOCK
6
JK3603
SPG09-DB-010
1
11
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
xxLT760H-UA
JACK HIGH / MID
2011.09.29
36
Page 35
RS232C
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
0.1uF
0.1uF
C38000.1uF
C3801
C38020.1uF
C3803
DOUT2
L3800-*1
CB2012PK501T
SAMHWA_NEW
1A@5V /1A@12V FOR COMMERCIAL(RS-232C POWER)
EXT_5V
EXT_12V
SS_OLD
L3801
L3800
C3804
0.1uF
+3.5V_ST
IR_OUT
R3811
OPT
4.7K OPT
IC3800 MAX3232CDR
C1+
1
V+
2
C1-
3
C2+
4
C2-
5
V-
6
7
RIN2
8
EAN41348201
+3.5V_ST
VCC
16
GND
15
DOUT1
14
RIN1
13
ROUT1
12
DIN1
11
DIN2
10
ROUT2
9
D3804 20V
R3814
OPT
100
R3820
L3802
EXT_5V
100
R3821
+3.5V_ST
D3805 20V
OPT
4.7K OPT
50V
BAP70-02
D3803
CB2012PK501T
SAMHWA_NEW
JP3804
JP3805
JP3808
JP3806
JP3809
1K
R3834
JP3803
RS232_RX
RS232_TX
CB2012PK501T
SAMHWA_NEW
10
9
8
7
6
SPG09-DB-009
JK3803
FOR COMMERCIAL
5
4
3
2
1
CVBS1 REAR JACK
JK3800
PPJ233-01
[RD]E-LUG
5C
[RD]O-SPRING
4C
[RD]CONTACT
[WH]C-LUG
[YL]CONTACT
[YL]O-SPRING
[YL]E-LUG
L-MONO
3C
4B
3A
4A
5A
JP3800
JP3801
JP3802
ESD For MTK : D3800, D3801, D3802
D3800
5.6V
D3801
5.6V
D3802
5.6V
+3.3V_NORMAL
R3803
2.7K
R3806
AV1_R_IN
AV1_L_IN
AV1_CVBS_IN
1K
AV1_CVBS_DET
L3802-*1
L3801-*1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
xxLT760H-UA
JACK_COMMON
2011.09.29
38
Page 36
IR
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
IR & KEY
R4101
Q4100
2SC3052
47K OPT
OPT
+3.5V_ST
C
E
R4100 0
+3.3V_NORMAL
+3.5V_ST
R4118
R4117
10K
10K
1%
1%
R4113 100
KEY1
+3.5V_ST
R4109
Q4102
2SC3052
+3.5V_ST
OPT
R4107
3.3K
+3.5V_ST
1K
C
E
R4111
10K
B
COMMERCIAL_EU
Q4104
2SC3052
R4115
+3.5V_ST
1K
C
E
R4119
47K
B
R4103
47K
R4102
OPT
10K
B
OPT
Q4101
2SC3052
R4104
47K
C
B
E
OPT
OPT
COMMERCIAL
COMMERCIAL_EU
R4105
IR_OUT
22
COMMERCIAL_EU
KEY2
R4114 100
L4102
BLM18PG121SN1D
L4103
BLM18PG121SN1D
C4100
0.1uF
C4102
0.1uF D4100
AMOTECH
C4107 100pF
50V
5.6V
D4101
AMOTECH
D4104
5.6V
AMOTECH
5.6V
To SOC
LED_W/LG_LOGO
I2C_SCL2 I2C_SCL3
I2C_SDA2 I2C_SDA3
+3.5V_ST
LED_R
BLM18PG121SN1D
C4110
0.1uF 16V
OPT
BLM18PG121SN1D
C4103
0.1uF 16V
OPT
R4125 1.5K
R4126 1.5K
R4123 100
R4127 100
OPT
R4124 100 R4128 100
OPT
L4101
C4109
0.1uF 16V
L4100
C4101
0.1uF 16V
OPT
D4105
CDS3C05HDMI1
5.6V
C4108 1000pF 50V
C4104 1000pF 50V
R4129
0
D4106 CDS3C05HDMI1
5.6V
P4102
12507WR-10L
1
2
3
4
5
6
7
8
9
10
11
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R4108 0
COMMERCIAL_US
Zener Diode is
close to wafer
xxLT760H-UA
IR / KEY
2011.09.26
41
Page 37
USB To SERIAL I/F
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
+3.3V_NORMAL
C4313
0.1uF 16V
M_REMOTE
M_REMOTE
L4301
BLM18PG121SN1D
+3.3V_USB2SER
91K
OPT
R4307
OPT
R4308
100K
+3.3V_USB2SER
1%
1%
USB2SER_DP
USB2SER_DM
C4312
0.1uF 16V M_REMOTE
C4310
0.01uF 25V
M_REMOTE
C4311
0.1uF 16V M_REMOTE
C4309
0.1uF 16V
M_REMOTE
M_REMOTE_DEV
R4302
R4303
M_REMOTE_DEV
/USB2SER_RESET
33
33
22pF
C4318
M_REMOTE
M_REMOTE
+3.3V_USB2SER
10K
R4310
R4301 1.5K
M_REMOTE
C4317
+3.3V_USB2SER
VREGEN
SUSPEND
22pF
M_REMOTE
R4309 15K M_REMOTE
C4314
1uF M_REMOTE
VCC_1
VDD18
GND_1
PUR
DP
DM
[EP]
1
THERMAL
2
33
3
4
TUSB3410RHBR
5
6
7
8
9
SDA11SCL
RESET
C4316
20pF
M_REMOTE
IC4304
10
GND_3
P3.430P3.331P3.132P3.0
29
M_REMOTE
12
CTS14DSR15DCD
WAKEUP
M_REMOTE
X4300
12MHz R4305
1M 1% OPT
X1/CLKI
28
13
M_REMOTE
R4306
26X227
10K
C4315
20pF
M_REMOTE
VCC_2
25
TEST1
24
TEST0
23
CLKOUT
22
DTR
21
RTS
20
SOUT/IR_SOUT
19
GND_2
18
SIN/IR_SIN
17
16
RI/CP
+3.3V_USB2SER
R4304
M_REMOTE
10K
M_REMOTE_TX
M_REMOTE_RX
USB_WIFI
+5V_USB
L4302
BLM18PG121SN1D
C4319
0.1uF 16V
WIFI
For EMI
WIFI_DM
WIFI_DP
To SOC
WIFI
C4320
0.1uF 16V
WIFI
C4321
10uF
WIFI
+5V_USB FOR USB
+12V
L4305
BLM18PG121SN1D
C4339
10uF
10V
10V
WIFI
OPT
D4300
RCLAMP0502BA
MAX 0.4A
P4301
12507WR-04L
WIFI
VDD
1
DM
2
DP
3
GND
4
5
.
C4324 10uF 16V
C4326
0.1uF 50V
[EP]PGND
Vout=(0.763+0.0017*Vout.set)*(1+R1/R2)=4.98V
VIN2
VIN1
VBST
PGND2
PGND1
SW2
SW1
IC4305
TPS54425PWPR
14
13
12
4A
11
10
9
8
THERMAL
15
+5V_USB
VO
1
VFB
2
VREG5
3
SS
4
GND
5
PG
6
EN
7
R4328
100K
C4327 1uF 10V
C4329
3300pF
50V
R4329 10K
C4328
0.1uF L4308
2uH
+3.5V_ST
R1
10K
R4344
POWER_ON/OFF2_4
C4333 22uF 10V
R4330 120K 1%
C4334 22uF 10V
R4331 22K
1%
R2
C4332 22pF 50V
+5V_USB
/USB_OCD1
USB_CTL1
USB_DM1
USB_DP1
To SOC
R4327
USB2
+3.3V_NORMAL
R4323
10K
10K
OPT
+5V_USB
IN_1
IN_2
ILIM_SEL
IC4303
TPS2554
GND
1
2
3
4
EN
5
11
THERMAL
[EP]
FAULT
10
OUT_2
9
OUT_1
8
ILIM0
7
ILIM1
6
R4341
27K
1/10W
OPT
R4300
27K
1/10W
C4323
10uF
10V
D4303
USB_DIODE
RCLAMP0502BA
DVR Ready MAX 1.8A
JK4303
1234
USB DOWN STREAM
3AU04S-345-ZC-H-LG
5
/USB_OCD2
USB_CTL2
USB_DM2
USB_DP2
To SOC
R4311
10K OPT
R4312
10K
+5V_USB
+3.3V_NORMAL
IN_1
IN_2
ILIM_SEL
IC4306
TPS2554
GND
1
2
3
4
EN
5
11
THERMAL
[EP]
FAULT
10
OUT_2
9
OUT_1
8
ILIM0
7
ILIM1
6
R4313
27K
1/10W
OPT
R4314
27K
1/10W
C4340
10uF
10V
D4304
USB_DIODE
RCLAMP0502BA
DVR Ready MAX 1.8A
USB1
(HUB)
JK4304
1234
USB DOWN STREAM
3AU04S-345-ZC-H-LG
5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
xxLT760H-UA
USB3_HUB_WiFi
2011.09.29
43
Page 38
ZigBee_Radio Pulse M_REMOTE OPTION
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
P4800
12507WR-08L
M_REMOTE
9
+3.3V_NORMAL
L4800
120-ohm
3.3V
1
GND
2
RX
3
TX
4
RESET
5
DC
6
DD
7
GND
8
C4800
0.1uF
M_REMOTE
AR4800 100 1/16W
M_REMOTE
M_REMOTE_RX
M_REMOTE_TX
M_RFModule_RESET
M_RFModule_ISP
3D_SYNC_RF
Only For PDP
3D_SYNC_RF
M_REMOTE_RX
M_REMOTE_TX
ALL M_REMOTE OPTION
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
xxLT760H-UA
MOTION REMOTE
2011.06.04
48
Page 39
L5400-*1
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
UBW2012-121F
SHENCHEN_NEW
L5400-*2
MLB-201209-0120P-N2
MAG_NEW
Q1801
+24V
DUAL COMPONENT
1ST : 0TRIY80001A 2ND : 0TR387500AA
+24V_AMP
SS_OLD
L5400
CIS21J121
C5400
0.1uF 50V
AMP_MUTE
AUD_LRCH
AUD_LRCK
AUD_SCK
I2C_SDA1
I2C_SCL1
C5401
0.1uF 50V
R5400
10K
C5402 100pF
50V
R5402 100
R5403 100
+3.5V_ST
C
B
E
C5403 1000pF
50V
R5404
3.3K
R5401
10K
Q5400
MMBT3904(NXP)
R5405
100
C5405
10uF
10V
C5406 33pF 50V
C5404
1000pF
From SOC
C5409
C5407
10uF
10V
4.7uF 10V
OPT C5410 10uF
10V
C5408 33pF 50V
50V
BLM18PG121SN1D
C5411
0.1uF 16V
C5412
0.1uF 16V
AMP_RESET_SOC
+3.3V_NORMAL
L5401
C5413
0.1uF 16V
33
R5421
AUD_MASTER_CLK
OPT C5414 10uF 10V
AGND_PLL AVDD_PLL DVDD_PLL
LF
DGND_PLL
GND_1
DGND DVDD
SDATA
WCK BCK SDA
R5422 10K
[EP]
1 2 3 4 5 6 7 8 9 10 11 12
C5415
1000pF
50V
GND_IO
CLK_I
VDD_IO
46
47
48
THERMAL
49
NTP-7500L
13
14
15
SCL
/FAULT
MONITOR0
50V
C5416
BST1A
/RESET
AD
43
44
45
IC5400
0x54
16
17
18
BST2B
MONITOR1
MONITOR2
C5417
22000pF
50V
22000pF
OUT1A_2
PGND1A
41
42
19
20
PGND2B
OUT2B_1
PVDD1_2
PVDD1_3
OUT1A_1
38
39
40
21
22
23
OUT2B_2
PVDD2_1
PVDD2_2
+24V_AMP
C5418
0.1uF 50V
PVDD1_1
37
36 35 34 33 32 31 30 29 28 27 26 25
24
PVDD2_3
C5420
0.1uF 50V
OUT1B_2 OUT1B_1 PGND1B BST1B VDR1 VCC_5 AGND VDR2 BST2A PGND2A OUT2A_2 OUT2A_1
+24V_AMP
C5419
0.1uF 50V
C5421
0.1uF 50V
C5422 10uF 35V
OPT
R5406
3.3 OPT
C5424
0.01uF 50V
C5423 10uF 35V
C5425 22000pF
50V
C5426 22000pF 50V
C54 27 1uF 25V
D5400
1N4148W
100V
OPT
D5401
1N4148W
100V
OPT
D5402
1N4148W
100V
OPT
D5403
1N4148W
100V
OPT
1uF 25V
C54 28
R5407
12
C5429 390pF
50V
C5430 390pF
50V
R5408
12
R5409
12
C5431 390pF
50V
C5432 390pF
50V
R5410
12
C5433 1uF 25V
R5414
12
R5412
12
R5413
12
R5411
12
L5404
10.0uH
NRS6045T100MMGK
L5405
10.0uH
NRS6045T100MMGK
L5402
10.0uH
NRS6045T100MMGK
L5403
10.0uH
NRS6045T100MMGK
C5434
0.47uF 50V
C5435
0.47uF 50V
C5436
0.1uF 50V
C5437
0.1uF 50V
C5438
0.1uF 50V
C5439
0.1uF
50V
R5415
5.1K
R5416
5.1K
R5417
5.1K
R5418
5.1K
SPK_L+
SPEAKER_L
SPK_L-
SPK_L+
SPK_L-
SPK_R+
SPK_R-
SPK_R+
SPEAKER_R
SPK_R-
WAFER-ANGLE
4
3
2
1
P5400
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
xxLT760H-UA
2011.04.30
54AMP_NEO
Page 40
LVDS
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
LVDS_51PIN
P7100
FI-RE51S-HF-J-R1500
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
GND
[51Pin LVDS OUTPUT Connector]
NC
NC
NC
NC
NC
AUO_65_MIRROR
LVDS_SEL
NC
NC
L/DIM_ENABLE
GND
RA0N
RA0P
RA1N
RA1P
RA2N
RA2P
GND
RACLKN
RACLKP
GND
RA3N
RA3P
RA4N
RA4P
GND
BIT_SEL
RB0N
RB0P
RB1N
RB1P
RB2N
RB2P
GND
RBCLKN
RBCLKP
GND
RB3N
RB3P
RB4N
RB4P
GND
GND
GND
GND
GND
NC
VLCD
VLCD
VLCD
VLCD
OPC_EN : Only LGD32" & LGD37"
R7107 33
37_LGD
PANEL_VCC
LVDS_SEL
PWM_DIM1
TXA0N
TXA0P
TXA1N
TXA1P
TXA2N
TXA2P
TXACLKN
TXACLKP
TXA3N
TXA3P
BIT_SEL
TXB0N
TXB0P
TXB1N
TXB1P
TXB2N
TXB2P
TXBCLKN
TXBCLKP
TXB3N
TXB3P
L7100 BLM18SG121TN1D
C7100
C7101
10uF
1000pF
16V
50V
OPT
OPT
OPC_SEL
+3.3V_NORMAL
OPT
R7109 0
C7102
0.1uF 50V
OPT
[30Pin LVDS OUTPUT Connector]
LVDS_30PIN
P7101
FF10001-30
1
R7108 0
2
3
4
BIT_SEL
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
BIT_SEL
+3.3V_NORMAL
R7103
3.3K BIT_SEL_HIGH
R7104 10K
BIT_SEL_LOW
R7105
1K
37_LGD
R7106 10K OPT
OPC_EN
OPT
TXA3P
TXA3N
TXACLKP
TXACLKN
TXA2P
TXA2N
TXA1P
TXA1N
TXA0P
TXA0N
LVDS_SEL
LVDS_SEL
+3.3V_NORMAL
R7101
3.3K
LVDS_SEL
LVDS_SEL_HIGH
R7102 10K
LVDS_SEL_LOW
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
xxLT760H-UA
LVDS_HIGH_MID
2011.08.11
71
Page 41
LOCAL DIMMING
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
[To LED DRIVER]
LOCAL_DIM
P7600
12507WR-08L
1
2
3
4
5
6
7
8
9
JP7605
JP7606
+3.3V_NORMAL
R7600 10K OPT
R7601 10K
LOCAL_DIM
AR7600
33
1/16W
LOCAL_DIM
R7606 33
LOCAL_DIM
R7607
4.7K LOCAL_DIM
L/DIM0_SCLK
L/DIM0_MOSI
I2C_SCL1
I2C_SDA1
L/DIM0_VS
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
xxLT760H-UA
LOCAL DIMMING
2011.04.30
76
Page 42
eMMC I/F
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
EMMC_DATA[0-7]
R8107-*1 47K
AR8100 22 1/16W
AR8101 22 1/16W
AR8102 22
EMMC_VCCQ
R8100 10K
OPT
R8101 10K
C8100
0.1uF 16V
EMMC DATA LINE 10K PULL/UP
R8102 10K
R8103 10K
R8104 10K
R8105 10K
R8106 10K
R8107 10K
C8107 10pF
OPT
50V
DAT3
EMMC DATA LINE 47K PULL/UP
R8100-*1 47K
R8102-*1 47K
R8101-*1 47K
EMMC_DATA[0] EMMC_DATA[1] EMMC_DATA[2]
EMMC_DATA[3]
EMMC_DATA[4] EMMC_DATA[5] EMMC_DATA[6] EMMC_DATA[7]
EMMC_CLK EMMC_CMD EMMC_RST
R8105-*1 47K
R8104-*1 47K
R8103-*1 47K
R8106-*1 47K
Don’t Connect Power At VDDI
(Just Interal LDO Capacitor)
DAT4
DAT5
DAT6
10K
R8117
EMMC_CLK_BALL
EMMC_CMD_BALL
10K
R8116
EMMC_RESET_BALL
EMMC_VCCQ
EMMC_VDDI
C8105
0.1uF 16V
EMMC_VDDI
C8106
2.2uF 10V
3.3V_EMMC
C8102
0.1uF 16V
DAT3 DAT4
DAT5
C8103
2.2uF 10V
C8104
0.1uF 16V
SDIN5D2-4G-974L1
A3
DAT0
A4
DAT1
A5
DAT2
B2
DAT3
B3
DAT4
B4
DAT5
B5
DAT6
B6
DAT7
M6
CLK
M5
CMD
A6
NC_3
A7
NC_4
C5
NC_23
E5
NC_42
E8
NC_43
E9
NC_44
E10
NC_45
F10
NC_52
G3
NC_58
G10
NC_59
H5
NC_66
J5
NC_73
K6
NC_80
K7
NC_81
K10
NC_82
P7
NC_116
P10
NC_119
K5
RESET
C6
VCCQ_1
M4
VCCQ_2
N4
VCCQ_3
P3
VCCQ_4
P5
VCCQ_5
E6
VCC_1
F5
VCC_2
J10
VCC_3
K9
VCC_4
C2
VDDI
E7
VSS_1
G5
VSS_2
H10
VSS_3
K8
VSS_4
C4
VSSQ_1
N2
VSSQ_2
N5
VSSQ_3
P4
VSSQ_4
P6
VSSQ_5
A1
NC_1
A2
NC_2
A8
NC_5
A9
NC_6
A10
NC_7
A11
NC_8
A12
NC_9
A13
NC_10
A14
NC_11
B1
NC_12
B7
NC_13
B8
NC_14
B9
NC_15
B10
NC_16
B11
NC_17
B12
NC_18
B13
NC_19
B14
NC_20
C1
NC_21
C3
NC_22
C7
NC_24
IC8100
C8
NC_25
C9
NC_26
C10
NC_27
C11
NC_28
C12
NC_29
C13
NC_30
C14
NC_31
D1
NC_32
D2
NC_33
D3
NC_34
D4
NC_35
D12
NC_36
D13
NC_37
D14
NC_38
E1
NC_39
E2
NC_40
E3
NC_41
E12
NC_46
E13
NC_47
E14
NC_48
F1
NC_49
F2
NC_50
F3
NC_51
F12
NC_53
F13
NC_54
F14
NC_55
G1
NC_56
G2
NC_57
G12
NC_60
G13
NC_61
G14
NC_62
H1
NC_63
H2
NC_64
H3
NC_65
H12
NC_67
H13
NC_68
H14
NC_69
J1
NC_70
J2
NC_71
J3
NC_72
J12
NC_74
J13
NC_75
J14
NC_76
K1
NC_77
K2
NC_78
K3
NC_79
K12
NC_83
K13
NC_84
K14
NC_85
L1
NC_86
L2
NC_87
L3
NC_88 NC_89 NC_90 NC_91 NC_92 NC_93 NC_94 NC_95 NC_96 NC_97 NC_98
NC_99 NC_100 NC_101 NC_102 NC_103 NC_104 NC_105 NC_106 NC_107 NC_108 NC_109 NC_110 NC_111 NC_112 NC_113 NC_114 NC_115 NC_117 NC_118 NC_120 NC_121 NC_122 NC_123
L12 L13 L14 M1 M2 M3 M7 M8 M9 M10 M11 M12 M13 M14 N1 N3 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 P8 P9 P11 P12 P13 P14
SANDISK_EMMC_4GB
DAT5
DAT6
EMMC_RESET_BALL
EMMC_CMD_BALL
EMMC_CLK_BALL
A3 A4 A5 B2 B3 B4 B5 B6
M6 M5
A6 A7 C5 E5 E8
E9 E10 F10
G3 G10
H5
J5
K6
K7 K10
P7 P10
K5
C6
M4
N4
P3
P5
E6
F5 J10
K9
C2
E7
G5 H10
K8
C4
N2
N5
P4
P6
A1
A2
A8
A9 A10 A11 A12 A13 A14
B1
B7
B8
B9 B10 B11 B12 B13 B14
C1
C3
C7
IC8100-*3
H26M31001EFR
DAT0 DAT1 DAT2 DAT3 DAT4 DAT5 DAT6 DAT7
CLK CMD
NC_3 NC_4 NC_23 NC_42 NC_43 NC_44 NC_45 NC_52 NC_58 NC_59 NC_66 NC_73 NC_80 NC_81 NC_82 NC_116 NC_119
RESET
VCCQ_1 VCCQ_2 VCCQ_3 VCCQ_4 VCCQ_5
VCC_1 VCC_2 VCC_3 VCC_4
VDDI
VSS_1 VSS_2 VSS_3 VSS_4 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5
NC_1 NC_2 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_24
C8
NC_25
C9
NC_26
C10
NC_27
C11
NC_28
C12
NC_29
C13
NC_30
C14
NC_31
D1
NC_32
D2
NC_33
D3
NC_34
D4
NC_35
D12
NC_36
D13
NC_37
D14
NC_38
E1
NC_39
E2
NC_40
E3
NC_41
E12
NC_46
E13
NC_47
E14
NC_48
F1
NC_49
F2
NC_50
F3
NC_51
F12
NC_53
F13
NC_54
F14
NC_55
G1
NC_56
G2
NC_57
G12
NC_60
G13
NC_61
G14
NC_62
H1
NC_63
H2
NC_64
H3
NC_65
H12
NC_67
H13
NC_68
H14
NC_69
J1
NC_70
J2
NC_71
J3
NC_72
J12
NC_74
J13
NC_75
J14
NC_76
K1
NC_77
K2
NC_78
K3
NC_79
K12
NC_83
K13
NC_84
K14
NC_85
L1
NC_86
L2
NC_87
L3
NC_88
L12
NC_89
L13
NC_90
L14
NC_91
M1
NC_92
M2
NC_93
M3
NC_94 NC_95 NC_96 NC_97 NC_98
NC_99 NC_100 NC_101 NC_102 NC_103 NC_104 NC_105 NC_106 NC_107 NC_108 NC_109 NC_110 NC_111 NC_112 NC_113 NC_114 NC_115 NC_117 NC_118 NC_120 NC_121 NC_122 NC_123
M7 M8 M9 M10 M11 M12 M13 M14 N1 N3 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 P8 P9 P11 P12 P13 P14
DEV_HYNIX_EMMC_4GB
A3 A4 A5 B2 B3 B4 B5 B6
M6 M5
A6 A7 C5 E5 E8
E9 E10 F10
G3 G10
H5
J5
K6
K7 K10
P7 P10
K5
C6
M4
N4
P3
P5
E6
F5 J10
K9
C2
E7
G5 H10
K8
C4
N2
N5
P4
P6
A1
A2
A8
A9 A10 A11 A12 A13 A14
B1
B7
B8
B9 B10 B11 B12 B13 B14
C1
C3
C7
IC8100-*1
H26M21001ECR
DAT0 DAT1 DAT2 DAT3 DAT4 DAT5 DAT6 DAT7
CLK CMD
NC_3 NC_4 NC_23 NC_42 NC_43 NC_44 NC_45 NC_52 NC_58 NC_59 NC_66 NC_73 NC_80 NC_81 NC_82 NC_116 NC_119
RESET
VCCQ_1 VCCQ_2 VCCQ_3 VCCQ_4 VCCQ_5
VCC_1 VCC_2 VCC_3 VCC_4
VDDI
VSS_1 VSS_2 VSS_3 VSS_4 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5
NC_1 NC_2 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_24
C8
NC_25
C9
NC_26
C10
NC_27
C11
NC_28
C12
NC_29
C13
NC_30
C14
NC_31
D1
NC_32
D2
NC_33
D3
NC_34
D4
NC_35
D12
NC_36
D13
NC_37
D14
NC_38
E1
NC_39
E2
NC_40
E3
NC_41
E12
NC_46
E13
NC_47
E14
NC_48
F1
NC_49
F2
NC_50
F3
NC_51
F12
NC_53
F13
NC_54
F14
NC_55
G1
NC_56
G2
NC_57
G12
NC_60
G13
NC_61
G14
NC_62
H1
NC_63
H2
NC_64
H3
NC_65
H12
NC_67
H13
NC_68
H14
NC_69
J1
NC_70
J2
NC_71
J3
NC_72
J12
NC_74
J13
NC_75
J14
NC_76
K1
NC_77
K2
NC_78
K3
NC_79
K12
NC_83
K13
NC_84
K14
NC_85
L1
NC_86
L2
NC_87
L3
NC_88
L12
NC_89
L13
NC_90
L14
NC_91
M1
NC_92 NC_93 NC_94 NC_95 NC_96 NC_97 NC_98
NC_99 NC_100 NC_101 NC_102 NC_103 NC_104 NC_105 NC_106 NC_107 NC_108 NC_109 NC_110 NC_111 NC_112 NC_113 NC_114 NC_115 NC_117 NC_118 NC_120 NC_121 NC_122 NC_123
M2 M3 M7 M8 M9 M10 M11 M12 M13 M14 N1 N3 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 P8 P9 P11 P12 P13 P14
HYNIX_EMMC_2GB
KLM2G1HE3F-B001
A3
DAT0
A4
DAT1
A5
DAT2
B2
DAT3
B3
DAT4
B4
DAT5
B5
DAT6
B6
DAT7
M6
CLK
M5
CMD
A6
NC_3
A7
NC_4
C5
NC_23
E5
NC_42
E8
NC_43
E9
NC_44
E10
NC_45
F10
NC_52
G3
NC_58
G10
NC_59
H5
NC_66
J5
NC_73
K6
NC_80
K7
NC_81
K10
NC_82
P7
NC_116
P10
NC_119
K5
RSTN
C6
VDD_1
M4
VDD_2
N4
VDD_3
P3
VDD_4
P5
VDD_5
E6
VDDF_1
F5
VDDF_2
J10
VDDF_3
K9
VDDF_4
C2
VDDI
C4
VSS_1
E7
VSS_2
G5
VSS_3
H10
VSS_4
K8
VSS_5
N2
VSS_6
N5
VSS_7
P4
VSS_8
P6
VSS_9
A1
NC_1
A2
NC_2
A8
NC_5
A9
NC_6
A10
NC_7
A11
NC_8
A12
NC_9
A13
NC_10
A14
NC_11
B1
NC_12
B7
NC_13
B8
NC_14
B9
NC_15
B10
NC_16
B11
NC_17
B12
NC_18
B13
NC_19
B14
NC_20
C1
NC_21
C3
NC_22
C7
NC_24
IC8100-*2
C8
NC_25
C9
NC_26
C10
NC_27
C11
NC_28
C12
NC_29
C13
NC_30
C14
NC_31
D1
NC_32
D2
NC_33
D3
NC_34
D4
NC_35
D12
NC_36
D13
NC_37
D14
NC_38
E1
NC_39
E2
NC_40
E3
NC_41
E12
NC_46
E13
NC_47
E14
NC_48
F1
NC_49
F2
NC_50
F3
NC_51
F12
NC_53
F13
NC_54
F14
NC_55
G1
NC_56
G2
NC_57
G12
NC_60
G13
NC_61
G14
NC_62
H1
NC_63
H2
NC_64
H3
NC_65
H12
NC_67
H13
NC_68
H14
NC_69
J1
NC_70
J2
NC_71
J3
NC_72
J12
NC_74
J13
NC_75
J14
NC_76
K1
NC_77
K2
NC_78
K3
NC_79
K12
NC_83
K13
NC_84
K14
NC_85
L1
NC_86
L2
NC_87
L3
NC_88
L12
NC_89
L13
NC_90
L14
NC_91
SAMSUNG_EMMC_2GB
NC_92 NC_93 NC_94 NC_95 NC_96 NC_97 NC_98
NC_99 NC_100 NC_101 NC_102 NC_103 NC_104 NC_105 NC_106 NC_107 NC_108 NC_109 NC_110 NC_111 NC_112 NC_113 NC_114 NC_115 NC_117 NC_118 NC_120 NC_121 NC_122 NC_123
M1 M2 M3 M7 M8 M9 M10 M11 M12 M13 M14 N1 N3 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 P8 P9 P11 P12 P13 P14
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DU1
DUMMY_1
DU2
DUMMY_2
DU3
DUMMY_3
DU4
DUMMY_4
DU5
DUMMY_5
DU6
DUMMY_6
DU7
DUMMY_7
DU8
DUMMY_8
DUMMY_9 DUMMY_10 DUMMY_11 DUMMY_12 DUMMY_13 DUMMY_14 DUMMY_15 DUMMY_16
DU9 DU10 DU11 DU12 DU13 DU14 DU15 DU16
DU1
DUMMY_1
DU2
DUMMY_2
DU3
DUMMY_3
DU4
DUMMY_4
DU5
DUMMY_5
DU6
DUMMY_6
DU7
DUMMY_7
DU8
DUMMY_8
DUMMY_9 DUMMY_10 DUMMY_11 DUMMY_12 DUMMY_13 DUMMY_14 DUMMY_15 DUMMY_16
DU9 DU10 DU11 DU12 DU13 DU14 DU15 DU16
xxLT760H-UA
eMMC
11.09.29
81
Page 43
ATSC Digital Demodulator_LGDT3305 (USA)
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
(for pro:centric DATA channel)
Near to IC8200
89:I23
SUB_NDIF
SUB_PDIF
89:I23
3305_IF_AGC
R8201 0
R8202 0
I2C_SCL4_blan
I2C_SDA4_blan
C8206
0.01uF
C8204 0.01uF
C8205 0.01uF
R8205 100
OPT
R8206 100
OPT
R8204
1K
C8207 1000pF 50V
R8207
100
+3.3V_3305
C8208 0.1uF
C8209 0.1uF
+1.2V_3305
R8209
1K R8211
OPT
VINA2 VINA1 INCAP
VSSAAD10A
I2CSEL ANTCON
VDD_1
1K
I2CRPT_SCL I2CRPT_SDA
IFOUT RFOUT
NC_1
Xtal_matching
50V
33pF
C8213-*1
Xtal_Old
C8212
[EP]GND
VCCAAD10A
48
1 2
THERMAL
3
49 4 5 6
LGDT3305
7 8 9 10 11 12
13
14
TPERR
VDD33_115TPVALID
Xtal_matching
50V 33pF C8214-*1
Xtal_Old
C8213
C8214
30pF
30pF
50V
50V X8200 25MHz
R8213 1M
100
R8212
C8211
0.22uF
0.1uF
C8215 0.1uF
1K
R8214
NC_241VSS33_3
XTALI43XTALO44VSS_345XM46VDD_347VSSDAD10
40
42
IC8200
16
17
18
VSS33_1
TPDATA[0]
TPDATA[1]19TPDATA[2]20TPDATA[3]21TPDATA[4]22TPDATA[5]23TPDATA[6]24TPDATA[7]
R8215 22
NRST38OPM39VDD33_3
37
36 35 34 33 32 31 30 29 28 27 26 25
L8200
BLM18PG121SN1D
PLLAVSS PLLAVDD VSS33_2 VSS_2 VDD_2 VSS_1 SCL VDD33_2 SDA NIRQ TPSOP TPCLK
+3.3V_3305
R8216 47K
C8219 1uF
10V
C8216
0.1uF
C8220 0.1uF
C8217 0.1uF
C8218 0.1uF
1N4148W D8200
OPT
R8217
+3.3V_3305
L8201
BLM18PG121SN1D
C8221
/LGDT3305_RESET
22pF
C8222
22pF
L8203
BLM18PG121SN1D
L8202
+1.2V_3305
C8226
0.1uF
+3.3V_3305
C8225
0.1uF
C8227 10uF 10V
+1.23V_TU
C8224
0.1uF
+3.3V_TU
R8218100
R8219100
I2C_SCL4
I2C_SDA4
BLM18PG121SN1D
C8223
0.1uF
VDD3.3V
VDD1.0V
nRST
input; Digital IO
+3.3V_3305
470
R8208
LD8200
C8210 0.1uF
MIN 1ms
MIN 1ms
MIN 1ms
caution : Demodulator Power Sequence
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
MIN 10ms
demod to Main SoC
AR8200
22
close to IC(LGDT3305)
TS_S_IN_1_SYNC TS_S_IN_1_CLK TS_S_IN_1_DATA TS_S_IN_1_VAL
xxLT760H-UA
ATSC demod
2011.02.09
82
Page 44
ETNHUB_AVDD33
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
L8400-*1
SAMHWA_NEW
CB2012PK501T
+3.5V_ST
C8401
0.1uF 16V
L8400
SS_OLD
CIC21J501NE
C8400
2.2uF 25V
ETNHUB_AVDD33
ETNHUB_AVDD18
R8404 10K
Q8401
2SC3052
VIN_1
VIN_2
VOUT_1
VOUT_2
C8402 22uF 10V
FET_ROHM Q8400 RSR025P03
S
L8403
BLM18PG121SN1D
D
OPT
G
R8405 10K
C
B
R8486
10K
E
IC8400
MP20045DQ-LF-Z
1
9
2
THERMAL
3
$0.13
4
Vout=1.5*(1+R1/R2)
ETNHUB_DVDD33
C8405
0.1uF
+3.5V_ST
R8487 10K
EP[GND]
EN
8
PG
7
GND
6
FB
5
C8416 22uF 10V
ETNHUB_DVDD33
C8419
C8425
0.1uF
22uF
16V
10V
ETNHUB_PWR_ON/OFF
R8407 10K
R8408 100K
R8409 10K
R2
R8406
R1
2K
C8422
0.1uF
ETNHUB_AVDD33
R8410 0
C8426
0.1uF
Vout
C8428 22uF 10V
C8430
2.2uF 25V
C8429
0.1uF
FET_2.5V_AOS
L8406
BLM18PG121SN1D
Q8400-*1
AO3435
D
S
G
ETNHUB_DVDD18
BLM18PG121SN1D
C8438
C8435
0.1uF
22uF
16V
10V
FET_2.5V_DIODES
Q8400-*2
DMP2130L
S
G
ETNHUB_AVDD18
L8407
D
C8439 22uF 10V
Xtal_matching
Xtal_matching
C8441-*1
27pF
50V
C8440-*1
27pF
50V
Xtal_Old
Place Close To RTL8306
C8441
18pF
50V
C8440
18pF
50V
X8400
25MHz
Xtal_Old
Place Close To RTL8306
ETNHUB_AVDD33
LAN_ACT2 LAN_LINK2 AUTO_NEGO
GXSPD
GYSPD GXFULL GYFULL
LAN_ACT0
LAN_LINK0
R8415
1M
ETNHUB_AVDD18
ETNHUB_DVDD33
LED_ACT[2]/P4ANEG LED_SPD[2]/GXANEG LED_DUP[2]/GYANEG
LED_ADD[1]/GXSPD100 LED_ACT[1]/GYSPD100
LED_SPD[1]/GXFULL LED_DUP[1]/GYFULL
LED_ADD[0]/ENFORWARD
LED_ACT[0]/BCINDROP
LED_SPD[0]/MAX1536
LED_DUP[0]
R8425
1K
R8420
0
R8421
0
R8422
0
270
1%
R8423
1%
1.69K
R8424
DVDD33_3
DGND_7
CK25MOUT
OSCI
HVDD33
AVDD18_11
AGND_6
VCTRL DTEST2 DTEST1 AGND_7
IBREF
AVDD18_12
DGND_6
103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119
X1
120
X2
121 122 123 124 125 126 127 128
AVDD18_1
DUP3_GYMODE
LAN_ACT3
LAN_LINK3
LED_ADD[3]/MODESET1
LED_ACT[3]/EN48PASS1
LED_SPD[3]/DISARP
LED_DUP[3]/MODESET0
DVDD18_4
LED_ADD[2]/DISLEAKY
96
97
98
99
100
101
102
1
2
4
5
7
AGND_1
RXIN[0]3RXIP[0]
TXOP[0]6TXON[0]
AVDD18_28AVDD18_3
GXMODE
SETGROUP
ETNHUB_ENDEFER
0
Realtek WOL
R8427
OPT
R8426 1K
R8426(NC) : Disable HOMEPLUG
DISPORTPRI[4]/PHY2PTXD[3]/M2RXD[3]
PHY2PCOL/M2COL/LED_BLNK_TIME
LOOPLED#/ENDEFER
LED_ADD[4]/DISTAGPRI
LED_ACT[4]/DISHOMEPLUG
LED_SPD[4]/DISVLAN
DGND_5
LED_DUP[4]/SETGROUP
88
89
90
91
92
93
94
95
RTL8306G
9
11
12
14
AGND_2
TXON[1]10TXOP[1]
RXIP[1]13RXIN[1]
AVDD18_415AVDD18_5
PHY2PTXEN
PHY2PRXD3
ETHERNET_MDIO
PHY2PRXDV
R8434 33
SDA_MDIO
PHY2PRXD[1]/M(R)2TXD[1]/GXENFC
PHY2PRXD[2]/M2TXD[2]/GYENFC
PHY2PRXD[3]/M2TXD[3]/ENBKPRS
DGND_480PHY2PRXDV/M(R)2TXEN/DISBRDCTRL
PHY2PRXC/M2TXC/CTRL_REFCLK2
PHY2PTXC/M2RXC/REFCLK2
DISPORTPRI[0]/PHY2PTXEN/M2RXDV/CRSDV2
DISPORTPRI[1]/PHY2PTXD[0]/M(R)2RXD[0]
DISPORTPRI[2]/PHY2PTXD[1]/M(R)2RXD[1]
DISPORTPRI[3]/PHY2PTXD[2]/M2RXD[2]
DVDD33_2
75
76
77
78
79
81
82
83
84
85
86
87
IC8401
16
18
19
21
23
25
26
28
AGND_3
RXIN[2]17RXIP[2]
TXOP[2]20TXON[2]
TXON[3]24TXOP[3]
AVDD18_622AVDD18_7
AGND_4
RXIP[3]27RXIN[3]
AVDD18_829AVDD18_9
EN_AUTOXOVER
ETHERNET_MDC
R8435 33
R8436 1K
ITEST566MRXD[2]/PTXD[2]
MRXD[3]/PTXD[3]
SEL_MIIMAC#/DISDSPRI
EN_AUTOXOVER
DVDD18_3
EN_RST_BLNK
ITEST6
PHY2PRXD[0]/M(R)2TXD[0]/ENEEPROM
SCL_MDC
65
67
68
69
70
71
72
73
74
30
RXIN[4]31RXIP[4]
32
33
AGND_5
TXOP[4]34TXON[4]
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46
P4MODE[0](MODESET2)
45
P4MODE[1](MODESET3)
44 43
DISDUALMII(MODESET4)
42 41 40 39
35
36
ITEST137ITEST238ITEST3
AVDD18_10
ETNHUB_DVDD18
DGND_3
M(R)RXD[1]/PTXD[1]
DVDD33_1 M(R)RXD[0]/PTXD[0] MRXDV/PTXEN/CRSDV MRXC/PTXC/REFCLK1 MCOL/PCOL MTXD[3]/PRXD[3]/P4IRTAG[1] MTXD[2]/PRXD[2]/P4IRTAG[0] M(R)TXD[1]/PRXD[1]/LEDMODE[1] M(R)TXD[0]/PRXD[0]/LEDMODE[0]
DVDD18_2 M(R)TXEN/PRXDV MTXC/PRXC/CTRL_REFCLK1
DGND_2 P4LNKSTA# P4DUPSTA/HOME_CRS P4SPDSTA P4FLCTRL/CPU_INTERRUPT#
DVDD18_1
ITEST4 RESET#
DGND_1
R8437 1K
NON_LAN2_HUB
ETNHUB_DVDD33
R8439
Realtek WOL
C8448
10pF 50V
NON_LAN2_HUB
R8482 4.7K
NON_LAN2_HUB
Realtek WOL
R8440
1K
R8478
33
NON_LAN2_HUB
Place Closed
ETNHUB_DVDD33
OPT
R8441 4.7K
R8442 1K
NON_LAN2_HUB
NON_LAN2_HUB
NON_LAN2_HUB
0
P4MODE0 P4MODE1
DISDUALMII
/ETHERNET_RESET
PHY2HUB_RXD1 PHY2HUB_RXD0 PHY2HUB_CRSDV PHY2HUB_REF_CLK
R8483 33 R8484 33
R8485 33
ETNHUB_INT
Place Close To RTL8306
HUB2PHY_TXD1 HUB2PHY_TXD0
HUB2PHY_TXEN
STRAPPING PIN CONFIG
ETNHUB_DVDD33
OPT
OPT
OPT
R8449 1K
R8445 1K
R8443 1K
AUTO_NEGO PHY2PRXDV PHY2PRXD3
ETNHUB_ENDEFER
EN_AUTOXOVER
LAN_ACT0
GXSPD GYSPD
GXFULL
GYFULL
PHY2PRXDV : Broadcast strom control enable/disable PHY2PRXD3 : Backpressure enable/disable ENDEFER(NOT USED) : Defer enable/disable EN_AUTOXOVER : Auto cross over enable/disable
R8447 1K
OPT
OPT
OPT
1K
R8446
R8448 1K
R8444 1K
ETNHUB_DVDD33
SETGROUP
PHY2PTXEN
OPT
OPT
OPT
OPT
OPT
OPT
OPT
R8452 1K
R8450 1K
R8451 1K
R8488
OPT
1K
R8453 1K
R8455
R8456
R8464 1K
R8454 1K
R8457 1K
OPT
1K
1K
C8407
C8404 22uF 10V
ETNHUB_DVDD18
C8403 22uF 10V
0.1uF
C8406
0.1uF
C8411
0.1uF
C8410
0.1uF
MTK TO RTL matching
EPHY_RDP
EPHY_RDN
EPHY_TDP
EPHY_TDN
Place to center position between two chips
C8412
0.1uF
C8413
0.1uF
C8414
0.1uF
C8415
0.1uF
C8418
0.1uF
C8417
0.1uF
ETNHUB_AVDD18
SS_OLD
C8420
0.1uF
C8421
0.1uF
Place close to chip
C8424
0.1uF
C8423
0.1uF
CIS21J121 L8404
R8411
49.9 1%
R8412
49.9 1%
R8413
49.9 1%
R8414
49.9 1%
C8427
0.1uF
C8432
C8433
0.1uF
0.1uF
L8404-*1
UBW2012-121F
SHENCHEN_NEW
L8404-*2
MLB-201209-0120P-N2
MAG_NEW
ETNHUB_EPHY_TXOP3
ETNHUB_EPHY_TXON3
ETNHUB_EPHY_RXIP3
ETNHUB_EPHY_RXIN3
C8436
0.1uF
PHY TO RTL matching
TR0P
TR0N
TR1P
TR1N
Place to center position between two chips
C8442
0.1uF
LAN2_HUB
C8443
0.1uF
LAN2_HUB
C8444
0.1uF
LAN2_HUB
C8445
0.1uF
LAN2_HUB
CIS21J121
C8446
0.1uF
LAN2_HUB
C8447
0.1uF
LAN2_HUB
L8408
SS_OLD
ETNHUB_AVDD18
R8416
49.9 LAN2_HUB
R8417
49.9 LAN2_HUB
R8418
49.9 LAN2_HUB
R8419
49.9 LAN2_HUB
Place close to chip
Differential 100 ohm No Via Close to
L8408-*1
UBW2012-121F
SHENCHEN_NEW
L8408-*2
MLB-201209-0120P-N2
MAG_NEW
ETNHUB_EPHY_TXOP2
ETNHUB_EPHY_TXON2
ETNHUB_EPHY_RXIP2
ETNHUB_EPHY_RXIN2
R8472 0
R8473 0
LAN2_HUB
ETNHUB_EPHY_RXIP0
ETNHUB_EPHY_TXOP3
ETNHUB_EPHY_TXON3
SOC TO PHY Chip
ETNHUB_EPHY_RXIN0
ETNHUB_EPHY_RXIP3
ETNHUB_EPHY_RXIN3
LAN1 LAN2
ETNHUB_EPHY_TXON2
ETNHUB_EPHY_TXOP0
ETNHUB_EPHY_TXON0
FOR DEBUG
ETNHUB_DVDD33
A2[ RD]CA1[ GN]
OPT
RTL
LAN_LINK0
LAN_ACT0
EPHY_LINK
EPHY_ACTIVITY
LD8400
R8428 330
OPT
R8429
OPT
330
SOC
A2[ RD]CA1[ GN]
OPT
LD8401
LD8402
R8474 0
R8475 0
LAN2_HUB
LAN2_HUB
LAN2_HUB
ETNHUB_EPHY_RXIN2
ETNHUB_EPHY_RXIP2
ETNHUB_EPHY_TXOP2
A2[ RD]CA1[ GN]
OPT
LD8403
LD8404
R8430 330
OPT
R8431
OPT
330
A2[ RD]CA1[ GN]
OPT
LD8406
ETNHUB_EPHY_RXIP1
ETNHUB_EPHY_RXIN1
ETNHUB_EPHY_TXOP1
ETNHUB_EPHY_TXON1
ETNHUB_DVDD33
A2[ RD]CA1[ GN]
OPT
OPT
LD8405
R8432 330
OPT
R8476 330
OPT
OPT
A2[ RD]CA1[ GN]
OPT
A2[ RD]CA1[ GN]
R8433 330
OPT
R8477 330
To PHY
A2[ RD]CA1[ GN]
OPT
LD8407
WOL
/RTL8201_PMEB ETNHUB_ENDEFER
LAN_LINK2 LAN_ACT2
CONFIG FOR MAC4
Mide : 11111
DISDUALMII
P4MODE1
P4MODE0
GXMODE
DUP3_GYMODE
ETNHUB_DVDD33
R8490
OPT
1K
1K
LAN_LINK2
LAN_ACT2
LAN_ACT3
LAN_LINK0
ETNHUB_DVDD33
ETHERNET_MDC
ETHERNET_MDIO
R8489
R8468 10K
R8469 10K
R8471 10K
OPT
R8470 10K
R84 58
1.5 K
R8462 470
R8459 470
R8463 470
R8460 1K
R8461 1K
OPT
OPT
OPT
OPT
OPT
OPT
OPT
OPT
OPT
R84 65
1.5 K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2011.02.09xxLT760H-UA
84Ethernet Hub
Page 45
+3.3V_NORMAL
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
* 3.5V_ST -> 5V_ST Step-up Power
IC8600
+3.5V_ST
C8600
C8639 10uF 25V
2.2uF 10V
GND
C1+
C1-
IN
SC632ULTRT
1
2
3
4
R8674 10K
9
THERMAL
8
7
6
5
[EP]GND
C2-
C2+
OUT
EN
C8601
2.2uF 10V
* 3.5V_ST -> 12V_ST Step-up Power
+3.5V_ST
C8602
0.1uF 16V OPT
C8617 10uF 10V
L8600
3.6uH
C8641
0.1uF 16V
C8640 1uF 10V
[EP]AGND
SW_1
SW_2
FREQ
IN
SS
D8600
SMAB34
40V
6
7
8
9
10
TPS61087DRC
IC8602
5
PGND
4
AGND
3
EN
THE RMA L
2
11
FB
1
COMP
R8664 75K C8642 1200pF 50V
R8660
C8603 10uF 25V
0
C8606 47uF 10V
MPI_PWR_ON/OFF
R8661 100K
R1
1%
R8662 56K
1%
R8663
R2
18K 1%
C8607 47uF 10V
OPT C8643 100pF 50V
+5V_ST
OPT
C8644 1uF 16V
+12V_ST
C8655 22uF 16V
Serial for Commercial
S21;87:N15;87:Y26; 87:AA4
PTC_TX
87:X7
RESET_BY_CPU
87:M27
S27;87:N15;87:Y26; 87:AA4
/UPDATE_BY_CPU
87:L19
UART3_TX
RESET_HIGH
8:AK24
SOC_TX
UART3_TX
UPDATE_SW
R8645
R8644
R8621
R8622
+3.5V_ST
R8646
Y1
0
Y0
0
Z1
Z
10K
Z0
47K
INH
VEE
VSS
Y1
1
Y0
2
Z1
3
Z
4
Z0
47K
5
INH
6
VEE
7
VSS
8
IC8605
MC14053BDR2G
1
2
3
4
5
6
7
8
IC8604
MC14053BDR2G
+3.5V_ST
C8633
0
C8632
0.1uF
0.1uF
PTC_RX_MTK_3.3V
UART3_RX
87:X7
PTC_RX_5V
2SC3875S(ALY)
R8635 100
R8636 100
2SC3875S(ALY)
Q8603
Q8602
+3.5V_ST
C
E
+3.5V_ST
+3.5V_ST
R8637 10K
C
E
R8638 10K
B
VDD
16
Y
15
X
14
X1
13
12
11
10
9
16
15
14
13
12
11
10
9
R8626 100
R8627
X0
A
R8628 100
B
R8629 100
C
R8630 100
VDD
Y
X
X1
X0
A
B
C
C8664
4.7uF 10V
R8634 100
R8631 100
R8632 100
R8633 100
B
C8665
0.47uF
OPT
R8639 1K
R8675 10K
OPT
R8640 1K
SELECT PTC OAD OR NOT
RS232_TX
RS232_RX
SOC_RX
UART3_RX
OE
1
A
2
GND
3
R8643 10K
38:X21
38:X21
8:AK23
Y25;87:N15;87:Y26; 87:AA4
R8641 10K
OPT
IC8607
74LVC1G126
5
4
R8677
0
87:AA21
UART_SWB
UART_SWA
87:AA21
SELECT PTC OR BCM DEBUG
VCC
Y
R8676 100
BCM DEBUG
PTC DEBUG
PTC USB
COM/MON
SIMULATION
PTC_TX_MTK
SW_A
0
1
X
X
X 1
H
H
L
SW_BObjective
X
1
0
1
74LVC1G126
Input
A
L
H
X
X = don’t care
Z = high-impedance OFF-state
Output
YQE
L
H
Z
EXT_SPK AMP
EXT_SPK_R-
EXT_AMP_R_IN
EXT_AMP_L_IN
EXT_SPK_L-
C8608 22uF 16V
C8610
1uF
10V
C8611
1uF
10V
C8609
0.1uF
R8601 1K
+5V_SUB_AMP
R8615 1K
TPA6011A4PWPRG4
PGND_1
1
ROUT-
2
PVDD_1
3
RHPIN
4
RLINEIN
5
RIN
6
VDD
7
LIN
8
LLINEIN
9
LHPIN
10
PVDD_2
11
LOUT-
12
IC8601
24
23
22
21
20
19
18
17
16
15
14
13
ROUT+
SE/BTL
HP/LINE
VOLUME
SEDIFF
SEMAX
AGND
BYPASS
FADE
R8665 0
SHUTDOWN
LOUT+
PGND_2
R8604 0
R8602
EXT_SPK OUT
JK8600
400mA
+5V_NORMAL
BLM18PG121SN1D
EXT_SPK_R+
R8603
100
+5V_SUB_AMP
R8605
3.3K
C8612 1uF 25V
R8611 1K
1K
+3.5V_ST
R8608
4.7K R8607 100
100
C
R8606
10K
OPT R8609 100
EXT_SPK_L+
B
Q8601
E
MMBT3904(NXP)
R8610
L8605
+5V_SUB_AMP
EXT_SPK_MUTE
EXT_SPK OP AMP
EXT_AMP_L_IN
PEJ029-02
8
3
4
5
7
6
R8666
2.2K
C8657 6800pF OPT
G_SPRING
E_SPRING
R_SPRING
T_SPRING
B_TERMINAL
T_TERMINAL
R8667
470K
OPT
TP8602TP8601
TP8603
TP8604
R8617 470K
OPT
R8668 33K
C8658 33pF
R8669
C8613
39pF
10K
L8601
L8602
L8603
L8604
C8614
R8618
470K
OPT
OPT
R8613
1K
OUT1
IN1-
IN1+
39pF OPT
+3.3V_NORMAL
R8612 15K
IC8606
AZ4580MTR-E1
1
2
3
VEE
4
R8619
470K
OPT
C8615 39pF
OPT
EXT_SPK_DET
VCC C8662
8
OUT2
7
IN2-
6
IN2+
5
C8616
R8620
39pF
470K
OPT
OPT
+12V
L8606 120-ohm
0.1uF 50V R8670
R8672
C8661
R8673
10K
EXT_SPK_R-
EXT_SPK_R+
EXT_SPK_L-
EXT_SPK_L+
EXT_SPK_DET
Connected Disconnected
LowHigh
2.2K
C8660
R8671
33K
33pF
470K OPT
6800pF OPT
EXT_AMP_R_IN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
@area
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
13/08/07
@suppr
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
@compC @refer @partN
EXT_SPK_LOUT_MAIN
EXT_SPK_ROUT_MAIN
2011.02.09xxLT760H-UA
86Commercial Power
Page 46
R8734
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
100K
R8733
0
C8706 0.01uF
Q8708
SI4925BDY
S1
1
G1
2
S2
3
G2
4
0.01uF
C8707
ZD8702 5.1V
ZD8703 5.1V
C8708 0.01uF
8
7
6
5
ZD8704 5.1V
D1_2
D1_1
D2_2
D2_1
C8709 0.01uF
RJP_CTRL0
RJP_CTRL1
RJP_CTRL2
RJP_CTRL3
RJP_CTRL4
R8737 100K
C8710
47uF 25V
R8738 10K
RESET_HIGH
R8745
+12V
L8700
MLB-201209-0120P-N2
C8700 47uF 25V
C8702
C8701
47uF
0.01uF
25V
JK8700
KRJV9768-1001-024
1
2
3
4
5
6
7
8
C8704
0.01uF
OPT
100
R87282KR8740
R8725 10K
R8729
5.1K
R8730
5.1K
C8705 0.01uF
ZD8700 5.1V
2K
OPT
ZD8701 5.1V
C8703 47uF 25V
1
R8717 100
2
R8718 R8715 100
3
4
R8719 100
R8716 100
5
R8720 100
6
7
8
RJP
R8746
+3.5V_ST
10K
R8739
RL_ON
POWER_ON/OFF1
POWER_ON/OFF2_1
MPI_PWR_ON/OFF bLAN_POWER_MANAGE
AV1_CVBS_DET
RJP_CTRL0
RJP_CTRL3
RJP_CTRL4
R8700
2.2K
R8702
4.7K
R8703
R8701
1K
R8704
1K
R8705
4.7K
+3.3V_NORMAL
R8706 10K
C
B
E
+3.3V_NORMAL
R8707 10K
C
B
E
+3.3V_NORMAL
R8708 10K
C
B
1K
E
R8711
4.7K Q8700 2SC3875S(ALY)
+3.3V_NORMAL
R8709
B
4.7K Q8701 2SC3875S(ALY)
+3.3V_NORMAL
R8710
B
4.7K
Q8702 2SC3875S(ALY)
+3.3V_NORMAL
R8714 10K OPT
C
Q8705
B
2SC3875S(ALY)
E
RJP_CTRL1
J25;L11
R8712 10K
OPT
C
Q8703 2SC3875S(ALY)
E
RJP_CTRL2
R8713 10K
OPT
C
Q8704 2SC3875S(ALY)
E
+3.3V_NORMAL
R8723
B
1K
R8721
4.7K
RJP_CTRL3_buffer
+3.3V_NORMAL
R8724
B
1K
R8722
4.7K
RJP_CTRL4_buffer
RJP_CTRL0_buffer
R8726 10K
R8731
C
4.7K Q8706 2SC3875S(ALY)
E
R8727 10K
R8732
C
4.7K Q8707 2SC3875S(ALY)
E
+3.3V_NORMAL
R8735 10K
OPT C
B
E
+3.3V_NORMAL
R8736 10K OPT
C
B
E
RJP_CTRL1_buffer
Q8709 2SC3875S(ALY)
RJP_CTRL2_buffer
Q8710 2SC3875S(ALY)
UPDATE_SW
LT770H High/MID Power SEQUENCE
POWER_ON/OFF!
POWER_ON/OFF2_1
POWER_ON/OFF2_2
POWER_ON/OFF2_3
POWER_ON/OFF2_4
SOC_RESET
TI PTC
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R8747
4.7K
47K
4.7K
R87103
KEY1 KEY2
UART3_TX
UART3_RX
B
B
100K
+3.5V_ST
R8752
4.7K
C
E
+3.5V_ST
E
C
OPT
R8758
100
Q8712 2SC3875S(ALY)
1 2
SW8700
SKHMPWE010
PTC_RESET
2N3906S-RTK
Q8711
R8764
4.7K
R8761 100
R8770 100
OPT
RJP_CTRL0_buffer RJP_CTRL1_buffer RJP_CTRL2_buffer RJP_CTRL3_buffer RJP_CTRL4_buffer
R8769
4.7K
5
R8767
4.7K
R87650
/RTL8201_PMEB
43
PTC_UPDATE
SKHMPWE010
1 2
LED_W/LG_LOGO
R8773 100
SW8701
43
5
LED_R
R8774 100
R8781
OPT C8711 27pF
C8712
20pF
OPT
R8782
4.7K
OPT
C8715
C8714
0.1uF
0.1uF
X8700
32.768KHz
R8800
R8779100
R8780100
C8716
330
14
+3.5V_ST
EXT12V_CTRL
0.1uF
C8718
1uF
0
EXT_PWR_DET
/RTL8201_INT
ETNHUB_INT
EXT_SPK_DET
OPT
R8786
0
OPT C8717 2200pF
EXT5V_CTRL
P5.0/VREF+/VEREF+ P5.1/VREF-/VEREF-
P1.0/TA0CLK/ACLK
P2.0/TA1CLK/MCLK
POWER_DET
R8783
100
R8784
100
R87890
R87010 0
R87012
R87011 1K
R8792 47K
IC8702
KIA7027AF
O
3
R87009 1K
R87006 1K
EXT_5V
P6.4/A4 P6.5/A5 P6.6/A6
P6.7/A7 P7.4/A12 P7.5/A13 P7.6/A14 P7.7/A15
AVCC AVSS
P7.0/XIN
P7.1/XOUT
DVSS DVCC
P1.1/TA0.0 P1.2/TA0.1 P1.3/TA0.2 P1.4/TA0.3 P1.5/TA0.4 P1.6/SMCLK
P1.7
OPT
R87014
OPT
2
G
0
OPT
+3.5V_ST
OPT R8797 1K
I
1K
1
P8700
YFDW254-14S
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
C8720 10uF 16V
OPT
JTAG_PTC
12345678910111213
+3.5V_ST
PJ.2/TMS
PJ.3/TCK
RST/NMI/SBWTDIO
P6.0/A0
P6.1/A1
P6.2/A2
P6.3/A3
94
95
96
97
98
99
100
MICOM_MEMORY
MSP430F5419IPZR
26
29
30
31
32
P2.5
P2.6/ACLK
P2.1/TA1.027P2.2/TA1.128P2.3/TA1.2
P2.4/RTCCLK
P2.7/ADC12CLK/DMAE0
R87001
100
R87004 0
JTAG_PTC
R87008 0
JTAG_PTC
LD8700
SAM2333
OPT
A2[RD]CA1[GN]
OPT
330
330
OPT
R87003
R87002
P11.2/SMCLK
DVCC488DVSS489P5.2/XT2IN
P5.3/XT2OUT
TEST/SBWTCK
PJ.0/TDO
PJ.1/TDI/TCLK
86
87
90
91
92
93
IC8701
33
34
35
36
37
39
40
DVSS338DVCC3
P3.0/UCB0STE/UCA0CLK
P3.3/UCB0CLK/UCA0STE
P3.1/UCB0SIMO/UCB0SDA
P3.2/UCB0SOMI/UCB0SCL
P3.4/UCA0TXD/UCA0SIMO
P3.5/UCA0RXD/UCA0SOMI
R87005 0
POWER_ON/OFF2_4
PTC_TX
UART3_TX
UART3_RX
0
AMP_MUTE
SOC_RESET
0
R87016
R87015
470
R87049
R87047 33
P10.3/UCB3CLK/UCA3STE
P10.4/UCA3TXD/UCA3SIMO
P10.5/UCA3RXDUCA3SOMI
P10.683P10.784P11.0/ACLK
P11.1/MCLK
79
80
81
82
85
41
42
43
P4.0/TB044P4.1/TB145P4.2/TB246P4.3/TB347P4.4/TB448P4.5/TB549P4.6/TB6
P3.6/UCB1STE/UCA1CLK
P3.7/UCB1SIMO/UCB1SDA
R87007 0
PTC_RX_5V
+3.5V_ST
R87013 330
R87020
R87019
4.7K
FRAM I2C
FRAM_SDA_3.5V
FRAM_SCL_3.5V
FRAM_SDA_3.5V
100
R87 021
100
R87 024
MISO_1
R87027
330
R87028
330
UART SW CONTROL B
470
LD8701
R87029
UART SW CONTROL A
470
LD8702
R87030
P10.0/UCB3STE/UCA3CLK
P10.1/UCB3SIMO/UCB3SDA
P10.2/UCB3SOMI/UCB3SCL
76
77
78
P9.7
75
P9.6
74
P9.5/UCA2RXDUCA2SOMI
73
P9.4/UCA2TXD/UCA2SIMO
72
P9.3/UCB2CLK/UCA2STE
71
P9.2/UCB2SOMI/UCB2SCL
70
P9.1/UCB2SIMO/UCB2SDA
69
P9.0/UCB2STE/UCA2CLK
68
P8.7
67
P8.6/TA1.1
66
P8.5/TA1.0
65
DVCC2
R87023 0 ETNHUB_ENDEFER
64
DVSS2
63
VCORE
62
P8.4/TA0.4
61
P8.3/TA0.3
60
P8.2/TA0.2
59
P8.1/TA0.1
58
P8.0/TA0.0
57
P7.3/TA1.2
56
P7.2/TBOUTH/SVMOUT
55
P5.7/UCA1RXD/UCA1SOMI
54
P5.6/UCA1TXD/UCA1SIMO
53
P5.5/UCB1CLK/UCA1STE
52
P5.4/UCB1SOMI/UCB1SCL
51
50
P4.7/TBCLK/SMCLK
R87104 22 R87105 22
EXT_SPK_MUTE
+3.5V_ST
R87026 1K
C
Q8713
B
B
UART3_RX
UART3_TX
2SC3875S(ALY)
E
+3.5V_ST
E
2SA1504S
Q8714
C
4.7K
FRAM_SDA_5V
FRAM_SCL_3.5V
FRAM_SCL_5V
UART_SWB
UART_SWA
/ETHERNET_RESET
0
R87025
R8798 0
PTC_HPD
HPD_CTL
R87032
10
C8721
10uF
6.3V
330
R87034
3.6V
3.6V ZD8706
ZD8705
R87093
OPT
C8722
0.1uF 16V
100
R87037
100
R87038
22
C8724
0.47uF
R87040
R87039
+3.5V_ST
0
R87094
0
R87095
+3.5V_ST
0
0
R87097
PTC_WOL
+3.5V_ST
C8723
0.1uF
/WOL_ON MISO_1
HDMI_CEC_PTC
R87044
R87041
R87042
0
0
R87098
R87099
R87096
0
OPT
OPT
0
10K
10K
JP8700
R87018
R87017
R87022
To HDMI
330
CEC_CTL
JP8701
JP8702
Q8723
D
RUE003N02
S
Q8724
D
RUE003N02
S
+3.5V_ST
R87050 0
22
22
22
IR_M POWER_ON/OFF2_3 POWER_ON/OFF2_2
G
C8734
0.1uF 16V
OPT
G
C8735
0.1uF 16V
OPT
R87052
10K
R87054 100
C8728 47pF 50V
ETHERNET_MDC
ETHERNET_MDIO
ETNHUB_PWR_ON/OFF
T_TERMINAL2
B_TERMINAL2
T_SPRING
R_SPRING
B_TERMINAL1
T_TERMINAL1
E_SPRING
D8700
BAT54C
A2
C
A1
D8701
BAT54C
A2
C
A1
+5V_ST
R87055 0
1K
R87100
ZD8708
FRAM_SDA_5V
FRAM_SCL_5V
C8730
0.1uF
GND_JIG
BLAN CHECK
C
B
E
Q8717
2SC3875S(ALY)
R87066
R87067
6B
7B
5
4
7A
6A
3
PEJ027-04
OPT
+3.5V_ST
+5V_ST
R87065
C8729 47pF 50V
100K
100K
JK8701
10K
R87061
470K
R87064
4.7K
IR_M
IR
R87069
R87071
R87070
R87068
4.7K
+3.5V_ST
R87072
B
10K
R87062
ZD8707
OPT
100
100
100
10K
C8731
0.1uF
VCCA
1
A1
2
A2
3
A3
4
A4
5
NC_1
6
GND
7
MPI_DIN
R87074 0
R87075
C
Q8718
2SC3875S(ALY)
E
+5V_ST
0 R87073
100
R87101
IC8704
TXS0104EDR
GND_JIG
BLAN CHECK
4.7K
R87077
10K
100
R87102
VCCB
14
B1
13
B2
12
B3
11
B4
10
NC_2
9
OE
8
C8732
0.1uF
+5V_ST
B
MLB-201209-0120P-N2
R87079
10K
VDD
WP
SCL
SDA
+5V_ST
R87083
R87080
4.7K
C
Q8719 2SC3875S(ALY)
E
R87082
B
R87084
R87081 100
10K
R87085
8
7
6
5
R87086
100
100
0
IC8705
FM24C16B
100
+3.5V_ST
L8702
B
R87091
100K
C
Q8720 2SC3875S(ALY)
+3.5V_ST
E
L8701
R87087
100K
B
NC_1
1
NC_2
2
NC_3
3
VSS
4
R87090
4.7K
R87089 11K
R87088 0
C
Q8722 2SC3875S(ALY)
E
OPT
C
Q8721 2SC3875S(ALY)
E
2011.02.09xxLT760H-UA
87PTC
SPI_CLOCK
SPI_DIN
SPI_DOUT
GND_JIG
BLAN CHECK
MPI_DOUT
+5V_bLAN_PWR
C8733
0.01uF
bLAN_IR_IN_MODEM
Page 47
MDS62110206
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
GASKET_6.5T
M5-*3
MDS62110206 GASKET_6.5T
M6-*3
MDS62110206 GASKET_6.5T
M7-*3
MDS62110206 GASKET_6.5T
M8-*3
MDS62110206 GASKET_6.5T
M9-*3
MDS62110206 GASKET_6.5T
M10-*3
MDS62110206 GASKET_6.5T
M11-*3
MDS62110206 GASKET_6.5T
M12-*3
MDS62110206 GASKET_6.5T
M13-*3
MDS62110206 GASKET_6.5T
M14-*3
MDS62110206 GASKET_6.5T
MDS62110204 GASKET_5.5T
M5-*2
MDS62110204 GASKET_5.5T
M6-*2
MDS62110204 GASKET_5.5T
M7-*2
MDS62110204 GASKET_5.5T
M8-*2
MDS62110204 GASKET_5.5T
M9-*2
MDS62110204 GASKET_5.5T
M10-*2
MDS62110204 GASKET_5.5T
M11-*2
MDS62110204 GASKET_5.5T
M12-*2
MDS62110204 GASKET_5.5T
M13-*2
MDS62110204 GASKET_5.5T
M14-*2
MDS62110204 GASKET_5.5T
MDS62110210
GASKET_5.0T
M5-*1
MDS62110210
GASKET_5.0T
M6-*1
MDS62110210
GASKET_5.0T
M7-*1
MDS62110210
GASKET_5.0T
M8-*1
MDS62110210
GASKET_5.0T
M9-*1
MDS62110210
GASKET_5.0T
M10-*1
MDS62110210
GASKET_5.0T
M11-*1
MDS62110210
GASKET_5.0T
M12-*1
MDS62110210
GASKET_5.0T
M13-*1
MDS62110210
GASKET_5.0T
M14-*1
MDS62110210
GASKET_5.0T
GND
GND
MDS62110208 GASKET_4.5T
M5
MDS62110208 GASKET_4.5T
M6
MDS62110208 GASKET_4.5T
M7
MDS62110208 GASKET_4.5T
M8
MDS62110208 GASKET_4.5T
M9
MDS62110208 GASKET_4.5T
M10
MDS62110208 GASKET_4.5T
M11
MDS62110208 GASKET_4.5T
M12
MDS62110208 GASKET_4.5T
M13
MDS62110208 GASKET_4.5T
M14
MDS62110208 GASKET_4.5T
M1-*6
MDS61887710
GASKET_9.5T
M2-*6
MDS61887710
GASKET_9.5T
M3-*6
MDS61887710
GASKET_9.5T
M4-*6
MDS61887710
GASKET_9.5T
M5-*6
MDS61887710
GASKET_9.5T
M6-*6
MDS61887710
GASKET_9.5T
M7-*6
MDS61887710
GASKET_9.5T
M8-*6
MDS61887710
GASKET_9.5T
M9-*6
MDS61887710
GASKET_9.5T
M10-*6
MDS61887710
GASKET_9.5T
M11-*6
MDS61887710
GASKET_9.5T
M12-*6
MDS61887710
GASKET_9.5T
M13-*6
MDS61887710
GASKET_9.5T
M14-*6
MDS61887710
GASKET_9.5T
SMD GASKET 9.5T
MDS62110209
GASKET_8.5T
MDS62110209
GASKET_8.5T
MDS62110209
GASKET_8.5T
MDS62110209
GASKET_8.5T
MDS62110209
GASKET_8.5T
MDS62110209
GASKET_8.5T
MDS62110209
GASKET_8.5T
MDS62110209
GASKET_8.5T
MDS62110209
GASKET_8.5T
MDS62110209
GASKET_8.5T
MDS62110209
GASKET_8.5T
MDS62110209
GASKET_8.5T
MDS62110209
GASKET_8.5T
MDS62110209
GASKET_8.5T
M1-*5
M2-*5
M3-*5
M4-*5
M5-*5
M6-*5
M7-*5
M8-*5
M9-*5
M10-*5
M11-*5
M12-*5
M13-*5
M14-*5
SMD GASKET 8.5T
M1-*4
MDS62110205
GASKET_7.5T
M2-*4
MDS62110205
GASKET_7.5T
M3-*4
MDS62110205
GASKET_7.5T
M4-*4
MDS62110205
GASKET_7.5T
M5-*4
MDS62110205
GASKET_7.5T
M6-*4
MDS62110205
GASKET_7.5T
M7-*4
MDS62110205
GASKET_7.5T
M8-*4
MDS62110205
GASKET_7.5T
M9-*4
MDS62110205
GASKET_7.5T
M10-*4
MDS62110205
GASKET_7.5T
M11-*4
MDS62110205
GASKET_7.5T
M12-*4
MDS62110205
GASKET_7.5T
M13-*4
MDS62110205
GASKET_7.5T
M14-*4
MDS62110205
GASKET_7.5T
SMD GASKET 7.5T
Page 48
+3.3V_TU
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
b-LAN
TU8901 TDSS-H101F
NC
1
RESET
2
SCL
3
SDA
4
+B1[3.3V]
5
SIF
6
+B2[1.8V]
7
CVBS
8
IF_AGC
9
DIF[P]
10
DIF[N]
11
B1
B1
0.1uF 16V
+3.3V_NORMAL
C8930
A1
12
SHIELD
+3.3V_TU
L8904
BLM18PG121SN1D
A1
AZ1117BH-1.8TRE1
IN
3
+3.3V_TU
C8931
22uF
10V
Close to the b-LAN
TUNER
R8958
TUNER
R8959
TUNER
R8960
TUNER
R8961
TUNER
R8962
TUNER
R8963
TUNER
R8964
TUNER
R8965
TUNER
R8966
TUNER
R8967
IC8900
1
ADJ/GND
465mA(MAX)
C8932
0.1uF 16V
L8901
BLM18PG121SN1D
OPT
R8946 220
B
1K
OPT
OPT
C8905 27pF 50V
L8900
22
22
+5V_TU
E
Q8907
MMBT3906(NXP)
C
I2C_SCL4
I2C_SDA4
C8941 1000pF 50V SMART_b-LAN
R8913
SMART_b-LAN
2200pF 50V SMART_b-LAN
C8906 22uF
6.3V
R8947
220
OPT
C8907 27pF 50V
SMART_b-LAN
R8970
100
SMART_b-LAN
R8914
22
SMART_b-LAN
C8925 100pF 50V
2012 perallel because of derating
SMART_b-LAN
D8904
30V
SMART_b-LAN
22
+5V_TU
R8943
close to b-LAN
C8921
0.1uF 16V
SMART_b-LAN
TU8900 TMMB-H701F
+3.3V
1
SIF
40
SHIELD
2
GND_1
3
SDA
4
CVBS
5
IF-N1
6
+1.8V
7
IF-P2
8
RESET
9
AGC1
10
GND_2
11
SCL
12
GND_3
13
IF-P1
14
GND_4
15
IF-N2
16
AGC2
17
RESET2
18
NC
19
GND_5
20
+5V
21
JP2-P1
22
JP2-P4
23
J1-P2
24
J1-P3
25
J1-P4
26
J1-P5
27
PTS
28
JP1-P3
29
JP1-P4
30
JP1-P5
31
JP1-P6
32
JP1-P7
33
JP1-P10
34
J2-P1
35
J2-P2
36
J2-P3
37
J2-P4
38
J2-P6
39
0
0
0
0
0
0
0
0
0
0
C8922
C8923
100pF
0.1uF
50V R8948
16V
close to b-LAN
should be guarded by ground
+3.3V_TU
R8949
R8950 100
should be guarded by ground
100K
C8926
0.1uF
MAIN_PDIF
SUB_IF_AGC
Max 240mA
470 R8944
B
R8945
4.7K
C8924
0.1uF 16V
MAIN_NDIF
/TU_RESET
R8951 100
C8927
0.1uF 16V
H/NIM for Commercial (US)
E
Q8906
C
MMBT3906(NXP)
L8903
BLM18PG121SN1D
close to b-LAN
R8941 100
OPT
82
TUNER_SIF
+1.8V_TU
C8900 27pF 50V
should be guarded by ground
SUB_PDIF
SUB_NDIF
MAIN_IF_AGC
+3.3V_TU
R8942 100K OPT
C8920
0.1uF
OPT
R8904
R8905
R8906
R8911
C8903 27pF 50V
R8907
SMART_b-LAN
R8908
SMART_b-LAN
R8909
SMART_b-LAN
SMART_b-LAN
R8910
SMART_b-LAN
SMART_b-LAN
SMART_b-LAN
22
R8912
22
OPT
R8968 22 R8969 22
OPT
SUB_IF_AGC
/TU_RESET_1
22
22
22
22
22
22
22
SMART_b-LAN
R8902
R8903
SMART_b-LAN
b_PTS_CTL
MPI_DIN
MPI_DOUT
SPI_DOUT
SPI_DIN
SPI_CLOCK
bLAN_IR_IN_MODEM
C8904
+1.8V_TU
Max 0.7A
OUT
2
R8952 1
C8928 10uF 10V
+5V_NORMAL
C8933
0.1uF 16V
C8929
0.1uF 16V
R8953 0
C8934
22uF 10V
Close to the b-LAN
150mA(MAX)
+5V_TU
C8935
22uF
10V
C8936
0.1uF
+3.3V_TU_IN
C8938
0.1uF
R8954 10K
C8937
10uF
16V
16V
+5V_NORMAL
C8939 1uF
Vout=0.6*(1+R1/R2)
IC8901
AP2132MP-2.5TRG1
1
PG
2
EN
THERMAL
3
VIN
4
2A
VCTRL
[EP]
8
GND
9
7
ADJ
6
VOUT
5
NC
R8955 20K 1%
R8956 11K 1% R8957 10K 1%
R1
C8908
0.1uF 16V
R8916
100 OPT
I2C_SCL6
I2C_SDA6
R8915
100 OPT
SMART_b-LAN
C8910
0.01uF
D8906
30V
SMART_b-LAN
+1.23V_TU
R2
OPT C8909 10uF
6.3V
TU_CVBS
R8917
1K
D8907
30V
SMART_b-LAN
C8940 10uF
16V
I2C_SCL4_blan
I2C_SDA4_blan
3305_IF_AGC
SMART_b-LAN
SMART_b-LAN
SMART_b-LAN
SMART_b-LAN
D8908
30V
SMART_b-LAN
SMART_b-LAN
R891822
R891922
R892022
R892122
R892222
SMART_b-LAN
R8923
22
SMART_b-LAN
30V
D8900
30V
SMART_b-LAN
D8901
SMART_b-LAN
OPT
C8911 22uF 16V
bLAN D/L wafer
P8900
YFDW254-06S
1
5
+5V_bLAN_EXT
SMART_b-LAN
D8903 30V
D8902 30V
+5V_bLAN
D89 09
40V
KDR 412
SMART_b-LAN
OPT
C8912
C8913
0.1uF
10uF
16V
10V
2
43
6
E_SPRING
T_TERMINAL1
B_TERMINAL1
R_SPRING
T_SPRING
B_TERMINAL2
T_TERMINAL2
B-Land External RJ12 jack
SMART_b-LAN
SMART_b-LAN
JK8900
MJ-623PT-6-S-SD
1
2
3
4
5
6
7
30V
D8905
SMART_b-LAN
CDS3C30GTH
MPI_DOUT
MPI_DIN
MPI_SENSE
Game_control
GND
IR_OUT
+5V_TU
SMART_b-LAN
3
6A
7A
4
5
7B
6B
D89 10
40V
KDR 412
SMART_b-LAN
JK8901
PEJ027-04
+5V_bLAN_PWR
b-LAN POWER
SMART_b-LAN
bLAN_POWER_MANAGE
bLAN_POWER_MANAGE
B-Lan MPI pin3 output power(12V or 5V) control
R8924 47K
SMART_b-LAN
R8925
SMART_b-LAN
SMART_b-LAN
BLAN CHECK
10K
SMART_b-LAN
5VST_JIG
BLAN CHECK
R8928
R8926 47K
5VST_JIG
SMART_b-LAN
1/16W
5%
Q8900
2SC3052
BLAN CHECK
10K
OPT
R8927
10K
R8931
22K
R8929
3.3K
SMART_b-LAN
C
E
SMART_b-LAN
R8932 OPT
SMART_b-LAN
2SC3052
R8933 100K OPT
SMART_b-LAN
R8930
47K
OPT
B
+5V_ST_bLAN
R8936
47K
Q8903
C
B
E
+12V_C
R8935
47K
C
Q8902 B
2SC3052
E
SMART_b-LAN
+12V_C_MPI
E
SMART_b-LAN 2N3906S-RTK Q8901
B
C
200
1W
R8934
SMART_b-LAN
+5V_ST
L8902
CB3216PA501E
SMART_b-LAN
SMART_b-LAN
Q8904
AO3407A
D
S
C8914
0.1uF G
16V
SMART_b-LAN
SMART_b-LAN
Q8905
AO3407A
D
S
C8915
0.1uF G
16V
SMART_b-LAN
+12V_C
SMART_b-LAN
D8911
MBRA340T3G
D8912
MBRA340T3G
SMART_b-LAN
12V_JIG
BLAN CHECK
JP8920
1W
SMART_b-LAN
Need to 100 oHM 2W
SMART_b-LAN
R8938
3.3K
SMD
200
R8937
MPI_5V or 12V (PIN3) Select Control from b-LAN
C8917
10V 1uF
OPT
C8916 22uF
OPT
+12V
b_PTS_CTL
R8940
2.2K OPT
R8939
2.2K OPT
+12V_ST
+5V_bLAN_EXT
MPI_12V
+5V_ST_bLAN
+5V_bLAN
C8919
1uF
10V
SMART_b-LAN
+12V_C_MPI
C8918
1uF
25V
SMART_b-LAN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2011.02.09xxLT760H-UA
89bLAN
Page 49
+3.5V_ST_LAN
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
FET_2.5V_AOS
Q9000-*1
AO3435
S
G
/WOL_ON
ETNHUB_PWR_ON/OFF
FET_2.5V_DIODES
D
R9064
Q9000-*2
DMP2130L
S
G
OPT
R9065
+3.5V_ST
D
R9008
R9002
470K
0
C
Q9003
B
E
2SC3052
10K
100K
FET_AOS
Q9000
AO3407A
S
G
+3.5V_ST_LAN
D
PHY chip for WOL
50V
AVDD33_2
41
42
19
20
INTB
C9005-*1 Xtal_matching
25.0MHz
R9011
4.7K
LAN_AVDD33
COL39RXER/FXEN
DVDD10OUT
38
40
21
22
23
TXC
TXD[0]24TXD[1]
DVDD33_2
LAN_DVDD33
R9012
4.7K
R9067 4.7K
50V
12pF
LAN_DVDD33
C9007
0.1uF 16V
DVDD33_3
37
CRS/CRS_DV
36
LED1/PHYAD[1]
35
LED0/PHYAD[0]
34
PMEB
33
LED2/PHYAD[2]
32
MDIO
R9014 0
31
MDC
R9013 0
30
PHYRSTB
29
DVDD10
28
TXEN
27
TXD[3]
26
TXD[2]
25
R9016 NON_LAN2_HUB
C9008
10pF
OPT
50V
C9006
0.1uF 16V
Place close at RTL8201FN(IC9000) side
NON_LAN2_HUB NON_LAN2_HUB
OPT
R9017 33 R9020 33
LAN_AVDD33
C9000
0.1uF 16V
MII MODE
TO RJ45
TR1N
TR1P
LAN_DVDD33
R9000 4.7K
NON_LAN2_HUB
LAN_DVDD33
C9001
0.1uF 16V
TR0N
TR0P
R9001 4.7K
C9003-*1
Xtal_matching
MDI+[0] MDI-[0]
NC_1 MDI+[1] MDI-[1]
AVDD33_1
NC_2
NC_3
NC_4
NC_5
EN_LDO_OUT
TXER
R9007 4.7K NON_LAN2_HUB
RMII MODE
R9066 4.7K NON_LAN2_HUB
50V
12pF
C9002
0.1uF 16V
R9009
2.49K
1%
[EP]GND
1 2 3 4 5 6 7 8 9 10 11 12
50V
15pF
C9003
Xtal_Old
C9004
0.1uF 16V
THERMAL
49
RTL8201FN
13
14
15
16
RXDV
RXD[0]
RXD[1]17RXD[2]
DVDD33_1
15pF
C9005
Xtal_Old
X9000
R9010
1M 1%
OPT
CKXTAL1
CKXTAL2
NC_645NC_746RSET47NC_848AVDD10OUT
43
44
IC9000
18
RXC
RXD[3]/CLK_CTL
L9000
BLM18PG121SN1D
L9001
BLM18PG121SN1D
TP9000
R9024 0
LAN_DVDD33
R9025
4.7K
C9010
0.1uF 16V
16V
0
LAN_LINK_G LAN_ACTIVE_Y
LAN_DVDD33
1
R9026
4.7K
C9011
0.1uF
PHY2HUB_RXD1 PHY2HUB_RXD0
LAN_AVDD33
C9012
0.1uF
C9013
0.1uF
R9027
4.7K
0
16V
LAN_DVDD33
16V
PHY ADDRESS CONFIG
CONFIG PHY_ADDRESS = 111
2
R9032
4.7K
Place Closed
C9014
0.1uF 16V
TO Ethernet HuB
R9029 0
NON_LAN2_HUB
R9030 0
TO Ethernet HuB
PHY2HUB_CRSDV
ETHERNET_MDIO
ETHERNET_MDC
HUB2PHY_TXEN
HUB2PHY_TXD1 HUB2PHY_TXD0 PHY2HUB_REF_CLK
/RTL8201_INT
TO SOC/ MCU
LAN_FOR EMI
JK9001-*1
RJ45VT-01SLGY002
1
2
3
4
5
6
7
8
L1
L2
L3
L4
LAN_DVDD33
R9038
4.7K
LAN_FOR EMI
JK9000-*1
RJ45VT-01SLGY002
1
2
3
4
5
6
7
8
L1
L2
L3
L4
13
MCU PORT TO BE ASSIGNED!!
/ETHERNET_RESET
/RTL8201_PMEB
TO MCU
13
LAN1 Detect
LAN1_DET
LAN2_DET
Connected
Not Connected
LAN2 Detect
LAN2_DET
TO SOC
LAN1_DET
Connected
Not Connected
TO SOC
ETNHUB_DVDD33
R9071
100
Q9002
MMBT3904(NXP)
ETNHUB_DVDD33
R9068
100
Q9001
MMBT3904(NXP)
MTK pin no
G36
LAN_LINK3
Low
High
10K
R9072
C
B
E
MTK pin no
G37
GXFULL LAN1_DET
Low
10K
R9069
C
R9070
1K
B
E
Ethernet Block
Status
Input
LAN2_DET
High
Low
R9073
1K
ZD9001
5.6B
Status
Input
High
LowHigh
ZD9000
5.6B
for EMI
LAN_LINK3
R9059-*1 10
1/16W 5%
for EMI
R9060-*1 10
1/16W 5%
for EMI
R9061-*1 10
1/16W 5%
for EMI
R9062-*1 10
1/16W 5%
GXFULL
ETNHUB_EPHY_TXOP1
ETNHUB_EPHY_TXON1
ETNHUB_EPHY_RXIP1
ETNHUB_EPHY_RXIN1
LAN_ACTIVE_Y
LAN_ACT3
LAN_LINK_G
LAN_LINK3
LED_LAN_OLD
ETNHUB_EPHY_TXOP0
ETNHUB_EPHY_TXON0
ETNHUB_EPHY_RXIP0
ETNHUB_EPHY_RXIN0
for EMI_Cap
for EMI_Cap
D9004-*1 18pF 50V
GXFULL
TR0P
TR0N
D9005-*1 68pF 50V
R9057 0
R9055 0
R9058 0
R9056 0
for EMI_Cap
GYSPD
TR1P
TR1N
for EMI_Cap
NON_LAN2_HUB
NON_LAN2_HUB
EMI PASSLAN_FOR EMI
EMI PASS
D9004~D9011 : Use ’for EMI_Cap’ option D3624/D3625 : Use ’for EMI_Cap’ option
R9059~R9062 : Use ’for EMI’ option
(Apply the below)
LAN 1
EXT AUX RJ45
C9015
0.1uF
C9016
0.1uF
for EMI_Cap
D9008-*1 18pF 50V
D9000 30V
for EMI_Cap
D9010-*1 18pF 50V
D9002 30V
D9006-*1 18pF 50V
LAN 2
RJ 45
Plz Check OPT component!!
NON_LAN2_HUB
R9047 0 R9059 0
LAN2_HUB
LAN2_HUB
LAN2_HUB
LAN2_HUB
for EMI_Cap
D9009-*1 68pF 50V
D9001 30V
C9024
0.1uF
NON_LAN2_HUB LAN2_HUB
LAN2_HUB
C9025
0.1uF
for EMI_Cap
D9011-*1 68pF 50V
D9003 30V
D9007-*1 68pF 50V
LAN2_HUB
LAN2_HUB
NON_LAN2_HUB
R9048 0 R9060 0
R9049 0 R9061 0
NON_LAN2_HUB
R9050 0 R9062 0
R9039
49.9 1%
R9040
49.9 1%
R9041
49.9 1%
R9042
49.9 1%
R9051
49.9 1%
R9052
49.9 1%
R9053
49.9 1%
R9054
49.9 1%
30V
D9004
Diode_OLD
C9017
1000pF
LAN2_HUB
LAN2_HUB
LAN2_HUB
LAN2_HUB
30V
D9005
Diode_OLD
C9018
1000pF
30V
D9006
Diode_OLD
ETNHUB_DVDD33
30V
D9007
Diode_OLD
Diode_OLD
C9019
1000pF
Diode_OLD
C9020
1000pF
30V
D9008
D9009
Diode_OLD
LAN_DVDD33
ETNHUB_AVDD18
L9002
30V
D9010
Diode_OLD
R9043 510
R9044 510
ETNHUB_AVDD18
L9003
C9022
0.01uF
30V
D9011
R9045 510
R9046 510
BLM18PG121SN1D
C9021
0.1uF 16V
LAN2_HUB
BLM18PG121SN1D
LAN2_HUB
R9063 0
C9023
0.01uF OPT
LED_LAN_OLD
JK9000
43-10013AD11-1
1
2
3
4
5
6
7
8
D1
D2
D3
D4
9
LED_LAN_OLD
JK9001
43-10013AD11-1
1
2
3
4
5
6
7
8
D1
D2
D3
D4
9
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Ethernet PHY
2011.08.26xxLT760H-UA
90
Page 50
EXTERNAL_POWER OUT 5V/12V
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
Vout=(1+R1/R2)*0.765=5.03V
R9100
18K
MBRA340T3G
EXT5V_CTRL
EXT_5V
R9113 56K
1%
C9112 100pF
EXT_5V
EXT_5V
close to pin
D9100
C9114 150pF 50V
R9107 150K
EXT_5V
R9112 11K
1%
R9116
12K
1%
R9103 10K
EXT_5V
EXT_5V
C9108 1uF 10V
SW_1
SW_2
EN
COMP
FB
R9110 100K
C9113
50V
IC9102
MP4460DQ-LF-Z
1
2
THERMAL
3
$0.21
4
5
L9100 22UH
TPS54327DDAR
EN
VFB
VREG5
SS
C9115 3300pF 50V
EXT_5V
0.1uF
11
1
2
3
4
EP_GND
BST
10
VIN_2
9
VIN_1
8
FREQ
7
GND
6
C9106 22uF 25V
IC9103
THERMAL
EXT_5V
Switching noise reducing [MPS recommend]
R9111 22
R9117 200K
1/8W 1%
C9104
0.1uF 50V
[EP]GND
VIN
8
VBST
9
7
SW
6
GND
5
R9114 20K 1/16W
1%
P_12V
close IC9103
EXT_5V
C9107
0.1uF
50V
C9102
3.3uF 50V
R9118 270K
1/16W 1%
EXT_5V
C9111 10uF 25V
EXT_5V L9104
3.6uH
NR8040T3R6N
+24V
R9106 10K
1/16W 1%
C9110
0.1uF 50V
C9103 22uF 16V
EXT_5V
L9103
CB3216PA501E
EXT_5V
L9102
BLM18PG121SN1D
C9101 22uF 16V
EXT_5V
P_12V
P_5V
EXT12V_CTRL
EXT_5V
EXT_5V R9119
2K 1/8W 5%
C9105 470pF 50V
R9101
ENABLE/FAULT
1K
I-LIMIT
P_12V
L9105-*1
CIS21J121
EXT_5V_BEAD_SS
MLB-201209-0120P-N2
EXT_5V R9120
2K 1/8W 5%
120
EXT_5V_BEAD_MAG
L9105
120-ohm
C9116 22uF 16V
EXT_5V
GND
DV/DT
NC
OUT_2
OUT_1
FLG
MP5000DQ
1
2
3
4
5
NC
IC9101
R9104 43
10
11
VCC
EXT_5V
IC9104
AP2191DSG
8
$0.077
7
6
5
R9121 47
EXT_5V
9
8
7
6
SOURCE_5
SOURCE_4
SOURCE_3
SOURCE_2
SOURCE_1
GND
1
IN_1
2
IN_2
3
EN
4
L9101
CB3216PA501E
C9109
0.1uF 50V
EXT_5V C9117 10uF 10V
R9122 10K
EXT_5V
EXT_12V
EXT_5V
C9118
0.1uF
P_5V
EXTERNAL_POWER DETECTION
EXT_12V
EXT_5V
C9100
0.1uF 16V
OPT
EXT_PWR_DET
EXT_PWR_DET
VCC
3
R9105 100K
IC9100
APX803D29
1
GND
RESET
2
R9108
200
EXT_PWR_DET
D9101
EXT_PWR_DET
R9109
2.4K
EXT_PWR_DET
A2
A1
C
R9102
1.2K 1/16W
EXT_PWR_DET
EXT_PWR_DET
R9115 100
EXT_PWR_DET
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2011.02.09xxLT760H-UA
915V/12V Power Out
Page 51
Power
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
Pro:Idiom (XMARK)
+3.3V_PROIDIOM
+3.3V_NORMAL
L9201
MLB-201209-0120P-N2
27MHz(200ppm)
R17
PROIDIOM_SYSCLK
XMARK_1.8V
+3.3V_PROIDIOM
L9200
MLB-201209-0120P-N2
C9200 22uF 16V
RESET
DIODES_PI_NEW
IC9200-*1
APX809-26SAG-7
RESET
2
M16
1
GND
PROIDIOM_RESET
C9202 10uF 16V
+3.3V_PROIDIOM
+3.3V_PROIDIOM
C9204
0.1uF
R9201 22
MLB-201209-0120P-N2 C9205 100uF 16V
6
+3.3V_PROIDIOM
IC9201
AZ1117H-1.8TRE1(EH13A)
INPUT
3
2
OUTPUT
C9201
0.1uF 16V
+3.3V_PROIDIOM
D9200
1N4148W
OPT
R9202
10K
OPT
C9203
1uF 25V
R9200
4.7K
OPT
R9203
100
RESET
VCC
3
L9202
X9200 27MHz
1 25 34
ADJ/GND
1
R9205
100 OPT
Onsemi_PI_OLD
IC9200
MAX809RTR
2
1
GND
+3.3V_VCCINT
R9206 47K
R9207 47K
GND
C9206
0.1uF 16V
To SOC
/PROIDIOM_RESET_SOC
+3.3V_PROIDIOM
VCC
3
XMARK_1.8V
C9207
0.1uF
C9208 22uF 16V
SOC -> PI Serial
8:AL13 8:AL13 8:AL13
8:AL12
C9
TS_S_OUT_CLK TS_S_OUT_VAL TS_S_OUT_SYNC
TS_S_OUT_DATA
PROIDIOM_RESET
C9209
0.1uF
IC9204
OPT
R9261 0
+3.3V_PROIDIOM
IC9203
XMARK_1.8V
R9211 OPT
74LVC1G08GW
1 5
2
3
L9203
BLM18PG121SN1D
C9210
4.7uF
From SOC
4
Close to IC
I2C_SCL3 I2C_SDA3
I2C_SCL2 I2C_SDA2
C9250 0.1uF
C19
R9264 0
R9262 0
100K
0
OPT
R9273
22
R9266
R92170R9218
R9223 0
R9216
PROIDIOM_SYSCLK
R9224 22 R9225 22 R9226 22
R9254 22 R9255 22
XMARK_1.8V
0
0
OPT
OPT
R9272 0
R9270 0
R9271
0
R92190R9220
IO2_29/TP_SOP
IO2_21/TP_VALID
IO2_17/TP_ERR IO2_41/TP_DATA[7] IO2_36/TP_DATA[6] IO2_31/TP_DATA[5] IO2_25/TP_DATA[4] IO2_23/TP_DATA[3] IO2_18/TP_DATA[2] IO2_14/TP_DATA[1]
IO2_8/TP_DATA[0]
IO2_48/RESET IO3_37/I2C_SCK IO3_34/I2C_SDA
IO1_22/ASDO
0.1uF
C9245
IO1_1/INIT_DONE
0.1uF
C9244
XMARK_1.8V
22
CLK1
IO1_29
IO1_2 IO1_3 IO1_4 IO1_5 IO1_6 IO1_7 IO1_8
IO1_9 IO1_10 IO1_11 IO1_12
CLK0
DCLK
CONF_DONE
NCONFIG
DATA0
IO1_21SO
NCEO
NSTATUS
MSEL0
MSEL1
IO1_13 IO1_14 IO1_15 IO1_16 IO1_17 IO1_18 IO1_19 IO1_20 IO1_23 IO1_24 IO1_25 IO1_26 IO1_27 IO1_28 IO1_30 IO1_31 IO1_32 IO1_33 IO1_34 IO1_35
NCE
TCK TDO TMS TDI
74LVC1G08GW
1 5
2
3
IO2_39E5IO2_40
E6
H1 B8 B9 B10 C5 C6 C7 C8 C9 C10 C11 C12 M1 C3 C2 B1 G5 F4 D3 E4 F5 E3 D2 E2 G1 B2 D14 E14 K4 K13 H3 J4 H2 G4 K3 H4 J13 J3 J2 J14 H15 J15 H14 D4 D1 F3 G3 F2 E1 G2 F1 H5 J1 K2 L3 K1 L1 L2 N1 M2 N2 M3 L5 M4
N3
IO1_36K5IO1_37L4IO1_38R1IO1_39P2IO1_40P3IO1_41N4IO1_42
0.1uF
C9236
C9237
4
GNDG_PLL1
GNDA_PLL2
GNDG_PLL2
VCCA_PLL1
VCCA_PLL2
IO2_35B5IO2_42D6IO2_37D5IO2_38
J5
H6
B6
J11
J12
H11
R2
IO4_1T2IO4_2R3IO4_3P4IO4_4R4IO4_5T4IO4_6R5IO4_7M5IO4_9
0.1uF
0.1uF
C9251
GND_21
GND_22T1GND_23T5GND_24
GND_25
GND_26J6GNDA_PLL1
L9
L11
T12
T16
M6
IO4_10N5IO4_11N6IO4_12R6IO4_14M7IO4_15T6IO4_16R7IO4_17N7IO4_19T8IO4_21M8IO4_22N8IO4_23
C9238
C9239
0.1uF
0.1uF
GND_8G7GND_9G9GND_10
GND_11H8GND_12
GND_13J7GND_14
GND_15K6GND_16K8GND_17
GND_18
GND_19L8GND_20
J9
L6
K10
F11
G11
H10
IC9202
LGDT1001
I2C : 0x47
M10
T11
N10
N11
IO4_25T9IO4_27N9IO4_29
IO4_31
IO4_32
IO4_36
C9240
0.1uF
Cap close to IC
C9241
0.1uF
GND_4F6GND_5F8GND_6F9GND_7
N12
IO4_37M9IO4_38
IO4_39
A12
M11
M12
IO4_40
C9242
0.1uF
GND_1
GND_2A5GND_3
A16
R12
IO4_42
IO4_43
C9219 0.1uF
VCCIO2_4
A3
A1
T13
R13
IO4_44
C9220 0.1uF
VCCIO2_1
VCCIO2_2
VCCIO2_3
F7
F10
R14
P13
IO4_45
IO4_46
IO4_47
C9221 0.1uF
VCCIO3_3
C16
A14
T15
R15
IO4_48
1uF 10V
C9222
VCCIO3_1
VCCIO3_2
P16
K11
N13
P14
IO3_1
IO3_2
C9223 0.1uF
VCCIO4_3
VCCIO4_4
L10
T14
P15
R16
IO3_3
IO3_4
C9243
0.1uF
C9224 0.1uF
VCCIO4_1
VCCIO4_2
T3
L7
N15
N16
IO3_5
IO3_6
C9225 0.1uF
VCCIO1_1
VCCIO1_2
VCCIO1_3
G6
P1
K12
K14
IO3_7
IO3_8
IO3_9
C9226 0.1uF
VCCINT_12
C1
T10
L12
N14
IO3_10
C9227 0.1uF
VCCINT_9
VCCINT_10
VCCINT_11
K7
K9
T7
M13
M14
L13
IO3_11
IO3_12
IO3_13
C9229 0.1uF
C9228 0.1uF
VCCINT_6
VCCINT_7
VCCINT_8
J8
J10
M15
M16
IO3_14
IO3_15
IO3_16
C9231 0.1uF
C9230 0.1uF
VCCINT_2
VCCINT_3
VCCINT_4
VCCINT_5
G8
H7
H9
G10
L14
L15
L16
K16
IO3_17
IO3_18
IO3_19
IO3_20
R9258 4.7K R9259 4.7K R9260 4.7K
VCCINT_1
A7
IO4_34/CH_CLK
A10
R11
IO4_20/CH_VALID
R8
IO4_26/CH_SOP
R9
IO4_30/CH_ERR
R10
IO4_8/CH_DATA[0]
P5
IO4_13/CH_DATA[1]
P6
IO4_18/CH_DATA[2]
P7
IO4_24/CH_DATA[3]
P8
IO4_28/CH-DATA[4]
P9
IO4_33/CH_DATA[5]
P10
IO4_35/CH_DATA[6]
P11
IO4_41/CH_DATA[7]
P12
IO2_34
E7
IO2_33
A6
IO2_32
B7
IO2_43
A4
IO2_30
D7
IO2_28
A8
IO2_27
E8
IO2_26
D8
IO2_44
B4
IO2_24
E10
IO2_45
C4
IO2_22
D9
IO2_20
A9
IO2_19
D10
IO2_16
A11
IO2_15
B11
IO2_46
B3
IO2_13
D11
IO2_12
D12
IO2_11
E9
IO2_10
E11
IO2_9
E12
IO2_47
A2
IO2_7
B12
IO2_6
A13
IO2_5
B13
IO2_4
C13
IO2_3
B14
IO2_2
A15
IO2_1
B15
IO3_43
D13
IO3_42
C14
IO3_41
C15
IO3_40
B16
IO3_39
G12
IO3_38
H13
IO3_36
E13
IO3_35
F12
IO3_33
D15
IO3_32
D16
IO3_31
E15
IO3_30
E16
IO3_29
F15
IO3_28
F13
IO3_27
F14
IO3_26
F16
IO3_25
G15
IO3_24
G13
IO3_23
G14
IO3_22
H12
CLK2
G16
CLK3
H16
K15
J16
IO3_21
+3.3V_PROIDIOM
+3.3V_PROIDIOM
L9207
L9208
BLM18PG121SN1D
BLM18PG121SN1D
XMARK_1.8V
R9256 4.7K R9257 4.7K
+3.3V_VCCINT
L9210
L9209
BLM18PG121SN1D
R9250 R9251
R9252
R9253
C9232
0.1uF
C9233
0.1uF
C9234
0.1uF
C9235
0.1uF
+3.3V_PROIDIOM
L9211
BLM18PG121SN1D
BLM18PG121SN1D
22 22
22
22
Cap close to IC
TS_S_IN_0_CLK TS_S_IN_0_VAL
TS_S_IN_0_SYNC
TS_S_IN_0_DATA
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LG1001 Use XMARK
LGDT1129 Not use XMARK
2011.02.09xxLT760H-UA
92Pro:Idiom
Page 52
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