LG 42LK455C Schematic

LCD TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : LB0AD
MODEL : 42LK455C 42LK455C-TA
Internal Use Only
Printed in KoreaP/NO : MFL67223416 (1105-REV00)
LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
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CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION ................................................................ 9
BLOCK DIAGRAM...................................................................................14
EXPLODED VIEW .................................................................................. 15
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
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SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.
It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 MΩ and 5.2 MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrument's exposed METALLIC PARTS
Good Earth Ground such as WATER PIPE, CONDUIT etc.
AC Volt-meter
When 25A is impressed between Earth and 2nd Ground for 1 second, Resistance must be less than 0.1
*Base on Adjustment standard
IMPORTANT SAFETY NOTICE
0.15 uF
LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
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CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication. NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precautions. Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power source before; a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard.
2. Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM, FETVOM, etc) equipped with a suitable high voltage probe. Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its assemblies.
4. Unless specified otherwise in this service manual, clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10 % (by volume) Acetone and 90 % (by volume) isopropyl alcohol (90 % - 99 % strength) CAUTION: This is a flammable mixture. Unless specified otherwise in this service manual, lubrication of contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed.
7. Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead. Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field-effect transistors and semiconductor "chip" components. The following techniques should be used to help reduce the incidence of component damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the unit under test.
2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES devices.
4. Use only an anti-static type solder removal device. Some solder removal devices not classified as "anti-static" can generate electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive material).
7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500
°
F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wire­bristle (0.5 inch, or 1.25 cm) brush with a metal handle. Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique a. Allow the soldering iron tip to reach normal temperature.
(500
°F to 600 °F)
b. Heat the component lead until the solder melts. c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid. CAUTION: Work quickly to avoid overheating the circuit board printed foil.
6. Use the following soldering technique. a. Allow the soldering iron tip to reach a normal temperature
(500
°F to 600 °F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there only until the solder flows onto and around both the component lead and the foil. CAUTION: Work quickly to avoid overheating the circuit board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
SERVICING PRECAUTIONS
LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
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IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts.
2. Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and solder it.
3. Clean the soldered areas with a small wire-bristle brush. (It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection.
Power Output, Transistor Device Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit board.
3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow stake.
2. Securely crimp the leads of replacement component around notch at stake top.
3. Solder the connections. CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed whenever this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connections).
1. Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board.
1. Remove the defective copper pattern with a sharp knife. Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side. Carefully crimp and solder the connections. CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges.
LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
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SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
4. Model General Specification
1. Application range
This specification is applied to the LCD TV used LB0AD chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC
2) Relative Humidity : 65 % ± 10 %
3) Power Voltage : Standard input voltage (AC 100-240 V~ 50 / 60 Hz) * Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety: CE, IEC specification
- EMC:CE, IEC
No. Item Specification Remarks
1. Market Australia, New Zealand, Singapore, Malaysia, only Analog for A-ASIA
Vietnam, Indonesia, South Africa, Israel, A-ASIA
2. Broadcasting system 1) PAL/SECAM-B/G/D/K PAL for NZ/SG
2) PAL-I/II
3) NTSC-M
4) DVB-T
3. Receiving system Analog : Upper Heterodyne
G DVB-T
Digital : COFDM(DVB-T) - Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
4. Video Input RCA PAL, SECAM, NTSC 4 System : PAL, SECAM, NTSC, PAL60
5. Component Input Y/Cb/Cr, Y/Pb/Pr
6. RGB Input (1EA) RGB-PC Analog(D-SUB 15PIN)
7. HDMI Input HDMI1-DTV/DVI PC
HDMI2-DTV/DVI - HD Model : HDMI version 1.3
HDMI3-DTV/DVI - FHD Model : HDMI version 1.4
Support HDCP
8. Audio Input RGB/DVI Audio
Component
AV
9. SDPIF out SPDIF out
10. USB For My Media(Movie/Photo/Music List) or For SVC
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LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5. Component Video Input (Y, PB, PR)
No.
Specification
Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.5 60 HDTV 1080p
No.
Specification
Proposed Remark
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA Input 848*480 60 Hz, 852*480 60 Hz
-> 640*480 60 Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1280*768 47.78 59.87 79.5 WXGA
6. 1360*768 47.72 59.8 84.75 WXGA
7. 1280*1024 63.981 60.02 108.875 SXGA FHD Model
8. 1920*1080 66.587 59.93 138.625 WUXGA FHD model
6. RGB Input (PC)
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LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
7. HDMI Input
(1) DTV Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP
5. 1360*768 47.72 59.8 84.75 WXGA HDCP
6. 1280*1024 63.981 60.02 108.875 SXGA HDCP/FHD model
7. 1920*1080 67.5 60.00 138.625 WUXGA HDCP/FHD model
(2) PC Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 /45 59.94 /60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P
LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
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ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LCD TV with LB0AD chassis.
2. Designation
1) The adjustment is according to the order which is designated
and which must be followed, according to the plan which can be changed only on agreeing.
2) Power Adjustment: Free Voltage
3) Magnetic Field Condition: Nil.
4) Input signal Unit: Product Specification Standard
5) Reserve after operation: Above 5 Minutes (Heat Run) Temperature : at 25 ºC ± 5 ºC Relative humidity : 65 % ± 10 % Input voltage : 220 V, 60 Hz
6) Adjustment equipments: Color Analyzer(CA-210 or CA-110),
DDC Adjustment Jig equipment, Service remote control.
7) Push the “IN STOP” key - For memory initialization.
3. Main PCB check process
* APC - After Manual-Insert, executing APC
* Boot file Download
1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
2) Set as below, and then click “Auto Detect” and check “OK”
message.
If “Error” is displayed, Check connection between computer, jig, and set.
3) Click “Read” tab, and then load download file(XXXX.bin) by
clicking “Read”.
4) Click “Connect” tab. If “Can’t” is displayed, check connection
between computer, jig, and set.
5) Click “Auto” tab and set as below.
6) Click “Run”.
7) After downloading, check “OK” message.
* USB DOWNLOAD
1) Put the USB Stick to the USB socket.
2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is Low, it didn’t work. But your downloaded version is High, USB data is automatically detecting.
3) Show the message “Copying files from memory”.
filexxx.bin
(4)
(7) ……….OK
(5)
(6)
(1)
fil exxx.bi n
(2)
(3)
Please Check the Speed : To use speed between from 200KHz to 400KHz
Case1 : Software version up
1. After downloading S/W by USB, TV set will reboot automatically
2. Push “In-stop” key.
3. Push “Power on” key.
4. Function inspection
5. After function inspection, Push “In-stop” key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push “In-stop” key at first.
2. Push “Power on” key for turning it on.
-> If you push “Power on” key, TV set will recover channel information by itself.
3. After function inspection, Push “In-stop” key.
4) Updating is starting.
5) Uploading completed, The TV will restart automatically.
6) If your TV is turned on, check your updated version and Tool option.(explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to channel recover. if all channel data is cleared, you didn’t have a DTV/ATV test on production line.
* After downloading, have to adjust Tool Option again.
1) Push “IN-START” key in service remote control.
2) Select “Tool Option 1” and Push “OK” key.
3) Punch in the number. (Each model has their number)
4) Completed selecting Tool option.
3.1. ADC Process
(1) ADC
- Enter Service Mode by pushing “ADJ” key,
- Enter Internal ADC mode by pushing “
G
” key at “5. ADC
Calibration”
<Caution> Using ‘power on’ key of the Adjustment remote
control, power on TV.
* ADC Calibration Protocol (RS232)
Adjust Sequence
• aa 00 00 [Enter Adjust Mode]
• xb 00 40 [Component1 Input (480i)]
• ad 00 10 [Adjust 480i Comp1]
• xb 00 60 [RGB Input (1024*768)]
• ad 00 10 [Adjust 1024*768 RGB]
• aa 00 90 End Adjust mode * Required equipment : Adjustment remote control.
3.2. Function Check
* Check display and sound
- Check Input and Signal items. (cf. work instructions)
1) TV
2) AV (SCART1/SCART2/ CVBS)
3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60hz)
5) HDMI
6) PC Audio In * Display and Sound check is executed by Remote control.
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LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Module Tool option1 Tool option2 Tool option3(AU, TS) Tool option4 Tool option5
LGD 26240 18966 53257(53255) 26904 8450
No Item CMD1 CMD2 Data0
Enter Adjust Adjust A A 0 0 When transfer the ‘Mode In’,
Mode ‘Mode In’ Carry the command.
ADC adjust ADC Adjust A D 1 0 Automatically adjustment
(The use of a internal pattern)
EZ ADJUT
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Country Group
5. ADC Calibration
6. White Balance
7. Test Pattern
8. EDID D/L
9. Sub B/C
10. V-Com
11. P-Gamma
ADC Calibration
ADC Comp 480i
ADC Comp 1080p
ADC RGB
NG
NG
NG
Reset
Start
4. Total Assembly line process
4.1. Adjustment Preparation
· W/B Equipment condition
CA210 : CCFL/EEFL -> CH9, Test signal: Inner pattern(80IRE)
LED -> CH14, Test signal: Inner pattern(80IRE)
· Above 5 minutes H/run in the inner pattern. (“power on” key
of adjustment remote control)
* Connecting picture of the measuring instrument
(On Automatic control) Inside Pattern is used when W/B is controlled. Connect to auto controller or push Adjustment remote control POWER ON -> Enter the mode of White-Balance, the pattern will come out.
* Auto-control interface and directions
1) Adjust in the place where the influx of light like floodlight around is blocked. (illumination is less than 10 lux).
2) Adhere closely the Color Analyzer (CA210) to the module less than 10 cm distance, keep it with the surface of the Module and Color Analyzer’s prove vertically.(80° ~ 100°).
3) Aging time
- After aging start, keep the power on (no suspension of power supply) and heat-run over 5 minutes.
- Using ‘no signal’ or ‘full white pattern’ or the others, check the back light on.
• Auto adjustment Map(RS-232C) RS-232C COMMAND [CMD ID DATA]
Wb 00 00 White Balance Start Wb 00 ff White Balance End
<Caution>
Color Temperature : COOL, Medium, Warm. One of R Gain/G Gain/ B Gain should be kept on 0xC0, and adjust other two lower than C0. (when R/G/B Gain are all C0, it is the FULL Dynamic Range of Module.)
* Manual W/B process using Adjusts remote control.
• After enter Service Mode by pushing “ADJ” key,
• Enter White Balance by pushing “G” key at “6. White
Balance”.
* After you finished all adjustments, Press “In-start” key and
compare Tool option and Area option value with its BOM, if it is correctly same then unplug the AC cable. If it is not same, then correct it same with BOM and unplug AC cable. For correct it to the model’s module from factory Jig model.
* Push the “IN STOP” key after completing the function
inspection. And Mechanical Power Switch must be set “ON”.
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LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Cool 13,000 K X=0.269(±0.002)
Y=0.273(±0.002) <Test Signal>
Medium 9,300 K X=0.285(±0.002) Inner pattern
Y=0.293(±0.002) (204gray,80IRE)
Warm 6,500 K X=0.313(±0.002)
Y=0.329(±0.002)
Full White Pattern
COLOR ANALYZER TYPE: CA-210
RS-232C Communication
CA-210
RS-232C COMMAND MIN CENTER MAX
[CMD ID DATA] (DEFAULT)
Cool Mid Warm Cool Mid Warm
R Gain jg Ja jd 00 172 192 192 192
G Gain jh Jb je 00 172 192 192 192
B Gain ji Jc jf 00 192 192 172 192
R Cut 64 64 64 128
G Cut 64 64 64 128
B Cut 64 64 64 128
EZ ADJUST
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Country Group
5. ADC Calibration
6. White Balance
7. Test Pattern
8. EDID D/L
9. Sub B/C
10. V-Com
11. P-Gamma
White Balance
Color Temp.
R-Gain G-Gain B-Gain R-Cut G-Cut B-Cut Test-Pattern. Reset
Cool
172 172 192 64 64 64 ON
To set
4.2. DDC EDID Write (RGB 128Byte )
• Connect D-sub Signal Cable to D-sub Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B protocol.
• Check whether written EDID data is correct or not.
* For Service main Assembly, EDID have to be downloaded to
Insert Process in advance.
4.3. DDC EDID Write (HDMI 256Byte)
• Connect HDMI Signal Cable to HDMI Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B protocol.
• Check whether written EDID data is correct or not.
* For Service main Assembly, EDID have to be downloaded to
Insert Process in advance.
4.4. EDID DATA
1) All Data : HEXA Value
2) Changeable Data :
*: Serial No : Controlled / Data:01 **: Month : Controlled / Data:00 ***: Year : Controlled ****: Check sum
4.5. Auto Download
1) After enter Service Mode by pushing “ADJ” key.
2) Enter EDID D/L menu.
3) Enter “START” by pushing “OK” key.
<Caution> Never connect HDMI && D-sub cable when EDID
downloaded.
* Edid data and Model option download (RS232)
- Manual Download
* Caution
1) Use the proper signal cable for EDID Download.
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
2) Never connect HDMI & D-sub Cable at the same time.
3) Use the proper cables below for EDID Writing
4) Download HDMI1, HDMI2, separately because HDMI1 is different from HDMI2
1) FHD RGB EDID data
2) FHD HDMI EDID data
- 12 -
LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
NO Item CMD1 CMD2 Data0
Enter Download A A 0 0 When transfer the ‘Mode In’,
download Mode ‘Mode In’ Carry the command.
EDID data and Download A E 00 10 Automatically Download
Model option (The use of a internal pattern)
download
EZ ADJUT
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Country Group
5. ADC Calibration
6. White Balance
7. Test Pattern
8. EDID D/L
9. Sub B/C
10. V-Com
11. P-Gamma
EDID D/L
HDMI1 HDMI2 HDMI3 RGB
NG NG NG NG
Reset
Start
EDID D/L
Reset
Start
HDMI1 HDMI2 HDMI3 RGB
OK OK OK OK
Item
Manufacturer ID
Version
Revision
Condition
GSM
Digital : 1
Digital : 3
Data(Hex)
1E6D
01
03
D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
For HDMI EDID
For Analog EDID
012 34 5 6 7 8 9 ABCD E F
0 0 ff ff ff ff ff ff 0 1e 6d ab
10 c 1 3 6810 9780aee91a3544c 9926
20 0f 50 54 a1 8 0 81 80 61 40 45 40 31 40 1 1
30 1 1 1 1 1 1 2 3a801871382d40582c
40 45 0 a0 5a 0 0 0 1e 1 1d 0 72 51 d0 1e 20
50 6e 28 55 0 a0 5a 0 0 0 1e 0 0 0 fd 0 3a
60 3e 1e 53 10 0 0a 20 20 20 20 20 20 d
70 d 0e
012 34 5 6 7 8 9 ABCD E F
0 0 ff ff ff ff ff ff 0 1e 6d ab
10 c 1 3 8010 9 780a ee91a3544c9926
20 0f 50 54 a1 8 0 71 4f 81 80 1 1 1 1 1 1
30 1 1 1 1 1 1 2 3a801871382d40 582c
40 45 0 a0 5a 0 0 0 1e 1b 21 50 a0 51 0 1e 30
50 48 88 35 0 a0 5a 0 0 0 1c 0 0 0 fd 0 3a
60 3e 1e 53 10 0 0a 20 20 20 20 20 20 d
70 d 1e
80 2 3 26 f1 4e 10 1f 84 13 5 14 3 2 12 20 21
90 22 15 1 26 15 7 50 9 57 7 f
A0 f e3 5 3 1 1 1d 80 18 71 1c 16 20 58 2c
B0 25 0 a0 5a 0 0 0 9e 1 1d 0 72 51 d0 1e 20
C0 6e 28 55 0 a0 5a 0 0 0 1e 2 3a 80 18 71 38
D0 2d 40 58 2c 45 0 a0 5a 0 0 0 1e 1 1d 0 bc
E0 52 d0 1e 20 b8 28 55 40 a0 5a 0 0 0 1e 0 0
F0000000000000000e
* Detail EDID Options are below.
Product ID
Serial No: Controlled on production line.Month, Year: Controlled on production line:
ex) Week : ‘01’ -> ‘01’
Year : ‘2011’ -> ‘15’ fix
Model Name(Hex):
Checksum: Changeable by total EDID data.Vendor Specific(HDMI)
5. Model name & Serial number D/L
• Press “Power on” key of service remote control. (Baud rate : 115200 bps)
• Connect RS232 Signal Cable to RS-232 Jack.
• Write Serial number by use RS-232.
• Must check the serial number at the Product/Service info..
(menu key -> red key -> select product/Service info.)
5.1. Signal TABLE
CMD : A0h LENGTH : 85~94h (1~16 bytes) ADH : EEPROM Sub Address high (00~1F) ADL : EEPROM Sub Address low (00~FF) Data : Write data CS : CMD + LENGTH + ADH + ADL + Data_1 +…+ Data_n Delay : 20ms
5.2. Command Set
* Description
FOS Default write : <7mode data> write Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0, Phase Data write : Model Name and Serial Number write in
EEPROM,.
5.3. Method & notice
A. Serial number D/L is using of scan equipment. B. Setting of scan equipment operated by Manufacturing
Technology Group.
C. Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory by D-book 4.0.
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or Service man, sometimes model name or serial number is initialized.(Not always) There is impossible to download by bar code scan, so It need Manual download.
1) Press the ‘Instart’ key of Adjustment remote control.
2) Go to the menu ‘6.Model Number D/L’ like below photo.
3) Input the Factory model name(ex 32LV2510-TB) or Serial number like photo.
4) Check the model name Instart menu. -> Factory name displayed. (ex 32LV2510-TB)
5) Check the Product/Service info..(Menu key -> Red key -> Select product/Service info) -> Buyer model displayed. (ex 32LV2510-TB)
Model Name HEX EDID Table DDC Function
HD/FHD Model 0001 01 00 Analog/Digital
LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 13 -
MODEL MODEL NAME(HEX)
all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
INPUT MODEL NAME(HEX)
HDMI1 67030C001000B82D
HDMI2 67030C002000B82D
HDMI3 67030C003000B82D
CMD LENGTH ADH ADL DATA_1 . . . Data_n CS DELAY
No. Adjust mode CMD(hex) LENGTH(hex) Description
1
EEPROM WRITE
A0h
84h+n
n-bytes Write (n = 1~16)
- 14 -
LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM
RG
B P
C
S
PDIF
Component
H/ P OUT
HDMI(DV
I)
Half
H
al
f
NIM
NIM
(
C
A
N)
(
CAN)
P
C/ DVI Au
d
i In
RS-
23
2
C
IF +/ -
TU_
C
VBS
SIF
L/ R
S7M- R
MAX3232
SERI
AL FLASH
MXIC (8M bit)
M
5
M2
I
X- tal
24.69M
LVDS
(HD o
r FHD or FHD 100/ 120Hz
)
A. AMP
NTP7100
USB2
.
0
DP/D
M
S
P
K L/R
X
-
tal
1
2
M
FFC(51P) : FHD 50/ 60Hz
FHD 100/ 120Hz
I2S
SPDIF
H/
P L/ R
L/ R
CVBS, Y/Pb
/Pr, L/
R
RGB/H/V
RS23
2C
Rear
TMDS
DDR2 Add.
DDR2 Data
SPI
M
IC
O
M
UP
D
7
8F
0
5
14A
GA
-
G
A
M- A
X
MICOM SDA
MICOM SCL
A
V
Side
NAND Flas
h
(2
G
bi
t
)
H
Y
27UF082G2B- TP
C
B
PCM_A
[0
:7
]
DDR
3
2
5
6
M
H
ynic
H
5
TQ1G63BFR
FFC(31P) : HD 50/ 60Hz
TMDS
HDMI
CVBS, L/
R
D
D
R3 256M
H
y
n
i
c
H5
T
Q1G
6
3
B
FR
DD
R3 256M
H
ynic
H5T
Q1G
63B
F
R
CONTROL
IR & LED /
S
O
FT
T
O
UCH
NEC_
EEPROM
_SCL/SDA
LED_
R/BUZZ
KEY1
KEY2
IR
LED
_
B/ LG L
OGO
SO
FT TOUCH
_SCL/SD
A
M24M01- HRMN6TP
1Mbi
t
HDCP EEPROM
CA
T24W
C0
8
W-
T
I2C
MICOM EEPROM
M24C16- WMN6T
16Kbit
H
DMI
E
EPR
OM
AT2
4
C
0
2
BN- SH- T
RGB
E
EPR
O
M
AT24C02BN-
SH
-
T
I2C
I2C
HDMI
E
EPR
O
M
AT
2
4
C
02BN
-
S
H
-
T
HDMI EEPROM
AT24C
0
2
BN
-
S
H
-
T
I2C
LED D/ L pin
SCL/ SDA
SERIAL FL
A
SH
F
o
r External U
RSA
5
SPI
A. AMP
NTP
7
1
00
WOOFER L/R
I2S
L/ R
FPC(41P) : FHD 100/ 120Hz
- 15 -
LGE Internal Use OnlyCopyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
900
300
200
800
400
540
521
530
810
910
120
511
510
LV1
A2
A21
A4
A10
* Set + Stand
* Stand Base + Body
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
IC102
Copyright © 2011 LG Electronics. Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
RB
R
E
NC_7
NC_8
VSS_1
NC_9
NC_10
CL
AL
W
WP
NC_11
NC_12
NC_13
NC_14
NC_15
IC102-*2
NAND01GW3B2CN6E
1
NAND_FLASH_1G_NUMONYX
EAN60762401
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O7
44
I/O6
43
I/O5
42
I/O4
41
NC_25
40
NC_24
39
NC_23
38
VCC_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O3
32
I/O2
31
I/O1
30
I/O0
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
NC_29
NC_28
NC_27
NC_26
I/O7
I/O6
I/O5
I/O4
NC_25
NC_24
NC_23
VDD_2
VSS_2
NC_22
NC_21
NC_20
I/O3
I/O2
I/O1
I/O0
NC_19
NC_18
NC_17
NC_16
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
RY/BY
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
+3.3V_Normal
NAND_FLASH_1G_TOSHIBA
TC58NVG0S3ETA0BBBH
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NAND FLASH MEMORY
/PF_WP
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
H : Serial Flash
L : NAND Flash
3.3K
R102
NAND_FLASH_1G_HYNIX
EAN35669102
IC102-*1
H27U1G8F2BTR-BC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
/PF_CE0
/PF_CE1 H : 16 bit L : 8 bit
/F_RB
/PF_OE
/PF_CE0
+3.3V_Normal
10K
R104
OPT
B
C
E
/PF_CE1
PF_ALE
/PF_WE
Q101 KRC103S
OPT
+3.3V_Normal
1K
3.9KR109
R107
1K
C101
OPT
R108
0.1uF
VDD_1
R105 1K
OPT
1K
R106
NAND_FLASH_1G_SS
EAN61857001
K9F1G08U0D-SCB0
NC_1
VCC_1
VSS_1
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
1
2
3
4
5
6
R/B
7
RE
8
CE
9
10
11
12
13
14
15
CLE
16
ALE
17
WE
18
WP
19
20
21
22
23
24
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O7
44
I/O6
43
I/O5
42
I/O4
41
NC_25
40
NC_24
39
NC_23
38
VCC_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O3
32
I/O2
31
I/O1
30
I/O0
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
EEPROM_1MBIT_ATMEL
AT24C1024BN-SH-T
NC
A1
A2
GND
HDCP EEPROM
R113
4.7K
CAT24WC08W-T
A0
A1
A2
VSS
IC103
1
$0.199
2
3
4
VCC
8
WP
7
SCL
6
SDA
5
+3.3V_Normal
4.7KR127
R128
C107
0.1uF
Addr:10101--
22
22R129
I2C_SCL
I2C_SDA
EEPROM
EEPROM_1MBIT_ST
IC104
M24M01-HRMN6TP
NC
1
E1
2
E2
A0’h
3
VSS
4
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
AR101
C102
10uF
C103
0.1uF
AR102
EAN61508001
IC104-*1
1
2
3
4
IC102-*3
8
7
6
5
S7M-PLUS_DivX_MS10
LGE107DC-RP [S7M+ DIVX/MS10]
S7MR_DivX_MS10
LGE107DC-R [S7MR DIVX/MS10]
AE1
FRC_DDR3_A0/DDR2_NC
AF16
FRC_DDR3_A1/DDR2_A6
AF1
FRC_DDR3_A2/DDR2_A7
AE3
FRC_DDR3_A3/DDR2_A1
AD14
FRC_DDR3_A4/DDR2_CASZ
AD3
FRC_DDR3_A5/DDR2_A10
AF15
FRC_DDR3_A6/DDR2_A0
AF2
FRC_DDR3_A7/DDR2_A5
AE15
FRC_DDR3_A8/DDR2_A2
AD2
FRC_DDR3_A9/DDR2_A9
AD16
FRC_DDR3_A10/DDR2_A11
AD15
FRC_DDR3_A11/DDR2_A4
AE16
FRC_DDR3_A12/DDR2_A8
AF3
FRC_DDR3_BA0/DDR2_BA2
AF14
FRC_DDR3_BA1/DDR2_ODT
AD1
FRC_DDR3_BA2/DDR2_A12
AD13
FRC_DDR3_MCLK/DDR2_MCLK
AE14
FRC_DDR3_CKE/DDR2_RASZ
AE13
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE4
FRC_DDR3_ODT/DDR2_BA1
AD5
FRC_DDR3_RASZ/DDR2_WEZ
AF4
FRC_DDR3_CASZ/DDR2_CKE
AD4
FRC_DDR3_WEZ/DDR2_BA0
AE2
FRC_DDR3_RESETB/DDR2_A3
AF8
FRC_DDR3_DQSL/DDR2_DQS0
AD9
FRC_DDR3_DQSLB/DDR2_DQSB0
AE9
FRC_DDR3_DQSU/DDR2_DQS1
AF9
FRC_DDR3_DQSUB/DDR2_DQSB1
AE11
FRC_DDR3_DML/DDR2_DQ7
AF6
FRC_DDR3_DMU/DDR2_DQ11
AE6
FRC_DDR3_DQL0/DDR2_DQ6
AF11
FRC_DDR3_DQL1/DDR2_DQ0
AD6
FRC_DDR3_DQL2/DDR2_DQ1
AD12
FRC_DDR3_DQL3/DDR2_DQ2
AE5
FRC_DDR3_DQL4/DDR2_DQ4
AF12
FRC_DDR3_DQL5/DDR2_NC
AF5
FRC_DDR3_DQL6/DDR2_DQ3
AE12
FRC_DDR3_DQL7/DDR2_DQ5
AE10
FRC_DDR3_DQU0/DDR2_DQ8
AF7
FRC_DDR3_DQU1/DDR2_DQ14
AD11
FRC_DDR3_DQU2/DDR2_DQ13
AD7
FRC_DDR3_DQU3/DDR2_DQ12
AD10
FRC_DDR3_DQU4/DDR2_DQ15
AE7
FRC_DDR3_DQU5/DDR2_DQ9
AF10
FRC_DDR3_DQU6/DDR2_DQ10
AD8
FRC_DDR3_DQU7/DDR2_DQM1
AE8
FRC_DDR3_NC/DDR2_DQM0
Y11
FRC_REXT
Y19
FRC_TESTPIN
R144
3.3K
R143
IC101
GPIO7/PM1/PM_UART_TX
GPIO11/PM5/PM_UART_RX/INT1
PM_SPI_CS1/GPIO12/PM6
PM_SPI_WP1/GPIO13/PM7
PM_SPI_WP2/GPIO14/PM8/INT2
PM_SPI_CS2/GPIO16/PM10
IC101-*9
W26
ACKP/RLV3P/RED[3]
W25
ACKM/RLV3N/RED[2]
U26
A0P/RLV0P/RED[9]
U25
A0M/RLV0N/RED[8]
U24
A1P/RLV1P/RED[7]
V26
A1M/RLV1N/RED[6]
V25
A2P/RLV2P/RED[5]
V24
A2M/RLV2N/RED[4]
W24
A3P/RLV4P/RED[1]
Y26
A3M/RLV4N/RED[0]
Y25
A4P/RLV5P/GREEN[9]
Y24
A4M/RLV5N/GREEN[8]
AC26
BCKP/TCON13/GREEN[1]
AC25
BCKM/TCON12/GREEN[0]
AA26
B0P/RLV6P/GREEN[7]
AA25
B0M/RLV6N/GREEN[6]
AA24
B1P/RLV7P/GREEN[5]
AB26
B1M/RLV7N/GREEN[4]
AB25
B2P/RLV8P/GREEN[3]
AB24
B2M/RLV8N/GREEN[2]
AC24
B3P/TCON11/BLUE[9]
AD26
B3M/TCON10/BLUE[8]
AD25
B4P/TCON9/BLUE[7]
AD24
B4M/TCON8/BLUE[6]
AD23
CCKP/LLV3P
AE23
CCKM/LLV3N
AE26
C0P/LLV0P/BLUE[5]
AE25
C0M/LLV0N/BLUE[4]
AF26
C1P/LLV1P/BLUE[3]
AF25
C1M/LLV1N/BLUE[2]
AE24
C2P/LLV2P/BLUE[1]
AF24
C2M/LLV2N/BLUE[0]
AF23
C3P/LLV4P
AD22
C3M/LLV4N
AE22
C4P/LLV5P
AF22
C4M/LLV5N
AD19
DCKP/TCON5
AE19
DCKM/TCON4
AD21
D0P/LLV6P
AE21
D0M/LLV6N
AF21
D1P/LLV7P
AD20
D1M/LLV7N
AE20
D2P/LLV8P
AF20
D2M/LLV8N
AF19
D3P/TCON3
AD18
D3M/TCON2
AE18
D4P/TCON1
AF18
D4M/TCON0
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
AB23
GPIO1/TCON14/VSYNC/VDD_EVEN
AC23
GPIO2/TCON7/LDE/GCLK4
AC22
GPIO3/TCON6/LCK/GCLK2
AB16
FRC_GPIO0/UART_RX
AA14
FRC_GPIO1
AC15
FRC_GPIO3
Y16
FRC_GPIO8
AC16
FRC_GPIO9/UART_TX
AC14
FRC_GPIO10
AA16
FRC_I2CM_DA
AA15
FRC_I2CM_CK
Y10
FRC_I2CS_DA
AA11
FRC_I2CS_CK
AB15
FRC_PWM0
AB14
FRC_PWM1
2.2K
2.2K
R145
GPIO143/TCON0 GPIO145/TCON2 GPIO147/TCON4 GPIO149/TCON6 GPIO151/TCON8
GPIO36/UART3_RX GPIO37/UART3_TX
GPIO50/UART1_RX GPIO51/UART1_TX
GPIO6/PM0/INT0
GPIO8/PM2 GPIO9/PM3
GPIO10/PM4
GPIO15/PM9
GPIO17/PM11/INT3 GPIO18/PM12/INT4
PM_SPI_CK/GPIO1
GPIO0/PM_SPI_CZ
PM_SPI_DI/GPIO2
PM_SPI_DO/GPIO3
TS0_SYNC
TS1_SYNC
MPIF_CLK
MPIF_CS_N
MPIF_BUSY
S7MR_RM
IC101-*10
LGE107RC-R [S7MR RM]
AE1
FRC_DDR3_A0/DDR2_NC
AF16
FRC_DDR3_A1/DDR2_A6
AF1
FRC_DDR3_A2/DDR2_A7
AE3
FRC_DDR3_A3/DDR2_A1
AD14
FRC_DDR3_A4/DDR2_CASZ
AD3
FRC_DDR3_A5/DDR2_A10
AF15
FRC_DDR3_A6/DDR2_A0
AF2
FRC_DDR3_A7/DDR2_A5
AE15
FRC_DDR3_A8/DDR2_A2
AD2
FRC_DDR3_A9/DDR2_A9
AD16
FRC_DDR3_A10/DDR2_A11
AD15
FRC_DDR3_A11/DDR2_A4
AE16
FRC_DDR3_A12/DDR2_A8
AF3
FRC_DDR3_BA0/DDR2_BA2
AF14
FRC_DDR3_BA1/DDR2_ODT
AD1
FRC_DDR3_BA2/DDR2_A12
AD13
FRC_DDR3_MCLK/DDR2_MCLK
AE14
FRC_DDR3_CKE/DDR2_RASZ
AE13
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE4
FRC_DDR3_ODT/DDR2_BA1
AD5
FRC_DDR3_RASZ/DDR2_WEZ
AF4
FRC_DDR3_CASZ/DDR2_CKE
AD4
FRC_DDR3_WEZ/DDR2_BA0
AE2
FRC_DDR3_RESETB/DDR2_A3
AF8
FRC_DDR3_DQSL/DDR2_DQS0
AD9
FRC_DDR3_DQSLB/DDR2_DQSB0
AE9
FRC_DDR3_DQSU/DDR2_DQS1
AF9
FRC_DDR3_DQSUB/DDR2_DQSB1
AE11
FRC_DDR3_DML/DDR2_DQ7
AF6
FRC_DDR3_DMU/DDR2_DQ11
AE6
FRC_DDR3_DQL0/DDR2_DQ6
AF11
FRC_DDR3_DQL1/DDR2_DQ0
AD6
FRC_DDR3_DQL2/DDR2_DQ1
AD12
FRC_DDR3_DQL3/DDR2_DQ2
AE5
FRC_DDR3_DQL4/DDR2_DQ4
AF12
FRC_DDR3_DQL5/DDR2_NC
AF5
FRC_DDR3_DQL6/DDR2_DQ3
AE12
FRC_DDR3_DQL7/DDR2_DQ5
AE10
FRC_DDR3_DQU0/DDR2_DQ8
AF7
FRC_DDR3_DQU1/DDR2_DQ14
AD11
FRC_DDR3_DQU2/DDR2_DQ13
AD7
FRC_DDR3_DQU3/DDR2_DQ12
AD10
FRC_DDR3_DQU4/DDR2_DQ15
GPIO0/TCON15/HSYNC/VDD_ODD
AE7
FRC_DDR3_DQU5/DDR2_DQ9
GPIO1/TCON14/VSYNC/VDD_EVEN
AF10
FRC_DDR3_DQU6/DDR2_DQ10
AD8
FRC_DDR3_DQU7/DDR2_DQM1
AE8
FRC_DDR3_NC/DDR2_DQM0
Y11
FRC_REXT
Y19
FRC_TESTPIN
AMP_SDA
AMP_SCL
I2C_SDA
I2C_SCL
NEC_SDA NEC_SCL
GPIO38 GPIO39 GPIO40 GPIO41 GPIO42
TS0_CLK TS0_VLD
TS0_D0 TS0_D1 TS0_D2 TS0_D3 TS0_D4 TS0_D5 TS0_D6 TS0_D7
TS1_CLK TS1_VLD
TS1_D0 TS1_D1 TS1_D2 TS1_D3 TS1_D4 TS1_D5 TS1_D6 TS1_D7
MPIF_D0 MPIF_D1 MPIF_D2 MPIF_D3
ACKP/RLV3P/RED[3] ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1] A3M/RLV4N/RED[0] A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1] BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7] B0M/RLV6N/GREEN[6] B1P/RLV7P/GREEN[5] B1M/RLV7N/GREEN[4] B2P/RLV8P/GREEN[3] B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7] B4M/TCON8/BLUE[6]
C0P/LLV0P/BLUE[5] C0M/LLV0N/BLUE[4] C1P/LLV1P/BLUE[3] C1M/LLV1N/BLUE[2] C2P/LLV2P/BLUE[1] C2M/LLV2N/BLUE[0]
GPIO2/TCON7/LDE/GCLK4 GPIO3/TCON6/LCK/GCLK2
FRC_GPIO0/UART_RX
FRC_GPIO9/UART_TX
N21 M21 L22 L21 P21
K21 L23 K20 L20 M20 G20 G19
F20 F19
E7 D7 E11 G9 F9 C5 E8
33 R146 E9 F7 F6 D8 G12 F10
D9
33 R147 D11 E10 D10
33 R151
AA9 AA5 AA10
CI_TS_DATA[0]
AB5
CI_TS_DATA[1]
AC4
CI_TS_DATA[2]
Y6
CI_TS_DATA[3]
AA6
CI_TS_DATA[4]
W6
CI_TS_DATA[5]
AA7
CI_TS_DATA[6]
Y9
CI_TS_DATA[7]
AA8
AC5 AC6 AB6
FE_TS_DATA[0]
AC10
FE_TS_DATA[1]
AB10
FE_TS_DATA[2]
AC9
FE_TS_DATA[3]
AB9
FE_TS_DATA[4]
AC8
FE_TS_DATA[5]
AB8
FE_TS_DATA[6]
AC7
FE_TS_DATA[7]
AB7
D12 D14
Delete /PIF_SPI_CS
R160 1K
E14
E12 F12 D13 E13
W26 W25 U26 U25 U24 V26 V25 V24 W24 Y26 Y25 Y24
AC26 AC25 AA26 AA25 AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24
AD23
CCKP/LLV3P
AE23
CCKM/LLV3N
AE26 AE25 AF26 AF25 AE24 AF24 AF23
C3P/LLV4P
AD22
C3M/LLV4N
AE22
C4P/LLV5P
AF22
C4M/LLV5N
AD19
DCKP/TCON5
AE19
DCKM/TCON4
AD21
D0P/LLV6P
AE21
D0M/LLV6N
AF21
D1P/LLV7P
AD20
D1M/LLV7N
AE20
D2P/LLV8P
AF20
D2M/LLV8N
AF19
D3P/TCON3
AD18
D3M/TCON2
AE18
D4P/TCON1
AF18
D4M/TCON0
AB22 AB23 AC23 AC22
AB16 AA14
FRC_GPIO1
AC15
FRC_GPIO3
Y16
FRC_GPIO8
AC16 AC14
FRC_GPIO10
AA16
FRC_I2CM_DA
AA15
FRC_I2CM_CK
Y10
FRC_I2CS_DA
AA11
FRC_I2CS_CK
AB15
FRC_PWM0
AB14
FRC_PWM1
5V_DET_HDMI_1 5V_DET_HDMI_2 5V_DET_HDMI_4
SIDEAV_DET
33R119 33R120
ET_RXER
FRC_RESET
SC1/COMP1_DET ERROR_OUT MODEL_OPT_0
33R130 33R131
USB1_OCD USB1_CTL HP_DET
CONTROL_ATTEN
MODEL_OPT_6 MODEL_OPT_1
/FLASH_WP MODEL_OPT_2 TUNER_RESET
DEMOD_RESET AV_CVBS_DET
SPI_SCK
SPI_SDI
SPI_SDO
FRC_SCL
FRC_SDA
/SPI_CS
CI_TS_CLK CI_TS_VAL CI_TS_SYNC
CI_TS_DATA[0-7]
FE_TS_CLK FE_TS_VAL_ERR FE_TS_SYNC
FE_TS_DATA[0-7]
for SERIAL FLASH
from CI SLOT
Internal demod out
/External demod in
URSA_DEBUG
P3904
12505WS-03A00
1
2
3
4
DIMMING
R156
A_DIM
PWM_DIM
SCAN_BLK2
SCAN_BLK1/OPC_OUT
C111
2.2uF
R157
R155 0
R158
R159
10K
100
OPT
LD650 Scan
100
OPT
100
OPT
PWM0
PWM2
FRC_PWM1
FRC_PWM0
PCM_A[0-7]
<T3 CHIP Config(AUD_LRCH)>
PCM_A[7]
PCM_A[6]
PCM_A[5]
PCM_A[4]
22
PCM_A[3]
PCM_A[2]
PCM_A[1]
PCM_A[0]
22
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O8
44
I/O7
43
I/O6
42
I/O5
41
NC_25
40
NC_24
39
NC_23
38
VCC_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O4
32
I/O3
31
I/O2
30
I/O1
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
VCC
8
WP
7
SCL
6
SDA
5
+3.3V_Normal
C105
0.1uF
VCC
WP
SCL
SDA
C106
C104
8pF
8pF
OPT
OPT
S7R S7MR
22R111
I2C_SCL
22R112
I2C_SDA
Boot from SPI flash : 1’b0
Boot from NOR flash : 1’b1
(AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)
AUD_MASTER_CLK
<T3 CHIP Config>
MIPS_no_EJ_NOR8 : 4’h3 (MIPS as host. No EJ PAD. Byte mode NAND flash.) MIPS_EJ1_NOR8 : 4’h4 (MIPS as host. EJ use PAD1. Byte mode NAND flash.)
MIPS_EJ2_NOR8 : 4’h5 (MIPS as host. EJ use PAD2. Byte mode NAND flash.) B51_Secure_no scramble : 4’hb (8051 as host. Internal SPI flash secure boot, no scramble) B51_Sesure_scramble : 4’hc (8051 as host. Internal SPI flash secure boot with scarmble)
R148
56
C112 100pF 50V
S7R_MS10
IC101-*2
LGE101C-R [S7R MS10]
AE1
W26
NC_48
AF16
W25
NC_78
AF1
U26
NC_64
AE3
U25
NC_50
AD14
U24
NC_45
AD3
V26
NC_34
AF15
V25
NC_77
AF2
V24
NC_65
AE15
W24
NC_62
AD2
Y26
NC_33
AD16
Y25
NC_47
LVA4P/LLV8P
AD15
Y24
NC_46
LVA4N/LLV8N
AE16
NC_63 AC26 AC25 AA26
AF3
AA25
NC_66
AF14
AA24
NC_76
AD1
AB26
NC_32 AB25
AD13
AB24
NC_44
AE14
AC24
NC_61
AE13
AD26
NC_60 AD25 AD24
AE4
NC_51
AD5
NC_36
AF4
AD23
NC_67
RLV3P/RED[7]
AD4
AE23
NC_35
RLV3N/RED[6]
AE26
RLV0P/LVSYNC
AE2
AE25
NC_49
RLV0N/LHSYNC
AF26
RLV1N/LCK
AF25
RLV2P/RED[9]
AF8
AE24
NC_71
RLV1P/LDE
AD9
AF24
NC_40
RLV2N/RED[8]
AF23
RLV4P/RED[5]
AE9
AD22
NC_56
RLV4N/RED[4]
AF9
AE22
NC_72
RLV5P/RED[3]
AF22
RLV5N/RED[2]
AE11
NC_58
AF6
NC_69 AD19
AE6
AE19
NC_53
AF11
AD21
NC_74
AD6
AE21
NC_37
AD12
AF21
NC_43
AE5
AD20
NC_52
AF12
AE20
NC_75
AF5
AF20
NC_68
TCON16/WPWM
AE12
AF19
NC_59
TCON12/DPM
AD18
AE10
AE18
NC_57
TCON5/TP/SOE
AF7
AF18
NC_70
AD11
NC_42
AD7
NC_38
AD10
AB22
NC_41
AE7
AB23
NC_54
AF10
AC23
NC_73
TCON13/LEDON
AD8
AC22
NC_39
AB16
NC_26
AA14
NC_19
AC15
NC_30
Y16
NC_15
AC16
NC_31
AE8
AC14
NC_55
NC_29
Y11
AA16
NC_12
NC_21
Y19
AA15
GND_105
NC_20
Y10
NC_11
AA11
NC_17
AB15
NC_25
AB14
NC_24
LVACLKP/LLV6P/BLUE[3] LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9] LVA0N/LLV3N/BLUE[8] LVA1P/LLV4P/BLUE[7] LVA1N/LLV4N/BLUE[6] LVA2P/LLV5P/BLUE[5] LVA2N/LLV5N/BLUE[4] LVA3P/LLV7P/BLUE[1] LVA3N/LLV7N/BLUE[0]
LVBCLKP/LLV0P/GREEN[5] LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0] LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
TCON1/STV/GSP/VST
TCON21/CS10/VGH_ODD TCON20/CS9/VGH_EVEN
TCON18/CS7/GCLK5 TCON19/CS8/GCLK6 TCON11/CS5/HCON TCON10/CS4/OPT_N
TCON14/SACN_BLK
TCON17/CS6/GCLK4
W26 W25 U26 U25 U24 V26 V25 V24 W24 Y26 Y25
LVA4P/LLV8P
Y24
LVA4N/LLV8N
AC26 AC25 AA26 AA25 AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24
AD23
RLV3P/RED[7]
AE23
RLV3N/RED[6]
AE26
RLV0P/LVSYNC
AE25
RLV0N/LHSYNC
AF26
RLV1N/LCK
AF25
RLV2P/RED[9]
AE24
RLV1P/LDE
AF24
RLV2N/RED[8]
AF23
RLV4P/RED[5]
AD22
RLV4N/RED[4]
AE22
RLV5P/RED[3]
AF22
RLV5N/RED[2]
AD19 AE19 AD21 AE21 AF21 AD20 AE20
TCON9/CS3/OPT_P
AF20
TCON16/WPWM
AF19
TCON12/DPM
AD18 AE18
TCON5/TP/SOE
AF18
AB22 AB23 AC23
TCON13/LEDON
AC22
AB16
NC_26
AA14
NC_19
AC15
NC_30
Y16
NC_15
AC16
NC_31
AC14
NC_29
AA16
NC_21
AA15
NC_20
Y10
NC_11
AA11
NC_17
AB15
NC_25
AB14
NC_24
AE1 AF16 AF1 AE3 AD14 AD3 AF15 AF2 AE15 AD2 AD16 AD15 AE16
AF3 AF14 AD1
AD13 AE14 AE13
AE4 AD5 AF4 AD4
AE2
AF8 AD9
AE9 AF9
AE11 AF6
AE6 AF11 AD6 AD12 AE5 AF12 AF5 AE12
AE10 AF7 AD11 AD7 AD10 AE7 AF10 AD8
AE8
Y11 Y19
S7R_BASIC
LGE101C-R-1 [S7R BASIC]
NC_48 NC_78 NC_64 NC_50 NC_45 NC_34 NC_77 NC_65 NC_62 NC_33 NC_47 NC_46 NC_63
NC_66 NC_76 NC_32
NC_44 NC_61 NC_60
NC_51 NC_36 NC_67 NC_35
NC_49
NC_71 NC_40
NC_56 NC_72
NC_58 NC_69
NC_53 NC_74 NC_37 NC_43 NC_52 NC_75 NC_68 NC_59
NC_57 NC_70 NC_42 NC_38 NC_41 NC_54 NC_73 NC_39
NC_55
NC_12 GND_105
IC101-*1
LVACLKP/LLV6P/BLUE[3] LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9] LVA0N/LLV3N/BLUE[8] LVA1P/LLV4P/BLUE[7] LVA1N/LLV4N/BLUE[6] LVA2P/LLV5P/BLUE[5] LVA2N/LLV5N/BLUE[4] LVA3P/LLV7P/BLUE[1] LVA3N/LLV7N/BLUE[0]
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5 TCON19/CS8/GCLK6 TCON11/CS5/HCON TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON1/STV/GSP/VST
TCON14/SACN_BLK
TCON21/CS10/VGH_ODD TCON20/CS9/VGH_EVEN
TCON17/CS6/GCLK4
S7MR-PLUS
+3.3V_Normal
R117
1K
R115
1K
OPT
OPT
R118
R116
1K
1K
S7R_DivX
LGE101DC-R-1 [S7R DIVX]
AE1
NC_48
AF16
NC_78
AF1
NC_64
AE3
NC_50
AD14
NC_45
AD3
NC_34
AF15
NC_77
AF2
NC_65
AE15
NC_62
AD2
NC_33
AD16
NC_47
AD15
NC_46
AE16
NC_63
AF3
NC_66
AF14
NC_76
AD1
NC_32
AD13
NC_44
AE14
NC_61
AE13
NC_60
AE4
NC_51
AD5
NC_36
AF4
NC_67
AD4
NC_35
AE2
NC_49
AF8
NC_71
AD9
NC_40
AE9
NC_56
AF9
NC_72
AE11
NC_58
AF6
NC_69
AE6
NC_53
AF11
NC_74
AD6
NC_37
AD12
NC_43
AE5
NC_52
AF12
NC_75
AF5
NC_68
AE12
NC_59
AE10
NC_57
AF7
NC_70
AD11
NC_42
AD7
NC_38
AD10
NC_41
AE7
NC_54
AF10
NC_73
AD8
NC_39
AE8
NC_55
Y11
NC_12
Y19
GND_105
S7M-PLUS_BASIC
AE1
AF16
AF1 AE3
AD14
AD3
AF15
AF2
AE15
AD2 AD16 AD15 AE16
AF3 AF14
AD1
AD13 AE14 AE13
AE4
AD5
AF4
AD4
AE2
AF8
AD9
AE9
AF9
AE11
AF6
AE6 AF11
AD6 AD12
AE5 AF12
AF5 AE12
AE10
AF7 AD11
AD7 AD10
AE7 AF10
AD8
AE8
Y11
Y19
R121
1K
IC101-*3
LGE107C-RP-1 [S7M+ BASIC]
FRC_DDR3_A0/DDR2_NC FRC_DDR3_A1/DDR2_A6 FRC_DDR3_A2/DDR2_A7 FRC_DDR3_A3/DDR2_A1 FRC_DDR3_A4/DDR2_CASZ FRC_DDR3_A5/DDR2_A10 FRC_DDR3_A6/DDR2_A0 FRC_DDR3_A7/DDR2_A5 FRC_DDR3_A8/DDR2_A2 FRC_DDR3_A9/DDR2_A9 FRC_DDR3_A10/DDR2_A11 FRC_DDR3_A11/DDR2_A4 FRC_DDR3_A12/DDR2_A8
FRC_DDR3_BA0/DDR2_BA2 FRC_DDR3_BA1/DDR2_ODT FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK FRC_DDR3_CKE/DDR2_RASZ FRC_DDR3_MCLKZ/DDR2_MCLKZ
FRC_DDR3_ODT/DDR2_BA1 FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE FRC_DDR3_WEZ/DDR2_BA0
FRC_DDR3_RESETB/DDR2_A3
FRC_DDR3_DQSL/DDR2_DQS0 FRC_DDR3_DQSLB/DDR2_DQSB0
FRC_DDR3_DQSU/DDR2_DQS1 FRC_DDR3_DQSUB/DDR2_DQSB1
FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11
FRC_DDR3_DQL0/DDR2_DQ6 FRC_DDR3_DQL1/DDR2_DQ0 FRC_DDR3_DQL2/DDR2_DQ1 FRC_DDR3_DQL3/DDR2_DQ2 FRC_DDR3_DQL4/DDR2_DQ4 FRC_DDR3_DQL5/DDR2_NC FRC_DDR3_DQL6/DDR2_DQ3 FRC_DDR3_DQL7/DDR2_DQ5
FRC_DDR3_DQU0/DDR2_DQ8 FRC_DDR3_DQU1/DDR2_DQ14 FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12 FRC_DDR3_DQU4/DDR2_DQ15 FRC_DDR3_DQU5/DDR2_DQ9 FRC_DDR3_DQU6/DDR2_DQ10 FRC_DDR3_DQU7/DDR2_DQM1
FRC_DDR3_NC/DDR2_DQM0
FRC_VSYNC_LIKE FRC_TESTPIN
R123
R124
LVACLKP/LLV6P/BLUE[3] LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9] LVA0N/LLV3N/BLUE[8] LVA1P/LLV4P/BLUE[7] LVA1N/LLV4N/BLUE[6] LVA2P/LLV5P/BLUE[5] LVA2N/LLV5N/BLUE[4] LVA3P/LLV7P/BLUE[1] LVA3N/LLV7N/BLUE[0]
LVBCLKP/LLV0P/GREEN[5] LVBCLKN/LLV0N/GREEN[4]
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
TCON3/OE/GOE/GCLK2
TCON21/CS10/VGH_ODD TCON20/CS9/VGH_EVEN
IC101-*11
1K
OPT
1K
LVA4P/LLV8P LVA4N/LLV8N
LVB0P/RLV6P/RED[1]
RLV3P/RED[7]
RLV3N/RED[6] RLV0P/LVSYNC RLV0N/LHSYNC
RLV1N/LCK
RLV2P/RED[9]
RLV1P/LDE RLV2N/RED[8] RLV4P/RED[5] RLV4N/RED[4] RLV5P/RED[3] RLV5N/RED[2]
TCON15/SCAN_BLK1 TCON18/CS7/GCLK5 TCON19/CS8/GCLK6 TCON11/CS5/HCON TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
TCON13/LEDON
TCON17/CS6/GCLK4
GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN
R125
1K OPT
R126
1K
NC_26 NC_19 NC_30
NC_15 NC_31 NC_29
NC_21 NC_20
NC_11 NC_17
NC_25 NC_24
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0M/RLV0N/RED[8]
A1M/RLV1N/RED[6]
A2M/RLV2N/RED[4]
A3M/RLV4N/RED[0] A4P/RLV5P/GREEN[9] A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1] BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7] B0M/RLV6N/GREEN[6] B1P/RLV7P/GREEN[5] B1M/RLV7N/GREEN[4] B2P/RLV8P/GREEN[3] B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9] B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
GPIO2/TCON7/LDE/GCLK4 GPIO3/TCON6/LCK/GCLK2
A0P/RLV0P/RED[9]
A1P/RLV1P/RED[7]
A2P/RLV2P/RED[5]
A3P/RLV4P/RED[1]
W26 W25 U26 U25 U24 V26 V25 V24 W24 Y26 Y25 Y24
AC26 AC25 AA26 AA25 AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24
AD23 AE23 AE26 AE25 AF26 AF25 AE24 AF24 AF23 AD22 AE22 AF22
AD19 AE19 AD21 AE21 AF21 AD20 AE20 AF20 AF19 AD18 AE18 AF18
AB22 AB23 AC23 AC22
AB16 AA14 AC15
Y16 AC16 AC14
AA16 AA15
Y10 AA11
AB15 AB14
CCKP/LLV3P CCKM/LLV3N
DCKP/TCON5 DCKM/TCON4
FRC_SPI1_CK
FRC_SPI_DO FRC_SPI1_DI
FRC_SPI_CK
FRC_I2CS_DA FRC_I2CS_CK
C3P/LLV4P C3M/LLV4N C4P/LLV5P C4M/LLV5N
D0P/LLV6P D0M/LLV6N D1P/LLV7P D1M/LLV7N D2P/LLV8P D2M/LLV8N
D3P/TCON3 D3M/TCON2 D4P/TCON1 D4M/TCON0
FRC_SPI_CZ FRC_GPIO1
FRC_GPIO8
FRC_SPI_DI
FRC_PWM0 FRC_PWM1
S7R_DivX_MS10
LGE101DC-R [S7R DIVX/MS10]
AE1
NC_48
AF16
NC_78
AF1
NC_64
AE3
NC_50
AD14
NC_45
AD3
NC_34
AF15
NC_77
AF2
NC_65
AE15
NC_62
AD2
NC_33
AD16
NC_47
AD15
NC_46
AE16
NC_63
AF3
NC_66
AF14
NC_76
AD1
NC_32
AD13
NC_44
AE14
NC_61
AE13
NC_60
AE4
NC_51
AD5
NC_36
AF4
NC_67
AD4
NC_35
AE2
NC_49
AF8
NC_71
AD9
NC_40
AE9
NC_56
AF9
NC_72
AE11
NC_58
AF6
NC_69
AE6
NC_53
AF11
NC_74
AD6
NC_37
AD12
NC_43
AE5
NC_52
AF12
NC_75
AF5
NC_68
AE12
NC_59
AE10
NC_57
AF7
NC_70
AD11
NC_42
AD7
NC_38
AD10
NC_41
AE7
NC_54
AF10
NC_73
AD8
NC_39
AE8
NC_55
Y11
NC_12
Y19
GND_105
S7M-PLUS_MS10
AE1
W26
AF16
W25
AF1
U26
AE3
U25
AD14
U24
AD3
V26
AF15
V25
AF2
V24
AE15
W24
AD2
Y26
AD16
Y25
AD15
Y24
AE16
AC26 AC25 AA26
AF3
AA25
AF14
AA24
AD1
AB26 AB25
AD13
AB24
AE14
AC24
AE13
AD26 AD25 AD24
AE4
AD5
AF4
AD23
AD4
AE23 AE26
AE2
AE25 AF26 AF25
AF8
AE24
AD9
AF24 AF23
AE9
AD22
AF9
AE22 AF22
AE11
AF6
AD19
AE6
AE19
AF11
AD21
AD6
AE21
AD12
AF21
AE5
AD20
AF12
AE20
AF5
AF20
AE12
AF19 AD18
AE10
AE18
AF7
AF18
AD11 AD7 AD10
AB22
AE7
AB23
AF10
AC23
AD8
AC22
AB16 AA14 AC15
Y16 AC16
AE8
AC14
Y11
AA16
Y19
AA15
Y10 AA11
AB15 AB14
AUD_LRCH
AUD_SCK AUD_MASTER_CLK_0
PWM1
PWM0
IC101-*4
LVACLKP/LLV6P/BLUE[3] LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9] LVA0N/LLV3N/BLUE[8] LVA1P/LLV4P/BLUE[7] LVA1N/LLV4N/BLUE[6] LVA2P/LLV5P/BLUE[5] LVA2N/LLV5N/BLUE[4] LVA3P/LLV7P/BLUE[1] LVA3N/LLV7N/BLUE[0]
LVBCLKP/LLV0P/GREEN[5] LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0] LVB1P/RLV7P/GREEN[9] LVB1N/RLV7N/GREEN[8] LVB2P/RLV8P/GREEN[7] LVB2N/RLV8N/GREEN[6] LVB3P/LLV1P/GREEN[3] LVB3N/LLV1N/GREEN[2] LVB4P/LLV0P/GREEN[1] LVB4N/LLV0N/GREEN[0]
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
TCON1/STV/GSP/VST
TCON21/CS10/VGH_ODD TCON20/CS9/VGH_EVEN
IC101-*12
LGE107C-RP [S7M+ MS10]
FRC_DDR3_A0/DDR2_NC FRC_DDR3_A1/DDR2_A6 FRC_DDR3_A2/DDR2_A7 FRC_DDR3_A3/DDR2_A1 FRC_DDR3_A4/DDR2_CASZ FRC_DDR3_A5/DDR2_A10 FRC_DDR3_A6/DDR2_A0 FRC_DDR3_A7/DDR2_A5 FRC_DDR3_A8/DDR2_A2 FRC_DDR3_A9/DDR2_A9 FRC_DDR3_A10/DDR2_A11 FRC_DDR3_A11/DDR2_A4 FRC_DDR3_A12/DDR2_A8
FRC_DDR3_BA0/DDR2_BA2 FRC_DDR3_BA1/DDR2_ODT FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK FRC_DDR3_CKE/DDR2_RASZ FRC_DDR3_MCLKZ/DDR2_MCLKZ
FRC_DDR3_ODT/DDR2_BA1 FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE FRC_DDR3_WEZ/DDR2_BA0
FRC_DDR3_RESETB/DDR2_A3
FRC_DDR3_DQSL/DDR2_DQS0 FRC_DDR3_DQSLB/DDR2_DQSB0
FRC_DDR3_DQSU/DDR2_DQS1 FRC_DDR3_DQSUB/DDR2_DQSB1
FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11
FRC_DDR3_DQL0/DDR2_DQ6 FRC_DDR3_DQL1/DDR2_DQ0 FRC_DDR3_DQL2/DDR2_DQ1 FRC_DDR3_DQL3/DDR2_DQ2 FRC_DDR3_DQL4/DDR2_DQ4 FRC_DDR3_DQL5/DDR2_NC FRC_DDR3_DQL6/DDR2_DQ3 FRC_DDR3_DQL7/DDR2_DQ5
FRC_DDR3_DQU0/DDR2_DQ8 FRC_DDR3_DQU1/DDR2_DQ14 FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12 FRC_DDR3_DQU4/DDR2_DQ15 FRC_DDR3_DQU5/DDR2_DQ9 FRC_DDR3_DQU6/DDR2_DQ10 FRC_DDR3_DQU7/DDR2_DQM1
FRC_DDR3_NC/DDR2_DQM0
FRC_VSYNC_LIKE FRC_TESTPIN
for SYSTEM/HDCP EEPROM&URSA3
W26 W25 U26 U25 U24 V26 V25 V24 W24 Y26 Y25
LVA4P/LLV8P
Y24
LVA4N/LLV8N
AC26 AC25 AA26 AA25 AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24
AD23
RLV3P/RED[7]
AE23
RLV3N/RED[6]
AE26
RLV0P/LVSYNC
AE25
RLV0N/LHSYNC
AF26
RLV1N/LCK
AF25
RLV2P/RED[9]
AE24
RLV1P/LDE
AF24
RLV2N/RED[8]
AF23
RLV4P/RED[5]
AD22
RLV4N/RED[4]
AE22
RLV5P/RED[3]
AF22
RLV5N/RED[2]
AD19 AE19 AD21
TCON18/CS7/GCLK5
AE21
TCON19/CS8/GCLK6
AF21
TCON11/CS5/HCON
AD20
TCON10/CS4/OPT_N
AE20
TCON9/CS3/OPT_P
AF20
TCON16/WPWM
AF19
TCON12/DPM
AD18 AE18
TCON5/TP/SOE
AF18
TCON14/SACN_BLK
AB22 AB23 AC23
TCON13/LEDON
AC22
TCON17/CS6/GCLK4
AB16
NC_26
AA14
NC_19
AC15
NC_30
Y16
NC_15
AC16
NC_31
AC14
NC_29
AA16
NC_21
AA15
NC_20
Y10
NC_11
AA11
NC_17
AB15
NC_25
AB14
NC_24
W26
ACKP/RLV3P/RED[3]
W25
ACKM/RLV3N/RED[2]
U26
A0P/RLV0P/RED[9]
U25
A0M/RLV0N/RED[8]
U24
A1P/RLV1P/RED[7]
V26
A1M/RLV1N/RED[6]
V25
A2P/RLV2P/RED[5]
V24
A2M/RLV2N/RED[4]
W24
A3P/RLV4P/RED[1]
Y26
A3M/RLV4N/RED[0]
Y25
A4P/RLV5P/GREEN[9]
Y24
A4M/RLV5N/GREEN[8]
AC26
BCKP/TCON13/GREEN[1]
AC25
BCKM/TCON12/GREEN[0]
AA26
B0P/RLV6P/GREEN[7]
AA25
B0M/RLV6N/GREEN[6]
AA24
B1P/RLV7P/GREEN[5]
AB26
B1M/RLV7N/GREEN[4]
AB25
B2P/RLV8P/GREEN[3]
AB24
B2M/RLV8N/GREEN[2]
AC24
B3P/TCON11/BLUE[9]
AD26
B3M/TCON10/BLUE[8]
AD25
B4P/TCON9/BLUE[7]
AD24
B4M/TCON8/BLUE[6]
AD23
CCKP/LLV3P
AE23
CCKM/LLV3N
AE26
C0P/LLV0P/BLUE[5]
AE25
C0M/LLV0N/BLUE[4]
AF26
C1P/LLV1P/BLUE[3]
AF25
C1M/LLV1N/BLUE[2]
AE24
C2P/LLV2P/BLUE[1]
AF24
C2M/LLV2N/BLUE[0]
AF23
C3P/LLV4P
AD22
C3M/LLV4N
AE22
C4P/LLV5P
AF22
C4M/LLV5N
AD19
DCKP/TCON5
AE19
DCKM/TCON4
AD21
D0P/LLV6P
AE21
D0M/LLV6N
AF21
D1P/LLV7P
AD20
D1M/LLV7N
AE20
D2P/LLV8P
AF20
D2M/LLV8N
AF19
D3P/TCON3
AD18
D3M/TCON2
AE18
D4P/TCON1
AF18
D4M/TCON0
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
AB23
GPIO1/TCON14/VSYNC/VDD_EVEN
AC23
GPIO2/TCON7/LDE/GCLK4
AC22
GPIO3/TCON6/LCK/GCLK2
AB16
FRC_SPI_CZ
AA14
FRC_GPIO1
AC15
FRC_SPI1_CK
Y16
FRC_GPIO8
AC16
FRC_SPI_DO
AC14
FRC_SPI1_DI
AA16
FRC_SPI_CK
AA15
FRC_SPI_DI
Y10
FRC_I2CS_DA
AA11
FRC_I2CS_CK
AB15
FRC_PWM0
AB14
FRC_PWM1
S7R_RM
LGE101RC-R [S7R RM]
AE1
NC_48
AF16
NC_78
AF1
NC_64
AE3
NC_50
AD14
NC_45
AD3
NC_34
AF15
NC_77
AF2
NC_65
AE15
NC_62
AD2
NC_33
AD16
NC_47
AD15
NC_46
AE16
NC_63
AF3
NC_66
AF14
NC_76
AD1
NC_32
AD13
NC_44
AE14
NC_61
AE13
NC_60
AE4
NC_51
AD5
NC_36
AF4
NC_67
AD4
NC_35
AE2
NC_49
AF8
NC_71
AD9
NC_40
AE9
NC_56
AF9
NC_72
AE11
NC_58
AF6
NC_69
AE6
NC_53
AF11
NC_74
AD6
NC_37
AD12
NC_43
AE5
NC_52
AF12
NC_75
AF5
NC_68
AE12
NC_59
AE10
NC_57
AF7
NC_70
AD11
NC_42
AD7
NC_38
AD10
NC_41
AE7
NC_54
AF10
NC_73
AD8
NC_39
AE8
NC_55
Y11
NC_12
Y19
GND_105
S7M-PLUS_DivX
AE1 AF16 AF1
AE3 AD14 AD3 AF15
AF2 AE15 AD2 AD16 AD15 AE16
AF3 AF14 AD1
AD13 AE14 AE13
AE4 AD5
AF4 AD4
AE2
AF8 AD9
AE9
AF9
AE11
AF6
AE6 AF11 AD6 AD12
AE5 AF12
AF5 AE12
AE10
AF7 AD11 AD7 AD10
AE7 AF10 AD8
AE8
Y11
Y19
/PF_CE0 /PF_CE1
IC101-*5
LGE107DC-RP-1 [S7M+ DIVX]
FRC_DDR3_A0/DDR2_NC FRC_DDR3_A1/DDR2_A6 FRC_DDR3_A2/DDR2_A7 FRC_DDR3_A3/DDR2_A1 FRC_DDR3_A4/DDR2_CASZ FRC_DDR3_A5/DDR2_A10 FRC_DDR3_A6/DDR2_A0 FRC_DDR3_A7/DDR2_A5 FRC_DDR3_A8/DDR2_A2 FRC_DDR3_A9/DDR2_A9 FRC_DDR3_A10/DDR2_A11 FRC_DDR3_A11/DDR2_A4 FRC_DDR3_A12/DDR2_A8
FRC_DDR3_BA0/DDR2_BA2 FRC_DDR3_BA1/DDR2_ODT FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK FRC_DDR3_CKE/DDR2_RASZ FRC_DDR3_MCLKZ/DDR2_MCLKZ
FRC_DDR3_ODT/DDR2_BA1 FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE FRC_DDR3_WEZ/DDR2_BA0
FRC_DDR3_RESETB/DDR2_A3
FRC_DDR3_DQSL/DDR2_DQS0 FRC_DDR3_DQSLB/DDR2_DQSB0
FRC_DDR3_DQSU/DDR2_DQS1 FRC_DDR3_DQSUB/DDR2_DQSB1
FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11
FRC_DDR3_DQL0/DDR2_DQ6 FRC_DDR3_DQL1/DDR2_DQ0 FRC_DDR3_DQL2/DDR2_DQ1 FRC_DDR3_DQL3/DDR2_DQ2 FRC_DDR3_DQL4/DDR2_DQ4 FRC_DDR3_DQL5/DDR2_NC FRC_DDR3_DQL6/DDR2_DQ3 FRC_DDR3_DQL7/DDR2_DQ5
FRC_DDR3_DQU0/DDR2_DQ8 FRC_DDR3_DQU1/DDR2_DQ14 FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12 FRC_DDR3_DQU4/DDR2_DQ15 FRC_DDR3_DQU5/DDR2_DQ9 FRC_DDR3_DQU6/DDR2_DQ10 FRC_DDR3_DQU7/DDR2_DQM1
FRC_DDR3_NC/DDR2_DQM0
FRC_VSYNC_LIKE FRC_TESTPIN
/PF_OE /PF_WE PF_ALE /PF_WP
/F_RB
LVACLKP/LLV6P/BLUE[3] LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BLUE[1]
LVA3N/LLV7N/BLUE[0]
LVBCLKP/LLV0P/GREEN[5] LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5 TCON19/CS8/GCLK6 TCON11/CS5/HCON TCON10/CS4/OPT_N
TCON1/STV/GSP/VST
TCON14/SACN_BLK
TCON21/CS10/VGH_ODD TCON20/CS9/VGH_EVEN
TCON17/CS6/GCLK4
IC101-*13
LVA4P/LLV8P LVA4N/LLV8N
RLV3P/RED[7]
RLV3N/RED[6] RLV0P/LVSYNC RLV0N/LHSYNC
RLV1N/LCK
RLV2P/RED[9]
RLV1P/LDE RLV2N/RED[8] RLV4P/RED[5] RLV4N/RED[4] RLV5P/RED[3] RLV5N/RED[2]
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON5/TP/SOE
TCON13/LEDON
BCKP/TCON13/GREEN[1] BCKM/TCON12/GREEN[0]
GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4 GPIO3/TCON6/LCK/GCLK2
NC_26 NC_19 NC_30
NC_15 NC_31 NC_29
NC_21 NC_20
NC_11 NC_17
NC_25 NC_24
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0M/RLV0N/RED[8]
A1M/RLV1N/RED[6]
A2M/RLV2N/RED[4]
A3M/RLV4N/RED[0] A4P/RLV5P/GREEN[9] A4M/RLV5N/GREEN[8]
B0P/RLV6P/GREEN[7] B0M/RLV6N/GREEN[6] B1P/RLV7P/GREEN[5] B1M/RLV7N/GREEN[4] B2P/RLV8P/GREEN[3] B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9] B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
A0P/RLV0P/RED[9]
A1P/RLV1P/RED[7]
A2P/RLV2P/RED[5]
A3P/RLV4P/RED[1]
W26 W25 U26 U25 U24 V26 V25 V24 W24 Y26 Y25 Y24
AC26 AC25 AA26 AA25 AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24
AD23 AE23 AE26 AE25 AF26 AF25 AE24 AF24 AF23 AD22 AE22 AF22
AD19 AE19 AD21 AE21 AF21 AD20 AE20 AF20 AF19 AD18 AE18 AF18
AB22 AB23 AC23 AC22
AB16 AA14 AC15
Y16 AC16 AC14
AA16 AA15
Y10 AA11
AB15 AB14
CCKP/LLV3P CCKM/LLV3N
DCKP/TCON5 DCKM/TCON4
D3M/TCON2 D4P/TCON1 D4M/TCON0
FRC_SPI_CZ FRC_GPIO1
FRC_SPI1_CK
FRC_GPIO8 FRC_SPI_DO FRC_SPI1_DI
FRC_SPI_CK
FRC_SPI_DI
FRC_I2CS_DA FRC_I2CS_CK
FRC_PWM0
FRC_PWM1
S7_NEC_TXD S7_NEC_RXD
RGB_DDC_SDA RGB_DDC_SCL
W26 W25 U26 U25 U24 V26 V25 V24 W24 Y26 Y25 Y24
AC26 AC25 AA26 AA25 AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24
AD23 AE23 AE26 AE25 AF26 AF25 AE24 AF24 AF23
C3P/LLV4P
AD22
C3M/LLV4N
AE22
C4P/LLV5P
AF22
C4M/LLV5N
AD19 AE19 AD21
D0P/LLV6P
AE21
D0M/LLV6N
AF21
D1P/LLV7P
AD20
D1M/LLV7N
AE20
D2P/LLV8P
AF20
D2M/LLV8N
AF19
D3P/TCON3
AD18 AE18 AF18
AB22 AB23 AC23 AC22
AB16 AA14 AC15
Y16 AC16 AC14
AA16 AA15
Y10 AA11
AB15 AB14
+5V_Normal
I2C_SDA I2C_SCL
S7M-PLUS_RM
AE1 AF16 AF1 AE3 AD14 AD3 AF15 AF2 AE15 AD2 AD16 AD15 AE16
AF3 AF14 AD1
AD13 AE14 AE13
AE4 AD5 AF4 AD4
AE2
AF8 AD9
AE9 AF9
AE11 AF6
AE6 AF11 AD6 AD12 AE5 AF12 AF5 AE12
AE10 AF7 AD11 AD7 AD10 AE7 AF10 AD8
AE8
Y11 Y19
AR103
LGE107RC-RP [S7M+ RM]
FRC_DDR3_A0/DDR2_NC FRC_DDR3_A1/DDR2_A6 FRC_DDR3_A2/DDR2_A7 FRC_DDR3_A3/DDR2_A1 FRC_DDR3_A4/DDR2_CASZ FRC_DDR3_A5/DDR2_A10 FRC_DDR3_A6/DDR2_A0 FRC_DDR3_A7/DDR2_A5 FRC_DDR3_A8/DDR2_A2 FRC_DDR3_A9/DDR2_A9 FRC_DDR3_A10/DDR2_A11 FRC_DDR3_A11/DDR2_A4 FRC_DDR3_A12/DDR2_A8
FRC_DDR3_BA0/DDR2_BA2 FRC_DDR3_BA1/DDR2_ODT FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK FRC_DDR3_CKE/DDR2_RASZ FRC_DDR3_MCLKZ/DDR2_MCLKZ
FRC_DDR3_ODT/DDR2_BA1 FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE FRC_DDR3_WEZ/DDR2_BA0
FRC_DDR3_RESETB/DDR2_A3
FRC_DDR3_DQSL/DDR2_DQS0 FRC_DDR3_DQSLB/DDR2_DQSB0
FRC_DDR3_DQSU/DDR2_DQS1 FRC_DDR3_DQSUB/DDR2_DQSB1
FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11
FRC_DDR3_DQL0/DDR2_DQ6 FRC_DDR3_DQL1/DDR2_DQ0 FRC_DDR3_DQL2/DDR2_DQ1 FRC_DDR3_DQL3/DDR2_DQ2 FRC_DDR3_DQL4/DDR2_DQ4 FRC_DDR3_DQL5/DDR2_NC FRC_DDR3_DQL6/DDR2_DQ3 FRC_DDR3_DQL7/DDR2_DQ5
FRC_DDR3_DQU0/DDR2_DQ8 FRC_DDR3_DQU1/DDR2_DQ14 FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12 FRC_DDR3_DQU4/DDR2_DQ15 FRC_DDR3_DQU5/DDR2_DQ9 FRC_DDR3_DQU6/DDR2_DQ10 FRC_DDR3_DQU7/DDR2_DQM1
FRC_DDR3_NC/DDR2_DQM0
FRC_VSYNC_LIKE FRC_TESTPIN
22
IC101-*14
PCM_A[0-14]
R132 10K
R133 10K
AR104
TO SCART1
S7MR_BASIC
AE1
FRC_DDR3_A0/DDR2_NC
AF16
FRC_DDR3_A1/DDR2_A6
AF1
FRC_DDR3_A2/DDR2_A7
AE3
FRC_DDR3_A3/DDR2_A1
AD14
FRC_DDR3_A4/DDR2_CASZ
AD3
FRC_DDR3_A5/DDR2_A10
AF15
FRC_DDR3_A6/DDR2_A0
AF2
FRC_DDR3_A7/DDR2_A5
AE15
FRC_DDR3_A8/DDR2_A2
AD2
FRC_DDR3_A9/DDR2_A9
AD16
FRC_DDR3_A10/DDR2_A11
AD15
FRC_DDR3_A11/DDR2_A4
AE16
FRC_DDR3_A12/DDR2_A8
AF3
FRC_DDR3_BA0/DDR2_BA2
AF14
FRC_DDR3_BA1/DDR2_ODT
AD1
FRC_DDR3_BA2/DDR2_A12
AD13
FRC_DDR3_MCLK/DDR2_MCLK
AE14
FRC_DDR3_CKE/DDR2_RASZ
AE13
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE4
FRC_DDR3_ODT/DDR2_BA1
AD5
FRC_DDR3_RASZ/DDR2_WEZ
AF4
FRC_DDR3_CASZ/DDR2_CKE
AD4
FRC_DDR3_WEZ/DDR2_BA0
AE2
FRC_DDR3_RESETB/DDR2_A3
AF8
FRC_DDR3_DQSL/DDR2_DQS0
AD9
FRC_DDR3_DQSLB/DDR2_DQSB0
AE9
FRC_DDR3_DQSU/DDR2_DQS1
AF9
FRC_DDR3_DQSUB/DDR2_DQSB1
AE11
FRC_DDR3_DML/DDR2_DQ7
AF6
FRC_DDR3_DMU/DDR2_DQ11
AE6
FRC_DDR3_DQL0/DDR2_DQ6
AF11
FRC_DDR3_DQL1/DDR2_DQ0
AD6
FRC_DDR3_DQL2/DDR2_DQ1
AD12
FRC_DDR3_DQL3/DDR2_DQ2
AE5
FRC_DDR3_DQL4/DDR2_DQ4
AF12
FRC_DDR3_DQL5/DDR2_NC
AF5
FRC_DDR3_DQL6/DDR2_DQ3
AE12
FRC_DDR3_DQL7/DDR2_DQ5
AE10
FRC_DDR3_DQU0/DDR2_DQ8
AF7
FRC_DDR3_DQU1/DDR2_DQ14
AD11
FRC_DDR3_DQU2/DDR2_DQ13
AD7
FRC_DDR3_DQU3/DDR2_DQ12
AD10
FRC_DDR3_DQU4/DDR2_DQ15
AE7
FRC_DDR3_DQU5/DDR2_DQ9
AF10
FRC_DDR3_DQU6/DDR2_DQ10
AD8
FRC_DDR3_DQU7/DDR2_DQM1
AE8
FRC_DDR3_NC/DDR2_DQM0
Y11
FRC_REXT
Y19
FRC_TESTPIN
ACKP/RLV3P/RED[3] ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1] A3M/RLV4N/RED[0] A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1] BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7] B0M/RLV6N/GREEN[6] B1P/RLV7P/GREEN[5] B1M/RLV7N/GREEN[4] B2P/RLV8P/GREEN[3] B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7] B4M/TCON8/BLUE[6]
CCKP/LLV3P
CCKM/LLV3N C0P/LLV0P/BLUE[5] C0M/LLV0N/BLUE[4] C1P/LLV1P/BLUE[3] C1M/LLV1N/BLUE[2] C2P/LLV2P/BLUE[1] C2M/LLV2N/BLUE[0]
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P D2M/LLV8N D3P/TCON3 D3M/TCON2 D4P/TCON1 D4M/TCON0
GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4 GPIO3/TCON6/LCK/GCLK2
FRC_SPI_CZ FRC_GPIO1
FRC_SPI1_CK
FRC_GPIO8 FRC_SPI_DO
FRC_SPI1_DI
FRC_SPI_CK FRC_SPI_DI
FRC_I2CS_DA FRC_I2CS_CK
FRC_PWM0 FRC_PWM1
PCM_D[0-7]
/PCM_IORD
/PCM_IOWR
/PCM_IRQA
/PCM_WAIT
IC101-*6
LGE107C-R-1 [S7MR BASIC]
W26 W25 U26 U25 U24 V26 V25 V24 W24 Y26 Y25 Y24
AC26 AC25 AA26 AA25 AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24
AD23 AE23 AE26 AE25 AF26 AF25 AE24 AF24 AF23 AD22 AE22 AF22
AD19 AE19 AD21 AE21 AF21 AD20 AE20 AF20 AF19 AD18 AE18 AF18
AB22 AB23 AC23 AC22
AB16 AA14 AC15
Y16 AC16 AC14
AA16 AA15
Y10 AA11
AB15 AB14
/PCM_REG
/PCM_OE
/PCM_WE
/PCM_CE
/PCM_CD
PCM_RST
22
MODEL_OPT_3
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1] BCKM/TCON12/GREEN[0]
B0M/RLV6N/GREEN[6]
B1M/RLV7N/GREEN[4]
B2M/RLV8N/GREEN[2]
B3M/TCON10/BLUE[8]
B4M/TCON8/BLUE[6]
C0M/LLV0N/BLUE[4]
C1M/LLV1N/BLUE[2]
C2M/LLV2N/BLUE[0]
GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4 GPIO3/TCON6/LCK/GCLK2
FRC_GPIO0/UART_RX
FRC_GPIO9/UART_TX
DSUB_DET
PCM_5V_CTL
/RST-PHY
W26
ACKP/RLV3P/RED[3]
W25
ACKM/RLV3N/RED[2]
U26
A0P/RLV0P/RED[9]
U25
A0M/RLV0N/RED[8]
U24
A1P/RLV1P/RED[7]
V26
A1M/RLV1N/RED[6]
V25
A2P/RLV2P/RED[5]
V24
A2M/RLV2N/RED[4]
W24
A3P/RLV4P/RED[1]
Y26
A3M/RLV4N/RED[0]
Y25
A4P/RLV5P/GREEN[9]
Y24
AC26 AC25 AA26
B0P/RLV6P/GREEN[7]
AA25 AA24
B1P/RLV7P/GREEN[5]
AB26 AB25
B2P/RLV8P/GREEN[3]
AB24 AC24
B3P/TCON11/BLUE[9]
AD26 AD25
B4P/TCON9/BLUE[7]
AD24
AD23
CCKP/LLV3P
AE23
CCKM/LLV3N
AE26
C0P/LLV0P/BLUE[5]
AE25 AF26
C1P/LLV1P/BLUE[3]
AF25 AE24
C2P/LLV2P/BLUE[1]
AF24 AF23
C3P/LLV4P
AD22
C3M/LLV4N
AE22
C4P/LLV5P
AF22
C4M/LLV5N
AD19
DCKP/TCON5
AE19
DCKM/TCON4
AD21
D0P/LLV6P
AE21
D0M/LLV6N
AF21
D1P/LLV7P
AD20
D1M/LLV7N
AE20
D2P/LLV8P
AF20
D2M/LLV8N
AF19
D3P/TCON3
AD18
D3M/TCON2
AE18
D4P/TCON1
AF18
D4M/TCON0
AB22 AB23 AC23 AC22
AB16 AA14
FRC_GPIO1
AC15
FRC_GPIO3
Y16
FRC_GPIO8
AC16 AC14
FRC_GPIO10
AA16
FRC_I2CM_DA
AA15
FRC_I2CM_CK
Y10
FRC_I2CS_DA
AA11
FRC_I2CS_CK
AB15
FRC_PWM0
AB14
FRC_PWM1
PWM0 PWM1 PWM2
SC_RE2 SC_RE1
AE1 AF16 AF1
AE3 AD14 AD3 AF15
AF2 AE15 AD2 AD16 AD15 AE16
AF3 AF14 AD1
AD13 AE14 AE13
AE4 AD5
AF4 AD4
AE2
AF8 AD9
AE9
AF9
AE11
AF6
AE6 AF11 AD6 AD12
AE5 AF12
AF5 AE12
AE10
AF7 AD11 AD7 AD10
AE7 AF10 AD8
AE8
Y11
Y19
FRC_DDR3_A0/DDR2_NC FRC_DDR3_A1/DDR2_A6 FRC_DDR3_A2/DDR2_A7 FRC_DDR3_A3/DDR2_A1 FRC_DDR3_A4/DDR2_CASZ FRC_DDR3_A5/DDR2_A10 FRC_DDR3_A6/DDR2_A0 FRC_DDR3_A7/DDR2_A5 FRC_DDR3_A8/DDR2_A2 FRC_DDR3_A9/DDR2_A9 FRC_DDR3_A10/DDR2_A11 FRC_DDR3_A11/DDR2_A4 FRC_DDR3_A12/DDR2_A8
FRC_DDR3_BA0/DDR2_BA2 FRC_DDR3_BA1/DDR2_ODT FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK FRC_DDR3_CKE/DDR2_RASZ FRC_DDR3_MCLKZ/DDR2_MCLKZ
FRC_DDR3_ODT/DDR2_BA1 FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE FRC_DDR3_WEZ/DDR2_BA0
FRC_DDR3_RESETB/DDR2_A3
FRC_DDR3_DQSL/DDR2_DQS0 FRC_DDR3_DQSLB/DDR2_DQSB0
FRC_DDR3_DQSU/DDR2_DQS1 FRC_DDR3_DQSUB/DDR2_DQSB1
FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11
FRC_DDR3_DQL0/DDR2_DQ6 FRC_DDR3_DQL1/DDR2_DQ0 FRC_DDR3_DQL2/DDR2_DQ1 FRC_DDR3_DQL3/DDR2_DQ2 FRC_DDR3_DQL4/DDR2_DQ4 FRC_DDR3_DQL5/DDR2_NC FRC_DDR3_DQL6/DDR2_DQ3 FRC_DDR3_DQL7/DDR2_DQ5
FRC_DDR3_DQU0/DDR2_DQ8 FRC_DDR3_DQU1/DDR2_DQ14 FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12 FRC_DDR3_DQU4/DDR2_DQ15 FRC_DDR3_DQU5/DDR2_DQ9 FRC_DDR3_DQU6/DDR2_DQ10 FRC_DDR3_DQU7/DDR2_DQM1
FRC_DDR3_NC/DDR2_DQM0
FRC_REXT FRC_TESTPIN
S7MR_MS10
LGE107C-R [S7MR MS10]
PCM_A[0] PCM_A[1] PCM_A[2] PCM_A[3] PCM_A[4] PCM_A[5] PCM_A[6] PCM_A[7] PCM_A[8] PCM_A[9] PCM_A[10] PCM_A[11] PCM_A[12] PCM_A[13] PCM_A[14]
C108
0.1uF OPT
22R134 22R135
22R136 22R137
22R138 22R139
IC101-*7
GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1] BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7] B0M/RLV6N/GREEN[6] B1P/RLV7P/GREEN[5] B1M/RLV7N/GREEN[4] B2P/RLV8P/GREEN[3] B2M/RLV8N/GREEN[2]
B3M/TCON10/BLUE[8]
GPIO2/TCON7/LDE/GCLK4 GPIO3/TCON6/LCK/GCLK2
FRC_GPIO0/UART_RX
FRC_GPIO9/UART_TX
PCM_D[0] PCM_D[1] PCM_D[2] PCM_D[3] PCM_D[4] PCM_D[5] PCM_D[6] PCM_D[7]
ACKP/RLV3P/RED[3] ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1] A3M/RLV4N/RED[0] A4P/RLV5P/GREEN[9]
B3P/TCON11/BLUE[9]
B4P/TCON9/BLUE[7] B4M/TCON8/BLUE[6]
CCKP/LLV3P
CCKM/LLV3N C0P/LLV0P/BLUE[5] C0M/LLV0N/BLUE[4] C1P/LLV1P/BLUE[3] C1M/LLV1N/BLUE[2] C2P/LLV2P/BLUE[1] C2M/LLV2N/BLUE[0]
C3M/LLV4N
C4M/LLV5N
DCKP/TCON5
DCKM/TCON4
D0M/LLV6N
D1M/LLV7N
D2M/LLV8N
D3M/TCON2
D4M/TCON0
FRC_GPIO10
FRC_I2CM_DA FRC_I2CM_CK
FRC_I2CS_DA FRC_I2CS_CK
C109
C3P/LLV4P
C4P/LLV5P
D0P/LLV6P
D1P/LLV7P
D2P/LLV8P
D3P/TCON3
D4P/TCON1
FRC_GPIO1 FRC_GPIO3
FRC_GPIO8
FRC_PWM0 FRC_PWM1
0.1uF
W26 W25 U26 U25 U24 V26 V25 V24 W24 Y26 Y25 Y24
AC26 AC25 AA26 AA25 AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24
AD23 AE23 AE26 AE25 AF26 AF25 AE24 AF24 AF23 AD22 AE22 AF22
AD19 AE19 AD21 AE21 AF21 AD20 AE20 AF20 AF19 AD18 AE18 AF18
AB22 AB23 AC23 AC22
AB16 AA14 AC15
Y16 AC16 AC14
AA16 AA15
Y10 AA11
AB15 AB14
I2C
33R103
U22 T21
T22 AB18 AC18 AC19 AC20 AC21
U21
V21
Y22 AA22
R22
R21
T23
T24 AA23
Y20 AB17 AA21
U23
Y23
W23
W22
AA17
V22
W21
Y21
AA20
V23
P23
R23
P22
AC17 AB20 AA18 AB21 AB19 AD17 AA19
M23
N23
M22
N22
A5 B5
K23
K22
G23
G22
G21
C6 B6 C8 C7 A6
S7MR_DivX
LGE107DC-R-1 [S7MR DIVX]
AE1
FRC_DDR3_A0/DDR2_NC
AF16
FRC_DDR3_A1/DDR2_A6
AF1
FRC_DDR3_A2/DDR2_A7
AE3
FRC_DDR3_A3/DDR2_A1
AD14
FRC_DDR3_A4/DDR2_CASZ
AD3
FRC_DDR3_A5/DDR2_A10
AF15
FRC_DDR3_A6/DDR2_A0
AF2
FRC_DDR3_A7/DDR2_A5
AE15
FRC_DDR3_A8/DDR2_A2
AD2
FRC_DDR3_A9/DDR2_A9
AD16
FRC_DDR3_A10/DDR2_A11
AD15
FRC_DDR3_A11/DDR2_A4
AE16
FRC_DDR3_A12/DDR2_A8
AF3
FRC_DDR3_BA0/DDR2_BA2
AF14
FRC_DDR3_BA1/DDR2_ODT
AD1
FRC_DDR3_BA2/DDR2_A12
AD13
FRC_DDR3_MCLK/DDR2_MCLK
AE14
FRC_DDR3_CKE/DDR2_RASZ
AE13
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE4
FRC_DDR3_ODT/DDR2_BA1
AD5
FRC_DDR3_RASZ/DDR2_WEZ
AF4
FRC_DDR3_CASZ/DDR2_CKE
AD4
FRC_DDR3_WEZ/DDR2_BA0
AE2
FRC_DDR3_RESETB/DDR2_A3
AF8
FRC_DDR3_DQSL/DDR2_DQS0
AD9
FRC_DDR3_DQSLB/DDR2_DQSB0
AE9
FRC_DDR3_DQSU/DDR2_DQS1
AF9
FRC_DDR3_DQSUB/DDR2_DQSB1
AE11
FRC_DDR3_DML/DDR2_DQ7
AF6
FRC_DDR3_DMU/DDR2_DQ11
AE6
FRC_DDR3_DQL0/DDR2_DQ6
AF11
FRC_DDR3_DQL1/DDR2_DQ0
AD6
FRC_DDR3_DQL2/DDR2_DQ1
AD12
FRC_DDR3_DQL3/DDR2_DQ2
AE5
FRC_DDR3_DQL4/DDR2_DQ4
AF12
FRC_DDR3_DQL5/DDR2_NC
AF5
FRC_DDR3_DQL6/DDR2_DQ3
AE12
FRC_DDR3_DQL7/DDR2_DQ5
AE10
FRC_DDR3_DQU0/DDR2_DQ8
AF7
FRC_DDR3_DQU1/DDR2_DQ14
AD11
FRC_DDR3_DQU2/DDR2_DQ13
AD7
FRC_DDR3_DQU3/DDR2_DQ12
AD10
FRC_DDR3_DQU4/DDR2_DQ15
AE7
FRC_DDR3_DQU5/DDR2_DQ9
AF10
FRC_DDR3_DQU6/DDR2_DQ10
AD8
FRC_DDR3_DQU7/DDR2_DQM1
AE8
FRC_DDR3_NC/DDR2_DQM0
Y11
FRC_REXT
Y19
FRC_TESTPIN
1K
R1401KR141
PCM_D0 PCM_D1 PCM_D2 PCM_D3 PCM_D4 PCM_D5 PCM_D6 PCM_D7
PCM_A0 PCM_A1 PCM_A2 PCM_A3 PCM_A4 PCM_A5 PCM_A6 PCM_A7 PCM_A8 PCM_A9 PCM_A10 PCM_A11 PCM_A12 PCM_A13 PCM_A14
PCM_REG_N
PCM_OE_N PCM_WE_N PCM_IORD_N PCM_IOWR_N
PCM_CE_N PCM_IRQA_N PCM_CD_N PCM_WAIT_N PCM_RESET
PCM_PF_CE0Z PCM_PF_CE1Z PCM_PF_OEZ PCM_PF_WEZ PCM_PF_ALE PCM_PF_AD[15] PCM_PF_RBZ
UART_TX2/GPIO65 UART_RX2/GPIO64
DDCR_DA/GPIO71 DDCR_CK/GPIO72
DDCA_DA/UART0_TX DDCA_CK/UART0_RX
PWM0/GPIO66 PWM1/GPIO67 PWM2/GPIO68 PWM3/GPIO69 PWM4/GPIO70
SAR0/GPIO31 SAR1/GPIO32 SAR2/GPIO33 SAR3/GPIO34 SAR4/GPIO35
IC101-*8
ACKP/RLV3P/RED[3] ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1] A3M/RLV4N/RED[0] A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1] BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7] B0M/RLV6N/GREEN[6] B1P/RLV7P/GREEN[5] B1M/RLV7N/GREEN[4] B2P/RLV8P/GREEN[3] B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7] B4M/TCON8/BLUE[6]
CCKP/LLV3P
CCKM/LLV3N C0P/LLV0P/BLUE[5] C0M/LLV0N/BLUE[4] C1P/LLV1P/BLUE[3] C1M/LLV1N/BLUE[2] C2P/LLV2P/BLUE[1] C2M/LLV2N/BLUE[0]
C3P/LLV4P C3M/LLV4N C4P/LLV5P C4M/LLV5N
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P D0M/LLV6N D1P/LLV7P D1M/LLV7N D2P/LLV8P D2M/LLV8N
D3P/TCON3 D3M/TCON2 D4P/TCON1 D4M/TCON0
GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4 GPIO3/TCON6/LCK/GCLK2
FRC_GPIO0/UART_RX
FRC_GPIO1 FRC_GPIO3
FRC_GPIO8
FRC_GPIO9/UART_TX
FRC_GPIO10
FRC_I2CM_DA FRC_I2CM_CK
FRC_I2CS_DA FRC_I2CS_CK
FRC_PWM0 FRC_PWM1
R142
W26 W25 U26 U25 U24 V26 V25 V24 W24 Y26 Y25 Y24
AC26 AC25 AA26 AA25 AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24
AD23 AE23 AE26 AE25 AF26 AF25 AE24 AF24 AF23 AD22 AE22 AF22
AD19 AE19 AD21 AE21 AF21 AD20 AE20 AF20 AF19 AD18 AE18 AF18
AB22 AB23 AC23 AC22
AB16 AA14 AC15
Y16 AC16 AC14
AA16 AA15
Y10 AA11
AB15 AB14
+3.3V_Normal
3.3K
GP3_Saturn7M Ver. 0.1
FLASH/EEPROM/GPIO
1
+3.3V_Normal
Copyright © 2011 LG Electronics. Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
LNA2_CTL
RF_SWITCH_CTL
R202
R203
R210 R213
R216
OPT
BOOSTER_OPT
RF_SW_OPT
OPT OPT OPT OPT
MODEL OPTION
1K
1K
1K
1K
R294
1K
R297
1K
3D
FHD
PHM_ON
R226
R211
R206
R208
FRC_H/W_OPT
1K
1KR209
PHM_OFF
R212
1K
NO_FRC
R227
1K
2D
HD
R207
MODEL_OPT_0IF_AGC_SEL MODEL_OPT_1 MODEL_OPT_2 MODEL_OPT_3
MODEL_OPT_4 MODEL_OPT_5 MODEL_OPT_6
1KR295
1K
OPT
OPT
R214
100R201
100R204 100
0 0
100/120Hz LVDS
100
100
1KR293
1K
OPT
OPT
R215
50/60Hz LVDS
PIN NAME
MODEL_OPT_0
MODEL_OPT_4
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_5
MODEL_OPT_6
S7M-PLUS_DivX_MS10
LGE107DC-RP [S7M+ DIVX/MS10]
0.047uFC204
0.047uFC205
0.047uFC206
0.047uFC207
0.047uFC208
0.047uFC209 1000pFC210
0.047uFC211
0.047uFC212
0.047uF
0.047uF
0.047uF
0.047uF 1000pFC217
0.047uFC218
0.047uFC219
0.047uFC220
0.047uFC221
0.047uFC222
0.047uFC223 1000pFC224
0.047uF
0.047uFC225
0.047uFC226
0.047uFC227
0.047uFC4057
0.047uFC229
0.047uFC230
0.047uFC231
0.047uFC232
0.047uFC233
F1 F2 G2 G3 H3 G1 H1 H2 F5 F4 E6
D3 C1 D1 D2 E2 E3 F3 E1 D4 E4 D5
AA2 AA1 AB1 AA3 AB3 AB2 AC2 AC1 AB4 AA4 AC3
A2 A3 B3 A1 B1 B2 C2 C3 B4 C4 E5 D6
G5 G6 K1 L3 K3 K2
J3 J2 J1
G4 H6 K5 K4
J4 K6 H4
J6
J5
H5 N3 N2
M2 M1
L2 L1
M3
N4 N6 L4 L5 L6
M4 M5
K7
M6 M7
N5
A_RXCP A_RXCN A_RX0P A_RX0N A_RX1P A_RX1N A_RX2P A_RX2N DDCDA_DA/GPIO24 DDCDA_CK/GPIO23 HOTPLUGA/GPIO19
B_RXCP B_RXCN B_RX0P B_RX0N B_RX1P B_RX1N B_RX2P B_RX2N DDCDB_DA/GPIO26 DDCDB_CK/GPIO25 HOTPLUGB/GPIO20
C_RXCP C_RXCN C_RX0P C_RX0N C_RX1P C_RX1N C_RX2P C_RX2N DDCDC_DA/GPIO28 DDCDC_CK/GPIO27 HOTPLUGC/GPIO21
D_RXCP D_RXCN D_RX0P D_RX0N D_RX1P D_RX1N D_RX2P D_RX2N DDCDD_DA/GPIO30 DDCDD_CK/GPIO29 HOTPLUGD/GPIO22 CEC/GPIO5
HSYNC0 VSYNC0 RIN0P RIN0M GIN0P GIN0M BIN0P BIN0M SOGIN0
HSYNC1 VSYNC1 RIN1P RIN1M GIN1P GIN1M BIN1P BIN1M SOGIN1
HSYNC2 RIN2P RIN2M GIN2P GIN2M BIN2P BIN2M SOGIN2
CVBS0P CVBS1P CVBS2P CVBS3P CVBS4P CVBS5P CVBS6P CVBS7P
CVBS_OUT1 CVBS_OUT2
VCOM0
CK+_HDMI1 CK-_HDMI1 D0+_HDMI1 D0-_HDMI1 D1+_HDMI1 D1-_HDMI1 D2+_HDMI1 D2-_HDMI1 DDC_SDA_1 DDC_SCL_1 HPD1
CK+_HDMI2 CK-_HDMI2 D0+_HDMI2 D0-_HDMI2 D1+_HDMI2 D1-_HDMI2 D2+_HDMI2 D2-_HDMI2 DDC_SDA_2 DDC_SCL_2 HPD2
CK+_HDMI4
HDMI
CK-_HDMI4 D0+_HDMI4 D0-_HDMI4 D1+_HDMI4 D1-_HDMI4 D2+_HDMI4 D2-_HDMI4 DDC_SDA_4 DDC_SCL_4 HPD4
CEC_REMOTE_S7
DSUB_HSYNC
DSUB_VSYNC
DSUB_R+
DSUB_G+
DSUB
DSUB_B+
SCART1_RGB/COMP1
SC1_FB
SC1_R+/COMP1_Pr+
SC1_G+/COMP1_Y+
SC1_B+/COMP1_Pb+
SC1_SOG_IN
COMP2_Pr+
COMP2_Y+
COMP2
COMP2_Pb+
TU_CVBS
SC1_CVBS_IN
AV_CVBS_IN
SIDEAV_CVBS_IN
AV_CVBS_IN2
CVBS In/OUT
DTV/MNT_VOUT
SC1_ID
Delete CHB_CVBS_IN
R4026
10K
1000pF
R4023
C203
OPT
R4024
22
R4025
22
33R228 68R229 33R230 68R231 33R232 68R233
10K
33R253 68R254
C213
R255
33
C214
R256
68 33R257
C215
68R258
C216
0
R236
NON_EU
33R237 68R238
R239
33
R240
68 33R241 68R242
C248
33R244 33R245 33R246 33R4016 33R248 33R249 33R250 33R251
TP210
68R252
Close to MSTAR
AV_CVBS_IN2
TP211
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
MODEL OPTION
PIN NO.
G19
E18
C5
F7
B6
D18
F9
IC101
I2S_OUT_BCK/GPIO181 I2S_OUT_MCK/GPIO179
I2S_OUT_SD1/GPIO183 I2S_OUT_SD2/GPIO184 I2S_OUT_SD3/GPIO185
I2S_OUT_WS/GPIO180
LOW
NO FRC
50/60Hz LVDS
PHM_OFF
2D
HD
Ready
LCD
SSIF/SIFP
SSIF/SIFM
RF_TAGC
TGPIO0/UPGAIN TGPIO1/DNGAIN TGPIO2/I2C_CLK TGPIO3/I2C_SDA
XTALIN
XTALOUT
SPDIF_IN/GPIO177
SPDIF_OUT/GPIO178
I2S_IN_BCK/GPIO175
I2S_IN_SD/GPIO176
I2S_IN_WS/GPIO174
I2S_OUT_SD/GPIO182
LINE_IN_0L LINE_IN_0R LINE_IN_1L LINE_IN_1R LINE_IN_2L LINE_IN_2R LINE_IN_3L LINE_IN_3R LINE_IN_4L LINE_IN_4R LINE_IN_5L LINE_IN_5R
LINE_OUT_0L LINE_OUT_2L LINE_OUT_3L LINE_OUT_0R LINE_OUT_2R LINE_OUT_3R
MIC_DET_IN
MICCM
AUCOM
HP_OUT_1L HP_OUT_1R
ET_RXD0
ET_TXD0
ET_RXD1
ET_TXD1
ET_REFCLK
ET_TX_EN
ET_MDC
ET_MDIO
ET_CRS
AVLINK
TESTPIN
U3_RESET
FRC_HW_OPT
100/120Hz LVDS
PHM_ON
default
VIFP
VIFM
IP
IM
QP
QM
IFAGC
DM_P0
DP_P0
DM_P1
DP_P1
MICIN
VRM
VAG
VRP
IRINT
RESET
HIGH
U5_EXTERNALBOOT :HIGH HIGH
In case of NON_EU, default value set LOW.
-->In case of GP2, This port was used for GIP/NON_GIP
--> MODEL_OPT_5, MODEL_OPT_6
: Only 3D_SG GPIO OUTPUT CONTROL
TP201 TP202
TP203 TP204
TP205
C237
C239
C4060 C242
C246 C247
TP208
OPT
C234
2.2uF
C235
2.2uF
OPT
CM2012F5R6KT
5.6uH
L203
5.6uHL205
CM2012F5R6KT
TP206
FRC
22
R4018
10K
R4017
OPT
FHD
OLED
3D
W2 W1
V2 V1
Y2 Y1
U3 V3
Y5 Y4
U1 U2 R3 T3
T2 T1
G14 G13
B7 A7
AF17 AE17
F14 F13 F15
D20 E20 D19 F18 E18 D18 E19
N1 P3 P1 P2 P4 P5 R6 T6 U5 V5 U6 V6
U4 W3 W4 V4 Y3 W5
R4 T5 R5
T4
P7
R7 P6
R1 R2
E21 E22
D21 F21
E23 D22 F22 D23 F23
F8 G8 K8 A4 Y17
OPT_0
NO_FRC : LOW LOW
U3_INTERNAL : HIGH LOW
reserved for FRC : LOW HIGH
--> This option is only applied in EU.
OPT_4
Close to MSTAR
ANALOG SIF
Close to MSTAR
+3.3V_Normal
AMP_SCL
100R296
NEC_SDA
COMP2_DET
NEC_SCL
C256
0.1uF
100R298
+3.3V_Normal
X201 24MHz
FRC_RESET
AMP_SDA
22R291 22R292
MODEL_OPT_4 MODEL_OPT_5
EXT_L_AMP
EXT_R_AMP
C263 10uF
IR
FULL_NIM FULL_NIM
2.2uFC236
2.2uF
2.2uFC238
2.2uF
2.2uFC4059
2.2uF
2.2uF
2.2uFC243
2.2uFC244
2.2uFC245
2.2uF
OPT
2.2uF
OPT
C249
4.7uF
HEAD_PHONE
HEAD_PHONE
ET_RXD0
ET_TXD0
ET_RXD1 ET_TXD1
ET_REF_CLK ET_TX_EN
ET_MDC
ET_MDIO
ET_CRS
FRC
R205
10K
R287
OPT
C253
1M
1uF
100R288 100R289
0.1uFC250
0.1uFC251
L227
BLM18PG121SN1D
C4064
0.1uF
TU/DEMOD_I2C
27pFC261
27pFC262
EXT SPEAKER
BLM18SG121TN1D
HEAD_PHONE
R4006
GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9
+1.26V_VDDC
G18 H9 H10 H18 H19 J10 J17 J18 J19 K9 K10 K11 K12 K13 K14 K15 K16 K17 K18 L9 L10 L11 L12 L13 L14 L15 L16 L17 M9 M10 M11 M12 M13 M14 M15 M16 M17 N10 N11 N12 N13 N14 N15 N16 N17 P10 P11 P12 P13 P14 P15 P16 P17 R10 R11 R12 R13 R14 R15 R16 R17 R18 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 U10 U11 U12 U13 U14 U15 U16 U17 V7 V8 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18 W7 W8 W9 W10 W11 W12 W13 W16 W17 W18 Y13 Y18 AA13 AB13 AC13 D17 H23 AF13 J9
BLM18SG121TN1D
U9
20101023
L223
C4065-*1
0.1uF 16V
IF_AGC_ATSC
I2S_I/F
AUDIO OUT
+1.26V_VDDC
RSDS Power OPT
+1.26V_VDDC
10uFC275
10uFC228
+3.3V_Normal
VDD33
+3.3V_Normal
L228
BLM18SG700TN1D
L226
BLM18SG700TN1D
0.1uF
C4043
BLM18PG121SN1D
BLM18PG121SN1D
+1.5V_FRC_DDR
10uFC276
0.1uFC280
0.1uFC277
VDD33
L204
BLM18PG121SN1D
10uFC284
0.1uFC4044
OPT
AVDD_MEMPLL:24mA
FRC_LPLL:13mA
FRC_LPLL
L206
OPT
VDD33_DVI:163mA
VDD33_DVI
L207
C287 10uF
Normal 2.5V
+2.5V_Normal
L211
BLM18PG121SN1D
+2.5V_Normal
L212
BLM18PG121SN1D
AU25:10mA
+1.5V_DDR
L209
BLM18PG121SN1D
OPT
C281
C278
10uF
FRC
L210
BLM18PG121SN1D
FRC
FRC
10uF
C279
C282
MIU1VDDC
10uFC4063
0.1uFC292
0.1uFC283 OPT
OPT
VDD33_T/VDDP/U3_VD33_2:47mA
10uFC4001
10uFC293
OPT
VDD33
BLM18PG121SN1D
0.1uFC286
0.1uF
C294
C4002
AVDD2P5
10uFC289
AU25
DDR3 1.5V
AVDD_DDR0:55mA
0.1uF
C4046
0.1uF
C290
C297
10uF
OPT
OPT
AVDD_DDR_FRC:55mA
AVDD_DDR_FRC
FRC
OPT
0.1uF
10uF
C291
C298
MIU0VDDC
10uFC4066
0.1uFC4056
VDDC 1.26V
0.1uFC4011
0.1uFC299
0.1uFC4006
0.1uFC4013
OPT
Normal Power 3.3V
0.1uFC4014
0.1uFC4007
0.1uFC4012
OPT
AU33
L215
C4015
0.1uF OPT
FRC_MPLL:4mA
0.1uFC4016
AVDD_DMPLL
L217
BLM18PG121SN1D
C288
0.1uF
C4008
0.1uF
OPT
AVDD2P5/ADC2P5:162mA
0.1uFC295
0.1uFC296
AVDD_DDR0
0.1uF
C4003
0.1uF
OPT
0.1uF
0.1uF C4004
0.1uFC4062
C4009
FRC
C4010
0.1uF
0.1uF
C4017
AVDD_DMPLL/AVDD_NODIE:7.362mA
AVDD2P5
+2.5V_Normal
L219
BLM18PG121SN1D
AVDD25_PGA:13mA
AVDD_DDR0
C4018
0.1uF
0.1uF
C4042
OPT
AVDD_DDR0
R4014
FRC
R4015
0.1uF
0.1uF
C240
+1.26V_VDDC
0.1uFC4019 OPT
0.1uFC4020
OPT
+2.5V_Normal
0.1uFC4023
AVDD2P5
AVDD25_PGA
C4022
10uF
OPT
1/16W1K1%
1/16W1K1%
C241
FRC
L225
BLM18SG700TN1D
FRC
0.1uFC4024
0.1uFC4031
0.1uFC4025
FRC_AVDD:60mAAU33:31mA
L221
BLM18PG121SN1D
FRC
FRC_VDD33_DDR:50mA
VDD33
FRC_VDD33_DDR
FRC
L222
BLM18PG121SN1D
0.1uFC4026
0.1uFC4027
AVDD_DDR1:55mA
C4032
0.1uF
C4028
10uF
MVREF
0.1uF
FRCVDDC
10uFC4061
AVDD_DDR0
0.1uF
C4036
OPT
0.1uFC4058
FRC_AVDD
FRC
C4038
0.1uF
FRC
0.1uF
0.1uFC4040
0.1uFC4041
VDD33
MIU0VDDC MIU1VDDC
FRCVDDC
FRC_AVDD
FRC_LPLL
LGE107DC-RP [S7M+ DIVX/MS10]
+1.26V_VDDC
H11 H12 H13 H14 H15
J12 J13 J14 J15 J16
L18
H16 K19
L19 M18 M19
N18
N19
N20
P18 P19 P20
Y12
J11
L7
1uFC4045
AVDD2P5
AU25
AVDD2P5
AVDD2P5
AVDD25_PGA
AVDD_DMPLL
VDD33_DVI
AVDD_DMPLL
AU33
VDD33
VDD_RSDS
FRC_VDD33_DDR
0.1uFC285
AVDD_DDR0
AVDD_DDR0
AVDD_DDR_FRC
MVREF
AB11 AB12 AC11 AC12 AA12
H7
J7 J8
L8
W15
Y15
U8
M8
N9 P9 N8 P8
T7 U7
T9
R8 R9 T8
V20 W20
U19
U20
V19
W19
U18
T20
Y14
R19 W14
D15
D16
E15
E16
E17
F16
F17 G16 G17 H17
G15
Y7 Y8
VDDC : 2026mA
S7M-PLUS_DivX_MS10
IC101
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11
A_DVDD B_DVDD
FRC_VDDC_0 FRC_VDDC_1 FRC_VDDC_2 FRC_VDDC_3 FRC_VDDC_4 FRC_VDDC_5 FRC_VDDC_6 FRC_VDDC_7 FRC_VDDC_8
U3_DVDD_DDR
AVDD1P2 DVDD_NODIE
AVDD2P5_ADC_1 AVDD2P5_ADC_2 AVDD25_REF
AVDD_AU25
PVDD_1 PVDD_2
AVDD25_PGA
AVDD_NODIE
AVDD_DVI_1 AVDD_DVI_2 AVDD3P3_CVBS AVDD_DMPLL
AVDD_AU33 AVDD_EAR33
AVDD33_T
VDDP_1 VDDP_2 VDDP_3
FRC_VD33_2_1 FRC_VD33_2_2
FRC_AVDD_RSDS_1 FRC_AVDD_RSDS_2 FRC_AVDD_RSDS_3
FRC_AVDD FRC_AVDD_LPLL FRC_AVDD_MPLL
FRC_VDD33_DDR
AVDD_MEMPLL FRC_AVDD_MEMPLL
AVDD_DDR0_D_1 AVDD_DDR0_D_2 AVDD_DDR0_D_3 AVDD_DDR0_D_4 AVDD_DDR0_C
AVDD_DDR1_D_1 AVDD_DDR1_D_2 AVDD_DDR1_D_3 AVDD_DDR1_D_4 AVDD_DDR1_C
FRC_AVDD_DDR_D_1 FRC_AVDD_DDR_D_2 FRC_AVDD_DDR_D_3 FRC_AVDD_DDR_D_4 FRC_AVDD_DDR_C
MVREF
NC_1 NC_2
PGA_VCOM
GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79 GND_80 GND_81 GND_82 GND_83 GND_84 GND_85 GND_86 GND_87 GND_88 GND_89 GND_90 GND_91 GND_92 GND_93 GND_94 GND_95 GND_96 GND_97 GND_98
GND_99 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110
GND_FU
RSDS Power OPT
+2.5V_Normal
0.1uFC257
0.1uFC258
47R4002 47R4003
OPT
C264
R4019 1K
DEMOD_SCL
DEMOD_SDA
TU_SCL
TU_SDA
VDD33
1000pF
Close to MSTAR
R4020
10K
LED_DRIVER_D/L_SDA
SPDIF_OUT
VDD_RSDS:88mA
OPT
L213
BLM18PG121SN1D
L214
BLM18PG121SN1D
FRC
DTV_IF
IF_P_MSTAR IF_N_MSTAR
TU_SIF
C4065
0.022uF 16V
IF_AGC_NON_ATSC
VDD_RSDS
C4005
0.1uF
IF_AGC_MAIN
B/T USB
SIDE_USB_DM
SIDE_USB_DP
SIDE USB
AUD_SCK AUD_MASTER_CLK_0 AUD_LRCH LED_DRIVER_D/L_SCL
AUD_LRCK
SC1/COMP1_L_IN SC1/COMP1_R_IN AV_L_IN AV_R_IN SIDEAV_L_IN SIDEAV_R_IN COMP2_L_IN COMP2_R_IN PC_L_IN PC_R_IN
L202
4.7uF
C268
10K
4.7uF
C272
SOC_RESET
HEAD_PHONE
AUDIO IN
H/P OUT
HP_LOUT
SCART1_Lout
SCART1_Rout
HP_ROUT
GP2R
MAIN2, HW OPT 2
VCC1.5V_U3_DDR
Copyright © 2011 LG Electronics. Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
C301
VCC1.5V_U3_DDR
R301
R302
C-MVREFCA
C-MVREFDQ
VCC1.5V_U3_DDR
10uF
C303
0.1uF
0.1uF
C305
OPT
Close to DDR Power Pin
1K 1%
0.1uF
C302
1000pF
C304
1K 1%
CLose to DDR3
FRC_DDR_1333_HYNIX
M8
H1
R303
240
1%
L8
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2
E9
F1 H2 H9
J1
J9 L1 L9 T7
A9 B3
E1
G8
J2
J8
M1 M9
P1 P9 T1 T9
B1 B9 D1 D8
E2 E8 F9
G1 G9
DDR3 1.5V By CAP - Place these Caps near Memory
0.1uF
C306
C-MVREFDQ
C307
0.1uF
C308
0.1uF
C309
0.1uF
0.1uF
C310
VCC1.5V_U3_DDR
R304
R305
C311
C315
0.1uF
0.1uF
C313
1K 1%
0.1uF
C312
1000pF
C314
1K 1%
CLose to Saturn7M IC
EAN61828901
IC301
H5TQ1G63DFR-H9C
A10/AP
A12/BC
NC_5
RESET
DQSL DQSL
DQSU DQSU
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7 R7
A11
N7 T3
A13
M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
F3 G3
C7 B7
E7
DML
D3
DMU
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
ZQ
VREFCA
VREFDQ
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
NC_1 NC_2 NC_3 NC_4 NC_6
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
0.1uF
C-MA0 C-MA1 C-MA2 C-MA3 C-MA4 C-MA5 C-MA6 C-MA7 C-MA8
C-MA9 C-MA10 C-MA11 C-MA12
C-MBA0 C-MBA1 C-MBA2
C316
C-MVREFCA
OPT
C-MRASB C-MCASB
C-MWEB
C-MRESETB
C-MDML C-MDMU
C-MDQL0 C-MDQL1 C-MDQL2 C-MDQL3 C-MDQL4 C-MDQL5 C-MDQL6 C-MDQL7
C-MDQU0 C-MDQU1 C-MDQU2 C-MDQU3 C-MDQU4 C-MDQU5 C-MDQU6 C-MDQU7
0.1uF
R306
C-MODT
C-MDQSL
C-MDQSLB
C-MDQSU
C-MDQSUB
C317
EAN61829001
IC301-*2
H5TQ1G63DFR-PBC
FRC_DDR_1600_HYNIX
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8 R3 L7 R7 N7 T3
M7
M2
N8
M3
J7 K7 K9
L2 K1
J3 K3 L3
T2
F3 G3
C7 B7
E7 D3
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
FRC_L/DIM
R348
FRC_L/DIM
R326 R331
R335
OPT
R334 OPT
22 22
A8 A9 A10/AP A11 A12/BC A13
A15
BA0 BA1 BA2
CK CK CKE
CS ODT RAS CAS WE
RESET
DQSL DQSL
DQSU DQSU
DML DMU
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
33R300
L/DIM_SCLK
33
L/DIM_MOSI
FRC
I2C_SDA
FRC
I2C_SCL
22
FRC_SCL
FRC_SDA
22
0.1uF
C318
0.1uF
C319
0.1uF
C320
0.1uF
C321
0.1uF
C322
0.1uF
C323
+1.5V_FRC_DDR
L301
0.1uF
C324 10uF 10V
VCC1.5V_U3_DDR
C325
0.1uF 16V
S7M-PLUS_DivX_MS10
LGE107DC-RP [S7M+ DIVX/MS10]
C-MA3 C-MA5 C-MA7
C-MCK
C-MBA0
C-MDMU
C-MDQL5
AR301
AR302
AR303
AR304
R307
R308
AR305
AR306
AR307
AR308
AR309
22
22
22 R309
R310
22
22
22
22
22
22
R311
22
R312
22
R313
22
R314
22
R315
22
22
22 R316
22
22
22
C-MA9 C-MA2 C-MA0
C-MBA2
C-MA8 C-MA6 C-MA4
C-MBA1
C-MA10 C-MA12
C-MA1
C-MA11
C-MRESETB
C-MCKB
C-MCKE
C-MRASB
C-MCK
150
C-MCKB
C-MCKE
VCC1.5V_U3_DDR R333 10K
C-MCASB
C-MODT
C-MWEB
C-MDQSL
C-MDQSLB
C-MDQSU
C-MDQSUB
C-MDQL7 C-MDQL3 C-MDQL1
C-MDML
C-MDQL0 C-MDQL2 C-MDQL6 C-MDQL4
C-MDQU2 C-MDQU6 C-MDQU0 C-MDQU4
C-MDQU7 C-MDQU1 C-MDQU5 C-MDQU3
C-TMA9 C-TMA2 C-TMA0
C-TMBA2
C-TMA8 C-TMA6 C-TMA4
C-TMBA1
C-TMA10 C-TMA12
C-TMA1
C-TMA11
C-TMA3 C-TMA5 C-TMA7
C-TMRESETB
C-TMCK
C-TMCKB
C-TMCKE
C-TMRASB
C-TMCASB
C-TMODT
C-TMWEB
C-TMBA0
C-TMDQSL
C-TMDQSLB
C-TMDQSU
C-TMDQSUB
C-TMDMU
C-TMDQL7 C-TMDQL3 C-TMDQL1
C-TMDML
C-TMDQL0 C-TMDQL2 C-TMDQL6 C-TMDQL4
C-TMDQL5
C-TMDQU2 C-TMDQU6 C-TMDQU0 C-TMDQU4
C-TMDQU7 C-TMDQU1 C-TMDQU5 C-TMDQU3
C-TMRESETB
C-TMDQSLB
C-TMDQSUB
V_SYNC
C-TMA0 C-TMA1 C-TMA2 C-TMA3 C-TMA4 C-TMA5 C-TMA6 C-TMA7 C-TMA8
C-TMA9 C-TMA10 C-TMA11 C-TMA12
C-TMBA0 C-TMBA1 C-TMBA2
C-TMCK
C-TMCKE C-TMCKB
C-TMODT C-TMRASB C-TMCASB
C-TMWEB
C-TMDQSL
C-TMDQSU
C-TMDML C-TMDMU
C-TMDQL0 C-TMDQL1 C-TMDQL2 C-TMDQL3 C-TMDQL4 C-TMDQL5 C-TMDQL6 C-TMDQL7
C-TMDQU0 C-TMDQU1 C-TMDQU2 C-TMDQU3
C-TMDQU4
C-TMDQU5
C-TMDQU6 C-TMDQU7
33
S7M-PLUS
FRC_L/DIM
R332
R317
820
S7M-R
R317-*1
4.7K
AE1
FRC_DDR3_A0/DDR2_NC
AF16
FRC_DDR3_A1/DDR2_A6
AF1
FRC_DDR3_A2/DDR2_A7
AE3
FRC_DDR3_A3/DDR2_A1
AD14
FRC_DDR3_A4/DDR2_CASZ
AD3
FRC_DDR3_A5/DDR2_A10
AF15
FRC_DDR3_A6/DDR2_A0
AF2
FRC_DDR3_A7/DDR2_A5
AE15
FRC_DDR3_A8/DDR2_A2
AD2
FRC_DDR3_A9/DDR2_A9
AD16
FRC_DDR3_A10/DDR2_A11
AD15
FRC_DDR3_A11/DDR2_A4
AE16
FRC_DDR3_A12/DDR2_A8
AF3
FRC_DDR3_BA0/DDR2_BA2
AF14
FRC_DDR3_BA1/DDR2_ODT
AD1
FRC_DDR3_BA2/DDR2_A12
AD13
FRC_DDR3_MCLK/DDR2_MCLK
AE14
FRC_DDR3_CKE/DDR2_RASZ
AE13
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE4
FRC_DDR3_ODT/DDR2_BA1
AD5
FRC_DDR3_RASZ/DDR2_WEZ
AF4
FRC_DDR3_CASZ/DDR2_CKE
AD4
FRC_DDR3_WEZ/DDR2_BA0
AE2
FRC_DDR3_RESETB/DDR2_A3
AF8
FRC_DDR3_DQSL/DDR2_DQS0
AD9
FRC_DDR3_DQSLB/DDR2_DQSB0
AE9
FRC_DDR3_DQSU/DDR2_DQS1
AF9
FRC_DDR3_DQSUB/DDR2_DQSB1
AE11
FRC_DDR3_DML/DDR2_DQ7
AF6
FRC_DDR3_DMU/DDR2_DQ11
AE6
FRC_DDR3_DQL0/DDR2_DQ6
AF11
FRC_DDR3_DQL1/DDR2_DQ0
AD6
FRC_DDR3_DQL2/DDR2_DQ1
AD12
FRC_DDR3_DQL3/DDR2_DQ2
AE5
FRC_DDR3_DQL4/DDR2_DQ4
AF12
FRC_DDR3_DQL5/DDR2_NC
AF5
FRC_DDR3_DQL6/DDR2_DQ3
AE12
FRC_DDR3_DQL7/DDR2_DQ5
AE10
FRC_DDR3_DQU0/DDR2_DQ8
AF7
FRC_DDR3_DQU1/DDR2_DQ14
AD11
FRC_DDR3_DQU2/DDR2_DQ13
AD7
FRC_DDR3_DQU3/DDR2_DQ12
AD10
FRC_DDR3_DQU4/DDR2_DQ15
AE7
FRC_DDR3_DQU5/DDR2_DQ9
AF10
FRC_DDR3_DQU6/DDR2_DQ10
AD8
FRC_DDR3_DQU7/DDR2_DQM1
AE8
FRC_DDR3_NC/DDR2_DQM0
Y11
FRC_VSYNC_LIKE
Y19
FRC_TESTPIN
IC101
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
D4P/TCON1
D4M/TCON0
FRC_SPI_CZ
FRC_GPIO1
FRC_SPI1_CK
FRC_GPIO8 FRC_SPI_DO FRC_SPI1_DI
FRC_SPI_CK
FRC_SPI_DI
FRC_I2CS_DA FRC_I2CS_CK
FRC_PWM0 FRC_PWM1
W26 W25 U26 U25 U24 V26 V25 V24 W24 Y26 Y25 Y24
AC26 AC25 AA26 AA25 AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24
AD23 AE23 AE26 AE25 AF26 AF25 AE24 AF24 AF23 AD22 AE22 AF22
AD19 AE19 AD21 AE21 AF21 AD20 AE20 AF20 AF19 AD18 AE18 AF18
AB22 AB23 AC23 AC22
AB16 AA14 AC15
Y16 AC16 AC14
AA16 AA15
Y10 AA11
AB15 AB14
RXBCK+ RXBCK­RXB0+ RXB0­RXB1+ RXB1­RXB2+ RXB2­RXB3+ RXB3­RXB4+ RXB4-
RXACK+ RXACK­RXA0+ RXA0­RXA1+ RXA1­RXA2+ RXA2­RXA3+ RXA3­RXA4+ RXA4-
RXCCK+ RXCCK­RXC0+ RXC0­RXC1+ RXC1­RXC2+ RXC2­RXC3+ RXC3­RXC4+ RXC4-
RXDCK+ RXDCK­RXD0+ RXD0­RXD1+ RXD1­RXD2+ RXD2­RXD3+ RXD3­RXD4+ RXD4-
FRC_MODEL_OPT_0 FRC_MODEL_OPT_1 FRC_MODEL_OPT_2 2D/3D_CTL
FRC_CONF0
FRC_CONF1
FRC_PWM0 FRC_PWM1
VREFCA
VREFDQ
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
ZQ
NC_1 NC_2 NC_3 NC_4 NC_6
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9
FRC_/SPI_CS
FRC_SPI_SDO
M8
H1
L8
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
J1 J9 L1 L9 T7
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
+3.3V_Normal
R336
R338
R340
1K
1K
1K
R342
OPT
1K
OPT
FRC_/SPI_CS
FRC_SPI_SDO
FRC_SPI_SCK
FRC_SPI_SDI
S7M-PLUS
S7M-PLUS
R330 10
R329 10
OPT
R341
R343
1K
+3.3V_Normal
10K
R349
S7M-PLUS
LVDS_EXT_URSA5
R339
1K
LVDS_S7M-PLUS
R350
L/DIM_EDGE_32/37
R337
1K
1K
L/DIM_EDGE_42/47/55
S7M-PLUS_S_FLASH_2MBIT_WIN
W25X20BVSNIG
4.7K
CS
OPT
1
DO
2
WP
3
GND
4
IC302
$ 0.17
FRC_MODEL_OPT_0 FRC_MODEL_OPT_1
FRC_MODEL_OPT_2
2D/3D_CTL
+3.3V_Normal
VCC
8
HOLD
7
CLK
6
DIO
5
EAN61857101
IC301-*3
K4B1G1646G-BCH9
FRC_DDR_1333_SS_NEW
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
S7M-PLUS
R328 10
R327 10
S7M-PLUS
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
<U3 CHIP Config> (FRC_CONF0)
HIGH : I2C ADR = B8 LOW : I2C ADR = B4
(FRC_CONF1,FRC_PWM1, FRC_PWM0)
3’d5 : boot from internal SRAM
3’d6 : boot from EEPROM
3’d7 : boot form SPI flash
+3.3V_Normal
R322
R323
R321
1K
1K
1K
R320
1K
OPT
FRC
FRC
S7M-PLUS
R325
R324
R318
R319
1K
1K
1K
1K
OPT
OPT
FRC
S7M-R
FRC_SPI_SCK
FRC_SPI_SDI
EAN61857201
IC301-*4
NT5CB64M16DP-CF
FRC_DDR_1333_NANYA_NEW
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
NC_6
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
FRC_CONF0 FRC_CONF1
FRC_PWM1
FRC_PWM0
VREFCA
VREFDQ
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
NC_1 NC_2 NC_3 NC_4 NC_7
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9
M8
H1
L8
ZQ
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
J1 J9 L1 L9 T7
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2R
FRC_DDR
20101023
3
EXT12V_CTRL
Copyright © 2011 LG Electronics. Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
EXT5V_CTRL
A1CA2
D60
POWER_OUT
C401
100uF
C402
100uF
16V
16V
+3.5V_ST
+12V/+15V
A1CA2
RL_ON
D61
R401
10K
B
MLB-201209-0120P-N2
C404
0.1uF 16V
MLB-201209-0120P-N2
CIS21J121
C406
0.1uF 16V
L402
L402-*1
C
E
Q401 2SC3052
L404
+3.5V_ST
L404-*1
CIS21J121
16V
OPT
<MODULE PIN MAP>
CMO10"Lamp
A-DIM
PWM_DIM
INV_ON
32LE5300-TA CMO10"LED
NC
INV_ON
err_out
NC
--> NC
PWM_DIM
NC
23
16
18
20
22
24
LGD(PSU)
or LIPS
GND
INV_ON
VBR-A
PWM_DIM
Err_out
GND
PIN No
<LED MODULE PIN MAP -> latest update 20100618>
PIN No
LGD LPB/
OS LPB (PSU)
16
INV_ON
18
20
22
PWM_DIM
err_out
24
--> NC
23
LGD edge led error-out use or not? checking is necessary...
+12V/+15V
L401
C405
C410
10uF
10uF
25V
25V
Vout=(1+R1/R2)*0.8
FROM LIPS & POWER B/D
RT1P141C-T112
Q402
C407
0.1uF
(PSU) GND
NC
GND
NC
NC
NC
R406
4.7K
C408
0.1uF 16V
1
OPT
INV_ON
PWM_DIM
INV_ON
PWM_DIM
2
0
R476
POWER_23_GND
AUO 10"Lamp
(PSU)
Err_out
NC
GND
32LE4500-TA AUO 10"LED
(PSU)
NC
err_out
--> NC NC
NC
3
NORMAL_EXPEPT_32
GND/P.DIM2
SHARP
(PSU)
GND
INV_ON
52/60:ERROR
26/32HD:NC
26/32/52:PWM
60:NC
26/32/52:GND
60:PWM
GND
32LE5300-TA
LGD 10"LED
(PSU)
NC
INV_ON
NC
PWM_DIM
err_out
--> NC
NC
P403
FW20020-24S
PWR ON
24V GND GND
3.5V
3.5V GND GND
12V
12V
12V
INV_ON
PWM_DIM
1
1
1 3
3
3 5
5
5 7
7
7 9
9
9 11
11
11 13
13
13 15
15
15 17
17
17 19
19
19 21
21 22
21 22 23
23 24
23 24
IPS-@
(PSU)
GNDGND
Err_out
NC
GND
NORMAL_32
2
2
2 4
4
4 6
6
6 8
8
8
10
10
10 12
12
12 14
14
14 16
16
16 18
18
18 20
20
20 22 24
25
25
SLIM_32~52 P401
SMAW200-H24S2
P404
FM20020-24
24V 24V GND GND
3.5V
3.5V GND GND/V-sync INV ON A.DIM P.DIM1 Err OUT
+5V_USB
IC401
C489
0.1uF 16V
PGND
AGND
AOZ1073AIL-3
1
VIN
2
3
FB
4
3A
LX_2
8
LX_1
7
EN
6
COMP
5
L406
3.6uH
NR8040T3R6N
POWER_ON/OFF2_1 R410
10K
12K
2200pF
R413
C413
L407-*1
CIS21J121
L407
MLB-201209-0120P-N2
C418
0.1uF 50V
+3.3V_Normal
R419
POWER_16_GND
0
R475
POWER_24_GND
POWER_24_PWM_DIM
POWER_22_PWM_DIM
0
POWER_18_INV_CTL
R412
POWER_24_INV_CTL
R472 R471
OPT
R415 100
R425 100
POWER_20_PWM_DIM
0 0
POWER_20_ERROR_OUT
POWER_24_ERROR_OUT
C
R418
6.8K OPT
E
R484
PWM_PULL-DOWN_3.9K
C416
0.1uF 16V
100
R437
100
R420
TP5303 TP5304
TP5305
TP5306
1K
POWER_18_A_DIM
POWER_22_A_DIM
POWER_20_A_DIM
0
R606
3.9K
<Module Inv to Main Pin Connection>
INV <--> MAIN #11 <--> #24 #12 <--> #18 #13 <--> #20 #14 <--> #22
2000 mA
51K1%R414
OPT
R416
1.5K
10K1%R423
C429
100pF
R1
1%
50V
R2
C420 22uF 16V
B
Q405
2SC3052
R451
R485
R453
+24V
C426 68uF
35V
R421 10K
C424
0.1uF 16V
R426 10K
0
0
0
+3.3V_Normal
+3.5V_ST
OPT
R427 10K OPT
PWM_DIM
R606-*1 1K
PWM_PULL-DOWN_1K
OPT
4.7K
R486
ERROR_OUT
V_SYNC
SCAN_BLK2
SCAN_BLK1/OPC_OUT
OPC_OUT
+5V_USB
C428
0.1uF 16V
OPT
INV_CTL
A_DIM
PANEL_CTL
005:E8;005:S15
+12V/+15V
L412
+3.5V_ST
+3.5V_ST
0.01uF
C409
R429 47K
OPT R430 10K
0.015uF
B
0.015uF 50V
R431 22K
C
E
Q406 2SC3052
0.01uF
C436 25V
R435
22K
S7M DDR 1.5V
10K
R464
C461 10uF 10V
L420
C468
0.1uF 16V
VIN_1
VIN_2
GND_1
GND_2
EP[GND]
1
2
3
4
THERMAL
17
IC407
TPS54319TRE
5
6
AGND
VSENSE
3A
Vout=0.827*(1+R1/R2)=1.521V
+3.3V_Normal
C432
0.1uF 16V
AZ2940D-2.5TRE1
VIN
1
Vd=550mV
IC402
VOUT
3
2
GND
S7M core 1.26V volt
10K
R445
C447
0.1uF 16V
C430 10uF 10V
L413
C431
0.1uF 16V
Vout=0.8*(1+R1/R2)=1.29V
VIN_1
VIN_2
GND_1
GND_2
EP[GND]
1
THERMAL
2
3
SN1007054RTER
4
5
AGND
4A
17
IC403
VSENSE
6
7
COMP
C475
0.1uF
7
COMP
R473
C438
0.1uF 16V
B
16V
BOOT14PWRGD15EN16VIN_3
13
8
RT/CLK
R439
R440
BOOT14PWRGD15EN16VIN_3
RT/CLK
1
12
11
10
$ 0.165
33K
5.6K
C
Q407 2SC3052
E
C462
0.1uF
16V
13
PH_3
12
PH_2
11
PH_1
10
SS/TR
9
8
1/16W 330K 5%
R455 15K
1/16W
$ 0.145
C403
C440
10uF
0.1uF
10V
16V
C441
0.1uF
16V
PH_3
PH_2
PH_1
SS
9
R432
1/16W 330K 5%
R436
7.5K
1/16W
5%
C442
10uF 16V OPT
C443 10uF
25V
C465
0.01uF 50V
R452
5%
POWER_ON/OFF1
NR8040T3R6N
C467
4700pF
50V
L423
3.6uH
Q409
AO3407A
C472 22uF
10V
S
G
OPT
+2.5V/+1.8V
+2.5V_Normal
POWER_ON/OFF2_1
L415
3.6uH
NR8040T3R6N
C453
C456
22uF
C488
0.01uF 50V
C448
3300pF
50V
22uF
10V
10V
PANEL_POWER
New item
D
C451
0.1uF 50V
1608
C476 22uF 10V
R1
R2
R449 56K
1/16W
1%
R442
R1
R444
R2
R441 75K
1/8W
1%
R457
300 mA
24K 1%
1%
22K
C455
0.1uF 16V
1074 mA
47K 1%
50V 100pF C439
R405
2.2K
PANEL_DISCHARGE_RES
PANEL_DISCHARGE_RES
+1.5V_DDR
C470
0.1uF 16V
C463 100pF 50V
+1.26V_VDDC
C444
0.1uF 16V
PANEL_VCC
R407
2.2K
ST_3.5V--> 3.375V --> 3.46V
20V-->3.51V --> 3.76V (3.59V)
24V-->3.78V --> 3.92V (3.79V)
12V -->3.58V --> 3.82V (3.68V)
18.5V-->3.5V --> 3.75V (3.59V)
POWER_+24V
POWER_+24V
C412
0.1uF 16V
PD_+12V
+12V/+15V
L416
C457
C459
10uF
10uF
25V
25V
+12V/+15V
L417
C458 10uF 25V
Vout=0.8*(1+R1/R2)
C491
0.1uF 50V
C421,C422 Close to LDO
+1.5V_DDR
POWER_ON/OFF2_1
120K
R434
+12V/+15V
R448
C411
0.1uF 16V
+24V
8.2K1%R482
1.5K1%R403
+3.3V_Normal
IC405
AOZ1073AIL-3
PGND
1
VIN
2
C492
0.1uF AGND
16V
3A
3
FB
4
Vout=(1+R1/R2)*0.8
+5V_Normal
PGND
C490
0.1uF AGND
C460 10uF 25V
IC410
AP1117EG-13
OUTIN
ADJ/GND
OPT
OPT
330 R411
C435
4.7uF
Q408 AO3438
10V
16V
110 R417
FRC
D
S
G
10K
R443
FRC
+1.5V_DDR_FRC
2.7K
1%
PD_+12V
1/10W
1.21K1%R447
AOZ1072AI-3
1
VIN
2
3
FB
4
+5V_Normal
R422 1
5%
C414
0.1uF 16V
4.7uF
C445
PD_+12V
8
7
6
5
OPT
+3.5V_ST
IC406
2A
LX_2
LX_1
EN
COMP
C415
VCC
10uF 10V
R450
0
5%
PD_+3.5V
NCP803SN293
3
GND
8
7
6
5
+3.5V_ST -> 3.375V
NCP803SN293
VCC
3
GND
R404
PD_+12V
100K
IC409
RESET
2
1
PD_+12V_PWR_DET_ON_SEMI
L421
3.6uH
NR8040T3R6N
POWER_ON/OFF2_2 R456
10K
12K
2200pF
R454
C464
LX_2
LX_1
EN
COMP
+1.5V_FRC_DDR
R488 100K
IC408
RESET
2
1
PWR_DET_ON_SEMI
Power_DET
27K1%R460
1%
4.7K
R461
OPT C423 100pF
50V
10K1%R462
L422
3.6uH
NR8040T3R6N
POWER_ON/OFF2_2
R459
10K
12K
2200pF
R458
C466
IC411
AP1117EG-13
OUTIN
ADJ/GND
C422
0.1uF 50V
PD_+12V
R1
R2
330 R409
R402 100
R480 100
1934 mA
+3.5V_ST
OPT
24K1%R465
51K
R466
10K1%R467
110
R408
10K
R463
C469 22uF 16V
MAX 1A
R1
1%
OPT
C427
100pF
50V
R2
C473
0.1uF 16V
C471 22uF 16V
C474
0.1uF
R424 1
5%
C417
0.1uF 16V
POWER_DET
L424
CIC21J501NE
+5V_TUNER
+3.3V_Normal
C477
0.1uF 16V
C419 10uF 10V
C485
0.1uF 16V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2R
20101023
POWER_LARGE 4
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