LG 15EL9500 Schematic

OLED TV

SERVICE MANUAL

CAUTION

BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

CHASSIS : OD01J

MODEL : 15EL9500 15EL9500-ZA

North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com

Internal Use Only

Printed in KoreaP/NO : MFL63267401 (1004-REV00)

LGE Internal Use OnlyCopyright ©2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 2 -

CONTENTS

CONTENTS .............................................................................................. 2

PRODUCT SAFETY ................................................................................. 3

SPECIFICATION ....................................................................................... 6

ADJUSTMENT INSTRUCTION ................................................................ 9

BLOCK DIAGRAM...................................................................................14

EXPLODED VIEW .................................................................................. 15

SVC. SHEET ...............................................................................................

LGE Internal Use OnlyCopyright ©2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 3 -

SAFETY PRECAUTIONS

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.

It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.

Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to

0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit

1.5 Kohm/10W

To Instrument’s
exposed
METALLIC PARTS

Good Earth Ground
such as WATER PIPE,
CONDUIT etc.

AC Volt-meter

When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1

*Base on Adjustment standard

IMPORTANT SAFETY NOTICE

0.15 uF

Ω

LGE Internal Use OnlyCopyright ©2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 4 -

CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the

SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the

following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.

General Servicing Precautions

1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board

module or any other receiver assembly.

b. Disconnecting or reconnecting any receiver electrical plug or

other electrical connection.

c. Connecting a test substitute in parallel with an electrolytic

capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.

2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".

3. Do not spray chemicals on or near this receiver or any of its
assemblies.

4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.

5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.

6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.

7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.

8. Use with this receiver only the test fixtures specified in this

service manual.

CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.

Electrostatically Sensitive (ES) Devices

Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called

Electrostatically Sensitive (ES) Devices. Examples of typical ES

devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.

1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
unit under test.

2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.

3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.

4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.

5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.

6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).

7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.

8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)

General Soldering Guidelines

1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500

°

F to 600 °F.

2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.

3. Keep the soldering iron tip clean and well tinned.

4. Thoroughly clean the surfaces to be soldered. Use a mall wire­bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.

5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.

(500

°F to 600 °F)

b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-

type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.

6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature

(500

°F to 600 °F)

b. First, hold the soldering iron tip and solder the strand against

the component lead until the solder melts.

c. Quickly move the soldering iron tip to the junction of the

component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.

d. Closely inspect the solder area and remove any excess or

splashed solder with a small wire-bristle brush.

SERVICING PRECAUTIONS

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Only for training and service purposes

- 5 -

IC Remove/Replacement

Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.

Removal

1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.

2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.

Replacement

1. Carefully insert the replacement IC in the circuit board.

2. Carefully bend each IC lead against the circuit foil pad and
solder it.

3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).

"Small-Signal" Discrete Transistor
Removal/Replacement

1. Remove the defective transistor by clipping its leads as close as
possible to the component body.

2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.

3. Bend into a "U" shape the replacement transistor leads.

4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.

Power Output, Transistor Device
Removal/Replacement

1. Heat and remove all solder from around the transistor leads.

2. Remove the heat sink mounting screw (if so equipped).

3. Carefully remove the transistor from the heat sink of the circuit
board.

4. Insert new transistor in the circuit board.

5. Solder each transistor lead, and clip off excess lead.

6. Replace heat sink.

Diode Removal/Replacement

1. Remove defective diode by clipping its leads as close as
possible to diode body.

2. Bend the two remaining leads perpendicular y to the circuit
board.

3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.

4. Securely crimp each connection and solder it.

5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.

Fuse and Conventional Resistor
Removal/Replacement

1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.

2. Securely crimp the leads of replacement component around
notch at stake top.

3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.

Circuit Board Foil Repair

Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.

At IC Connections

To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).

1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).

2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.

3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.

4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.

At Other Connections

Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.

1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.

2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.

3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.

LGE Internal Use OnlyCopyright ©2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 6 -

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement

.

1. Application range

This specification is applied to the OLED TV used OD01J chassis.

2. Requirement for Test

Each part is tested as below without special appointment.

1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC

2) Relative Humidity : 65 % ± 10 %

3) Power Voltage
: Standard input voltage (AC 100-240 V~ 50 / 60 Hz)
* Standard Voltage of each products is marked by models.

4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with

BOM.

5) The receiver must be operated for about 5 minutes prior to the adjustment.

3. Test method

1) Performance: LGE TV test method followed

2) Demanded other specification

- Safety: CE, IEC specification

- EMC:CE, IEC

4. Module specification(General)

No. Item Specification Measurement Remark

1 Screen Size 15 inch Diagonal

2 Aspect Ratio 16:9

3 AMOLED 15 inch WXGA AMOLED HD

4 Storage Environment Temp.: -20 deg ~ 60 deg

Humidity : 10 % ~ 90 %

5 Input Voltage -0.3 ~ 14 Vdc At 25 ºC

6 Power Consumption 32 W Typica (Logic : 6 W, EL= 26 W)

- 7 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

5. Model General Specification

No. Item Specification Remarks

1. Market EU(PAL Market-36Countries) DTV & Analog (Total 36 countries)

(UK/Italy/Germany/France/Spain/Sweden/Finland/Netherland/Belgium/

Luxemburg/Greece/Denmark/Czech/Austria/Hungary/Switzerland/Croatia

Turkey/Norway/Slovenia/Poland/Portugal/Ireland/Moroco/Latvia/Estonial/

Lithuania/Rumania)

DTV (MPEG2/4, DVB-C) : 2 Countries

Swenden/ Finland

Analog Only - 7 countries

(Russia/Slovakia/Bosnia/Serbia/Bulgaria/Latvia/Albania/Kazakhstan)

2. Broadcasting system 1) PAL-BG

2) PAL-DK

3) PAL-I/I’

4) SECAM L/L’

5) DVB-T/C (ID TV)

3. Receiving system Analog : Upper Heterodyne

G DBV-T

Digital : COFDM , QAM - Guard Interval(Bitrate Mbit/s)

1/4, 1/8, 1/16, 1/32

- Modulation : Code Rate

QPSK : 1/2, 2/3, 3/4, 4/5, 5/6, 7/8

16-QAM : 1/2, 2/3, 3/4, 4/5, 5/6, 7/8

64-QAM : 1/2, 2/3, 3/4, 4/5, 5/6, 7/8

G DVB-C

- Symbolrate :

4.0Msymbols/s to 7.2Msymbols/s

- Modulation

16QAM, 64-QAM, 128-QAM and 256-QAM

4. Mini - HDMI Input (1EA) HDMI1-DTV Support HDCP

5. USB DVIX

6. USB B For Service

- 8 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

6. Module optical specification

1) Contrast Ratio(CR) is defined mathematically as :
CR = Surface Luminance at all white pixels / Surface Luminance at all black pixels
It is measured at center 1 point.

2) Surface luminance is determined after the unit has been ‘ON’ and 3minutes after lighting the module in a dark environment at

25°C ± 2 °C. Surface luminance is the luminance value at center 1 point across the AMOLED surface 50 cm from the surface with
all pixels displaying white.

3) The variation in surface luminance , d WHITE is defined as :

- d WHITE(9P) = Minimum(Lon1,Lon2,..., Lon9) / Maximum(Lon1,Lon2..., Lon9)
Where Lon1 to Lon9 are the luminance with all pixels displaying white at 9 locations.

4) Image sticking
When it changes into pattern-B after a 1 hour drive by pattern-A, it disappears within 5 seconds.

No. Item Specification Min. Typ. Max. Remark

1. Viewing Angle [CR>10] Right/Left(Up/Down) Free Degree

2. Luminance Luminance (cd/m

2

) 180 200

Uniformity Variation 70 80

3. Contrast Ratio CR 50,000 100,000

4. CIE Color Coordinates White Wx 0.285

Wy 0.299

RED Rx 0.667

Ry Typ. 0.333 Typ.

Green Gx -0.03 0.230 +0.03

Gy 0.675

Blue Bx 0.145

By 0.065

7. HDMI Input

(1) DTV Mode

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark

1. 720*480 31.469 / 31.5 59.94 / 60 27.00 / 27.03 SDTV 480P

2. 720*576 31.25 50 54 SDTV 576P

3. 1280*720 37.500 50 74.25 HDTV 720P

4. 1280*720 44.96 / 45 59.94 /60 74.17 / 74.25 HDTV 720P

5. 1920*1080 33.72 / 33.75 59.94 /60 74.17 / 74.25 HDTV 1080I

6. 1920*1080 28.125 50.00 74.25 HDTV 1080I

7. 1920*1080 26.97 / 27 23.97 / 24 74.17 / 74.25 HDTV 1080P

8. 1920*1080 33.716 / 33.75 29.976 / 30.00 74.25 HDTV 1080P

9. 1920*1080 56.250 50 148.5 HDTV 1080P

10. 1920*1080 67.43 / 67.5 59.94 / 60 148.35/148.50 HDTV 1080P

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- 9 -

ADJUSTMENT INSTRUCTION

1. Application Range

This specification sheet is applied to all of the OLED TV with
OD01J chassis.

2. Designation

1) The adjustment is according to the order which is

designated and which must be followed, according to the
plan which can be changed only on agreeing.

2) Power Adjustment: Free Voltage

3) Magnetic Field Condition: Nil.

4) Input signal Unit: Product Specification Standard

5) Reserve after operation: Above 5 Minutes (Heat Run)
Temperature : at 25 ºC ± 5 ºC
Relative humidity : 65 % ± 10 %
Input voltage : 220 V, 60 Hz

6) Adjustment equipments: Color Analyzer(CA-210 or CA-

110), Pattern Generator(MSPG-925L or Equivalent), DDC
Adjustment Jig equipment, service remote control.

7) Push The “IN STOP” key - For memory initialization.

3. Main PCB check process

* APC - After Manual-Insult, executing APC

* Boot file Download

1) Execute ISP program “Mstar ISP Utility” and then click

“Config” tab.

2) Set as below, and then click “Auto Detect” and check “OK”

message

If “Error” is displayed, Check connection between
computer, jig, and set.

3) Click “Read” tab, and then load download file (XXXX.bin)

by clicking “Read”

4) Click “Connect” tab. If “Can’t” is displayed, check

connection between computer, jig, and set.

5) Click “Auto” tab and set as below

6) Click “Run”.

7) After downloading, check “OK” message.

* USB DOWNLOAD (*.epk file download)

1) Put the USB Stick to the USB socket.

2) Automatically detecting update file in USB Stick

- If your downloaded program version in USB Stick is Low,
it didn’t work. But your downloaded version is High, USB
data is automatically detecting.

3) Show the message “Copying files from memory”.

filexxx.bin

(4)

(7) .OK

(5)

(6)

(1)

fil exxx.bin

(2)

(3)

Please Check the Speed :
To use speed between
from 200KHz to 400KHz

Case1 : Software version up

1. After downloading S/W by USB, TV set will reboot
automatically

2. Push “In-stop” key

3. Push “Power on” key

4. Function inspection

5. After function inspection, Push “In-stop” key.

Case2 : Function check at the assembly line

1. When TV set is entering on the assembly line, Push
“In-stop” key at first.

2. Push “Power on” key for turning it on.

-> If you push “Power on” key, TV set will recover
channel information by itself.

3. After function inspection, Push “In-stop” key.

4) Updating is staring.

5) Uploading completed, The TV will restart automatically.

6) If your TV is turned on, check your updated version and
Tool option.(explain the Tool option, next stage)

* If downloading version is more high than your TV have,

TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.

* After downloading, have to adjust Tool Option again.

1) Push "IN-START" key in service remote controller

2) Select “Tool Option 1” and Push “OK” button.

3) Punch in the number. (Each model hax their number)

4) Completed selecting Tool option.

3.1. Function Check

* Check display and sound

- Check Input and Signal items. (cf. work instructions)

1) TV

2) AV (SCART1/SCART2/ CVBS)

3) COMPONENT (480i)

4) RGB (PC : 1024 x 768 @ 60hz)

5) HDMI

6) PC Audio In
* Display and Sound check is executed by Remote control

4. Total Assembly line process

4.1. Adjustment Preparation

· W/B Equipment condition
CA210 : CH 17(OLED), Test signal : Inner pattern (85IRE)

· Above 30 minutes H/run in the inner pattern. (“power on” key

of adjust remote control)

* Connecting picture of the measuring instrument

(On Automatic control)
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment R/C POWER ON ->
Enter the mode of White-Balance, the pattern will come out.

* Auto-control interface and directions

1) Adjust in the place where the influx of light like floodlight

around is blocked. (illumination is less than 10 lux).

2) Adhere closely the Color Analyzer (CA210) to the module

less than 10 cm distance, keep it with the surface of the
Module and Color Analyzer’s prove vertically.(80° ~ 100°).

3) Aging time

- After aging start, keep the power on (no suspension of
power supply) and heat-run over 5 minutes.

- Using ‘no signal’ or ‘full white pattern’ or the others,
check the back light on.

• Auto adjustment Map(RS-232C)
RS-232C COMMAND
[CMD ID DATA]

Wb 00 00 White Balance Start
Wb 00 ff White Balance End

- 10 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

Model Tool option1 Tool option2 Tool option3 Tool option4

15EL9500 59648 512 49312 3328

Cool 13,000 K X=0.269(±0.002)

Y=0.273(±0.002)

Color Medium 9,300 K X=0.285(±0.002)

Teperature Y=0.293(±0.002)

Warm 6,500 K X=0.313(±0.002)

Y=0.329(±0.002)

Full White Pattern

COLOR
ANALYZER
TYPE: CA-210

RS-232C Communication

CA-210

RS-232C COMMAND MIN CENTER MAX

[CMD ID DATA] (DEFAULT)

Cool Mid Warm Cool Mid Warm

R Gain jg Ja jd 00 172 192 192 192

G Gain jh Jb je 00 172 192 192 192

B Gain ji Jc jf 00 192 192 172 192

R Cut 64 64 64 128

G Cut 64 64 64 128

B Cut 64 64 64 128

** Caution **

Color Temperature : COOL, Medium, Warm.
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.
(when R/G/B Gain are all C0, it is the FULL Dynamic Range
of Module)

* Manual W/B process using adjusts Remote control.

• After enter Service Mode by pushing “ADJ” key,

• Enter White Balance by pushing “

G

” key at “6. White

Balance”.

* After done all adjustments, Press “In-start” button and

compare Tool option and Area option value with its BOM, if
it is correctly same then unplug the AC cable. If it is not
same, then correct it same with BOM and unplug AC cable.
For correct it to the model’s module from factory Jig model.

* Push the “IN STOP” key after completing the function

inspection. And Mechanical Power Switch must be set
“ON”.

4.2. DPM operation confirmation

(Only Apply for MNT Model)

Check if Power LED color and Power Consumption operate
as stanard.

• Set Input to RGB and connect D-sub cable to set.

• Measurement Condition: 100-240V~, 50 / 60 Hz.

• Confirm DPM operation at the state of screen without Signal.

4.3. DDC EDID Write (HDMI 256Byte)

• Connect HDMI Signal Cable to HDMI Jack.

• Write EDID Data to EEPROM(24C02) by using DDC2B
protocol.

• Check whether written EDID data is correct or not.

* For SVC main Assembly, EDID have to be downloaded to

Insert Process in advance.

4.4. EDID DATA

1) All Data : HEXA Value

2) Changeable Data :

*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***:Year : Controlled
****:Check sum

- Auto Download

• After enter Service Mode by pushing “ADJ” key,

• Enter EDID D/L mode.

• Enter “START” by pushing “OK” key.

* Edid data and Model option download (RS232)

- Manual Download

* Caution

1) Use the proper signal cable for EDID Download

- Digital EDID : Pin3 exists

2) Never connect HDMI & D-sub Cable at the same time.

3) Use the proper cables below for EDID Writing

4) Download HDMI1, HDMI2, separately because HDMI1 is
different from HDMI2

- 11 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

Item CMD1 CMD2 Data0

Download A A 0 0 When transfer the ‘Mode In’,

‘Mode In’ Carry the command.

Download A E 00 10 Automatically Download

(The use of a internal pattern)

Item

Manufacturer ID

Version

Revision

Condition

GSM

Digital : 1

Digital : 3

Data(Hex)

1E6D

01

03

DVI-D to HDMI or HDMI to HDMI

For HDMI EDID

1) HD HDMI EDID data

* Detail EDID Options are below

ⓐ Product ID

ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line:

ex) Monthly : ‘02’ -> ‘02’

Year : ‘2009’ -> ‘13’

ⓓ Model Name(Hex):

ⓔ Checksum: Changeable by total EDID data.
ⓕ Vendor Specific(HDMI)

5. Model name & Serial number D/L

• Press “Power on” key of service remocon.
(Baud rate : 115200 bps)

• Connect RS232 Signal Cable to RS-232 Jack.

• Write Serial number by use RS-232.

• Must check the serial number at the Diagnostics of SET UP

menu. (Refer to below).

5.1. Signal TABLE

CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 +…+ Data_n
Delay : 20ms

5.2. Command Set

* Description

FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write : Model Name and Serial Number write in

EEPROM,.

5.3. Method & notice

A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing

Technology Group.

C. Serial number D/L must be conformed when it is produced

in production line, because serial number D/L is mandatory
by D-book 4.0.

Model Name HEX EDID Table DDC Function

HD Model 0000 00 00 Digital

LGE Internal Use OnlyCopyright ©2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 12 -

MODEL MODEL NAME(HEX)

LG TV 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20

INPUT MODEL NAME(HEX)

HDMI1 65030C001000011D

012 3 4 5 67 8 9ABCD EF

00 00 FF FF FF FF FF FF 00 1E 6D a b

10 c 01038073 41780ACF74A3574CB023

20 09 48 4C A1 08 00 81 C0 61 40 45 40 31 40 01 01

30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C

40 36 00 7E 8A 42 00 00 1E 01 1D 00 72 51 D0 1E 20

50 6E 28 55 00 7E 8A 42 00 00 1E 00 00 00 FD 00 3A

60 3E 1F 46 10 00 0A 20 20 20 20 20 20 d

70 d 01 e

80 02 03 20 F1 4E 10 1F 84 13 05 14 03 02 12 20 21

90 22 15 01 26 15 07 50 09 57 07 f

A0 f 80 18 71 1C 16 20 58 2C 25 00 72 8A 42 00

B0 00 9E 01 1D 00 80 51 DO 0C 20 40 80 35 00 72 8A

C0 42 00 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00

D0 7E 8A 42 00 00 18 02 3A 80 18 71 38 2D 40 58 2C

E0 45 00 7E 8A 42 00 00 1E 01 1D 80 D0 72 1C 16 20

F0 10 2C 25 80 7E 8A 42 00 00 9E 00 00 00 00 00 F9

CMD LENGTH ADH ADL DATA_1 . . . Data_n CS DELAY

No. Adjust mode CMD(hex) LENGTH(hex

)

Description

1

EEPROM WRITE

A0h

84h+n

n-bytes Write (n = 1~16)

* Manual Download (Model Name and Serial Number)

If the TV set is downloaded by OTA or Service man, Sometimes
model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It need
Manual download.

1) Press the ‘instart’ key of ADJ remote controller.

2) Go to the menu ‘5.Model Number D/L’ like below photo.

3) Input the Factory model name(ex 42LH4000-ZA) or Serial
number like photo.

4) Check the model name Instart menu -> Factory name
displayed (ex 42LH4000-ZA)

5) Check the Diagnostics (DTV country only) -> Buyer model
displayed (ex 42LH4000)

- 13 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 14 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

BLOCK DIAGRAM

DDR2 SDRAM

(1G)

IC300

NAND Flash

IC102

USB

Digital amp

(NTP3100-L)

IC700

I2S

Host Address[0:7]

DDR2 Data[0:15]

DDR2 SDRAM

(512MB)

IC301

DDR2 Data[0:15]

DDR2 Address[0:12]

IC100

(LGE3369A)

HDMI1

DDR2 Address[0:12]

FRC

(LGE7329A)

IC901

DDR2 (512MB * 2)

IC1000/1001

L/R

SERIAL FLASH

IC103

IR (light logo)

DP, DM

OLED Panel

4Ch LVDS (10 bit)

EEPROM

(IC104)

EEPROM

(HDCP)IC400

I2C

Touch Key

RS-232C

MAX3232CDR

IC701

XC5000

IC600

DRXK

(IC601)

FE_TS_ Data

Tuner_SDA I2C

Tuner_SCL I2C

V_MAIN, SIF

IF_AGC I2S

LNA

IC1002

- 15 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All rights reserved.

Only for training and service purposes

900

800

700

600

500

400

300

A2

LV1

200

100

EXPLODED VIEW

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

IMPORTANT SAFETY NOTICE

NAND FLASH MEMORY

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L : 8 bit

/F_RB

/PF_OE

/PF_CE0

PF_WP

+3.3V_ST

OPT
R100
10K

R99

10K

R103

R108 10K

0

C

B

E

POWER DETECT

Serial FLASH MEMORY
for BOOT

Flash_WP_1

R101

R102 0

JTEG

OPT

KRC103S

Q100

+3.3V

0

B

R107

10K

+3.3V

SPI_CS

SPI_DO

C

E

+3.3V

/PF_CE1

PF_ALE

/PF_WE

Q101
KRC103S

OPT
R113

1K

+3.3V

R117

R115

4.7K

33

R123

+3.3V_ST

+3.3V

1K

R129 3.9K

R127

OPT

0.1uF

C100

R128 1K

1K

R131
10K

NCP803SN293

RESET

2

R132

OPT

IC101

MX25L3205DM2I-12G

CS#

1

SO

2

WP#

3

GND

4

VCC_1

VSS_1

NC_10

NC_11

NC_12

NC_13

NC_14

NC_15

R133

OPT

IC103

8

7

6

5

NC_1

NC_2

NC_3

NC_4

NC_5

NC_6

NC_7

NC_8

NC_9

1

1

2

3

4

5

6

R/B

7

RE

8

CE

9

10

11

12

13

14

15

CLE

16

ALE

17

WE

18

WP

19

20

21

22

23

24

POWER_DET

3

GND

+3.3V

VCC

HOLD#

SCLK

SI

IC102

HY27US08121B-TPCB

R135

30K
1%

VCC

16V

0.1uF
C109

L100

BLM18PG121SN1D

+24V

0.1uF

SPI_CK

SPI_DI

C101

R136

5.1K

1/10W

5%

NC_28

48

NC_27

47

NC_26

46

NC_25

45

I/O7

44

I/O6

43

I/O5

42

I/O4

41

NC_24

40

NC_23

39

PRE

38

VCC_2

37

VSS_2

36

NC_22

35

NC_21

34

NC_20

33

I/O3

32

I/O2

31

I/O1

30

I/O0

29

NC_19

28

NC_18

27

NC_17

26

NC_16

25

+3.3V

AR100

C102

10uF 6.3V

C103 0.1uF

AR101

EEPROM

IC104

M24512-WMW6G(REV.B)

E0

1

E1

2

E2

3

R134

VSS

0

4

I2C

22

22

PCM_A[7]

PCM_A[6]

PCM_A[5]

PCM_A[4]

PCM_A[3]

PCM_A[2]

PCM_A[1]

PCM_A[0]

VCC

8

WC

7

SCL

6

SDA

5

PCM_A[0-7]

+3.3V

C107
8pF
50V

L101

C104

0.1uF

R146

C108
8pF
50V

+3.3V_ST

0

IC105

MAX810RTR

VCC

3

GND

MAX810 : CMOS
NCP810 : Open Drain

22

R145

22

R148

2

1

EEPROM_SCL

EEPROM_SDA

+3.3V

RESET

ISP FOR BOOT

ISP_RXD_SOC

ISP_TXD_SOC

+3.3V_ST

R158

100

C105

10V

C

Q104

B

2SC3052

E

R155

10K

4.7uF

MCU BOOT STRAP

10 : BOOT 51
11 : BOOT RISC

OPT

R156 1K

OPT

R157

1K

OPT

R160

SW101

R159
10K

+3.3V

R161 1K

R162 1K

+5V_GENERAL

OPT

R163

12

OPT

SWITCH

4 3

R164

C106

10uF

6.3V

001:H28

S6_Reset

LGE3369A (SATURN6 NON RM)

PCM_D[5-7]

PCM_D[5]

PCM_A[0-7,10-11]

SCL

SDA

+5V_GENERAL

/PCM_OE

AR103

R175 0

R176 0

AMP_RST

MEMC_RESET

TUNER_RESET

NTP_MUTE

+3.3V

R1026

4.7K

/PCM_CE

22

Touch_Test

KEY1
KEY2

IR

R177 0

/PF_CE0
/PF_CE1

/PF_OE
/PF_WE
PF_ALE

PF_WP

R165

R166

R167

OPT

R168

OPT

/F_RB

1K

R169

D6 D7 E11 B9

R170

OPT

100

S6_Reset

PWM0

PWM1

+3.3V

AR102

22

EEPROM_SCL
EEPROM_SDA

SDA0
SCL0

ISP_RXD_SOC

ISP_TXD_SOC

DBG_RX

DBG_TX

Stand-by GPIO(SAR[0-3])

Soft_Reset

SB_MUTE

OPT

OPT

OPT

R171

R173

LNA_SWITCH_SEL

OPT

R174

OPT

R172

4.7K

PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[3]
PCM_A[4]
PCM_A[5]
PCM_A[6]
PCM_A[7]

PCM_A[10]
PCM_A[11]

R189 33
R190 33
R191 33
R192 33
R193 10K
R194 10K
R195 33
R196 33
R197 33
R198 33

R181
R182

R183
R184

R178
R179 22
R180 22
R185 22

PWM0
PWM1

OPT

R187
R188 0
R10 0
R48 100
R11 100

PCM_D[6]
PCM_D[7]

33
33
33
33

22

R199 0

D4

AC16
AA15
AA16

AC6
Y10
Y11
Y12
Y13

AB16
AC15
AC14
AB14
AC12

AB8

AC13

AA9
AB5
AA4

V4

Y4
AB9
AA7
AD6

AA14
AB18

Y5

AB15
AA10

AC8
AC7
AA5

W4

T4
AE6
AF6

AA12
AA11

AC9
Y14

AB11

F8
D11

AB21
AC21

J1

J2

W5

V5

AB13
AB12
AD12
AA13

A4

B4

F4

E4

C4

AC11

D9

100

D10

D7
E11

E8
E10

D6

D5

C5

IC100

HWRESET

PCMD0/CI_D0
PCMD1/CI_D1
PCMD2/CI_D2
PCMD3/CI_D3
PCMD4/CI_D4
PCMD5/CI_D5
PCMD6/CI_D6
PCMD7/CI_D7

PCM_A0/CI_A0
PCM_A1/CI_A1
PCM_A2/CI_A2
PCM_A3/CI_A3
PCM_A4/CI_A4
PCM_A5/CI_A5
PCM_A6/CI_A6
PCM_A7/CI_A7
PCM_A8/CI_A8
PCM_A9/CI_A9
PCM_A10/CI_A10
PCM_A11/CI_A11
PCM_A12/CI_A12
PCM_A13/CI_A13
PCM_A14/CI_A14

PCM_RST/CI_RST
PCM_CD/CI_CD
/PCM_OE
PCM_REG/CI_CLK
PCM_WAIT/CI_WACK
/PCM_IRQA
/PCM_WE
PCM_IOWR/CI_WR
PCM_IOR/CI_RD
/PCM_CE
/PF_CE0
/PF_CE1
/PF_OE
/PF_WE
PF_ALE
PF_AD15
F_RBZ

UART2_TX/SCKM
UART2_RX/SDAM
DDCR_DA
DDCR_CK

DDCA_CLK
DDCA_DA
UART_RX2
UART_TX2

PWM0
PWM1
PWM2
PWM3

SAR0
SAR1
SAR2
SAR3
IRIN

GPIO44

GPIO96
GPIO88
GPIO90/I2S_OUT_MUTE
GPIO91
GPIO97
GPIO98
GPIO99
GPIO103/I2S_OUT_SD3
GPIO102

LHSYNC2/I2S_OUT_MUTE/RX1

XOUT

TESTPIN/GND

SPI_DI
SPI_DO

/SPI_CS

SPI_CK

USB_DP_1
USB_DM_1
USB_DM_2
USB_DP_2

GPIO_PM0/GPIO134
GPIO_PM1/GPIO135
GPIO_PM2/GPIO136
GPIO_PM3/GPIO137

GPIO_PM4/GPIO138
GPIO_PM5/INT1/GPIO139
GPIO_PM6/INT2/GPIO140

GPIO131/LDE/SPI_WPn1

GPIO130/LCK

GPIO132/LHSYNC/SPI_WPn

GPIO60/PCM2_RESET/RX1

GPIO62/PCM2_CD_N/TX1

LVSYNC/GPIO133

GPIO79/LVSYNC2/TX1

UART2_RX/GPIO84
UART2_TX/GPIO85
UART1_RX/GPIO86
UART1_TX/GPIO87

GPIO42/PCM2_CE_N

GPIO43/PCM2_IRQA_N

TS0_D0
TS0_D1
TS0_D2
TS0_D3
TS0_D4
TS0_D5
TS0_D6
TS0_D7

TS0_SYNC

TS0_VLD
TS0_CLK

TS1_D0

TS1_SYNC

TS1_VLD
TS1_CLK

ET_TXD0
ET_TXD1

ET_TX_CLK

ET_RXD0
ET_RXD1

ET_TX_EN

ET_MDC

ET_MDIO

ET_COL

R33

B3

XIN

A3

R18 0

E6

AE11

R14 33
AF12
AE12

R15 33
AD11

R16 33

B5
A5
AC10
AB10

E5
F5
G5
H5
F6
G6
H6
AC17
AB17
AF11
AA18
AA17

E7
AC18
C6
F9
F10
A6
B6
AF5
AF10

AA8
Y8
Y9
AB7
AA6
AB6
U4
AC5
AC4
AD5
AB4

AB19
AA20
AC19
AA19

C10
B11
A9
C11
C9
B10
A10
B9
A11

LOGO_LED

R29

R21 100
R23
R24 33
R25 33

R31

R30

OPT

OPT

1M

SPI_DI
SPI_DO
SPI_CS
SPI_CK

+3.3V_ST

10K

R34

R45

100

100

33

33

USB_OCD

R13100

R26100

R270

FE_RESET

X12

12MHz

OPT

15K

R37

3.3K
R32

R35

100

I2C for Tuner_5V

5V Tolerance

BUF_TS_DATA[0]
BUF_TS_SYN
BUF_TS_VAL_ERR

BUF_TS_CLK

EEPROM_WP

C12

20pF

C13

20pF

USB_DP
USB_DM

USB

OPT

R38

15K

PM GPIO Assignment Recommended by MStar

LOGIC_POWER_ON

100

PANEL_POWER_ON

Interrupt for ISP Wake up in STB Mode

Flash_WP_1

FE_TUNER_SCL

FE_TUNER_SDA

4:S5

R41 100

R44

R46

R42

+3.3V +3.3V

R142

2.7K

R143

2.7K

OPT

100

100

100

SDA1

SCL1

DBG_TX

POWER_DET

POWER_ON

DBG_RX

POWER_DET

R106

10K

R110

10K
OPT

R114

R111

10K

1K

R118 0

R119 0

OPT

R120 0

OPT

R121 0

R122 0

R124 0

R125 0

PCM_A[11]

PCM_D[5]

PCM_D[7]

/PCM_CE

/PCM_OE

PCM_A[10]

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

PCM_D[6]

JTINT

/JTRST

JTCK

JTMS

JTDO

JTDI

/RST

MEMC_SDA
MEMC_SCL

FE_DEMOD_SDA
FE_DEMOD_SCL

R138 33
R139 33

R140 33
R141 33

R144

2.7K

R147

2.7K

R152

4.7K

R153

4.7K

SDA0
SCL0

EEPROM_SDA
EEPROM_SCL

MODEL_OPT_0 (D6) : LCD (H) / PDP (L)
MODEL_OPT_1 (D7) : FRC (H) / NO FRC (L)
MODEL_OPT_2 (E11) : LED NORMAL (H)

MODEL_OPT_3 (B9) : FHD (H) / HD (L)

NO LED NORMAL (L)

PULL UP is applied on the FRC

PULL UP is applied on the JACK

A7

R12 100

GPIO67

B8

GPIO68

FLASH/GPIO

OLED

USB_CTL

+3.3V

R43

3.3K

OPT

R47
0

R39
1K

C

Q12

B

2SC3052

OPT

E

PANEL_RESET

09.08.31
1 9

Audio Mute

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

AMP_MUTE

007:Y15

D200

ENKMC2838-T112

A1

C

A2

+3.3V_ST

R215

+1.26V_VDDC

C238

0.1uF

10K

SB_MUTE

NTP_MUTE

+1.26V_VDDC

C239

C235

0.1uF

0.1uF
16V

C242

0.1uF

C243

0.1uF

C246

0.1uF

C247

0.1uF

C249

0.1uF

C250

0.1uF

C252

0.1uF

C253

0.1uF

C255

0.1uF

C256

0.1uF

C258

0.1uF

C259

0.1uF

C261

0.1uF

C262

0.1uF

C264

0.1uF

C265

0.1uF

C267

0.1uF

C269

0.1uF

C270

0.1uF

C272

0.1uF

C273

0.1uF

C275
10uF

C276

0.1uF

C277

0.1uF

C279

0.1uF

TV/MNT

CK+_HDMI1

CK-_HDMI1
D0+_HDMI1

D0-_HDMI1
D1+_HDMI1
D1-_HDMI1
D2+_HDMI1

D2-_HDMI1
HDMI_SDA_1
HDMI_SCL_1

CEC_REMOTE

FE_VMAIN

HDMI

HPD1

SDA2

SCL2

R1028

R1027

4.7K

R944

R200 0
R201 0
R203
R204

R208
R209 47
R210

R211 47

R212
R207

4.7K

OPT

0

100
100

47

C200 0.047uF
C201

47

C202

C203 0.047uF

C208 0.047uFR213 47
C209 0.047uFR214 47

100

C206 0.047uF

100

C207 0.047uF

+3.3V

R942 0
R943 0

OPT
R945

0

OPT
OPT

0.047uF
OPT

0.047uF

LGE3369A (SATURN6 NON RM)

F1

RXACKP

F2

RXACKN

G2

RXA0P

G3

RXA0N

H3

RXA1P

G1

RXA1N

H1

RXA2P

H2

RXA2N

A1

DDCD_A_DA

B2

DDCD_A_CK

A2

HOTPLUG_A

C3

RXBCKP

B1

RXBCKN

C1

RXB0P

C2

RXB0N

D2

RXB1P

D3

RXB1N

E3

RXB2P

D1

RXB2N

E1

DDCD_B_DA

F3

DDCD_B_CK

E2

HOTPLUG_B

AE8

RXCCKP

AD8

RXCCKN

AD9

RXC0P

AF8

RXC0N

AF9

RXC1P

AE9

RXC1N

AE10

RXC2P

AD10

RXC2N

AE7

DDCD_C_DA

AF7

DDCD_C_CK

AD7

HOTPLUG_C

J3

CEC

N2

HSYNC0/SC1_ID

N1

VSYNC0/SC1_FB

P2

RIN0P/SC1_R

R3

GIN0P/SC1_G

R1

BIN0P/SC1_B

P3

SOGIN0/SC1_CVBS

P1

RINM

T3

BINM

R2

GINM

K3

HSYNC1/DSUB_HSYNC

K2

VSYNC1/DSUB_VSYNC

L1

RIN1P/DSUB_R

L3

GIN1P/DSUB_G

K1

BIN1P/DSUB_B

L2

SOGIN1

V1

RIN2P/COMP_PR+

V2

GIN2P/COMP_Y+

U1

BIN2P/COMP_PB+

V3

SOGIN2

J5

VSYNC2

U3

CVBS1/SC1_CVBS

U2

CVBS2/SC2_CVBS

T1

CVBS3/SIDE_CVBS

T2

VCOM1

M1

CVBS4/S-VIDEO_Y

M2

CVBS6/S-VIDEO_C

N3

CVBS5

M3

CVBS7

W1

CVBS0/RF_CVBS

Y3

VCOM0

Y2

CVBSOUT0/SC2_MNTOUT

AA2

CVBSOUT1

IC100

LVA0P
LVA0M
LVA1P
LVA1M
LVA2P
LVA2M
LVA3P
LVA3M
LVA4P
LVA4M

LVACKP
LVACKM

LVB0P
LVB0M
LVB1P
LVB1M
LVB2P
LVB2M
LVB3P
LVB3M
LVB4P
LVB4M

LVBCKP
LVBCKM

AUR0
AUL0
AUR1
AUL1
AUR2

AUL2

AUR3
AUL3
AUR4
AUL4
AUR5
AUL5

SIF0P
SIF0M

SPDIF_IN

SPDIF_OUT

AUOUTR0/HP_ROUT

AUOUTL0/HP_LOUT
AUOUTR1/SC1_ROUT
AUOUTL1/SC1_LOUT
AUOUTR2/SC2_ROUT
AUOUTL2/SC2_LOUT

I2S_OUT_MCK

I2S_OUT_WS

I2S_OUT_BCK

I2S_OUT_SD

I2S_IN_SD

VCLAMP

REFP
REFM
REXT

AUCOM
AUVRM
AUVRP
AUVAG

AE2

AE16
AD16
AD15
AF16
AF15
AE15
AD13
AF14
AF13
AE13

AE14
AD14

AE20
AD20
AD19
AF20
AF19
AE19
AD17
AF18
AF17
AE17

AE18
AD18

AA3
Y1
AE1
AF3
AE3

AA1
AB1
AB2
AC2
AB3
AC3

W3
W2

F11
E9

AF1
AF2
AD3
AD1
AC1
AD2

A8
B7
C7
D8
C8

K4
H4
J4
G4

AE5
AE4
AF4
AD4

C210

R216

R221
R222

1%

Check

OPT
OPT

0.1uF

390

C211 0.1uF

C212 10uF
C213 0.1uF
C214
C215 4.7uF

C222 0.1uF
C223 0.1uF

100
100

R223 22
R224 22
R225 22
R226 22
R227

100

OPT

+3.3V

C225

0.1uF

1uF

0.1uF

0.1uF

10V

MEMC_RXE0+
MEMC_RXE0­MEMC_RXE1+
MEMC_RXE1­MEMC_RXE2+
MEMC_RXE2­MEMC_RXE3+
MEMC_RXE3­MEMC_RXE4+
MEMC_RXE4-

MEMC_RXEC+
MEMC_RXEC-

MEMC_RXO0+
MEMC_RXO0­MEMC_RXO1+
MEMC_RXO1­MEMC_RXO2+
MEMC_RXO2­MEMC_RXO3+
MEMC_RXO3­MEMC_RXO4+
MEMC_RXO4-

MEMC_RXOC+
MEMC_RXOC-

C227

C226

002:Z22;009:S28
002:Z22;009:S28
002:Z23;009:R28
002:Z22;009:R28
002:Z23;009:R28
002:Z23;009:R28
002:Z25;009:Q28
002:Z25;009:Q28
002:Z26;009:Q28
002:Z25;009:Q28

002:Z24;009:Q28
002:Z24;009:R28

002:Z17;009:U28
002:Z17;009:V28
002:Z18;009:U28
002:Z18;009:U28
002:Z18;009:U28
002:Z18;009:U28
002:Z20;009:T28
002:Z20;009:T28
002:Z21;009:S28
002:Z21;009:T28

002:Z19;009:T28
002:Z19;009:T28

R230

R231 47

47

5V_HDMI_1

C229
22pF

OPT

C231
22pF

OPT

+1.8V_DDR

C232
22pF
OPT

C237
22pF

OPT

C241

C240

0.1uF

0.01uF

OPT

R234

22K

C244

0.1uF

FE_SIF

OPT

C245

0.01uF

R235

22K

OPT

AUDIO_MASTER_CLK
MS_LRCK
MS_SCK
MS_LRCH

C248

0.1uF

OPT

C251

0.1uF

004:C13

007:K22
007:K16
007:K16
007:K17

C254

0.1uF

C257

0.1uF

C260

0.1uF

C263

0.1uF

C268

0.1uF

C271

0.1uF

C266

0.1uF

LGE3369A (SATURN6 NON RM)

E16

GND_2

E17

GND_3

E18

GND_4

F7

GND_5

L9

GND_6

L10

GND_7

L11

GND_8

L12

GND_9

L13

GND_10

L14

GND_11

L15

GND_12

L16

GND_13

L17
L18

M9

M10
M11
M12

GND_19

M13

GND_20

M14

GND_21

M15

GND_22

M16

GND_23

M17

GND_24

M18

GND_25

N4

GND_26

N9

GND_27

N10

GND_28

N11

GND_29

N12

GND_30

N13

GND_31

N14

GND_32

N15

GND_33

N16

GND_34

N17

GND_35

N18

GND_36

P4

GND_37

P9

GND_38

P10

GND_39

P11

GND_40

P12

GND_41

P13

GND_42

P14

GND_43

P15

GND_44

P16

GND_45

P17

GND_46

P18

GND_47

R4

GND_48

R9

GND_49

R10

GND_50

R11

GND_51

R12

GND_52

R13

GND_53

R14

GND_54

R15

GND_55

R16

GND_56

R17

GND_57

R18

GND_58

T5

GND_59

T9

GND_60

T10

GND_61

T11

GND_62

T12

GND_63

T13

GND_64

T14

GND_65

T15

GND_66

T16

GND_67

T17

GND_68

T18

GND_69

U5

GND_70

W13

GND_71

Y21

GND_72

AA23

GND_73

GND_14
GND_15
GND_16

GND_17
GND_18

C274
10uF

IC100

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8

VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15

VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27

VDDP_1

VDDP_2

VDDP_3

VDDP_4

VDDP_5

VDDP_6

VDDP_7

VDDP_8

AVDD_AU

AVDD_DDR_1
AVDD_DDR_2
AVDD_DDR_3
AVDD_DDR_4
AVDD_DDR_5
AVDD_DDR_6
AVDD_DDR_7
AVDD_DDR_8

AVDD_DDR_9
AVDD_DDR_10
AVDD_DDR_11

AVDD_MEMPLL_1
AVDD_MEMPLL_2
AVDD_MEMPLL_3

AVDD_LPLL

AVDD_MPLL

AVDD_33_1
AVDD_33_2
AVDD_33_3
AVDD_33_4
AVDD_33_5

AVDD_DM

AVDD_USB

+3.3V_VDDP

C280

C278

0.1uF

0.1uF

D16
D17
D18
D19
D20
H18
H19
H20
J20
K20
L20
M20
P7
R7
T7
T22
U7
U20
U22
V7
V22
W11
W12
W19
W20
W22
Y22

H9
H10
H11
H12
N20
P20
W9
W10

W7

+1.8V_DDR

G12
G13
H13
H14
H15
H16
W14
W15
W16
W17
W18

H17
T20
V20

R20

H7

0.1uF

J7
K7
L7
M7
N7

W8

H8

C283

0.1uF

+1.26V_VDDC

+3.3V_VDDP

AVDD_DDR : 18.31mA

C284

0.1uF

+3.3V_AVDD_MPLL

C282

C285
10uF
10V

BLM18PG121SN1D

C281

C286

2.2uF
10V

0.1uF

C287

C291

0.1uF

0.1uF

VDDC : 970mA

L201

BLM18PG121SN1D

C288

0.1uF

C289

0.1uF

AVDD_MPLL : 7.76mA

C292

0.1uF

+3.3V

L200

AVDD_OTG : 22.96mA

C290

0.1uF

C295

0.1uF

VDDP : 102.3mA

+3.3V_AVDD

C297

0.1uF

L202

BLM18PG121SN1D

C293

0.1uF

BLM18PG121SN1D

C296

0.1uF

C294

C298

0.1uF

0.1uF

BLM18PG121SN1D

C299

C60

0.1uF

0.1uF

AVDD_AU : 36.11mA

+3.3V

AVDD_MEMPLL : 23.77mA

C51

0.1uF
+3.3V

C50

0.1uF

BLM18PG121SN1D

C52

0.1uF

AVDD_LPLL : 4.69mA

C53

0.1uF

L204

L203

L205

C61

0.1uF

+3.3V

C55

0.1uF

BLM18PG121SN1D

C54

0.1uF

+3.3V

C62

0.1uF

AVDD_33 : 281mA

L206

C56

0.1uF

+3.3V

AVDD_DM : 0.03mA

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

MSD3368GV

Close to IC
as close as possible

OLED

AVIN/LVDS/PWR

09.08.31
2 9

DDR2 1.8V By CAP - Place these Caps near Memory

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+1.8V_DDR

SDDR_D[0]
SDDR_D[1]
SDDR_D[2]
SDDR_D[3]
SDDR_D[4]
SDDR_D[5]
SDDR_D[6]
SDDR_D[7]
SDDR_D[8]
SDDR_D[9]
SDDR_D[10]

SDDR_D[0-15]

SDDR_D[11]
SDDR_D[12]
SDDR_D[13]
SDDR_D[14]
SDDR_D[15]

+1.8V_DDR

HY5PS1G1631CFP-S6

DQ0

G8

DQ1

G2

DQ2

H7

DQ3

H3

1G bit

H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

A1
E1
J9
M9
R1

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A3
E3
J3
N1
P9

B2
B8
A7
D2
D8
E7
F2
F8
H2
H8

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VDD5
VDD4
VDD3
VDD2
VDD1

VDDQ10

VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1

VSS5
VSS4
VSS3
VSS2
VSS1

VSSQ10

VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1

DQ4
DQ5
DQ6
DQ7
DQ8
DQ9

IC300

C300

0.1uF
C301

+1.8V_DDR

0.1uF

1000pF

C305

C303

VREF

J2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12

BA0
BA1
BA2

CK
CK
CKE

ODT
CS
RAS
CAS
WE

LDQS
UDQS

LDM
UDM

LDQS
UDQS

NC5
NC6

NC1
NC2
NC3

VSSDL

VDDL

R300

SDDR_A[0]
SDDR_A[1]
SDDR_A[2]
SDDR_A[3]
SDDR_A[4]
SDDR_A[5]
SDDR_A[6]
SDDR_A[7]
SDDR_A[8]

SDDR_A[9]
SDDR_A[10]
SDDR_A[11]
SDDR_A[12]

OPT

SDDR_CK
/SDDR_CK

R301

+1.8V_DDR

SDDR_BA[0]
SDDR_BA[1]
SDDR_BA[2]

SDDR_CKE

R303

OPT

/SDDR_RAS
/SDDR_CAS

/SDDR_WE

SDDR_DQS0_P
SDDR_DQS1_P

SDDR_DQM0_P
SDDR_DQM1_P

SDDR_DQS0_N
SDDR_DQS1_N

SDDR_A[0-12]

OPT

150

OPT

SDDR_ODT

M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2

L2
L3
L1

J8
K8
K2

K9
L8
K7
L7
K3

F7
B7

F3
B3

E8
A8

R3
R7

A2
E2
R8

J7

J1

0.1uF

0.1uF

10uF

C304

C306

C302

1%

1K

R304

R305 1K 1%

SDDR_A[5]
SDDR_A[3]

SDDR_A[1]
SDDR_A[10]

SDDR_A[9]
SDDR_A[12]
SDDR_A[7]

SDDR_A[0]
SDDR_A[2]
SDDR_A[4]
SDDR_A[6]
SDDR_A[11]
SDDR_A[8]

R30656
R30756
R308

56

R309

22

R302

R31022

R31156

+1.8V_DDR

R31256

R31356
R31456
R31556

R31656
R31756

R31856
R31956

R32056

R32156

SDDR_D[11]
SDDR_D[12]
SDDR_D[9]
SDDR_D[14]

SDDR_D[4]
SDDR_D[3]
SDDR_D[1]
SDDR_D[6]

SDDR_D[15] BDDR2_D[15]
SDDR_D[8]
SDDR_D[10]
SDDR_D[13]

SDDR_D[7]
SDDR_D[0]
SDDR_D[2]
SDDR_D[5]

0.1uF

56

56

C307

AR300

AR302

AR301

0.1uF

0.1uF

C308

56

R322

R323 56

AR303

AR304

C309

56

56
AR305

56

AR306

0.1uF

56

56

0.1uF

C311

C310

ADDR2_A[5]
ADDR2_A[3]
ADDR2_A[1]

ADDR2_A[10]

ADDR2_A[9]

ADDR2_A[12]

ADDR2_A[7]
ADDR2_A[0]

ADDR2_A[2]
ADDR2_A[4]
ADDR2_A[6]
ADDR2_A[11]
ADDR2_A[8]

ADDR2_BA[0]
ADDR2_BA[1]
ADDR2_BA[2]

ADDR2_MCLK

/ADDR2_MCLK

ADDR2_CKE

ADDR2_ODT

/ADDR2_RAS
/ADDR2_CAS

/ADDR2_WE

ADDR2_DQS0_P
ADDR2_DQS1_P

ADDR2_DQM0_P
ADDR2_DQM1_P

ADDR2_DQS0_N
ADDR2_DQS1_N

ADDR2_D[11]
ADDR2_D[12]

ADDR2_D[9]

ADDR2_D[14]

ADDR2_D[4]
ADDR2_D[3]
ADDR2_D[1]
ADDR2_D[6]

ADDR2_D[15]

ADDR2_D[8]
ADDR2_D[10]
ADDR2_D[13]

ADDR2_D[7]

ADDR2_D[0]

ADDR2_D[2]

ADDR2_D[5]

C312

0.1uF

+1.8V_DDR

0.1uF

10uF

C313

R324

1K 1%

0.1uF

R325

1K 1%

C317

ADDR2_A[0-12]

ADDR2_D[0-15]

C314

0.1uF

0.1uF

0.1uF

0.1uF

C316

C315

1000pF

C319

ADDR2_A[0]
ADDR2_A[1]
ADDR2_A[2]
ADDR2_A[3]
ADDR2_A[4]
ADDR2_A[5]
ADDR2_A[6]
ADDR2_A[7]
ADDR2_A[8]
ADDR2_A[9]
ADDR2_A[10]
ADDR2_A[11]
ADDR2_A[12]

ADDR2_D[0]
ADDR2_D[1]
ADDR2_D[2]
ADDR2_D[3]
ADDR2_D[4]
ADDR2_D[5]
ADDR2_D[6]
ADDR2_D[7]
ADDR2_D[8]
ADDR2_D[9]
ADDR2_D[10]
ADDR2_D[11]
ADDR2_D[12]
ADDR2_D[13]
ADDR2_D[14]
ADDR2_D[15]

C320

C318

LGE3369A (SATURN6 NON RM)

D15

A_MVREF

C13

A_DDR2_A0

A22

A_DDR2_A1

B13

A_DDR2_A2

C22

A_DDR2_A3

A13

A_DDR2_A4

A23

A_DDR2_A5

C12

A_DDR2_A6

B23

A_DDR2_A7

B12

A_DDR2_A8

C23

A_DDR2_A9

B22

A_DDR2_A10

A12

A_DDR2_A11

A24

A_DDR2_A12

C24

A_DDR2_BA0

B24

A_DDR2_BA1

D24

A_DDR2_BA2

B14

A_DDR2_MCLK

A14

/A_DDR2_MCLK

D23

A_DDR2_CKE

D14

A_DDR2_ODT

D13

/A_DDR2_RAS

D12

/A_DDR2_CAS

D22

/A_DDR2_WE

B18

A_DDR2_DQS0

C17

A_DDR2_DQS1

C18

A_DDR2_DQM0

A19

A_DDR2_DQM1

A18

A_DDR2_DQSB0

B17

A_DDR2_DQSB1

B15

A_DDR2_DQ0

A21

A_DDR2_DQ1

A15

A_DDR2_DQ2

B21

A_DDR2_DQ3

C21

A_DDR2_DQ4

C14

A_DDR2_DQ5

C20

A_DDR2_DQ6

C15

A_DDR2_DQ7

C16

A_DDR2_DQ8

C19

A_DDR2_DQ9

B16

A_DDR2_DQ10

B20

A_DDR2_DQ11

A20

A_DDR2_DQ12

A16

A_DDR2_DQ13

B19

A_DDR2_DQ14

A17

A_DDR2_DQ15

0.1uF

IC100

C321

0.1uF

B_DDR2_A0
B_DDR2_A1
B_DDR2_A2
B_DDR2_A3
B_DDR2_A4
B_DDR2_A5
B_DDR2_A6
B_DDR2_A7
B_DDR2_A8

B_DDR2_A9
B_DDR2_A10
B_DDR2_A11
B_DDR2_A12

B_DDR2_BA0
B_DDR2_BA1
B_DDR2_BA2

B_DDR2_MCLK

/B_DDR2_MCLK

B_DDR2_CKE

B_DDR2_ODT

/B_DDR2_RAS
/B_DDR2_CAS

/B_DDR2_WE

B_DDR2_DQS0
B_DDR2_DQS1

B_DDR2_DQM0
B_DDR2_DQM1

B_DDR2_DQSB0
B_DDR2_DQSB1

B_DDR2_DQ0
B_DDR2_DQ1
B_DDR2_DQ2
B_DDR2_DQ3
B_DDR2_DQ4
B_DDR2_DQ5
B_DDR2_DQ6
B_DDR2_DQ7
B_DDR2_DQ8
B_DDR2_DQ9

B_DDR2_DQ10
B_DDR2_DQ11
B_DDR2_DQ12
B_DDR2_DQ13
B_DDR2_DQ14
B_DDR2_DQ15

C322

10uF

C323

T26
AF26
T25
AF23
T24
AE23
R26
AD22
R25
AC22
AD23
R24
AE22

AC23
AC24
AB22
V25

V24
AB23

U26

U25
U24
AB24

AB26
AA26

AC25
AC26

AB25
AA25

W25
AE26
W24
AF24
AF25
V26
AE25
W26
Y26
AD25
Y25
AE24
AD26
Y24
AD24
AA24

C324

0.1uF

0.1uF

BDDR2_A[0]
BDDR2_A[1]
BDDR2_A[2]
BDDR2_A[3]
BDDR2_A[4]
BDDR2_A[5]
BDDR2_A[6]
BDDR2_A[7]
BDDR2_A[8]

BDDR2_A[9]
BDDR2_A[10]
BDDR2_A[11]
BDDR2_A[12]

BDDR2_D[0]

BDDR2_D[1]

BDDR2_D[2]

BDDR2_D[3]

BDDR2_D[4]

BDDR2_D[5]

BDDR2_D[6]

BDDR2_D[7]

BDDR2_D[8]

BDDR2_D[9]
BDDR2_D[10]
BDDR2_D[11]
BDDR2_D[12]
BDDR2_D[13]
BDDR2_D[14]
BDDR2_D[15]

C325

0.1uF

C326

C328

C327

10uF

0.1uF

BDDR2_A[0-12]

BDDR2_D[0-15]

C329

0.1uF

0.1uF

BDDR2_A[9]
BDDR2_A[3]
BDDR2_A[1]
BDDR2_A[10]

BDDR2_A[5]
BDDR2_A[12]
BDDR2_A[7]

BDDR2_A[0]
BDDR2_A[2]
BDDR2_A[4]
BDDR2_A[6]
BDDR2_A[11]
BDDR2_A[8]

BDDR2_BA[0]
BDDR2_BA[1]
BDDR2_BA[2]

BDDR2_MCLK

/BDDR2_MCLK

BDDR2_CKE

BDDR2_ODT

/BDDR2_RAS
/BDDR2_CAS

/BDDR2_WE

BDDR2_DQS0_P
BDDR2_DQS1_P

BDDR2_DQM0_P
BDDR2_DQM1_P

BDDR2_DQS0_N
BDDR2_DQS1_N

BDDR2_D[11]
BDDR2_D[12]
BDDR2_D[9]
BDDR2_D[14]

BDDR2_D[4]
BDDR2_D[3]
BDDR2_D[1]
BDDR2_D[6]

BDDR2_D[8]
BDDR2_D[10]
BDDR2_D[13]

BDDR2_D[7]
BDDR2_D[0]
BDDR2_D[2]

C330

C331

0.1uF

0.1uF

R326 56
R327 56

AR307

AR308

C332

AR311

AR309

56

AR310

56

0.1uF

AR312

56

AR313

56

56

C333

C334

0.1uF

56

56

R328 56

R329 56

R330

R331

R332 22

R333 56

R334 56

R335 56
R336 56

R337 56

R338 56
R339 56

R340 56
R341 56

R342 56
R343 56

TDDR_D[11]
TDDR_D[12]

TDDR_D[9]

TDDR_D[14]

TDDR_D[4]
TDDR_D[3]
TDDR_D[1]
TDDR_D[6]

TDDR_D[15]

TDDR_D[8]
TDDR_D[10]
TDDR_D[13]

TDDR_D[7]

TDDR_D[0]

TDDR_D[2]

TDDR_D[5]BDDR2_D[5]

C335

0.1uF

TDDR_A[9]
TDDR_A[3]
TDDR_A[1]
TDDR_A[10]

TDDR_A[5]
TDDR_A[12]
TDDR_A[7]
TDDR_A[0]
TDDR_A[2]
TDDR_A[4]
TDDR_A[6]
TDDR_A[11]
TDDR_A[8]

22

+1.8V_DDR

0.1uF

C336

R3441K1%

OPT

C337

0.1uF

0.1uF

TDDR_A[0-12]

TDDR_BA[0]
TDDR_BA[1]

R345

150

TDDR_CKE

R346

/TDDR_RAS
/TDDR_CAS

/TDDR_WE

TDDR_DQS1_P

TDDR_DQM1_P

TDDR_DQS1_N

C338

0.1uF

+1.8V_DDR

R3471K1%

C340

C339

1000pF

0.1uF

TDDR_A[0]
TDDR_A[1]
TDDR_A[2]
TDDR_A[3]
TDDR_A[4]
TDDR_A[5]
TDDR_A[6]
TDDR_A[7]
TDDR_A[8]
TDDR_A[9]
TDDR_A[10]
TDDR_A[11]
TDDR_A[12]

TDDR_BA[2]

TDDR_MCLK

OPT

OPT

OPT

R348

TDDR_DQS0_P

TDDR_DQM0_P

TDDR_DQS0_N

+1.8V_DDR

R349

C341

PI Result

H5PS5162FFR-S6C

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

NC4

L1

0

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

0.1uF

IC301

512M bit

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VDD5
VDD4
VDD3
VDD2
VDD1

VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1

VSS5
VSS4
VSS3
VSS2
VSS1

VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1

TDDR_D[0]
TDDR_D[1]
TDDR_D[2]
TDDR_D[3]
TDDR_D[4]
TDDR_D[5]
TDDR_D[6]
TDDR_D[7]
TDDR_D[8]

TDDR_D[9]
TDDR_D[10]
TDDR_D[11]
TDDR_D[12]
TDDR_D[13]
TDDR_D[14]
TDDR_D[15]

+1.8V_DDR

TDDR_D[0-15]

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

A1
E1
J9
M9
R1

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A3
E3
J3
N1
P9

B2
B8
A7
D2
D8
E7
F2
F8
H2
H8

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

DDR

OLED

09.08.31

DDR2 3 9

BODY_SHIELD

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Hot plug Detect

+5V Power

Reserved

SDA

SCL

CEC

DDC/CEC GND

TMDS Clock-

TMDS Clock+

TMDS Clock Shield

TMDS Data0-

TMDS Data0+
TMDS Data0 Shield

TMDS Data1-

TMDS Data1+
TMDS Data1 Shield

TMDS Data2-

TMDS Data2+
TMDS Data2 Shield

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

DC2R019JA3

JK401

5V_HDMI_1

HOT_PLUG_DETECT

VDD[+5V]

RESERVED

SDA

SCL

CEC

DDC/CEC_GND

TMDS_CLK-

TMDS_CLK+

TMDS_CLK_SHIELD

TMDS_DATA0-

TMDS_DATA0+

TMDS_DATA0_SHIELD

TMDS_DATA1-

TMDS_DATA1+

TMDS_DATA1_SHIELD

TMDS_DATA2-

TMDS_DATA2+

TMDS_DATA2_SHIELD

R401

2K

R403
1K

R417 0
R418 0

R412 0

R413 0

R419 0

R421 0

R422 0

R423 0

R424 0

R425 0

R426 0

Q401

2SC3052

C401

0.1uF
16V

C

R429
10K

B

E

HDMI_SDA_1

HDMI_SCL_1

HDMI_CEC

CK-_HDMI1

CK+_HDMI1

D0-_HDMI1

D0+_HDMI1

D1-_HDMI1

D1+_HDMI1

D2-_HDMI1

D2+_HDMI1

UI_HW_PORT(TYPE C)

USB JACK

+3.3V_P

R452

4.7K

VIN

1

GND

2

ENABLE

3

+5V_GENERAL

R455
R458
47

USB_DM

USB_DP

USB_CTL

10K

1234

USB DOWN STREAM

P401

UAR27-4K2300

5

MLB-201209-0120P-N2

C413

C414

10uF

0.1uF

10V

16V

L401

D401

CDS3C05HDMI1

5.6V

R451

180

MIC2009YM6-TR

VOUT

6

ILIMIT

5

FAULT/

4

D402

CDS3C05HDMI1

5.6V

IC401

$0.18

USB +5V Over Current Protection --> USB Jack

HPD1

L402

MLB-201209-0120P-N2

C415

C409

10uF

0.1uF

10V

USB_OCD

001:AI16

+5V_EXT

1:AO24

1:E32;I9

1:E33;I9

EEPROM_WP

HDMI_SCL_1

HDMI_SDA_1

+5V_GENERAL

D403

ENKMC2838-T112

R453

100

5V_HDMI_1

HDMI EDID EEPROM(2Kbit)

C416

0.1uF

R457
10K

16V

VCC

R459

SCL

33

R460

SDA

33

R454

10K

R456

10K

[IR & LED]

IC402

CAT24C02WI-GT3

8

WP

7

6

5

9:M15

LOGO_LED

AR604
33
1/16W

R442

4.7K

R461
0

0
R462

+3.3V

OPT
R463

0

R464
0

C403

0.1uF

+3.3V

JP11

R443

R444 22

HDCP EEPROM

+3.3V_ST

GND

JP12

SDA1

JP13

SCL1

JP14

KEY1

JP15

Soft_Reset

JP16

Touch_Test

JP17

KEY2

JP18

C966

0.1uF
16V

BUF_TS_CLK

BUF_TS_DATA[0]

22

P402

12507WS-08L

1

2

3

4

5

6

7

8

.

9:M15

9:M15

BUF_TS_VAL_ERR

9:M15

BUF_TS_SYN

9:M15

EEPROM_SCL

EEPROM_SDA

9

For CEC

Q400

SSM6N15FU

SOURCE1

CEC_REMOTE

A0

1

A1

2

A2

3

VSS

4

GATE1

DRAIN2

1

2

3

R416

OPT

DRAIN1

6

GATE2

5

SOURCE2

4

0

R427

68K

+3.3V_HDMI_ST

D400

R435

9.1K

HDMI_CEC

C402
220pF
50V

GND

R436

4.7K

CAT24WC08W-T

A0

1

A1

2

A2

3

VSS

4

IC400

VCC

8

WP

7

SCL

6

SDA

5

[TOUCH CONTROL]

L400

20

19

18

17

16

15

14

13

12

11

CB3216PA501E

C407

0.1uF

VCC

OE2

Y0

Y1

Y2

Y3

Y4

Y5

Y6

Y7

C408

1000pF

16V

50V

R465

4.7K

OPT

+3.3V_ST

SDA1

SCL1

KEY1

Soft_Reset

Touch_Test

P400

TF12-9S-0.5SH

JP20

L615

C404

50V

R405
0

C417

0.1uF
16V

ZD401

CDS3C05HDMI1

C405

0.1uF

CB3216PA501E

5.6V

16V

C406

1000pF

50V

C418

1000pF

50V

JP22

JP25

JP27

+5V_ST

R404

IR

100

100pF

1

2

3

4

5

6

7

8

9

10

OE1

R661
10K

R662
10K

A0

A1

A2

A3

A4

A5

A6

A7

GND

FE_TS_CLK

FE_TS_VAL_ERR

FE_TS_SYNC

FE_TS_SERIAL

KEY2

IC606

74LVC541A(PW)

1

2

3

4

5

6

7

8

9

10

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

OLED

HDMI/IR/USB

09.08.31
4 9

RF_IN

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

004:D6

004:D6

+5V_GENERAL

L614

BLM18PG121SN1D

C649

0.1uF
16V

D600
RCLAMP0502B

TUNER_SIF_IF_N

TUNER_CVBS_IF_P

+5V_TUNER

C650

0.1uF
16V

C601

+3.3V_P

56pF

50V

L600

0603CS-R27XGLW

MLF1608A2R7J

MLF1608A2R7J

2.7uH

L616

BLM18PG121SN1D

C688

0.1uF
16V

C604

39pF

50V

270nH

C603
120pF
50V

LNA_SWITCH_SEL

L602

2.7uH

L601

R602
680

R603
680

+3.3V_TU

INPUT

C606

6.8pF
50V

C689

0.1uF
16V

GND

VM

C975

0.47uF
25V

C607

6.8pF
50V

+5V_TUNER

1

2

3

C608

0.1uF
16V

C609

0.1uF
16V

C611

0.1uF
16V

B

C610

0.1uF
16V

+3.3V_TU

IC1002

TB7601TU

+5V_TUNER

R608

B

+5V_TUNER

B

E

C

+5V_TUNER

R609

B

6

5

4

390

E

ISA1530AC1
Q602

C

390

R60 6

0

R607

E

ISA1530AC1
Q601

C

390

R60 4

R6050

ISA1530AC1
Q600

390

E

ISA1530AC1
Q603

C

+3.3V_TU_LNA

VCC

VOUT

OUTPUT

FE_VMAIN

IF_P

L621

500

IF_N

FE_SIF
004:D6

+3.3V_TU_LNA

C692

0.1uF
16V

C693

56pF

004:D6

50V

L607

C694

39pF

50V

270nH

0603CS-R27XGLW

C695
120pF
50V

50V

OPT

3.9pF
C965

FE_TS_SYNC

FE_TS_ERR

FE_TS_CLK

FE_TS_VAL

FE_TS_SERIAL

12nH

L603

0603CS-12NXGLW

L604

0603CS-R39XGLW

+3.3V_DVDD_P

390nH

BAP70-02

C613

C614

C612

0.1uF

C615

0.1uF

16V

+1.8V_TU

FE_TS_CLK

+3.3V_TU

+1.8V_TU

1000pF

50V

0.1uF

16V

L605

1008CS-821XGLC

16V

C616

0.1uF
16V

C617

0.1uF

16V

+3.3V_TU

R636

R635

R644
R645 47

R643

47
47

47

47

VDDA_1

GND_1

GND_2

EXTCHOKE

GND_3
VDDA_2
VDDA_3
VDDC_1

GND_4
VDDC_2

1000pF

C618

IN1

IN2

0.1uF
C619

0.1uF

+1.2V_P

R634

4.7K

0.1uF
C620

50V

1
2
3
4
5
6
7
8
9
10
11
12

16V

16V

C621

16V

16V

0.1uF
C624

C622

16V

0.1uF

R610

4.99K
1%

VDDA_8

48

IC600

XC5000

13

15

16

17

VIF

VAGC

VDDC_314VDDA_4

VDDA_5

16V

0.1uF
C623

0.1uF

+3.3V_DVDD_P

16V

0.1uF
C626

16V

0.1uF
C627

16V

0.1uF
C629

VREF_N41VREF_P

VDDC_7

VDDC_844REXT45VDDA_746GND_947VDDC_9

40

42

43

18

19

20

SIF

GND_5

VDDC_421VDDA_6

16V

0.1uF
C628

C632

0.1uF

16V

16V

C625

TUNER_CVBS_IF_P

I2S_WS

1

VDDL_1

2

VSSL_1

3

GPIO1

4

MSTRT

5

MERR

6

VSSH_1

7

VDDH_1

8

MCLK

9

MVAL

10

MD0

11

MD1

12

MD2

13

MD3

14

VSSL_2

15

VDDL_2

16

R654

4.7K

16V

0.1uF
C631

RESET38VI2C39VDDC_6

37

36
35
34
33
32
31
30
29
28
27
26
25

22

23

24

GND_6

VDDD_1

TESTMODE

C633

0.1uF
16V

R611
1K

1/16W

C630

5%

0.1uF
16V

TUNER_SIF_IF_N

I2C_SCL2

I2S_CL

I2S_DA

62

63

64

17

19

MD420MD521MD622MD7

VSSH_218VDDH_2

OPT

R655

4.7K
OPT

16V

0.1uF
C639

16V

0.1uF
C638

+1.8V_TU

+3.3V_TU

C635

0.1uF

GND_8

16V
SDA
SCL
VDDD_2
EXTREF
X1
GND_7
X2
ADDRSEL
DDI2

C637

0.1uF

VDDC_5
DDI1

L606

LQH32MN2R2K23L

+3.3V_DVDD_P

1:C9

VSSL_456VDDL_457TDO58TMS59TCK60TDI61I2C_SDA2

IC601

DRX3913K-XK

23

25

VSSH_326VDDH_327VDDL_328VSSL_3

I2C_SCL124I2C_SDA1

R657

R656

100

100

10pF
C640

+3.3V_TU

10

R615

16V

IF_AGC

VDDH_454VSSH_4

53

55

50V

X600

31.875MHz

+1.8V_TU

C642

0.1uF
16V

VSSAH_OSC

VDDAH_OSC

52

29

31

VSYNC30GPIO2

SAW_SW

50V
10pF
C641

R616

2.7K

C643

18pF

50V

50V

C64 4

18p F

C636

C634

15pF

15pF

50V

50V

X601

20.25MHz

49XI50XO51

PDN

48

PDP

47

VDDAL_AFE2

46

VSSAL_AFE2

45

SIF

44

CVBS

43

VDDAH_CVBS

42

VSSAH_CVBS

41

INP

40

INN

39

VSSAH_AFE1

38

VDDAH_AFE1

37

VDDAL_AFE1

36

VSSAL_AFE1

35

IF_AGC

34

RF_AGC

33

32

RSTN

+3.3V_DVDD_P

C645
18pF
50V

Rev(9)
C152,155
18pF=>13pF=>15pF

C653 0.1uF

C654 0.1uF

R658

4.7K

R659

100

C647

0.1uF
16V

I2C Address : C2

Analog Supply Max Current(+3.3V/Operating ) : 250mA
(+1.8V/Operating ) : 75mA
Digital Supply Max Current ( +1.8V/Operating ) : 75mA

TUNER_RESET

20ms

Active Low

+3.3V_TU

R628

4.7K R629

100

R623

C646

R624

100

18pF
50V

+3.3V_AVDD_P

+1.2V_DVDD_P

R660

6.8K

C648

0.027uF

FE_RESET

4.7K

+3.3V_DVDD_P

C652

1000pF

50V

50V

C651

1000pF

IF_AGC

FE_TUNER_SDA

FE_TUNER_SCL

IF_P
IF_N

+1.0V BLOCK

+1.2V_P

L608
500

C655

10uF

10V

+3.3V_TU

C658

0.1uF
16V

FE_TS_VAL

FE_TS_ERR

+5V_GENERAL

C657

0.1uF
16V

+3.3V_P

16V

2.2uF
C662

+1.2V_DVDD_P

C659

0.1uF
16V

VIN

2

OPT
R637

EN

1K

1

C661

C663

22uF

0.1uF

10V

16V

IC604

AP1117E18G-13

IN

3

2

OUT

NC_1

R638
20K

VIN

C666

NC_2

1uF
10V

16V

2.2uF
C664

+3.3V_P

L610
500

C667
10uF

10V

IC602

SC156515M-1.8TR

3

GND

1

IC603

SC4215ISTRT

1

EN

2

3

4

IC605

NL17SZ08DFT2G

1 5

2

3

VO

4

R639

ADJ

5

R640

ADJ/GND

GND

8

ADJ

7

VO

6

NC_3

5

+3.3V_AVDD_P

C668

0.1uF
16V

4

+3.3V_P

1%

15K

1%

8.2K
C671

100uF

16V

GND

R642

V0 = 0.8(R1+R2) / R2

3.3V Block

+3.3V_P

L612

500

C674
10uF

R641

10V

C673
10uF

20K

10K

+3.3V_TU

C660

0.1uF
16V

R627

47

C675

0.1uF

10V

16V

FE_TS_VAL_ERR

+1.8V_TU

C679

C676

22uF

0.1uF
10V

16V

+1.2V_P

R2

R1

C677

C680

100uF

0.1uF

16V

16V

+3.3V_DVDD_P

C678

C683

0.1uF

0.1uF

16V

C685

0.1uF

16V

16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Tuner

FE_DEMOD_SCL

FE_DEMOD_SDA

OLED

Chip Tuner

09.08.31
5 9

+1.8V_AMP

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

L700

MLB-201209-0120P-N2

C700

10uF

10V
OPT

001:AA9

002:V8

+1.8V_AMP

L701

MLB-201209-0120P-N2

C702

0.1uF
16V

002:V8
002:V8

002:V8
001:L3;004:Y11
001:L3;004:Y11

AMP_RST

AUDIO_MASTER_CLK

R700

MS_LRCH
MS_LRCK

MS_SCK

SDA1
SCL1

C715

OPT

C71 2

1uF 25V

+1.8V_AMP

C711
10uF

10V

C710
33pF
50V

22000pF

BST1A
VDR1A
RESET

DVSS_1
VSS_IO

CLK_I

VDD_IO
DGND_PLL
AGND_PLL

AVDD_PLL
DVDD_PLL

TEST0

C714

0.1uF

C713
33pF
50V

50V

1
2
3

AD

4
5
6
7
8
9
10

LFM

11
12
13
14

16V

+3.3V

R701
100

C707

1000pF

50V

R703
0

C709

0.1uF

C708
1000pF

50V

C706

R702

100pF

0

OPT

C704

10uF

6.3V

50V

C705

0.1uF
16V

3.3K

R706 100
R704 100
R705 100
R707 100
R708 100

MCLK SDATA WCK BCK TP is necessory

Monitor0_1_2 TP is necessory

OUT1A_1

OUT1A_2

PGND1A_1

PGND1A_2

54

55

56

IC700

EAN60664001

NTP-3100L

15

16

17

WCK19BCK20SDA21SCL

DVDD

SDATA

DVSS_2

+24V_AMP

PVDD1A_1

PVDD1A_2

51

52

53

18

OUT1B_1

OUT1B_2

PVDD1B_1

PVDD1B_2

47

48

49

50

22

MONITOR_023MONITOR_124MONITOR_2

C72 3
1uF
25V

PGND1B_2

46

25

FAULT26VDR2B27BST2B

OPT

C722
33pF
50V

R709

C725

0.1uF
50V

C724
22000pF
50V

C726
1uF
25V

VDR1B44BST1B45PGND1B_1

43

42
41
40
39
38
37
36
35
34
33
32
31
30
29

28

PGND2B_1

33K

OPT

OPT

C727

0.1uF
50V

NC
VDR2A
BST2A
PGND2A_2
PGND2A_1
OUT2A_2
OUT2A_1
PVDD2A_2
PVDD2A_1
PVDD2B_2
PVDD2B_1
OUT2B_2
OUT2B_1
PGND2B_2

OPT

R711

R710

C72 8

0

0

C729

1uF25V

C730
22000pF

50V

10uF
35V

OPT
R714

3.3

C731

22000pF

50V

C733

0.01uF
50V

POWER_DET

1N4148W

1N4148W

1N4148W

1N4148W

+24V_AMP

C734

0.1uF
50V

D700

100V

OPT

D701

100V

OPT

D702

100V

OPT

D703

100V

OPT

R717

10K

Q700

2SC3052

C735

0.1uF
50V

+3.3V_ST

C

E

50V

50V

50V

For protect Peak noise

C752

0.01uF
50V

R728

R732

4.7K

3.3

R733

3.3

R729

C753

0.01uF

4.7K
50V

C754

0.01uF

R730

50V
R734

4.7K

3.3

R735

3.3

R731

C755

4.7K

0.01uF
50V

SPK_L+

007:AA18

SPEAKER_L

SPK_L-

007:AA18

SPK_R+

007:AA17

SPEAKER_R

007:AA17

SPK_R-

RF_IN&DC POWER

JK800

KCN-ET-2-0104

5

1

2

3

4

SHIELD

RF_IN

DC_GND

JP31

DC_POWER

JP32

RF_SHIELD

RF_IN

007:AG19

007:AG22

007:AG24

007:AG26

C880

0.047uF

+24V

SPK_R-

SPK_R+

SPK_L-

SPK_L+

POWER_ON

C760

0.1uF
50V

R743
10K

C761

2.2uF
50V

R742
27K

B

C

E

AO3407A

Q702

R740
22K

Q701

G

P701

SMW200-04

1

2

3

4

S

L702

CPI2520NHL3R3ME

D

C762

0.01uF
50V

AO3407A Vgs : 10.8V

C718
10uF
35V

+24V_AMP

C721

0.01uF
50V

L704

AD-8770

R718

5.6
C737

390pF

50V

C738
390pF

50V

R719

5.6

R720

5.6

C739
390pF

50V

C740
390pF

50V

R721

5.6

C741

10uF
35V

R726

B

10K

EAP60684501

2S

1S 1F

L705

AD-8770

EAP60684501

2S

1S 1F

AMP_MUTE

002:C25

2F

C745

0.47uF
50V

C746

0.47uF

2F

50V

C747

0.1uF

C748

0.1uF

C749

0.1uF

C750

0.1uF
50V

RS-232C

C716 0.33uF

C717

16V

C719

0.047uF

25V

C72 0

0.3 3uF

16V

0.33uF

C1+

V+

C1-

C2+

C2-

V-

DOUT2

RIN2

IC701

MAX3232CDR

1

2

3

4

5

6

7

8

+5V_ST

L703

BLM18PG121SN1D

R716

6.2K

1/10W

5%

R715

6.2K

1/10W

5%

C736

VCC

16

15

14

13

12

11

10

0.1uF
16V

GND

DOUT1

RIN1

ROUT1

DIN1

DIN2

ROUT2

9

R713

100

R712

100

DBG_RX

DBG_TX

220pF

C743

D704

ADUC30S03010L

30V

OPT

50V

50V
220pF
C744

D705
ADUC30S03010L
30V

OPT

RxD

TxD

P700

KJA-UB-0-0020

USB DOWN STREAM

1

2

3

4

5

6

USB

Serial Port

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

AUDIO/ADAPTER/232C

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

OLED 09.08.31

AUDIO 6 9

FROM ADAPTER TO MAIN BOARD

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

IC811

MP8670DN-LF-Z

SW

1

BST

2

$0.37

VCC

OPT

8

7

6

5

R805
10K

D8

D7

D6

D5

BG

+12V

CB3216UA121

C805

10uF

6.3V

3

4

4.7uH

SP-7850_4.7

B

L801

+3.3V_AVDD

L897

2SC3052

C806

0.01uF
25V

C810

0.1uF
16V

+5V_ST

Q801

+12V

R809

33K

C

Q800
2SC3052

E

+3.3V_ST

R810

10K

R811

10K

POWER_ON

+5V_GENERAL

C800
10uF
10V

22

5%

R954

1/16W

C971
1uF
25V

close to IC811

PANEL_POWER_ON

C801

0.1uF
16V

C970
1uF
50V

S1

S2

S3

G

R804
10K

OPT

R803

120K

IC800

AP1117E33G-13

3IN1

2

OUT

R956

4.7

IC812

Si4800BDY

1

2

$0.12

3

4

R801

30K

LOGIC_POWER_ON

ADJ/GND

C802
10uF

6.3V

8

7

6

5

10K

560

OPT

+3.3V

IN

EN/SYNC

FB

GND

R81 3

R80 6

C811

0.1uF
16V

R812
10K

2SC3052

C967

0.1uF
50V

R2

1%

1%

1/8W

Placed on SMD-TOP

C972
22uF
16V

C819
10uF
10V
OPT

G

Q807

AO3407A

+12V

470 K

30K

Q802

C815
22uF
16V

+12V

470 K

330 K

Q804

2SC3052

C821

C816

0.1uF

10uF

16V

10V

R1

6.8K
R951

1.6K

R952

C973
22uF
16V

S

D

C807

0.1uF
16V

R81 5

R81 6

R81 9

R82 0

IC801

AP1117E18G-13

3IN1

OUT

2

C969
10uF
35V

+12V

R894

GND

SW_1

SW_2

COMP

FB

IN

BS

C879

MP4460DQ-LF-Z

1

2

EN

3

4

FB

5

MP2212DN

1

2

3

4

100K

0.1uF

50V

IC893

11

THERMAL

$0.21

L894

3.6uH

NR8040T3R6N

R832

10K

C818100pF 50V

R826

39K 1%

IC803

R830

0

R831

10
1%

+5V_ST

Switching noise reducing [MPS recommend]

R893
200K

1/8W
1%

C853
1uF
16V

C896
10uF
10V

22

C855

0.1uF
50V

R895

L809

3.6uH

C859

EP_GND

BST

10

VIN_2

9

VIN_1

8

FREQ

7

GND

6

R1

EN/SYNC

8

SW_2

7

SW_1

6

VCC

5

C897
10uF
10V

22uF

10V

C809

3.3uF
50V

+1.8V_MEMC

+24V

C808

0.1uF
50V

1%

47K

R896

1/16W

C898

0.1uF
50V

C863

OPT

22uF

10V

Placed on SMD-TOP

Cout

R897
51K

1/16W
1%

R955
200K

1/16W
1%

+5V_ST

Vout=0.8*(1+R1/R2)

+1.8V for Saturn6 DDR

+24V

24V->12V

MBRA340T3G

R898

+5V_GENERAL

C846
22uF
10V

OPT

close to pin

L814

120-ohm

Close to IC

C843
22uF
10V

D802

C894
220pF
50V

R824

68K

1/16W

5%

+1.8V_MEMC for DDR

R827

R2

30K
1%

R953

10K

R950
120K

1%

L805

500

POWER_ON

C974

0.1uF
50V

+5V_GENERAL

C834
10uF
10V

+12V

Vout = ((R1+R2)X0.8)/R2

C837

0.1uF
16V

real output : 12.3V

18K

Vout=0.8*(1+R1/R2)

Placed on SMD-TOP

Cin

+5V_Normal

R858
10K

1%

+3.3V

R841

3.3K

C874

C875

0.1uF
16V

C877

0.47uF
25V

10uF

10V

R857

5.6K

1%

R854
100K

IC810

AOZ1073AIL

PGND

1

VIN

2

AGND

2A

3

FB

4

IC807

SC4215ISTRT

NC_1

1

EN

2

VIN

3

NC_2

4

R1/R2 : 27K / 20K => Vout=1.88
R1/R2 : 15K / 12K => Vout=1.80

R1/R2 : 12K / 9.1K => Vout=1.85

GND

8

ADJ

7

VO

6

NC_3

5

R856
47K

1%

+5V_EXT

L821

R848

9.1K
1%

18K

R853

C854
2200pF
50V

NR8040T3R6N

R847

12K
1%

3.6uH

+1.8V_DDR

C888
22uF

10V

C892

0.1uF
16V

C873

0.1uF
16V

C876
22uF
10V

LX_2

8

LX_1

7

EN

6

COMP

5

+1.26V Core for URSA

C822

1S2

2G2

3S1

4G1

ADJ/GND

C827

6.3V

1000pF
50V

Q806

AO4813

C824

10uF

1000pF
50V

8 D2_2

7 D2_1

6 D1_2

5 D1_1

+1.8V_AMP

C830

0.1uF
16V

+12V_PANEL

C829

0.1uF
16V

+12V_LOGIC

C832

0.1uF
16V

Placed on SMD-TOP

C IN

+5V_GENERAL

CIC21J501NE

C838
22uF
10V

S6 core 1.26V volt

C899

100pF

50V

L812

OPT
C842
22uF

10V

STAND-BY +3.3V

+5V_ST

R822
75K

1/8W

1%

C841
10uF
10V

R2

C844

0.1uF
16V

Replaced Part

IC805

MP2212DN

FB

1

GND

2

3A

IN

3

BS

4

IC804

AP1117E33G-13

3IN1

2

OUT

OPT

R823

10K

1/16W

R821

10

1/10W

1%

ADJ/GND

R890

22K 1%

Close to IC

8

7

6

5

R862 0

R1

EN/SYNC

SW_2

SW_1

VCC

C850
10uF

6.3V

C840
1uF

10V

+3.3V_ST

R825

22K 1%

C852

0.1uF
16V

+3.3V

NR8040T3R6N

C839

0.1uF
50V

R829

1/10W

10K

Vout=0.8*(1+R1/R2)

C891

0.47uF
25V

L816

3.6uH

+3.3V_ST

L810

120-ohm

L811

120-ohm

2026 mA

C849

C845
22uF

22uF

10V

Placed on SMD-TOP

+3.3V_AVDD_MPLL

C860

0.1uF
16V

+3.3V_HDMI_ST

C861

0.1uF
16V

BLM18SG121TN1D

OPT

+1.26V_VDDC

L895

C856

0.1uF

+1.8V_MEMC

+3.3V

+5V_GENERAL

L813

CIC21J501NE

Vout=0.8*(1+R1/R2)

C865
22uF
10V

Placed on SMD-TOP

+5V_GENERAL

1.5mA

C869

1uF
16V

L896

BLM18PG121SN1D

C868
10uF

6.3V

Placed on SMD-TOP

R1/R2 = 12K/20K => Vout=1.28

Close to IC

C866
560pF
50V

OPT

R836

C872

0.1uF
16V
OPT

C871
10uF

6.3V

18K

R2

1/10W

1%

D804

OPT

100V

1N4148W_DIODES

GND

R1

FB

IN

BS

VCNTL

R839

10K

R837

1/10W 1%

56K

IC806

MP2212DN

1

2

3

4

POK

VIN

R838

10

EN

1/10W

IC809

APE8953MP

8

7

6

5

C814

100pF

50V

8

7

6

5

1%

R844

1K

EN/SYNC

SW_2

SW_1

VCC

10V

C878
1uF

1

2

3

4

R842

0

GND

FB

VOUT_1

VOUT_2

R2

1%

1/1 0W

30K

R84 5

Placed on SMD-TOP

L817

3.6uH

NR8040T3R6N

C881

0.1uF
50V

C882

10uF

6.3V

1/1 0W

R84 6

600 mA

R852

1/10W

25V

0.01uF
C885

C883

0.1uF
16V

R1

33K

1%

Vout=0.8*(1+R1/R2)

+1.26V_MEMC

C887

C889

10uF

10uF

6.3V

6.3V

Placed on SMD-TOP

C884
22uF
10V

1%

27K

+3.3V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

POWER

OLED 09.08.31

Power 7 9

XTAL

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

R905 1M

+3.3V

+1.8V_MEMC

BLM18PG121SN1D

C902

+3.3V

VCC

HOLD

CLK

R908 56
R909 56

DIO

L901

10uF

M_XTALIM_XTALO

C90 3

C90 4

+1.26V_MEMC

+3.3V

R910 1K

R911 1K
OPT

0.1uF

C905

PI Result

C90 6

0.1 uF

0.1 uF

Placed on SMD-TOP

BLM18PG121SN1D

L903

MEMC_SDA
MEMC_SCL

10V

10uF

C908

10V

0.1uF

C911 10uF

C907

C909 22uF

Placed on SMD-TOP

URSA_DQM3
URSA_DQM2

URSA_DQS2

URSA_DQSB2

URSA_DQS3

URSA_DQSB3

URSA_MCLK

URSA_MCLKZ

URSA_ODT

0.1 uF

M_SPI_CK
M_SPI_DI

C910 10uF

22uF

C912

10V

0.1uF

C913 10uF

C915

R914 100
R915

C914

0.1uF
16V

URSA_DQ[20]
URSA_DQ[19]

URSA_DQ[17]
URSA_DQ[22]

URSA_DQ[0-31]

URSA_DQ[27]
URSA_DQ[28]

URSA_DQ[25]
URSA_DQ[30]

URSA_DQ[31]
URSA_DQ[24]

URSA_DQ[26]
URSA_DQ[29]

URSA_DQ[23]
URSA_DQ[16]
URSA_DQ[18]
URSA_DQ[21]

+3.3V

C917

0.1uF

100

LVDS_SEL

C916

0.1uF
16V

10K

10K

C921

0.1uF

PI Result

PI Result

R916

R917

C924

C926 0.1uF

C925

C923

C9190.1uF

0.1uF

C920

C91 8

0.1 uF

C930

C927

10uF 10V

C931 0.1uF

C932

0.1uF

0.1uF

C928

0.1uF

C929 0.1uF

0.1uF

0.1uF

1uF

C922

10uF

C93 3

0.1 uF

SPI FLASH

M_SPI_CZ
M_SPI_DO

C900

20pF

R903

OPT

R904 1K

R900 56
R901 56
R902 10K

X900

12MHz

+3.3V

R906

OPT

R907 1K

+3.3V

W25X20AVSNIG

CS

1

DO

2

WP

3

GND

4

C901
20pF

IC900

8

7

6

5

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

PI Result

C93 4

0.1 uF

GPIO[10]
GPIO[11]
GPIO[12]
GPIO[13]
GPIO[22]
GPIO[23]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]
GPIO[18]
GPIO[19]
GPIO[20]
GPIO[21]

MDATA[20]
MDATA[19]

MDATA[17]
MDATA[22]

MDATA[27]
MDATA[28]

MDATA[25]
MDATA[30]

AVDD_DDR_2

AVDD_DDR_4

AVDD_DDR_5

MDATA[31]
MDATA[24]

MDATA[26]
MDATA[29]

AVDD_DDR_6

MDATA[23]
MDATA[16]
MDATA[18]
MDATA[21]

MCLKZ[0]

AVDD_MEMPLL

C93 5

0.1uF

C93 7

SDAS

SCLS
GPIO[8]
GPIO[9]

GND_14
VDDC_1

VDDP_2

GND_7

GND_15

VDDC_2

DQM[3]
DQM[2]
GND_10
DQS[2]

DQSB[2]

VDDP_3

GND_8

DQS[3]

DQSB[3]

GND_11

MCLK[0]

GND_1

MVREF

C93 6

0.1uF

ODT

0.1 uF

C93 8

0.1uF

E1
D1
F1
G1
K8
E5
E2
F2
F3
G2
M4
M5
G3
E4
F4
G4
H4
J4
K4
L4
J6
H9
K9

F6
H1
H2

H3
J1

J2
J3

K1
K2
K6
K3
L1
J8
L2
L3
L6
L8
H10
M1
M2
L7
M3
N1
J9
N2
N3
L10
P1
R1
T1
T2
R2
P2
G7
L9
N5
N4

MEMC_RXE4+

T3

RASZR3CASZ

0.1uF

URSA_RASZ

URSA_CASZ

MEMC_RXE3+

MEMC_RXE3-

MEMC_RXEC+

MEMC_RXE4-

P3

J10

GND_12

MADR[0]T4MADR[2]R4MADR[4]

C93 9

0.1uF

URSA_A[0]

URSA_A[2]

URSA_A[4]

MEMC_RXE2+

MEMC_RXE2-

MEMC_RXEC-

[E1]
[D1]

[N5]

P4

R5

MADR[6]T5MADR[8]

MADR[11]

C94 0

URSA_A[6]

URSA_A[8]

URSA_A[11]

MEMC_RXE1+

MEMC_RXE1-

[L9]

[N4]

P5

T6

WEZ

BADR[1]R6BADR[0]P6MADR[1]

URSA_WEZ

URSA_BA1

URSA_BA0

MEMC_RXE0+

MEMC_RXE0-

R918

100

R919

100

R920

100

R921

100

R922

100

R923

100

C94 1

AVDD_LVDS_1

RE0NA4RE0PC4RE1NC3RE1PA3RE2NB3RE2PB2RECKNA2RECKPC2RE3NC1RE3PA1RE4NB1RE4P

B4

F11

T7

L11

MADR[10]

AVDD_DDR_7

URSA_A[1]

URSA_A[10]

MEMC_RXO4-

MEMC_RXO3+

MEMC_RXO4+

0.1 uF

R7

T8

MADR[5]P7MADR[9]

MADR[12]

URSA_A[5]

URSA_A[9]

URSA_A[12]

MEMC_RXO1-

MEMC_RXO1+

MEMC_RXOC-

MEMC_RXOC+

MEMC_RXO2+

MEMC_RXO3-

MEMC_RXO2-

LGE7329A

R8

N8

K10

T9

MCLKE

GND_16F7VDDC_3

C94 2

URSA_MCLKE

URSA_A[0-12]

GND_13

MDATA[4]R9MDATA[3]

0.1 uF

URSA_DQ[4]

URSA_DQ[3]

MADR[7]P8MADR[3]

URSA_A[7]

URSA_A[3]

MEMC_RXO0-

MEMC_RXO0+

R924

100

R925

100

R926

100

R927

100

R928

100

R929

100

C94 3

0.1 uF

GPIO_14

GPIO_13

GND_5

AVDD_LVDS_2

RO0NA8RO0PC8RO1NC7RO1PA7RO2NB7RO2PB6ROCKNA6ROCKPC6RO3NC5RO3PA5RO4NB5RO4PH8GND_6

H7

B8

K16

K15

G11

IC901

K7

P9

T10

K11

R10

P10

MDATA[1]

MDATA[6]

MDATA[11]

MDATA[12]

AVDD_DDR_3

URSA_DQ[1]

URSA_DQ[6]

URSA_DQ[11]

URSA_DQ[12]

M_XTALO

M_XTALI

+3.3V

GPIO_2D3XIND4XOUT

B14

T11

R11

MDATA[9]

MDATA[14]

URSA_DQ[9]

URSA_DQ[14]

SCLMD5SDAM

GPIO_1

D6

A14

J11

P11

T12

DQM[1]

DQM[0]

AVDD_DDR_1

URSA_DQM1

URSA_DQM0

C94 4

GPIO_9

GPIO_12

GPIO[25]

N7

E11

R12

DQS[0]

DQSB[0]

URSA_DQS0

1uF

C945

0.1 uF

AVDD_PLL

GND_2

GPIO_8

G8

D11

D13

P12

H11

J7

GND_9

VDDP_1

C94 6

URSA_DQSB0

F10

T13

DQS[1]

URSA_A+[0]

URSA_A-[0]

URSA_A+[1]

R13

DQSB[1]

MDATA[15]

0.1 uF

URSA_DQ[15]

URSA_DQS1

URSA_DQSB1

URSA_A-[1]

URSA_A+[2]

LVA2P

LVA1MC9LVA1PA9LVA0MB9LVA0P

A10

C10

P13

T14

MDATA[8]

URSA_DQ[8]

URSA_ACK+

URSA_ACK-

URSA_A-[2]

URSA_A+[3]

LVA3P

LVACKM

LVACKP

LVA2M

A11

B11

B10

R14

P14

T15

MDATA[7]

MDATA[10]

MDATA[13]

C94 7 0.1u F

URSA_DQ[10]

URSA_DQ[13]

URSA_DQ[7]

URSA_A-[3]

LVA4P

LVA3M

A12

C12

C11

R15

P15

MDATA[0]

MDATA[2]

URSA_DQ[0]

URSA_DQ[2]

URSA_B+[0]

LVB0PD7GPIO_4D9GPIO_6

LVA4M

B12

[N13]
[N12]

T16

R16

P16

MCLK[1]

MDATA[5]

MCLKZ[1]N9GPIO[26]

URSA_DQ[5]

URSA_MCLK1

URSA_MCLKZ1

URSA_B-[0]

URSA_B+[1]

LVB1P

LVB0M

C13

A13

B13

N10

N11

GND_17

GPIO[27]

R930

URSA_DQ[0-31]

URSA_B-[1]

REXT

LVB1M

D12

C14

D10
E10

C15
B15
A15
A16
B16
C16
D15
D16

G10
E15
E16
E14
F14
F16
F15
G15
G16
G14
H14
H16
H15
J15
J16
J14
K14

L14
L15
L16
M16

M15
M14
N16
N15

E12
D14
F12
E13
F13
G13
H13
J13
K12
L12
K13
M12
M13
L13
N14

N13
N12

M11

G6

RESET

VDDC_4

0

D8

E3
D2

F9

G9

F8

H6
N6

R931

820

GPIO_5
GPIO_7
GPIO_11
GPIO_10
GPIO_3
LVB2P
LVB2M
LVBCKP
LVBCKM
LVB3P
LVB3M
LVB4P
LVB4M
AVDD_33_2
GND_4
LVC0P
LVC0M
LVC1P
LVC1M
LVC2P
LVC2M
LVCCKP
LVCCKM
LVC3P
LVC3M
LVC4P
LVC4M
LVD0P
LVD0M
LVD1P
LVD1M

GND_3
LVD2P
LVD2M
LVDCKP
LVDCKM
AVDD_33_1
LVD3P
LVD3M
LVD4P
LVD4M

VDDC_5
GPIO[24]
GPIO[7]
GPIO[6]
GPIO[5]
GPIO[4]
GPIO[3]
GPIO[2]
GPIO[1]
GPIO[0]
PWM0
PWM1
CSZ
SDO
SDI
SCK
GPIO[30]
GPIO[29]
GPIO[28]

C94 8

P900

TF05-51S

+3.3V

R939

4.7K
1:AO17

PANEL_RESET

+3.3V

C950

10uF

C951

10uF

C952 10uF

C957

0.1uF

C953

0.1uF

C956

0.1 uF
URSA_B+[2]

URSA_B-[2]

URSA_BCK+

URSA_BCK­URSA_B+[3]
URSA_B-[3]

C954

0.1uF

C955

0.1uF

C949

0.1uF

OPT

+3.3V

0.1 uF

100

R932

R934

R935

R933

10K

+3.3V

1K

1K

R936

R937

LVDS_SEL
1:AO32

1K

1K

OPT

LVDS_SEL

MEMC_RESET

I2C

EEPROM

SPI

M_SPI_CZ
M_SPI_DO
M_SPI_DI
M_SPI_CK

GPIO8

HIGH

HIGH

HIGH

HIGH

DISM
(JEIDA)

+12V_LOGIC

0.8A(Typ)

L907

120OHM

C959

0.1uF
16V

1:Z22

OLED

R938

1K

LOW

LG
(VESA)

C960

1000pF

C961

50V

10uF 16V

PWM1 PWM0

LOW

HIGH

HIGH

LOW

HIGH HIGH

Q900
2SC3052

+12V_PANEL

3.4A[300nit](Typ)

L908

120OHM

16V

C963

C962

0.1uF

OPT

30V

SDA2

D808

SCL2

URSA_B-[3]

URSA_B+[3]

URSA_BCK-

URSA_BCK+

URSA_B-[2]

URSA_B+[2]

URSA_B-[1]

URSA_B+[1]

URSA_B-[0]

URSA_B+[0]

URSA_A-[3]

URSA_A+[3]

URSA_ACK-

URSA_ACK+

URSA_A-[2]

URSA_A+[2]

URSA_A-[1]

URSA_A+[1]

URSA_A-[0]

URSA_A+[0]

C964

16V

10uF

R940

R941 0

D809

OPT

30V

0

50V

1000pF

CONTACT TO MODULE FOR EMI

M1

MDS62110207

M2

MDS62110207

M3

MDS62110207

M4

MDS62110207

M5

MDS62110207

M6

MDS62110207

09.08.31

JP1

JP8

FRC / LVDS

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

98

C1000

Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

0.1uF

C1001

PI Result

DDR2 1.8V By CAP - Place these Caps near Memory

0.1uF

C1018

0.1uF

C1019

+1.8V_FRC_DDR

0.1uF

+1.8V_MEMC +1.8V_FRC_DDR

BLM18PG121SN1D
L1000

0.1uF

0.1uF

C1002

C1003

0.1uF
C1004

C1014

0.1uF

10uF

C1006

C1007

0.1uF

C1008

C1009

0.1uF

C1010

C1005

10uF 10V

0.1uF

0.1uF

C1011

0.1uF

C1012

0.1uF

C1013

0.1uF

10uF

C1015

0.1uF

C1016

0.1uF

C1017

C1020

0.1uF

C1022

0.1uF

C1024

0.1uF
C1025

resonance Compensation

+1.8V_FRC_DDR

C1038

C1031

10uF

C1032

0.1uF

C1033

0.1uF

C1034

0.1uF

C1029

C1027

C1026

10uF

0.1uF

10uF 10V

C1028

0.1uF

0.1uF

C1030

0.1uF

C1035

0.1uF

C1036

0.1uF

C1037

0.1uF

0.1uF

C1039

0.1uF

C1040

C1041

0.1uF

0.1uF

C1042

0.1uF

+1.8V_MEMC

C1045

0.1uF
C1046

0.1uF

C1047

0.1uF

C1048

0.1uF

C1049

C1050

0.1uF

+1.8V_FRC_DDR

C1051

0.1uF

0.1uF

C1052

0.1uF

URSA_DQ[0-31]

URSA_DQ[27]
URSA_DQ[28]
URSA_DQ[25]
URSA_DQ[30]

URSA_DQ[22]

URSA_DQ[19]
URSA_DQ[20]

URSA_DQ[31]
URSA_DQ[24]
URSA_DQ[26]

URSA_DQ[23]

URSA_DQ[18]
URSA_DQ[21]

56

56

56

56

AR1000

AR1001

AR1002

AR1003

DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[25]
DDR_DQ[30]

DDR_DQ[22]
DDR_DQ[17]URSA_DQ[17]
DDR_DQ[19]
DDR_DQ[20]

DDR_DQ[31]
DDR_DQ[24]
DDR_DQ[26]
DDR_DQ[29]

DDR_DQ[23]
DDR_DQ[16]
DDR_DQ[18]
DDR_DQ[21]

+1.8V_FRC_DDR

DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]

DDR_DQ[16-31]

DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VDD5
VDD4
VDD3
VDD2
VDD1

VDDQ10

VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1

VSS5
VSS4
VSS3
VSS2
VSS1

VSSQ10

VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1

DQ0

G8

DQ1

G2

DQ2

H7

DQ3

H3

DQ4

H1

DQ5

H9

DQ6

F1

DQ7

F9

DQ8

C8

DQ9

C2
D7
D3
D1
D9
B1
B9

A1
E1
J9
M9
R1

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A3
E3
J3
N1
P9

B2
B8
A7
D2
D8
E7
F2
F8
H2
H8

IC1000

H5PS5162FFR-S6C

A_URSA_RASZ
A_URSA_CASZ

R1012 22

R1013 22

A_URSA_MCLKE

R1014 22

R1015 56

R1016 56

R1017 56
R1018 56

R1019 56

R1020 56

+1.8V_FRC_DDR

R1021

1K1%

R1022

1K1%

DDRA_A[0-12]

A_URSA_BA0
A_URSA_BA1

+1.8V_FRC_DDR

C1043

C1044

0.1uF
1000pF

DDRA_A[0]
DDRA_A[1]
DDRA_A[2]
DDRA_A[3]
DDRA_A[4]
DDRA_A[5]
DDRA_A[6]
DDRA_A[7]
DDRA_A[8]
DDRA_A[9]
DDRA_A[10]URSA_DQ[16]
DDRA_A[11]
DDRA_A[12]

150

R1023

A10/AP

OPT

H5PS5162FFR-S6C

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3
M2

A11

P7

A12

R2

BA0

L2

BA1

L3

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC4

L1

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

IC1001

URSA_DQ[0-31]

AR1014

DDR_DQ[15]
DDR_DQ[8]
DDR_DQ[10]

DQ0

DDR_DQ[0]

G8

DQ1

DDR_DQ[1]

G2

DQ2

DDR_DQ[2]

H7

DQ3

DDR_DQ[3]

H3

DQ4

DDR_DQ[4]

H1

DQ5

DDR_DQ[5]

H9

DQ6

DDR_DQ[6]

F1

DQ7

DDR_DQ[7]

F9

DQ8

DDR_DQ[8]

C8

DQ9

DDR_DQ[9]

C2

DQ10

DDR_DQ[10]

D7

DQ11

DDR_DQ[11]

D3

DQ12

DDR_DQ[12]

D1

DQ13

DDR_DQ[13]

D9

DQ14

DDR_DQ[14]

B1

DQ15

DDR_DQ[15]

B9

VDD5

A1

VDD4

E1

VDD3

J9

VDD2

M9

VDD1

R1

VDDQ10

A9

VDDQ9

C1

VDDQ8

C3

VDDQ7

C7

VDDQ6

C9

VDDQ5

E9

VDDQ4

G1

VDDQ3

G3

VDDQ2

G7

VDDQ1

G9

VSS5

A3

VSS4

E3

VSS3

J3

VSS2

N1

VSS1

P9

VSSQ10

B2

VSSQ9

B8

VSSQ8

A7

VSSQ7

D2

VSSQ6

D8

VSSQ5

E7

VSSQ4

F2

VSSQ3

F8

VSSQ2

H2

VSSQ1

H8

DDR_DQ[0-15]

+1.8V_FRC_DDR

DDR_DQ[13]

DDR_DQ[7]
DDR_DQ[0]
DDR_DQ[2]
DDR_DQ[5]

DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[9]
DDR_DQ[14]URSA_DQ[29]

DDR_DQ[6]
DDR_DQ[1]
DDR_DQ[3]
DDR_DQ[4]

AR1015

AR1016

AR1017

URSA_DQ[15]

56

URSA_DQ[8]
URSA_DQ[10]
URSA_DQ[13]

URSA_DQ[7]

URSA_DQ[0]

56

URSA_DQ[2]

URSA_DQ[5]

URSA_DQ[11]

56

URSA_DQ[12]

URSA_DQ[9]
URSA_DQ[14]

URSA_DQ[6]

56

URSA_DQ[1]

URSA_DQ[3]

URSA_DQ[4]

+1.8V_FRC_DDR

1K1%

R1001

AR1008

AR1009

URSA_A[0-12]

URSA_A[3]
URSA_A[1]
URSA_A[10] DDRA_A[10]

URSA_A[12]
URSA_A[7]
URSA_A[5]
URSA_A[2]
URSA_A[0]
URSA_A[6]
URSA_A[4]

URSA_RASZ

URSA_CASZ

URSA_A[8]
URSA_A[11]

009:AB4

009:AB4

010:Q14;009:J10

010:X16
010:X16

010:V8

009:X4
009:Y4

009:X4
009:W4

009:X4
009:Y4

URSA_BA0
URSA_BA1
URSA_MCLKE
URSA_WEZ

22

A_URSA_BA0
A_URSA_BA1
A_URSA_MCLKE
A_URSA_WEZ

22

AR1011

22

AR1012

22

AR1013

22

AR1010

22

URSA_MCLK1

URSA_MCLKZ1

010:V9

URSA_ODT

A_URSA_RASZ
A_URSA_CASZ

A_URSA_WEZ

URSA_DQS0
URSA_DQS1

URSA_DQM0
URSA_DQM1

URSA_DQSB0
URSA_DQSB1

010:T9;009:S4
010:T9;009:R4
010:T9;009:T4
010:T8;009:R4

010:AA15
010:AA15

010:Z14
010:Y13

DDRA_A[3]
DDRA_A[1]

DDRA_A[9]URSA_A[9]

DDRA_A[12]

DDRA_A[5]
DDRA_A[2]
DDRA_A[0]
DDRA_A[6]
DDRA_A[4]

DDRA_A[8]
DDRA_A[11]

1K 1%

R1002

C1023

0.1uF

C1021

1000pF

VREF

J2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12

BA0
BA1

CK
CK
CKE

ODT
CS
RAS
CAS
WE

LDQS
UDQS

LDM
UDM

LDQS
UDQS

NC4
NC5
NC6

NC1
NC2
NC3

VSSDL

VDDL

DDRB_A[0]
DDRB_A[1]
DDRB_A[2]
DDRB_A[3]
DDRB_A[4]
DDRB_A[5]
DDRB_A[6]
DDRB_A[7]
DDRB_A[8]

DDRB_A[9]
DDRB_A[10]
DDRB_A[11]
DDRB_A[12]

OPT

R1000

+1.8V_FRC_DDR

DDRB_A[0-12]

B_URSA_BA0
B_URSA_BA1

R1003 22

150

R1004 22

R1005 22

R1006 56
R1007 56

R1008 56
R1009 56

R1010 56
R1011 56

DDRB_A[10]
DDRB_A[1]
DDRB_A[3]
DDRB_A[9]
DDRB_A[12]
DDRB_A[7]
DDRB_A[5]
DDRB_A[0]
DDRB_A[2]
DDRB_A[4]
DDRB_A[6]

B_URSA_RASZ
B_URSA_CASZ

DDRB_A[11]
DDRB_A[8]

010:Q14
010:Q13

010:V10;009:S4
010:V10;009:R4

010:V10;009:T4

010:V10;009:R4

URSA_MCLK

URSA_MCLKZ
B_URSA_MCLKE

URSA_ODT

B_URSA_RASZ
B_URSA_CASZ
B_URSA_WEZ

URSA_DQS2
URSA_DQS3

URSA_DQM2
URSA_DQM3

URSA_DQSB2
URSA_DQSB3

AR1004
22

AR1005
22

AR1006
22

AR1007

22

009:J11

009:J10

010:T10

010:Y14;009:J10

010:R16
010:R16
010:T10

009:J14
009:J13

009:J15
009:J15

009:J14
009:J13

B_URSA_BA0
B_URSA_BA1

B_URSA_MCLKE

B_URSA_WEZ

URSA_BA0
URSA_BA1

URSA_MCLKE

URSA_WEZ

URSA_A[10]

URSA_A[1]

URSA_A[3]

URSA_A[9]

URSA_A[12]

URSA_A[7] DDRA_A[7]
URSA_A[5]
URSA_A[0]
URSA_A[2]
URSA_A[4]
URSA_A[6]

URSA_RASZ
URSA_CASZ

URSA_A[11]

URSA_A[8]

M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2

L2
L3

J8
K8
K2

K9
L8
K7
L7
K3

F7
B7

F3
B3

E8
A8

L1
R3
R7

A2
E2
R8

J7

J1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

OLED 09.08.31

FRC DDR2

99