Lenovo Y510 Schematics
A
B
C
D
E
2003/01/03
B2M Block Diagram
4 4
Mobile CPU
CLK GEN.
ICS 94239
34, 5
P4-M
P4-M Celeron
HOST BUS
DDR*2
266MHz
9,10
3 3
AUDIO
BOARD
Line
In/Mic
In
2 2
VR
AC'97
CODEC
CS4299XQ
AC-Link
26
GMCH
Montara-GML
Northwood
HUB I/F
ICH4-M
G768D
100MHz
RGB
LVDS
TV_OUT
6,7,8
66MHz
PCI BUS
25/B/1
AGERE1394
19/F/0
Project Code 91.49T01.001
M/B 48.45Z01.0SC 02216-SC
CRT
17
CARDBUS
CB 1410
23
FW32304
22
CONN
LCD
XGA/SXGA+
TV_OUT
CH7011
PWR SW
OZ2210S
1394
CONN
12
11
13
CARDBUS
ONE SLOT
23 23
22
SC
CPU DC/DC
MAX1718/1887
CM2843ACIM25
INPUTS
DCBATOUT
OUTPUTS
+VCC_CORE
1.3V 44A
+VID
1.2V 0.3A
LAN
RTL 8100BL
Line Out
(SPDIF)
OP AMP
APA2020
27
21/D/4
LPC BUS
14,15,16
MODEM
INT.SPKR
1 1
MDC Card
19
A
PIDE
HDD
NS SIO
Audio
D.J.
PC87392
USB
18
CD ROM
18
B
3PORT
19
PRN
Port
33
C
20,21
FIR
31
KBC
M38859
TRACK
POINT
Mini-PCI
802.11&BlueTooth
22//C/E/2
FWH
4MB
PLCC32
SOIC40
30 30
24
29 293031
INT KB
D
LPC
DEBUG
CONN.
SD CARD
READER
W83L518D-VD6
Title
Size Document Number Rev
Custom
Date: Sheet
32
BLOCK DIAGRAM
SYSTEM DC/DC
MAX1631
INPUTS
DCBATOUT
SYSTEM DC/DC
MAX1715
INPUTS OUTPUTS
34
DCBATOUT
34
SI3012
2D5V_S3 1D5V_S0
LP2995
MAXIM CHARGER
MAX1645
DCBATOUT
PCB LAYER
L1:
L2:
L3:
L4:
L5:
L6:
L7:
L8:
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
B2M
E
OUTPUTS
5V_S5
5V_S3
5V_S0
3D3V_S5
3D3V_S3
3D3V_S0
3D3V_LANAC
2D5V_S3
1D2V_S0
1D25V_S02D5V_S3
OUTPUTSINPUTS
BT+
18V 4.0A
UP+5V
5V 100mA
Signal 1
GND
Power
VCC
Signal 3
GND
Signal 4
Signal 5
of
143Friday, January 10, 2003
36
35
35
35
37
SC
1D5V_S0
1D5V_S0 7,8,13,14,16,29,35
1D5V_S5
VCC_RTC_S5
3D3V_S0
3D3V_S3
3D3V_S5
5V_S0
5V_S3
5V_S5
5VA_AUD_S0
5V_USB1_S0
LCDVDD
5V_CRT_S0
AD+
DCBATOUT
ICH_VBIAS
RTC_AUX_S5
MAX1631_VL
FAN1_VCC
1D5V_S5 16,36
VCC_RTC_S5 15
3D3V_S0 3,4,7,8,9,11,12,13,14,15,16,17,18,19,20,22,23,24,26,29,31,32,34,39,42
3D3V_S3 11,19,26,30,39
3D3V_S5 5,14,15,16,23,26,36,38,39,41
5V_S0 11,12,15,16,17,18,19,23,24,25,26,29,30,31,32,33,34,38,39
5V_S3 30,35,39,40
5V_S5 11,16,27,36,39
5VA_AUD_S0 26,27,42
5V_USB1_S0 19
LCDVDD 11
5V_CRT_S0 12
AD+ 17,37,38,40
DCBATOUT 11,17,34,35,36,37,39,41
ICH_VBIAS 15
RTC_AUX_S5 15
MAX1631_VL 36
FAN1_VCC 17
VCC_ASKT_S0
VPP_ASKT_S0
1394_AVDD
5V_USB0_S0
VCC_ASKT_S0 23
VPP_ASKT_S0 23
1394_AVDD 22
5V_USB0_S0 19
PCI DEVICE RESOURCE ASSIGNMENT
BUS DEVICE
LAN
CardBus
VIA1394
MiniPCI
1
1
1
1
5
9
3
6
IDSEL PCI_REQ# PCI_GNT# INT_IRQ#
PCI_AD21
PCI_AD25
PCI_AD19
PCI_AD22
REQ#4
REQ#1
REQ#0
REQ#2
GNT#4
GNT#1
GNT#0
GNT#2
IRQD#
IRQB#
IRQF#
IRQC# / IRQE#
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Table of Content / HISTORY
Size Document Number Rev
A3
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
B2M
243Friday, January 10, 2003
of
SC
R117 33R2
PCLK_CARD32
PCLK_MINI24
CLKPCIF_ICH14
PCLK_139422
PCLK_DEBUGBD29
PCLK_LAN20
PCLK_KBC30
PCLK_FWH29
PCLK_PCM23
PCLK_SIO31
CLKH_CPU#4
CLKH_MCH#6
CLKH_ITP#4,5
CLKH_CPU4
CLKH_MCH6
CLKH_ITP4,5
CLOSE TO CLOCK GEN.
VCORE_PWRGD6,15,34
VGATE_PWRGD6,15
1 2
R118 33R2
1 2
R119
1 2
R120 33R2
1 2
R121 33R2
1 2
R122 33R2
1 2
R123 33R2
1 2
R124 33R2
1 2
R125 33R2
1 2
R126 33R2
1 2
R82 33R2
R58 49D9R3F
1 2
R84 33R2
R60 49D9R3F
1 2
R62 49D9R3F
1 2
R57 49D9R3F
1 2
R59 49D9R3F
1 2
R61 49D9R3F
1 2
R86 33R2
R81 33R2
R83
R85 33R2
R725 DUMMY-R2
1 2
1 2
R726 0R2-0
33R2
1 2
1 2
1 2
1 2
1 2
1 2
PCLKR_MINI
33R2
3D3V_S0
147
1 2
U8A
TSLCX14-U
CLKPCIFR_ICH
PCLKR_1394
PCLKR_DEBUGBD
PCLKR_LAN
PCLKR_KBC
PCLKR_FWH
PCLKR_PCM
PCLKR_SIO
CLKH_CPU#L1
CLKH_MCH#L1
CLKH_ITP#L1
CLKH_CPUL1
CLKH_MCHL1
CLKH_ITPL1
CKG_CLKEN#
VCCA_CKG
VCCA_CKG48
VCCD_CKG
SC
Functionality
BIT CPUCLK 3V66
66Buff[2:0]
3V66[4:2] 3V66_5
FS2 FS1 FS0 MHz MHz MHz MHz MHz
000
1
0
0
1
0
0
1
1
1
1
0
1
1
00
1
0
0
1
1
1
66.66 66.66
100.00
66.66
200.00
66.66
133.33
66.66
66.66
66.66
100.00
66.66
200.00
66.66
133.33
66.66
66.66
66.66
66.66
66.66
66MHz_IN
66MHz_IN
66MHz_IN
66MHz_IN
66MHz_IN
33.33
33.33
33.33
33.33
Input
Input
Input
Input
PCICLK_F
PCICLK
33.33
33.33
33.33
33.33
66MHz_IN/2
66MHz_IN/2
66MHz_IN/2
66MHz_IN/2
CLKGEN_X2
X3
X-14D318MHZ-1-U
CLKGEN_X1
U14
2
X1
3
X2
5
PCICLK_F0
6
PCICLK_F1
7
PCICLK_F2
10
PCICLK0
11
PCICLK1/E_PCICLK1
12
PCICLK2
13
PCICLK3/E_PCICLK3
16
PCICLK4
17
PCICLK5
18
PCICLK6
51
CPUCLKC0
48
CPUCLKC1
44
CPUCLKC2
52
CPUCLKT0
49
CPUCLKT1
45
CPUCLKT2
28
VTT_PWRGD#
1
VDDREF
26
VDDA
37
VDD48
8
VDDPCI
14
VDDPCI
32
VDD3V66
19
VDD3V66
46
VDDCPU
50
VDDCPU
ICS94239CG
PM_SLP_S3#15,16,26,30,35,38,39,41
PM_SLP_S1#15,38
C62
1 2
R98
DUMMY-C2
DUMMY-R2
1 2
1 2
E_PCICLK1/3 w/ 10K internal
pull-down to GND
C512
SCD1U16V
C451
SCD1U16V
C74
1 2
DUMMY-C2
* 10K internal
pull-down to
GND
HOST SWING CONFIG, page3
Voh = 1v with
Rref = 221 1%, MULTSEL = 0
Voh = 0.7v with
Rref = 475 1%, MULTSEL = 1
C449
SCD1U16V
C510
SCD1U16V
66MHZ_OUT0/3V66_2
66MHZ_OUT1/3V66_3
66MHZ_OUT2/3V66_4
66MHZ_IN/3V66_5
* 120K internal
pull-up to VDD
FS3/48MHZ_USB
FS4/3V66_1/VCH_CLK
PD# mode : 40mA
active mode
:280mA
U72
1
A
2
B
GND3Y
NC7SZ08-U
1 2
C508
SCD1U16V
VCCD_CKG
C448
SCD1U16V
C509
SCD1U16V
PD#
CLK_STOP#
PCI_STOP#
MULTSEL
SDATA
SCLK
FS0
FS1
FS2
FS5/3V66_0
48MHZ_DOT
IREF
REF
GND
GND
GND
GND
GND
GND
GND
GND
GND
5
VCC
4
R512
DUMMY-0R3-0-U
C89
SCD1U16V
C511
SCD1U16V
C75
SCD1U16V
21
22
23
R75 DUMMY-R3
1 2
24
25
CKGPD#
STPCPU#
53
STPPCI#
34
43
CKG_MULTSEL
SMBD_ICH
29
SMBC_ICH
30
CKG_FS0
54
CKG_FS1
55
40
CKG_FS2
39
CLK48_ICHL1/FS3
CLK_VCH/FS4
35
CLK66_CKG0/FS5
33
38
CLK48_FPTL1
CKG_IREF
42
56
CLK_14M
4
9
15
20
27
31
36
41
47
3D3V_S0
PM_SLP_S1#_1
1 2
C87
SC4D7U10V5ZY
CLK66_MCHL1
CLK66_ICHL1
ZZ.DUMMY.XR3
12
R78 33R2
1 2
R79 33R2
1 2
L15 0R5
C446
SC4D7U10V5ZY
SC
R127 47R2
1 2
R128 33R2
1 2
R129 33R2
12
R130
0R3-0-U
63.00000.001
SMBD_ICH 9,11,15,25,38
SMBC_ICH 9,11,15,25,38
R87 33R2
1 2
R88 33R2
1 2
3D3V_S0VCCA_CKG
L120R5
1 2
1 2
CLK66_LVDS1
R72
475R3F
300 ohm@100MHz
600mA
PM_SLP_S1#_1
12
R392
0R3-0-U
63.00000.001
R71 1KR3
R80
1 2
DUMMY-R2
CLK48_ICH 14
CLK48_DAC 7
CLK14_ICH 15
CLK14_SIO 31
3D3V_S0
300 ohm@100MHz
600mA
PACKAGE 0805
CLOSE TO CHIP SIDE.
1 2
C97 SC5P
1 2
C98 DUMMY-C3
ZZ.DUMMY.XC3
1 2
C99 DUMMY-C3
ZZ.DUMMY.XC3
PM_STPCPU# 15,34
63.00000.001
R396 0R3-0-U
12
PM_STPPCI# 15
1 2
CLK48_ICHL1/FS3
CLK_VCH/FS4
CLK66_CKG0/FS5
C450
SCD1U16V
3D3V_S0
R389 0R3-0-U
H_BSEL04
H_BSEL14
R73
1 2
DUMMY-R3
ZZ.DUMMY.XR3
R74
1 2
DUMMY-R3
ZZ.DUMMY.XR3
R76
1 2
DUMMY-R3
ZZ.DUMMY.XR3
Title
Size Document Number Rev
Custom
Date: Sheet of
1 2
1 2
R394 0R3-0-U
C57
SCD1U16V
VCCD_CKG
VCCD_CKG
VCCD_CKG
Clock Generator - ICS94239C
CLK66_MCH 7
CLK66_ICH 14
CLK66_LVDS 7
3D3V_S0
12
R63
10KR3
12
R64
DUMMY-R3
ZZ.DUMMY.XR3
63.00000.001
63.00000.001
R390 10KR3
C58
SC4D7U10V5ZY
12
L11 0R5
1 2
CKG_FS1
CKG_FS2
12
R395 10KR3
R391 1KR3
1 2
1 2
R393 1KR3
**OVERCLOCK and SPREAD SPECTRUM
FS5/4/3 = 000 Normal, Normal
FS5/4/3 = 001 Normal, 0.5% Down
FS5/4/3 = 010 Normal, 1.0% Down
FS5/4/3 = 011 Normal, 1.5% Down
FS5/4/3 = 100 Normal, 0.5% Center
FS5/4/3 = 101 Normal, 0.75% Center
FS5/4/3 = 110 +5% , 0.35% Center
FS5/4/3 = 111 +10% , 0.35% Center
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
B2M
Host Freq. Setting
FS1/0 = 00 66MHz
FS1/0 = 01 100MHz
FS1/0 = 10 200MHz
FS1/0 = 11 133MHz
FS2 = 0 Disable
66MHz-IN
3D3V_S0VCCA_CKG48
300 ohm@100MHz
600mA
343Thursday, January 16, 2003
3D3V_S0
SC
CPU Socket
AMP: 62.01153.061
FOXCON: 62.10055.011
1D2V_VID
L7
IND-4D7UH
68.4R72B.1F1
THERMDP17
THERMDN17
N5
N4
N2
M1
N1
M4
M3
L2
M6
L3
K1
L6
K4
K2
L5
H3
J3
J4
K5
J1
AB1
Y1
W2
V3
U4
T5
W1
R6
V2
T4
U3
P6
U1
T2
R3
P4
P3
R2
T1
R5
1 2
L8
IND-4D7UH
68.4R72B.1F1
1 2
需並行
U15D
A#16
A#15
A#14
A#13
A#12
A#11
A#10
A#9
A#8
A#7
A#6
A#5
A#4
A#3
ADSTB#0
REQ#4
REQ#3
REQ#2
REQ#1
REQ#0
A#35
A#34
A#33
A#32
A#31
A#30
A#29
A#28
A#27
A#26
A#25
A#24
A#23
A#22
A#21
A#20
A#19
A#18
A#17
ADSTB#1
NORTHWOOD-1D5-U
62.10055.011
1D2V_VID TRACE WIDTH
NEED 12MILS
L:RATED I = 60mA
C:ESR < 0.3 OHM,
ESL < 5nH, +/Â20% TOLERANT
THERMDP&THERMDN
GTL_A#[16..3]6
GTL_ADSTB#06
GTL_REQ#[4..0]6
GTL_A#[31..17]6
GTL_ADSTB#16
TP76TPAD30
TP75TPAD30
TP73TPAD30
TP70TPAD30
CC_THRMTRIP_S#15
GTL_A#16
GTL_A#15
GTL_A#14
GTL_A#13
GTL_A#12
GTL_A#11
GTL_A#10
GTL_A#9
GTL_A#8
GTL_A#7
GTL_A#6
GTL_A#5
GTL_A#4
GTL_A#3
GTL_REQ#4
GTL_REQ#3
GTL_REQ#2
GTL_REQ#1
GTL_REQ#0
GTL_A#31
GTL_A#30
GTL_A#29
GTL_A#28
GTL_A#27
GTL_A#26
GTL_A#25
GTL_A#24
GTL_A#23
GTL_A#22
GTL_A#21
GTL_A#20
GTL_A#19
GTL_A#18
GTL_A#17
CLKH_CPU3
CLKH_CPU#3
CLKH_ITP3,5
CLKH_ITP#3,5
CC_A20M#15
CC_FERR#15
CC_IGNNE#15
CC_INTR15
CC_SMI#15
CC_STPCLK#15
ST33U10VCM-U
TC1
12
1 2
TC2
ST33U10VCM-U
C569
SC1000P50V3KX
CPU SKT P/N :
62.10053.061 AMP
62.10055.011
FOXCONN
CC_NMI15
H_VID434
H_VID334
H_VID234
H_VID134
H_VID034
TP72TPAD30
TP7TPAD30
H_VCCA1
H_VCCA2
H_VSSA
TP6
TPAD30
1D2V_VID
DEFER#
TESTHI10
TESTHI9
TESTHI8
MCERR#
RESET#
U15C
AF22
BCLK0
AF23
BCLK1
AC26
ITP_CLK0
AD26
ITP_CLK1
C6
A20M#
B6
FERR#
B2
IGNNE#
D1
LINT0
E5
LINT1
B5
SMI#
Y4
STPCLK#
AE1
VID4
AE2
VID3
AE3
VID2
AE4
VID1
AE5
VID0
AF3
AD20
H_VCCS
A5
AE23
AD22
A4
H_VSSS H_MCLK3
AF4
AD3
AF25
B3
C4
A2
AD2
AF24
AE21
A22
A7
G1
ADS#
AC1
V5
AA3
G2
D2
L25
K26
K25
J26
E2
H2
H5
Y3
W4
U6
H6
AC3
W5
G4
V6
AB25
F4
G5
F1
AB2
J6
F3
E3
H_AP#0
H_AP#1
H_BINIT#
H_DP#3
H_DP#2
H_DP#1
H_DP#0
H_BR3#
H_BR2#
H_BR1#
H_IERR_PU#
H_MCERR#
H_RSP#
AP#0
AP#1
BINIT#
BNR#
BPRI#
DP#3
DP#2
DP#1
DP#0
DRDY#
DBSY#
BR#0
IERR#
INIT#
LOCK#
RS#2
RS#1
RS#0
RSP#
TRDY#
HIT#
HITM#
RSVD3
VCCVID
VCCA
VCCSENSE
VCCIOFLL
VSSA
VSSSENSE
VCCVID
NC
NC
THERMDA
THERMDC
THERMTRIP#
NC
NC
NC
NC
NC
NORTHWOOD-1D5-U
62.10055.011
GTL_ADS# 6
GTL_BNR# 6
GTL_BPRI# 6
GTL_DEFER# 6
GTL_DRDY# 6
GTL_DBSY# 6
RN56
1
2
3
4 5
SRN56
R486
CC_INIT# 15,29
GTL_LOCK# 6
TP68
TPAD30
TP74
TPAD30
TESTHI11
TESTHI0
GTLREF
GTLREF
GTLREF
GTLREF
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
PROCHOT#
PWRGOOD
TP77 TPAD30
TP69 TPAD30
TP71 TPAD30
TP4 TPAD30
TP2 TPAD30
TP1 TPAD30
TP3 TPAD30
8
7
1 2
R451 220R3F
6
1 2
56R3
1 2
R34 51R3
GTL_RS#2 6
GTL_RS#1 6
GTL_RS#0 6
GTL_TRDY# 6
GTL_HIT# 6
GTL_HITM# 6
BSEL0
BSEL1
COMP1
COMP0
BPM#5
BPM#4
BPM#3
BPM#2
BPM#1
BPM#0
DBR#
DPSLP#
SLP#
TRST#
AD6
H_BSEL0
AD5
H_BSEL1
A6
H_TESTHI11
P1
H_COMP0
L24
H_COMP1
AB4
AA5
Y6
AC4
AB5
AC6
AD24
H_BYPASSEN#
DBRST#
AE25
AD25
TP67 TPAD30
F6
TP45 TPAD30
F20
AA6
TP44
AA21
TPAD30
ZZ.PAD30.XXX
H_ODT
AA2
H_MCLK0
AC21
H_MCLK1
AC20
H_MCLK2
AC24
AC23
AA20
H_MCLKIO0
AB22
H_MCLKIO1
C3
CC_PROCHOT_S#
AB23
AB26
D4
TCK
C1
TDI
D5
TDO
F7
TMS
E6
VCC_CORE
GTL_BR0# 6
VCC_CORE
RESERVED FOR ITP
GTL_CPURST# 5,6
1 2
1 2
H_BPM5_PREQ# 5
H_BPM4_PRDY# 5
H_BPM1_ITP# 5
H_BPM0_ITP# 5
R37
0R3-0-U
1 2
63.00000.001
CC_DPSLP# 6,15
1 2
H_TCK 5
H_TDI 5
H_TDO 5
H_TMS 5
H_TRST# 5
VCC_CORE
H_BSEL0 3
H_BSEL1 3
R513 51D1R3F
R40 51D1R3F
R485
56R3
1
2
3
4 5
SRN56
H_BYPASSEN#
CC_CPUSLP# 15
1 2
DBRESET#_ITP 5,15
VCC_CORE
RN49
VCC_CORE
8
7
6
RN48
1
2
3
4 5
SRN56
PM_CPUPERF#
CC_A20M#
CC_IGNNE#
CC_INTR
CC_NMI
CC_SMI#
CC_STPCLK#
CC_DPSLP#
CC_CPUSLP#
CC_INIT#
CC_PROCHOT_S#
R106
0R3-0-U
63.00000.001
8
7
6
12
VCC_CORE
R489
56R3
PM_CPUPERF# 15
C505
SC220P
VCC_CORE
12
R33
330R3
12
R449
200R3
H_GTLREF
DUMMY-SC220P
ZZ.22134.1B1
H_BSEL0
12
R132
1KR3
C520
CC_CPUPWRGD 15
H_BSEL1
12
R107
1KR3
R433
100R3F
R115
DUMMY-R3
ZZ.DUMMY.XR3
R114
DUMMY-R3
ZZ.DUMMY.XR3
PULL TO 3.3V OR VCC_CORE??
Northwood EMTS rev0.5 P52
< 3" from CPU
12
12
12
R35
200R3
R36
200R3
R450
200R3
12
R113
200R3
CHECK MOUNT OR UN-MOUNT
Title
Size Document Number Rev
A3
Date: Sheet
VCC_CORE
12
R423
49D9R3F
12
C523
SC1U10V3ZY
12
3D3V_S0
12
12
12
12
12
R502
200R3
R490
R488
200R3
200R3
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
R104
200R3
12
R110
200R3
P4-M Northwood / CELERON CPU 1/2
B2M
443Thursday, January 16, 2003
of
SC
VSSH1VSSH4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSA3VSSA9VSS
VSS
VSS
VSS
A11
A13
A15
A17
A19
A21
H23
H26
10U/X7R 1210 DECOUPLING CAPS
8X IN SOCKET CAVITY
10X IN CRB
10U/X7R 1210 DECOUPLING CAPS
10X AROUND SOCKET
28X IN CRB
0.1U/X5R 0603 DECOUPLING CAPS
20X AROUND SOCKET
0.47U/X5R 0603 10X IN CRB
CLOSE TO CPU CLOSE TO ITP
H_BPM5_PREQ#4
H_BPM4_PRDY#4
H_BPM1_ITP#4
H_BPM0_ITP#4
H_TDO4
H_TCK4
H_TDI4
H_TMS4
GTL_CPURST#4,6
DBRESET#_ITP4,15
H_TRST#4
CLKH_ITP3,4
CLKH_ITP#3,4
SB
AA1
AA11
AA13
VCC_CORE
123
AA15
A10
A12
A14
A16
A18
A20
AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
VCC
VCC
VCC
VCC
VCC
VCC
VCCA8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AA4
AA7
AA9
AA17
AA19
AA23
AA26
AB10
VCC_CORE
12
VCC_CORE
12
VCC_CORE VCC_CORE
678
RN54
SRN51-U
4 5
AB12
AB14
AB16
AB18
C81
SC10U10V-U1
C68
SC10U10V-U1
C401
SCD1U16V
12
R497
75R2
AB20
AB21
AB24
C402
SCD1U16V
12
AB3
AB6
12
12
R41
DUMMY-R2
AB8
AC11
AC13
AC15
C67
SC10U10V-U1
C61
SC10U10V-U1
C434
SCD1U16V
12
AC2
AC17
AC19
AC22
12
C435
SCD1U16V
R505
1K5R3F
64.15015.651
AC5
AC7
AC9
AC25
12
C60
SC10U10V-U1
C56
SC10U10V-U1
12
R500
150R3F
AD1
AD10
AD12
12
C472
SCD1U16V
AD14
AD16
AD18
AD21
12
C459
SC10U10V-U1
C473
SCD1U16V
12
R504
39R3
AD4
AD8
AD23
C55
SC10U10V-U1
123
AE11
AE13
AE15
12
C527
SCD1U16V
678
4 5
AE17
AE19
AE22
AE24
12
C491
SC10U10V-U1
C504
SCD1U16V
RN55
SRN51-U
AE7
AE9
AE26
C423
SC10U10V-U1
12
R503
680R3
AF1
AF10
AF12
12
C503
SCD1U16V
AF14
C422
SC10U10V-U1
3D3V_S5
AB7
AB9
VCC
VCC
VSS
VSS
AF16
AF18
C526
SCD1U16V
12
AC10
AC12
VCC
VCC
VSS
VSS
AF20
AF26
12
R333
150R2
AC14
AC16
AC18
AC8
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
B10
B12
AF6
AF8
C51
SC10U10V-U1
12
ITP_PWRON
12
R501
27D4R3F
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
D20
VSS
D21
VSS
VSS
D24
VCCB7VCCB9VCC
VSSD3VSSD6VSSD8VSSE1VSS
E11
12
C424
SC10U10V-U1
C433
SCD1U16V
VSS
E13
VSS
VSS
VSS
VSS
B14
B16
B18
B20
C513
SC10U10V-U1
C501
SCD1U16V
VSS
B23
B26
12
VSS
VSSB4VSSB8VSS
C457
SC10U10V-U1
12
C502
SCD1U16V
VSS
VSS
C11
C13
C15
C490
SC10U10V-U1
VSS
VSS
C17
C19
C399
SCD1U16V
VSSC2VSS
C22
12
C25
*AF2 :
VCCFUSEPRG
VSS
VSSC7VSSC9VSS
D10
D12
C82
SC10U10V-U1
12
C458
SC10U10V-U1
C400
SCD1U16V
VSS
VSS
D14
VSS
VSS
D16
D18
C432
SCD1U16V
CHANGE NOTES
CHANGE SC10U10V-U P/N:78.10613.2A1 (1210)
P/N:78.10620.221 (1206)
In-Target Probe
TP87 TPAD30
TP86 TPAD30
TP79 TPAD30
TP78 TPAD30
TP82 TPAD30
TP85 TPAD30
TP81 TPAD30
TP80 TPAD30
TP84 TPAD30
TP26 TPAD30
TP24 TPAD30
TP83 TPAD30
TP32 TPAD30
TP33 TPAD30
CLOSE TO ITP
C10
C12
C14
VCC
VCC
VSS
VSS
E15
E17
E19
C470
SCD1U16V
R153
0R3-0-U
63.00000.001
C16
C18
VCC
VCC
VSS
VSS
VSS
E23
E26
1 2
C20
D11
D13
VCC
VCCC8VCC
VSSE4VSSE7VSSE9VSS
F10
C471
SCD1U16V
D15
VCC
VCC
VSS
F12
D17
D19
VCC
VCC
VCCD7VCCD9VCC
VSS
VSS
VSS
F14
F16
F18
C524
SCD1U16V
E10
VSSF2VSS
F22
E12
E14
E16
VCC
VCC
VSS
VSSF5VSSF8VSS
F25
C525
SCD1U16V
E18
E20
VCC
VCC
VCC
VSS
G21
G24
(X7R)
(X7R)
(X5R)P/N:78.10610.521 (1206)
F11
F13
F15
VCCE8VCC
VCC
VSSG3VSSG6VSSJ2VSS
J22
VCC_CORE
F17
F19
F9
VCC
VCC
VCC
VCC
VSS
VSSJ5VSS
J25
K21
VSS
VSSK3VSSK6VSSL1VSS
VSS
VSSL4VSSM2VSS
VSSM5VSS
VSS
VSSN3VSSN6VSSP2VSS
VSS
VSSP5VSSR1VSS
VSS
VSSR4VSS
VSS
VSST3VSSY5VSS
VSS
VSSY2VSSW6VSSW3VSS
VSS
VSSV4VSS
VSS
VSSV1VSSU5VSS
L23
L26
K24
N21
N24
M22
GTL_D#[15..0]6
GTL_DINV#06
GTL_DSTBN#06
GTL_DSTBP#06
GTL_D#[31..16]6
GTL_DSTBN#16 GTL_DSTBP#3 6
GTL_DSTBP#16
P22
P25
GTL_D#15
GTL_D#14
GTL_D#13
GTL_D#12
GTL_D#11
GTL_D#10
GTL_D#9
GTL_D#8
GTL_D#7
GTL_D#6
GTL_D#5
GTL_D#4
GTL_D#3
GTL_D#2
GTL_D#1
GTL_D#0
GTL_D#31
GTL_D#30
GTL_D#29
GTL_D#28
GTL_D#27
GTL_D#26
GTL_D#25
GTL_D#24
GTL_D#23
GTL_D#22
GTL_D#21
GTL_D#20
GTL_D#19
GTL_D#18
GTL_D#17
GTL_D#16
T21
T24
Y25
Y22
V26
R23
R26
U15B
D25
D#15
J21
D#14
D23
D#13
C26
D#12
H21
D#11
G22
D#10
B25
D#9
C24
D#8
C23
D#7
B24
D#6
D22
D#5
C21
D#4
A25
D#3
A23
D#2
B22
D#1
B21
D#0
E21
DINV#0
E22
STBN#0
F21
STBP#0
H25
D#31
K23
D#30
J24
D#29
L22
D#28
M21
D#27
H24
D#26
G26
D#25
L21
D#24
D26
D#23
F26
D#22
E25
D#21
F24
D#20
F23
D#19
G23
D#18
E24
D#17
H22
D#16
G25
DINV#1
K22
STBN#1
J23
STBP#1
NORTHWOOD-1D5-U
62.10055.011
Title
Size Document Number Rev
Custom
Date: Sheet
V23
W24
W21
D#47
D#46
D#45
D#44
D#43
D#42
D#41
D#40
D#39
D#38
D#37
D#36
D#35
D#34
D#33
D#32
DINV#2
STBN#2
STBP#2
D#63
D#62
D#61
D#60
D#59
D#58
D#57
D#56
D#55
D#54
D#53
D#52
D#51
D#50
D#49
D#48
DINV#3
STBN#3
STBP#3
SWAPPED
EMTS
V0.7
P4-M Northwood / CELERON CPU 2/2
VSS
VSST6VSSU2VSS
VSS
VSS
VSS
C5
A24
A26
U25
U22
M25
GTL_D#47
T23
GTL_D#46
T22
T25
GTL_D#45
T26
GTL_D#44
GTL_D#43
R24
GTL_D#42
R25
GTL_D#41
P24
R21
GTL_D#40
GTL_D#39
N25
GTL_D#38
N26
GTL_D#37
M26
GTL_D#36
N23
M24
GTL_D#35
P21
GTL_D#34
GTL_D#33
N22
GTL_D#32
M23
P26
R22
P23
AA24
AA22
AA25
Y21
Y24
Y23
W25
Y26
W26
V24
V22
U21
V25
U23
U24
U26
V21
W23
W22
GTL_DINV#2 6
GTL_DSTBN#2 6
GTL_DSTBP#2 6
GTL_D#63
GTL_D#62
GTL_D#61
GTL_D#60
GTL_D#59
GTL_D#58
GTL_D#57
GTL_D#56
GTL_D#55
GTL_D#54
GTL_D#53
GTL_D#52
GTL_D#51
GTL_D#50
GTL_D#49
GTL_D#48
GTL_DINV#3 6GTL_DINV#16
GTL_DSTBN#3 6
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
B2M
U15A
NORTHWOOD-1D5-U
62.10055.011
GTL_D#[47..32] 6
GTL_D#[63..48] 6
of
543Thursday, January 16, 2003
SC
A
GTL_A#3
GTL_A#4
C467
GTL_A#5
GTL_A#6
GTL_A#7
GTL_A#8
GTL_A#9
GTL_A#10
GTL_A#11
GTL_A#12
GTL_A#13
GTL_A#14
GTL_A#15
GTL_A#16
GTL_A#17
GTL_A#18
GTL_A#19
GTL_A#20
GTL_A#21
GTL_A#22
GTL_A#23
GTL_A#24
GTL_A#25
GTL_A#26
GTL_A#27
GTL_A#28
GTL_A#29
GTL_A#30
GTL_A#31
GTL_REQ#0
GTL_REQ#1
GTL_REQ#2
GTL_REQ#3
GTL_REQ#4
HL_0
HL_1
HL_2
HL_3
HL_4
HL_5
HL_6
HL_7
HL_8
HL_9
HL_10
HLVREF
HLZCOMP
GMCH_RCOMP0
GMCH_RCOMP1
HYSWING
HXSWING
AGP_BUSY#
4 4
GTL_A#[31..3]4
1D2V_S0
12
R100
243R3F
HLVREF
R101
12
HLZCOMP
R27
27R3F
100R3F
GMCH_RCOMP1
GMCH_RCOMP0
12
R55
27R3F
1D2V_S0
12
R94
27D4R3F
3 3
12
SC
2 2
VCORE_PWRGD3,15,34
PWROK15,17,25,28
VGATE_PWRGD3,15
VCC_CORE
12
HXSWING
1 1
12
C351
SCD1U16V
HYSWING&HXSWING
W/S: 10/20 mils
R332
301R3F
R331
150R3F
12
12
A
SCD01U50V3KX
C73
C499
SCD1U16V
GTL_REQ#[4:0]4
CLKH_MCH#3
GTL_DRDY#4
GTL_DEFER#4
GTL_TRDY#4
GTL_DBSY#4
GTL_CPURST#4,5
R382 DUMMY-0R3-0-U
1 2
1 2
R381 DUMMY-R3
ZZ.DUMMY.XR3
1 2
R727 0R2-0
R68
301R3F
HYSWING
R66
150R3F
C387
SCD1U16V
CLKH_MCH3
GTL_ADS#4
GTL_RS#04
GTL_RS#14
GTL_RS#24
PCIRST1#16,20,22,23
GTL_BR0#4
GTL_BNR#4
GTL_BPRI#4
GTL_HITM#4
GTL_HIT#4
GTL_LOCK#4
HL_[0..10]14
1D2V_S0
12
12
R97
100R3F
GTL_ADSTB#04
GTL_ADSTB#14
HL_STB#14
R96
49D9R3F
AGP_BUSY#15
SC
HL_STB14
PSWING
SCD1U16V
W25
AA27
W24
W23
W27
AA28
W28
AB27
AB28
AA26
AE29
AD29
M28
M25
M27
AD28
M23
M26
P23
T25
T28
R27
U23
U24
R24
U28
V28
U27
T27
V27
U25
V26
Y24
V25
V23
Y25
Y27
Y26
T26
R28
P25
R23
R25
T23
L28
N24
N23
P26
N25
P28
N28
N27
P27
Y23
F15
H28
B20
K28
B18
J11
U7
U4
U3
V3
W2
W6
V6
W7
T3
V5
V4
W3
V2
W1
T2
U2
F7
B
HA[3]#
HA[4]#
HA[5]#
HA[6]#
HA[7]#
HA[8]#
HA[9]#
HA[10]#
HA[11]#
HA[12]#
HA[13]#
HA[14]#
HA[15]#
HA[16]#
HA[17]#
HA[18]#
HA[19]#
HA[20]#
HA[21]#
HA[22]#
HA[23]#
HA[24]#
HA[25]#
HA[26]#
HA[27]#
HA[28]#
HA[29]#
HA[30]#
HA[31]#
HADSTB[0]#
HADSTB[1]#
HREQ[0]#
HREQ[1]#
HREQ[2]#
HREQ[3]#
HREQ[4]#
BCLK
BCLK#
ADS#
DRDY#
DEFER#
HTRDY#
RS[0]#
RS[1]#
RS[2]#
RSTIN#
BREQ0#
BNR#
BPRI#
DBSY#
HITM#
HIT#
HLOCK#
DPSLP#
CPURST#
PWROK
HL[0]
HL[1]
HL[2]
HL[3]
HL[4]
HL[5]
HL[6]
HL[7]
HL[8]
HL[9]
HL[10]
HLSTB
HLSTB#
HLVREF
HLZCOMP
HYRCOMP
HXRCOMP
PSWING
HYSWING
HXSWING
AGPBUSY#
B
U11C
HOST
HUB LINK
HOST
HD[0]#
HD[1]#
HD[2]#
HD[3]#
HD[4]#
HD[5]#
HD[6]#
HD[7]#
HD[8]#
HD[9]#
HD[10]#
HD[11]#
HD[12]#
HD[13]#
HD[14]#
HD[15]#
HDSTBP[0]#
HDSTBN[0]#
DINV[0]#
HD[16]#
HD[17]#
HD[18]#
HD[19]#
HD[20]#
HD[21]#
HD[22]#
HD[23]#
HD[24]#
HD[25]#
HD[26]#
HD[27]#
HD[28]#
HD[29]#
HD[30]#
HD[31]#
HDSTBP[1]#
HDSTBN[1]#
DINV[1]#
HD[32]#
HD[33]#
HD[34]#
HD[35]#
HD[36]#
HD[37]#
HD[38]#
HD[39]#
HD[40]#
HD[41]#
HD[42]#
HD[43]#
HD[44]#
HD[45]#
HD[46]#
HD[47]#
HDSTBP[2]#
HDSTBN[2]#
DINV[2]#
HD[48]#
HD[49]#
HD[50]#
HD[51]#
HD[52]#
HD[53]#
HD[54]#
HD[55]#
HD[56]#
HD[57]#
HD[58]#
HD[59]#
HD[60]#
HD[61]#
HD[62]#
HD[63]#
HDSTBP[3]#
HDSTBN[3]#
DINV[3]#
HDVREF[0]
HDVREF[1]
HDVREF[2]
HAVREF
HCCVREF
MONTARA-GML
71.MONTA.A0U
K22
H27
K25
L24
J27
G28
L27
L23
L25
J24
H25
K23
G27
K26
J23
H26
K27
J28
J25
F25
F26
B27
H23
E27
G25
F28
D27
G24
C28
B26
G22
C26
E26
G23
B28
D26
C27
E25
B21
G21
C24
C23
D22
C25
E24
D24
G20
E23
B22
B23
F23
F21
C20
C21
E21
E22
B25
G18
E19
E20
G17
D20
F19
C19
C17
F17
B19
G16
E16
C16
E17
D16
C18
E18
D18
G19
K21
J21
J17
HAVREF_GMCH
Y22
Y28
HCCVREF
GTL_D#0
GTL_D#1
GTL_D#2
GTL_D#3
GTL_D#4
GTL_D#5
GTL_D#6
GTL_D#7
GTL_D#8
GTL_D#9
GTL_D#10
GTL_D#11
GTL_D#12
GTL_D#13
GTL_D#14
GTL_D#15
GTL_D#16
GTL_D#17
GTL_D#18
GTL_D#19
GTL_D#20
GTL_D#21
GTL_D#22
GTL_D#23
GTL_D#24
GTL_D#25
GTL_D#26
GTL_D#27
GTL_D#28
GTL_D#29
GTL_D#30
GTL_D#31
GTL_D#32
GTL_D#33
GTL_D#34
GTL_D#35
GTL_D#36
GTL_D#37
GTL_D#38
GTL_D#39
GTL_D#40
GTL_D#41
GTL_D#42
GTL_D#43
GTL_D#44
GTL_D#45
GTL_D#46
GTL_D#47
GTL_D#48
GTL_D#49
GTL_D#50
GTL_D#51
GTL_D#52
GTL_D#53
GTL_D#54
GTL_D#55
GTL_D#56
GTL_D#57
GTL_D#58
GTL_D#59
GTL_D#60
GTL_D#61
GTL_D#62
GTL_D#63
GTL_D#[63..0] 5
GTL_DSTBP#0 5
GTL_DSTBN#0 5
GTL_DINV#0 5
GTL_DSTBP#1 5
GTL_DSTBN#1 5
GTL_DINV#1 5
GTL_DSTBP#2 5
GTL_DSTBN#2 5
GTL_DINV#2 5
GTL_DSTBP#3 5
GTL_DSTBN#3 5
GTL_DINV#3 5
HDVREF_GMCH
VCC_CORE
C384
12
SCD1U16V
R421
49D9R3F
12
R417
100R3F
C
2D5V_S3 2D5V _S3
12
R494
150R3F
SMVSWINGH SMVSWINGL
12
R493
604R3F
C560
SCD1U16V
VCC_CORE
12
R440
49D9R3F
HCCVREF
12
C507
R441
100R3F
SCD1U16V
C395
C380
SCD1U16V
12
SCD1U16V
C
SCD1U16V
C500
12
R495
604R3F
64.60405.551
12
R496
150R3F
VCC_CORE
12
12
C498
SC1U10V3KX
C76
SC1U10V5KX
R384
49D9R3F
R383
100R3F
M_A[0..12]9,10
M_WE#9,10
M_CAS#9,10
M_RAS#9,10
M_BS0_FR#9
M_BS1_FR#9
M_CKE0_R#9,10
M_CKE1_R#9,10
M_CKE2_R#9,10
M_CKE3_R#9,10
C561
SCD1U16V
SC1U10V5KX
M_B19,10
M_B29,10
M_B49,10
M_B59,10
C397
M_CS0_R#9,10
M_CS1_R#9,10
M_CS2_R#9,10
M_CS3_R#9,10
M_SDM_710
SB
M_DQS710
CLK_DDR09
CLK_DDR0#9
CLK_DDR19
CLK_DDR1#9
CLK_DDR39
CLK_DDR3#9
CLK_DDR49
CLK_DDR4#9
2D5V_S3
12
12
D
M_A0
M_A1
M_A2
M_A3
M_A4
M_A5
M_A6
M_A7
M_A8
M_A9
M_A10
M_A11
M_A12
M_DATA56
M_DATA57
M_DATA58
M_DATA59
M_DATA60
M_DATA61
M_DATA62
M_DATA63
SMVSWINGL
SMVSWINGH
R112
69D8R3F
MX_RCOMP
R111
60D4R3F
64.60R45.651
D
AC18
AD14
AD13
AD17
AD11
AC13
AD8
AD7
AC6
AC5
AC19
AD5
AB5
AD16
AC12
AF11
AD10
AD25
AC24
AC21
AD22
AD20
AD23
AD26
AC22
AC25
AC7
AB7
AC9
AC10
AB2
AA2
AC26
AB25
AC3
AD4
AC2
AD2
AB23
AB24
AA3
AB4
AH27
AH28
AH26
AE26
AG28
AF28
AG26
AF26
AE27
AD27
AD15
AH15
AG14
AE14
AE17
AG16
AH14
AE15
AF16
AF17
AJ22
AJ19
C352
SCD1U16V
E
U11A
AG2
SMA[0]
SMA[1]
SMA[2]
SMA[3]
SMA[4]
SMA[5]
SMA[6]
SMA[7]
SMA[8]
SMA[9]
SMA[10]
SMA[11]
SMA[12]
SMAB[1]
SMAB[2]
SMAB[4]
SMAB[5]
SWE#
SCAS#
SRAS#
SBA[0]
SBA[1]
SCS[0]#
SCS[1]#
SCS[2]#
SCS[3]#
SCKE[0]
SCKE[1]
SCKE[2]
SCKE[3]
SCK[0]
SCK[0]#
SCK[1]
SCK[1]#
SCK[2]
SCK[2]#
SCK[3]
SCK[3]#
SCK[4]
SCK[4]#
SCK[5]
SCK[5]#
SDQS[7]
SDM[7]
SDQ[56]
SDQ[57]
SDQ[58]
SDQ[59]
SDQ[60]
SDQ[61]
SDQ[62]
SDQ[63]
SDQS[8]
SDM[8]
SDQ[64]
SDQ[65]
SDQ[66]
SDQ[67]
SDQ[68]
SDQ[69]
SDQ[70]
SDQ[71]
SMVSWINGL
SMVSWINGH
MONTARA-GML
71.MONTA.A0U
Title
Size Document Number Rev
Custom
Date: Sheet
DDR
MEMORY
MONTARA GML (1/3)
SDQS[0]
AE5
SDM[0]
AF2
SDQ[0]
SDQ[1]
SDQ[2]
SDQ[3]
SDQ[4]
SDQ[5]
SDQ[6]
SDQ[7]
SDQS[1]
SDM[1]
SDQ[8]
SDQ[9]
SDQ[10]
SDQ[11]
SDQ[12]
SDQ[13]
SDQ[14]
SDQ[15]
SDQS[2]
SDM[2]
SDQ[16]
SDQ[17]
SDQ[18]
SDQ[19]
SDQ[20]
SDQ[21]
SDQ[22]
SDQ[23]
SDQS[3]
SDM[3]
SDQ[24]
SDQ[25]
SDQ[26]
SDQ[27]
SDQ[28]
SDQ[29]
SDQ[30]
SDQ[31]
SDQS[4]
SDM[4]
SDQ[32]
SDQ[33]
SDQ[34]
SDQ[35]
SDQ[36]
SDQ[37]
SDQ[38]
SDQ[39]
SDQS[5]
SDM[5]
SDQ[40]
SDQ[41]
SDQ[42]
SDQ[43]
SDQ[44]
SDQ[45]
SDQ[46]
SDQ[47]
SDQS[6]
SDM[6]
SDQ[48]
SDQ[49]
SDQ[50]
SDQ[51]
SDQ[52]
SDQ[53]
SDQ[54]
SDQ[55]
SMRCOMP
SMVREF_0
M_DATA0
AE3
M_DATA1
AF4
M_DATA2
AH2
M_DATA3
AD3
M_DATA4
AE2
M_DATA5
AG4
M_DATA6
AH3
M_DATA7
AH5
AE6
AD6
M_DATA8
AG5
M_DATA9
AG7
M_DATA10
AE8
M_DATA11
AF5
M_DATA12
AH4
M_DATA13
AF7
M_DATA14
AH6
M_DATA15
AH8
AE9
AF8
M_DATA16
AG8
M_DATA17
AH9
M_DATA18
AG10
M_DATA19
AH7
M_DATA20
AD9
M_DATA21
AF10
M_DATA22
AE11
M_DATA23
AE12
AH12
AH10
M_DATA24
AH11
M_DATA25
AG13
M_DATA26
AF14
M_DATA27
AG11
M_DATA28
AD12
M_DATA29
AF13
M_DATA30
AH13
M_DATA31
AH17
AD19
AH16
M_DATA32
AG17
M_DATA33
AF19
M_DATA34
AE20
M_DATA35
AD18
M_DATA36
AE18
M_DATA37
AH18
M_DATA38
AG19
M_DATA39
AE21
AD21
AH20
M_DATA40
AG20
M_DATA41
AF22
M_DATA42
AH22
M_DATA43
AF20
M_DATA44
AH19
M_DATA45
AH21
M_DATA46
AG22
M_DATA47
AH24
AD24
M_DATA48
AE23
AH23
M_DATA49
AE24
M_DATA50
AH25
M_DATA51
AG23
M_DATA52
AF23
M_DATA53
AF25
M_DATA54
AG25
M_DATA55
AB1
MX_RCOMP
AJ24
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
B2M
E
643Thursday, January 16, 2003
M_DATA[0..63] 10
M_DQS0 10
M_SDM_0 10
M_DQS1 10
M_SDM_1 10
M_DQS2 10
M_SDM_2 10
M_DQS3 10
M_SDM_3 10
M_DQS4 10
M_SDM_4 10
M_DQS5 10
M_SDM_5 10
M_DQS6 10
M_SDM_6 10CC_DPSLP#4,15
DDR_VREF_S3
C567
SCD1U16V
of
SC
A
U11E
AA29
VSS
W29
VSS
U29
VSS
N29
VSS
L29
VSS
J29
VSS
G29
VSS
E29
VSS
C29
VSS
4 4
3 3
2 2
1 1
AE28
AC28
AJ27
AG27
AC27
AJ26
AB26
W26
AE25
AA25
AG24
AA24
M24
AJ23
AC23
AA23
AE22
W22
AG21
AB21
AA21
M21
AJ20
AC20
AA20
AE19
AB19
AJ18
AG18
AA18
AC17
AB17
AE16
AA16
E28
D28
F27
A27
U26
R26
N26
L26
G26
D25
A25
V24
T24
P24
K24
H24
F24
B24
D23
A23
U22
R22
N22
L22
F22
C22
Y21
V21
T21
P21
H21
D21
A21
F20
H19
D19
A19
F18
U17
R17
N17
H17
D17
A17
T16
P16
J26
J22
J20
J18
J16
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MONTARA-GML
71.MONTA.A0U
GND
VSSALVDS
A
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSADAC
AE13
AB13
U13
R13
N13
H13
F13
D13
A13
AJ12
AG12
AA12
J12
AJ11
AC11
AB11
H11
F11
D11
AJ10
AE10
AA10
J10
C10
AG9
AB9
W9
U9
T9
R9
N9
L9
E9
AC8
Y8
V8
T8
P8
K8
H8
AJ7
AE7
AA7
R7
M7
J7
G7
E7
C7
AG6
Y6
L6
Y5
U5
B5
AE4
AC4
AA4
W4
T4
N4
K4
G4
D4
AJ3
AG3
R2
AJ1
AE1
AA1
U1
L1
G1
C1
F16
AG15
AB15
U15
R15
N15
H15
D15
AC14
AA14
T14
P14
J14
B8
B11
PM_SUSCLK15,16
R355
1KR3F
R353
1KR3F
1D5V_S0
12
12
1
G
B
1D5V_S0
12
R349
10KR2
D
Q26
2N7002
S
2 3
1D5V_S0
GCLKIN
C366
SCD1U16V
THRM#15,17
B
DPMS
3D3V_S0
12
R352 40D2R3F
64.40R25.651
1 2
12
R20
10KR2
SC
R713
1 2
10KR2
R367
1 2
10KR2
TV_D[0..11]13
R77
1 2
10KR2
DVORCOMP
CLK66_MCH3
CLK48_DAC3
CLK66_LVDS3
1 2
R22 DUMMY-R3
POWR LEVEL
R19
10KR2
TV_POUT13
TV_CLK13
TV_CLK#13
TV_HSYNC13
TV_VSYNC13
TP66TPAD30
DDCP_CLK
DDCP_DATA
TP59TPAD30
TP61TPAD30
TP62TPAD30
TP60TPAD30
TP58TPAD30
TP57TPAD30
TP53TPAD30
TP54TPAD30
TP51TPAD30
TP52TPAD30
TP48TPAD30
TP50TPAD30
TP55TPAD30
TP56TPAD30
TP64TPAD30
TP63TPAD30
TP46TPAD30
TV_D0
TV_D1
TV_D2
TV_D3
TV_D4
TV_D5
TV_D6
TV_D7
TV_D8
TV_D9
TV_D10
TV_D11
DPMS
GMCH_EXTTS_R
SC
C
AA22
C
1D5V_S0
12
R3
R5
R6
R4
P6
P5
N5
P2
N2
N3
M1
M5
P3
P4
M2
T6
T5
L2
G2
M3
K5
K1
K3
K2
J6
J5
H2
H1
H3
H4
H6
G3
J3
J2
H5
K6
L5
L3
D1
F1
Y3
D5
B7
B17
D6
ZZ.DUMMY.XR3
R334 DUMMY-R3
1 2
TP36TPAD30
TP40TPAD30
R387
DUMMY-1KR2
U11B
RSVDL7RSVDE5RSVDF5RSVDE3RSVDE2RSVDG5RSVDF4RSVDG6RSVDF6RSVD
DVOBD[0]
DVOBD[1]
DVOBD[2]
DVOBD[3]
DVOBD[4]
DVOBD[5]
DVOBD[6]
DVOBD[7]
DVOBD[8]
DVOBD[9]
DVOBD[10]
DVOBD[11]
DVOBCLK
DVOBCLK#
DVOBFLDSTL
DVOBHSYNC
DVOBVSYNC
DVOBBLANK#
DVOBCINTR#
DVOBCCLKINT
DVOCD0
RSVD
DVOCD1
RSVD
DVOCD2
RSVD
DVOCD3
RSVD
DVOCD4
RSVD
DVOCD5
RSVD
DVOCD6
RSVD
DVOCD7
RSVD
DVOCD8
RSVD
DVOCD9
RSVD
DVOCD10
RSVD
DVOCD11
RSVD
DVOCCLK
RSVD
DVOCCLK#
RSVD
DVOCFLDSTL
RSVD
DVOCHSYNC
RSVD
DVOCVSYNC
RSVD
DVOCBLANK#
RSVD
RSVD
DVORCOMP
GVREF
GCLKIN
DPMS
DREFCLK
DREFSSCLK
EXTTS_0
NC
AJ29
AH29
TP35TPAD30
TP34TPAD30
NC
NC
B29NCA29
TP42TPAD30
TP39TPAD30
NC
A28
AJ28
TP43TPAD30
TP41TPAD30
F12
DVOB
NC
NC
NC
AJ4NCAJ2
AA9
TP31TPAD30
TP27TPAD30
TP65TPAD30
TP47TPAD30
TP38TPAD30
TP29TPAD30
D12
B12
AA5
RSVD
RSVD
RSVD
RSVDL4RSVDC4RSVDF3RSVDD3RSVDC3RSVDB3RSVDF2RSVDD2RSVDC2RSVDB2RSVD
LVDS
LVDS CRT
NCA2NC
NCB1NC
AH1
AC16NCAC15
C497
1 2
DUMMY-C3
ZZ.DUMMY.XC3
1D5V_S0
1
2
3
4 5
SC
D
R18 DUMMY-R3 ZZ.DUMMY.XR3
1 2
R17 DUMMY-R3 ZZ.DUMMY.XR3
1 2
TP5TPAD30
R350 DUMMY-R3ZZ.DUMMY.XR3
TP25TPAD30
TP37TPAD30
TP28TPAD30
TP30TPAD30
1 2
D7
DDCA_DATA
DDCA_CLK
DDCPDATA
DDCPCLK
RED
RED#
GREEN
GREEN#
BLUE
BLUE#
HSYNC
VSYNC
PANELBKLTCTL
PANELBKLTEN
PANELVDDEN
IYAP[0]
IYAM[0]
IYAP[1]
IYAM[1]
IYAP[2]
IYAM[2]
IYAP[3]
IYAM[3]
ICLKAP
ICLKAM
IYBP[0]
IYBM[0]
IYBP[1]
IYBM[1]
IYBP[2]
IYBM[2]
IYBP[3]
IYBM[3]
ICLKBM
ICLKBP
LCLKCTLA
LCLKCTLB
MDDCCLK
MDDCDATA
MDVICLK
MDVIDATA
MI2CCLK
MI2CDATA
REFSET
LIBG
MONTARA-GML
71.MONTA.A0U
LCLKCTLB Hi > P4-m CPU , Lo > Banias CPU
RN51
8
MDDC_CLK
7
MDDC_DATA
6
MDVI_CLK
MDVI_DATA
SRN4K7-1-U
R69 10KR3
1 2
R90 10KR3
1 2
TV_I2C_CLK1
TV_I2C_DATA1
D
1D5V_S0
37.5 ohm trace impedance
DAC_RED
DAC_GREEN
DAC_BLUE
G9
B6
C5
B4
A7
A8
C8
D8
C9
D9
H10
J9
G8
F8
A5
F14
G14
E14
E15
C14
C15
B13
C13
E13
D14
G12
H12
E11
E12
C11
C12
G10
G11
E10
F10
H9
C6
P7
T7
N7
M6
K7
N6
E8
A10
DDCP_DATA
DDCP_CLK
MDDC_CLK
MDDC_DATA
MDVI_CLK
MDVI_DATA
REFSET
12
LCLKCTLA
LCLKCTLB
R25
1K5R3F
64.15015.651
CHECK 3V/5V TPRLENCE
DATDDC3_3 12
CLKDDC3_3 12
DAC_RED 12
DAC_GREEN 12
DAC_BLUE 12
DAC_HSYNC 12
DAC_VSYNC 12
BRIGHT_DVO
BL_ON 11,38
LCDVDD_ON 11
TXAOUT0+ 11
TXAOUT0- 11
TXAOUT1+ 11
TXAOUT1- 11
TXAOUT2+ 11
TXAOUT2- 11
TXACLK+ 11
TXACLK- 11
TXBOUT0+ 11
TXBOUT0- 11
TXBOUT1+ 11
TXBOUT1- 11
TXBOUT2+ 11
TXBOUT2- 11
SB
TXBCLK- 11
TXBCLK+ 11
TV_I2C_CLK1
TV_I2C_DATA1
12
3D3V_S0
12
1 2
1 2
DUMMY-0R2-0
SC
12
R23
137R3F
H/W STRAPPING
Hi > non DVO , Lo > DVODVODETECT
Title
MONTARA GML (2/3)
Size Document Number Rev
Custom
Date: Sheet
B2M
E
專用
CRT
DVI
專用
R67
1 2
1 2
R24
1 2
DUMMY-R3
C367
DUMMY-C2
ZZ.DUMMY.C02
3D3V_S0
R370
1KR2
DUMMY-0R2-0
R65
R70
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
0R2-0
R56
0R2-0
12
SB
R21
1KR2
E
TV_I2C_DATA
TV_I2C_CLK
BRIGHTNESS 11,30
743Thursday, January 16, 2003
SB
TV_I2C_CLK 13
TV_I2C_DATA 13
of
SC
A
1D5V_S0
SC10U6D3V5MX
C474
SCD1U16V
C428
SCD01U50V3KX
C463
SCD1U16V
3D3V_S0
C344
SCD1U16V
C381
SCD1U16V
SC10U6D3V5MX
C354
4 4
3 3
2 2
SCD1U16V
This two cap chould connect to
VSSADAC first then to GND
C48
C444
SCD1U16V
C486
C468
SCD1U16V
12
SC10U6D3V5MX
12
SC10U6D3V5MX
1D2V_S0
R325
1 2
1D2V_S0
R324
1 2
1D2V_S0
1R5
1R5
C445
SCD1U16V
C416
C418
SCD1U16V
C411
B
12
1D2V_S0
C107
SC22U10V-1
12
VCCADPLLA
VCCADPLLB
12
C33
SC10U6D3V5MX
L28
1 2
IND-D1UH
68.R1020.1F1
L27
1 2
IND-D1UH
68.R1020.1F1
1D2V_S0
12
C460
SC10U6D3V5MX
12
C421
SC10U6D3V5MX
C544
SCD1U16V
12
C378
SC10U10V6ZY-1
12
TC14
ST220U2D5VDM-2
77.22271.071
12
TC15
ST220U2D5VDM-2
77.22271.071
C496
SCD1U16V
C543
SCD1U16V
1D5V_S0
1D2V_S0
C394
SCD1U16V
2D5V_S3
C379
SCD1U16V
1D5V_S0
C353
SCD1U16V
C348
SCD1U16V
C419
SCD1U16V
12
C396
SC10U6D3V5MX
C357
SCD1U16V
C350
SCD1U16V
VCC_ADPLLA
VCC_ADPLLB
C443
SCD1U16V
1D5V_S0
1D5V_S0
3D3V_S0
1D2V_S0
C
W21
AA19
AA17
P17
U16
R16
N16
AA15
P15
U14
R14
N14
H14
P13
A12
D10
B10
B15
B14
G13
A11
B16
D29
P9
M9
K9
R8
N8
M8
L8
J8
H7
E6
M4
J4
E4
N1
J1
E1
T17
T15
J15
T13
F9
J13
A6
Y2
B9
A9
A3
A4
V9
W8
U8
V7
U6
W5
Y1
V1
U11D
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCTXLVDS
VCCTXLVDS
VCCTXLVDS
VCCTXLVDS
VCCDLVDS
VCCDLVDS
VCCDLVDS
VCCDLVDS
VCCALVDS
VCCADPLLA
VCCADPLLB
VCCAGPLL
VCCAHPLL
VCCADAC
VCCADAC
VCCGPIO
VCCGPIO
VCCHL
VCCHL
VCCHL
VCCHL
VCCHL
VCCHL
VCCHL
VCCHL
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCQSM
VCCQSM
VCCASM
VCCASM
VTTHF
VTTHF
VTTHF
VTTHF
VTTHF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
MONTARA-GML
71.MONTA.A0U
AG29
AF29
AC29
AF27
AJ25
AF24
AB22
AJ21
AF21
AB20
AF18
AB18
AJ17
AB16
AF15
AB14
AJ13
AA13
AF12
AB12
AA11
AB10
AJ9
AF9
Y9
AB8
AA8
Y7
AF6
AB6
AA6
AJ5
Y4
AF3
AB3
AG1
AC1
AJ8
AJ6
AF1
AD1
V29
M29
H29
A24
A22
AB29
Y29
K29
F29
A26
V22
T22
P22
M22
H22
U21
R21
N21
L21
H20
A20
J19
H18
A18
H16
G15
2D5V_S3
VCC_QSM
VCC_ASM
D
C506
SCD1U16V
C546
SCD1U16V
C66 SCD1U16V
C54 SCD1U16V
C47 SCD1U16V
C19 SCD1U16V
C18 SCD1U16V
12
C341
SC10U6D3V5MX
C519
SCD1U16V
C547
SCD1U16V
C132
SCD1U16V
C535
SCD1U16V
C140
SC4D7U10V-U
12
C50
SC10U6D3V5MX
C518
SCD1U16V
C540
SCD1U16V
L14
1 2
12
IND-1UH
TC5
ST100U6D3V-U
C516
SCD1U16V
C541
SCD1U16V
1 2
1D2V_S0
C368
SCD1U16V
12
L17
IND-D68UH-2
68.R6830.101
VCC_CORE
C430
SCD1U16V
C517
SCD1U16V
C86
SC10U6D3V5MX
R157
1 2
1R5
12
E
C542
SCD1U16V
12
C139
SC10U6D3V5MX
2D5V_S3
C429
SC10U6D3V5MX
C545
SCD1U16V
12
C485
SC10U6D3V5MX
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
A
B
C
D
Date: Sheet
MONTARA GML (3/3)
Taipei Hsien 221, Taiwan, R.O.C.
B2M
843Thursday, January 16, 2003
E
of
SC
M_A[12..0]6,10
R220 10R3
1 2
M_A0 M_R_A0
R208 10R3
M_A3 M_R_A3
1 2
R219 10R3
1 2
R207 10R3
1 2
M_A7 M_R_A7
R218 10R3
1 2
M_A8 M_R_A8
R206 10R3
1 2
R209 10R3
M_A10 M_R_A10
1 2
R217 10R3
1 2
R205 10R3
1 2
M_A12 M_R_A12
M_R_A6M_A6
M_R_A9M_A9
M_R_A11M_A11
DDR_VREF_S3 DDR_VREF_S3
M_A0
M_A1
M_A2
M_A3
M_A4
M_A5
M_A6
M_A7
M_A8
M_A9
M_A10
M_A11
M_A12
M_BS0_FR#
M_BS1_FR#
M_DATA_R_0
M_DATA_R_1
M_DATA_R_2
M_DATA_R_3
M_DATA_R_4
M_DATA_R_5
M_DATA_R_6
M_DATA_R_7
M_DATA_R_8
M_DATA_R_9
M_DATA_R_10
M_DATA_R_11
M_DATA_R_12
M_DATA_R_13
M_DATA_R_14
M_DATA_R_15
M_DATA_R_16
M_DATA_R_17
M_DATA_R_18
M_DATA_R_19
M_DATA_R_20
M_DATA_R_21
M_DATA_R_22
M_DATA_R_23
M_DATA_R_24
M_DATA_R_25
M_DATA_R_26
M_DATA_R_27
M_DATA_R_28
M_DATA_R_29
M_DATA_R_30
M_DATA_R_31
M_DATA_R_32
M_DATA_R_33
M_DATA_R_34
M_DATA_R_35
M_DATA_R_36
M_DATA_R_37
M_DATA_R_38
M_DATA_R_39
M_DATA_R_40
M_DATA_R_41
M_DATA_R_42
M_DATA_R_43
M_DATA_R_44
M_DATA_R_45
M_DATA_R_46
M_DATA_R_47
M_DATA_R_48
M_DATA_R_49
M_DATA_R_50
M_DATA_R_51
M_DATA_R_52
M_DATA_R_53
M_DATA_R_54
M_DATA_R_55
M_DATA_R_56
M_DATA_R_57
M_DATA_R_58
M_DATA_R_59
M_DATA_R_60
M_DATA_R_61
M_DATA_R_62
M_DATA_R_63
M_DATA_R_64
M_DATA_R_65
M_DATA_R_66
M_DATA_R_67
M_DATA_R_68
M_DATA_R_69
M_DATA_R_70
M_DATA_R_71
M_RAS#
M_CAS#
M_WE#
VDD_SPD
C154
SCD1U16V
DM1
112
A0
111
A1
110
A2
109
A3
108
A4
107
A5
106
A6
105
A7
102
A8
101
A9
115
A10 / AP
100
A11
99
A12
117
BA0
116
BA1
5
DQ0
7
DQ1
13
DQ2
17
DQ3
6
DQ4
8
DQ5
14
DQ6
18
DQ7
19
DQ8
23
DQ9
29
DQ10
31
DQ11
20
DQ12
24
DQ13
30
DQ14
32
DQ15
41
DQ16
43
DQ17
49
DQ18
53
DQ19
42
DQ20
44
DQ21
50
DQ22
54
DQ23
55
DQ24
59
DQ25
65
DQ26
67
DQ27
56
DQ28
60
DQ29
66
DQ30
68
DQ31
127
DQ32
129
DQ33
135
DQ34
139
DQ35
128
DQ36
130
DQ37
136
DQ38
140
DQ39
141
DQ40
145
DQ41
151
DQ42
153
DQ43
142
DQ44
146
DQ45
152
DQ46
154
DQ47
163
DQ48
165
DQ49
171
DQ50
175
DQ51
164
DQ52
166
DQ53
172
DQ54
176
DQ55
177
DQ56
181
DQ57
187
DQ58
189
DQ59
178
DQ60
182
DQ61
188
DQ62
190
DQ63
71
CB0
73
CB1
79
CB2
83
CB3
72
CB4
74
CB5
80
CB6
84
CB7
85
NC
86
NC/(RESET#)
97
NC/A13
98
NC/BA2
123
NC
124
NC
200
NC
118
/RAS
120
/CAS
119
/WE
1
VREF
2
VREF
197
VDDSPD
199
VDDID
201
GND
DDR-SODIMM-N
121
/CS0
122
/CS1
96
CKE0
95
CKE1
11
DQS0
25
DQS1
47
DQS2
61
DQS3
133
DQS4
147
DQS5
169
DQS6
183
DQS7
77
DQS8
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
CK0
/CK0
CK1
/CK1
CK2
/CK2
SCL
SDA
SA0
SA1
SA2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
NORMAL TYPE
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
12
26
48
62
134
148
170
184
78
35
37
160
158
89
91
195
193
194
196
198
9
10
21
22
33
34
36
45
46
57
58
69
70
81
82
92
93
94
113
114
131
132
143
144
155
156
157
167
168
179
180
191
192
3
4
15
16
27
28
38
39
40
51
52
63
64
75
76
87
88
90
103
104
125
126
137
138
149
150
159
161
162
173
174
185
186
202
M_SDM_R0
M_SDM_R1
M_SDM_R2
M_SDM_R3
M_SDM_R4
M_SDM_R5
M_SDM_R6
M_SDM_R7
M_SDM_R8
SMBC_ICH
SMBD_ICH
DM1_SA0
M_DQS_R0
M_DQS_R1
M_DQS_R2
M_DQS_R3
M_DQS_R4
M_DQS_R5
M_DQS_R6
M_DQS_R7
M_DQS_R8
M_CS0_R# 6,10
M_CS1_R# 6,10
M_CKE0_R# 6,10
M_CKE1_R# 6,10
CLK_DDR1 6
CLK_DDR1# 6
CLK_DDR0 6
CLK_DDR0# 6
M_BS0_FR#6
M_BS1_FR#6
2D5V_S3
M_RAS#6,10
M_CAS#6,10
M_WE#6,10
10R3
R193
DUMMY-R3
1 2
ZZ.DUMMY.XR3
12
R212
0R3-0-U
63.00000.001
R210
10R3
1 2
1 2
R221
10R3
R22210R3
1 2
R22310R3
1 2
1 2
R211
M_BS_FR#_0
M_BS_FR#_1
M_R_RAS#
M_R_CAS#
M_R_WE#
M_DATA_R_[71..0]10
M_B16,10
M_B26,10
M_B46,10
M_B56,10
M_BS_FR#_0 10
M_BS_FR#_1 10
M_R_A0
M_R_A3
M_R_A6
M_R_A7
M_R_A8
M_R_A9
M_R_A10
M_R_A11
M_R_A12
M_BS_FR#_0
M_BS_FR#_1
M_DATA_R_0
M_DATA_R_1
M_DATA_R_2
M_DATA_R_3
M_DATA_R_4
M_DATA_R_5
M_DATA_R_6
M_DATA_R_7
M_DATA_R_8
M_DATA_R_9
M_DATA_R_10
M_DATA_R_11
M_DATA_R_12
M_DATA_R_13
M_DATA_R_14
M_DATA_R_15
M_DATA_R_16
M_DATA_R_17
M_DATA_R_18
M_DATA_R_19
M_DATA_R_20
M_DATA_R_21
M_DATA_R_22
M_DATA_R_23
M_DATA_R_24
M_DATA_R_25
M_DATA_R_26
M_DATA_R_27
M_DATA_R_28
M_DATA_R_29
M_DATA_R_30
M_DATA_R_31
M_DATA_R_32
M_DATA_R_33
M_DATA_R_34
M_DATA_R_35
M_DATA_R_36
M_DATA_R_37
M_DATA_R_38
M_DATA_R_39
M_DATA_R_40
M_DATA_R_41
M_DATA_R_42
M_DATA_R_43
M_DATA_R_44
M_DATA_R_45
M_DATA_R_46
M_DATA_R_47
M_DATA_R_48
M_DATA_R_49
M_DATA_R_50
M_DATA_R_51
M_DATA_R_52
M_DATA_R_53
M_DATA_R_54
M_DATA_R_55
M_DATA_R_56
M_DATA_R_57
M_DATA_R_58
M_DATA_R_59
M_DATA_R_60
M_DATA_R_61
M_DATA_R_62
M_DATA_R_63
M_DATA_R_64
M_DATA_R_65
M_DATA_R_66
M_DATA_R_67
M_DATA_R_68
M_DATA_R_69
M_DATA_R_70
M_DATA_R_71
M_R_RAS#
M_R_CAS#
M_R_WE#
VDD_SPD
C598
SCD1U16V
DM2
112
A0
111
A1
110
A2
109
A3
108
A4
107
A5
106
A6
105
A7
102
A8
101
A9
115
A10 / AP
100
A11
99
A12
117
BA0
116
BA1
5
DQ0
7
DQ1
13
DQ2
17
DQ3
6
DQ4
8
DQ5
14
DQ6
18
DQ7
19
DQ8
23
DQ9
29
DQ10
31
DQ11
20
DQ12
24
DQ13
30
DQ14
32
DQ15
41
DQ16
43
DQ17
49
DQ18
53
DQ19
42
DQ20
44
DQ21
50
DQ22
54
DQ23
55
DQ24
59
DQ25
65
DQ26
67
DQ27
56
DQ28
60
DQ29
66
DQ30
68
DQ31
127
DQ32
129
DQ33
135
DQ34
139
DQ35
128
DQ36
130
DQ37
136
DQ38
140
DQ39
141
DQ40
145
DQ41
151
DQ42
153
DQ43
142
DQ44
146
DQ45
152
DQ46
154
DQ47
163
DQ48
165
DQ49
171
DQ50
175
DQ51
164
DQ52
166
DQ53
172
DQ54
176
DQ55
177
DQ56
181
DQ57
187
DQ58
189
DQ59
178
DQ60
182
DQ61
188
DQ62
190
DQ63
71
CB0
73
CB1
79
CB2
83
CB3
72
CB4
74
CB5
80
CB6
84
CB7
85
NC
86
NC/(RESET#)
97
NC/A13
98
NC/BA2
123
NC
124
NC
200
NC
118
/RAS
120
/CAS
119
/WE
1
VREF
2
VREF
197
VDDSPD
199
VDDID
202
GND
DDR-SODIMM-R
121
/CS0
122
/CS1
96
CKE0
95
CKE1
11
DQS0
25
DQS1
47
DQS2
61
DQS3
133
DQS4
147
DQS5
169
DQS6
183
DQS7
77
DQS8
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
CK0
/CK0
CK1
/CK1
CK2
/CK2
SCL
SDA
SA0
SA1
SA2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
REVERSE TYPE
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
12
26
48
62
134
148
170
184
78
35
37
160
158
89
91
195
193
194
196
198
9
10
21
22
33
34
36
45
46
57
58
69
70
81
82
92
93
94
113
114
131
132
143
144
155
156
157
167
168
179
180
191
192
3
4
15
16
27
28
38
39
40
51
52
63
64
75
76
87
88
90
103
104
125
126
137
138
149
150
159
161
162
173
174
185
186
201
M_SDM_R0
M_SDM_R1
M_SDM_R2
M_SDM_R3
M_SDM_R4
M_SDM_R5
M_SDM_R6
M_SDM_R7
M_SDM_R8
DM2_SA0
M_CS2_R# 6,10
M_CS3_R# 6,10
M_CKE2_R# 6,10
M_CKE3_R# 6,10
M_DQS_R0
M_DQS_R1
M_DQS_R2
M_DQS_R3
M_DQS_R4
M_DQS_R5
M_DQS_R6
M_DQS_R7
M_DQS_R8
CLK_DDR4 6
CLK_DDR4# 6
CLK_DDR3 6
CLK_DDR3# 6
SMBC_ICH 3,11,15,25,38
SMBD_ICH 3,11,15,25,38
2D5V_S3
Title
DDR Socket
Size Document Number Rev
Custom
Date: Sheet
12
VDD_SPD
B2M
M_DQS_R[8..0] 10
M_SDM_R[8..0] 10
R192 0R3-0-U
1 2
63.00000.001
R199
DUMMY-R3
ZZ.DUMMY.XR3
1 2
R177 0R3-0-U
1 2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
VDD_SPDVDD_SPD
R178
DUMMY-R3
ZZ.DUMMY.XR3
63.00000.001
943Thursday, January 16, 2003
of
2D5V_S0
3D3V_S0
SC
SERIES DAMPING PARALLEL TERMINATION
M_SDM_6
M_DATA54
M_DATA55
M_DATA60
M_DATA61
M_SDM_7
M_DATA62
M_DATA63
M_DATA4
M_DATA5
M_SDM_0
M_DATA6
M_DATA7
M_DATA12
M_DATA13
M_SDM_1
M_DQS2
M_DATA18
M_DATA19
M_DATA24
M_DATA25
M_DQS3
M_DATA26
M_DATA27
M_DATA33
M_DATA32
M_DQS4
M_DATA34
M_DATA35
M_DATA40
M_DATA41
M_DQS5
M_DATA1
M_DATA0
M_DQS0
M_DATA2
M_DATA3
M_DATA8
M_DATA9
M_DQS1
M_DATA36
M_DATA37
M_SDM_4
M_DATA38
M_DATA39
M_DATA44
M_DATA45
M_SDM_5
2D5V_S3
RN38
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8 9
SRN10J-3
RN39
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8 9
SRN10J-3
RN21
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8 9
SRN10J-3
RN22
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8 9
SRN10J-3
RN19
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8 9
SRN10J-3
RN37
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8 9
SRN10J-3
PLACE CAPS BETWEEN AND NEAR DDR SKTS
PLACE EACH 0.1UF CAP CLOSE TO POWER
PIN
C247
SCD1U16V
C229
SCD1U16V
C246
SCD1U16V
C241
SCD1U16V
C224
SCD1U16V
12
C137
SC10U10V-U1
M_SDM_R6
M_DATA_R_54
M_DATA_R_55
M_DATA_R_60
M_DATA_R_61
M_SDM_R7
M_DATA_R_62
M_DATA_R_63
M_DATA_R_4
M_DATA_R_5
M_SDM_R0
M_DATA_R_6
M_DATA_R_7
M_DATA_R_12
M_DATA_R_13
M_SDM_R1
M_DQS_R2
M_DATA_R_18
M_DATA_R_19
M_DATA_R_24
M_DATA_R_25
M_DQS_R3
M_DATA_R_26
M_DATA_R_27
M_DATA_R_33
M_DATA_R_32
M_DQS_R4
M_DATA_R_34
M_DATA_R_35
M_DATA_R_40
M_DATA_R_41
M_DQS_R5
M_DATA_R_1
M_DATA_R_0
M_DQS_R0
M_DATA_R_2
M_DATA_R_3
M_DATA_R_8
M_DATA_R_9
M_DQS_R1
M_DATA_R_36
M_DATA_R_37
M_SDM_R4
M_DATA_R_38
M_DATA_R_39
M_DATA_R_44
M_DATA_R_45
M_SDM_R5
12
C257
SCD1U16V
C259
SCD1U16V
C138
SC10U10V-U1
C623
SCD1U16V
C242
SCD1U16V
M_DQS6
M_DATA50
M_DATA51
M_DATA56
M_DATA57
M_DQS7
M_DATA58
M_DATA59
M_SDM_2
M_DATA22
M_DATA23
M_DATA28
M_DATA29
M_SDM_3
M_DATA31
C580
SCD1U16V
C190
SCD1U16V
M_DATA42
M_DATA43
M_DATA49
M_DATA48
M_DATA15
M_DATA14
M_DATA21
M_DATA11
M_DATA10
M_DATA16
M_DATA17
M_DATA46
M_DATA47
M_DATA52
M_DATA53
RN24
1
2
3
4 5
SRN10
RN35
1
2
3
4 5
SRN10
RN20
1
2
3
4 5
SRN10
RN34
1
2
3
4 5
SRN10
RN23
1
2
3
4
5
6
7
8 9
SRN10J-3
RN36
1
2
3
4
5
6
7
8 9
SRN10J-3
C244
SCD1U16V
C581
SCD1U16V
M_DATA_R_42
8
M_DATA_R_43
7
M_DATA_R_49
6
M_DATA_R_48
8
M_DATA_R_15
7
M_DATA_R_14
6
M_DATA_R_20M_DATA20
M_DATA_R_21
8
M_DATA_R_11
M_DATA_R_10
7
M_DATA_R_16
6
M_DATA_R_17
M_DATA_R_46
8
M_DATA_R_47
7
M_DATA_R_52
6
M_DATA_R_53
M_DQS_R6
16
15
M_DATA_R_50
M_DATA_R_51
14
13
M_DATA_R_56
12
M_DATA_R_57
11
M_DQS_R7
10
M_DATA_R_58
M_DATA_R_59
M_SDM_R2
16
15
M_DATA_R_22
M_DATA_R_23
14
M_DATA_R_28
13
M_DATA_R_29
12
11
M_SDM_R3
M_DATA_R_30M_DATA30
10
M_DATA_R_31
C258
SCD1U16V
C188
SCD1U16V
C245
SCD1U16V
C192
SCD1U16V
M_DATA_R_4
M_DATA_R_5
M_SDM_R0
M_DATA_R_7
M_DATA_R_6
M_DATA_R_13
M_DATA_R_12
M_SDM_R1
M_DATA_R_0
M_DATA_R_1
M_DQS_R0
M_DATA_R_2
M_DATA_R_3
M_DATA_R_8
M_DATA_R_9
M_DQS_R1
M_DQS_R2
M_DATA_R_18
M_DATA_R_19
M_DATA_R_24
M_DATA_R_25
M_DQS_R3
M_DATA_R_26
M_DATA_R_27
M_DATA_R_15
M_DATA_R_14
M_DATA_R_21
M_DATA_R_20
M_DATA_R_11
M_DATA_R_10
M_DATA_R_17
M_DATA_R_16
M_SDM_R2
M_DATA_R_22
M_DATA_R_23
M_DATA_R_28
M_DATA_R_29
M_SDM_R3
M_DATA_R_30
M_DATA_R_31
M_DATA_R_46
M_DATA_R_47
M_DATA_R_52
M_DATA_R_53
M_DATA_R_43
M_DATA_R_42
M_DATA_R_48
M_DATA_R_49
M_DATA_R_36
M_SDM_R4
M_DATA_R_37
M_DATA_R_39
M_DATA_R_38
M_DATA_R_44
M_DATA_R_45
M_SDM_R5
M_DATA_R_33
M_DATA_R_32
M_DQS_R4
M_DATA_R_34
M_DATA_R_35
M_DATA_R_40
M_DATA_R_41
M_DQS_R5
M_SDM_R6
M_DATA_R_54
M_DATA_R_55
M_DATA_R_61
M_DATA_R_60
M_SDM_R7
M_DATA_R_63
M_DATA_R_62
M_DQS_R6
M_DATA_R_50
M_DATA_R_51
M_DATA_R_57
M_DATA_R_56
M_DQS_R7
M_DATA_R_58
M_DATA_R_59
RN14
1
2
3
4
5
6
7
8 9
SRN56F
RN4
1
2
3
4
5
6
7
8 9
SRN56F
RN6
1
2
3
4
5
6
7
8 9
SRN56F
RN9
1
2
3
4 5
1
2
3
4 5
RN3 SRN56-1
RN11
1
2
3
4
5
6
7
8 9
SRN56F
RN10 SRN56-1
1
2
3
4 5
1
2
3
4 5
RN5 SRN56-1
RN12
1
2
3
4
5
6
7
8 9
SRN56F
RN7
1
2
3
4
5
6
7
8 9
SRN56F
RN13
1
2
3
4
5
6
7
8 9
SRN56F
RN8
1
2
3
4
5
6
7
8 9
SRN56F
16
15
14
13
12
11
10
16
15
14
13
12
11
10
16
15
14
13
12
11
10
SRN56-1
8
7
6
8
7
6
16
15
14
13
12
11
10
8
7
6
8
7
6
16
15
14
13
12
11
10
16
15
14
13
12
11
10
16
15
14
13
12
11
10
16
15
14
13
12
11
10
1D25V_S0
C169
SCD1U16V
C170
SCD1U16V
C164
SCD1U16V
C166
SCD1U16V
C162
SCD1U16V
C213
SCD1U16V
C218
SCD1U16V
C225
SCD1U16V
C194
SCD1U16V
C231
SCD1U16V
C226
SCD1U16V
C155
SCD1U16V
C156
SCD1U16V
C157
SCD1U16V
C158
SCD1U16V
C153
SCD1U16V
C160
SCD1U16V
C161
SCD1U16V
C239
SCD1U16V
C230
SCD1U16V
PULL HIGH STUBS < 0.8", PLACE RPs CLOSE TO DM2
NO EQUAL LENGTH LIMITATION
CPC Address
RN18
1
M_A1
2
M_A10
M_WE#6,9
M_CS0_R#6,9
M_CS3_R#6,9
M_BS_FR#_19
M_B26,9
M_B46,9
Address / Command
M_RAS#6,9
M_CAS#6,9
M_CS1_R#6,9
M_B56,9
M_B16,9
M_BS_FR#_09
M_CS2_R#6,9
Control
M_CKE2_R#6,9
M_CKE3_R#6,9
M_CKE1_R#6,9
M_CKE0_R#6,9
Title
Size Document Number Rev
A3
Date: Sheet
3
4 5
SRN56
RN15
1
2
3
4 5
SRN56
66.56036.080
RN29
1
M_A8
2
M_A6
3
M_A4
4 5
M_A2
SRN56
RN30
1
M_A0
2
3
4 5
SRN56
RN17
M_A9
1
M_A7
2
M_A5
3
4 5
M_A3
SRN56
RN2
1
2
3
4 5
SRN56
66.56036.080
R198 56R2J-1
1 2
R176 56R2J-1
1 2
RN16
M_A12
M_A11
3
3
SRN560J
RN28
SRN560J
DDR Serial/Terminator Resistor
B2M
M_DATA[63..0] 6
M_DATA_R_[63..0] 9
M_DQS[7..0] 6
M_DQS_R[7..0] 9
M_SDM_[7..0] 6
M_SDM_R[7..0] 9
M_A[12..0] 6,9
1D25V_S0
8
7
6
8
7
6
1D25V_S0
8
7
6
8
7
6
8
7
6
8
7
6
1D25V_S0
2
14
2
14
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
C165
SCD1U16V
C193
SCD1U16V
C227
SCD1U16V
C163
SCD1U16V
C221
SCD1U16V
C219
SCD1U16V
10 43Thursday, January 16, 2003
C159
SCD1U16V
C223
SCD1U16V
C220
SCD1U16V
of
SC
LCD / INVERTER INTERFACE
Layout 40 mil
12
C389
SC10U35V0ZY-U
C390
SC1000P50V3KX
C414
SCD1U50V5KX
LCD_DCBAT DCBATOUT
R366
12
0R5
WLANONLED#
LCDVDD_ON7
3D3V_S0
U63
5
VCC
4
Y
NC7SZ32-U
A
B
GND
C49
SC1U10V3ZY
3D3V_S0
147
3 4
1
2
3
U8B
TSLCX14-U
3D3V_S0
12
12
C405
SCD1U16V
1 2
R452
10KR2
WLANONLED#_KBC 31
802.11_ACT 24
R442
10KR2
12
R386
4K7R3
3D3V_S0
R385
100KR3
3D3V_S3
3D3V_S0
SCD1U16V
U58
SI3445DV-U
4
INV1
31
2
4
6
8
10
12
14
16
18
20
SB
22
24
26
28
30
U56B
147
6
TSLCX08-U
C340
R89 0R2-0
C534
SCD1U16V
LCD_ON
1 2
1 2
R91 0R2-0
R105 DUMMY-R2
1 2
4
5
BRIGHTNESS
FPBACK
3D3V_S0
SMBD_ICH3,9,15,25,38
SMBC_ICH3,9,15,25,38
C65
C63
SCD1U16V
SCD1U16V
3D3V_S0
BL_ON7,38
BACKLT_OFF#14
1
2
5V_S0
FPBACK38
5V_S0
U56A
147
3
TSLCX08-U
COVERUP30,38
LCD CONN
C452
LCDVDD
C447
SCD1U16V
Layout 40 mil
6
D
S
G
3
5
2
1
1
G
SC10U10V6ZY-U
12
R377
1KR3
D
Q30
DUMMY-2N7002
S
2 3
ZZ.27002.031
LCD1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
SYN-CONN40A-1-U
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
32
ETY-CONN30D-U
FPBACK
41
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
NUM#
CAPS#
IDE_LED#
STBY_LED#
PWR_LED#
CHARGE_LED#
BTONLED#
WLANONLED#
LCDVDD
SC10U6D3V5MX
BR
12
C43
TXBCLK+ 7
TXBCLK- 7
TXBOUT2+ 7
TXBOUT2- 7
TXBOUT1+ 7
TXBOUT1- 7
TXBOUT0+ 7
TXBOUT0- 7
TXACLK+ 7
TXACLK- 7
TXAOUT2+ 7
TXAOUT2- 7
TXAOUT1+ 7
TXAOUT1- 7
TXAOUT0+ 7
TXAOUT0- 7
R407 0R2-0
1 2
15 MILS
5V_S5
CAPS#30
NUM#30
IDE_LED#18
BTONLED#31
C465
SC1000P50V
BRIGHTNESS7,30
STBY_LED#15
PWR_LED#15
CHARGE_LED#
PWR_LED#
TOP VIEW
240
LCD CONN
1
C46
C45
SCD1U16V
SCD1U16V
Title
Size Document Number Rev
Custom
Date: Sheet
CHARGE_LED#
C456
SC1000P50V
C484
SC100P
3 2
Q31
MMBT3906-U
1
C455
SC100P
C461
SC100P
39
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LCD/Inverter Connector
B2M
C88
SC1000P50V
11 43Thursday, January 16, 2003
CHG_LED 37
C5
SCD1U16V
of
C702
SCD1U16V
SC
CRT I/F & CONNECTOR
Ferrite bead impedance: 75ohm@100MHz
L5
DAC_RED7
DAC_GREEN7
DAC_BLUE7 CRT_IN#14
12
R11
75R3F
12
R8
75R3F
12
R26
75R3F
C9
DUMMY-SC3P50V3KN
C13
DUMMY-SC3P50V3KN
1 2
BLM11B750S
68.00082.051
L2
1 2
BLM11B750S
68.00082.051
L6
1 2
BLM11B750S
C17
68.00082.051
DUMMY-SC3P50V3KN
ZZ.3R024.1B1
12
C324
SC3P50V3CN
78.3R074.1B1
12
CRT_R
C326
SC3P50V3CN
78.3R074.1B1
CRT_G
12
CRT_B
C328
SC3P50V3CN
78.3R074.1B1
Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
* 37.4_1% resistors must be placed at the same place as the RGB 75 Ohm
pull-down resistors.
Pi-filter & 75 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
RDDP 1.0
Hsync & Vsync level shift
L1
1 2
5V_S0
C333
SCD1U16V
14
R315
DAC_HSYNC7
DAC_VSYNC7
1 2
39R3
R323
1 2
39R3
14
4
5 6
7
2 3
U54B
7
TSAHCT125
1
U54A
TSAHCT125
33R3
L9
1 2
33R3
HSYNC_5
CRT_R
VSYNC_5
5V_S0
JVGA_HS
JVGA_VS
U1
5 4
6
7
8
PACDN009
3
2
1
CRT_G
CRT_B
3D3V_S0
14
1
7
DATDDC3_37
CLKDDC3_37
U55A
TSLCX125
23
5V_S0
D4
CH751H-40
83.R0304.08F
2 1
12
CRT_R
DAT_DDC1_5
CRT_G
JVGA_HS
CRT_B
JVGA_VS
CLK_DDC1_5
12
R3
10KR3
C323
SC100P
R5
2K2R3
C330
SC100P
DDC_CLK & DATA level shift
12
R326
10KR3
3D3V_S03D3V_S0
12
R328
10KR3
3D3V_S0
12
G
1
2 3
S
Q24
2N7002
84.27002.031
12
R327
10KR3
D
1 2
FUSE-1A6V
69.50007.411
R4
2K2R3
C325
SC100P
G
1
2 3
S
Q25
2N7002
84.27002.031
F1
C327
SC100P
DAT_DDC1_5
CLK_DDC1_5
D
5V @ ext. CRT side
5V_CRT_S0
C329
SC100P
C10
SCD01U50V3KX
CRT1
16
MH1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
MH2
17
SKT-VGA15P-U
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
CRT Connector
Size Document Number Rev
A3
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
B2M
12 43Thursday, January 16, 2003
SC
3D3V_S0 TV_AVDD TV_DVDD
1D5V_TV_S0
12
12
C426
SCD1U16V
R410
10KR3F
R402
10KR3F
1 2
1 2
L35
1 2
33R3
TV_VREF
C427
SC10P50V2JN-1
C420
SC10P50V2JN-1
3D3V_S0
1 2
C442
SCD1U16V
1 2
1 2
X2
XTAL-14D318M
20ppm
1 2
R388
10KR3
R378
10KR3
R369
0R3-0-U
Layout 40 mil
12
C360
DUMMY-SC22U10V0ZY-1
R54
1 2
0R3-0-U
63.00000.001
TV_HSYNC7
TV_VSYNC7
TV_I2C_DATA7
TV_I2C_CLK7
TV_CLK7
TV_CLK#7
PCIRST#_314,16
TV_POUT7
TV_AGND
12
C3
SC22U10V0ZY-1
C383
SCD1U16V
TV_XO
TV_XI
TV_AGND
TV_AGND
TV_VDD3D3V_S0
12
R374
140R3F
C372
SC1000P50V
C34
SC4D7U10V5ZY
3
VREF
4
H
5
V
7
GPIO[1]
8
GPIO[0]
10
AS
14
SD
15
SC
57
XCLK
56
XCLK#
43
XO
42
XI/FIN
13
RESET#
47
BCO
46
P-OUT
35
ISET
33
18
VDD
TV Encorder
CH7011A
NC26NC27NC28NC29NC30NC31NC
44
AVDD
49
AVDD
DVDD
12
DVDD
1
DVDD
32
1D5V_TV_S0
45
25
DVDDV
AGND16AGND
AGND
17
41
C70
SCD1U16V
C410
SC4D7U10V5ZY
DGND
DGND
DGND
6
11
64
TV_AGNDTV_AGND
NC19NC20NC21NC22NC23NC24NC
2
9
NC
GND
34
40
C71
SCD1U16V
NC
D[0]
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
D[8]
D[9]
D[10]
D[11]
CVBS
CVBS/B
C/HSYNC
GND
1 2
0R3-0-U
C437
63.00000.001
SCD1U16V
U10
63
62
61
60
59
58
55
54
53
52
51
50
36
39
48
38
C/R
37
Y/G
CH7011-F
L36
C53
SCD1U16V
1D5V_S0
TV_D0
TV_D1
TV_D2
TV_D3
TV_D4
TV_D5
TV_D6
TV_D7
TV_D8
TV_D9
TV_D10
TV_D11
CRMA
LUMA
12
12
R400
75R3
R380
75R3
C59
SCD1U16V
TV_D[0..11] 7
L13
1 2
12
0R3-0-U
C77
SC2D2U16V5ZY
TV_AVDD
12
C7
SC150P
12
C6
SC150P
3D3V_S0
C771
SCD1U16V
SC_EMI
C12
1 2
SC33P
L4
1 2
IND-1D2UH
C11
1 2
SC33P
L3
1 2
IND-1D2UH
1.8uH
C772
SCD1U16V
CRMA_1
C15
SC270P50V3JN
LUMA_1
C14
SC270P50V3JN
ESD Protection Diode
ESD Protection Diode
TV_AVDD
D3
BAV99LT1
2
3
LUMA_1
CRMA_1
D2
BAV99LT1
3
1
2
1
SC
6
4
2
TVCONN_12
C335
DUMMY-SC1000P50V3KX
R317
0R3-0-U
1 2
MH1
1
3
5
TV1
MINDIN4-16
CH7011 Addresss:
0X75
0X76
AS pull-up
AS pull-down
Power up default:
NTSC
PAL
GPIO0 pull-up
GPIO0 pull-down
(int. pull-up)
(int. pull-up)
75 Ohm close to chip 6 MHz Low-Pass filter
close to CONN
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
Date: Sheet
TV Encorder - Chrontel 7011A
Taipei Hsien 221, Taiwan, R.O.C.
B2M
13 43Thursday, January 16, 2003
of
SC
Loading...