LENOVO X1 Carbon 6th Gen Schematics

2 MODULE I/F
CONTROLLER
INTERFACE
CONNECTOR I/F

76.BLANK

77.DD/DC VCC1R8

78.DD/DC VCC1R8_

79.DD/DC VCCPCH

80.BLANK

PU POWER (2/2)

CH POWER

ND
FG/RESERVED

OR

RIDGE(1/2)
RIDGE(1/2)

RBOLT PD
RBOLT DMUX
RBOLT CONNECTOR

KET 3 MODULE I/F

50.BLANK

51.MEC1663

52.MEC1663

53.MEC1663

54.KEYBORD

65.BATTEY CHARGER(BQ2

66.DC/DC VCC5M/VCC3M(T

67.DC/DC IMVP8 CONTROL

68.DC/DC VCCCPUCORE(M

69.DC/DC VCCGFXCORE_I(

70.DC/DC VCCSA(MP86901

EC HISTORY

5

4

3

2

1

D

C

B

D

C

B

TABLE: Chip Capacitor Thermal Characteristics

Code

-55 to 150degC

-55 to 125degC

-55 to 125degC

-55 to 105degC

-55 to 85degC

A

+/-30ppm/degC
+/-30ppm/degC

+/-15%
+/-22%
+/-15%

NPO

C0G

X7R
X6S
X5R

TABLE: Chip Capacitor Tolerance

Tol eran ce Cod e

+/-0.25pF
+/-0.5pF

+/-5%
+/-10%
+/-20%
+80/-20%

C
D

J

K
M

Z

TABLE: Chip Part Dimension

Size [mm]

0.40 x 0.20

0.60 x 0.30

1.00 x 0.50

1.60 x 0.80

2.00 x 1.25

2.00 x 1.60

2.50 x 2.00

3.20 x 1.60

3.20 x 2.50

4.50 x 1.60

4.50 x 2.50

4.50 x 3.20

5.00 x 2.50

6.40 x 3.20

mm Size Code Inch Siz e Code

0402
0603
1005
1608
2125
2016
2520
3216
3225
4516
4525
4532
5025
6432

01005
0201
0402
0603
0805
0806
1008
1206
1210
1806
1810
1812
2010
2512

A

LOGIC

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

EC HISTORY

EC HISTORY

EC HISTORY

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

286

286

286

0.01

0.01

0.01

of

of

of

5

4

3

2

1

D

VCCCPUIO

1

R5

24.9_0201_1%

2

DDIP1_0N30

DDIP1_0P30

DDIP1_1N30

DDIP1_1P30

DDIP1_2N30

DDIP1_2P30

DDIP1_3N30

DDIP1_3P30

C

TABLE : Functional Strap

DDIP2_0N30

DDIP2_0P30

DDIP2_1N30

DDIP2_1P30

DDIP2_2N30

DDIP2_2P30

DDIP2_3N30

DDIP2_3P30

DDIP1_CTRLCLK30

DDIP1_CTRLDATA30

DDIP1_0N

DDIP1_0P

DDIP1_1N

DDIP1_1P

DDIP1_2N

DDIP1_2P

DDIP1_3N

DDIP1_3P

DDIP2_0N

DDIP2_0P

DDIP2_1N

DDIP2_1P

DDIP2_2N

DDIP2_2P

DDIP2_3N

DDIP2_3P

DDIP1_CTRLCLK

DDIP1_CTRLDATA

DDPB_CTRLDATA

HIGH

Port B is detected.

LOW

Port B is not detected.

DDPC_CTRLDATA

HIGH

Port C is detected.

LOW

Port C is not detected.

B

EDP_COMP

VCC3_SUS

1

2

R39

2.2K_0201_5%

U58A

CPU@

E55

DDI1_TXN[0]

F55

DDI1_TXP[0]

E58

DDI1_TXN[1]

F58

DDI1_TXP[1]

F53

DDI1_TXN[2]

G53

DDI1_TXP[2]

F56

DDI1_TXN[3]

G56

DDI1_TXP[3]

C50

DDI2_TXN[0]

D50

DDI2_TXP[0]

C52

DDI2_TXN[1]

D52

DDI2_TXP[1]

A50

DDI2_TXN[2]

B50

DDI2_TXP[2]

D51

DDI2_TXN[3]

C51

DDI2_TXP[3]

L13

GPP_E18/DDPB_CTRLCLK

L12

GPP_E19/DDPB_CTRLDATA

N7

GPP_E20/DDPC_CTRLCLK

N8

GPP_E21/DDPC_CTRLDATA

N11

GPP_E22

N12

GPP_E23

E52

EDP_RCOMP

KABYLAKE-RU_BGA1356

DDI

DISPLAY SIDEBANDS

EDP

EDP_TXN[0]

EDP_TXP[0]

EDP_TXN[1]

EDP_TXP[1]

EDP_TXN[2]

EDP_TXP[2]

EDP_TXN[3]

EDP_TXP[3]

EDP_AUX_N

EDP_AUX_P

EDP_DISP_UTIL

DDI1_AUX_N

DDI1_AUX_P

DDI2_AUXN

DDI2_AUXP

RSVD_50

RSVD_49

GPP_E13/DDPB_HPD0

GPP_E14/DDPC_HPD1

GPP_E15/DDPD_HPD2

GPP_E16/DDPE_HPD3

GPP_E17/EDP_HPD

EDP_BKLTEN

EDP_BKLTCTL

EDP_VDDEN

100K_0201_5%

EDP_TXN0

EDP_TXP0

EDP_TXN1

EDP_TXP1

EDP_TXN2

EDP_TXP2

EDP_TXN3

EDP_TXP3

EDP_AUXN

EDP_AUXP

DDIP1_AUXN

DDIP1_AUXP

DDIP2_AUXN

DDIP2_AUXP

DDIP1_HPD

DDIP2_HPD

2

R2914

1

100K_0201_5%

EDP_TXN0 26

EDP_TXP0 26

EDP_TXN1 26

EDP_TXP1 26

EDP_TXN2 26

EDP_TXP2 26

EDP_TXN3 26

EDP_TXP3 26

EDP_AUXN 26

EDP_AUXP 26

DDIP1_AUXN 30

DDIP1_AUXP 30

DDIP2_AUXN 30

DDIP2_AUXP 30

DDIP1_HPD 30

DDIP2_HPD 30

EDP_HPD 26

VGA_BLON 51

PANEL_BKLT_CTRL 26

PANEL_POWER_ON 61

C47

C46

D46

C45

A45

B45

A47

B47

E45

F45

B52

G50

F50

E48

F48

G46

F46

L9

L7

L6

N9

L10

R12

R11

U13

2

R433

1

100K_0201_5%

2

2

R138

1

100K_0201_5%

2

R8

R2917

1

1

100K_0201_5%

D

C

B

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

CPU(1/16) : DDI/EDP

CPU(1/16) : DDI/EDP

CPU(1/16) : DDI/EDP

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

386

386

386

A

0.01

0.01

0.01

of

of

of

5

M_A_DQ[63:0]5,22

4

3

2

1

D

M_B_DQ[63:0]5,24

D

TAB LE

Pin

AL71
AL68
AN68
AN69
AL70
AL69
AN70
AN71
AR70
AR68

Block 0

AU71
AU68
AR71
AR69
AU70
AU69

C

B

A

Block 2

Block 4

Block 6

BB65

AW65
AW63
AY6 3
BA65
AY6 5
BA63
BB63
BA61
AW61
BB59
AW59
BB61
AY6 1
BA59
AY5 9

AY3 9

AW39
AY3 7
AW37
BB39
BA39
BA37
BB37
AY3 5
AW35
AY3 3
AW33
BB35
BA35
BA33
BB33

AY3 1

AW31
AY2 9
AW29
BB31
BA31
BA29
BB29
AY2 7
AW27
AY2 5
AW25
BB27
BA27
BA25
BB25

Interleave

DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]

DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]

DDR0_DQ[16]
DDR0_DQ[17]
DDR0_DQ[18]
DDR0_DQ[19]
DDR0_DQ[20]
DDR0_DQ[21]
DDR0_DQ[22]
DDR0_DQ[23]
DDR0_DQ[24]
DDR0_DQ[25]
DDR0_DQ[26]
DDR0_DQ[27]
DDR0_DQ[28]
DDR0_DQ[29]
DDR0_DQ[30]
DDR0_DQ[31]

DDR0_DQ[32]
DDR0_DQ[33]
DDR0_DQ[34]
DDR0_DQ[35]
DDR0_DQ[36]
DDR0_DQ[37]
DDR0_DQ[38]
DDR0_DQ[39]
DDR0_DQ[40]
DDR0_DQ[41]
DDR0_DQ[42]
DDR0_DQ[43]
DDR0_DQ[44]
DDR0_DQ[45]
DDR0_DQ[46]
DDR0_DQ[47]

DDR0_DQ[48]
DDR0_DQ[49]
DDR0_DQ[50]
DDR0_DQ[51]
DDR0_DQ[52]
DDR0_DQ[53]
DDR0_DQ[54]
DDR0_DQ[55]
DDR0_DQ[56]
DDR0_DQ[57]
DDR0_DQ[58]
DDR0_DQ[59]
DDR0_DQ[60]
DDR0_DQ[61]
DDR0_DQ[62]
DDR0_DQ[63]

5

Non-Interleave

DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]

DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]

DDR0_DQ[32]
DDR0_DQ[33]
DDR0_DQ[34]
DDR0_DQ[35]
DDR0_DQ[36]
DDR0_DQ[37]
DDR0_DQ[38]
DDR0_DQ[39]
DDR0_DQ[40]
DDR0_DQ[41]
DDR0_DQ[42]
DDR0_DQ[43]
DDR0_DQ[44]
DDR0_DQ[45]
DDR0_DQ[46]
DDR0_DQ[47]

DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]

DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]

DDR1_DQ[32]
DDR1_DQ[33]
DDR1_DQ[34]
DDR1_DQ[35]
DDR1_DQ[36]
DDR1_DQ[37]
DDR1_DQ[38]
DDR1_DQ[39]
DDR1_DQ[40]
DDR1_DQ[41]
DDR1_DQ[42]
DDR1_DQ[43]
DDR1_DQ[44]
DDR1_DQ[45]
DDR1_DQ[46]
DDR1_DQ[47]

LOGIC

M_A_DQ10

M_A_DQ9

M_A_DQ15

M_A_DQ12

M_A_DQ14

M_A_DQ11

M_A_DQ13

M_A_DQ8

M_A_DQ31

M_A_DQ25

M_A_DQ24

M_A_DQ30

M_A_DQ27

M_A_DQ26

M_A_DQ28

M_A_DQ29

M_A_DQ39

M_A_DQ32

M_A_DQ36

M_A_DQ38

M_A_DQ34

M_A_DQ35

M_A_DQ33

M_A_DQ37

M_A_DQ46

M_A_DQ41

M_A_DQ45

M_A_DQ47

M_A_DQ42

M_A_DQ43

M_A_DQ44

M_A_DQ40

M_B_DQ3

M_B_DQ0

M_B_DQ4

M_B_DQ6

M_B_DQ7

M_B_DQ2

M_B_DQ1

M_B_DQ5

M_B_DQ11

M_B_DQ9

M_B_DQ12

M_B_DQ15

M_B_DQ10

M_B_DQ14

M_B_DQ13

M_B_DQ8

M_B_DQ35

M_B_DQ32

M_B_DQ36

M_B_DQ38

M_B_DQ39

M_B_DQ34

M_B_DQ33

M_B_DQ37

M_B_DQ46

M_B_DQ43

M_B_DQ44

M_B_DQ47

M_B_DQ42

M_B_DQ41

M_B_DQ40

M_B_DQ45

U58B

CPU@

DDR4(IL)/LP3-DDR4 (NIL)

AL71

DDR0_DQ[0]/DDR0_DQ[0]

AL68

DDR0_DQ[1]/DDR0_DQ[1]

AN68

DDR0_DQ[2]/DDR0_DQ[2]

AN69

DDR0_DQ[3]/DDR0_DQ[3]

AL70

DDR0_DQ[4]/DDR0_DQ[4]

AL69

DDR0_DQ[5]/DDR0_DQ[5]

AN70

DDR0_DQ[6]/DDR0_DQ[6]

AN71

DDR0_DQ[7]/DDR0_DQ[7]

AR70

DDR0_DQ[8]/DDR0_DQ[8]

AR68

DDR0_DQ[9]/DDR0_DQ[9]

AU71

DDR0_DQ[10]/DDR0_DQ[10]

AU68

DDR0_DQ[11]/DDR0_DQ[11]

AR71

DDR0_DQ[12]/DDR0_DQ[12]

AR69

DDR0_DQ[13]/DDR0_DQ[13]

AU70

DDR0_DQ[14]/DDR0_DQ[14]

AU69

DDR0_DQ[15]/DDR0_DQ[15]

BB65

DDR0_DQ[16]/DDR0_DQ[32]

AW65

DDR0_DQ[17]/DDR0_DQ[33]

AW63

DDR0_DQ[18]/DDR0_DQ[34]

AY63

DDR0_DQ[19]/DDR0_DQ[35]

BA65

DDR0_DQ[20]/DDR0_DQ[36]

AY65

DDR0_DQ[21]/DDR0_DQ[37]

BA63

DDR0_DQ[22]/DDR0_DQ[38]

BB63

DDR0_DQ[23]/DDR0_DQ[39]

BA61

DDR0_DQ[24]/DDR0_DQ[40]

AW61

DDR0_DQ[25]/DDR0_DQ[41]

BB59

DDR0_DQ[26]/DDR0_DQ[42]

AW59

DDR0_DQ[27]/DDR0_DQ[43]

BB61

DDR0_DQ[28]/DDR0_DQ[44]

AY61

DDR0_DQ[29]/DDR0_DQ[45]

BA59

DDR0_DQ[30]/DDR0_DQ[46]

AY59

DDR0_DQ[31]/DDR0_DQ[47]

AY39

DDR0_DQ[32]/DDR1_DQ[0]

AW39

DDR0_DQ[33]/DDR1_DQ[1]

AY37

DDR0_DQ[34]/DDR1_DQ[2]

AW37

DDR0_DQ[35]/DDR1_DQ[3]

BB39

DDR0_DQ[36]/DDR1_DQ[4]

BA39

DDR0_DQ[37]/DDR1_DQ[5]

BA37

DDR0_DQ[38]/DDR1_DQ[6]

BB37

DDR0_DQ[39]/DDR1_DQ[7]

AY35

DDR0_DQ[40]/DDR1_DQ[8]

AW35

DDR0_DQ[41]/DDR1_DQ[9]

AY33

DDR0_DQ[42]/DDR1_DQ[10]

AW33

DDR0_DQ[43]/DDR1_DQ[11]

BB35

DDR0_DQ[44]/DDR1_DQ[12]

BA35

DDR0_DQ[45]/DDR1_DQ[13]

BA33

DDR0_DQ[46]/DDR1_DQ[14]

BB33

DDR0_DQ[47]/DDR1_DQ[15]

AY31

DDR0_DQ[48]/DDR1_DQ[32]

AW31

DDR0_DQ[49]/DDR1_DQ[33]

AY29

DDR0_DQ[50]/DDR1_DQ[34]

AW29

DDR0_DQ[51]/DDR1_DQ[35]

BB31

DDR0_DQ[52]/DDR1_DQ[36]

BA31

DDR0_DQ[53]/DDR1_DQ[37]

BA29

DDR0_DQ[54]/DDR1_DQ[38]

BB29

DDR0_DQ[55]/DDR1_DQ[39]

AY27

DDR0_DQ[56]/DDR1_DQ[40]

AW27

DDR0_DQ[57]/DDR1_DQ[41]

AY25

DDR0_DQ[58]/DDR1_DQ[42]

AW25

DDR0_DQ[59]/DDR1_DQ[43]

BB27

DDR0_DQ[60]/DDR1_DQ[44]

BA27

DDR0_DQ[61]/DDR1_DQ[45]

BA25

DDR0_DQ[62]/DDR1_DQ[46]

BB25

DDR0_DQ[63]/DDR1_DQ[47]

KABYLAKE-RU_BGA1356

DDR CH - A

TAB LE

Pin

AM70
AM69
AT6 9

Block 0

AT7 0

BA64
AY6 4
AY6 0

Block 2

BA60

BA38
AY3 8
AY3 4

Block 4

BA34

BA30
AY3 0
AY2 6

Block 6

BA26

4

Interleave

DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]

DDR0_DQSN[2]
DDR0_DQSP[2]
DDR0_DQSN[3]
DDR0_DQSP[3]

DDR0_DQSN[4]
DDR0_DQSP[4]
DDR0_DQSN[5]
DDR0_DQSP[5]

DDR0_DQSN[6]
DDR0_DQSP[6]
DDR0_DQSN[7]
DDR0_DQSP[7]

LP3/DDR4

DDR0_CKN[0]/DDR0_CKN[0]

DDR0_CKP[0]/DDR0_CKP[0]

DDR0_CKN[1]/DDR0_CKN[1]

DDR0_CKP[1]/DDR0_CKP[1]

LP3/DDR4

DDR0_CKE[0]/DDR0_CKE[0]

DDR0_CKE[1]/DDR0_CKE[1]

DDR0_CKE[2]/NC

DDR0_CKE[3]/NC

LP3/DDR4

DDR0_CS#[0]/DDR0_CS#[0]

DDR0_CS#[1]/DDR0_CS#[1]

DDR0_ODT[0]/DDR0_ODT[0]

NC/DDR0_ODT[1]

LP3/DDR4

DDR0_CAA[0]/DDR0_MA[5]

DDR0_CAA[1]/DDR0_MA[9]

DDR0_CAA[2]/DDR0_MA[6]

DDR0_CAA[3]/DDR0_MA[8]

DDR0_CAA[4]/DDR0_MA[7]

DDR0_CAA[5]/DDR0_BG[0]

DDR0_CAA[6]/DDR0_MA[12]

DDR0_CAA[7]/DDR0_MA[11]

DDR0_CAA[8]/DDR0_ACT#

DDR0_CAA[9]/DDR0_BG[1]

LP3/DDR4

DDR0_CAB[0]/DDR0_MA[13]

DDR0_CAB[1]/DDR0_MA[15]

DDR0_CAB[2]/DDR0_MA[14]

DDR0_CAB[3]/DDR0_MA[16]

DDR0_CAB[4]/DDR0_BA[0]

DDR0_CAB[5]/DDR0_MA[2]

DDR0_CAB[6]/DDR0_BA[1]

DDR0_CAB[7]/DDR0_MA[10]

DDR0_CAB[8]/DDR0_MA[1]

DDR0_CAB[9]/DDR0_MA[0]

NC/DDR0_MA[3]

NC/DDR0_MA[4]

DDR4(IL)/LP3-DDR4 (NIL)

DDR0_DQSN[0]/DDR0_DQSN[0]

DDR0_DQSP[0]/DDR0_DQSP[0]

DDR0_DQSN[1]/DDR0_DQSN[1]

DDR0_DQSP[1]/DDR0_DQSP[1]

DDR0_DQSN[2]/DDR0_DQSN[4]

DDR0_DQSP[2]/DDR0_DQSP[4]

DDR0_DQSN[3]/DDR0_DQSN[5]

DDR0_DQSP[3]/DDR0_DQSP[5]

DDR0_DQSN[4]/DDR1_DQSN[0]

DDR0_DQSP[4]/DDR1_DQSP[0]

DDR0_DQSN[5]/DDR1_DQSN[1]

DDR0_DQSP[5]/DDR1_DQSP[1]

DDR0_DQSN[6]/DDR1_DQSN[4]

DDR0_DQSP[6]/DDR1_DQSP[4]

DDR0_DQSN[7]/DDR1_DQSN[5]

DDR0_DQSP[7]/DDR1_DQSP[5]

LP3/DDR4

NC/DDR0_ALERT#

NC/DDR0_PAR

DDR_VREF_CA

DDR0_VREF_DQ

DDR1_VREF_DQ

DDR_VTT_CNTL

Non-Interleave

DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]

DDR0_DQSN[4]
DDR0_DQSP[4]
DDR0_DQSN[5]
DDR0_DQSP[5]

DDR1_DQSN[0]
DDR1_DQSP[0]
DDR1_DQSN[1]
DDR1_DQSP[1]

DDR1_DQSN[4]
DDR1_DQSP[4]
DDR1_DQSN[5]
DDR1_DQSP[5]

LOGIC

3

AU53

AT53

AU55

AT55

BA56

BB56

AW56

AY56

AU45

AU43

AT45

AT43

BA51

BB54

BA52

AY52

AW52

AY55

AW54

BA54

BA55

AY54

AU46

AU48

AT46

AU50

AU52

AY51

AT48

AT50

BB50

AY50

BA50

BB52

AM70

AM69

AT69

AT70

BA64

AY64

AY60

BA60

BA38

AY38

AY34

BA34

BA30

AY30

AY26

BA26

AW50

AT52

AY67

AY68

BA67

AW67

-M_A_DDRCLK0_1033M

M_A_DDRCLK0_1033M

-M_A_DDRCLK1_1033M

M_A_DDRCLK1_1033M

M_A_CKE0

M_A_CKE1

M_A_CKE2

M_A_CKE3

-M_A_CS0

-M_A_CS1

M_A_ODT0

M_A_CA_A0

M_A_CA_A1

M_A_CA_A2

M_A_CA_A3

M_A_CA_A4

M_A_CA_A5

M_A_CA_A6

M_A_CA_A7

M_A_CA_A8

M_A_CA_A9

M_A_CA_B0

M_A_CA_B1

M_A_CA_B2

M_A_CA_B3

M_A_CA_B4

M_A_CA_B5

M_A_CA_B6

M_A_CA_B7

M_A_CA_B8

M_A_CA_B9

-M_A_DQS1

M_A_DQS1

-M_A_DQS3

M_A_DQS3

-M_A_DQS4

M_A_DQS4

-M_A_DQS5

M_A_DQS5

-M_B_DQS0

M_B_DQS0

-M_B_DQS1

M_B_DQS1

-M_B_DQS4

M_B_DQS4

-M_B_DQS5

M_B_DQS5

DDR_PG_CTRL

VCC1R2A

2

R1858

10K_0201_5%

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

-M_A_DDRCLK0_1033M 22,23

M_A_DDRCLK0_1033M 22,23

-M_A_DDRCLK1_1033M 22,23

M_A_DDRCLK1_1033M 22,23

M_A_CKE0 22,23

M_A_CKE1 22,23

M_A_CKE2 22,23

M_A_CKE3 22,23

-M_A_CS0 22,23

-M_A_CS1 22,23

M_A_ODT0 22,23

LPDDR3_VREF_CA_CPU 23

LPDDR3_VREF_DQ_A_CPU 23

LPDDR3_VREF_DQ_B_CPU 25

VCC3M

2

R1838

100K_0201_5%

1

DDR_VTT_PG_CTRL

1

Q170

2

DTC015TMT2L_VMT3

3

@

2017/02/17

2017/02/17

2017/02/17

M_A_CA_A[9:0] 22,23

M_A_CA_B[9:0] 22,23

-M_A_DQS1 22

M_A_DQS1 22

-M_A_DQS3 22

M_A_DQS3 22

-M_A_DQS4 22

M_A_DQS4 22

-M_A_DQS5 22

M_A_DQS5 22

-M_B_DQS0 24

M_B_DQS0 24

-M_B_DQS1 24

M_B_DQS1 24

-M_B_DQS4 24

M_B_DQS4 24

-M_B_DQS5 24

M_B_DQS5 24

DDR_VTT_PG_CTRL 75

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

TAB LE

BA51
BB54
BA52
AY5 2

AW52
AY5 5
AW54
BA54
BA55
AY5 4

AU46
AU48
AT4 6
AU50
AU52
AY5 1
AT4 8
AT5 0
BB50
AY5 0
BA50
BB52

2014/07/01

2014/07/01

2014/07/01

Pin

DDR3L LPDDR3 DDR4

DDR0_MA[5]
DDR0_MA[9]
DDR0_MA[6]
DDR0_MA[8]
DDR0_MA[7]

DDR0_BA[2]
DDR0_MA[12]
DDR0_MA[11]
DDR0_MA[15]
DDR0_MA[14]

DDR0_MA[13]

DDR0_CAS#
DDR0_WE#
DDR0_RAS#
DDR0_BA[0]
DDR0_MA[2]
DDR0_BA[1]
DDR0_MA[10]
DDR0_MA[1]
DDR0_MA[0]
DDR0_MA[3]
DDR0_MA[4]

DDR0_CAA[0]
DDR0_CAA[1]
DDR0_CAA[2]
DDR0_CAA[3]
DDR0_CAA[4]
DDR0_CAA[5]
DDR0_CAA[6]
DDR0_CAA[7]
DDR0_CAA[8]
DDR0_CAA[9]

DDR0_CAB[0]
DDR0_CAB[1]
DDR0_CAB[2]
DDR0_CAB[3]
DDR0_CAB[4]
DDR0_CAB[5]
DDR0_CAB[6]
DDR0_CAB[7]
DDR0_CAB[8]
DDR0_CAB[9]
Not Used
Not Used

LOGIC

Title

Title

Title

CPU(2/16) : DDR CHANNEL-A

CPU(2/16) : DDR CHANNEL-A

CPU(2/16) : DDR CHANNEL-A

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

DDR0_MA[5]
DDR0_MA[9]
DDR0_MA[6]
DDR0_MA[8]
DDR0_MA[7]
DDR0_BG[0]
DDR0_MA[12]
DDR0_MA[11]
DDR0_ACT#
DDR0_BG[1]

DDR0_MA[13]
DDR0_MA[15]
DDR0_MA[14]
DDR0_MA[16]

DDR0_BA[0]
DDR0_MA[2]
DDR0_BA[1]
DDR0_MA[10]
DDR0_MA[1]
DDR0_MA[0]
DDR0_MA[3]
DDR0_MA[4]

of

486

of

486

of

486

C

B

A

0.01

0.01

0.01

5

4

3

2

1

TAB LE

Pin

AY4 8

AP50
BA48

M_A_DQ[63:0]4,22

D

TAB LE

Pin

AF65
AF64
AK65
AK64
AF66
AF67
AK67
AK66
AF70
AF68

Block 1

AH71
AH68
AF71
AF69
AH70
AH69

C

B

A

Block 3

Block 5

Block 7

AT66

AU66

AP65
AN65
AN66
AP66
AT6 5
AU65
AT6 1
AU61
AP60
AN60
AN61
AP61
AT6 0
AU60

AU40
AT4 0
AT3 7
AU37
AR40

AP40
AP37
AR37
AT3 3
AU33
AU30
AT3 0
AR33
AP33
AR30
AP30

AU27
AT2 7
AT2 5
AU25

AP27
AN27
AN25
AP25
AT2 2
AU22
AU21
AT2 1
AN22
AP22
AP21
AN21

Interleave

DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]

DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]

DDR1_DQ[16]
DDR1_DQ[17]
DDR1_DQ[18]
DDR1_DQ[19]
DDR1_DQ[20]
DDR1_DQ[21]
DDR1_DQ[22]
DDR1_DQ[23]
DDR1_DQ[24]
DDR1_DQ[25]
DDR1_DQ[26]
DDR1_DQ[27]
DDR1_DQ[28]
DDR1_DQ[29]
DDR1_DQ[30]
DDR1_DQ[31]

DDR1_DQ[32]
DDR1_DQ[33]
DDR1_DQ[34]
DDR1_DQ[35]
DDR1_DQ[36]
DDR1_DQ[37]
DDR1_DQ[38]
DDR1_DQ[39]
DDR1_DQ[40]
DDR1_DQ[41]
DDR1_DQ[42]
DDR1_DQ[43]
DDR1_DQ[44]
DDR1_DQ[45]
DDR1_DQ[46]
DDR1_DQ[47]

DDR1_DQ[48]
DDR1_DQ[49]
DDR1_DQ[50]
DDR1_DQ[51]
DDR1_DQ[52]
DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQ[55]
DDR1_DQ[56]
DDR1_DQ[57]
DDR1_DQ[58]
DDR1_DQ[59]
DDR1_DQ[60]
DDR1_DQ[61]
DDR1_DQ[62]
DDR1_DQ[63]

5

M_B_DQ[63:0]4,24

Non-Interleave

DDR0_DQ[16]
DDR0_DQ[17]
DDR0_DQ[18]
DDR0_DQ[19]
DDR0_DQ[20]
DDR0_DQ[21]
DDR0_DQ[22]
DDR0_DQ[23]
DDR0_DQ[24]
DDR0_DQ[25]
DDR0_DQ[26]
DDR0_DQ[27]
DDR0_DQ[28]
DDR0_DQ[29]
DDR0_DQ[30]
DDR0_DQ[31]

DDR0_DQ[48]
DDR0_DQ[49]
DDR0_DQ[50]
DDR0_DQ[51]
DDR0_DQ[52]
DDR0_DQ[53]
DDR0_DQ[54]
DDR0_DQ[55]
DDR0_DQ[56]
DDR0_DQ[57]
DDR0_DQ[58]
DDR0_DQ[59]
DDR0_DQ[60]
DDR0_DQ[61]
DDR0_DQ[62]
DDR0_DQ[63]

DDR1_DQ[16]
DDR1_DQ[17]
DDR1_DQ[18]
DDR1_DQ[19]
DDR1_DQ[20]
DDR1_DQ[21]
DDR1_DQ[22]
DDR1_DQ[23]
DDR1_DQ[24]
DDR1_DQ[25]
DDR1_DQ[26]
DDR1_DQ[27]
DDR1_DQ[28]
DDR1_DQ[29]
DDR1_DQ[30]
DDR1_DQ[31]

DDR1_DQ[48]
DDR1_DQ[49]
DDR1_DQ[50]
DDR1_DQ[51]
DDR1_DQ[52]
DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQ[55]
DDR1_DQ[56]
DDR1_DQ[57]
DDR1_DQ[58]
DDR1_DQ[59]
DDR1_DQ[60]
DDR1_DQ[61]
DDR1_DQ[62]
DDR1_DQ[63]

LOGIC

M_A_DQ18

M_A_DQ22

M_A_DQ16

M_A_DQ20

M_A_DQ23

M_A_DQ19

M_A_DQ21

M_A_DQ17

M_A_DQ2

M_A_DQ0

M_A_DQ6

M_A_DQ4

M_A_DQ7

M_A_DQ3

M_A_DQ5

M_A_DQ1

M_A_DQ50

M_A_DQ54

M_A_DQ49

M_A_DQ48

M_A_DQ51

M_A_DQ55

M_A_DQ53

M_A_DQ52

M_A_DQ62

M_A_DQ59

M_A_DQ56

M_A_DQ60

M_A_DQ61

M_A_DQ63

M_A_DQ58

M_A_DQ57

M_B_DQ18

M_B_DQ19

M_B_DQ21

M_B_DQ17

M_B_DQ23

M_B_DQ22

M_B_DQ20

M_B_DQ16

M_B_DQ26

M_B_DQ30

M_B_DQ29

M_B_DQ28

M_B_DQ31

M_B_DQ27

M_B_DQ24

M_B_DQ25

M_B_DQ54

M_B_DQ50

M_B_DQ51

M_B_DQ55

M_B_DQ49

M_B_DQ48

M_B_DQ52

M_B_DQ53

M_B_DQ57

M_B_DQ62

M_B_DQ58

M_B_DQ61

M_B_DQ63

M_B_DQ59

M_B_DQ56

M_B_DQ60

4

AF65

AF64

AK65

AK64

AF66

AF67

AK67

AK66

AF70

AF68

AH71

AH68

AF71

AF69

AH70

AH69

AT66

AU66

AP65

AN65

AN66

AT65

AU65

AT61

AU61

AP60

AN60

AN61

AP61

AT60

AU60

AU40

AT40

AT37

AU37

AR40

AP40

AP37

AR37

AT33

AU33

AU30

AT30

AR33

AP33

AR30

AP30

AU27

AT27

AT25

AU25

AP27

AN27

AN25

AP25

AT22

AU22

AU21

AT21

AN22

AP22

AP21

AN21

TAB LE

Block 1

Block 3

Block 5

Block 7

AP66

U58C

CPU@

DDR4(IL)/LP3-DDR4 (NIL)

DDR1_DQ[0]/DDR0_DQ[16]

DDR1_DQ[1]/DDR0_DQ[17]

DDR1_DQ[2]/DDR0_DQ[18]

DDR1_DQ[3]/DDR0_DQ[19]

DDR1_DQ[4]/DDR0_DQ[20]

DDR1_DQ[5]/DDR0_DQ[21]

DDR1_DQ[6]/DDR0_DQ[22]

DDR1_DQ[7]/DDR0_DQ[23]

DDR1_DQ[8]/DDR0_DQ[24]

DDR1_DQ[9]/DDR0_DQ[25]

DDR1_DQ[10]/DDR0_DQ[26]

DDR1_DQ[11]/DDR0_DQ[27]

DDR1_DQ[12]/DDR0_DQ[28]

DDR1_DQ[13]/DDR0_DQ[29]

DDR1_DQ[14]/DDR0_DQ[30]

DDR1_DQ[15]/DDR0_DQ[31]

DDR1_DQ[16]/DDR0_DQ[48]

DDR1_DQ[17]/DDR0_DQ[49]

DDR1_DQ[18]/DDR0_DQ[50]

DDR1_DQ[19]/DDR0_DQ[51]

DDR1_DQ[20]/DDR0_DQ[52]

DDR1_DQ[21]/DDR0_DQ[53]

DDR1_DQ[22]/DDR0_DQ[54]

DDR1_DQ[23]/DDR0_DQ[55]

DDR1_DQ[24]/DDR0_DQ[56]

DDR1_DQ[25]/DDR0_DQ[57]

DDR1_DQ[26]/DDR0_DQ[58]

DDR1_DQ[27]/DDR0_DQ[59]

DDR1_DQ[28]/DDR0_DQ[60]

DDR1_DQ[29]/DDR0_DQ[61]

DDR1_DQ[30]/DDR0_DQ[62]

DDR1_DQ[31]/DDR0_DQ[63]

DDR1_DQ[32]/DDR1_DQ[16]

DDR1_DQ[33]/DDR1_DQ[17]

DDR1_DQ[34]/DDR1_DQ[18]

DDR1_DQ[35]/DDR1_DQ[19]

DDR1_DQ[36]/DDR1_DQ[20]

DDR1_DQ[37]/DDR1_DQ[21]

DDR1_DQ[38]/DDR1_DQ[22]

DDR1_DQ[39]/DDR1_DQ[23]

DDR1_DQ[40]/DDR1_DQ[24]

DDR1_DQ[41]/DDR1_DQ[25]

DDR1_DQ[42]/DDR1_DQ[26]

DDR1_DQ[43]/DDR1_DQ[27]

DDR1_DQ[44]/DDR1_DQ[28]

DDR1_DQ[45]/DDR1_DQ[29]

DDR1_DQ[46]/DDR1_DQ[30]

DDR1_DQ[47]/DDR1_DQ[31]

DDR1_DQ[48]/DDR1_DQ[48]

DDR1_DQ[49]/DDR1_DQ[49]

DDR1_DQ[50]/DDR1_DQ[50]

DDR1_DQ[51]/DDR1_DQ[51]

DDR1_DQ[52]/DDR1_DQ[52]

DDR1_DQ[53]/DDR1_DQ[53]

DDR1_DQ[54]/DDR1_DQ[54]

DDR1_DQ[55]/DDR1_DQ[55]

DDR1_DQ[56]/DDR1_DQ[56]

DDR1_DQ[57]/DDR1_DQ[57]

DDR1_DQ[58]/DDR1_DQ[58]

DDR1_DQ[59]/DDR1_DQ[59]

DDR1_DQ[60]/DDR1_DQ[60]

DDR1_DQ[61]/DDR1_DQ[61]

DDR1_DQ[62]/DDR1_DQ[62]

DDR1_DQ[63]/DDR1_DQ[63]

KABYLAKE-RU_BGA1356

Pin

AH66
AH65
AG69
AG70

AR66
AR65
AR61
AR60

AT38

AR38
AT3 2
AR32

AR25
AR27
AR22
AR21

DDR CH - B

Interleave

DDR1_DQSN[0]
DDR1_DQSP[0]
DDR1_DQSN[1]
DDR1_DQSP[1]

DDR1_DQSN[2]
DDR1_DQSP[2]
DDR1_DQSN[3]
DDR1_DQSP[3]

DDR1_DQSN[4]
DDR1_DQSP[4]
DDR1_DQSN[5]
DDR1_DQSP[5]

DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]

LP3/DDR4

DDR1_CKN[0]/DDR1_CKN[0]

DDR1_CKN[1]/DDR1_CKN[1]

DDR1_CKP[0]/DDR1_CKP[0]

DDR1_CKP[1]/DDR1_CKP[1]

LP3/DDR4

DDR1_CKE[0]/DDR1_CKE[0]

DDR1_CKE[1]/DDR1_CKE[1]

DDR1_CKE[2]/NC

DDR1_CKE[3]/NC

LP3/DDR4

DDR1_CS#[0]/DDR1_CS#[0]

DDR1_CS#[1]/DDR1_CS#[1]

DDR1_ODT[0]/DDR1_ODT[0]

NC/DDR1_ODT[1]

LP3/DDR4

DDR1_CAA[0]/DDR1_MA[5]

DDR1_CAA[1]/DDR1_MA[9]

DDR1_CAA[2]/DDR1_MA[6]

DDR1_CAA[3]/DDR1_MA[8]

DDR1_CAA[4]/DDR1_MA[7]

DDR1_CAA[5]/DDR1_BG[0]

DDR1_CAA[6]/DDR1_MA[12]

DDR1_CAA[7]/DDR1_MA[11]

DDR1_CAA[8]/DDR1_ACT#

DDR1_CAA[9]/DDR1_BG[1]

LP3/DDR4

DDR1_CAB[0]/DDR1_MA[13]

DDR1_CAB[1]/DDR1_MA[15]

DDR1_CAB[2]/DDR1_MA[14]

DDR1_CAB[3]/DDR1_MA[16]

DDR1_CAB[4]/DDR1_BA[0]

DDR1_CAB[5]/DDR1_MA[2]

DDR1_CAB[6]/DDR1_BA[1]

DDR1_CAB[7]/DDR1_MA[10]

DDR1_CAB[8]/DDR1_MA[1]

DDR1_CAB[9]/DDR1_MA[0]

NC/DDR1_MA[3]

NC/DDR1_MA[4]

DDR4(IL)/LP3-DDR4 (NIL)

DDR1_DQSN[0]/DDR0_DQSN[2]

DDR1_DQSP[0]/DDR0_DQSP[2]

DDR1_DQSN[1]/DDR0_DQSN[3]

DDR1_DQSP[1]/DDR0_DQSP[3]

DDR1_DQSN[2]/DDR0_DQSN[6]

DDR1_DQSP[2]/DDR0_DQSP[6]

DDR1_DQSN[3]/DDR0_DQSN[7]

DDR1_DQSP[3]/DDR0_DQSP[7]

DDR1_DQSN[4]/DDR1_DQSN[2]

DDR1_DQSP[4]/DDR1_DQSP[2]

DDR1_DQSN[5]/DDR1_DQSN[3]

DDR1_DQSP[5]/DDR1_DQSP[3]

DDR1_DQSN[6]/DDR1_DQSN[6]

DDR1_DQSP[6]/DDR1_DQSP[6]

DDR1_DQSN[7]/DDR1_DQSN[7]

DDR1_DQSP[7]/DDR1_DQSP[7]

LP3/DDR4

NC/DDR1_ALERT#

NC/DDR1_PAR

DRAM_RESET#

DDR_RCOMP[0]

DDR_RCOMP[1]

DDR_RCOMP[2]

Non-Interleave

DDR0_DQSN[2]
DDR0_DQSP[2]
DDR0_DQSN[3]
DDR0_DQSP[3]

DDR0_DQSN[6]
DDR0_DQSP[6]
DDR0_DQSN[7]
DDR0_DQSP[7]

DDR1_DQSN[2]
DDR1_DQSP[2]
DDR1_DQSN[3]
DDR1_DQSP[3]

DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]

LOGIC

AN45

AN46

AP45

AP46

AN56

AP55

AN55

AP53

BB42

AY42

BA42

AW42

AY48

AP50

BA48

BB48

AP48

AP52

AN50

AN48

AN53

AN52

BA43

AY43

AY44

AW44

BB44

AY47

BA44

AW46

AY46

BA46

BB46

BA47

AH66

AH65

AG69

AG70

AR66

AR65

AR61

AR60

AT38

AR38

AT32

AR32

AR25

AR27

AR22

AR21

AN43

AP43

AT13

AR18

AT18

AU18

3

-M_B_DDRCLK0_1033M

-M_B_DDRCLK1_1033M

M_B_DDRCLK0_1033M

M_B_DDRCLK1_1033M

M_B_CKE0

M_B_CKE1

M_B_CKE2

M_B_CKE3

-M_B_CS0

-M_B_CS1

M_B_ODT0

M_B_CA_A0

M_B_CA_A1

M_B_CA_A2

M_B_CA_A3

M_B_CA_A4

M_B_CA_A5

M_B_CA_A6

M_B_CA_A7

M_B_CA_A8

M_B_CA_A9

M_B_CA_B0

M_B_CA_B1

M_B_CA_B2

M_B_CA_B3

M_B_CA_B4

M_B_CA_B5

M_B_CA_B6

M_B_CA_B7

M_B_CA_B8

M_B_CA_B9

-M_A_DQS2

M_A_DQS2

-M_A_DQS0

M_A_DQS0

-M_A_DQS6

M_A_DQS6

-M_A_DQS7

M_A_DQS7

-M_B_DQS2

M_B_DQS2

-M_B_DQS3

M_B_DQS3

-M_B_DQS6

M_B_DQS6

-M_B_DQS7

M_B_DQS7

1

2

R7

R84

R576

200_0201_1%

1

2

80.6_0201_1%

1

2

162_0201_1%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

-M_B_DDRCLK0_1033M 24,25

-M_B_DDRCLK1_1033M 24,25

M_B_DDRCLK0_1033M 24,25

M_B_DDRCLK1_1033M 24,25

M_B_CKE0 24,25

M_B_CKE1 24,25

M_B_CKE2 24,25

M_B_CKE3 24,25

-M_B_CS0 24,25

-M_B_CS1 24,25

M_B_ODT0 24,25

-M_A_DQS2 22

M_A_DQS2 22

-M_A_DQS0 22

M_A_DQS0 22

-M_A_DQS6 22

M_A_DQS6 22

-M_A_DQS7 22

M_A_DQS7 22

-M_B_DQS2 24

M_B_DQS2 24

-M_B_DQS3 24

M_B_DQS3 24

-M_B_DQS6 24

M_B_DQS6 24

-M_B_DQS7 24

M_B_DQS7 24

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

2017/02/17

2017/02/17

2017/02/17

Deciphered Date

2

M_B_CA_A[9:0] 24,25

M_B_CA_B[9:0] 24,25

BB48
AP48
AP52
AN50
AN48
AN53
AN52

BA43
AY4 3
AY4 4

AW44
BB44
AY4 7
BA44
AW46
AY4 6
BA46
BB46
BA47

2014/07/01

2014/07/01

2014/07/01

DDR3L LPDDR3 DDR4

DDR1_MA[5]
DDR1_MA[9]
DDR1_MA[6]
DDR1_MA[8]
DDR1_MA[7]

DDR1_BA[2]
DDR1_MA[12]
DDR1_MA[11]
DDR1_MA[15]
DDR1_MA[14]

DDR1_MA[13]

DDR1_CAS#
DDR1_WE#
DDR1_RAS#
DDR1_BA[0]
DDR1_MA[2]
DDR1_BA[1]
DDR1_MA[10]
DDR1_MA[1]
DDR1_MA[0]
DDR1_MA[3]
DDR1_MA[4]

DDR1_CAA[0]
DDR1_CAA[1]
DDR1_CAA[2]
DDR1_CAA[3]
DDR1_CAA[4]
DDR1_CAA[5]
DDR1_CAA[6]
DDR1_CAA[7]
DDR1_CAA[8]
DDR1_CAA[9]

DDR1_CAB[0]
DDR1_CAB[1]
DDR1_CAB[2]
DDR1_CAB[3]
DDR1_CAB[4]
DDR1_CAB[5]
DDR1_CAB[6]
DDR1_CAB[7]
DDR1_CAB[8]
DDR1_CAB[9]
Not Used
Not Used

LOGIC

Title

Title

Title

CPU(3/16) : DDR CHANNEL-B

CPU(3/16) : DDR CHANNEL-B

CPU(3/16) : DDR CHANNEL-B

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

DDR1_MA[5]
DDR1_MA[9]
DDR1_MA[6]
DDR1_MA[8]
DDR1_MA[7]
DDR1_BG[0]
DDR1_MA[12]
DDR1_MA[11]
DDR1_ACT#
DDR1_BG[1]

DDR1_MA[13]
DDR1_MA[15]
DDR1_MA[14]
DDR1_MA[16]

DDR1_BA[0]
DDR1_MA[2]
DDR1_BA[1]
DDR1_MA[10]
DDR1_MA[1]
DDR1_MA[0]
DDR1_MA[3]
DDR1_MA[4]

of

586

of

586

of

586

D

C

B

A

0.01

0.01

0.01

5

4

3

2

1

D

VCC3B

2

C

PECI52

-PROCHOT52,65,67

-TBT_PLUG_EVENT30

-WWAN_DISABLE41

-ECLPM_BREAK53

B

PECI

-PROCHOT

-WWAN_DISABLE

-ECLPM_BREAK

@

R9777

10K_0201_5%

1

VCCSTG

2

R64

1K_0201_5%

1

1

R2126

R2127

R2128

R2129

2

499_0402_1%

1

2

1

2

1

2

1

2

R85

1

R9772

2

100K_0201_5%

VCCST

2

R3242

1

49.9_0201_1%

49.9_0201_1%

49.9_0201_1%

49.9_0201_1%

1K_0201_5%

VCCST

R9055

2

1

1K_0201_5%

U58D

D63

A54

C65

C63

A65

C55

D55

B54

C56

A6

A7

BA5

AY5

AT16

AU16

H66

H65

KABYLAKE-RU_BGA1356

CPU@

CATERR#

PECI

PROCHOT#

THERMTRIP#

SKTOCC#

CPU MISC

BPM#[0]

BPM#[1]

BPM#[2]

BPM#[3]

GPP_E3/CPU_GP0

GPP_E7/CPU_GP1

GPP_B3/CPU_GP2

GPP_B4/CPU_GP3

PROC_POPIRCOMP

PCH_OPIRCOMP

OPCE_RCOMP

OPC_RCOMP

JTAG

PROC_TCK

PROC_TDI

PROC_TDO

PROC_TMS

PROC_TRST#

PCH_JTAG_TCK

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_JTAG_TMS

PCH_TRST#

JTAGX

B61

D60

A61

C60

B59

B56

D59

A56

C59

C61

A59

2

R2

51_0201_5%

1

XDP_TCK0

XDP_TDI

XDP_TDO

XDP_TMS

-XDP_TRST

XDP_TCK0 19

XDP_TDI 19

XDP_TDO 19

XDP_TMS 19

-XDP_TRST 19

PCH_TCK 19

D

C

B

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

CPU(4/16) : MISC/JTAG

CPU(4/16) : MISC/JTAG

CPU(4/16) : MISC/JTAG

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

686

686

686

A

0.01

0.01

0.01

of

of

of

5

TABLE : Functional Strap

SPI0_MOSI (Boot Halt)

HIGH

Disabled (Default)

LOW

Enabled

4

3

2

1

TABLE : Functional Strap

D

C

B

SPI0_MISO (JTAG ODT Disable)

HIGH

Enabled (Default)

LOW

Disabled

VCC3_SUS

VCC3B

8.2K_0201_5%

2

2

R272

@

2

1K_0201_5%

1

R2559

@

10K_0201_5%

1

U58E

AV2

SPI0_CLK

AW3

SPI0_MISO

AV3

SPI0_MOSI

AW2

SPI0_IO2

AU4

SPI0_IO3

AU3

SPI0_CS0#

AU2

SPI0_CS1#

AU1

SPI0_CS2#

M2

GPP_D1/SPI1_CLK

M3

GPP_D2/SPI1_MISO

J4

GPP_D3/SPI1_MOSI

V1

GPP_D21/SPI1_IO2

V2

GPP_D22/SPI1_IO3

M1

GPP_D0/SPI1_CS#

G3

CL_CLK

G2

CL_DATA

G1

CL_RST#

AW13

GPP_A0/RCIN#

AY11

GPP_A6/SERIRQ

KABYLAKE-RU_BGA1356

1

R860

SPI_CLK21,58

SPI_MISO_IO121,58

SPI_MOSI_IO021,58

SPI_IO221

SPI_IO321

-SPI_CS021

-SPI_CS258

-NFC_DTCT55

CL_CLK_WLAN40

CL_DATA_WLAN40

-CL_RST_WLAN40

-KBRC51

IRQSER51,59

-NFC_DTCT

CL_CLK_WLAN

CL_DATA_WLAN

-CL_RST_WLAN

TABLE : Functional Strap

GPP_C5/SML0ALERT # (LPC or eSPI)

HIGH

eSPI is selected

LOW

LPC is selected (Default)

TABLE : Functional Strap

GPP_C2/SMBALERT# (TLS Confidentiality)

HIGH

Enable ME Crypto TLS with Confidentiality

LOW

Disable ME Crypto TLS (Default)

CPU@

SPI - FLASH

SPI - TOUCH

C LINK

TABLE : Functional Strap

SPI0_IO2 (Consent Strap)

HIGH

LOW

LPC

Enabled (Default)

Disabled

SMBUS, SMLINK

GPP_C0/SMBCLK

GPP_C1/SMBDATA

GPP_C2/SMBALERT#

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT#

GPP_C6/SML1CLK

GPP_C7/SML1DATA

GPP_B23/SML1ALERT#/PCHHOT#

GPP_A1/LAD0/ESPI_IO0

GPP_A2/LAD1/ESPI_IO1

GPP_A3/LAD2/ESPI_IO2

GPP_A4/LAD3/ESPI_IO3

GPP_A5/LFRAME#/ESPI_CS#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

GPP_A10/CLKOUT_LPC1

GPP_A8/CLKRUN#

LOGIC

R7

R8

R10

R9

W2

W1

W3

V3

AM7

AY13

BA13

BB13

AY12

BA12

BA11

AW9

AY9

AW11

VCC3_SUS

2

1

R226

1K_0201_5%

1

LPCCLK_0

LPCCLK_1

LOGIC

2

1

R106

499_0201_1%

LPC_AD0

LPC_AD1

LPC_AD2

LPC_AD3

EMC@

D

VCC3B

2

2

R394

4.7K_0201_5%

1

2

R397

4.7K_0201_5%

1

LPC_AD[3:0] 51,59

-LPC_FRAME 51,59

-SUS_STAT 51,59

LPCCLK_EC_24M 51

LPCCLK_DEBUG_24M 59

1

1

C116

C117

2

2

RF@

22P_0201_25V8-J

22P_0201_25V8-J

RF_NS@

R107

499_0201_1%

1

TP174Test_Point_20MIL

1

2

R193

R220

22_0201_1%

1

2

0_0201_5%EMC_NS@

2

8.2K_0201_5%

1

R28

SMB_CLK

SMB_DATA

SML0_CLK

SML0_DATA

EC_SCL2

EC_SDA2

SMB_CLK 59

SMB_DATA 59

SML0_CLK 38

SML0_DATA 38

EC_SCL2 52

EC_SDA2 52

-CLKRUN 51,59

C

B

TABLE : Functional Strap

SPI0_IO3 (A0 Personality Strap)

HIGH

Disabled (Default)

LOW

Enabled

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

CPU(5/16) : LPC/SPI/SMBUS/C-LINK

CPU(5/16) : LPC/SPI/SMBUS/C-LINK

CPU(5/16) : LPC/SPI/SMBUS/C-LINK

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

786

786

786

A

0.01

0.01

0.01

of

of

of

5

Vinafix

4

3

2

1

D

10K_0201_5%

10K_0201_5%

2

2

1

1

R884

R2340

NFC_DLREQ55

C

TBT_FORCE_PWR30

-EC_SCI51

-EC_WAKE51

I2C0_DATA55

I2C0_CLK55

I2C1_DATA54

I2C1_CLK54

-WWAN_RESET41

-INT_MIC_DTCT26

WWAN_CFG041

WWAN_CFG141

B

-MIC_HW_EN

2

R961

0_0201_5%

1

VCC3_SUS

1K_0201_5%

2

1

R65

@

AH10

AH11

AH12

AF11

AF12

TABLE : Functional Strap

GPP_B22/GSPI1_MOSI (Boot BIOS Destination)

HIGH

Boot BIOS from LPC

LOW

Boot BIOS from SPI (Default)

TABLE : Functional Strap

GPP_B18/GSPI0_MOSI (No Reboot)

HIGH

Enable "No Reboot" Mode

LOW

Disable "No Reboot" Mode (Default)

U58F

CPU@

AN8

AP7

AP8

AR7

AM5

AN7

AP5

AN5

AB1

AB2

W4

AB3

AD1

AD2

AD3

AD4

U7

U6

U8

U9

AH9

LPSS ISH

GPP_B15/GSPI0_CS#

GPP_B16/GSPI0_CLK

GPP_B17/GSPI0_MISO

GPP_B18/GSPI0_MOSI

GPP_B19/GSPI1_CS#

GPP_B20/GSPI1_CLK

GPP_B21/GSPI1_MISO

GPP_B22/GSPI1_MOSI

GPP_C8/UART0_RXD

GPP_C9/UART0_TXD

GPP_C10/UART0_RTS#

GPP_C11/UART0_CTS#

GPP_C20/UART2_RXD

GPP_C21/UART2_TXD

GPP_C22/UART2_RTS#

GPP_C23/UART2_CTS#

GPP_C16/I2C0_SDA

GPP_C17/I2C0_SCL

GPP_C18/I2C1_SDA

GPP_C19/I2C1_SCL

GPP_F4/I2C2_SDA

GPP_F5/I2C2_SCL

GPP_F6/I2C3_SDA

GPP_F7/I2C3_SCL

GPP_F8/I2C4_SDA

GPP_F9/I2C4_SCL

KABYLAKE-RU_BGA1356

LOGIC

GPP_D9

GPP_D10

GPP_D11

GPP_D12

GPP_D5/ISH_I2C0_SDA

GPP_D6/ISH_I2C0_SCL

GPP_D7/ISH_I2C1_SDA

GPP_D8/ISH_I2C1_SCL

GPP_F10/I2C5_SDA/ISH_I2C2_SDA

GPP_F11/I2C5_SCL/ISH_I2C2_SCL

GPP_D13/ISH_UART0_RXD/SML0BDATA

GPP_D14/ISH_UART0_TXD/SML0BCLK

GPP_D15/ISH_UART0_RTS#

GPP_D16/ISH_UART0_CTS#/SML0BALERT#

GPP_C12/UART1_RXD/ISH_UART1_RXD

GPP_C13/UART1_TXD/ISH_UART1_TXD

GPP_C14/UART1_RTS#/ISH_UART1_RTS#

GPP_C15/UART1_CTS#/ISH_UART1_CTS#

SX_EXIT_HOLDOFF#/GPP_A12/BM_BUSY#/ISH_GP6

GPP_A18/ISH_GP0

GPP_A19/ISH_GP1

GPP_A20/ISH_GP2

GPP_A21/ISH_GP3

GPP_A22/ISH_GP4

GPP_A23/ISH_GP5

P2

P3

P4

P1

M4

N3

N1

N2

AD11

AD12

U1

U2

U3

U4

AC1

AC2

AC3

AB4

AY8

BA8

BB7

BA7

AY7

AW7

AP13

TP924

1

Test_Point_20MIL

@

2

R9896

100K_0201_5%

1

WWAN_CFG2 41

WWAN_CFG3 41

TOUCHPANEL_ON 61

D

C

B

A

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

CPU(6/16) : LPSS/ISH

CPU(6/16) : LPSS/ISH

CPU(6/16) : LPSS/ISH

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

886

886

886

0.01

0.01

0.01

of

of

of

5

4

3

2

1

D

VCC3_SUS

1

VCC3_SUS

2

1

@

2

1K_0201_5%

R1009

1K_0201_5%

R846

1

HDA_SYNC44

HDA_BCLK44

HDA_SDO44

HDA_SDIN044

C

B

NFC_ACTIVE55

DMIC_CLK26,44

DMIC_DATA26,44

PCH_SPKR49

DMIC_CLK

DMIC_DATA

PCH_SPKR

R423

R60

R74

R3130

2

2

22P_0201_25V8-J

22P_0201_25V8-JRF@

1

1

C38

C118

2

33_0201_5%

1

2

33_0201_5%

1

2

33_0201_5%

1

2

0_0201_5%@

1

2

R97

R98

33_0201_5%@

1

2

33_0201_5%@

PLACE ON TOP SIDE

VCC3_SUS

TP901

Test_Point_40MIL

1

TEST PAD
BOTTOM SIDE
DO NOT MOVE AFTER FIX

HDA_SYNC_R

HDA_BCLK_R

HDA_SDO_R

NFC_ACTIVE_R

@

R566

1

0_0603_5%

TP175

2

TP900

Test_Point_40MIL

1

Test_Point_20MIL

TABLE : Functional Strap

HDA_SDO/I2S0_TXD

Flash Descriptor Security Override

HIGH

LOW

U58G

CPU@

AUDIO

BA22

HDA_SYNC/I2S0_SFRM

AY22

HDA_BLK/I2S0_SCLK

BB22

HDA_SDO/I2S0_TXD

BA21

HDA_SDI0/I2S0_RXD

AY21

HDA_SDI1/I2S1_RXD

AW22

HDA_RST#/I2S1_SCLK

J5

1

GPP_D23/I2S_MCLK

AY20

I2S1_SFRM

AW20

I2S1_TXD

AK7

GPP_F1/I2S2_SFRM

AK6

GPP_F0/I2S2_SCLK

AK9

GPP_F2/I2S2_TXD

AK10

GPP_F3/I2S2_RXD

H5

GPP_D19/DMIC_CLK0

D7

GPP_D20/DMIC_DATA0

D8

GPP_D17/DMIC_CLK1

C8

GPP_D18/DMIC_DATA1

AW5

GPP_B14/SPKR

KABYLAKE-RU_BGA1356

TABLE : Functional Strap

GPP_B14/SPKR (Top Swap Override)

HIGH

LOW

Disable Flash Descriptor Security (Override)

Enable Flash Descriptor Security (Default)

SDIO/SDXC

GPP_G0/SD_CMD

GPP_G1/SD_DATA0

GPP_G2/SD_DATA1

GPP_G3/SD_DATA2

GPP_G4/SD_DATA3

GPP_G5/SD_CD#

GPP_G6/SD_CLK

GPP_A17/SD_PWR_EN#/ISH_GP7

GPP_A16/SD_1P8_SEL

Enable "Top Swap" Mode

Disable "Top Swap" Mode (Default)

GPP_G7/SD_WP

SD_RCOMP

GPP_F23

AB11

AB13

AB12

W12

W11

W10

W8

W7

BA9

BB9

AB7

AF13

LOGIC

TBT_RTD3_PWR_EN 30

TBT_FORCE_USB_PWR 30

-TBT_PERST 30

-TBT_PCIE_WAKE 30

1

R2131

2

200_0201_1%

D

C

B

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

CPU(7/16) : AUDIO/SDXC

CPU(7/16) : AUDIO/SDXC

CPU(7/16) : AUDIO/SDXC

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

986

986

986

A

0.01

0.01

0.01

of

of

of

5

4

3

2

1

I/O High Speed Signals Configuration Net Name

Port 1

Port 2

Port 3

Port 4

Port 5

Port 6

D

Port 7

Port 8

Port 9

Port 10

Port 11

Port 12

Port 13

Port 14

Port 15

Port 16

C

B

Flexible I/O Configuration

USB3 1

USB3 2/SSIC

USB3 3

USB3 4

USB3 5/PCIE 1

USB3 6/PCIE 2

PCIE 3 (GbE)

PCIE 4 (GbE)

PCIE 5 (GbE)

PCIE 6

PCIE 7/SATA 0

PCIE 8/SATA 1A

PCIE 9 (GbE)

PCIE 10 (GbE)

PCIE 11/SATA 1B

PCIE 12/SATA 2

USB3 1

USB3 2

USB3 3 USB3P2

USB3 4

PCIE 1

PCIE 2

PCIE 3

PCIE 4 (GbE)

PCIE 5 (x4)

PCIE 6 (x4)

PCIE 7 (x4)

GPIO STRAP

PCIE 9 (x4)

PCIE 10 (x4)

PCIE 11 (x4)

PCIE 12 (x4)

PCIE0_RXN40

PCIE0_RXP40

PCIE0_TXN40

PCIE0_TXP40

PCIE2_RXN41

PCIE2_RXP41

PCIE2_TXN41

PCIE2_TXP41

PCIE3_RXN38

PCIE3_RXP38

PCIE3_TXN38

PCIE3_TXP38

PCIE4_L3_RXN35

PCIE4_L3_RXP35

PCIE4_L3_TXN35

PCIE4_L3_TXP35

PCIE4_L2_RXN35

PCIE4_L2_RXP35

PCIE4_L2_TXN35

PCIE4_L2_TXP35

PCIE4_L1_RXN35

PCIE4_L1_RXP35

PCIE4_L1_TXN35

PCIE4_L1_TXP35

PCIE4_L0_SATA1_RXN35

PCIE4_L0_SATA1_RXP35

PCIE4_L0_SATA1_TXN35

PCIE4_L0_SATA1_TXP35

PCIE8_L0_RXN30

PCIE8_L0_RXP30

PCIE8_L0_TXN30

PCIE8_L0_TXP30

PCIE8_L1_RXN30

PCIE8_L1_RXP30

PCIE8_L1_TXN30

PCIE8_L1_TXP30

-XDP_PRDY19

-XDP_PREQ19

PCIE8_L2_RXN30

PCIE8_L2_RXP30

PCIE8_L2_TXN30

PCIE8_L2_TXP30

PCIE8_L3_RXN30

PCIE8_L3_RXP30

PCIE8_L3_TXN30

PCIE8_L3_TXP30

-TPM_IRQ58

USB3P0

USB3P1

N/A

PCIE0

N/A

PCIE2

PCIE3

PCIE4_L3

PCIE4_L2

PCIE4_L1

PCIE4_L0_SATA1

PCIE8_L0

PCIE8_L1

PCIE8_L2

PCIE8_L3

-XDP_PRDY

-XDP_PREQ

-TPM_IRQ

VCC3_SUS

10K_0201_5%

2

1

R2341

R8964

PCIe Port Assignment

0

M.2 WLAN Slot Port 0

1

N/A

2

WWAN

3

GbE PHY

PCIe SSD

4 (x4)

8 (x4) Thunderbolt

U58H

CPU@

PCIE/USB3/SATA

H13

PCIE1_RXN/USB3_5_RXN

G13

PCIE1_RXP/USB3_5_RXP

B17

PCIE1_TXN/USB3_5_TXN

A17

PCIE1_TXP/USB3_5_TXP

G11

PCIE2_RXN/USB3_6_RXN

F11

PCIE2_RXP/USB3_6_RXP

D16

PCIE2_TXN/USB3_6_TXN

C16

PCIE2_TXP/USB3_6_TXP

H16

PCIE3_RXN

G16

PCIE3_RXP

D17

PCIE3_TXN

C17

PCIE3_TXP

G15

PCIE4_RXN

F15

PCIE4_RXP

B19

PCIE4_TXN

A19

PCIE4_TXP

F16

PCIE5_RXN

E16

PCIE5_RXP

C19

PCIE5_TXN

D19

PCIE5_TXP

G18

PCIE6_RXN

F18

PCIE6_RXP

D20

PCIE6_TXN

C20

PCIE6_TXP

F20

PCIE7_RXN/SATA0_RXN

E20

PCIE7_RXP/SATA0_RXP

B21

PCIE7_TXN/SATA0_TXN

A21

PCIE7_TXP/SATA0_TXP

G21

PCIE8_RXN/SATA1A_RXN

F21

PCIE8_RXP/SATA1A_RXP

D21

PCIE8_TXN/SATA1A_TXN

C21

PCIE8_TXP/SATA1A_TXP

E22

PCIE9_RXN

E23

PCIE9_RXP

B23

PCIE9_TXN

A23

PCIE9_TXP

F25

PCIE10_RXN

E25

PCIE10_RXP

D23

PCIE10_TXN

C23

2

100_0201_1%

PCIE_RCOMPN

PCIE_RCOMPP

1

PCIE10_TXP

F5

PCIE_RCOMP_N

E5

PCIE_RCOMP_P

D56

PROC_PRDY#

D61

PROC_PREQ#

BB11

GPP_A7/PIRQA#

E28

PCIE11_RXN/SATA1B_RXN

E27

PCIE11_RXP/SATA1B_RXP

D24

PCIE11_TXN/SATA1B_TXN

C24

PCIE11_TXP/SATA1B_TXP

E30

PCIE12_RXN/SATA2_RXN

F30

PCIE12_RXP/SATA2_RXP

A25

PCIE12_TXN/SATA2_TXN

B25

PCIE12_TXP/SATA2_TXP

KABYLAKE-RU_BGA1356

SATA Port Assignment

0

(PCIE 7)

1A

SATA SSD

1B

(PCIE 11)

2

(PCIE 12)

SSIC / USB3

USB3_2_RXN/SSIC_RXN

USB3_2_RXP/SSIC_RXP

USB3_2_TXN/SSIC_TXN

USB3_2_TXP/SSIC_TXP

USB2

USB2_VBUSSENSE

GPP_E9/USB2_OC0#

GPP_E10/USB2_OC1#

GPP_E11/USB2_OC2#

GPP_E12/USB2_OC3#

GPP_E4/DEVSLP0

GPP_E5/DEVSLP1

GPP_E6/DEVSLP2

GPP_E0/SATAXPCIE0/SATAGP0

GPP_E1/SATAXPCIE1/SATAGP1

GPP_E2/SATAXPCIE2/SATAGP2

GPP_E8/SATALED#

USB3_1_RXN

USB3_1_RXP

USB3_1_TXN

USB3_1_TXP

USB3_3_RXN

USB3_3_RXP

USB3_3_TXN

USB3_3_TXP

USB3_4_RXN

USB3_4_RXP

USB3_4_TXN

USB3_4_TXP

USB2N_1

USB2P_1

USB2N_2

USB2P_2

USB2N_3

USB2P_3

USB2N_4

USB2P_4

USB2N_5

USB2P_5

USB2N_6

USB2P_6

USB2N_7

USB2P_7

USB2N_8

USB2P_8

USB2N_9

USB2P_9

USB2N_10

USB2P_10

USB2_COMP

USB2_ID

VCC3_SUS

D

10K_0201_5%

10K_0201_5%

2

2

1

1

R648

R3174

H8

G8

C13

D13

J6

H6

B13

A13

J10

H10

B15

A15

E10

F10

C15

D15

AB9

AB10

AD6

AD7

AH3

AJ3

AD9

AD10

AJ1

AJ2

AF6

AF7

AH1

AH2

AF8

AF9

AG1

AG2

AH7

AH8

USBCOMP

AB6

AG3

AG4

A9

C9

D9

B9

J1

J2

J3

1

H2

H3

G4

1

H1

1

2

1

R20 100K_0201_5%

Test_Point_20MIL

Test_Point_20MIL

Test_Point_20MIL

TP180

TP182

TP183

R564

R2573

R2580

1

1

1

USB3P0_RXN 36

USB3P0_RXP 36

USB3P0_TXN 36

USB3P0_TXP 36

USB3P1_RXN 36

USB3P1_RXP 36

USB3P1_TXN 36

USB3P1_TXP 36

USB3P2_RXN 42

USB3P2_RXP 42

USB3P2_TXN 42

USB3P2_TXP 42

USBP0- 36

USBP0+ 36

USBP1- 36

USBP1+ 36

TBTA_USB2N 34

TBTA_USB2P 34

TBTB_USB2N 39

TBTB_USB2P 39

USBP4- 26

USBP4+ 26

USBP5- 41

USBP5+ 41

USBP6- 40

USBP6+ 40

USBP7- 26

USBP7+ 26

USBP8- 55

USBP8+ 55

USBP9- 26

USBP9+ 26

2

113_0201_1%

2

0_0201_5%

2

1K_0201_5%

-USB_PORT0_OC0 36

-USB_PORT1_OC1 36

PRIM_CORE_OPT_DIS 79

NFC_INT 55

NFC_ON 55

SATA1_DEVSLP 35

10K_0201_5%

2

1

R9776

VCC3_SUS

2

R44

1

10K_0201_5%

0

1

2

3

4

5

6

7

8

9

0

1

2

3

4

5

BDC_ON

-SATA1_DTCT

USB Port Assignment

USB 3.0 System Port (AOU)

USB 3.0 System Port

TBT port A

TBT port B

IR Camera

M.2 WWAN Slot

M.2 WLAN Slot (Bluetooth)

RGB Camera

Fingerprint Reader

Tou ch Pa nel

USB 3.0 Port Assignment

USB 3.0 System Port (AOU)

USB 3.0 System Port

Media Card Controller

Reserved

(PCIE 1)

(PCIE 2)

BDC_ON 40

-SATA1_DTCT 35

C

B

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CEN TER. AND CONTAINS CO NFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CEN TER. AND CONTAINS CO NFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CEN TER. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

CPU(8/16) : PCIE/USB/SATA

CPU(8/16) : PCIE/USB/SATA

CPU(8/16) : PCIE/USB/SATA

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

10 86

10 86

10 86

A

0.01

0.01

0.01

of

of

of

5

4

3

2

1

D

U58I

CPU@

CSI-2

A36

C

B

CSI2_DN0

B36

CSI2_DP0

C38

CSI2_DN1

D38

CSI2_DP1

C36

CSI2_DN2

D36

CSI2_DP2

A38

CSI2_DN3

B38

CSI2_DP3

C31

CSI2_DN4

D31

CSI2_DP4

C33

CSI2_DN5

D33

CSI2_DP5

A31

CSI2_DN6

B31

CSI2_DP6

A33

CSI2_DN7

B33

CSI2_DP7

A29

CSI2_DN8

B29

CSI2_DP8

C28

CSI2_DN9

D28

CSI2_DP9

A27

CSI2_DN10

B27

CSI2_DP10

C27

CSI2_DN11

D27

CSI2_DP11

KABYLAKE-RU_BGA1356

GPP_D4/FLASHTRIG

EMMC

GPP_F13/EMMC_DATA0

GPP_F14/EMMC_DATA1

GPP_F15/EMMC_DATA2

GPP_F16/EMMC_DATA3

GPP_F17/EMMC_DATA4

GPP_F18/EMMC_DATA5

GPP_F19/EMMC_DATA6

GPP_F20/EMMC_DATA7

GPP_F21/EMMC_RCLK

GPP_F22/EMMC_CLK

GPP_F12/EMMC_CMD

CSI2_CLKN0

CSI2_CLKP0

CSI2_CLKN1

CSI2_CLKP1

CSI2_CLKN2

CSI2_CLKP2

CSI2_CLKN3

CSI2_CLKP3

CSI2_COMP

EMMC_RCOMP

C37

D37

C32

D32

C29

D29

B26

A26

E13

B7

AP2

AP1

AP3

AN3

AN1

AN2

AM4

AM1

AM2

AM3

AP4

AT1

-TP4_INT

PLANARID1

PLANARID2

PLANARID3

MEMORYID0

MEMORYID1

MEMORYID2

MEMORYID3

MEMORYID4

-PSENSE_DTCT

-TAMPER_SW_DTCT

PLANARID0

-TP4_INT 54

Track Point : Same as Yoda-1

-PSENSE_DTCT 44

-TAMPER_SW_DTCT 13

Audio Subcard Detect

D

C

B

TAB LE

LEVEL

1

0

TAB LE

LEVEL

EVT

FVT

SIT

SIT-R

SVT/SOVP

Title

Title

Title

CPU(9/16) : CSI-2/EMMC

CPU(9/16) : CSI-2/EMMC

CPU(9/16) : CSI-2/EMMC

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

2

X76@

R2757

0_0201_5%

1

MEMORYID0

MEMORYID1

MEMORYID2

MEMORYID3

MEMORYID4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2

R43

0_0201_5%

1

@

2017/02/17

2017/02/17

2017/02/17

2

2

R47

R113

0_0201_5%

1

0_0201_5%

1

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

2

Deciphered Date

Deciphered Date

Deciphered Date

TAB LE

MEMORYID[4..0]

00000b

00001b

00010b

00011b

00100b

A

00101b

00110b

00111b

01000b

01001b

01010b

01011b

Micron

Samsung

SK Hynix

5

U170, U171, U172, U173

MT52L512M32D2PF-093WT:B

MT52L1G32D4PG-093WT:B

K4E6E304EB-EGCG
K4EBE304EB-EGCG

H9CCNNNBJTALAR-NVD

H9CCNNNCLGALAR-NVD

16Gbit DDP

32Gbit QDP

16Gbit DDP

32Gbit QDP

16Gbit DDP

32Gbit QDP

Reserved
Reserved

8GB (2133)

16GB (2133)

Reserved

Reserved

8GB (2133)

16GB (2133)

Reserved
Reserved

8GB (2133)

16GB (2133)

4

2

X76@

R2753

0_0201_5%

1

2

X76@

R2754

0_0201_5%

1

2

1

X76@

R2755

0_0201_5%

2

X76@

R2756

0_0201_5%

1

2

0_0201_5%

1

PLANARID0

PLANARID1

PLANARID2

PLANARID3

R48

2014/07/01

2014/07/01

2014/07/01

PLANAR ID

R43 R47

R113

NA

NA NA NA

ASM ASM ASM ASM

PLANARID[3..0]

0000B

0001B

0010B

0011B

0100B

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

R48

0123

of

11 86

of

11 86

of

11 86

A

0.01

0.01

0.01

5

4

3

2

1

D

VCC1R0_SUS

C

-PCIE0_CLK_100M40

PCIE0_CLK_100M40

-CLKREQ_PCIE040

-PCIE2_CLK_100M41

PCIE2_CLK_100M41

-CLKREQ_PCIE241

-PCIE3_CLK_100M38

PCIE3_CLK_100M38

-CLKREQ_PCIE338

-PCIE4_CLK_100M35

PCIE4_CLK_100M35

-CLKREQ_PCIE435

-PCIE8_CLK_100M30

PCIE8_CLK_100M30

-CLKREQ_PCIE830

2

@

R2930

100K_0201_5%

1

B

A

U58J

D42

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

AR10

GPP_B5/SRCCLKREQ0#

B42

CLKOUT_PCIE_N1

A42

CLKOUT_PCIE_P1

AT7

GPP_B6/SRCCLKREQ1#

D41

CLKOUT_PCIE_N2

C41

CLKOUT_PCIE_P2

AT8

GPP_B7/SRCCLKREQ2#

D40

CLKOUT_PCIE_N3

C40

CLKOUT_PCIE_P3

AT10

GPP_B8/SRCCLKREQ3#

B40

CLKOUT_PCIE_N4

A40

CLKOUT_PCIE_P4

AU8

GPP_B9/SRCCLKREQ4#

E40

CLKOUT_PCIE_N5

E38

CLKOUT_PCIE_P5

AU7

GPP_B10/SRCCLKREQ5#

KABYLAKE-RU_BGA1356

CPU@

CLOCK SIGNALS

CLKOUT_ITPXDP_N

CLKOUT_ITPXDP_P

GPD8/SUSCLK

XTAL24_IN

XTAL24_OUT

XCLK_BIASREF

RTCX1

RTCX2

SRTCRST#

RTCRST#

F43

E43

BA17

E37

E35

E42

AM18

AM20

AN18

AM16

XTAL24_IN0

XTAL24_OUT0

XCLK_BIASREF

RTCX1

RTCX2

2

R609

2.71K_0402_0.5%

1

For Y5
A layout is refering to the Intel's white paper(#564413).

2

0_0201_5%

2

6P_0201_25V8-D

2

6P_0201_25V8-D

XTAL24_OUT0_R1

KBLR@

R116

0_0201_5%

2

C205

8P_0201_25V8-D

1

AW69

AW68

AU56

AW48

C7

U12

U11

H11

XTAL24_OUT1

2

1

XTAL24_OUT1_R

2

KBLR@

R9057

0_0201_5%

1

2

C8322

8P_0201_25V8-D

1

24MHZ_8PF_1ZZHAE24000CC0G

Y5

KBL@

KBL@

1

1

GND1

2

24MHz 8pF 30ppm 2016

KDS 1ZZHAE24000CC0G
Epson Q22FA1280055800

CPU@

U58T

RSVD_27

RSVD_22

RSVD_21

RSVD_20

XTAL24_OUT

RSVD_4

RSVD_3

RSVD_19

KABYLAKE-RU_BGA1356

KBLR@

RSVD

2

1

C122

22P_0201_25V8-J

RF_NS@

24MHZ_8PF_1ZZHAE24000CC0G

1

1

GND2

4

KBLR@

R9056

2

1M_0201_1%

Y8

KBLR@

GND1

2

3

3

1

GND2

2

C206

8P_0201_25V8-D

1

F6

RSVD_18

E3

XTAL24_IN

C11

RSVD_26

B11

RSVD_25

A11

RSVD_24

D12

RSVD_55

C12

RSVD_56

F52

RSVD_23

KBLR@

R117

0_0201_5%

2

1

C123

22P_0201_25V8-J

RF_NS@

3

3

C8323

KBLR@

8P_0201_25V8-D

4

2

KBL@

R308

1M_0201_1%

2

R351

10M_0201_5%

1

Unmount

Y5,R308,R133,C205,
C206,R114,R115

Y8,R9056,R9057,
C8322,C8323,R116,R117

1

KBL@

1

R133

C348

2

Y6

32.768KHZ 9PF 9H03280012

1

C326

1

1

SUSCLK_32K 40,51

1

2

R115

R114

0_0201_5%KBL@

1

2

0_0201_5%KBL@

XTAL24_IN0_R

XTAL24_OUT0_R

-SRTCRST 20

-RTCRST 17,20

2

1

2

22P_0201_25V8-JRF_NS@

22P_0201_25V8-JRF_NS@

1

C120

C121

32.768kHz 9pF 20ppm 3215
TXC 9H03280012
KDS 1TJF090DJ1A000B
EPSON X1A000141000200

Mount

KBL_R

Y8,R9056,R9057,

U42

C8322,C8323,R116,R117

KBL

Y5,R308,R133,C205,

U22

C206,R114,R115

KBL@

D

C

B

XTAL24_IN1

2

1

XTAL24_IN1_R

2

A

1

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

CPU(10/16) : CLOCK SIGNALS

CPU(10/16) : CLOCK SIGNALS

CPU(10/16) : CLOCK SIGNALS

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

12 86

12 86

12 86

0.01

0.01

0.01

of

of

of

5

VCC3M

4

3

2

1

U73

VCC3M

VCC3_SUS

5

Vcc

4

OUT

TC7SZ17FE_SON-5

4.7K_0201_5%

2

1

R19

D

C

B

-PLTRST_NEAR35,58

-PLTRST_FAR

2

C460

100P_0201_25V8-J

1

CPUCORE_PWRGD67

R991

1

2

1

-XDP_DBR17,19

-RSMRST19,60

BPWRG52,54,55,59,61

MPWRG61

-PCIE_WAKE30,40,41,60

-LANWAKE38

LANPHYPC38

2

33_0201_5%

1

R993

C46

100P_0201_25V8-J

2

33_0201_5%

MPWRG

VCC3M

2

1

1K_0201_5%

R612

TP160

1

NC

2

IN A

3

GND

Test_Point_20MIL

R21

R617

R203

-SUSWARN

R1884

1

1

1

1

-PLTRST

CPU_PWRGD

1

VCCST_PWRGD

2

0_0201_5%

2

0_0201_5%

2

0_0201_5%

2

0_0201_5%

VCC1R0_SUS

2

1

@

10K_0201_5%

R94

2

1

@

10K_0201_5%

R95

10K_0201_5%

2

1

R96

@

U58K

CPU@

SYSTEM POWER MANAGEMENT

AN10

GPP_B13/PLTRST#

B5

SYS_RESET#

AY17

RSMRST#

A68

PROCPWRGD

B65

VCCST_PWRGD

B6

SYS_PWROK

BA20

PCH_PWROK

BB20

DSW_PWROK

AR13

GPP_A13/SUSWARN#/SUSPWRDNACK

AP11

GPP_A15/SUSACK#

BB15

WAKE#

AM15

GPD2/LAN_WAKE#

AW17

GPD11/LANPHYPC

AT15

GPD7/RSVD

KABYLAKE-RU_BGA1356

-TAMPER_SW_DTCT11

GPP_B12/SLP_S0#

GPD4/SLP_S3#

GPD5/SLP_S4#

GPD10/SLP_S5#

GPD9/SLP_WLAN#

GPD6/SLP_A#

GPD3/PWRBTN#

GPD1/ACPRESENT

GPD0/BATLOW#

GPP_A11/PME#

GPP_B11/EXT_PWR_GATE#

GPP_B2/VRALERT#

S3

1

4

2

3

SPVR310100_4P

SLP_SUS#

SLP_LAN#

INTRUDER#

AT11

AP15

BA16

AY16

AN15

AW15

BB17

AN16

BA15

AY15

AU13

AU11

AP16

AM10

AM11

D

C

B

2

R646

1M_0201_5%

1

2

1

1000P_0201_25V7-K

VCC3M

2

@

R614

10K_0201_5%

1

-PCH_SLP_S0 17,67,72,74,79

-PCH_SLP_S3 17,30,52,60,72

-PCH_SLP_S4 17,52,60,75

-PCH_SLP_S5 17,60

-PCH_SLP_SUS 52

-PCH_SLP_LAN 60

-PCH_SLP_WLAN 52

-PCH_SLP_M 17,60

-PWRSW_EC 52

AC_PRESENT 52

-BATLOW 30,53

2

1

C3249

@

0.1U_0201_6.3V6-K

RTCVCC

-INTRUDER

C7

@

1

2

R10

0_0201_5%

2

R2324

10K_0201_5%

1

1

D

A

5

CPUCORE_ON60,67

CPUCORE_ON

Q194

2

G

LSK3541G1ET2L_VMT3

S

3

4

Q195

2

G

2

R2325

10K_0201_5%

1

1

D

LSK3541G1ET2L_VMT3

S

3

VCCST_PWRGD

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

CPU(11/16) : SYSTEM PM

CPU(11/16) : SYSTEM PM

CPU(11/16) : SYSTEM PM

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

13 86

13 86

13 86

0.01

0.01

0.01

of

of

of

5

4

3

2

1

D

VCCCPUCORE

2

VCCCPUCORE

VCCSTG_CPU

VCCSTG_CPU

VCCCPUCORE

2

R9

100_0201_1%

1

2

R70

100_0201_1%

1

Near CPU

VCCST

56_0201_5%

100_0201_5%

2

2

1

1

R374

R2576

VCC_SENSE

VSS_SENSE

1

2

R781

220_0201_5%

-SVID_ALERT

SVID_CLK

SVID_DATA

VCC_SENSE 67

VSS_SENSE 67

-SVID_ALERT 67

SVID_CLK 67

SVID_DATA 67

VCCSTG

RJ199

G32

G33

G35

G37

G38

G40

G42

J30

J33

J37

J40

K33

K35

K37

K38

K40

K42

K43

E32

E33

B63

A63

D64

G20

1

0.01_0603_LE_1%

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

2

2

1

1

C3321

C3322

VCCCPUCORE

C

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

2

1

1

C3331

C3332

VCCCPUCORE

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

2

1

B

1

C3341

C3342

0.1U_0201_6.3V6-K

2

2

1

1

C3323

C3324

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

2

1

1

C3333

C33334

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

2

1

1

C3343

C3344

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

2

1

C3325

1U_0201_6.3V6-M

2

1

C3335

1U_0201_6.3V6-M

2

1

C3345

2

2

1

C3326

1U_0201_6.3V6-M

2

1

C3336

1U_0201_6.3V6-M

2

1

C3346

2

1

1

C3327

C3328

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

2

1

1

C3338

C3337

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

2

1

1

C3348

C3347

0.1U_0201_6.3V6-K

2

2

1

1

C3329

C3330

VCCCPUCORE

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

2

1

1

C3340

C33339

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

1

C3349

1U_0201_6.3V6-M

2

2

1

1

C3350

C3351

U58L

A30

VCC1

A34

VCC2

A39

VCC3

A44

VCC4

AK33

VCC7

AK35

VCC8

AK37

VCC9

AK38

VCC10

AK40

VCC11

AL33

VCC18

AL37

VCC19

AL40

VCC20

AM32

VCC24

AM33

VCC25

AM35

VCC26

AM37

VCC27

AM38

VCC28

G30

VCC32

K32

RSVD_8

AK32

RSVD_7

AB62

VCCOPC_1

P62

VCCOPC_2

V62

VCCOPC_3

H63

VCC_OPC_1P8_2

G61

VCC_OPC_1P8_1

AC63

VCCOPC_SENSE

AE63

VSSOPC_SENSE

AE62

VCCEOPIO_1

AG62

VCCEOPIO_2

AL63

VCCEOPIO_SENSE

AJ62

VSSEOPIO_SENSE

KABYLAKE-RU_BGA1356

CPU@

CPU POWER 1 OF 4

VCC33

VCC34

VCC35

VCC36

VCC37

VCC38

VCC39

VCC40

VCC41

VCC42

VCC43

VCC50

VCC51

VCC52

VCC53

VCC54

VCC55

VCC56

VCC_SENSE

VSS_SENSE

VIDALERT#

VIDSCK

VIDSOUT

VCCSTG_2

D

C

B

VCCCPUCORE

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

2

2

2

2

1

C3352

A

5

1

1

C3354

C3353

2

1

1

C3355

C3356

10U_0402_6.3V6-M

2

2

1

1

C3357

C3358

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

4

3

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

CPU(12/16) : CPU POWER (1/2)

CPU(12/16) : CPU POWER (1/2)

CPU(12/16) : CPU POWER (1/2)

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

14 86

14 86

14 86

0.01

0.01

0.01

of

of

of

D

VCCCPUCORE_GT

1U_0201_6.3V6-M

2

1

C3359

5

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

2

1

1

C3360

C3361

1U_0201_6.3V6-M

2

2

1

1

C3362

C3363

4

VCCST

RJ200

1

0.01_0603_LE_1%

VCCST_CPU

2

VCCST_CPU

3

VCCSTG_CPU

1U_0201_6.3V6-M

2

1

C2422

VCCPLL VDDQC VCCPLL_OC

VCCST_CPU

1U_0201_6.3V6-M

2

1

C2423

1U_0201_6.3V6-M

2

1

C2424

VCC1R2A

10U_0402_6.3V6-M

10U_0402_6.3V6-M

2

2

1

1

C1184

C3122

2

VCC1R2A

2

10U_0402_6.3V6-M

10U_0402_6.3V6-M

2

1

C1829

10U_0402_6.3V6-M

2

2

1

1

C1830

C1831

2

C840

C3123

1

1

22U_0603_6.3V6M

22U_0603_6.3V6M

2

2

C844

C842

1

1

22U_0603_6.3V6M

22U_0603_6.3V6M

VCC1R2A

1

VCC1R2A

10U_0402_6.3V6-M

2

1

C2426

1U_0201_6.3V6-M

2

1

C2427

D

!"#$%&'()*+,'()*-,'./*/

&&&&&01"2&&&&!$'3)"!!4

5678"92&&&:7$;/;-;;;;;3%".

&&&&&!"<62&&&&'$=>;?!7';;;$

C

9"@%12&&&A";/;-<'<+*;'$

B

VCCGT_SENSE67

VSSGT_SENSE67

VCCGFXCORE_I

A

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

2

1

1

C3365

C3364

VCCGFXCORE_I

U58M

CPU@

CPU POWER 2 OF 4

A58

VCCGT_1

A62

VCCGT_2

A66

VCCGT_3

AA63

VCCGT_4

AA64

VCCGT_5

AA66

VCCGT_6

AA67

VCCGT_7

AA69

VCCGT_8

AA70

VCCGT_9

AA71

VCCGT_10

AC64

VCCGT_11

AC65

VCCGT_12

AC66

VCCGT_13

AC67

VCCGT_14

AC68

VCCGT_15

AC69

VCCGT_16

AC70

VCCGT_17

AC71

VCCGT_18

J53

VCCGT_19

J55

VCCGT_20

J56

1U_0201_6.3V6-M

2

1

C3375

VCCGT_21

J58

VCCGT_22

J60

VCCGT_23

K53

VCCGT_24

K55

VCCGT_25

K56

VCCGT_26

K58

VCCGT_27

K60

VCCGT_28

L62

VCCGT_29

L63

VCCGT_30

L64

VCCGT_31

L65

VCCGT_32

L66

VCCGT_33

L67

VCCGT_34

L68

VCCGT_35

L69

VCCGT_36

L70

VCCGT_37

L71

VCCGT_38

M62

VCCGT_39

N63

VCCGT_40

N64

VCCGT_41

N66

VCCGT_42

N67

VCCGT_43

N69

VCCGT_44

A48

VCCGT_70

A53

VCCGT_71

J43

VCCGT_72

J45

VCCGT_73

J46

VCCGT_74

J48

VCCGT_75

J50

VCCGT_76

J52

VCCGT_77

K48

VCCGT_78

K50

VCCGT_79

J70

VCCGT_SENSE

J69

VSSGT_SENSE

KABYLAKE-RU_BGA1356

1U_0201_6.3V6-M

2

1

C3376

4

1U_0201_6.3V6-M

2

1

C3377

2

0.0002_0805KBLR@

2

0.0002_0805KBL@

2

R2152
100_0201_1%

1

2

R2153
100_0201_1%

1

Near CPU

1U_0201_6.3V6-M

2

1

C3371

VCCCPUCORE_GT

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

1

C3373

C3372

1U_0201_6.3V6-M

2

2

1

1

C3374

VCCCPUCORE

1

R3274

VCCGFXCORE_I

1

R3275

VCCGFXCORE_I

VCCGT_SENSE

VSSGT_SENSE

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

1

C3366

1U_0201_6.3V6-M

2

2

1

1

C3367

C3368

5

1U_0201_6.3V6-M

2

2

1

1

C3369

C3370

VCCGTX_10

VCCGTX_11

VCCGTX_12

VCCGTX_13

VCCGTX_14

VCCGTX_15

VCCGTX_16

VCCCORE_12

VCCCORE_13

VCCCORE_14

VCCCORE_15

VCCCORE_16

VCCCORE_17

VCCCORE_21

VCCCORE_22

VCCCORE_23

VCCCORE_29

VCCCORE_30

VCCCORE_31

VCCGTX_SENSE

VSSGTX_SENSE

VCCGFXCORE_I

10U_0402_6.3V6-M

2

1

C3378

VCCGT_45

VCCGT_46

VCCGT_47

VCCGT_48

VCCGT_49

VCCGT_50

VCCGT_51

VCCGT_52

VCCGT_53

VCCGT_54

VCCGT_55

VCCGT_56

VCCGT_57

VCCGT_58

VCCGT_59

VCCGT_60

VCCGT_61

VCCGT_62

VCCGT_63

VCCGT_64

VCCGT_65

VCCGT_66

VCCGT_67

VCCGT_68

VCCGT_69

VCCGTX_1

VCCGTX_2

VCCGTX_3

VCCGTX_4

VCCGTX_5

VCCGTX_6

VCCGTX_7

VCCGTX_8

VCCGTX_9

RSVD_6

RSVD_5

10U_0402_6.3V6-M

2

1

C3379

N70

N71

R63

R64

R65

R66

R67

R68

R69

R70

R71

T62

U65

U68

U71

W63

W64

W65

W66

W67

W68

W69

W70

W71

Y62

AK53

AK55

AK56

AK58

AK60

AK70

AL53

AL56

AL60

AM53

AM56

AM58

AU58

AU63

BB57

BB66

AK42

AK43

AK45

AK46

AK48

AK50

AL43

AL46

AL50

AM48

AM50

AM52

K52

AK52

AK62

AL61

10U_0402_6.3V6-M

2

1

C3380

VCCGFXCORE_I

VCC_U42_CORE

10U_0402_6.3V6-M

2

1

C3381

VCCSTG_CPU

2

R9878 0.0002_0805

KBLR@

1

10U_0402_6.3V6-M

10U_0402_6.3V6-M

2

2

1

1

C3383

C3382

1

10U_0402_6.3V6-M

2

1

C3384

VCCCPUCORE

TP173Test_Point_20MIL

3

KBL@

2

10U_0402_6.3V6-M

2

1

C3385

VCCST_CPU

VCCGFXCORE_I

R3276

0_0402_5%

VCC1R2A

U58N

CPU@

CPU POWER 3 OF 4

AU23

VDDQ_1

AU28

VDDQ_2

AU35

VDDQ_3

AU42

VDDQ_4

BB23

VDDQ_5

BB32

VDDQ_6

BB41

VDDQ_7

BB47

VDDQ_8

BB51

VDDQ_9

AM40

VDDQC

A18

VCCST

A22

VCCSTG_1

AL23

VCCPLL_OC

K20

VCCPLL_1

K21

VCCPLL_2

KABYLAKE-RU_BGA1356

1

VCCIO_1

VCCIO_2

VCCIO_3

VCCIO_4

VCCIO_5

VCCIO_6

VCCIO_7

VCCSA_1

VCCSA_2

VCCSA_3

VCCSA_4

VCCSA_5

VCCSA_6

VCCSA_7

VCCSA_8

VCCSA_9

VCCSA_10

VCCSA_11

VCCSA_12

VCCSA_13

VCCSA_14

VCCIO_SENSE

VSSIO_SENSE

VSSSA_SENSE

VCCSA_SENSE

Mount

KBL_R

R3274,R9878

U42

KBL

R3275,R3276 R3274,R9878

U22

10U_0402_6.3V6-M

10U_0402_6.3V6-M

2

1

C3386

10U_0402_6.3V6-M

10U_0402_6.3V6-M

2

1

C3387

2

2

1

1

C3389

C3388

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

VCCCPUIO

AK28

AK30

AL30

AL42

AM28

AM30

AM42

AK23

AK25

G23

G25

G27

G28

J22

J23

J27

K23

K25

K27

K28

K30

AM23

AM22

H21

H20

VCCSA

2

1

Unmount

R3275,R3276

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

VCCCPUIO

R2291

100_0201_5%

2014/07/01

2014/07/01

2014/07/01

2

R2290

100_0201_5%

1

2

R2155

100_0201_5%

1

VCCSA

2

R2154

100_0201_5%

1

VSSSA_SENSE

VCCSA_SENSE

VCCSA

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

2

1

1

C3391

C3390

VCCSA

10U_0402_6.3V6-M

10U_0402_6.3V6-M

2

2

1

1

C3288

C3289

Title

Title

Title

CPU(13/16) : CPU POWER (2/2)

CPU(13/16) : CPU POWER (2/2)

CPU(13/16) : CPU POWER (2/2)

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

VCCCPUIO

2

1

C3115

1U_0201_6.3V6-M

VCCCPUIO_SENSE 72

VSSCPUIO_SENSE 72

VSSSA_SENSE 67

VCCSA_SENSE 67

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

2

1

1

C3392

C3393

10U_0402_6.3V6-M

10U_0402_6.3V6-M

2

2

1

1

C3397

C3399

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

2

2

2

1

1

C3117

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

1

C3395

10U_0402_6.3V6-M

2

1

C3400

15 86

15 86

15 86

1

C3118

C

1U_0201_6.3V6-M

B

1U_0201_6.3V6-M

2

1

C3396

10U_0402_6.3V6-M

2

1

C3401

A

0.01

0.01

0.01

of

of

of

C3116

1U_0201_6.3V6-M

1U_0201_6.3V6-M

2

1

C3394

10U_0402_6.3V6-M

2

1

C3398

5

4

3

2

1

D

C

B

VCCMPHY_GATE

VCC1R0_SUS

VCC3M

VCC1R0_SUS

VCCMPHY_GATE

R2302

1

0.01_0603_LE_1%

2

C3236

0.1U_0201_6.3V6-K

1

NEAR V15

2

1

0.01_0603_LE_1%

1

0.01_0603_LE_1%

1

0.01_0603_LE_1%

2

C2447

1

@

22U_0603_6.3V6M

R3203

1

FL83

RJ201

2

RJ202

2

RJ203

2

@

1

MMZ0603AFY560VT_2P

NEAR V15

VCC3M_PCH

VCC1R0_SUS_PRIM

VCCMPHY_GATE_OUT

VCCMPHY_GATE_PLL

2

C2446

1

22U_0603_6.3V6M

2

0_0201_5%@

2

VCC3_SUS

2

C2655

1

0.1U_0201_6.3V6-K

NEAR V15

2

C3237

1

NEAR AJ19 NEAR AJ19

2

C620

1U_0402_6.3V6-K

1

VCC3M_PCH

R3204

@

1

2

0_0201_5%

FL84

1

MMZ0603AFY560VT_2P

NEAR AJ19

0.1U_0201_6.3V6-K

2

VCCPCHCORE

VCCMPHY_GATE_OUT

2

C3238

1

0.1U_0201_6.3V6-K

VCC1R0_SUS_PRIM

VCC1R0_SUS

VCC1R0_SUS

U58O

AB19

VCCPRIM_1P0_1

AB20

VCCPRIM_1P0_2

P18

VCCPRIM_1P0_3

AF18

VCCPRIM_CORE_1

AF19

VCCPRIM_CORE_2

V20

VCCPRIM_CORE_3

V21

VCCPRIM_CORE_4

AL1

DCPDSW_1P0

K17

VCCMPHYAON_1P0_1

L1

VCCMPHYAON_1P0_2

N15

VCCMPHYGT_1P0_1

N16

VCCMPHYGT_1P0_2

N17

VCCMPHYGT_1P0_3

P15

VCCMPHYGT_1P0_4

P16

VCCMPHYGT_1P0_5

K15

VCCAMPHYPLL_1P0_1

L15

VCCAMPHYPLL_1P0_2

V15

VCCAPLL_1P0

AB17

VCCPRIM_1P0_5

Y18

VCCPRIM_1P0_6

AD17

VCCDSW_3P3_1

AD18

VCCDSW_3P3_2

AJ17

VCCDSW_3P3_3

AJ19

VCCHDA

AJ16

VCCSPI

AF20

VCCSRAM_1P0_1

AF21

VCCSRAM_1P0_2

T19

VCCSRAM_1P0_3

T20

VCCSRAM_1P0_4

AJ21

VCCPRIM_3P3_2

AK20

VCCPRIM_1P0_4

N18

VCCAPLLEBB_1P0

KABYLAKE-RU_BGA1356

CPU@

CPU POWER 4 OF 4

R2721

1

0.01_0603_LE_1%

GPP_B0/CORE_VID0

GPP_B1/CORE_VID1

2

VCCPGPPA

VCCPGPPB

VCCPGPPC

VCCPGPPD

VCCPGPPE

VCCPGPPF

VCCPGPPG

VCCPRIM_3P3_1

VCCPRIM_1P0_7

VCCATS_1P8

VCCRTCPRIM_3P3

VCCRTC_1

VCCRTC_2

DCPRTC

VCCCLK1

VCCCLK2

VCCCLK3

VCCCLK4

VCCCLK5

VCCCLK6

VCCMPHY_GATE

AK15

AG15

Y16

Y15

T16

AF16

AD15

V19

T1

AA1

AK17

AK19

BB14

BB10

A14

K19

L21

N20

L19

A10

AN11

AN13

VCC3_SUS

VCC1R8_SUS

VCC3_SUS

2

1

C2885

C2428

22U_0603_6.3V6-M

VCC1R0_SUS_PRIM

VCC1R0_SUS

VCC1R8_SUS

2

1

22U_0603_6.3V6-M

0.1U_0201_6.3V6-K

VCCPCHCORE_VID0 79

VCCPCHCORE_VID1 79

2

1

C2886

C2429

22U_0603_6.3V6-M

2

C763

0.1U_0201_6.3V6-K

1

C795

1

2

VCC1R0_SUS

2

1

22U_0603_6.3V6-M

C2900

2

1

C2430

22U_0603_6.3V6-M

VCC3_SUS

2

C380

1U_0201_6.3V6-M

1

RTCVCC

2

2

C731

1

1

1U_0201_6.3V6-M

0.1U_0201_6.3V6-K

VCCPCHCORE

2

1

C2887

22U_0603_6.3V6-M

2

1

C2431

22U_0603_6.3V6-M

VCC1R0_SUS_CLK2

2

C2450

1

@

VCC1R0_SUS_CLK4

2

C2452

1

@

VCC1R0_SUS_CLK5

2

C2454

1

@

2

1

C2888

22U_0603_6.3V6-M

VCC1R0_SUS

R2304

1

2

0.01_0603_LE_1%

2

C2451

1

@

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

1

0.01_0603_LE_1%

2

C2453

1

@

22U_0603_6.3V6M

1

0.01_0603_LE_1%

2

C2455

1

@

22U_0603_6.3V6M

R2305

R2306

VCC1R0_SUS

2

VCC1R0_SUS

2

D

C

B

VCC1R0_SUS

2

C2433

1U_0201_6.3V6-K

1

NEAR K17 NEAR N15 NEAR N18

A

5

VCCMPHY_GATE_OUT

2

1

4

C2435

1U_0201_6.3V6-M

VCCMPHY_GATE_OUT

2

C2439

1U_0201_6.3V6-M

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

VCC1R8_SUS

2

1

C2444

1U_0201_6.3V6-M

NEAR AA1

2014/07/01

2014/07/01

2014/07/01

Title

Title

Title

CPU(14/16) : PCH POWER

CPU(14/16) : PCH POWER

CPU(14/16) : PCH POWER

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

16 86

16 86

16 86

A

0.01

0.01

0.01

of

of

of

5

4

3

2

1

APS/PETS Interface

VCC3_SUS

D

-PCH_SLP_S013,67,72,74,79

-XDP_DBR13,19

-PWRSWITCH27,39,59,60

-RTCRST12,20

-PCH_SLP_M13,60

-PCH_SLP_S413,52,60,75

-PCH_SLP_S513,60

-PCH_SLP_S313,30,52,60,72

VCC3M

J41

18

NC1

17

NC2

16

NC3

15

SLP_S0#

14

GND1

13

SYS_RESET#

12

GND2

11

PWRBTN#

10

GND3

9

RTCRST#

8

GND4

7

+V3.3DS

6

SLP_A#

5

SLP_S4#

4

SLP_S5#

3

VccDSW3_3

2

SLP_S3#

1

VccSus3_3

FCI_10051922-1810ELF

CONN@

PEG2

PEG1

20

19

D

Test_Point_16MIL @

Test_Point_16MIL @

Test_Point_16MIL @

C

B

TP138

TP139

TP140

U58P

CPU@

GND 1 OF 3

1

1

1

A5

VSS_1

A67

VSS_2

A70

VSS_3

AA2

VSS_4

AA4

VSS_5

AA65

VSS_6

AA68

VSS_7

AB15

VSS_8

AB16

VSS_9

AB18

VSS_10

AB21

VSS_11

AB8

VSS_12

AD13

VSS_13

AD16

VSS_14

AD19

VSS_15

AD20

VSS_16

AD21

VSS_17

AD62

VSS_18

AD8

VSS_19

AE64

VSS_20

AE65

VSS_21

AE66

VSS_22

AE67

VSS_23

AE68

VSS_24

AE69

VSS_25

AF1

VSS_26

AF10

VSS_27

AF15

VSS_28

AF17

VSS_29

AF2

VSS_30

AF4

VSS_31

AF63

VSS_32

AG16

VSS_33

AG17

VSS_34

AG18

VSS_35

AG19

VSS_36

AG20

VSS_37

AG21

VSS_38

AG71

VSS_39

AH13

VSS_40

AH6

VSS_41

AH63

VSS_42

AH64

VSS_43

AH67

VSS_44

AJ15

VSS_45

AJ18

VSS_46

AJ20

VSS_47

AJ4

VSS_48

AK11

VSS_49

AK16

VSS_50

AK18

VSS_51

AK21

VSS_52

AK22

VSS_53

AK27

VSS_54

AK63

VSS_55

AK68

VSS_56

AK69

VSS_57

AK8

VSS_58

AL2

VSS_59

AL28

VSS_60

AL32

VSS_61

AL35

VSS_62

AL38

VSS_63

AL4

VSS_64

AL45

VSS_65

AL48

VSS_66

AL52

VSS_67

AL55

VSS_68

AL58

VSS_69

AL64

VSS_70

KABYLAKE-RU_BGA1356

VSS_71

VSS_72

VSS_73

VSS_74

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

VSS_85

VSS_86

VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92

VSS_93

VSS_94

VSS_95

VSS_96

VSS_97

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125

VSS_126

VSS_127

VSS_128

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_136

VSS_137

VSS_138

VSS_139

VSS_140

AL65

AL66

AM13

AM21

AM25

AM27

AM43

AM45

AM46

AM55

AM60

AM61

AM68

AM71

AM8

AN20

AN23

AN28

AN30

AN32

AN33

AN35

AN37

AN38

AN40

AN42

AN58

AN63

AP10

AP18

AP20

AP23

AP28

AP32

AP35

AP38

AP42

AP58

AP63

AP68

AP70

AR11

AR15

AR16

AR20

AR23

AR28

AR35

AR42

AR43

AR45

AR46

AR48

AR5

AR50

AR52

AR53

AR55

AR58

AR63

AR8

AT2

AT20

AT23

AT28

AT35

AT4

AT42

AT56

AT58

TP141

Test_Point_16MIL @

TP142

Test_Point_16MIL @

TP143

Test_Point_16MIL @

TP144

Test_Point_16MIL @

TP145

Test_Point_16MIL @

1

1

1

1

1

U58Q

AT63

VSS_141

AT68

VSS_142

AT71

VSS_143

AU10

VSS_144

AU15

VSS_145

AU20

VSS_146

AU32

VSS_147

AU38

VSS_148

AV1

VSS_149

AV68

VSS_150

AV69

VSS_151

AV70

VSS_152

AV71

VSS_153

AW10

VSS_154

AW12

VSS_155

AW14

VSS_156

AW16

VSS_157

AW18

VSS_158

AW21

VSS_159

AW23

VSS_160

AW26

VSS_161

AW28

VSS_162

AW30

VSS_163

AW32

VSS_164

AW34

VSS_165

AW36

VSS_166

AW38

VSS_167

AW41

VSS_168

AW43

VSS_169

AW45

VSS_170

AW47

VSS_171

AW49

VSS_172

AW51

VSS_173

AW53

VSS_174

AW55

VSS_175

AW57

VSS_176

AW6

VSS_177

AW60

VSS_178

AW62

VSS_179

AW64

VSS_180

AW66

VSS_181

AW8

VSS_182

AY66

VSS_183

B10

VSS_184

B14

VSS_185

B18

VSS_186

B22

VSS_187

B30

VSS_188

B34

VSS_189

B39

VSS_190

B44

VSS_191

B48

VSS_192

B53

VSS_193

B58

VSS_194

B62

VSS_195

B66

VSS_196

B71

VSS_197

BA1

VSS_198

BA10

VSS_199

BA14

VSS_200

BA18

VSS_201

BA2

VSS_202

BA23

VSS_203

BA28

VSS_204

BA32

VSS_205

BA36

VSS_206

F68

VSS_277

BA45

VSS_208

KABYLAKE-RU_BGA1356

CPU@

GND 2 OF 3

VSS_209

VSS_210

VSS_211

VSS_212

VSS_213

VSS_214

VSS_215

VSS_216

VSS_217

VSS_218

VSS_219

VSS_220

VSS_221

VSS_222

VSS_223

VSS_224

VSS_225

VSS_226

VSS_227

VSS_228

VSS_229

VSS_230

VSS_231

VSS_232

VSS_233

VSS_234

VSS_235

VSS_236

VSS_237

VSS_238

VSS_239

VSS_240

VSS_241

VSS_242

VSS_243

VSS_244

VSS_245

VSS_246

VSS_247

VSS_248

VSS_249

VSS_250

VSS_251

VSS_252

VSS_253

VSS_254

VSS_255

VSS_256

VSS_257

VSS_258

VSS_259

VSS_260

VSS_261

VSS_262

VSS_263

VSS_264

VSS_265

VSS_266

VSS_267

VSS_268

VSS_269

VSS_270

VSS_271

VSS_272

VSS_273

VSS_274

VSS_275

VSS_276

VSS_207

BA62

BA66

BB60

BB64

D22

D25

D58

D6

E53

E56

F28

F32

BA49

BA53

BA57

BA6

BA71

BB18

BB26

BB30

BB34

BB38

BB43

BB55

BB6

BB67

BB70

C1

C25

C5

D10

D11

D14

D18

D26

D30

D34

D39

D44

D45

D47

D48

D53

D62

D66

D69

E11

E15

E18

E21

E46

E50

E6

E65

E71

F1

F13

F2

F22

F23

F27

F33

F35

F37

F38

F4

F40

F42

BA41

CPU@

U58R

GND 3 OF 3

F8

VSS_278

G10

VSS_279

G22

VSS_280

G43

VSS_281

G45

VSS_282

1

TP146

Test_Point_16MIL@

1

TP147

Test_Point_16MIL@

1

TP148

Test_Point_16MIL@

1

TP149

Test_Point_16MIL@

1

TP150

Test_Point_16MIL@

G48

VSS_283

G5

VSS_284

G52

VSS_285

G55

VSS_286

G58

VSS_287

G6

VSS_288

G60

VSS_289

G63

VSS_290

G66

VSS_291

H15

VSS_292

H18

VSS_293

H71

VSS_294

J11

VSS_295

J13

VSS_296

J25

VSS_297

J28

VSS_298

J32

VSS_299

J35

VSS_300

J38

VSS_301

J42

VSS_302

J8

VSS_303

K16

VSS_304

K18

VSS_305

K22

VSS_306

K61

VSS_307

K63

VSS_308

K64

VSS_309

K65

VSS_310

K66

VSS_311

K67

VSS_312

K68

VSS_313

K70

VSS_314

K71

VSS_315

L11

VSS_316

L16

VSS_317

L17

VSS_318

KABYLAKE-RU_BGA1356

VSS_319

VSS_320

VSS_321

VSS_322

VSS_323

VSS_324

VSS_325

VSS_326

VSS_327

VSS_328

VSS_329

VSS_330

VSS_331

VSS_332

VSS_333

VSS_334

VSS_335

VSS_336

VSS_337

VSS_338

VSS_339

VSS_340

VSS_341

VSS_342

VSS_343

VSS_344

VSS_345

VSS_346

VSS_347

VSS_348

VSS_349

VSS_350

VSS_351

VSS_352

VSS_353

VSS_354

VSS_355

VSS_356

VSS_357

VSS_358

VSS_359

L18

L2

L20

L4

L8

N10

N13

N19

N21

N6

N65

N68

P17

P19

P20

P21

R13

R6

T15

T17

T18

T2

T21

T4

U10

U63

U64

U66

U67

U69

U70

V16

V17

V18

W13

W6

W9

Y17

Y19

Y20

Y21

C

B

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

CPU(15/16) : GND

CPU(15/16) : GND

CPU(15/16) : GND

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

17 86

17 86

17 86

A

0.01

0.01

0.01

of

of

of

5

4

3

2

1

TAB LE

CFG0 : Stall Reset Sequence

after PCU PLL Lock until de-asserted

1 : No Stall

0 : Stall

D

CFG319

C

ITP_PMODE

B

CFG3 : MSR Privacy Bit Feature

1 : MSR (C80h) bit[0] setting
0 : MSR (C80h) bit[0] overridden

CFG4 : eDP Enable

1 : Disabled
0 : Enabled

CFG9 : SVID Bus Communication
1 : Enabled
0 : Disabled

TP184

TP185

TP186

TP187

TP188

TP189

TP190

TP191

TP192

TP193

TP194

TP195

2

R1892

@

1

1K_0201_5%

2

2

R8965

1

1K_0201_5%

TP196

R1891

@

1

1K_0201_5%

Test_Point_20MIL

Test_Point_20MIL

Test_Point_20MIL

Test_Point_20MIL

Test_Point_20MIL

Test_Point_20MIL

Test_Point_20MIL

Test_Point_20MIL

Test_Point_20MIL

Test_Point_20MIL

Test_Point_20MIL

Test_Point_20MIL

Test_Point_20MIL

1

R8898

1

1

1

1

1

1

1

1

1

1

1

1

1

2

49.9_0201_1%

U58S

E68

CFG_0

B67

CFG_1

D65

CFG_2

D67

CFG_3

E70

CFG_4

C68

CFG_5

D68

CFG_6

C67

CFG_7

F71

CFG_8

G69

CFG_9

F70

CFG_10

G68

CFG_11

H70

CFG_12

G71

CFG_13

H69

CFG_14

G70

CFG_15

E63

CFG_16

F63

CFG_17

E66

CFG_18

F66

CFG_19

E60

CFG_RCOMP

E8

ITP_PMODE

AY2

RSVD_17

AY1

RSVD_16

D1

RSVD_15

D3

RSVD_14

K46

RSVD_13

K45

RSVD_11

AL25

RSVD_12

AL27

RSVD_10

C71

RSVD_41

B70

RSVD_40

F60

RSVD_39

A52

RSVD_46

BA70

RSVD_TP_6

BA68

RSVD_TP_5

J71

RSVD_48

J68

RSVD_47

F65

VSS_361

G65

VSS_360

F61

RSVD_38

E61

RSVD_37

KABYLAKE-RU_BGA1356

CPU@

RESERVED SIGNALS-1

RSVD_TP_8

RSVD_TP_7

RSVD_TP_2

RSVD_TP_1

RSVD_52

RSVD_51

RSVD_33

RSVD_32

RSVD_31

RSVD_30

RSVD_29

RSVD_28

RSVD_9

RSVD_36

RSVD_35

RSVD_58

RSVD_57

RSVD_2

RSVD_1

RSVD_54

RSVD_53

RSVD_34

RSVD_45

RSVD_44

RSVD_43

RSVD_42

VSS_362

ZVM#

RSVD_TP_4

RSVD_TP_3

MSM#

PROC_SELECT#

BB68

BB69

AK13

AK12

BB2

BA3

1

1

1

1

1

2

1

Test_Point_20MIL

1

Test_Point_20MIL

2

Test_Point_20MIL

Test_Point_20MIL

Test_Point_20MIL

0_0201_5%

AU5

TP5

AT5

TP6

D5

D4

B2

C2

B3

A3

AW1

E1

E2

BA4

BB4

A4

C4

BB5

TP4

A69

B69

R2287

AY3

D71

C70

C54

D54

AY4

TP1

BB3

TP2

R2288

AY71

AR56

AW71

AW70

AP56

C64

0_0201_5%

TP201

TP202

TP198

TP199

TP200

R2289

VCCST

1

2

100K_0201_5%

D

C

B

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

CPU(16/16) : CFG/RESERVED

CPU(16/16) : CFG/RESERVED

CPU(16/16) : CFG/RESERVED

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

18 86

18 86

18 86

A

0.01

0.01

0.01

of

of

of

5

4

3

2

1

D

VCC3B

VCCSTG

51_0201_5%

2

1

R475

2

1K_0201_5%@

VCC1R0_SUS

XDP_TCK1

DCI 2.0

NO_ASM

NO_ASM

NO_ASM

NO_ASM

ASM

ASM

NO_ASM

NO_ASM

NO_ASM

2

@

C8320

0.1U_0201_6.3V6-K

1

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

MOLEX_52435-2671

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

J8

CONN@

GND2

GND1

28

27

VCC1R0_SUS

VCCSTG

VCCSTG

1.5K_0201_1%

51_0201_5%

51_0201_5%

2

Never remove pull-up on -XDP_DBR(SYS_RESET# on PCH side)

XDP_TCK06

PCH_TCK6

XDP_TMS6

XDP_TDI6

-XDP_TRST6

C

B

XDP_TDO6

-XDP_DBR13,17

ITP_PMODE18

-RSMRST13,60

CFG318

XDP_TCK0

PCH_TCK

XDP_TMS

XDP_TDI

-XDP_TRST

XDP_TDO

-XDP_DBR

ITP_PMODE

-RSMRST

51_0201_5%

2

2

C3250

1

@

1

0.1U_0201_6.3V6-K

R3234

@

@

51_0201_5%

2

1

R3235

@

1

@

R3232

TAB LE

2

1

R3233

Logic

2

1

@

R588

R2494

-XDP_PRDY10

-XDP_PREQ10

Page 7

Page 18

Page 19

1

Ref Des

R2559

R1892

J8

C8320

R475

R491

R588

R594

R2494

1K_0201_5%

2

1

R491

2

1

R594

-XDP_PRDY

-XDP_PREQ

0_0201_5%@

Merged

ASM

ASM

ASM

ASM

ASM

ASM

ASM

ASM

ASM

D

C

B

LOGIC

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTER. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTER. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTER. AND CONTAINS CON FIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

XDP CONNECTOR

XDP CONNECTOR

XDP CONNECTOR

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

19 86

19 86

19 86

of

of

of

A

0.01

0.01

0.01

5

D

C

4

J12

CONN@

1

2

GND1

GND2

CVILU_CI1102M1HR0-NH

3

VCC3SW

D290

2

RB520CM-30T2R_VMN2M2

1

2

D6

RB520CM-30T2R_VMN2M2

1

D3

1

2

R4

1K_0201_5%

RB520CM-30T2R_VMN2M2

2

1

1

2

3

4

R620

1

20K_0201_5%

RTCVCC

2

@

C287

1U_0201_6.3V6-K

1

C459

1U_0201_6.3V6-M

-RTCRST

2

2

1

2

-RTCRST 12,17

1

D

C

R250

1

2

20K_0201_5%

B

A

5

4

3

2

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

C285

1U_0201_6.3V6-M

-SRTCRST

2017/02/17

2017/02/17

2017/02/17

-SRTCRST 12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

Title

Title

RTC BATTERY

RTC BATTERY

RTC BATTERY

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

20 86

20 86

20 86

B

A

0.01

0.01

0.01

of

of

of

5

4

3

2

1

D

VCC3_SUS

2

D12

RB520CM-30T2R_VMN2M2

1

VCC3_SUS_SPI

2

0.1U_0201_6.3V6-K

1

C

B

-SPI_CS07

SPI_CLK7,58

SPI_MOSI_IO07,58

SPI_MISO_IO17,58

-SPI_CS0

SPI_CLK

SPI_MOSI_IO0

SPI_MISO_IO1

1

2

R322

R681

R674

R694

33_0201_5%

1

2

33_0201_5%

1

2

33_0201_5%

1

2

33_0201_5%

C629

-SPI_CS0_R

SPI_CLK_0_R

SPI_MOSI_IO0_0_R

SPI_MISO_IO1_0_R

8

VCC

7

/HOLD/RESET(IO3)

6

CLK

5

DI(IO0)

TABL E

SF100 PIN HEADER INTERFACE (TOP VIEW)

1

VCC

3

CS#

5

MISO

7

(KEY)

D12.1
R322.2
R694.2
N/A

GND
R681.2
R674.2
N/A

DO(IO1)

/WP(IO2)

W25Q128JVSIQ_SO8

GND
CLK
MOSI
(RESET)

U49

1

/CS

2

SPI_IO2_0_R

3

SPI_IO3_0_R

4

GND

2
4
6
8

2

C249

0.1U_0201_6.3V6-K

1

R8980

R8981

16MB(128Mb)200ML SOIC8
WINBOND W25Q128JVSIQ

MACRONIX MX25L12873FM2I-10G

1

2

33_0201_5%

1

2

33_0201_5%

SPI_IO2

SPI_IO3

SPI_IO2 7

SPI_IO3 7

D

C

B

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

SPI FLASH

SPI FLASH

SPI FLASH

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

21 86

21 86

21 86

A

0.01

0.01

0.01

of

of

of

5

4

3

2

1

D

C

B

M_A_DQ[63:0]

-M_A_DQS[7:0]

M_A_DQS[7:0]

M_A_CA_A[9:0]

M_A_DDRCLK0_1033M

-M_A_DDRCLK0_1033M

M_A_CKE04,23

M_A_CKE14,23

-M_A_CS04,23

-M_A_CS14,23

M_A_ODT04,23

M_A_DDRCLK0_1033M

-M_A_DDRCLK0_1033M

M_A_CKE0

M_A_CKE1

-M_A_CS0

-M_A_CS1

M_A_ODT0

M_A_CA_A9

M_A_CA_A8

M_A_CA_A7

M_A_CA_A6

M_A_CA_A5

M_A_CA_A4

M_A_CA_A3

M_A_CA_A2

M_A_CA_A1

M_A_CA_A0

2

C2619

1U_0201_6.3V6-M

1

U170A

X76@

J3

CK_T

J2

CK_C

K3

CKE0

K4

CKE1

L3

CS0_N

L4

CS1_N

J8

ODT

C2

CA9

D2

CA8

E2

CA7

E3

CA6

F3

CA5

M3

CA4

N3

CA3

N2

CA2

P2

CA1

R2

CA0

C4

NC_6

K9

NC_7

R3

NC_8

A1

DNU_1

A2

DNU_2

B1

DNU_3

A12

DNU_4

A13

DNU_5

B13

DNU_6

T1

DNU_7

U1

DNU_8

U2

DNU_9

T13

DNU_10

U12

DNU_11

U13

DNU_12

C3

VSSCA_1

D3

VSSCA_2

F4

VSSCA_3

G3

VSSCA_4

G4

VSSCA_5

J4

VSSCA_6

M4

VSSCA_7

P3

VSSCA_8

H9CCNNN8GTALAR-NUD_FBGA178

VCC1R8A

VDD1_1

VDD1_2

VDD1_3

VDD1_4

VDD1_5

VDD1-6

VDD1_7

VDD1_8

VDD1_9

VDD1_10

VREF(CA)

VDD2_1

VDD2_2

VDD2_3

VDD2_4

VDD2_5

VDD2_6

VDD2_7

VDD2_8

VDD2_9

VDD2_10

VDD2_11

VDD2_12

VDD2_13

VDD2_14

VDD2_15

VDD2_16

VDD2_17

VDD2_18

VDD2_19

VDD2_20

NC_1

NC_2

NC_3

NC_4

NC_5

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

2

C2620

1U_0201_6.3V6-M

1

A3

A4

A5

A6

A10

U3

U4

U5

U6

U10

H4

A8

A9

D4

D5

D6

G5

H5

H6

H12

J5

J6

K5

K6

K12

L5

P4

P5

P6

U8

U9

F2

G2

H3

L2

M2

B2

B5

C5

E4

E5

F5

H2

J12

K2

L6

M5

N4

N5

R4

R5

T2

T3

T4

T5

VCC1R8A

VCC1R8A

LPDDR3_VREF_CA

2

47P_0201_25V8-JRF_NS@

1

C124

2

C2623

10U_0402_6.3V6-M

1

VCC1R2A

2

47P_0201_25V8-JRF_NS@

1

C125

2

47P_0201_25V8-JRF_NS@

1

C126

LPDDR3_VREF_CA

2

C2556

.047U_0201_6.3V6-K

1

LPDDR3_VREF_DQ_A

M_A_DQ31

M_A_DQ30

M_A_DQ29

M_A_DQ28

M_A_DQ27

M_A_DQ26

M_A_DQ25

M_A_DQ24

M_A_DQS3

-M_A_DQS3

M_A_DQ23

M_A_DQ22

M_A_DQ21

M_A_DQ20

M_A_DQ19

M_A_DQ18

M_A_DQ17

M_A_DQ16

M_A_DQS2

-M_A_DQS2

M_A_DQ15

M_A_DQ14

M_A_DQ13

M_A_DQ12

M_A_DQ11

M_A_DQ10

M_A_DQ9

M_A_DQ8

M_A_DQS1

-M_A_DQS1

M_A_DQ7

M_A_DQ6

M_A_DQ5

M_A_DQ4

M_A_DQ3

M_A_DQ2

M_A_DQ1

M_A_DQ0

M_A_DQS0

-M_A_DQS0

2

C2558

.047U_0201_6.3V6-K

1

B10

B11

C10

C11

D10

D11

R11

R10

T11

T10

P10

P11

E10

E11

F10

F11

G10

G11

M11

M10

N11

N10

L10

L11

M_A_CA_B[9:0]4,23

U170B

X76@

B8

DQ31

DQ30

DQ29

DQ28

DQ27

DQ26

DQ25

DQ24

DQS3_T

DQS3_Q

DM3

DQ23

DQ22

DQ21

DQ20

DQ19

DQ18

DQ17

DQ16

DQS2_T

DQS2_C

DM2

DQ15

DQ14

DQ13

DQ12

DQ11

DQ10

DQ9

DQ8

DQS1_T

DQS1_C

DM1

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

DSQ0_T

DQS0_C

DM0

Vref(DQ)

VDDQ_1

VDDQ_2

VDDQ_3

VDDQ_4

VDDQ_5

VDDQ_6

VDDQ_7

VDDQ_8

VDDQ_9

VDDQ_10

VDDQ_11

VDDQ_12

VDDQ_13

VDDQ_14

VDDQ_15

VDDQ_16

VDDQ_17

VSSQ_1

VSSQ_2

VSSQ_3

VSSQ_4

VSSQ_5

VSSQ_6

VSSQ_7

VSSQ_8

VSSQ_9

VSSQ_10

VSSQ_11

VSSQ_12

VSSQ_13

VSSQ_14

VSSQ_15

VSSQ_16

VSSQ_17

VSSQ_18

VSSQ_19

B9

C8

C9

D8

R9

R8

T9

T8

P8

D9

E9

F8

F9

G8

M9

M8

N9

P9

L8

H9CCNNN8GTALAR-NUD_FBGA178

NC_9

ZQ

LPDDR3_VREF_DQ_A

J11

A11

C12

E8

E12

G12

H8

H9

H11

J9

J10

K8

K11

L12

N8

N12

R12

U11

B6

B12

C6

D12

E6

F6

F12

G6

G9

H10

K10

L9

M6

M12

N6

P12

R6

T6

T12

B4

B3

2

R9009

243_0201_1%

1

VCC1R8A

2

1

VCC1R2A

2

2

47P_0201_25V8-JRF_NS@

47P_0201_25V8-JRF_NS@

1

1

C127

C128

2

R9011

243_0201_1%

1

C2621

1U_0201_6.3V6-M

M_A_DDRCLK1_1033M4,23

-M_A_DDRCLK1_1033M4,23

2

1

M_A_CKE24,23

M_A_CKE34,23

C2622

1U_0201_6.3V6-M

VCC1R8A

2

1

M_A_DDRCLK1_1033M

-M_A_DDRCLK1_1033M

M_A_CKE2

M_A_CKE3

-M_A_CS0

-M_A_CS1

M_A_ODT0

M_A_CA_B9

M_A_CA_B8

M_A_CA_B7

M_A_CA_B6

M_A_CA_B5

M_A_CA_B4

M_A_CA_B3

M_A_CA_B2

M_A_CA_B1

M_A_CA_B0

C2624

10U_0402_6.3V6-M

A12

A13

B13

T13

U12

U13

LPDDR3_VREF_CA

2

C2557

.047U_0201_6.3V6-K

1

U171A

X76@

J3

CK_T

J2

CK_C

K3

CKE0

K4

CKE1

L3

CS0_N

L4

CS1_N

J8

ODT

C2

D2

E2

E3

F3

M3

N3

N2

P2

R2

C4

K9

R3

A1

A2

B1

T1

U1

U2

C3

D3

F4

G3

G4

J4

M4

P3

VDD1_10

CA9

VREF(CA)

CA8

CA7

CA6

CA5

CA4

CA3

CA2

CA1

CA0

VDD2_10

NC_6

VDD2_11

NC_7

VDD2_12

NC_8

VDD2_13

VDD2_14

VDD2_15

VDD2_16

VDD2_17

VDD2_18

DNU_1

VDD2_19

DNU_2

VDD2_20

DNU_3

DNU_4

DNU_5

DNU_6

DNU_7

DNU_8

DNU_9

DNU_10

DNU_11

DNU_12

VSSCA_1

VSSCA_2

VSSCA_3

VSSCA_4

VSSCA_5

VSSCA_6

VSSCA_7

VSSCA_8

H9CCNNN8GTALAR-NUD_FBGA178

VDD1_1

VDD1_2

VDD1_3

VDD1_4

VDD1_5

VDD1-6

VDD1_7

VDD1_8

VDD1_9

VDD2_1

VDD2_2

VDD2_3

VDD2_4

VDD2_5

VDD2_6

VDD2_7

VDD2_8

VDD2_9

NC_1

NC_2

NC_3

NC_4

NC_5

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

LPDDR3_VREF_DQ_A

VCC1R8A

A3

A4

A5

A6

A10

U3

U4

U5

U6

U10

H4

A8

A9

D4

D5

D6

G5

H5

H6

H12

J5

J6

K5

K6

K12

L5

P4

P5

P6

U8

U9

F2

G2

H3

L2

M2

B2

B5

C5

E4

E5

F5

H2

J12

K2

L6

M5

N4

N5

R4

R5

T2

T3

T4

T5

2

C2559

.047U_0201_6.3V6-K

1

LPDDR3_VREF_CA

2

47P_0201_25V8-JRF_NS@

1

C129

D

LPDDR3_VREF_DQ_A

VCC1R2A

M_A_DQ63

M_A_DQ62

M_A_DQ61

M_A_DQ60

M_A_DQ59

M_A_DQ58

M_A_DQ57

M_A_DQ56

M_A_DQS7

-M_A_DQS7

M_A_DQ55

M_A_DQ54

M_A_DQ53

M_A_DQ52

M_A_DQ51

M_A_DQ50

M_A_DQ49

M_A_DQ48

M_A_DQS6

-M_A_DQS6

M_A_DQ47

M_A_DQ46

M_A_DQ45

M_A_DQ44

M_A_DQ43

M_A_DQ42

M_A_DQ41

M_A_DQ40

M_A_DQS5

-M_A_DQS5

M_A_DQ39

M_A_DQ38

M_A_DQ37

M_A_DQ36

M_A_DQ35

M_A_DQ34

M_A_DQ33

M_A_DQ32

2

2

47P_0201_25V8-JRF_NS@

47P_0201_25V8-JRF_NS@

M_A_DQS4

1

C130

-M_A_DQS4

1

C131

U171B

X76@

B8

DQ31

B9

DQ30

B10

DQ29

B11

DQ28

C8

DQ27

C9

DQ26

C10

DQ25

C11

DQ24

D10

DQS3_T

D11

DQS3_Q

D8

DM3

R11

DQ23

R10

DQ22

R9

DQ21

R8

DQ20

T11

DQ19

T10

DQ18

T9

DQ17

T8

DQ16

P10

DQS2_T

P11

DQS2_C

P8

DM2

D9

DQ15

E9

DQ14

E10

DQ13

E11

DQ12

F8

DQ11

F9

DQ10

F10

DQ9

F11

DQ8

G10

DQS1_T

G11

DQS1_C

G8

DM1

M11

DQ7

M10

DQ6

M9

DQ5

M8

DQ4

N11

DQ3

N10

DQ2

N9

DQ1

P9

DQ0

L10

DSQ0_T

L11

DQS0_C

L8

DM0

H9CCNNN8GTALAR-NUD_FBGA178

Vref(DQ)

VDDQ_1

VDDQ_2

VDDQ_3

VDDQ_4

VDDQ_5

VDDQ_6

VDDQ_7

VDDQ_8

VDDQ_9

VDDQ_10

VDDQ_11

VDDQ_12

VDDQ_13

VDDQ_14

VDDQ_15

VDDQ_16

VDDQ_17

VSSQ_1

VSSQ_2

VSSQ_3

VSSQ_4

VSSQ_5

VSSQ_6

VSSQ_7

VSSQ_8

VSSQ_9

VSSQ_10

VSSQ_11

VSSQ_12

VSSQ_13

VSSQ_14

VSSQ_15

VSSQ_16

VSSQ_17

VSSQ_18

VSSQ_19

NC_9

J11

A11

C12

E8

E12

G12

H8

H9

H11

J9

J10

K8

K11

L12

N8

N12

R12

U11

B6

B12

C6

D12

E6

F6

F12

G6

G9

H10

K10

L9

M6

M12

N6

P12

R6

T6

T12

B4

B3

ZQ

2

R9013

243_0201_1%

1

VCC1R2A

C

2

2

47P_0201_25V8-JRF_NS@

47P_0201_25V8-JRF_NS@

1

1

C132

C133

2

R9015

243_0201_1%

1

B

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

LPDDR3 BASE MEMORY CH-A (1/2)

LPDDR3 BASE MEMORY CH-A (1/2)

LPDDR3 BASE MEMORY CH-A (1/2)

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

22 86

22 86

22 86

A

0.01

0.01

0.01

of

of

of

5

M_A_CA_A[9:0]4,22

D

M_A_CKE04,22

M_A_CKE14,22

M_A_DDRCLK0_1033M4,22

-M_A_DDRCLK0_1033M4,22

VCC1R2A

C

VCC1R2A

M_A_CKE0

M_A_CKE1

M_A_DDRCLK0_1033M

-M_A_DDRCLK0_1033M

NEAR VDDQ NEAR VDDQ

2

C2827

0.1U_0201_6.3V7-K

1

2

C2828

0.1U_0201_6.3V7-K

1

M_A_CA_A9

M_A_CA_A8

M_A_CA_A7

M_A_CA_A6

M_A_CA_A5

M_A_CA_A4

M_A_CA_A3

M_A_CA_A2

M_A_CA_A1

M_A_CA_A0

VCC1R2A

VCC1R2A

2

C428

1U_0201_6.3V6-M

1

NEAR VDDCA

2

C2829

1U_0201_6.3V6-M

1

B

VCC0R6B

2

1

C411

10U_0402_6.3V6-M

VCC0R6B

2

1

C31

1U_0201_6.3V6-M

2

C2830

1U_0201_6.3V6-M

1

2

C87

1U_0201_6.3V6-M

1

VCC1R2A

2

RF_NS@

C39

100P_0201_50V6-K

1

2

C2625

1U_0201_6.3V6-M

1

2

C479

10U_0402_6.3V6-M

1

2

RF_NS@

C40

100P_0201_50V6-K

1

1

R2555

1

R9025

1

R9026

1

R9027

1

R9028

1

R9029

1

R9030

1

R9031

1

R9032

1

R9033

1

R2533

1

R2554

1

R9050

1

R9051

2

C242

1U_0201_6.3V6-M

1

NEAR VDD2

2

C2626

1U_0201_6.3V6-M

1

2

C481

10U_0402_6.3V6-M

1

4

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

80.6_0201_1%

2

80.6_0201_1%

2

37.4_0201_1%

2

37.4_0201_1%

2

RF_NS@

C41

100P_0201_50V6-K

1

2

C534

1U_0201_6.3V6-M

1

2

C2627

1U_0201_6.3V6-M

1

2

C485

10U_0402_6.3V6-M

1

2

C65

47P_0201_25V8-G

1

VCC0R6B

RF@

2

C537

1U_0201_6.3V6-M

1

LPDDR3_VREF_CA_CPU4

LPDDR3_VREF_DQ_A_CPU4

2

1

C66

RF@

47P_0201_25V8-G

-M_A_CS04,22

-M_A_CS14,22

M_A_ODT04,22

2

C67

RF@

47P_0201_25V8-G

1

-M_A_CS0

-M_A_CS1

M_A_ODT0

2

C2820

0.022U_0201_6.3V6-K

1

2

R2806

24.9_0201_1%

1

2

C1602

0.022U_0201_6.3V6-K

1

2

R1111

24.9_0201_1%

1

3

VCC0R6B

1

2

R2807

R1110

R9046

R9047

R9049

1

2

5.11_0201_1%

1

2

10_0201_1%

80.6_0201_1%

1

2

80.6_0201_1%

1

2

80.6_0201_1%

VCC1R2A

2

1

2

1

VCC1R2A

R2808

8.25K_0201_1%

R2809

8.25K_0201_1%

2

R1889

8.25K_0201_1%

1

2

R1890

8.25K_0201_1%

1

LPDDR3_VREF_CA

LPDDR3_VREF_DQ_A

2

M_A_CA_B[9:0]4,22

M_A_CKE24,22

M_A_CKE34,22

M_A_DDRCLK1_1033M4,22

-M_A_DDRCLK1_1033M4,22

VCC1R2A

M_A_CKE2

M_A_CKE3

M_A_DDRCLK1_1033M

-M_A_DDRCLK1_1033M

M_A_CA_B9

M_A_CA_B8

M_A_CA_B7

M_A_CA_B6

M_A_CA_B5

M_A_CA_B4

M_A_CA_B3

M_A_CA_B2

M_A_CA_B1

M_A_CA_B0

VCC1R2A

R9034

R9035

R9036

R9037

R9038

R9039

R9040

R9041

R9042

R9043

R9044

R9045

R2810

R2811

1

VCC0R6B

1

2

68.1_0201_1%

1

2

68.1_0201_1%

1

2

68.1_0201_1%

1

2

68.1_0201_1%

1

2

68.1_0201_1%

1

2

68.1_0201_1%

1

2

68.1_0201_1%

1

2

68.1_0201_1%

1

2

68.1_0201_1%

1

2

68.1_0201_1%

1

2

80.6_0201_1%

1

2

80.6_0201_1%

1

2

37.4_0201_1%

1

2

37.4_0201_1%

D

C

NEAR VDDQ NEAR VDDQ

2

1

VCC1R2A

2

1

C2831

0.1U_0201_6.3V7-K

NEAR VDDCA

C2833

1U_0201_6.3V6-M

2

C2832

0.1U_0201_6.3V7-K

1

2

C2834

1U_0201_6.3V6-M

1

VCC0R6B

VCC1R2A

VCC1R2A

VCC0R6B

2

C540

1U_0201_6.3V6-M

1

2

C2629

1U_0201_6.3V6-M

1

2

C497

10U_0402_6.3V6-M

1

2

C425

1U_0201_6.3V6-M

1

NEAR VDD2

2

C2630

1U_0201_6.3V6-M

1

2

C503

10U_0402_6.3V6-M

1

2

C426

1U_0201_6.3V6-M

1

2

C2631

1U_0201_6.3V6-M

1

2

C517

10U_0402_6.3V6-M

1

2

C427

1U_0201_6.3V6-M

1

B

2

C466

10U_0402_6.3V6-M

1

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

2

C2633

1U_0201_6.3V6-M

1

2

C2634

1U_0201_6.3V6-M

1

Title

Title

Title

LPDDR3 BASE MEMORY CH-A (2/2)

LPDDR3 BASE MEMORY CH-A (2/2)

LPDDR3 BASE MEMORY CH-A (2/2)

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

of

23 86

of

23 86

of

23 86

A

0.01

0.01

0.01

5

M_B_DQ[63:0]4,5

-M_B_DQS[7:0]4,5

M_B_DQS[7:0]4,5

M_B_CA_A[9:0]5,25

D

2

C2770

1U_0201_6.3V6-M

1

VCC1R8A

4

2

C2771

1U_0201_6.3V6-M

1

VCC1R8A

2

C2774

10U_0402_6.3V6-M

1

LPDDR3_VREF_CA

2

C2776

.047U_0201_6.3V6-K

1

LPDDR3_VREF_DQ_B

2

C2778

.047U_0201_6.3V6-K

1

3

VCC1R8A

2

2

1

M_B_CA_B[9:0]5,25

C2772

1U_0201_6.3V6-M

C2773

1U_0201_6.3V6-M

1

VCC1R8A

2

C2775

10U_0402_6.3V6-M

1

2

LPDDR3_VREF_CA

2

1

C2777

.047U_0201_6.3V6-K

LPDDR3_VREF_DQ_B

2

C2779

.047U_0201_6.3V6-K

1

1

D

Vref(DQ)

VDDQ_1

VDDQ_2

VDDQ_3

VDDQ_4

VDDQ_5

VDDQ_6

VDDQ_7

VDDQ_8

VDDQ_9

VDDQ_10

VDDQ_11

VDDQ_12

VDDQ_13

VDDQ_14

VDDQ_15

VDDQ_16

VDDQ_17

VSSQ_1

VSSQ_2

VSSQ_3

VSSQ_4

VSSQ_5

VSSQ_6

VSSQ_7

VSSQ_8

VSSQ_9

VSSQ_10

VSSQ_11

VSSQ_12

VSSQ_13

VSSQ_14

VSSQ_15

VSSQ_16

VSSQ_17

VSSQ_18

VSSQ_19

NC_9

ZQ

LPDDR3_VREF_DQ_B

J11

A11

C12

E8

E12

G12

H8

H9

H11

J9

J10

K8

K11

L12

N8

N12

R12

U11

B6

B12

C6

D12

E6

F6

F12

G6

G9

H10

K10

L9

M6

M12

N6

P12

R6

T6

T12

B4

B3

2

R2760

243_0201_1%

1

VCC1R2A

2

R2763

243_0201_1%

1

U173A

M_B_DDRCLK1_1033M5,25

-M_B_DDRCLK1_1033M5,25

M_B_DDRCLK1_1033M

-M_B_DDRCLK1_1033M

M_B_CKE25,25

M_B_CKE35,25

M_B_CKE2

M_B_CKE3

-M_B_CS0

-M_B_CS1

M_B_ODT0

M_B_CA_B9

M_B_CA_B8

M_B_CA_B7

M_B_CA_B6

M_B_CA_B5

M_B_CA_B4

M_B_CA_B3

M_B_CA_B2

M_B_CA_B1

M_B_CA_B0

X76@

J3

CK_T

J2

CK_C

K3

CKE0

K4

CKE1

L3

CS0_N

L4

CS1_N

J8

ODT

C2

CA9

D2

CA8

E2

CA7

E3

CA6

F3

CA5

M3

CA4

N3

CA3

N2

CA2

P2

CA1

R2

CA0

C4

NC_6

K9

NC_7

R3

NC_8

A1

DNU_1

A2

DNU_2

B1

DNU_3

A12

DNU_4

A13

DNU_5

B13

DNU_6

T1

DNU_7

U1

DNU_8

U2

DNU_9

T13

DNU_10

U12

DNU_11

U13

DNU_12

C3

VSSCA_1

D3

VSSCA_2

F4

VSSCA_3

G3

VSSCA_4

G4

VSSCA_5

J4

VSSCA_6

M4

VSSCA_7

P3

VSSCA_8

H9CCNNN8GTALAR-NUD_FBGA178

LPDDR3_VREF_CA

VCC1R8A

VCC1R2A

M_B_DQ31

M_B_DQ30

U172A

M_B_DDRCLK0_1033M

-M_B_DDRCLK0_1033M

C

B

M_B_DDRCLK0_1033M

-M_B_DDRCLK0_1033M

M_B_CKE05,25

M_B_CKE15,25

-M_B_CS05,25

-M_B_CS15,25

M_B_ODT05,25

M_B_CKE0

M_B_CKE1

-M_B_CS0

-M_B_CS1

M_B_ODT0

M_B_CA_A9

M_B_CA_A8

M_B_CA_A7

M_B_CA_A6

M_B_CA_A5

M_B_CA_A4

M_B_CA_A3

M_B_CA_A2

M_B_CA_A1

M_B_CA_A0

X76@

J3

CK_T

J2

CK_C

K3

CKE0

K4

CKE1

L3

CS0_N

L4

CS1_N

J8

ODT

C2

CA9

D2

E2

E3

F3

M3

N3

N2

P2

R2

C4

K9

R3

A1

A2

B1

A12

A13

B13

T1

U1

U2

T13

U12

U13

C3

D3

F4

G3

G4

J4

M4

P3

VREF(CA)

CA8

CA7

CA6

CA5

CA4

CA3

CA2

CA1

CA0

NC_6

NC_7

NC_8

DNU_1

DNU_2

DNU_3

DNU_4

DNU_5

DNU_6

DNU_7

DNU_8

DNU_9

DNU_10

DNU_11

DNU_12

VSSCA_1

VSSCA_2

VSSCA_3

VSSCA_4

VSSCA_5

VSSCA_6

VSSCA_7

VSSCA_8

H9CCNNN8GTALAR-NUD_FBGA178

VDD1_1

VDD1_2

VDD1_3

VDD1_4

VDD1_5

VDD1-6

VDD1_7

VDD1_8

VDD1_9

VDD1_10

VDD2_1

VDD2_2

VDD2_3

VDD2_4

VDD2_5

VDD2_6

VDD2_7

VDD2_8

VDD2_9

VDD2_10

VDD2_11

VDD2_12

VDD2_13

VDD2_14

VDD2_15

VDD2_16

VDD2_17

VDD2_18

VDD2_19

VDD2_20

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

A3

A4

A5

A6

A10

U3

U4

U5

U6

U10

H4

A8

A9

D4

D5

D6

G5

H5

H6

H12

J5

J6

K5

K6

K12

L5

P4

P5

P6

U8

U9

F2

NC_1

G2

NC_2

H3

NC_3

L2

NC_4

M2

NC_5

B2

B5

C5

E4

E5

F5

H2

J12

K2

L6

M5

N4

N5

R4

R5

T2

T3

T4

T5

M_B_DQ29

M_B_DQ28

M_B_DQ27

M_B_DQ26

M_B_DQ25

M_B_DQ24

M_B_DQS3

-M_B_DQS3

M_B_DQ23

M_B_DQ22

M_B_DQ21

M_B_DQ20

M_B_DQ19

M_B_DQ18

M_B_DQ17

M_B_DQ16

M_B_DQS2

-M_B_DQS2

M_B_DQ15

M_B_DQ14

M_B_DQ13

M_B_DQ12

M_B_DQ11

M_B_DQ10

M_B_DQ9

M_B_DQ8

M_B_DQS1

-M_B_DQS1

M_B_DQ7

M_B_DQ6

M_B_DQ5

M_B_DQ4

M_B_DQ3

M_B_DQ2

M_B_DQ1

M_B_DQ0

M_B_DQS0

-M_B_DQS0

U172B

X76@

B8

DQ31

B9

DQ30

B10

DQ29

B11

DQ28

C8

DQ27

C9

DQ26

C10

DQ25

C11

DQ24

D10

DQS3_T

D11

DQS3_Q

D8

DM3

R11

DQ23

R10

DQ22

R9

DQ21

R8

DQ20

T11

DQ19

T10

DQ18

T9

DQ17

T8

DQ16

P10

DQS2_T

P11

DQS2_C

P8

DM2

D9

DQ15

E9

DQ14

E10

DQ13

E11

DQ12

F8

DQ11

F9

DQ10

F10

DQ9

F11

DQ8

G10

DQS1_T

G11

DQS1_C

G8

DM1

M11

DQ7

M10

DQ6

M9

DQ5

M8

DQ4

N11

DQ3

N10

DQ2

N9

DQ1

P9

DQ0

L10

DSQ0_T

L11

DQS0_C

L8

DM0

H9CCNNN8GTALAR-NUD_FBGA178

VDD1_1

VDD1_2

VDD1_3

VDD1_4

VDD1_5

VDD1-6

VDD1_7

VDD1_8

VDD1_9

VDD1_10

VREF(CA)

VDD2_1

VDD2_2

VDD2_3

VDD2_4

VDD2_5

VDD2_6

VDD2_7

VDD2_8

VDD2_9

VDD2_10

VDD2_11

VDD2_12

VDD2_13

VDD2_14

VDD2_15

VDD2_16

VDD2_17

VDD2_18

VDD2_19

VDD2_20

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

LPDDR3_VREF_CA

VCC1R8A

VCC1R2A

M_B_DQ63

M_B_DQ62

M_B_DQ61

A3

A4

A5

A6

A10

U3

U4

U5

U6

U10

H4

A8

A9

D4

D5

D6

G5

H5

H6

H12

J5

J6

K5

K6

K12

L5

P4

P5

P6

U8

U9

F2

NC_1

G2

NC_2

H3

NC_3

L2

NC_4

M2

NC_5

B2

B5

C5

E4

E5

F5

H2

J12

K2

L6

M5

N4

N5

R4

R5

T2

T3

T4

T5

M_B_DQ60

M_B_DQ59

M_B_DQ58

M_B_DQ57

M_B_DQ56

M_B_DQS7

-M_B_DQS7

M_B_DQ55

M_B_DQ54

M_B_DQ53

M_B_DQ52

M_B_DQ51

M_B_DQ50

M_B_DQ49

M_B_DQ48

M_B_DQS6

-M_B_DQS6

M_B_DQ47

M_B_DQ46

M_B_DQ45

M_B_DQ44

M_B_DQ43

M_B_DQ42

M_B_DQ41

M_B_DQ40

M_B_DQS5

-M_B_DQS5

M_B_DQ39

M_B_DQ38

M_B_DQ37

M_B_DQ36

M_B_DQ35

M_B_DQ34

M_B_DQ33

M_B_DQ32

M_B_DQS4

-M_B_DQS4

U173B

X76@

B8

DQ31

B9

DQ30

B10

DQ29

B11

DQ28

C8

DQ27

C9

DQ26

C10

DQ25

C11

DQ24

D10

DQS3_T

D11

DQS3_Q

D8

DM3

R11

DQ23

R10

DQ22

R9

DQ21

R8

DQ20

T11

DQ19

T10

DQ18

T9

DQ17

T8

DQ16

P10

DQS2_T

P11

DQS2_C

P8

DM2

D9

DQ15

E9

DQ14

E10

DQ13

E11

DQ12

F8

DQ11

F9

DQ10

F10

DQ9

F11

DQ8

G10

DQS1_T

G11

DQS1_C

G8

DM1

M11

DQ7

M10

DQ6

M9

DQ5

M8

DQ4

N11

DQ3

N10

DQ2

N9

DQ1

P9

DQ0

L10

DSQ0_T

L11

DQS0_C

L8

DM0

H9CCNNN8GTALAR-NUD_FBGA178

Vref(DQ)

VDDQ_1

VDDQ_2

VDDQ_3

VDDQ_4

VDDQ_5

VDDQ_6

VDDQ_7

VDDQ_8

VDDQ_9

VDDQ_10

VDDQ_11

VDDQ_12

VDDQ_13

VDDQ_14

VDDQ_15

VDDQ_16

VDDQ_17

VSSQ_1

VSSQ_2

VSSQ_3

VSSQ_4

VSSQ_5

VSSQ_6

VSSQ_7

VSSQ_8

VSSQ_9

VSSQ_10

VSSQ_11

VSSQ_12

VSSQ_13

VSSQ_14

VSSQ_15

VSSQ_16

VSSQ_17

VSSQ_18

VSSQ_19

NC_9

ZQ

LPDDR3_VREF_DQ_B

VCC1R2A

J11

A11

C12

E8

E12

G12

H8

H9

H11

J9

J10

K8

K11

L12

N8

N12

R12

U11

B6

B12

C6

D12

E6

F6

F12

G6

G9

H10

K10

L9

M6

M12

N6

P12

R6

T6

T12

B4

B3

2

R2766

243_0201_1%

1

2

R2769

243_0201_1%

1

C

B

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTU RE CE NTER. AND C ONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTU RE CE NTER. AND C ONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTU RE CE NTER. AND C ONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

2

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2014/07/01

2014/07/01

2014/07/01

Title

LPDDR3 BASE MEMORY CH-B (1/2)

LPDDR3 BASE MEMORY CH-B (1/2)

LPDDR3 BASE MEMORY CH-B (1/2)

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

24 86

24 86

24 86

A

0.01

0.01

0.01

of

of

of

5

M_B_CA_A[9:0]5,24

D

M_B_CKE05,24

M_B_CKE15,24

M_B_DDRCLK0_1033M5,24

-M_B_DDRCLK0_1033M5,24

VCC1R2A

C

VCC1R2A

M_B_CKE0

M_B_CKE1

M_B_DDRCLK0_1033M

-M_B_DDRCLK0_1033M

NEAR VDDQ NEAR VDDQ

2

C2835

0.1U_0201_6.3V7-K

1

2

C2836

0.1U_0201_6.3V7-K

1

M_B_CA_A9

M_B_CA_A8

M_B_CA_A7

M_B_CA_A6

M_B_CA_A5

M_B_CA_A4

M_B_CA_A3

M_B_CA_A2

M_B_CA_A1

M_B_CA_A0

VCC1R2A

2

1

VCC1R2A

C2781

1U_0201_6.3V6-M

R2772

R2773

R2774

R2775

R2776

R2777

R2778

R2779

R2780

R2781

R2797

R2800

R2798

R2799

NEAR VDDCA

2

C2837

1U_0201_6.3V6-M

1

B

VCC0R6B

2

1

C2805

10U_0402_6.3V6-M

VCC0R6B

2

C2807

1U_0201_6.3V6-M

1

2

C2838

1U_0201_6.3V6-M

1

2

C2808

1U_0201_6.3V6-M

1

2

1

VCC1R2A

2

1

C2789

1U_0201_6.3V6-M

C2797

10U_0402_6.3V6-M

1

1

1

1

1

1

1

1

1

1

1

1

1

1

2

C2782

1U_0201_6.3V6-M

1

NEAR VDD2

2

C2790

1U_0201_6.3V6-M

1

2

C2798

10U_0402_6.3V6-M

1

4

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

80.6_0201_1%

2

80.6_0201_1%

2

37.4_0201_1%

2

37.4_0201_1%

2

C2783

1U_0201_6.3V6-M

1

2

C2791

1U_0201_6.3V6-M

1

2

C2799

10U_0402_6.3V6-M

1

VCC0R6B

2

C2784

1U_0201_6.3V6-M

1

LPDDR3_VREF_DQ_B_CPU4

3

VCC0R6B

-M_B_CS05,24

-M_B_CS15,24

M_B_ODT05,24

-M_B_CS0

-M_B_CS1

M_B_ODT0

R2794

R2795

R2796

1

2

80.6_0201_1%

1

2

80.6_0201_1%

1

2

80.6_0201_1%

M_B_DDRCLK1_1033M5,24

-M_B_DDRCLK1_1033M5,24

2

M_B_CA_B[9:0]5,24

M_B_CKE25,24

M_B_CKE35,24

VCC1R2A

M_B_CKE2

M_B_CKE3

M_B_DDRCLK1_1033M

-M_B_DDRCLK1_1033M

M_B_CA_B9

M_B_CA_B8

M_B_CA_B7

M_B_CA_B6

M_B_CA_B5

M_B_CA_B4

M_B_CA_B3

M_B_CA_B2

M_B_CA_B1

M_B_CA_B0

VCC1R2A

R2782

R2783

R2784

R2785

R2786

R2787

R2788

R2789

R2790

R2791

R2792

R2812

R2813

R2793

1

1

1

1

1

1

1

1

1

1

1

1

1

1

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

68.1_0201_1%

2

80.6_0201_1%

2

80.6_0201_1%

2

37.4_0201_1%

2

37.4_0201_1%

1

VCC0R6B

D

C

NEAR VDDQ NEAR VDDQ

2

C2786

1U_0201_6.3V6-M

1

NEAR VDD2

2

C2794

1U_0201_6.3V6-M

1

2

C2802

10U_0402_6.3V6-M

1

2

C2787

1U_0201_6.3V6-M

1

2

C2795

1U_0201_6.3V6-M

1

2

C2803

10U_0402_6.3V6-M

1

2

C2788

1U_0201_6.3V6-M

1

B

2

C2815

0.022U_0201_6.3V6-K

1

2

R2802

24.9_0201_1%

1

R2801

VCC1R2A

2

C2785

1U_0201_6.3V6-M

1

2

1

VCC1R2A

C2839

0.1U_0201_6.3V7-K

2

C2840

0.1U_0201_6.3V7-K

1

NEAR VDDCA

2

C2841

1U_0201_6.3V6-M

VCC1R2A

2

1

2

10_0201_1%

1

2

1

R2803

8.25K_0201_1%

R2804

8.25K_0201_1%

LPDDR3_VREF_DQ_B

1

2

C2842

1U_0201_6.3V6-M

1

VCC0R6B

2

1

VCC1R2A

VCC0R6B

C2793

1U_0201_6.3V6-M

2

C2801

10U_0402_6.3V6-M

1

2

C2806

10U_0402_6.3V6-M

1

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENT ER. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

2

C2811

1U_0201_6.3V6-M

1

2

C2812

1U_0201_6.3V6-M

1

Title

Title

Title

LPDDR3 BASE MEMORY CH-B (2/2)

LPDDR3 BASE MEMORY CH-B (2/2)

LPDDR3 BASE MEMORY CH-B (2/2)

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

of

25 86

of

25 86

of

25 86

A

0.01

0.01

0.01

5

3.3V

0.33V

4

3

2

1

VCC3M

Q22

SSM6K504NU_UDFN6B-6-8

6

5

2

1

VCC3P_DRV

8

PANEL_BKLT_CTRL3

BACKLIGHT_ON51

EDP_HPD3

EDP_AUXN3

EDP_AUXP3

EDP_TXP03

EDP_TXN03

EDP_TXP13

EDP_TXN13

EDP_TXP23

EDP_TXN23

EDP_TXP33

EDP_TXN33

D

VCC3P_DRV61

C

B

D

G

3

2

1

2

C603

0.1U_0402_25V7-K

1

2

1

USBP9-10

USBP9+10

7

S

4

R76

100_0201_5%

0.1U_0201_6.3V6-KEMC@

C27

VCC3B

F11

VCC3P

2

1

2

1

2

1

2

1

-LID_CLOSE

USBP9-

USBP9+

R361

47_0201_5%

D63

RB521CM-30T2R_VMN2M-2

R714

47K_0201_5%

VCC3B_LCLW

2

2

F24

@

1

1

0.5A_32V_ERBRD0R50X

0.5A_32V_ERBRD0R50X

D11

1

R2078

R2079

1

C8289

1

C8290

1

C8299

1

C8298

1

C8296

1

C8295

1

C2821

1

C2822

1

C2823

1

C2824

2

C138

1

47P_0201_25V8-J

C2579 0.1U_0201_6.3V6-KEMC_NS@

RF_NS@

RB521CM-30T2R_VMN2M-2

2

1

2

0_0201_5%

1

2

0_0201_5%

2

0.1U_0201_6.3V6-K

2

0.1U_0201_6.3V6-K

2

0.1U_0201_6.3V6-K

2

0.1U_0201_6.3V6-K

2

0.1U_0201_6.3V6-K

2

0.1U_0201_6.3V6-K

2

0.1U_0201_6.3V6-K

2

0.1U_0201_6.3V6-K

2

0.1U_0201_6.3V6-K

2

0.1U_0201_6.3V6-K

VCC3LCD

R668

2

1

10K_0201_5%

2

1

VCC3B

2

1

R38 100K_0201_5%

USBP9-_CONN

USBP9+_CONN

EDP_AUXN_CONN

EDP_AUXP_CONN

EDP_TXP0_CONN

EDP_TXN0_CONN

EDP_TXP1_CONN

EDP_TXN1_CONN

EDP_TXP2_CONN

EDP_TXN2_CONN

EDP_TXP3_CONN

EDP_TXN3_CONN

EMC_NS@

C929

1000P_0201_25V7-K

C51

2

2

C136

RF@

RF@

1

1

47P_0201_25V8-J

100P_0201_25V8-J

2

C55

1

2200P_0201_25V7-K

RF_NS@

1

1

1

1

2

2

2

2

D311 ESD7382MUT5G_X3DFN2-2EMC_NS@

VCC3LCD

VCC3LCD

2

2

2

2

C134

C311

C308

C315

1

1

1

1

47P_0201_25V8-J

1U_0201_6.3V6-M

J10

CONN@

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

I-PEX_20654-040E-01

GND12

GND11

GND10

0.01U_0201_6.3V7-K

0.1U_0201_6.3V6-K

52

51

50

49

GND9

48

GND8

47

GND7

46

GND6

45

GND5

44

GND4

43

GND3

42

GND2

41

GND1

RF_NS@

LCD CONNECTOR

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

D312 ESD7382MUT5G_X3DFN2-2EMC_NS@

F3

1

3A_32V_ERBRD3R00X

D

0.9A

VCC3P

2

1.2A

VBL15

2

2

2

C135

C54

1

1

RF_NS@

47P_0201_25V8-J

RF_NS@

2200P_0201_25V7-K

2

2

C313

1U_0402_25V6-K

C310

C307

1

1

1

0.1U_0201_25V6-K

0.01U_0201_25V7-K

VSYS15

2

1

C724

0.01U_0201_25V6-K

F7

1

3A_32V_ERBRD3R00X

VBL15

2

-LED_LOGO

1

2

-LED_LOGO51

USBP4-10

USBP4+10

USBP7-10

USBP7+10

-INT_MIC_DTCT8

DMIC_CLK9,44

DMIC_DATA9,44

DMIC_CLK

DMIC_DATA

-LID_CLOSE

-LID_CLOSE52,55

R154

R155

USBP4-

USBP4+

USBP7-

USBP7+

-INT_MIC_DTCT

1

1

2

2

R102 3.9K_0402_5%

1

2

R3136

0_0201_5%

1

2

R3137

0_0201_5%

1

2

R786

0_0201_5%

1

2

R785

0_0201_5%

33_0201_5%EMC@

33_0201_5%EMC@

2

2

C12

1

1

12P_0201_25V8-J

EMC@

C13

EMC@

12P_0201_25V8-J

USBP4-_CONN

USBP4+_CONN

USBP7-_CONN

USBP7+_CONN

VCC3SW

2

1

VCC3SW

C33

@

1000P_0201_25V7-K

PLACE NEAR J11

VCC3B

VCC3B_CAM

VCC3M

2

2

2

1

C934

EMC@

2

F26

F16

F12

@

1

1

1

2A_32V_ERBRD2R00X

R8954 100K_0201_5%

2

1

2200P_0201_25V7-K

2A_32V_ERBRD2R00X

0.5A_32V_ERBRD0R50X

1

1

1

1

1

1

ESD7382MUT5G_X3DFN2-2EMC_NS@

ESD7382MUT5G_X3DFN2-2EMC_NS@

ESD7382MUT5G_X3DFN2-2EMC_NS@

2

2

2

2

2

2

D427

D426

D424

2

2

2

C137

C2578

C50

RF@

RF@

1

1

1

EMC@

47P_0201_25V8-J

100P_0201_25V8-J

0.1U_0201_6.3V6-K

1

1

ESD7382MUT5G_X3DFN2-2EMC_NS@

2

2

D425

30

30

GND11

29

29

GND10

28

28

27

27

26

26

25

25

24

24

23

23

22

22

21

GND2

21

20

20

GND1

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

J11

CONN@

I-PEX_20654-030E-01

GND9

GND8

GND7

GND6

GND5

GND4

GND3

USB Port Assignment

4 IR Camera
7 RGB Camera
9 Touch panel

Device Power
Pin Assignment

1 LID,DMIC
11,12,13 Camera
22 Logo LED
30 LCLW

41

40

39

38

37

36

35

34

33

32

31

PLACE NEAR J11

C

B

A

PLACE NEAR J10

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTUR E CEN TER. AN D CONTA INS CO NFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTUR E CEN TER. AN D CONTA INS CO NFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTUR E CEN TER. AN D CONTA INS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2014/07/01

2014/07/01

2014/07/01

Title

LCD/LID/MIC/CAMERA

LCD/LID/MIC/CAMERA

LCD/LID/MIC/CAMERA

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

1

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

of

26 86

of

26 86

of

26 86

A

0.01

0.01

0.01

5

4

3

2

1

D

R3070

330_0402_5%

1

LED_AC_CHG51

LED_AC_CON51

C

B

-LED_PWR51

-PWRSWITCH17,39,59,60

-LED_PWR

-PWRSWITCH

2

R3071

330_0402_5%

1

2

1

R13 1.6K_0402_1%

0.1U_0201_6.3V6-K

2

A1

C3120

1

2

3

4

1

2

J52

CONN@

1

2

3

4

GND1

GND2

HIGHS_WS83040-S0171-HF

1

C3119

@

@

0.1U_0201_6.3V6-K

2

VCC3M

2

F31

0.5A_32V_ERBRD0R50X

1

A2

D403

WHI

ORG

1222A-S2ST3D-C30-2C-FTK_ORG_WHI

A1Pin: ORANGE
A2Pin: White

C

5

6

D

C

B

Change from YD-1.
Take distance between VCC3M pin and GND pin.

A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2017/02/17

2017/02/17

2017/02/17

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/07/01

2014/07/01

2014/07/01

Title

PWR SW/AC LED

PWR SW/AC LED

PWR SW/AC LED

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

!"#$%&!"#$%&

Friday, November 03, 2017

Friday, November 03, 2017

Friday, November 03, 2017

27 86

27 86

1

27 86

of

of

of

A

0.01

0.01

0.01