I2C Bus / SM Bus
Bus Switch IC
70
UNBUFFERED
DDR3 SODIMM
SMBus
12,13
SATA
USB2.0(AOU)
Finger Print
Bluetooth
SATA
CONN
Audio
Codec
USB 3.0
42
64
42
Channel A / B
DDR3 1333
Serial ATA I/F
40
Azalia bus
43
CH1
42
CH9
CH10
CH11
Port0
USB3.0
USB 2.0
Intel
Ivy Bridge
DDR3 1333MHz
INTEGRATED GRAHPICS
3,4,5,6,7,8,9,10
DMI x4
Intel
Panther Point
LVDS CRT
Display Port
USB 2.0 (14 ports)
USB 3.0 (4 ports)
LAN Connect I/F (LCI)
Serial ATA 300MB/s
HDA Interface
ACPI 2.0
LPC I/F
PCI Rev 2.3
PCI Express
INT. RTC
24,25,26,27,28,29,30,31,32
SPI
SPI-FLASH
58
G-Sensor
Touch Pad
FDI
67
64
LVDS
Display Port
USB 2.0 CH13
PCI Express
SATA
USB 2.0 CH3
PCI Express
USB 2.0 CH12
EC
MEC1619
60,61,62
Int. KB
Track point IV
XDP
Conn.
13'' HD+ LCD
AC Coupling
Camera (LCD Conn)
Media Card
Reader
Mini PCI-E
WWAN Card
Mini PCI-E
WLAN Card
FAN
64
Genesis-1 Block Diagram
11
34
38
34
54
53
53
LPC Bus / 33MHz
Thinker
Engine
71,72
66
LGS-1 91.4RQ01.001
JULY. 18, 2011
Display Port
4-in-1 Slot
37
55
LPC Debug
Board Conn
DC-IN
Battery Input
ST19NP18-TPM-A
58
<Core Design>
<Core Design>
<Core Design>
73
74
TCPA
68
PCB Layer Stackup
L1:Component
L2:GND
L3:Signal 1
L4:VCC
L5:Signal 2
L6:Signal 3
L7:VCC
L8:Signal 4
L9:GND
L10:Component
Battery Charger/Selector
BQ24760
INPUTS
VINT20 CHARGER_OUT12
75
OUTPUTS
System DC/DC
TPS51220ARSN
VINT20
79
VCC5M
VCC3M
CPU DC/DC
VT1318M/VT1324S
VCC5M_OUT
80
VCCCPUCORE
GMCH GFX CORE
VT1324S
VCC5M_OUT VCCGFXCORE
81
VCC1R5B
VT355FCX
VCC5M_OUT
86
VCC1R5B
VCC0R675B
MAX1510
VCC1R35A
VT356FCX
VCC5M_OUT VCC1R35A
VCC1R35A VCC0R675B
87
88
VCC1R8B
BD9139
VCC5M_OUT
89
VCC1R8B
VCC1R05AMT
VT356FCX
VCC1R05LAN VCC5M_OUT
85
VCC1R05B_VTT
VT356
VCC5M_OUT
VCC1R05B_VTT
84
VCCSA
VT371
VCC5M_OUT
VCCSA
90
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Block Diagram
Block Diagram
Block Diagram
Genesis-1
Genesis-1
Genesis-1
1 100 Monday, January 30, 2012
1 100 Monday, January 30, 2012
1 100 Monday, January 30, 2012
SC
SC
SC
A
B
C
D
E
RESISTOR
Symbol name
4 4
The naming rule is value + R + size + tolerance
For the value, it can be read by the number before R. (R means resistor)
For the tolerance, it can be read from the last letter.
For the rating, we don't show on the symbol name.
For the size, R2=>0402, R3=>0603, R5=>0805,....
Value
Tolerance
(J: 5%, F: 1%, D: 0.5%, B: 0.1 %)
Rating
0402=> 1/16W, 25V
0603 => 1/16W, 75V
0805 => 1/10W, 100V
Size
2=>0402, 3=>0603, 5=>0805,
6=>1206, 0=>1210
EC HISTORY
Stage Date
EC No. Page
Note
CAPACITOR
3 3
Symbol name
Tolerance
(M: +/-20, K: +/-10, Z: +80/-20)
Rating Value
Size
2=>0402, 3=>0603, 5=>0805,
6=>1206, 0=>1210
The naming rule is
Capacitor type + value + rating + size + tolerance + material
SCD1U10V2MX-1
SC=> SMT Ceremic, TC=> POS cap or SP cap
D1U => 0.1uF
10V => the voltage rating is 10V
2=> 0402, 3=>0603, 5=>0805
M=>tolerance M, K, Z
X=> X7R/X5R, Y=> Y5V
-1 => symbol version, nonsense to EE characteristic
2 2
PLANAR_ID[3..0]
IBEXPEAK-M 39
PLANAR_IDn
1 1
38
48 49
3
2
1
0 0
0 0 0 1
0 0 0 1
0 0 1
1 0 0 0
1 0 0 1
0
1 0 0 0
1 1 0 0
1 1 0 0
1 1 1 0
A
0
0
1
0 1 0 1
Planar ID Version
Genesis-1 initial
FVT N/A
SIT SC
Planar PCB Version
N/A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
B
C
D
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Reference
Reference
Reference
Genesis-1
Genesis-1
Genesis-1
2 100 Monday, January 30, 2012
2 100 Monday, January 30, 2012
2 100 Monday, January 30, 2012
E
SC
SC
SC
A
FDI_FSYNC0 26
FDI_FSYNC1 26
FDI_INT 26
FDI_LSYNC0 26
FDI_LSYNC1 26
1 2
DMI_TXN[3..0] 26
DMI_TXP[3..0] 26
DMI_RXN[3..0] 26
DMI_RXP[3..0] 26
FDI_TXN[7..0] 26
FDI_TXP[7..0] 26
4 4
3 3
VCC1R05B_VTT_CPU
R2 24D9R2F-L-GP R2 24D9R2F-L-GP
2 2
B
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
eDP_COMP_CPU
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
U1A
U1A
M2
P6
P1
P10
N3
P7
P3
P11
K1
M8
N4
R2
K3
M7
P4
T3
U7
W11
W1
AA6
W6
V4
Y2
AC9
U6
W10
W3
AA7
W7
T4
AA3
AC8
AA11
AC12
U11
AA10
AG8
AF3
AD2
AG11
AG4
AF4
AC3
AC4
AE11
AE7
AC1
AA4
AE10
AE6
IVY-BRIDGE-GP-NF
IVY-BRIDGE-GP-NF
DMI_RX#0
DMI_RX#1
DMI_RX#2
DMI_RX#3
DMI_RX0
DMI_RX1
DMI_RX2
DMI_RX3
DMI_TX#0
DMI_TX#1
DMI_TX#2
DMI_TX#3
DMI_TX0
DMI_TX1
DMI_TX2
DMI_TX3
FDI0_TX#0
FDI0_TX#1
FDI0_TX#2
FDI0_TX#3
FDI1_TX#0
FDI1_TX#1
FDI1_TX#2
FDI1_TX#3
FDI0_TX0
FDI0_TX1
FDI0_TX2
FDI0_TX3
FDI1_TX0
FDI1_TX1
FDI1_TX2
FDI1_TX3
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
EDP_COMPIO
EDP_ICOMPO
EDP_HPD#
EDP_AUX#
EDP_AUX
EDP_TX#0
EDP_TX#1
EDP_TX#2
EDP_TX#3
EDP_TX0
EDP_TX1
EDP_TX2
EDP_TX3
C
1 OF 9
1 OF 9
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#0
PEG_RX#1
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
PEG_COMP_CPU
G3
G1
G4
H22
J21
B22
D21
A19
D17
B14
D13
A11
B10
G8
A8
B6
H8
E5
K7
K22
K19
C21
D19
C19
D16
C13
D12
C11
C9
F8
C8
C5
H6
F6
K6
G22
C23
D23
F21
H19
C17
K15
F17
F14
A15
J14
H13
M10
F10
D9
J4
F22
A23
D24
E21
G19
B18
K17
G17
E14
C15
K13
G13
K10
G10
D8
K4
D
R1 24D9R2F-L-GP R1 24D9R2F-L-GP
1 2
E
VCC1R05B_VTT_CPU
1 1
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU(1/8):DMI/EDP/PEG/FDI
CPU(1/8):DMI/EDP/PEG/FDI
CPU(1/8):DMI/EDP/PEG/FDI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
3 100 Monday, January 30, 2012
3 100 Monday, January 30, 2012
3 100 Monday, January 30, 2012
E
SC
SC
SC
A
Table -PROC_SELECT(-PROC_IVY)
Sandy Bridge
Ivy Bridge
-PROC_IVY 29
4 4
-PROCHOT 62,80
PM_SYNC 26
3 3
CPUPWRGD 11,29
DRAMPW RG 26,32,87
VCC1R05B_VTT_CPU
1 2
R5
R5
62R2J-GP
62R2J-GP
VCC1R35_VDDQ
1 2
R12
R12
200R2J-L1-GP
200R2J-L1-GP
1 2
R15
R15
10KR2J-3-GP
10KR2J-3-GP
R7 56R2J-4-GP R7 56R2J-4-GP
1 2
R73
R73
1 2
130R2J-GP
130R2J-GP
TPAD40-GP
TPAD40-GP
PECI 62
-THERMTRIP 29
TP2
TP2
B
High
Low
CATERR#
1
PROCHOT_CPU
1
SM_DRAMPWROK
TP1
TP1
TPAD40-GP
TPAD40-GP
-CPURST
U1B
U1B
F49
PROC_SELECT#
C57
PROC_DETECT#
C49
CATERR#
A48
PECI
C45
PROCHOT#
D45
THERMTRIP#
C48
PM_SYNC
B46
UNCOREPWRGOOD
BE45
SM_DRAMPWROK
D44
RESET#
IVY-BRIDGE-GP-NF
IVY-BRIDGE-GP-NF
C
2 OF 9
2 OF 9
MISC
MISC
CLOCKS
CLOCKS
THERMAL
THERMAL
DDR3
MISC
DDR3
MISC
PWR MANAGEMENT
PWR MANAGEMENT
JTAG & BPM
JTAG & BPM
BCLK
BCLK#
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
PRDY#
PREQ#
TCK
TMS
TRST#
TDO
DBR#
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
TDI
J3
H2
AG3
AG1
AT30
SM_RCOMP0_CPU
BF44
SM_RCOMP1_CPU
BE43
SM_RCOMP2_CPU
BG43
N53
N55
L56
L55
J58
M60
L59
K58
G58
E55
E59
G55
G59
H60
J59
J61
DPLL_REF_CLK DPLL_REF_CLK
-DPLL_REF_CLL
R6 140R2F-GP R6 140R2F-GP
R10 25D5R2F-GP R10 25D5R2F-GP
R11 200R2F-L-GP R11 200R2F-L-GP
TPAD40-GP
TPAD40-GP
TP118
TP118
1
1
TP119
TP119
TPAD40-GP
TPAD40-GP
SM_DRAMRST_CPU
D
CPU_CLK_100M 25
-CPU_CLK_100M 25
R70 1KR2J-1-GP R70 1KR2J-1-GP
1 2
R72 1KR2J-1-GP R72 1KR2J-1-GP
1 2
1 2
1 2
1 2
1 2
R13
R13
51R2J-2-GP
51R2J-2-GP
VCC1R05B_VTT_CPU
51R2J-2-GP
51R2J-2-GP
VCC1R35A
VCC1R05B_VTT_CPU
1 2
R8
R8
1 2
R9
R9
51R2J-2-GP
51R2J-2-GP
E
-XDP_PRDY 11
-XDP_PREQ 11
XDP_TCK 11
XDP_TMS 11
-XDP_TRST 11
XDP_TDI 11
XDP_TDO 11
-XDP_DBR 11,26
VCC1R05B_VTT_CPU
Q2
1 2
R1309
2 2
VCC3B
1 2
R14
R14
1KR2J-1-GP
1KR2J-1-GP
G
D S
LSK3541G1ET2L-GP
LSK3541G1ET2L-GP
-PLTRST_FAR 11,28,58,60
1 1
A
G
Q5
Q5
R1309
75R2J-1-GP
75R2J-1-GP
R1308 43R2J-GP R1308 43R2J-GP
1 2
-CPURST_R
D S
LSK3541G1ET2L-GP
LSK3541G1ET2L-GP
Q4
Q4
B
DRAMRST_GATE 12,28
C
G
1 2
DY
DY
C1
C1
SCD047U25V2KX-GP
SCD047U25V2KX-GP
Q2
LSK3541G1ET2L-GP
LSK3541G1ET2L-GP
D S
1 2
R17
R17
0R2J-2-GP
0R2J-2-GP
D
DY
DY
-DRAMRST_R
1 2
R18
R18
5K1R2J-4-GP
5K1R2J-4-GP
1 2
R19
R19
1KR2J-1-GP
1KR2J-1-GP
R88 1KR2J-1-GP R88 1KR2J-1-GP
1 2
-DRAMRST 12,13
Place near DIMM connector.
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU(2/8):CLK/MISC/JTAG
CPU(2/8):CLK/MISC/JTAG
CPU(2/8):CLK/MISC/JTAG
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
4 100 Monday, January 30, 2012
4 100 Monday, January 30, 2012
4 100 Monday, January 30, 2012
E
SC
SC
SC
A
M_A_DQ[63..0] 12
4 4
3 3
2 2
M_A_BS0 12
M_A_BS1 12
M_A_BS2 12
-M_A_CAS 12
-M_A_RAS 12
-M_A_WE 12
B
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60 M_A_DQ60
M_A_DQ61 M_A_DQ61
M_A_DQ62 M_A_DQ62 M_A_DQ62 M_A_DQ62 M_A_DQ62 M_A_DQ62 M_A_DQ62 M_A_DQ62 M_A_DQ62 M_A_DQ62 M_A_DQ62 M_A_DQ62
M_A_DQ63 M_A_DQ63 M_A_DQ63 M_A_DQ63 M_A_DQ63 M_A_DQ63 M_A_DQ63 M_A_DQ63 M_A_DQ63 M_A_DQ63
AG6
AP11
AJ10
AR11
AP6
AU6
AV9
AR6
AP8
AT13
AU13
BC7
BB7
BA13
BB11
BA7
BA9
BB9
AY13
AV14
AR14
AY17
AR19
BA14
AU14
BB14
BB17
BA45
AR43
AW48
BC48
BC45
AR45
AT48
AY48
BA49
AV49
BB51
AY53
BB49
AU49
BA53
BB55
BA55
AV56
AP50
AP53
AV54
AT54
AP56
AP52
AN57
AN53
AG56
AG53
AN55
AN52
AG55
AK56
BD37
BF36
BA28
BE39
BD39
AT41
AJ6
AL6
AJ8
AL8
AL7
U1C
U1C
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
SA_BS0
SA_BS1
SA_BS2
SA_CAS#
SA_RAS#
SA_WE#
C
3 OF 9
3 OF 9
AU36
SA_CK0
AV36
SA_CK#0
AY26
SA_CKE0
AT40
SA_CK1
AU40
SA_CK#1
BB26
SA_CKE1
BB40
SA_CS#0
BC41
SA_CS#1
AY40
SA_ODT0
BA41
SA_ODT1
AL11
SA_DQS#0
AR8
SA_DQS#1
AV11
SA_DQS#2
AT17
SA_DQS#3
AV45
SA_DQS#4
AY51
SA_DQS#5
AT55
SA_DQS#6
AK55
SA_DQS#7
AJ11
SA_DQS0
AR10
SA_DQS1
AY11
SA_DQS2
AU17
SA_DQS3
AW45
SA_DQS4
AV51
SA_DQS5
AT56
SA_DQS6
AK54
SA_DQS7
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
BG35
SA_MA0
BB34
SA_MA1
BE35
SA_MA2
BD35
SA_MA3
AT34
SA_MA4
AU34
SA_MA5
BB32
SA_MA6
AT32
SA_MA7
AY32
SA_MA8
AV32
SA_MA9
BE37
SA_MA10
BA30
SA_MA11
BC30
SA_MA12
AW41
SA_MA13
AY28
SA_MA14
AU26
SA_MA15
M_A_DDRCLK0_800M
-M_A_DDRCLK0_800M
M_A_CKE0
-M_A_DQS0
-M_A_DQS1
-M_A_DQS2
-M_A_DQS3
-M_A_DQS4
-M_A_DQS5
-M_A_DQS6
-M_A_DQS7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
-M_A_CS0 12
M_A_ODT0 12
D
M_A_DDRCLK0_800M 12
-M_A_DDRCLK0_800M 12
M_A_CKE0 12
M_A_CKE1 12
-M_A_CS1 12
M_A_ODT1 12
-M_A_DQS[7..0] 12
M_A_DQS[7..0] 12
M_A_A[15..0] 12
E
IVY-BRIDGE-GP-NF
IVY-BRIDGE-GP-NF
1 1
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU(3/8):DDR3 Channel-A
CPU(3/8):DDR3 Channel-A
CPU(3/8):DDR3 Channel-A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
5 100 Monday, January 30, 2012
5 100 Monday, January 30, 2012
5 100 Monday, January 30, 2012
E
SC
SC
SC
A
M_B_DQ[63..0] 13
4 4
3 3
2 2
M_B_BS0 13
M_B_BS1 13
M_B_BS2 13
-M_B_CAS 13
-M_B_RAS 13
-M_B_WE 13
B
U1D
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63 M_B_A2
AL4
AL1
AN3
AR4
AK4
AK3
AN4
AR1
AU4
AT2
AV4
BA4
AU3
AR3
AY2
BA3
BE9
BD9
BD13
BF12
BF8
BD10
BD14
BE13
BF16
BE17
BE18
BE21
BE14
BG14
BG18
BF19
BD50
BF48
BD53
BF52
BD49
BE49
BD54
BE53
BF56
BE57
BC59
AY60
BE54
BG54
BA58
AW59
AW58
AU58
AN61
AN59
AU59
AU61
AN58
AR58
AK58
AL58
AG58
AG59
AM60
AL59
AF61
AH60
BG39
BD42
AT22
AV43
BF40
BD45
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
SB_BS0
SB_BS1
SB_BS2
SB_CAS#
SB_RAS#
SB_WE#
C
4 OF 9
4 OF 9
BA34
SB_CK0
AY34
SB_CK#0
AR22
SB_CKE0
BA36
SB_CK1
BB36
SB_CK#1
BF27
SB_CKE1
BE41
SB_CS#0
BE47
SB_CS#1
AT43
SB_ODT0
BG47
SB_ODT1
AL3
SB_DQS#0
AV3
SB_DQS#1
BG11
SB_DQS#2
BD17
SB_DQS#3
BG51
SB_DQS#4
BA59
SB_DQS#5
AT60
SB_DQS#6
AK59
SB_DQS#7
AM2
SB_DQS0
AV1
SB_DQS1
BE11
SB_DQS2
BD18
SB_DQS3
BE51
SB_DQS4
BA61
SB_DQS5
AR59
SB_DQS6
AK61
SB_DQS7
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
BF32
SB_MA0
BE33
SB_MA1
BD33
SB_MA2
AU30
SB_MA3
BD30
SB_MA4
AV30
SB_MA5
BG30
SB_MA6
BD29
SB_MA7
BE30
SB_MA8
BE28
SB_MA9
BD43
SB_MA10
AT28
SB_MA11
AV28
SB_MA12
BD46
SB_MA13
AT26
SB_MA14
AU22
SB_MA15
M_B_DDRCLK0_800M
-M_B_DDRCLK0_800M
-M_B_DQS0
-M_B_DQS1
-M_B_DQS2
-M_B_DQS3
-M_B_DQS4
-M_B_DQS5
-M_B_DQS6
-M_B_DQS7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_CKE0
-M_B_CS0 13
M_B_ODT0 13
D
M_B_DDRCLK0_800M 13
-M_B_DDRCLK0_800M 13
M_B_CKE0 13
-M_B_DQS[7..0] 13
M_B_DQS[7..0] 13
M_B_A[15..0] 13
E
M_B_CKE1 13
-M_B_CS1 13
M_B_ODT1 13
IVY-BRIDGE-GP-NF
1 1
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU(4/8):DDR3 Channel-B
CPU(4/8):DDR3 Channel-B
CPU(4/8):DDR3 Channel-B
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
6 100 Monday, January 30, 2012
6 100 Monday, January 30, 2012
6 100 Monday, January 30, 2012
E
SC
SC
SC
A
VCCCPUC ORE
4 4
3 3
2 2
B
POWER
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
POWER
CORE SUPPLY
CORE SUPPLY
U1F
U1F
A26
A29
A31
A34
A35
A38
A39
A42
C26
C27
C32
C34
C37
C39
C42
D27
D32
D34
D37
D39
D42
E26
E28
E32
E34
E37
E38
F25
F26
F28
F32
F34
F37
F38
F42
G42
H25
H26
H28
H29
H32
H34
H35
H37
H38
H40
J25
J26
J28
J29
J32
J34
J35
J37
J38
J40
J42
K26
K27
K29
K32
K34
K35
K37
K39
K42
L25
L28
L33
L36
L40
N26
N30
N34
N38
6 OF 9
6 OF 9
AF46
VCCIO1
AG48
VCCIO3
AG50
VCCIO4
AG51
VCCIO5
AJ17
VCCIO6
AJ21
VCCIO7
AJ25
VCCIO8
AJ43
VCCIO9
AJ47
VCCIO10
AK50
VCCIO11
AK51
VCCIO12
AL14
VCCIO13
AL15
VCCIO14
AL16
VCCIO15
AL20
VCCIO16
AL22
VCCIO17
AL26
VCCIO18
AL45
VCCIO19
AL48
VCCIO20
AM16
VCCIO21
AM17
VCCIO22
AM21
VCCIO23
AM43
VCCIO24
AM47
VCCIO25
AN20
VCCIO26
AN42
VCCIO27
AN45
VCCIO28
AN48
VCCIO29
AA14
VCCIO30
AA15
VCCIO31
AB17
VCCIO32
RAILS
RAILS
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VCCIO41
VCCIO42
VCCIO43
VCCIO44
VCCIO45
VCCIO46
VCCIO47
VCCIO48
VCCIO49
VCCIO50
VCCIO51
VCCIO_SEL
VCCPQE1
VCCPQE2
VIDALERT#
VIDSCLK
VIDSOUT
AB20
AC13
AD16
AD18
AD21
AE14
AE15
AF16
AF18
AF20
AG15
AG16
AG17
AG20
AG21
AJ14
AJ15
W16
W17
BC22
AM25
AN22
A44
B43
C44
1
VIDALERT_CPU
PEG IO AND DDR IO
PEG IO AND DDR IO
SVID QUIET
SVID QUIET
TP21
TP21
TPAD14-GP
TPAD14-GP
VCCPQE
C
1 2
C2
SC10U6D3V3MX-GPC3SC10U6D3V3MX-GP
SC22U6D3V3MX-L-GPC2SC22U6D3V3MX-L-GP
VCC1R05B_VT T_CPU
C107
C107
C109
C109
1 2
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
R403
R403
1 2
D01RL0816F-L- GP
D01RL0816F-L- GP
1 2
C843
C843
SC1U10V2KX-1GP
SC1U10V2KX-1GP
R23 43R2J-GP R23 43R2J-GP
1 2
1 2
C3
C111
C111
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
75R2J-1-GP
75R2J-1-GP
1 2
C4
SC10U6D3V3MX-GPC4SC10U6D3V3MX-GP
C113
C113
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
R21
R21
1 2
C5
SC10U6D3V3MX-GPC5SC10U6D3V3MX-GP
C115
C115
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCC1R05B_VT T_CPU
1 2
R22
R22
130R2J-GP
130R2J-GP
1 2
C6
SC10U6D3V3MX-GPC6SC10U6D3V3MX-GP
C117
C117
C155
C155
1 2
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
-SVID_ALERT 80
SVID_CLK 80
SVID_DATA 80
D
VCC1R05B_VT T_CPU
1 2
1 2
C7
SC22U6D3V3MX-L-GPC7SC22U6D3V3MX-L-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C8
C9
SC10U6D3V3MX-GPC9SC10U6D3V3MX-GP
SC22U6D3V3MX-L-GPC8SC22U6D3V3MX-L-GP
C156
C156
C158
C158
C157
C157
1 2
1 2
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCC1R05B_VT T VCCCPUC ORE
1 2
R24
R24
10R2F-L-GP
10R2F-L-GP
1 2
1 2
C105
C105
C10
C10
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C179
C179
C160
C160
C159
C159
1 2
1 2
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
E
VCC1R05B_VT T VCC1R05B_VT T_CPU
R20 D01RL0816F -L-GP R20 D01RL0816F -L-GP
1 2
R87 D01RL0816F -L-GP R87 D01RL0816F -L-GP
1 2
C189
C189
C188
C188
C184
C184
C183
C183
1 2
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C190
C190
1 2
1 2
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
R25
R25
100R2F-L1-GP- U
100R2F-L1-GP- U
C192
C192
C191
C191
1 2
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
Z0 = 27.4 OHM
PU/PD < 1inch
C193
C193
C194
C194
C195
C195
C197
C197
C198
C198
C199
1 2
1 2
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C199
1 2
1 2
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
SENSE LINES
SENSE LINES
IVY-BRIDGE-GP-N F
IVY-BRIDGE-GP-N F
1 1
A
B
VSS_SENSE_CPU
G43
AN16
AN17
VCC_SENSE_C PU
F43
R27 0R2J-2-G P R27 0R2J-2-G P
1 2
R26 0R2J-2-G P R26 0R2J-2-G P
1 2
C
1 2
R28
R28
10R2F-L-GP
10R2F-L-GP
VCC_SENSE_V TT 84
VSS_SENSE_VTT 84
D
1 2
R29
R29
100R2F-L1-GP- U
100R2F-L1-GP- U
VCCSENSE 80
VSSSENSE 80
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.
Taipei Hsie n 221, Taiwan, R.O .C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O .C.
CPU(5/8):Processor Power
CPU(5/8):Processor Power
CPU(5/8):Processor Power
Genesis-1
Genesis-1
Genesis-1
7 100 Monday, January 30, 2012
7 100 Monday, January 30, 2012
E
7 100 Monday, January 30, 2012
SC
SC
SC
A
VCCGFXCORE_I
C108
C108
C110
C110
1 2
4 4
VCCGFXCORE_I
As for placement, please follow
"Chief River Platform Power Delivery Design Guide"
(Intel DocNo.458544)
3 3
2 2
1 1
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
C201
C201
C200
C200
1 2
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
EMI request.
C933
C933
1 2
1 2
SC22U4V3MX-GP
SC22U4V3MX-GP
C217
C217
C218
C218
1 2
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCCGFX_SENSE_I 80
VSSGFX_SENSE_I 80
VCC1R8B
1 2
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCCSA
A
C20
C20
C934
C934
1 2
1 2
SC22U4V3MX-GP
SC22U4V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C295
C295
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCCGFXCORE_I
R34
R34
D01RL0816F-L-GP
D01RL0816F-L-GP
1 2
C34
C34
C33
C33
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C627
C627
C21
C21
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C368
C368
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
R30
R30
100R2J-2-GP
100R2J-2-GP
1 2
R33
R33
100R2J-2-GP
100R2J-2-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
R37
R37
1 2
D01RL0816F-L-GP
D01RL0816F-L-GP
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C369
C369
1 2
1 2
SC22U4V3MX-GP
SC22U4V3MX-GP
DY
DY
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C69
C69
C22
C22
1 2
SC22U4V3MX-GP
SC22U4V3MX-GP
C370
C370
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
R31
R31
1 2
1 2
R32 0R2J-2-GP R32 0R2J-2-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
C834
C834
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C23
C23
1 2
1 2
C835
C835
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DY
DY
C70
C70
C371
C371
1 2
0R2J-2-GP
0R2J-2-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C844
C844
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCC1R8B_CPU
VCCSA_CPU
C836
C836
1 2
C837
C837
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
B
VCCGFXCORE_I
C845
C845
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VAXG_SENSE_CPU
VSSAXG_SENSE_CPU
C838
C838
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
B
U1G
U1G
AA46
AB47
AB50
AB51
AB52
AB53
AB55
AB56
AB58
AB59
AC61
AD47
AD48
AD50
AD51
AD52
AD53
AD55
AD56
AD58
AD59
AE46
N45
P47
P48
P50
P51
P52
P53
P55
P56
P61
T48
T58
T59
T61
U46
V47
V48
V50
V51
V52
V53
V55
V56
V58
V59
W50
W51
W52
W53
W55
W56
W61
Y48
Y61
F45
G45
BB3
BC1
BC4
L17
L21
N16
N20
N22
P17
P20
R16
R18
R21
U15
V16
V17
V18
V21
W20
IVY-BRIDGE-GP-NF
IVY-BRIDGE-GP-NF
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
VAXG55
VAXG56
VAXG_SENSE
VSSAXG_SENSE
VCCPLL1
VCCPLL2
VCCPLL3
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
VCCSA9
VCCSA10
VCCSA11
VCCSA12
VCCSA13
VCCSA14
VCCSA15
VCCSA16
POWER
POWER
VREF
VREF
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
GRAPHICS
GRAPHICS
SENSE
LINES
SENSE
LINES
1.8V RAIL
1.8V RAIL
SA RAIL
SA RAIL
VCCSA VID
VCCSA VID
7 OF 9
7 OF 9
SM_VREF
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25
VDDQ26
VCCDQ1
VCCDQ2
QUIET RAILS
QUIET RAILS
VDDQ_SENSE
VSS_SENSE_VDDQ
VCCSA_SENSE
SENSE LINES
SENSE LINES
VCCSA_VID0
VCCSA_VID1
lines
lines
C
AY43
BE7
BG7
1 2
R668
R668
1KR2F-3-GP
1KR2F-3-GP
DY
DY
VCC1R35_VDDQ
AJ28
AJ33
AJ36
AJ40
AL30
AL34
AL38
AL42
AM33
AM36
AM40
AN30
AN34
AN38
AR26
AR28
AR30
AR32
AR34
AR36
AR40
AV41
AW26
BA40
BB28
BG33
AM28
AN26
PN12 PWRNC PN12 PWRNC
BC43
PN13 PWRNC PN13 PWRNC
BA43
U10
D48
D49
C
VCCSA_SENSE 90
VCCSA_VID0_CPU
VCCSA_VID1_CPU
VCC1R35_VDDQ
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCC1R35_VDDQ
1 2
C846
C846
SC1U10V2KX-1GP
SC1U10V2KX-1GP
R1318 0R2J-L-GP R1318 0R2J-L-GP
1 2
R36 0R2J-L-GP R36 0R2J-L-GP
1 2
1 2
R669
R669
1KR2F-3-GP
1KR2F-3-GP
Place under CPU
1 2
1 2
As for placement, please follow
"Huron River Platform Power Delivery Design Guide Rev1.0"
(Intel DocNo.439028)
C26
C26
C27
C27
SC1U10V2KX-1GP
SC1U10V2KX-1GP
D
DDR3_VREF_DQ_SA_M3 12
DY
DY
1 2
C28
C28
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
Sandy Bridge
Ivy Bridge
VCC1R05B_VTT_CPU
1 2
DY
DY
R1317
R1317
10KR2J-3-GP
10KR2J-3-GP
1 2
R1319
R1319
10KR2J-3-GP
10KR2J-3-GP
D
1 2
C29
C29
1 2
1 2
1 2
C30
C30
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DY
DY
R35
R35
10KR2J-3-GP
10KR2J-3-GP
R38
R38
10KR2J-3-GP
10KR2J-3-GP
E
VCC1R35_VDDQ
1 2
R671
R671
1KR2F-3-GP
1 2
DY
DY
C24
C24
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
NEED SC2D2U4V2MX-1GP
78.22510.5FL
1 2
C31
C31
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
1 2
C32
C32
C36
C36
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
DY
DY
C25
C25
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
1 2
C35
C35
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1KR2F-3-GP
1 2
R670
R670
1KR2F-3-GP
1KR2F-3-GP
Place near CPU
1 2
C37
C37
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCCSA_SEL0 VCCSA_SEL1 VCCSA
0
LOW
0
1
High
1
VCCSA_SEL0 90
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
VCCSA_SEL1 90
CPU(6/8):Graphics Power
CPU(6/8):Graphics Power
CPU(6/8):Graphics Power
0
1
0
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
0.90V
0.80V
0.725V
0.675V
8 100 Monday, January 30, 2012
8 100 Monday, January 30, 2012
8 100 Monday, January 30, 2012
E
SC
SC
SC
A
U1H
U1H
B
8 OF 9
8 OF 9
C
U1I
U1I
9 OF 9
9 OF 9
D
E
BG17
VSS181
A13
VSS1
AA1
AA13
AA50
AA51
AA52
AA53
AA55
AA56
AA8
AB16
AB18
AB21
AB48
AB61
AC10
AC14
AC46
AC6
AD17
AD20
AD4
AD61
AE13
AE8
AF1
AF17
AF21
AF47
AF48
AF50
AF51
AF52
AF53
AF55
AF56
AF58
AF59
AG10
AG14
AG18
AG47
AG52
AG61
AG7
AH4
AH58
AJ13
AJ16
AJ20
AJ22
AJ26
AJ30
AJ34
AJ38
AJ42
AJ45
AJ48
AK1
AK52
AL10
AL13
AL17
AL21
AL25
AL28
AL33
AL36
AL40
AL43
AL47
AL61
AM13
AM20
AM22
AM26
AM30
AM34
A17
VSS2
A21
VSS3
A25
VSS4
A28
VSS5
A33
VSS6
A37
VSS7
A40
VSS8
A45
VSS9
A49
VSS10
A53
VSS11
A9
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
AJ7
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS
VSS
4 4
3 3
2 2
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
AM38
AM4
AM42
AM45
AM48
AM58
AN1
AN21
AN25
AN28
AN33
AN36
AN40
AN43
AN47
AN50
AN54
AP10
AP51
AP55
AP7
AR13
AR17
AR21
AR41
AR48
AR61
AR7
AT14
AT19
AT36
AT4
AT45
AT52
AT58
AU1
AU11
AU28
AU32
AU51
AU7
AV17
AV21
AV22
AV34
AV40
AV48
AV55
AW13
AW43
AW61
AW7
AY14
AY19
AY30
AY36
AY4
AY41
AY45
AY49
AY55
AY58
AY9
BA1
BA11
BA17
BA21
BA26
BA32
BA48
BA51
BB53
BC13
BC5
BC57
BD12
BD16
BD19
BD23
BD27
BD32
BD36
BD40
BD44
BD48
BD52
BD56
BD8
BE5
BG13
BG21
VSS182
BG24
VSS183
BG28
VSS184
BG37
VSS185
BG41
VSS186
BG45
VSS187
BG49
VSS188
BG53
VSS189
BG9
VSS190
C29
VSS191
C35
VSS192
C40
VSS193
D10
VSS194
D14
VSS195
D18
VSS196
D22
VSS197
D26
VSS198
D29
VSS199
D35
VSS200
D4
VSS201
D40
VSS202
D43
VSS203
D46
VSS204
D50
VSS205
D54
VSS206
D58
VSS207
D6
VSS208
E25
VSS209
E29
VSS210
E3
VSS211
E35
VSS212
E40
VSS213
F13
VSS214
F15
VSS215
F19
VSS216
F29
VSS217
F35
VSS218
F40
VSS219
F55
VSS220
G51
VSS221
G6
VSS222
G61
VSS223
H10
VSS224
H14
VSS225
H17
VSS226
H21
VSS227
H4
VSS228
H53
VSS229
H58
VSS230
J1
VSS231
J49
VSS232
J55
VSS233
K11
VSS234
K21
VSS235
K51
VSS236
K8
VSS237
L16
VSS238
L20
VSS239
L22
VSS240
L26
VSS241
L30
VSS242
L34
VSS243
L38
VSS244
L43
VSS245
L48
VSS246
L61
VSS247
M11
VSS248
M15
VSS249
IVY-BRIDGE-GP-NF
IVY-BRIDGE-GP-NF
VSS
VSS
:
:
NCTF TEST PIN
NCTF TEST PIN
NCTF
NCTF
VSS_NCTF_1#A5
VSS_NCTF_2#A57
VSS_NCTF_3#BC61
VSS_NCTF_8#BG5
VSS_NCTF_9#BG57
VSS_NCTF_10#C3
VSS_NCTF_13#E1
VSS_NCTF_14#E61
A5,A57,BC61,BG5
BG57,C3,E1,E61
A5,A57,BC61,BG5
BG57,C3,E1,E61
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_11
VSS_NCTF_12
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
M4
M58
M6
N1
N17
N21
N25
N28
N33
N36
N40
N43
N47
N48
N51
N52
N56
N61
P14
P16
P18
P21
P58
P59
P9
R17
R20
R4
R46
T1
T47
T50
T51
T52
T53
T55
T56
U13
U8
V20
V61
W13
W15
W18
W21
W46
W8
Y4
Y47
Y58
Y59
A5
A57
BC61
BG5
BG57
C3
E1
E61
BD3
BD59
BE4
BE58
C58
D59
1 1
A
IVY-BRIDGE-GP-NF
IVY-BRIDGE-GP-NF
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
B
C
D
Date: Sheet of
CPU(7/8):GND
CPU(7/8):GND
CPU(7/8):GND
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
9 100 Monday, January 30, 2012
9 100 Monday, January 30, 2012
9 100 Monday, January 30, 2012
E
SC
SC
SC
A
4 4
CPU_CFG0 11
ADD VIA
#C51,#A51
3 3
2 2
B
TP80
TP80
TPAD14-GP
TPAD14-GP
TP79
TP79
TPAD14-GP
TPAD14-GP
C
5 OF 9
U1E
U1E
B50
1
1
CFG0
C51
CFG1
B54
CFG2
D53
CFG3
A51
CFG4
C53
CFG5
C55
CFG6
H49
CFG7
A55
CFG8
H51
CFG9
K49
CFG10
K53
CFG11
F53
CFG12
G53
CFG13
L51
CFG14
F51
CFG15
D52
CFG16
L53
CFG17
H43
VCC_VAL_SENSE
K43
VSS_VAL_SENSE
H45
VAXG_VAL_SENSE
K45
VSSAXG_VAL_SENSE
F48
VCC_DIE_SENSE
G48
RSVD47
H48
RSVD6
K48
RSVD7
BA19
RSVD8
AV19
RSVD9
AT21
RSVD10
BB21
RSVD11
BB19
RSVD12
AY21
RSVD13
BA22
RSVD14
AY22
RSVD15
AU19
RSVD16
AU21
RSVD17
BD21
RSVD18
BD22
RSVD19
BD25
RSVD20
BD26
RSVD21
BG22
RSVD22
BE22
RSVD23
BG26
RSVD24
BE26
RSVD25
BF23
RSVD26
BE24
RSVD27
IVY-BRIDGE-GP-NF
IVY-BRIDGE-GP-NF
RESERVED
RESERVED
5 OF 9
BCLK_ITP
BCLK_ITP#
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
DC_TEST_A4
DC_TEST_C4
DC_TEST_D3
DC_TEST_D1
DC_TEST_A58
DC_TEST_A59
DC_TEST_C59
DC_TEST_A61
DC_TEST_C61
DC_TEST_D61
DC_TEST_BD61
DC_TEST_BE61
DC_TEST_BE59
DC_TEST_BG61
DC_TEST_BG59
DC_TEST_BG58
DC_TEST_BG4
DC_TEST_BG3
DC_TEST_BE3
DC_TEST_BG1
DC_TEST_BE1
DC_TEST_BD1
N59
N58
N42
L42
L45
L47
M13
M14
U14
W14
P13
AT49
K24
AH2
AG13
AM14
AM15
N50
A4
C4
D3
D1
A58
A59
C59
A61
C61
D61
BD61
BE61
BE59
BG61
BG59
BG58
BG4
BG3
BE3
BG1
BE1
BD1
DC_TEST_A4
DC_TEST_C4
DC_TEST_D1
DC_TEST_A58
DC_TEST_A59
DC_TEST_A61
DC_TEST_D61
DC_TEST_BD61
DC_TEST_BE61
DC_TEST_BG61
DC_TEST_BG58
DC_TEST_BG4
DC_TEST_BG3
DC_TEST_BG1
DC_TEST_BD1
1
1
1
1
1
1
1
1
D
TP43 TPAD40-GP TP43 TPAD40-GP
TP44 TPAD40-GP TP44 TPAD40-GP
TP48 TPAD40-GP TP48 TPAD40-GP
TP49 TPAD40-GP TP49 TPAD40-GP
TP50 TPAD40-GP TP50 TPAD40-GP
TP51 TPAD40-GP TP51 TPAD40-GP
TP52 TPAD40-GP TP52 TPAD40-GP
TP53 TPAD40-GP TP53 TPAD40-GP
E
1 1
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU(8/8):CFG/Reserved
CPU(8/8):CFG/Reserved
CPU(8/8):CFG/Reserved
A3
A3
A3
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
10 100 Monday, January 30, 2012
10 100 Monday, January 30, 2012
10 100 Monday, January 30, 2012
E
SC
SC
SC
5
VCC1R05B_VTT VCC3B VCC3M VCC3M
1 2
1 2
R44
R44
R45
R45
51R2J-2-GP
51R2J-2-GP
1KR2J-1-GP
1KR2J-1-GP
D D
XDP_TCK 4
XDP_TMS 4
XDP_TDI 4
-XDP_TRST 4
XDP_TDO 4
-XDP_DBR 4,26
-PLTRST_FAR 4,28,58,60
-XDP_CLK_100M 25
XDP_CLK_100M 25
CPU_CFG0 10
CPUPWRGD 4,29
C C
R49 1KR2J-1-GP R49 1KR2J-1-GP
R50 0R2J-2-GP R50 0R2J-2-GP
BPWRG 26,32,56,61,62,70,72
R51 1KR2J-1-GP R51 1KR2J-1-GP
R53 1KR2J-1-GP R53 1KR2J-1-GP
-XDP_PRDY 4
-XDP_PREQ 4
1 2
1 2
1 2
1 2
R59
R59
51R2J-2-GP
51R2J-2-GP
-PLTRST_FAR_XDP
BPWRG_XDP
CPU_CFG0_XDP
CPUPWRGD_XDP
1 2
MLX-CON26-8-GP
MLX-CON26-8-GP
MLX-52435-2671 MLX-52435-2671
4
DY
DY
CN24
CN24
28
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
27
PCH_TCK 24
PCH_TMS 24
PCH_TDI 24
PCH_TDO 24
-XDP_DBR 4,26
R52 1KR2J-1-GP R52 1KR2J-1-GP
1 2
R54 1KR2J-1-GP R54 1KR2J-1-GP
MPWRG 26,32,56,72
1 2
3
1 2
220R2J-L2-GP
220R2J-L2-GP
BPWRG_XDP_PCH
1 2
100R2J-2-GP
100R2J-2-GP
R46
R46
R55
R55
2
1 2
1 2
R47
R47
R48
R48
220R2J-L2-GP
220R2J-L2-GP
220R2J-L2-GP
220R2J-L2-GP
-PLTRST_XDP_PCH
1 2
R57
R57
1 2
R58
R58
51R2J-2-GP
51R2J-2-GP
1 2
R56
R56
100R2J-2-GP
100R2J-2-GP
100R2J-2-GP
100R2J-2-GP
DY
DY
CN25
CN25
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
MLX-CON26-8-GP
MLX-CON26-8-GP
28
27
1
DEBUG Interface for Processor.
XDP1 XDP2
TDO
TRST#
DBRST#
B B
RESET#
CFG0
PWRGD
BPWRG
NOTE:"ASM" FOR PDV/SDV ONLY NOTE:"ASM" FOR PDV/SDV ONLY
ENABLE DISABLE
R45
R59
R44
R49
R51
R53
R50
CN24
ASM DY
ASM ASM
ASM ASM
ASM DY
ASM DY
ASM DY
ASM DY
ASM DY
PDV Logic
DEBUG Interface for PCH.
ENABLE DISABLE
TDO
TMS
TDI
TCK
R46
R55
R48
R57
R47
R56
R58
R52
R54
CN25
220 DY
100
220
100 DY
220 DY
100 DY
51 51
ASM DY MPWRG
ASM
ASM
DY
DY
DY
DY
PDV Logic
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
XDP Connector
XDP Connector
XDP Connector
Genesis-1
Genesis-1
Genesis-1
1
11 100 Monday, January 30, 2012
11 100 Monday, January 30, 2012
11 100 Monday, January 30, 2012
SC
SC
SC
A
B
C
D
E
VCC1R35A_DIMM
4 4
DDR3_VREF_DQ_SA DDR3_VREF_DQ_SA
DDR3_VREF_CA
12
C120
C120
12
C119
C119
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_A_A[15..0] 5
1 2
R6944
R6944
1 2
R6909
R6909
240R2J-3-GP
240R2J-3-GP
240R2J-3-GP
240R2J-3-GP
M_A_BS0 5
M_A_BS1 5
M_A_BS2 5
M_A_DDRCLK0_800M 5
-M_A_DDRCLK0_800M 5
M_A_CKE0 5
-M_A_WE 5
-M_A_CAS 5 -M_A_CAS 5
1 2
DDR3_VREF_CA
1 2
R6946
R6946
240R2J-3-GP
240R2J-3-GP
-M_A_DDRCLK0_800M 5
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_A_DDRCLK0_800M 5
-M_A_RAS 5
DDR3_VREF_DQ_SA
C124
C124
M_A_A[15..0] 5
M_A_BS0 5
M_A_BS1 5
M_A_BS2 5
M_A_CKE0 5
-M_A_WE 5
-M_A_CAS 5
-M_A_RAS 5
VCC1R35A_DIMM
12
C123
C123
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3 3
R6911
R6911
240R2J-3-GP
2 2
240R2J-3-GP
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
U78
U78
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
L9
NC#L9
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
T7
A14
M7
NC#M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
UDM
E7
LDM
L3
WE#
K3
CAS#
J3
RAS#
EDJ8216E5MB-DJ-F-GP
EDJ8216E5MB-DJ-F-GP
U80
U80
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
L9
NC#L9
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
T7
A14
M7
NC#M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
UDM
E7
LDM
L3
WE#
K3
CAS#
J3
RAS#
EDJ8216E5MB-DJ-F-GP
EDJ8216E5MB-DJ-F-GP
UDQS#
LDQS#
RESET#
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UDQS
LDQS
NC#L1
NC#J9
NC#J1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
RESET#
M_A_DQ5
E3
DQ0
M_A_DQ7
F7
DQ1
M_A_DQ0
F2
DQ2
M_A_DQ2
F8
DQ3
M_A_DQ4
H3
DQ4
M_A_DQ6
H8
DQ5
M_A_DQ1
G2
DQ6
M_A_DQ3
H7
DQ7
M_A_DQ15
D7
DQ8
M_A_DQ10
C3
DQ9
M_A_DQ14
C8
M_A_DQ12
C2
M_A_DQ11
A7
M_A_DQ9
A2
M_A_DQ8
B8
M_A_DQ13
A3
C7
B7
F3
M_A_DQS0 5
G3
-M_A_DQS0 5
K1
M_A_ODT0 5
ODT
L2
CS#
T2
L1
J9
J1
J8
VSS
M1
VSS
M9
VSS
J2
VSS
P9
VSS
G8
VSS
B3
VSS
T1
VSS
A9
VSS
T9
VSS
E1
VSS
P1
VSS
G1
F9
E8
E2
D8
D1
B9
B1
G9
M_A_DQ36
E3
DQ0
M_A_DQ34
F7
DQ1
M_A_DQ32
F2
DQ2
M_A_DQ35
F8
DQ3
M_A_DQ33
H3
DQ4
M_A_DQ39
H8
DQ5
M_A_DQ37
G2
DQ6
M_A_DQ38
H7
DQ7
M_A_DQ47
D7
DQ8
M_A_DQ42
C3
DQ9
M_A_DQ41
C8
DQ10
M_A_DQ40
C2
DQ11
M_A_DQ46
A7
DQ12
M_A_DQ45
A2
DQ13
M_A_DQ43
B8
DQ14
M_A_DQ44
A3
DQ15
C7
UDQS
B7
UDQS#
F3
M_A_DQS4 5
LDQS
G3
LDQS#
NC#L1
NC#J9
NC#J1
-M_A_DQS4 5
K1
M_A_ODT0 5
ODT
L2
CS#
T2
L1
J9
J1
J8
VSS
M1
VSS
M9
VSS
J2
VSS
P9
VSS
G8
VSS
B3
VSS
T1
VSS
A9
VSS
T9
VSS
E1
VSS
P1
VSS
G1
VSSQ
F9
VSSQ
E8
VSSQ
E2
VSSQ
D8
VSSQ
D1
VSSQ
B9
VSSQ
B1
VSSQ
G9
VSSQ
M_A_DQ[7..0] 5 M_A_DQ[23..16] 5
M_A_DQ[15..8] 5
DDR3_VREF_CA
M_A_DQS1 5
-M_A_DQS1 5
-M_A_CS0 5
-DRAMRST 4,13
M_A_DQS5 5
-M_A_DQS5 5
-M_A_CS1 5
M_A_CKE1 5
M_A_ODT1 5
M_A_DQ[39..32] 5
M_A_DQ[47..40] 5
-M_A_CS0 5
-DRAMRST 4,13
-M_A_CS1 5
M_A_CKE1 5
M_A_ODT1 5
240R2J-3-GP
240R2J-3-GP
R6912
R6912
240R2J-3-GP
240R2J-3-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
R6945
R6945
R6910
R6910
240R2J-3-GP
240R2J-3-GP
M_A_DDRCLK0_800M 5
-M_A_DDRCLK0_800M 5
DDR3_VREF_CA
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_A_A[15..0] 5
1 2
1 2
R6947
R6947
240R2J-3-GP
240R2J-3-GP
M_A_BS0 5
M_A_BS1 5
M_A_BS2 5
M_A_DDRCLK0_800M 5
-M_A_DDRCLK0_800M 5
12
C122
C122
M_A_A[15..0] 5
M_A_BS0 5
M_A_BS1 5
M_A_BS2 5
M_A_CKE0 5
DDR3_VREF_DQ_SA
C126
C126
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_A_CKE0 5
-M_A_WE 5
-M_A_CAS 5
-M_A_RAS 5
VCC1R35A_DIMM
12
C121
C121
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
-M_A_WE 5
-M_A_RAS 5
VCC1R35A_DIMM
12
C125
C125
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
U79
U79
K8
K2
N1
R9
B2
D9
G7
R1
N9
A8
A1
C1
C9
D2
E9
F1
H9
H2
H1
M8
L8
L9
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
D3
E7
L3
K3
J3
EDJ8216E5MB-DJ-F-GP
EDJ8216E5MB-DJ-F-GP
U81
U81
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
L9
NC#L9
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
T7
A14
M7
NC#M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
UDM
E7
LDM
L3
WE#
K3
CAS#
J3
RAS#
EDJ8216E5MB-DJ-F-GP
EDJ8216E5MB-DJ-F-GP
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VREFDQ
VREFCA
ZQ
NC#L9
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
NC#M7
BA0
BA1
BA2
CK
CK#
CKE
UDM
LDM
WE#
CAS#
RAS#
RESET#
M_A_DQ16
E3
DQ0
M_A_DQ19
F7
DQ1
M_A_DQ17
F2
DQ2
M_A_DQ18
F8
DQ3
M_A_DQ20
H3
DQ4
M_A_DQ23
H8
DQ5
M_A_DQ21
G2
DQ6
M_A_DQ22
H7
DQ7
M_A_DQ27
D7
DQ8
M_A_DQ25
C3
DQ9
M_A_DQ31
C8
DQ10
M_A_DQ29
C2
DQ11
M_A_DQ28
A7
DQ12
M_A_DQ30
A2
DQ13
M_A_DQ26
B8
DQ14
M_A_DQ24
A3
DQ15
C7
UDQS
B7
UDQS#
F3
LDQS
G3
LDQS#
K1
ODT
L2
CS#
T2
RESET#
L1
NC#L1
J9
NC#J9
J1
NC#J1
J8
VSS
M1
VSS
M9
VSS
J2
VSS
P9
VSS
G8
VSS
B3
VSS
T1
VSS
A9
VSS
T9
VSS
E1
VSS
P1
VSS
G1
VSSQ
F9
VSSQ
E8
VSSQ
E2
VSSQ
D8
VSSQ
D1
VSSQ
B9
VSSQ
B1
VSSQ
G9
VSSQ
M_A_DQ50
E3
DQ0
M_A_DQ55
F7
DQ1
M_A_DQ52
F2
DQ2
M_A_DQ54
F8
DQ3
M_A_DQ48
H3
DQ4
M_A_DQ51
H8
DQ5
M_A_DQ53
G2
DQ6
M_A_DQ49
H7
DQ7
M_A_DQ59
D7
DQ8
M_A_DQ61
C3
DQ9
M_A_DQ62
C8
DQ10
M_A_DQ57
C2
DQ11
M_A_DQ63
A7
DQ12
M_A_DQ56
A2
DQ13
M_A_DQ58
B8
DQ14
M_A_DQ60
A3
DQ15
C7
UDQS
B7
UDQS#
F3
LDQS
LDQS#
NC#L1
NC#J9
NC#J1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
M_A_DQS6 5
G3
-M_A_DQS6 5
K1
M_A_ODT0 5
ODT
L2
CS#
T2
L1
J9
J1
J8
VSS
M1
VSS
M9
VSS
J2
VSS
P9
VSS
G8
VSS
B3
VSS
T1
VSS
A9
VSS
T9
VSS
E1
VSS
P1
VSS
G1
F9
E8
E2
D8
D1
B9
B1
G9
M_A_DQS2 5
-M_A_DQS2 5
M_A_ODT0 5
M_A_DQS7 5
-M_A_DQS7 5
M_A_DQS3 5
-M_A_DQS3 5
-M_A_CS0 5
-DRAMRST 4,13
-M_A_CS0 5
-DRAMRST 4,13
M_A_DQ[31..24] 5
-M_A_CS1 5
M_A_CKE1 5
M_A_ODT1 5
M_A_DQ[55..48] 5
M_A_DQ[63..56] 5
-M_A_CS1 5
M_A_CKE1 5
M_A_ODT1 5
VCC0R675B_DIMM
R6917 36R2J-GP R6917 36R2J-GP
1 2
R6918 36R2J-GP R6918 36R2J-GP
1 2
R6919 36R2J-GP R6919 36R2J-GP
1 2
R6920 36R2J-GP R6920 36R2J-GP
1 2
R6921 36R2J-GP R6921 36R2J-GP
1 2
R6922 36R2J-GP R6922 36R2J-GP
1 2
R6923 36R2J-GP R6923 36R2J-GP
1 2
R6924 36R2J-GP R6924 36R2J-GP
1 2
R6925 36R2J-GP R6925 36R2J-GP
1 2
R6926 36R2J-GP R6926 36R2J-GP
1 2
R6927 36R2J-GP R6927 36R2J-GP
1 2
R6928 36R2J-GP R6928 36R2J-GP
1 2
R6929 36R2J-GP R6929 36R2J-GP
1 2
R6930 36R2J-GP R6930 36R2J-GP
1 2
R6931 36R2J-GP R6931 36R2J-GP
1 2
R6932 36R2J-GP R6932 36R2J-GP
1 2
R6933 36R2J-GP R6933 36R2J-GP
1 2
R6934 36R2J-GP R6934 36R2J-GP
1 2
R6935 36R2J-GP R6935 36R2J-GP
1 2
R6936 36R2J-GP R6936 36R2J-GP
1 2
R6937 36R2J-GP R6937 36R2J-GP
1 2
R6938 36R2J-GP R6938 36R2J-GP
1 2
R6939 36R2J-GP R6939 36R2J-GP
1 2
R6940 36R2J-GP R6940 36R2J-GP
1 2
R6941 36R2J-GP R6941 36R2J-GP
1 2
R6942 36R2J-GP R6942 36R2J-GP
1 2
R6943 36R2J-GP R6943 36R2J-GP
1 2
R6982 36R2J-GP R6982 36R2J-GP
1 2
12
12
C61
C61
C60
C60
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M_A_DDRCLK0_800M 5
M_A_CKE0 5
M_A_ODT0 5
-M_A_CS0 5
-M_A_RAS 5
-M_A_CAS 5
-M_A_WE 5
M_A_BS0 5
M_A_BS1 5
M_A_BS2 5
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
12
12
C63
C63
C62
C62
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
-M_A_CS1 5
M_A_CKE1 5
M_A_ODT1 5
12
C64
C64
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C65
C65
M_A_A[15..0] 5
VCC0R675B_DIMM
DY
DY
12
C66
C66
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
VCC1R35A VCC1R35A_DIMM
VCC0R675B VCC0R675B_DIMM
Place one cap to each power pin and as close as possible
-M_A_DDRCLK0_800M 5
R60 D01RL0816F-L-GP R60 D01RL0816F-L-GP
1 2
R62 D01RL0816F-L-GP R62 D01RL0816F-L-GP
1 2
12
12
12
C41
C41
C42
C42
C40
C40
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C51
C51
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
VCC1R35A_DIMM
DDR3_VREF_DQ_SA_M3 8
DRAMRST_GATE 4,28
12
12
C43
C43
C44
C44
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
12
C53
C53
C52
C52
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C2723
C2723
SC1D5P50V2CN-1GP
SC1D5P50V2CN-1GP
1 2
R673
R673
1KR2F-3-GP
1KR2F-3-GP
1 2
R672
R672
1KR2F-3-GP
1KR2F-3-GP
Place near DIMM slot
G
12
12
C46
C46
C45
C45
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
12
C54
C54
C55
C55
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
R6988
R6988
30D1R2F-L-GP
30D1R2F-L-GP
1 2
R6987
R6987
30D1R2F-L-GP
30D1R2F-L-GP
R63 0R2J-2-GP R63 0R2J-2-GP
1 2
DY
DY
R307 0R2J-2-GP
R307 0R2J-2-GP
1 2
Q44
Q44
LSK3541G1ET2L-GP
LSK3541G1ET2L-GP
D S
12
12
C48
C48
C47
C47
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
12
C56
C56
C57
C57
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
12
C49
C49
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C58
C58
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C1154
C1154
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DDR3_VREF_DQ_SA
VCC1R35A_DIMM
12
C50
C50
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCC1R35A_DIMM
12
C59
C59
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
12
C17
C17
SC33P50V3JN-GP
SC33P50V3JN-GP
DY
DY
12
C18
C18
SC33P50V3JN-GP
SC33P50V3JN-GP
1 1
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet of
E
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
DDR3 SODIMM-A
DDR3 SODIMM-A
DDR3 SODIMM-A
Genesis-1
Genesis-1
Genesis-1
SC
SC
SC
12 100 Monday, January 30, 2012
12 100 Monday, January 30, 2012
12 100 Monday, January 30, 2012
A
4 4
B
C
D
E
VCC1R35A_DIMM
DDR3_VREF_DQ_SA
DDR3_VREF_CA
12
C134
C134
12
C135
C135
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_B_A[15..0] 6
1 2
1 2
R6916
R6916
R6967
R6967
240R2J-3-GP
240R2J-3-GP
240R2J-3-GP
240R2J-3-GP
M_B_BS0 6
M_B_BS1 6
3 3
2 2
240R2J-3-GP
240R2J-3-GP
M_B_BS2 6
M_B_DDRCLK0_800M 6
-M_B_DDRCLK0_800M 6
M_B_CKE0 6
-M_B_WE 6
-M_B_CAS 6
-M_B_RAS 6
VCC1R35A_DIMM
DDR3_VREF_DQ_SA
DDR3_VREF_CA
12
C154
C154
12
C161
C161
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_B_A[15..0] 6
1 2
1 2
R6958
R6958
R6980
R6980
240R2J-3-GP
240R2J-3-GP
M_B_BS0 6
M_B_BS1 6
M_B_BS2 6
M_B_DDRCLK0_800M 6
-M_B_DDRCLK0_800M 6
M_B_CKE0 6
-M_B_WE 6
-M_B_CAS 6
-M_B_RAS 6
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
U82
U82
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
L9
NC#L9
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
T7
A14
M7
NC#M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
UDM
E7
LDM
L3
WE#
K3
CAS#
J3
RAS#
EDJ8216E5MB-DJ-F-GP
EDJ8216E5MB-DJ-F-GP
U85
U85
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
L9
NC#L9
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
T7
A14
M7
NC#M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
UDM
E7
LDM
L3
WE#
K3
CAS#
J3
RAS#
EDJ8216E5MB-DJ-F-GP
EDJ8216E5MB-DJ-F-GP
RESET#
UDQS#
LDQS#
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UDQS
LDQS
NC#L1
NC#J9
NC#J1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
RESET#
-M_B_CS0 6
-DRAMRST 4,12
M_B_DQS5 6
-M_B_DQS5 6
-M_B_CS0 6
-DRAMRST 4,12
-M_B_CS1 6
M_B_CKE1 6
M_B_ODT1 6
-M_B_CS1 6
M_B_CKE1 6
M_B_ODT1 6
M_B_DQ[7..0] 6
M_B_DQ[15..8] 6
240R2J-3-GP
240R2J-3-GP
M_B_DQ[39..32] 6
M_B_DQ[47..40] 6
R6959
R6959
240R2J-3-GP
240R2J-3-GP
DDR3_VREF_CA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_B_A[15..0] 6
1 2
1 2
R6979
R6979
R6952
R6952
240R2J-3-GP
240R2J-3-GP
M_B_DDRCLK0_800M 6
-M_B_DDRCLK0_800M 6
DDR3_VREF_CA
12
C165
C165
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_B_A[15..0] 6
1 2
1 2
R6981
R6981
240R2J-3-GP
240R2J-3-GP
M_B_BS0 6
M_B_BS1 6
M_B_BS2 6
M_B_DDRCLK0_800M 6
-M_B_DDRCLK0_800M 6
M_B_DQ0
E3
DQ0
M_B_DQ6
F7
DQ1
M_B_DQ5
F2
DQ2
M_B_DQ7
F8
DQ3
M_B_DQ4
H3
DQ4
M_B_DQ3
H8
DQ5
M_B_DQ1
G2
DQ6
M_B_DQ2
H7
DQ7
M_B_DQ11
D7
DQ8
M_B_DQ12
C3
DQ9
M_B_DQ15
C8
M_B_DQ8
C2
M_B_DQ10
A7
M_B_DQ9
A2
M_B_DQ14
B8
M_B_DQ13
A3
C7
B7
F3
G3
K1
ODT
L2
CS#
T2
L1
J9
J1
J8
VSS
M1
VSS
M9
VSS
J2
VSS
P9
VSS
G8
VSS
B3
VSS
T1
VSS
A9
VSS
T9
VSS
E1
VSS
P1
VSS
G1
F9
E8
E2
D8
D1
B9
B1
G9
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UDQS
UDQS#
LDQS
LDQS#
ODT
CS#
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
M_B_DQS1 6
-M_B_DQS1 6
M_B_DQS0 6
-M_B_DQS0 6
M_B_ODT0 6
M_B_DQ33
E3
M_B_DQ39
F7
M_B_DQ37
F2
M_B_DQ38
F8
M_B_DQ36
H3
M_B_DQ35
H8
M_B_DQ32
G2
M_B_DQ34
H7
M_B_DQ43
D7
M_B_DQ40
C3
M_B_DQ47
C8
M_B_DQ45
C2
M_B_DQ42
A7
M_B_DQ44
A2
M_B_DQ46
B8
M_B_DQ41
A3
C7
B7
F3
M_B_DQS4 6
G3
-M_B_DQS4 6
K1
M_B_ODT0 6
L2
T2
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
DDR3_VREF_DQ_SA
12
C137
C137
M_B_BS0 6
M_B_BS1 6
M_B_BS2 6
M_B_CKE0 6
-M_B_WE 6
-M_B_CAS 6
-M_B_RAS 6
DDR3_VREF_DQ_SA
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_B_CKE0 6
-M_B_WE 6
-M_B_CAS 6
-M_B_RAS 6
VCC1R35A_DIMM
12
C136
C136
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCC1R35A_DIMM
C163
C163
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
U83
U83
K8
K2
N1
R9
B2
D9
G7
R1
N9
A8
A1
C1
C9
D2
E9
F1
H9
H2
H1
M8
L8
L9
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
D3
E7
L3
K3
J3
EDJ8216E5MB-DJ-F-GP
EDJ8216E5MB-DJ-F-GP
U84
U84
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
L9
NC#L9
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
T7
A14
M7
NC#M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
UDM
E7
LDM
L3
WE#
K3
CAS#
J3
RAS#
EDJ8216E5MB-DJ-F-GP
EDJ8216E5MB-DJ-F-GP
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VREFDQ
VREFCA
ZQ
NC#L9
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
NC#M7
BA0
BA1
BA2
CK
CK#
CKE
UDM
LDM
WE#
CAS#
RAS#
RESET#
VCC0R675B_DIMM
-M_B_CS0 6
-DRAMRST 4,12
-M_B_CS0 6
-DRAMRST 4,12
-M_B_CS1 6
M_B_CKE1 6
M_B_ODT1 6
-M_B_CS1 6
M_B_CKE1 6
M_B_ODT1 6
M_B_DQ[23..16] 6
M_B_DQ[31..24] 6
M_B_DQ[55..48] 6
M_B_DQ[63..56] 6
R6960 36R2J-GP R6960 36R2J-GP
1 2
R6968 36R2J-GP R6968 36R2J-GP
1 2
R6972 36R2J-GP R6972 36R2J-GP
1 2
R6964 36R2J-GP R6964 36R2J-GP
1 2
R6966 36R2J-GP R6966 36R2J-GP
1 2
R6965 36R2J-GP R6965 36R2J-GP
1 2
R6969 36R2J-GP R6969 36R2J-GP
1 2
R6970 36R2J-GP R6970 36R2J-GP
1 2
R6971 36R2J-GP R6971 36R2J-GP
1 2
R6974 36R2J-GP R6974 36R2J-GP
1 2
R6973 36R2J-GP R6973 36R2J-GP
1 2
R6975 36R2J-GP R6975 36R2J-GP
1 2
R6949 36R2J-GP R6949 36R2J-GP
1 2
R6948 36R2J-GP R6948 36R2J-GP
1 2
R6950 36R2J-GP R6950 36R2J-GP
1 2
R6955 36R2J-GP R6955 36R2J-GP
1 2
R6957 36R2J-GP R6957 36R2J-GP
1 2
R6956 36R2J-GP R6956 36R2J-GP
1 2
R6962 36R2J-GP R6962 36R2J-GP
1 2
R6961 36R2J-GP R6961 36R2J-GP
1 2
R6963 36R2J-GP R6963 36R2J-GP
1 2
R6976 36R2J-GP R6976 36R2J-GP
1 2
R6977 36R2J-GP R6977 36R2J-GP
1 2
R6978 36R2J-GP R6978 36R2J-GP
1 2
R6951 36R2J-GP R6951 36R2J-GP
1 2
R6983 36R2J-GP R6983 36R2J-GP
1 2
R6984 36R2J-GP R6984 36R2J-GP
1 2
R6985 36R2J-GP R6985 36R2J-GP
1 2
12
12
C82
C82
C81
C81
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M_B_DDRCLK0_800M 6
M_B_CKE0 6
M_B_ODT0 6
-M_B_CS0 6
-M_B_RAS 6
-M_B_CAS 6
-M_B_WE 6
M_B_BS0 6
M_B_BS1 6
M_B_BS2 6
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
12
12
C98
C98
C90
C90
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
-M_B_CS1 6
M_B_CKE1 6
M_B_ODT1 6
12
C85
C85
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C79
C79
M_B_A[15..0] 6
VCC0R675B_DIMM
DY
DY
12
C87
C87
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
Place one cap to each power pin and as close as possible
-M_B_DDRCLK0_800M 6
12
12
C93
C93
C91
C91
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
12
12
C97
C97
C89
C89
C75
C75
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
12
12
C78
C78
C92
C92
C95
C95
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C2724
C2724
SC1D5P50V2CN-1GP
SC1D5P50V2CN-1GP
12
C80
C80
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C76
C76
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
R6953
R6953
30D1R2F-L-GP
30D1R2F-L-GP
12
1 2
12
C86
C86
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C83
C83
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
R6954
R6954
30D1R2F-L-GP
30D1R2F-L-GP
12
C68
C68
12
C96
C96
C1158
C1158
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCC1R35A_DIMM
DY
DY
12
12
C67
C67
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C94
C94
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
12
C101
C101
C38
C38
C88
C88
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC33P50V3JN-GP
SC33P50V3JN-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCC1R35A_DIMM
DY
DY
12
12
12
C84
C84
C39
C39
C99
C99
SC33P50V3JN-GP
SC33P50V3JN-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
M_B_DQ16
E3
DQ0
M_B_DQ23
F7
DQ1
M_B_DQ17
F2
DQ2
M_B_DQ22
F8
DQ3
M_B_DQ20
H3
DQ4
M_B_DQ19
H8
DQ5
M_B_DQ21
G2
DQ6
M_B_DQ18
H7
DQ7
M_B_DQ31
D7
DQ8
M_B_DQ25
C3
DQ9
M_B_DQ27
C8
DQ10
M_B_DQ24
C2
DQ11
M_B_DQ26
A7
DQ12
M_B_DQ28
A2
DQ13
M_B_DQ30
B8
DQ14
M_B_DQ29
A3
DQ15
C7
UDQS
B7
UDQS#
F3
LDQS
G3
LDQS#
K1
ODT
L2
CS#
T2
RESET#
L1
NC#L1
J9
NC#J9
J1
NC#J1
J8
VSS
M1
VSS
M9
VSS
J2
VSS
P9
VSS
G8
VSS
B3
VSS
T1
VSS
A9
VSS
T9
VSS
E1
VSS
P1
VSS
G1
VSSQ
F9
VSSQ
E8
VSSQ
E2
VSSQ
D8
VSSQ
D1
VSSQ
B9
VSSQ
B1
VSSQ
G9
VSSQ
E3
DQ0
F7
DQ1
F2
DQ2
F8
DQ3
H3
DQ4
H8
DQ5
G2
DQ6
H7
DQ7
D7
DQ8
C3
DQ9
C8
DQ10
C2
DQ11
A7
DQ12
A2
DQ13
B8
DQ14
A3
DQ15
C7
UDQS
B7
UDQS#
F3
LDQS
G3
LDQS#
K1
ODT
L2
CS#
T2
L1
NC#L1
J9
NC#J9
J1
NC#J1
J8
VSS
M1
VSS
M9
VSS
J2
VSS
P9
VSS
G8
VSS
B3
VSS
T1
VSS
A9
VSS
T9
VSS
E1
VSS
P1
VSS
G1
VSSQ
F9
VSSQ
E8
VSSQ
E2
VSSQ
D8
VSSQ
D1
VSSQ
B9
VSSQ
B1
VSSQ
G9
VSSQ
M_B_DQ52
M_B_DQ54
M_B_DQ49
M_B_DQ50
M_B_DQ48
M_B_DQ51
M_B_DQ53
M_B_DQ55
M_B_DQ62
M_B_DQ56
M_B_DQ58
M_B_DQ60
M_B_DQ63
M_B_DQ57
M_B_DQ59
M_B_DQ61
M_B_DQS2 6
-M_B_DQS2 6
M_B_ODT0 6
M_B_DQS6 6
-M_B_DQS6 6
M_B_ODT0 6
M_B_DQS3 6
-M_B_DQS3 6
M_B_DQS7 6
-M_B_DQS7 6
1 1
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet of
E
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
DDR3 SODIMM-B
DDR3 SODIMM-B
DDR3 SODIMM-B
Genesis-1
Genesis-1
Genesis-1
13 100 Monday, January 30, 2012
13 100 Monday, January 30, 2012
13 100 Monday, January 30, 2012
SC
SC
SC
5
D D
4
3
2
1
C C
B B
A A
5
4
B L A N K
B L A N K
B L A N K
B L A N K
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
BLANK
BLANK
BLANK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
2
Genesis-1
Genesis-1
Genesis-1
14 100 Monday, January 30, 2012
14 100 Monday, January 30, 2012
14 100 Monday, January 30, 2012
1
SC
SC
SC
5
D D
4
3
2
1
C C
B B
A A
5
4
B L A N K
B L A N K
B L A N K
B L A N K
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
BLANK
BLANK
BLANK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
2
Genesis-1
Genesis-1
Genesis-1
15 100 Monday, January 30, 2012
15 100 Monday, January 30, 2012
15 100 Monday, January 30, 2012
1
SC
SC
SC
5
D D
C C
4
B L A N K
B L A N K
B L A N K
B L A N K
3
2
1
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
BLANK
BLANK
BLANK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
16 100 Monday, January 30, 2012
16 100 Monday, January 30, 2012
16 100 Monday, January 30, 2012
1
SC
SC
SC
5
D D
C C
4
B L A N K
B L A N K
B L A N K
B L A N K
3
2
1
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
BLANK
BLANK
BLANK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
17 100 Monday, January 30, 2012
17 100 Monday, January 30, 2012
17 100 Monday, January 30, 2012
1
SC
SC
SC
5
D D
C C
4
B L A N K
B L A N K
B L A N K
B L A N K
3
2
1
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
BLANK
BLANK
BLANK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
18 100 Monday, January 30, 2012
18 100 Monday, January 30, 2012
18 100 Monday, January 30, 2012
1
SC
SC
SC
5
D D
4
3
2
1
C C
B B
A A
5
4
B L A N K
B L A N K
B L A N K
B L A N K
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
BLANK
BLANK
BLANK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
2
Genesis-1
Genesis-1
Genesis-1
19 100 Monday, January 30, 2012
19 100 Monday, January 30, 2012
19 100 Monday, January 30, 2012
1
SC
SC
SC
5
D D
C C
4
B L A N K
B L A N K
B L A N K
B L A N K
3
2
1
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
BLANK
BLANK
BLANK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
20 100 Monday, January 30, 2012
20 100 Monday, January 30, 2012
20 100 Monday, January 30, 2012
1
SC
SC
SC
5
D D
C C
4
B L A N K
B L A N K
B L A N K
B L A N K
3
2
1
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
BLANK
BLANK
BLANK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
21 100 Monday, January 30, 2012
21 100 Monday, January 30, 2012
21 100 Monday, January 30, 2012
1
SC
SC
SC
5
D D
C C
4
B L A N K
B L A N K
B L A N K
B L A N K
3
2
1
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
BLANK
BLANK
BLANK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
22 100 Monday, January 30, 2012
22 100 Monday, January 30, 2012
22 100 Monday, January 30, 2012
1
SC
SC
SC
A
4 4
3 3
B
B L A N K
B L A N K
B L A N K
B L A N K
C
D
E
2 2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
1 1
Title
Title
Title
BLANK
BLANK
BLANK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
A
B
C
Date: Sheet of
D
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
23 100 Monday, January 30, 2012
23 100 Monday, January 30, 2012
23 100 Monday, January 30, 2012
E
SC
SC
SC
A
B
C
D
E
VCC3M
1KR2J-1-GP
1KR2J-1-GP
PCH_32.768K_RT CX1
1 2
X1
1 2
R131
R131
10MR2J-L-GP
10MR2J-L-GP
XTAL-32D768KHZ-15-GPX1XTAL-32D768KHZ-15-GP
PCH_32.768K_RT CX2
-RTC_RST
-SRTCRST
1 2
1 2
C204
C204
SC1U10V2KX-1G P
SC1U10V2KX-1G P
Place on Top side
R140
R140
1 2
0R2J-2-GP
0R2J-2-GP
1
TP5
TP5
TP4
TP4
TPAD14-GP
TPAD14-GP
R145 0R2J-2-GP R 145 0R2J-2-GP
1 2
R148 0R2J-2-GP R 148 0R2J-2-GP
1 2
R149 0R2J-2-GP R 149 0R2J-2-GP
1 2
R151 0R2J-2-GP R 151 0R2J-2-GP
1 2
R153 0R2J-2-GP R 153 0R2J-2-GP
1 2
1 2
RTCVCC VC C3SW
R216
R216
R127
R127
1 2
10KR2J-3-GP
10KR2J-3-GP
330KR2J-L1-GP
330KR2J-L1-GP
PCH_INVRMEN
C19
C19
DY
DY
1 2
SC33P50V3JN-G P
SC33P50V3JN-G P
DY
DY
HDA_SDO_R
1
-EC_WAK E 60
VCC3B
DY
DY
DY
DY
R130
R130
R128
R128
R129
R129
1 2
1 2
1 2
1MR2J-1-GP
1MR2J-1-GP
1MR2J-1-GP
1MR2J-1-GP
PCH_-INTRUDER
HDA_BCLK_R
HDA_SYNC_R
-HDA_RST _R
HDA_DOCK_EN_PCH
SPI_CLK_R
-SPI_CS0_R
-SPI_CS1_R
SPI_MOSI_R
SPI_MISO0_R
TABLE
SPKR TCO TIMER SYSTEM REBOOT
HIGH
DISABLED(NO REBOOT)
LOW
ENABLED
U14A
U14A
A19
RTCX1
C19
RTCX2
F19
RTCRST#
A23
SRTCRST#
K22
INTRUDER#
C21
INTVRMEN
H35
HDA_BCLK
H37
HDA_SYNC
N1
SPKR
F35
HDA_RST#
D36
HDA_SDIN0
B36
HDA_SDIN1
C35
HDA_SDIN2
A35
HDA_SDIN3
K37
HDA_SDO
K35
HDA_DOCK_EN#/GPIO33
M35
HDA_DOCK_RST#/GPIO13
M17
JTAG_TCK
M15
JTAG_TMS
U12
JTAG_TDI
M12
JTAG_TDO
AD12
SPI_CLK
AB8
SPI_CS0#
AB6
SPI_CS1#
W8
SPI_MOSI
Y2
SPI_MISO
QP8D-SFF- GP-NF
QP8D-SFF- GP-NF
RTC IHDA
RTC IHDA
JTAG
JTAG
SPI
SPI
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
FWH4/LFRAME#
LDRQ1#/GPIO23
LPC
LPC
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA3
SATA3
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
SATA0GP/GPIO21
SATA1GP/GPIO19
1 OF 10
1 OF 10
LDRQ0#
SERIRQ
A37
A39
C39
C37
K40
H40
F37
Y4
AN3
AN1
SATA0_TXN_C
AU3
SATA0_TXP_C
AU1
AN6
AN8
AR3
AR1
SATA2_RXN_C
AD4
SATA2_RXP_C
AD2
SATA2_TXN_C
AL3
SATA2_TXP_C
AL1
AD8
AD6
AG3
AG1
AE3
AE1
AH8
AH6
AC3
AC1
AJ3
AJ1
AB10
AB12
AF10
AF12
SATA3RBIAS_PCH
AH4
W10
-DISCRETE_PR ESENCE
M2
R1
LPC_AD0_PCH
LPC_AD1_PCH
LPC_AD2_PCH
LPC_AD3_PCH
SATA_ICOMP
SATA_3COMP
CN7
CN7
4
2
1
4 4
ETY-CON2-18- GP
ETY-CON2-18- GP
1 2
R116
R116
DY
DY
20MR2J-GP
20MR2J-GP
3 3
2 2
G
DY
DY
S D
Q9
Q9
2N7002KT1G-GP
2N7002KT1G-GP
-RTC_DET ECT 28
3
RTCVCC_RTCCONN
R132
R132
1 2
1KR2J-1-GP
1KR2J-1-GP
DO NOT CHANGE
THESE PARTS
HDA_BCLK 43
HDA_SYNC 43
PCH_SPKR 48
-HDA_RST 43
HDA_SDIN0 43
1
RB520SM-30T2R -GP
RB520SM-30T2R -GP
HDA_SDO 43
TP3 TPAD14- GP TP3 TPAD14-GP
RTCVCC
VCC3SW
D16
D16
K A
RB520SM-30T2R-GP
RB520SM-30T2R-GP
D17
D17
K A
Place on Bootom side
Do NOT move after fix
R134 20KR2J-L2-GP R134 20KR2J-L2-GP
R133 20KR2J-L2-GP R133 20KR2J-L2-GP
1 2
C205
C205
SC1U10V2KX-1G P
SC1U10V2KX-1G P
R141 33R2J-2-GP R141 33R2J-2-GP
1 2
C202 SC8P50V 2DN-1GP C202 SC8P50V 2DN-1GP
1 2
DST310S
9P
20PPM
C203 SC10P50V 2JN-4GP C203 SC10P50V2JN -4GP
1 2
1 2
1 2
R136 33R2J-2-GP R136 33R2J-2-GP
R137 20R2J-3-GP R137 20R2J-3-GP
R138 33R2J-2-GP R138 33R2J-2-GP
SC1U10V2KX-1G P
SC1U10V2KX-1G P
1 2
1 2
1 2
VCC3M
1KR2J-1-GP
1KR2J-1-GP
PCH_TCK 11
PCH_TMS 11
PCH_TDI 11
PCH_TDO 11
SPI_CLK 58
-SPI_CS0 58
-SPI_CS1 58
SPI_MOSI 58
SPI_MISO 58
C206
C206
R139
R139
1 2
TPAD14-GP
TPAD14-GP
TABLE
YES
AMT
YES
RPAT
U2
QM77
LOGIC
R639 0R2J-2-GP R 639 0R2J-2-GP
1 2
R820 0R2J-2-GP R 820 0R2J-2-GP
1 2
R821 0R2J-2-GP R 821 0R2J-2-GP
1 2
R822 0R2J-2-GP R 822 0R2J-2-GP
1 2
C207 SCD0 1U16V2KX-3GP C207 SCD0 1U16V2KX-3GP
1 2
C208 SCD0 1U16V2KX-3GP C208 SCD0 1U16V2KX-3GP
1 2
C212 SCD0 1U16V2KX-3GP C212 SCD0 1U16V2KX-3GP
1 2
C211 SCD0 1U16V2KX-3GP C211 SCD0 1U16V2KX-3GP
1 2
C213 SCD0 1U16V2KX-3GP C213 SCD0 1U16V2KX-3GP
1 2
C214 SCD0 1U16V2KX-3GP C214 SCD0 1U16V2KX-3GP
1 2
R142
R142
1 2
37D4R2F-GP
37D4R2F-GP
R144
R144
1 2
49D9R2F-GP
49D9R2F-GP
R146
R146
1 2
750R2F-GP
750R2F-GP
-LPC_FRAME 58,60,68
-LPC_DREQ 0 58
VCC1R05B
NO
YESNONO
HM77 HM75
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
R135 8K2R2J-3-GP R135 8K2R2J-3-GP
1 2
WWAN
mSATA Yes No
C212 ASM DY
C211 ASM DY
C213 ASM DY
C214 ASM DY
VCC3B
1 2
R147
R147
100KR2J-1-GP
100KR2J-1-GP
-DASPHDD 71
LPC_AD[3..0] 58,60,68
VCC3B
IRQSER 58,60,68
SATA0_RXN 40
SATA0_RXP 40
SATA0_TXN 40
SATA0_TXP 40
SATA2_RXN 53
SATA2_RXP 53
SATA2_TXN 53
SATA2_TXP 53
VCC3B
R150
R150
10KR2J-3-GP
10KR2J-3-GP
1 2
SATA_BAY_DTCT 29
LOGIC
1 1
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.
Taipei Hsie n 221, Taiwan, R.O .C.
Title
Title
Title
PCH(1/9):HDA/JTAG/SPI/SATA
PCH(1/9):HDA/JTAG/SPI/SATA
PCH(1/9):HDA/JTAG/SPI/SATA
Size D ocument Num ber Rev
Size D ocument Num ber Rev
Size D ocument Num ber Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O .C.
Genesis-1
Genesis-1
Genesis-1
E
SC
SC
24 100 Mond ay, January 30, 2012
24 100 Mond ay, January 30, 2012
24 100 Mond ay, January 30, 2012
SC
A
B
C
VCC3M
D
E
1 2
1 2
1 2
4 4
U14B
U14B
Logic
Logic
BJ33
PERN1
BL33
PERP1
BB30
PETN1
AY30
PETP1
BJ35
PERN2
BL35
PERP2
BB33
PETN2
AY33
PETP2
BH36
PERN3
BK36
PERP3
BF33
PETN3
BD33
PETP3
BJ37
PERN4
BL37
PERP4
BD35
PETN4
BF35
PETP4
BJ39
PERN5
BL39
PERP5
AY35
PETN5
BB35
PETP5
BH40
PERN6
BK40
PERP6
BD37
PETN6
BF37
PETP6
BJ41
PERN7
BL41
PERP7
AY37
PETN7
BB37
PETP7
BJ43
PERN8
BL43
PERP8
AY40
PETN8
BB40
PETP8
AD48
CLKOUT_PCIE0N
AD50
CLKOUT_PCIE0P
M4
PCIECLKRQ0#/GPIO73
AE49
CLKOUT_PCIE1N
AE51
CLKOUT_PCIE1P
U8
PCIECLKRQ1#/GPIO18
AD40
CLKOUT_PCIE2N
AD42
CLKOUT_PCIE2P
T4
PCIECLKRQ2#/GPIO20
AA49
CLKOUT_PCIE3N
AA51
CLKOUT_PCIE3P
B8
PCIECLKRQ3#/GPIO25
Y48
CLKOUT_PCIE4N
Y50
CLKOUT_PCIE4P
M19
PCIECLKRQ4#/GPIO26
AB40
CLKOUT_PCIE5N
AB42
CLKOUT_PCIE5P
K8
PCIECLKRQ5#/GPIO44
AF40
CLKOUT_PEG_B_N
AF42
CLKOUT_PEG_B_P
C4
PEG_B_CLKRQ#/GPIO56
AB44
CLKOUT_PCIE6N
AB46
CLKOUT_PCIE6P
J3
PCIECLKRQ6#/GPIO45
W44
CLKOUT_PCIE7N
W46
CLKOUT_PCIE7P
H4
PCIECLKRQ7#/GPIO46
AR12
CLKOUT_ITPXDP_N
AR10
CLKOUT_ITPXDP_P
QP8D-SFF-GP-NF
QP8D-SFF-GP-NF
B
PCI-E*
PCI-E*
SMBUS Controller
SMBUS Controller
SML1ALERT#/PCHHOT#/GPIO74
Link
Link
PEG_A_CLKRQ#/GPIO47
CLOCKS
CLOCKS
FLEX CLOCKS
FLEX CLOCKS
PCIE_MCC_RXN 54
PCIE_MCC_RXP 54
PCIE_MCC_TXN 54
PCIE_MCC_TXP 54
PCIE_WLAN_RXN 53
PCIE_WLAN_RXP 53
PCIE_WLAN_TXN 53
PCIE_WLAN_TXP 53
C221 SCD1U10V2KX-4GP C221 SCD1U10V2KX-4GP
1 2
C222 SCD1U10V2KX-4GP C222 SCD1U10V2KX-4GP
1 2
C215 SCD1U10V2KX-4GP C215 SCD1U10V2KX-4GP
1 2
C216 SCD1U10V2KX-4GP C216 SCD1U10V2KX-4GP
1 2
GPIO44 Size
0: Low 4Gb
1: High 8Gb
Logic
PCIE_MCC_TXN_C
PCIE_MCC_TXP_C
PCIE_WLAN_TXN_C
PCIE_WLAN_TXP_C
GPIO45 GPIO25 Supplier
0: Low 0: Low Elpida
0: Low 1: High Hynix
1: High 0: Low Samsung
1: High 1: High Reserved
3 3
GPIO56 GPIO26 Revision
0: Low 0: Low A:Initial
0: Low 1: High B
1: High 0: Low C
1: High 1: High D
-PCIE_CLK_MCC 54
PCIE_CLK_MCC 54
-CLKREQ_MCC 54
-PCIE_CLK_WLAN 53
PCIE_CLK_WLAN 53
-CLKREQ_WLAN 53
VCC3B
R180 10KR2J-3-GP R180 10KR2J-3-GP
2 2
1 1
-XDP_CLK_100M 11
XDP_CLK_100M 11
VCC3M
A
1 2
DY
DY
R172 10KR2J-3-GP
R172 10KR2J-3-GP
1 2
R206 10KR2J-3-GP R206 10KR2J-3-GP
1 2
DY
DY
R163 10KR2J-3-GP
R163 10KR2J-3-GP
1 2
R205 10KR2J-3-GP R205 10KR2J-3-GP
1 2
DY
DY
R198 10KR2J-3-GP
R198 10KR2J-3-GP
1 2
R201 10KR2J-3-GP R201 10KR2J-3-GP
1 2
DY
DY
R169 10KR2J-3-GP
R169 10KR2J-3-GP
1 2
R202 10KR2J-3-GP R202 10KR2J-3-GP
1 2
DY
DY
R1320 10KR2J-3-GP
R1320 10KR2J-3-GP
1 2
R203 10KR2J-3-GP R203 10KR2J-3-GP
1 2
DY
DY
R171 10KR2J-3-GP
R171 10KR2J-3-GP
1 2
R204 10KR2J-3-GP R204 10KR2J-3-GP
1 2
GPIO20_PCH
GPIO25_PCH
GPIO26_PCH
GPIO44_PCH
GPIO56_PCH
GPIO45_PCH
PCIECLKRQ7_PCH
2 OF 10
2 OF 10
SMBALERT#/GPIO11
SMBCLK
SMBDATA
SML0ALERT#/GPIO60
SML0CLK
SML0DATA
SML1CLK/GPIO58
SML1DATA/GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
-SMBALERT
H12
F17
F10
-SML0ALERT
H22
K12
A9
-SML1ALERT
C9
D12
C11
L3
J1
M8
-PCH_PEG_A_CLKRQ
R8
AF44
AF46
BB24
AY24
AN10
AN12
BD17
BF17
BB26
AY26
M24
K24
AK8
AK6
J49
E51
W49
W51
AC49
H50
D48
G49
J51
C
R154
R154
10KR2J-3-GP
10KR2J-3-GP
PCH_25M_IN
PCH_25M_OUT
R1310 90D9R2F-1-GP R1310 90D9R2F-1-GP
1 2
R1321 4K7R2F-GP
R1321 4K7R2F-GP
R1322 4K7R2F-GP
R1322 4K7R2F-GP
R1323 4K7R2F-GP
R1323 4K7R2F-GP
R1324 4K7R2F-GP
R1324 4K7R2F-GP
R155
R155
10KR2J-3-GP
10KR2J-3-GP
CLKIN_DMI_PCH
CLKIN_GND1_PCH
CLKIN_DOT_PCH
CLKIN_SATA_PCH
PEFCLK14IN
DY
DY
1 2
DY
DY
1 2
DY
DY
1 2
DY
DY
1 2
R156
R156
2K2R2J-2-GP
2K2R2J-2-GP
PCICLK_FB_33M 28
1 2
10KR2J-3-GP
10KR2J-3-GP
VCC3B
R158
R158
1 2
R159
R159
4K7R2J-2-GP
4K7R2J-2-GP
1 2
R157
R157
2K2R2J-2-GP
2K2R2J-2-GP
R164 10KR2J-3-GP R164 10KR2J-3-GP
1 2
R165 10KR2J-3-GP R165 10KR2J-3-GP
1 2
R166 10KR2J-3-GP R166 10KR2J-3-GP
1 2
R167 10KR2J-3-GP R167 10KR2J-3-GP
1 2
R168 10KR2J-3-GP R168 10KR2J-3-GP
1 2
VCC1R05B
1 2
10KR2J-3-GP
10KR2J-3-GP
1 2
DY
DY
R161
R161
R162
R162
10KR2J-3-GP
10KR2J-3-GP
SMB_CLK 56,70
SMB_DATA 56,70
EC_SCL2 62
EC_SDA2 62
CL_CLK_WLAN 53
CL_DATA_WLAN 53
-CL_RST_WLAN 53
-CPU_CLK_100M 4
CPU_CLK_100M 4
C227 SC10P50V2JN-4GP C227 SC10P50V2JN-4GP
1 2
4 1
PCH_25M_OUT_R
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
PCH(2/9):PCI-E/SMBUS/CLK
PCH(2/9):PCI-E/SMBUS/CLK
PCH(2/9):PCI-E/SMBUS/CLK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
H.ELE 25M
12P 20PPM
HSX321G
2 3
X2
X2
XTAL-25MHZ-155-GP
XTAL-25MHZ-155-GP
C228 SC10P50V2JN-4GP C228 SC10P50V2JN-4GP
1 2
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
E
SC
SC
25 100 Monday, January 30, 2012
25 100 Monday, January 30, 2012
25 100 Monday, January 30, 2012
SC
1 2
R160
R160
4K7R2J-2-GP
4K7R2J-2-GP
1 2
R170
R170
1MR2J-1-GP
1MR2J-1-GP
R173
R173
1 2
0R2J-2-GP
0R2J-2-GP
D
A
DMI_RXN[3..0] 3
DMI_RXP[3..0] 3
4 4
VCC1R05B
VCC3M
8K2R2J-3-GP
8K2R2J-3-GP
3 3
CPUCORE_PWRGD 80
BPWRG 11,32,56,61,62,70,72
PCHPWRG 32,71
BPWRG
DRAMPW RG 4,32,87
MPWRG 11,32,56,72
SUSPWRDNACK 32,71
-PWRSW_EC 61
AC_PRESENT 32,71
2 2
-BATLOW 60
R186
R186
1 2
0R2J-2-GP
0R2J-2-GP
R187 0R2J-2-GP R187 0R2J-2-GP
1 2
R1325
R1325
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
DMI_TXN[3..0] 3
DMI_TXP[3..0] 3
R174 49D9R2F-GP R174 49D9R2F-GP
1 2
R181
R181
R182
1 2
10KR2J-3-GP
10KR2J-3-GP
-PCH_RI
R182
MEPWRG 32,85
1 2
R183
R183
1 2
10KR2J-3-GP
10KR2J-3-GP
-XDP_DBR 4,11
R185
R185
R175
R175
1 2
750R2F-GP
750R2F-GP
1 2
B
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
PCH_DMI_COMP
DMI2RBIAS_PCH
SYS_PWROK_PCH
0R2J-2-GP
0R2J-2-GP
PWROK_PCH
U14C
U14C
BL21
DMI0RXN
BL23
DMI1RXN
BJ19
DMI2RXN
BL17
DMI3RXN
BJ21
DMI0RXP
BJ23
DMI1RXP
BL19
DMI2RXP
BJ17
DMI3RXP
BD22
DMI0TXN
BB22
DMI1TXN
BB19
DMI2TXN
BB17
DMI3TXN
BF22
DMI0TXP
AY22
DMI1TXP
AY19
DMI2TXP
AY17
DMI3TXP
BF19
DMI_ZCOMP
BD19
DMI_IRCOMP
BK20
DMI2RBIAS
F15
SUSACK#
L1
SYS_RESET#
M10
SYS_PWROK
M22
PWROK
G3
APWROK
B12
DRAMPWROK
B20
RSMRST#
C13
SUSWARN#/SUSPWRDNACK/GPIO30
K19
PWRBTN#
H19
ACPRESENT/GPIO31
H10
BATLOW#/GPIO72
F12
RI#
QP8D-SFF-GP-NF
QP8D-SFF-GP-NF
C
3 OF 10
3 OF 10
FDI_TXN0
BL13
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
DMI
DMI
System Power Management
System Power Management
FDI_RXP6
FDI
FDI
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN#/GPIO29
FDI_TXN1
BJ15
FDI_TXN2
BD12
FDI_TXN3
BJ11
FDI_TXN4
AY15
FDI_TXN5
AY12
FDI_TXN6
BJ9
FDI_TXN7
BF10
FDI_TXP0
BJ13
FDI_TXP1
BL15
FDI_TXP2
BF12
FDI_TXP3
BL11
FDI_TXP4
BB15
FDI_TXP5
BB12
FDI_TXP6
BL9
FDI_TXP7
BD10
BB10
BH12
BK8
BK12
BH8
DSWVRMEN_PCH
F22
DPWROK_PCH SUSACK_R
A21
D8
T2
G6
D3
F6
K10
D4
C7
A15
BB8
A7
FDI_TXN[7..0] 3
FDI_TXP[7..0] 3
FDI_INT 3
FDI_FSYNC0 3
FDI_FSYNC1 3
FDI_LSYNC0 3
FDI_LSYNC1 3
R184 0R2J-2-GP R184 0R2J-2-GP
1 2
D
RTCVCC
1 2
330KR2J-L1-GP
330KR2J-L1-GP
1 2
R176
R176
DY
DY
R190
R190
330KR2J-L1-GP
330KR2J-L1-GP
E
VCC3M VCC3B
1 2
1 2
DY
DY
R177
R177
R178
R178
1KR2J-1-GP
1KR2J-1-GP
10KR2J-3-GP
10KR2J-3-GP
Take care the routing to KBC and ThinkEngin
because of the branch
e.g.
-Divide the net near PCH pin for each IC
-Add terminated near reciever IC
-Add RC filter to reduce the high frequency band
1 2
R179
R179
8K2R2J-3-GP
8K2R2J-3-GP
MPWRG 11,32,56,72
-PCIE_WAKE 53,71
-CLKRUN 58,60,68
-SUS_STAT 58,60
SUSCLK_32K 60,71
-PCH_SLP_S5 32,61,71
-PCH_SLP_S4 32,71
-PCH_SLP_S3 32,56,61,71,79
-PCH_SLP_M 32,71
PM_SYNC 4
-PCH_SLP_LAN 32,71
1 1
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
PCH(3/9):DMI/FDI/PM
PCH(3/9):DMI/FDI/PM
PCH(3/9):DMI/FDI/PM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
26 100 Monday, January 30, 2012
26 100 Monday, January 30, 2012
26 100 Monday, January 30, 2012
E
SC
SC
SC
A
VGA_BLON 71
4 4
3 3
2 2
PANEL_POWER_ON 72
PANEL_BKLT_CTRL 34
SPWG_EDID_CLK 34
SPWG_EDID_DATA 34
100KR2J-1-GP
100KR2J-1-GP
TXCLK_LN 34
TXCLK_LP 34
TXOUT_L0N 34
TXOUT_L1N 34
TXOUT_L2N 34
TXOUT_L0P 34
TXOUT_L1P 34
TXOUT_L2P 34
TXCLK_UN 34
TXCLK_UP 34
TXOUT_U0N 34
TXOUT_U1N 34
TXOUT_U2N 34
TXOUT_U0P 34
TXOUT_U1P 34
TXOUT_U2P 34
1 2
R194
R194
1 2
R195
R195
100KR2J-1-GP
100KR2J-1-GP
VCC3B
1 2
R192
R192
2K2R2J-2-GP
2K2R2J-2-GP
R196
R196
1 2
2K37R2F-GP
2K37R2F-GP
B
1 2
R193
R193
2K2R2J-2-GP
2K2R2J-2-GP
LIBG
DAC_IREF_PCH
1 2
R208
R208
M44
M42
R42
M40
AH42
AH40
AG51
AG49
AK44
AK46
AR46
AN49
AN44
AK40
AR44
AN51
AN46
AK42
AH46
AH44
AM50
AL49
AJ51
AH50
AM48
AL51
AJ49
AH48
M46
R46
U46
R49
N49
M50
N51
R51
L49
L51
K46
T48
U14D
U14D
L_BKLTEN
L_VDD_EN
L_BKLTCTL
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
QP8D-SFF-GP-NF
QP8D-SFF-GP-NF
C
4 OF 10
4 OF 10
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AU40
AU42
AR51
AR49
AT50
AT48
W42
R44
AW51
AW49
DDPB_HPD_PCH
AY42
AY48
AY50
AY44
AY46
BB44
BB46
BA49
BA51
T50
U44
AU51
AU49
BE46
BC49
BC51
BD48
BD50
BF46
BF45
BE49
BE51
M48
U42
AU46
AU44
BK44
BG51
BG49
BF42
BD42
BJ47
BL47
BL45
BJ45
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
LVDS
LVDS
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
CRT
CRT
DDPD_HPD
R197 0R2J-2-GP R197 0R2J-2-GP
1 2
D
SYSTEM_DP_DDC_CTRLCLK 37
SYSTEM_DP_DDC_DATA 37
DPB_AUXN 37
DPB_AUXP 37
DPB_HPD 37
DPB_0N 37
DPB_0P 37
DPB_1N 37
DPB_1P 37
DPB_2N 37
DPB_2P 37
DPB_3N 37
DPB_3P 37
E
1K02R2F-1-GP
1K02R2F-1-GP
1 1
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
PCH(4/9):LVDS/CRT/DDI
PCH(4/9):LVDS/CRT/DDI
PCH(4/9):LVDS/CRT/DDI
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
27 100 Monday, January 30, 2012
27 100 Monday, January 30, 2012
27 100 Monday, January 30, 2012
E
SC
SC
SC
A
VCC3B
4 4
DY
DY
R210
R209
R209
1 2
8K2R2J-3-GP
8K2R2J-3-GP
USB3P1_RXN 37
USB3P1_RXP 37
3 3
USB3P1_TXN 37
USB3P1_TXP 37
-LCD_PRESENCE 34
2 2
-RTC_DETECT 24
R210
1 2
8K2R2J-3-GP
8K2R2J-3-GP
R218
R218
1 2
8K2R2J-3-GP
8K2R2J-3-GP
DY
R211
R211
1 2
8K2R2J-3-GP
8K2R2J-3-GP
R219
R219
1 2
8K2R2J-3-GP
8K2R2J-3-GP
DY
R212
R212
1 2
8K2R2J-3-GP
8K2R2J-3-GP
R220
R220
1 2
DY
DY
8K2R2J-3-GP
8K2R2J-3-GP
R213
R213
1 2
8K2R2J-3-GP
8K2R2J-3-GP
R221
R221
1 2
8K2R2J-3-GP
8K2R2J-3-GP
R222
R222
1 2
8K2R2J-3-GP
8K2R2J-3-GP
INTEGRATED PULL UP
Minimize this stub!
LPCCLK_CRYPT_33M 68
LPCCLK_DEBUG_33M 58
LPCCLK_EC_33M 60
PCICLK_FB_33M 25
-PLTRST_NEAR 32,53,54,68,70,71
-PLTRST_FAR 4,11,58,60
1 1
1 2
C229
C229
SC100P50V2JN-3GP
SC100P50V2JN-3GP
A
R1326 22R2J-2-GP R1326 22R2J-2-GP
1 2
R234 22R2J-2-GP R234 22R2J-2-GP
1 2
R235 22R2J-2-GP R235 22R2J-2-GP
1 2
R236 22R2J-2-GP
R236 22R2J-2-GP
1 2
R237 22R2J-2-GP R237 22R2J-2-GP
1 2
R238
R238
1 2
33R2J-2-GP
33R2J-2-GP
R239
R239
1 2
33R2J-2-GP
33R2J-2-GP
1 2
C230
C230
SC100P50V2JN-3GP
SC100P50V2JN-3GP
DY
DY
VCC3M
5
4
B
R214
R214
1 2
8K2R2J-3-GP
8K2R2J-3-GP
8K2R2J-3-GP
REQ1_PCH
REQ2_PCH
GNT1_PCH
GNT2_PCH
GNT3_PCH
PIRQF_PCH
LPCCLK_CRYPT_33M_R LPCCLK_CRYPT_33M_R LPCCLK_CRYPT_33M_R LPCCLK_CRYPT_33M_R
LPCCLK_DEBUG_33M_R
LPCCLK_EC_33M_R
PCICLK_FB_33M_R
VCC
OUT_Y
TC7SG17FE-GP
TC7SG17FE-GP
8K2R2J-3-GP
R223
R223
1 2
8K2R2J-3-GP
8K2R2J-3-GP
PIRQC_PCH
PIRQD_PCH
U15
U15
NC#1
IN_A
GND
B
R215
R215
1 2
PIRQB_PCH
1
2
3
C
5 OF 10
U14E
U14E
BH24
TP1
BK24
TP2
BH20
TP3
BK16
TP4
BH16
TP5
AN42
TP6
AN40
TP7
AR40
TP8
AR42
TP9
D20
TP10
M30
TP11
E3
TP12
AM4
TP13
AT4
TP14
AT2
TP15
AD10
TP16
B24
TP17
D24
TP18
AD44
TP19
AD46
-PLTRST_PCH
BJ48
W40
BH49
BB42
BJ25
BJ27
BJ31
BJ29
BL25
BL27
BL31
BL29
BF26
BB28
BF28
BF30
BD26
AY28
BD28
BD30
G46
G51
G45
BL7
K30
D49
C48
C47
C45
K44
F46
F42
H42
D44
A47
C41
F45
F40
E49
H48
H2
F7
J43
TP20
TP21
TP22
TP23
TP24
TP41
TP42
USB3RN1
USB3RN2
USB3RN3
USB3RN4
USB3RP1
USB3RP2
USB3RP3
USB3RP4
USB3TN1
USB3TN2
USB3TN3
USB3TN4
USB3TP1
USB3TP2
USB3TP3
USB3TP4
PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
QP8D-SFF-GP-NF
QP8D-SFF-GP-NF
R224
R224
1 2
8K2R2J-3-GP
8K2R2J-3-GP
PIRQA_PCH
RSVD
RSVD
USB3.0
USB3.0
PCI
PCI
RSVD
RSVD
USB2.0
USB2.0
5 OF 10
RSVD#BE3
RSVD#BE1
RSVD#AU8
RSVD#BJ7
RSVD#BA3
RSVD#BH3
RSVD#AU6
RSVD#AW3
RSVD#AW1
RSVD#AY6
RSVD#AY2
RSVD#AY4
RSVD#BC3
RSVD#BC1
RSVD#BG1
RSVD#BG3
RSVD#BE6
RSVD#BH4
RSVD#BF7
RSVD#BJ4
RSVD#BJ5
RSVD#BK6
RSVD#AY8
RSVD#BL5
RSVD#BB6
RSVD#BD2
RSVD#BD4
RSVD#BA1
RSVD#BF6
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14
C
BE3
BE1
AU8
BJ7
BA3
BH3
AU6
AW3
AW1
AY6
AY2
AY4
BC3
BC1
BG1
BG3
BE6
BH4
BF7
BJ4
BJ5
BK6
AY8
BL5
BB6
BD2
BD4
BA1
BF6
F24
H24
C25
A25
C27
A27
H28
F28
M26
K26
D28
B28
H26
F26
D32
B32
M28
K28
C29
A29
C31
A31
H33
F33
H30
F30
M33
K33
C33
A33
C17
A17
A13
D16
A11
B16
C23
H15
USBP1- 37
USBP1+ 37
USBP3- 53
USBP3+ 53
USBP9- 42
USBP9+ 42
USBP10- 56
USBP10+ 56 -BDC_PRESENCE 42
USBP11- 42
USBP11+ 42
USBP12- 53
USBP12+ 53
USBP13- 34
USBP13+ 34
PCH_USBRBIAS PIRQG_PCH
R233 22D6R2F-L1-GP R233 22D6R2F-L1-GP
1 2
D
E
GS-note
USB0 Reserved
USB1
USB2
USB3
USB4
USB5
USB6
USB7
USB8
USB9
USB10
USB11
USB12
USB13
VCC3M
1 2
1 2
1 2
1 2
R227
R227
R225
R225
R226
R226
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
D
1 2
1 2
R228
R228
R229
R229
R230
R230
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
PCH(5/8) :PCI/USB/NVM
PCH(5/8) :PCI/USB/NVM
PCH(5/8) :PCI/USB/NVM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
System Port 1 (USB3.0)
Reserved
WWAN
Reserved
Reserved
Reserved
Reserved
Reserved
System Port 9
FPR/TOUCH PAD
Bluetooth
WLAN
Camera
1 2
1 2
R232
R232
R231
R231
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
Genesis-1
Genesis-1
Genesis-1
(iPod)
-USB_PORT1_OC1 37
SMB_3B_EN 70
-USB_PORT9_OC5 42
DRAMRST_GATE 4,12
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
28 100 Monday, January 30, 2012
28 100 Monday, January 30, 2012
28 100 Monday, January 30, 2012
E
SC
SC
SC
A
B
C
D
E
VCC3B VCC3M
1 2
1 2
GPIO8
4 4
HIGH
LOW
GPIO15
HIGH
LOW
3 3
2 2
1 1
INTEGRATED CLOCKING
DISABLE(BTM)
ENABLE(FCIM)
ME CRYPTO STRAP
WITH CONFIDENTIALITY
NO CONFIDENTIALITY
VCC3B
1 2
DY
DY
10KR2J-3-GP
10KR2J-3-GP
1 2
R263
R263
R267
R267
10KR2J-3-GP
10KR2J-3-GP
1 2
DY
DY
10KR2J-3-GP
10KR2J-3-GP
1 2
R264
R264
R268
R268
10KR2J-3-GP
10KR2J-3-GP
VCC3M
1 2
10KR2J-3-GP
10KR2J-3-GP
R610
R610
10KR2J-3-GP
10KR2J-3-GP
1 2
R265
R265
1 2
DY
DY
R269
R269
10KR2J-3-GP
10KR2J-3-GP
1 2
DY
DY
R241
R241
1KR2J-1-GP
1KR2J-1-GP
1 2
R266
R266
DY
DY
10KR2J-3-GP
10KR2J-3-GP
PLANARID2
PLANARID3
1 2
R270
R270
10KR2J-3-GP
10KR2J-3-GP
SATA_BAY_DTCT 24
10KR2J-3-GP
10KR2J-3-GP
PLANARID0
PLANARID1
R250
1 2
1 2
R244
R244
10KR2J-3-GP
10KR2J-3-GP
-EC_SCI 60
1 2
R260
R260
1 2
R243
R243
10KR2J-3-GP
10KR2J-3-GP
1 2
R298
R298
10KR2J-3-GP
10KR2J-3-GP
R246
R246
R245
R245
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
1 2
R297
R297
10KR2J-3-GP
10KR2J-3-GP
1 2
1 2
10KR2J-3-GP
10KR2J-3-GP
1KR2J-1-GP
1KR2J-1-GP
R247
R247
TACH3
1 2
R261
R261
1 2
R1327
R1327
10KR2J-3-GP
10KR2J-3-GP
TACH2
SATA4GP_PCH
1 2
R249
R249
10KR2J-3-GP
10KR2J-3-GP
BMBUSY#
GPIO8_PCH
TACH0_PCH
GPIO28_PCH
Comet_ID
GPIO35_PCH
GPIO36_PCH
GPIO37_PCH
GPIO57_PCH
R250
DY
DY
10KR2J-3-GP
10KR2J-3-GP
PLANAR ID: 0000 for Initial Assessment
0001 for FVT
0010 for SIT
A
B
R251
R251
DY
DY
10KR2J-3-GP
10KR2J-3-GP
GPIO24_PCH
TP10 TPAD14-GP TP10 TPAD14-GP
TP12 TPAD14-GP TP12 TPAD14-GP
TP14 TPAD14-GP TP14 TPAD14-GP
TP16 TPAD14-GP TP16 TPAD14-GP
TP18 TPAD14-GP TP18 TPAD14-GP
TP20 TPAD14-GP TP20 TPAD14-GP
TP22 TPAD14-GP TP22 TPAD14-GP
TP24 TPAD14-GP TP24 TPAD14-GP
TP30 TPAD14-GP TP30 TPAD14-GP
TP32 TPAD14-GP TP32 TPAD14-GP
TP34 TPAD14-GP TP34 TPAD14-GP
TP36 TPAD14-GP TP36 TPAD14-GP
1 2
R240
R240
1KR2J-1-GP
1KR2J-1-GP
C43
H17
GPIO15_PCH
AA3
C15
W12
U10
AA1
1
1
1
1
1
1
BH1
1
BH51
1
1
BJ51
1
1
1
C
U14F
U14F
W1
BMBUSY#/GPIO0
B40
TACH1/GPIO1
TACH2/GPIO6
A45
TACH3/GPIO7
GPIO8
C5
LAN_PHY_PWR_CTRL/GPIO12
K6
GPIO15
SATA4GP/GPIO16
B44
TACH0/GPIO17
W3
SCLOCK/GPIO22
K15
GPIO24/MEM_LED
GPIO27
G1
GPIO28
R3
STP_PCI#/GPIO34
GPIO35
W6
SATA2GP/GPIO36
M6
SATA3GP/GPIO37
N3
SLOAD/GPIO38
SDATAOUT0/GPIO39
U1
SDATAOUT1/GPIO48
SATA5GP/GPIO49
K17
GPIO57
A4
VSS_NCTF#A4
A48
VSS_NCTF#A48
A49
VSS_NCTF#A49
A5
VSS_NCTF#A5
A51
VSS_NCTF#A51
VSS_NCTF#BH1
VSS_NCTF#BH51
BJ1
VSS_NCTF#BJ1
VSS_NCTF#BJ51
BL1
VSS_NCTF#BL1
BL3
VSS_NCTF#BL3
BL4
VSS_NCTF#BL4
QP8D-SFF-GP-NF
QP8D-SFF-GP-NF
6 OF 10
6 OF 10
A20GATE
PECI
RCIN#
INIT3_3V#
DF_TVS
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC#U40
K42
A43
D40
A41
U3
AU12
U6
AU10
THRMTRIP_PCH
BC9
R6
-PROC_IVY_DF_TVS
BC7
AK10
AH12
AK12
AH10
U40
1
BL48
1
BL49
BL51
1
1
C3
1
C51
1
D1
1
D51
1
E1
BJ3
1
1
BJ49
1
C49
D
TACH4/GPIO68
TACH5/GPIO69
TACH6/GPIO70
TACH7/GPIO71
PROCPWRGD
GPIO
GPIO
BJ1,BJ51,BL1,BL3,BL4,BL48,
BJ1,BJ51,BL1,BL3,BL4,BL48,
NCTF TEST PIN:
A4,A48,A49,A5,A51,BH1,BH51,
NCTF TEST PIN:
A4,A48,A49,A5,A51,BH1,BH51,
THRMTRIP#
CPU/MISC
CPU/MISC
VSS_NCTF#BL48
VSS_NCTF#BL49
VSS_NCTF#BL51
VSS_NCTF#C3
VSS_NCTF#C51
VSS_NCTF#D1
VSS_NCTF#D51
VSS_NCTF#E1
NCTF
NCTF
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_19
BL49,BL51,C3,C51,D1,D51,E1
BL49,BL51,C3,C51,D1,D51,E1
1 2
1 2
R252
R252
R253
R253
DY
10KR2J-3-GP
10KR2J-3-GP
-MIC_HW_EN
R304 0R2J-2-GP R304 0R2J-2-GP
R319 0R2J-2-GP R319 0R2J-2-GP
R322 0R2J-2-GP R322 0R2J-2-GP
R326 0R2J-2-GP R326 0R2J-2-GP
TP6 TPAD14-GP TP6 TPAD14-GP
TP7 TPAD14-GP TP7 TPAD14-GP
TP8 TPAD14-GP TP8 TPAD14-GP
TP9 TPAD14-GP TP9 TPAD14-GP
TP13 TPAD14-GP TP13 TPAD14-GP
TP15 TPAD14-GP TP15 TPAD14-GP
TP17 TPAD14-GP TP17 TPAD14-GP
TP19 TPAD14-GP TP19 TPAD14-GP
TP33 TPAD14-GP TP33 TPAD14-GP
TP35 TPAD14-GP TP35 TPAD14-GP
TP11 TPAD14-GP TP11 TPAD14-GP
DY
10KR2J-3-GP
10KR2J-3-GP
R258
R258
390R2J-1-GP
390R2J-1-GP
1 2
1 2
1 2
1 2
1 2
1 2
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
PCH(6/9):GPIO/NCTF/RSVD
PCH(6/9):GPIO/NCTF/RSVD
PCH(6/9):GPIO/NCTF/RSVD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
R1329
R1329
1 2
R254
R254
10KR2J-3-GP
10KR2J-3-GP
VCC3B
1 2
R255
R255
10KR2J-3-GP
10KR2J-3-GP
R256 10KR2J-3-GP R256 10KR2J-3-GP
1 2
KBGA20 60
-KBRC 60
CPUPWRGD 4,11
-THERMTRIP 4
1KR2J-1-GP
1KR2J-1-GP
Genesis-1
Genesis-1
Genesis-1
-INT_MIC_DTCT 34
-WWAN_DTCT 53
VCC1R8B
1 2
R1328
R1328
2K2R2J-2-GP
2K2R2J-2-GP
-PROC_IVY 4 -MSATA_DTCT 53
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
29 100 Monday, January 30, 2012
29 100 Monday, January 30, 2012
29 100 Monday, January 30, 2012
E
SC
SC
SC
A
VCC1R05B
R271 D01RL0816F-L-GP R271 D01RL0816F-L-GP
1 2
VCC1R8B VCC1R8B_PCH
R272 D01RL0816F-L-GP R272 D01RL0816F-L-GP
1 2
4 4
VCC1R05B_VTT
R273 D01RL0816F-L-GP R273 D01RL0816F-L-GP
1 2
VCC3B VCC3B_PCH
R274 D01RL0816F-L-GP R274 D01RL0816F-L-GP
1 2
VCC1R5B VCC1R5B_PCH
R327 D01RL0816F-L-GP R327 D01RL0816F-L-GP
1 2
3 3
2 2
VCC1R05B_PCHIO
VCC1R05B_VTT_PCH
VCC1R05B_PCHIO
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
VCC1R05B_VTT_PCH
1 2
C242
C242
VCC1R05B
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C243
C243
R275 D01RL0816F-L-GP R275 D01RL0816F-L-GP
C244
C244
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
B
VCC1R05B
1 2
R344
R344
D01RL0816F-L-GP
D01RL0816F-L-GP
VCC1R05B_PCHCORE
1 2
1 2
C231
C231
SC1U10V2KX-1GP
1 2
C246
C246
VCC3B_PCH
SC1U10V2KX-1GP
1 2
C250
C250
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCCIO_PCH
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
C245
C245
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C232
C232
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCC1R05B_PCHIO
C443
C443
PN16 PWRNC PN16 PWRNC
VCC1R5B_PCH
PN14 PWRNC PN14 PWRNC
PN15 PWRNC PN15 PWRNC
AB21
AB23
AC21
AC23
AE21
AE23
AF21
AF23
AG21
AG23
AG25
AG27
AJ21
AJ23
AJ25
AJ27
AJ29
AJ31
AK29
AK31
AK33
AM33
AM35
AM21
AP19
AR15
AT13
AR23
AR25
AR27
AR29
AU23
AU25
AU27
AU29
AU35
AW34
BK28
AU19
AW18
AP13
AP15
AK21
AU15
AW16
C
U14G
U14G
VCCCORE1
VCCCORE2
VCCCORE3
VCCCORE4
VCCCORE5
VCCCORE6
VCCCORE7
VCCCORE8
VCCCORE9
VCCCORE10
VCCCORE11
VCCCORE12
VCCCORE13
VCCCORE14
VCCCORE15
VCCCORE16
VCCCORE17
VCCCORE18
VCCCORE19
VCCCORE20
VCCCORE21
VCCCORE22
VCCCORE23
VCCIO28
VCCAPLLEXP
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCC3_3_3
VCCVRM5
VCCVRM6
VCCAFDPLL1
VCCAFDPLL2
VCCIO27
VCCDMI2
VCCDMI3
QP8D-SFF-GP-NF
QP8D-SFF-GP-NF
POWER
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRT LVDS
CRT LVDS
VCCTX_LVDS1
VCCTX_LVDS2
VCCTX_LVDS3
VCCTX_LVDS4
DMI
DMI
VCCDFTERM1
VCCDFTERM2
VCCDFTERM3
VCCDFTERM4
NAND / SPI HVCMOS
NAND / SPI HVCMOS
7 OF 10
7 OF 10
VCCADAC
VSSADAC
VCCALVDS1
VCCALVDS2
VSSALVDS1
VSSALVDS2
VCC3_3_6
VCC3_3_7
VCCVRM3
VCCVRM4
VCCDMI1
VCCCLKDMI
VCCSPI
U51
V50
AF33
AG33
AC33
AE33
AF37
AG37
AG39
AJ37
T39
U37
AU21
AW21
AM23
AP39
AJ13
AJ15
AK15
AL13
Y19
VCC3B_PCH
VCCTX_LVDS_PCH
VCC1R5B_PCH
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCC3LAN_VCCSPI
D
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
VCC1R05B_VCCCLKDMI
1 2
C247
C247
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C233
C233
1 2
C237
C237
1 2
C241
C241
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C248
C248
1 2
C249
C249
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C251
C251
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C238
C238
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
VCC1R05B_VTT_PCH
R345
R345
1 2
D01RL0816F-L-GP
D01RL0816F-L-GP
R409
R409
1 2
D01RL0816F-L-GP
D01RL0816F-L-GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
E
VCC3B_PCH
VCC1R8B_PCH
L7
L7
1 2
IND-D1UH-19-GP
1 2
C239
C239
VCC3B_PCH
VCC1R8B_PCH
IND-D1UH-19-GP
42A0149AA
VCC1R05B
VCC3LAN
1 1
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
PCH(7/9):Power
PCH(7/9):Power
PCH(7/9):Power
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Genesis-1
Genesis-1
Genesis-1
30 100 Monday, January 30, 2012
30 100 Monday, January 30, 2012
30 100 Monday, January 30, 2012
E
SC
SC
SC