Lenovo ThinkPad T480S Schematics

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4

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KL1KR-1

Kolar-1 SVT Logic Schematics

VER 4.02

1.TITLE PAGE

2.EC HISTORY

D D

3.CPU(1/16) : DDI/EDP

4.CPU(2/16) : DDR CHANNEL-A

5.CPU(3/16) : DDR CHANNEL-B

6.CPU(4/16) : MISC/JTAG

7.CPU(5/16) : LPC/SPI/SMBUS/C-LINK

8.CPU(6/16) : LPSS/ISH

9.CPU(7/16) : AUDIO/SDXC

10.CPU(8/16) : PCIE/USB/SATA

11.CPU(9/16) : CSI-2/EMMC

12.CPU(10/16) : CLOCK SIGNALS

13.CPU(11/16) : SYSTEM PM

C C

14.CPU(12/16) : CPU POWER (1/2)

15.CPU(13/16) : CPU POWER (2/2)

16.CPU(14/16) : PCH POWER

17.CPU(15/16) : GND

18.CPU(16/16) : CFG/RESERVED

19.XDP CONNECTOR

20.RTC BATTERY

21.SPI FLASH

22.DDR4 BASE MEMORY CH-A (1/2)

23.DDR4 BASE MEMORY CH-A (2/2)

B B

24.DDR4 SO DIMM CHANNEL-B (1/2)

37.HDMI CONNECTOR

38.M.2 SOCKET 3 MODULE I/F

39.USB POWER/CONN

40.BLANK

41.GBE JACKSONVILLE

42.GBE LAN SWITCH

43.GBE MAGNETICS

44.RJ45 CONNECTOR

45.M.2 SOCKET 1 MODULE I/F

46.M.2 SOCKET 2 MODULE I/F

47.MEDIA CARD/AUDIO CONNECTOR

48.N17S-LG(1/6) PEG I/F

49.N17S-LG(2/6) VRAM I/F

50.N17S-LG(3/6) POWER

51.N17S-LG(4/6) POWER 2

52.N17S-LG(5/6) GND

53.N17S-LG(6/6) GPIO / XTAL

54.VRAM CHANNEL-A

55.MEC1663 (1/3)

56.MEC1663 (2/3)

57.MEC1663 (3/3)

58.KEYBOARD/TRACK POINT

59.TOUCH PAD/NFC

25.DDR4 SO DIMM CHANNEL-B (2/2)

26.LCD I/F

27.LID/MIC/CAMERA/PWR SW

28.DDI DEMUX/HDMI LEVEL SHIFTER

29.USB TYPE-C SWITCH

30.BLANK

31.ALPINE RIDGE(1/2)

32.ALPINE RIDGE(2/2)

33.POWER DELIVERY (SN1701012RSLR)

A A

34.TYPE-C LOW LOGIC MUX

35.CS18 SIDE DOCKING CONNECTOR

36.USB TYPE-C CONNECTOR

5

61.FAN CONNECTOR

62.APS G-SENSOR

63.DISCRETE TPM 2.0

64.SMBUS SWITCH/LPC DEBUG PORT

65.THINK ENGINE-3 (1/2)

66.THINK ENGINE-3 (2/2)

67.AUDIO ALC3287-CG

68.AUDIO JACK & EXT MIC I/F

69.AUDIO SPEAKER I/F

70.DC-IN

71.BLANK

4

3

Nov/1/2017

72.BATTERY INPUT

73.BATTERY CHARGER (BQ25700)

74.DC/DC VCC5M/VCC3M (TPS51285B-1)

75.DC/DC IMVP8 CONTROLLER (NCP81218)

76.DC/DC VCCCPUCORE (NCP302045)

77.DC/DC VCCGFXCORE_I (NCP302045)

78.DC/DC VCCSA (NCP302035)

79.U22 UNIQUE

80.BLANK

81.DC/DC VCC1R0_SUS (NB693GQ)

82.LOAD SW VCCST & VCCSTG

83.DC/DC VCC1R2A /0R6B/2R5A (NB687)

84.BLANK

85.BLANK

86.DC/DC VCC1R8_SUS (BU90104GWZ)

87.BLANK

88.DC/DC NVDD (NCP81278)

89.DC/DC VCC1R35VIDEO (NB693GQ-Z)

90.VCC1R0VIDEO (BD9B304QWZ)

91.VCC1R8VIDEO_AON (BD9B304QWZ)

92.SW VCC1R8VIDEO_MAIN60.SCR/FPR/LED

93.LOAD SW SUS

94.LOAD SW LAN

95.LOAD SW B

96.LOAD SW WLAN

97.PTH FOR SCREW HOLES

BASE LOGIC : kolar_sit-r_lcfc_20171026

LC Future Center Secret Data

2

Project Name

Date: Sheet of

Kolar-1

Rev Title

TITLE PAGE

4.02

Wednesday, November 01, 2017

1

1 97

5

4

3

2

1

EC HISTORY

CS18 KL1KR-1 (kolar_sit-r_lcfc_20171026)

VER.4.01 APPLIED HW_ECR001-002 / PWR_ECR00110/30/2017 VER.4.02 11/1/2017 APPLIED HW_ECR003-004 / SIT-R HW_ECR011

D D

C C

B B

TABLE: Chip Capacitor Thermal Characteristics

Code

-55 to 150degC

-55 to 125degC

-55 to 105degC

-55 to 85degC

A A

+/-30ppm/degC +/-30ppm/degC

+/-15% +/-22% +/-15%

NPO C0G

X7R X6S X5R

TABLE: Chip Capacitor Tolerance

Tolerance Code

+/-0.25pF +/-0.5pF

+/-5% +/-10% +/-20% +80/-20%

C D

J K M Z

TABLE: Chip Part Dimension

Size [mm]

0.40 x 0.20

0.60 x 0.30

1.00 x 0.50

1.60 x 0.80

2.00 x 1.25

2.00 x 1.60

2.50 x 2.00

3.20 x 1.60

3.20 x 2.50

4.50 x 1.60

4.50 x 2.50

4.50 x 3.20

5.00 x 2.50

6.40 x 3.20

mm Size Code Inch Size Code

0402 0603 1005 1608 2125 2016 2520 3216 3225 4516 4525 4532 5025 6432

01005 0201 0402 0603 0805 0806 1008 1206 1210 1806 1810 1812 2010 2512

LOGIC

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Date: Sheet of

Kolar-1

Rev Title

EC HISTORY

4.02

Wednesday, November 01, 2017

1

2 97

5

D D

4

VCCCPUIOVCC3_SUS

3

2

1

12

R1

2.2K_0201_5%

DDIP1_0N31 DDIP1_0P31 DDIP1_1N31 DDIP1_1P31 DDIP1_2N31 DDIP1_2P31 DDIP1_3N31 DDIP1_3P31

C C

DDIP2_0N28 DDIP2_0P28 DDIP2_1N28 DDIP2_1P28 DDIP2_2N28 DDIP2_2P28 DDIP2_3N28 DDIP2_3P28

DDIP1_0N DDIP1_0P DDIP1_1N DDIP1_1P DDIP1_2N DDIP1_2P DDIP1_3N DDIP1_3P

DDIP2_0N DDIP2_0P DDIP2_1N DDIP2_1P DDIP2_2N DDIP2_2P DDIP2_3N DDIP2_3P

TABLE : Functional Strap

DDIP2_CTRLCLK28

DDPB_CTRLDATA

HIGH

Port B is detected.

Port B is not detected.

LOW

DDIP2_CTRLDATA28

-GPU_RST48

1R8VIDEO_AON_ON53,91

DDPC_CTRLDATA

HIGH

Port C is detected.

LOW

Port C is not detected.

B B

DDIP2_CTRLCLK

DDIP2_CTRLDATA

-GPU_RST

12

SWG@

R10370

1M_0201_5%

12

SWG@

R10361

1M_0201_5%

12

R2

24.9_0201_1%

EDP_COMP

U58A

E55

DDI1_TXN[0]

F55

DDI1_TXP[0]

E58

DDI1_TXN[1]

F58

DDI1_TXP[1]

F53

DDI1_TXN[2]

G53

DDI1_TXP[2]

F56

DDI1_TXN[3]

G56

DDI1_TXP[3]

C50

DDI2_TXN[0]

D50

DDI2_TXP[0]

C52

DDI2_TXN[1]

D52

DDI2_TXP[1]

A50

DDI2_TXN[2]

B50

DDI2_TXP[2]

D51

DDI2_TXN[3]

C51

DDI2_TXP[3]

L13

GPP_E18/DDPB_CTRLCLK

L12

GPP_E19/DDPB_CTRLDATA

N7

GPP_E20/DDPC_CTRLCLK

N8

GPP_E21/DDPC_CTRLDATA

N11

GPP_E22/DDPD_CTRLCLK

N12

GPP_E23/DDPD_CTRLDATA

E52

EDP_RCOMP

Kaby lake-U_BGA1356

SKL_ULT

DDI

DISPLAY SIDEBANDS

1 OF 20

EDP

EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]

EDP_AUXN EDP_AUXP

EDP_DISP_UTIL

DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP DDI3_AUXN DDI3_AUXP

GPP_E13/DDPB_HPD0 GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3

GPP_E17/EDP_HPD

EDP_BKLTEN

EDP_BKLTCTL

EDP_VDDEN

R7

1 2

100K_0201_5%

EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1 EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3

EDP_AUXN EDP_AUXP

DDIP1_AUXN DDIP1_AUXP DDIP2_AUXN DDIP2_AUXP

DDIP1_HPD DDIP2_HPD

100K_0201_5%

EDP_TXN0 26 EDP_TXP0 26 EDP_TXN1 26 EDP_TXP1 26 EDP_TXN2 26 EDP_TXP2 26 EDP_TXN3 26 EDP_TXP3 26

EDP_AUXN 26 EDP_AUXP 26

DDIP1_AUXN 31 DDIP1_AUXP 31 DDIP2_AUXN 28 DDIP2_AUXP 28

DDIP1_HPD 31 DDIP2_HPD 28

EDP_HPD 26

VGA_BLON 55 PANEL_BKLT_CTRL 26 PANEL_POWER_ON 66

DDIP1_HPD

DDIP2_HPD

1

TP55 Test_Point_20MIL

1

TP56 Test_Point_20MIL

C47 C46 D46 C45 A45 B45 A47 B47

E45 F45

B52

G50 F50 E48 F48 G46 F46

L9 L7 L6 N9 L10

R12 R11 U13

R3

1 2

100K_0201_5%

R4

1 2

100K_0201_5%

R5

1 2

R6

1 2

100K_0201_5%

A A

Project Name

LC Future Center Secret Data

5

4

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2

Project Name

Kolar-1

Rev Title

CPU(1/16) : DDI/EDP

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

3 97

5

M_A_DQ[63:0]22

D D

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1

TABLE

AL71 AL68 AN68 AN69 AL70 AL69 AN70 AN71 AR70

Block 0

AR68 AU71 AU68 AR71 AR69 AU70 AU69

C C

B B

A A

Block 2

Block 4

Block 6

BB65 AW65 AW63 AY63 BA65 AY65 BA63 BB63 BA61 AW61 BB59 AW59 BB61 AY61 BA59 AY59

AY39 AW39 AY37 AW37 BB39 BA39 BA37 BB37 AY35 AW35 AY33 AW33 BB35 BA35 BA33 BB33

AY31 AW31 AY29 AW29 BB31 BA31 BA29 BB29 AY27 AW27 AY25 AW25 BB27 BA27 BA25 BB25

Interleave

DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15]

DDR0_DQ[16] DDR0_DQ[17] DDR0_DQ[18] DDR0_DQ[19] DDR0_DQ[20] DDR0_DQ[21] DDR0_DQ[22] DDR0_DQ[23] DDR0_DQ[24] DDR0_DQ[25] DDR0_DQ[26] DDR0_DQ[27] DDR0_DQ[28] DDR0_DQ[29] DDR0_DQ[30] DDR0_DQ[31]

DDR0_DQ[32] DDR0_DQ[33] DDR0_DQ[34] DDR0_DQ[35] DDR0_DQ[36] DDR0_DQ[37] DDR0_DQ[38] DDR0_DQ[39] DDR0_DQ[40] DDR0_DQ[41] DDR0_DQ[42] DDR0_DQ[43] DDR0_DQ[44] DDR0_DQ[45] DDR0_DQ[46] DDR0_DQ[47]

DDR0_DQ[48] DDR0_DQ[49] DDR0_DQ[50] DDR0_DQ[51] DDR0_DQ[52] DDR0_DQ[53] DDR0_DQ[54] DDR0_DQ[55] DDR0_DQ[56] DDR0_DQ[57] DDR0_DQ[58] DDR0_DQ[59] DDR0_DQ[60] DDR0_DQ[61] DDR0_DQ[62] DDR0_DQ[63]

LOGIC

5

Non-Interleave

DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15]

DDR0_DQ[32] DDR0_DQ[33] DDR0_DQ[34] DDR0_DQ[35] DDR0_DQ[36] DDR0_DQ[37] DDR0_DQ[38] DDR0_DQ[39] DDR0_DQ[40] DDR0_DQ[41] DDR0_DQ[42] DDR0_DQ[43] DDR0_DQ[44] DDR0_DQ[45] DDR0_DQ[46] DDR0_DQ[47]

DDR1_DQ[0] DDR1_DQ[1] DDR1_DQ[2] DDR1_DQ[3] DDR1_DQ[4] DDR1_DQ[5] DDR1_DQ[6] DDR1_DQ[7] DDR1_DQ[8] DDR1_DQ[9] DDR1_DQ[10] DDR1_DQ[11] DDR1_DQ[12] DDR1_DQ[13] DDR1_DQ[14] DDR1_DQ[15]

DDR1_DQ[32] DDR1_DQ[33] DDR1_DQ[34] DDR1_DQ[35] DDR1_DQ[36] DDR1_DQ[37] DDR1_DQ[38] DDR1_DQ[39] DDR1_DQ[40] DDR1_DQ[41] DDR1_DQ[42] DDR1_DQ[43] DDR1_DQ[44] DDR1_DQ[45] DDR1_DQ[46] DDR1_DQ[47]

M_A_DQ4 M_A_DQ0 M_A_DQ1 M_A_DQ7 M_A_DQ6 M_A_DQ2 M_A_DQ3 M_A_DQ5 M_A_DQ12 M_A_DQ14 M_A_DQ11 M_A_DQ9 M_A_DQ10 M_A_DQ8 M_A_DQ15 M_A_DQ13 M_A_DQ20 M_A_DQ16 M_A_DQ17 M_A_DQ23 M_A_DQ22 M_A_DQ18 M_A_DQ19 M_A_DQ21 M_A_DQ28 M_A_DQ24 M_A_DQ25 M_A_DQ31 M_A_DQ26 M_A_DQ30 M_A_DQ27 M_A_DQ29 M_A_DQ32 M_A_DQ38 M_A_DQ33 M_A_DQ39 M_A_DQ36 M_A_DQ34 M_A_DQ37 M_A_DQ35 M_A_DQ46 M_A_DQ44 M_A_DQ45 M_A_DQ41 M_A_DQ40 M_A_DQ42 M_A_DQ47 M_A_DQ43 M_A_DQ48 M_A_DQ50 M_A_DQ51 M_A_DQ55 M_A_DQ54 M_A_DQ52 M_A_DQ53 M_A_DQ49 M_A_DQ62 M_A_DQ56 M_A_DQ57 M_A_DQ61 M_A_DQ58 M_A_DQ60 M_A_DQ59 M_A_DQ63

U58B

AL71

DDR0_DQ[0]

AL68

DDR0_DQ[1]

AN68

DDR0_DQ[2]

AN69

DDR0_DQ[3]

AL70

DDR0_DQ[4]

AL69

DDR0_DQ[5]

AN70

DDR0_DQ[6]

AN71

DDR0_DQ[7]

AR70

DDR0_DQ[8]

AR68

DDR0_DQ[9]

AU71

DDR0_DQ[10]

AU68

DDR0_DQ[11]

AR71

DDR0_DQ[12]

AR69

DDR0_DQ[13]

AU70

DDR0_DQ[14]

AU69

DDR0_DQ[15]

BB65

DDR0_DQ[16]/DDR0_DQ[32]

AW65

DDR0_DQ[17]/DDR0_DQ[33]

AW63

DDR0_DQ[18]/DDR0_DQ[34]

AY63

DDR0_DQ[19]/DDR0_DQ[35]

BA65

DDR0_DQ[20]/DDR0_DQ[36]

AY65

DDR0_DQ[21]/DDR0_DQ[37]

BA63

DDR0_DQ[22]/DDR0_DQ[38]

BB63

DDR0_DQ[23]/DDR0_DQ[39]

BA61

DDR0_DQ[24]/DDR0_DQ[40]

AW61

DDR0_DQ[25]/DDR0_DQ[41]

BB59

DDR0_DQ[26]/DDR0_DQ[42]

AW59

DDR0_DQ[27]/DDR0_DQ[43]

BB61

DDR0_DQ[28]/DDR0_DQ[44]

AY61

DDR0_DQ[29]/DDR0_DQ[45]

BA59

DDR0_DQ[30]/DDR0_DQ[46]

AY59

DDR0_DQ[31]/DDR0_DQ[47]

AY39

DDR0_DQ[32]/DDR1_DQ[0]

AW39

DDR0_DQ[33]/DDR1_DQ[1]

AY37

DDR0_DQ[34]/DDR1_DQ[2]

AW37

DDR0_DQ[35]/DDR1_DQ[3]

BB39

DDR0_DQ[36]/DDR1_DQ[4]

BA39

DDR0_DQ[37]/DDR1_DQ[5]

BA37

DDR0_DQ[38]/DDR1_DQ[6]

BB37

DDR0_DQ[39]/DDR1_DQ[7]

AY35

DDR0_DQ[40]/DDR1_DQ[8]

AW35

DDR0_DQ[41]/DDR1_DQ[9]

AY33

DDR0_DQ[42]/DDR1_DQ[10]

AW33

DDR0_DQ[43]/DDR1_DQ[11]

BB35

DDR0_DQ[44]/DDR1_DQ[12]

BA35

DDR0_DQ[45]/DDR1_DQ[13]

BA33

DDR0_DQ[46]/DDR1_DQ[14]

BB33

DDR0_DQ[47]/DDR1_DQ[15]

AY31

DDR0_DQ[48]/DDR1_DQ[32]

AW31

DDR0_DQ[49]/DDR1_DQ[33]

AY29

DDR0_DQ[50]/DDR1_DQ[34]

AW29

DDR0_DQ[51]/DDR1_DQ[35]

BB31

DDR0_DQ[52]/DDR1_DQ[36]

BA31

DDR0_DQ[53]/DDR1_DQ[37]

BA29

DDR0_DQ[54]/DDR1_DQ[38]

BB29

DDR0_DQ[55]/DDR1_DQ[39]

AY27

DDR0_DQ[56]/DDR1_DQ[40]

AW27

DDR0_DQ[57]/DDR1_DQ[41]

AY25

DDR0_DQ[58]/DDR1_DQ[42]

AW25

DDR0_DQ[59]/DDR1_DQ[43]

BB27

DDR0_DQ[60]/DDR1_DQ[44]

BA27

DDR0_DQ[61]/DDR1_DQ[45]

BA25

DDR0_DQ[62]/DDR1_DQ[46]

BB25

DDR0_DQ[63]/DDR1_DQ[47]

Kaby lake-U_BGA1356

TABLE

AM70 AM69

Block 0

AT69 AT70

BA64 AY64

Block 2

AY60 BA60

BA38 AY38

Block 4

AY34 BA34

BA30 AY30

Block 6

AY26 BA26

4

SKL_ULT

DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1]

DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3]

DDR0_CS#[0] DDR0_CS#[1] DDR0_ODT[0]

DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]

DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]

DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]

DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]

DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]

DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]

DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]

DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]

DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]

DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]

DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]

DDR CH - A

2 OF 20

DDR0_ODT[1]

DDR0_MA[3] DDR0_MA[4]

DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1]

DDR0_DQSP[1] DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_DQSP[7]/DDR1_DQSP[5]

DDR0_ALERT#

DDR0_PAR

DDR_VREF_CA

DDR0_VREF_DQ DDR1_VREF_DQ

DDR_VTT_CNTL

InterleavePin Non-Interleave

DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]

DDR0_DQSN[2] DDR0_DQSP[2] DDR0_DQSN[3] DDR0_DQSP[3]

DDR0_DQSN[4] DDR0_DQSP[4] DDR0_DQSN[5] DDR0_DQSP[5]

DDR0_DQSN[6] DDR0_DQSP[6] DDR0_DQSN[7] DDR0_DQSP[7]

DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]

DDR0_DQSN[4] DDR0_DQSP[4] DDR0_DQSN[5] DDR0_DQSP[5]

DDR1_DQSN[0] DDR1_DQSP[0] DDR1_DQSN[1] DDR1_DQSP[1]

DDR1_DQSN[4] DDR1_DQSP[4] DDR1_DQSN[5] DDR1_DQSP[5]

LOGIC

3

AU53 AT53 AU55 AT55

BA56 BB56 AW56 AY56

AU45 AU43 AT45 AT43

BA51 BB54 BA52 AY52 AW52 AY55 AW54 BA54 BA55 AY54

AU46 AU48 AT46 AU50 AU52 AY51 AT48 AT50 BB50 AY50 BA50 BB52

AM70 AM69 AT69 AT70 BA64 AY64 AY60 BA60 BA38 AY38 AY34 BA34 BA30 AY30 AY26 BA26

AW50 AT52

AY67 AY68 BA67

AW67

M_A_A5 M_A_A9 M_A_A6 M_A_A8 M_A_A7

M_A_A12 M_A_A11

M_A_A13 M_A_A15 M_A_A14 M_A_A16

M_A_A2

M_A_A10 M_A_A1 M_A_A0 M_A_A3 M_A_A4

DDR_PG_CTRL

-M_A_DDRCLK0_1200M M_A_DDRCLK0_1200M

M_A_CKE0

-M_A_CS0

M_A_ODT0

-M_A_DQS0 M_A_DQS0

-M_A_DQS1 M_A_DQS1

-M_A_DQS2 M_A_DQS2

-M_A_DQS3 M_A_DQS3

-M_A_DQS4 M_A_DQS4

-M_A_DQS5 M_A_DQS5

-M_A_DQS6 M_A_DQS6

-M_A_DQS7 M_A_DQS7

-M_A_ALERT M_A_PARITY

VCC1R2A

@

R9 10K_0201_5%

1 2

-M_A_DDRCLK0_1200M 22,23 M_A_DDRCLK0_1200M 22,23

M_A_CKE0 22,23

-M_A_CS0 22,23

M_A_ODT0 22,23

-M_A_ALERT 22,23

M_A_PARITY 22,23

M_A_VREF_CA_CPU 23

M_B_VREF_CA_CPU 24

VCC3M

R8 100K_0201_5%

1 2

1

Q1

2

DTC015TMT2L NPN VMT3

3

M_A_BG0

-M_A_ACT M_A_BG1

M_A_BS0

M_A_BS1

DDR_VTT_PG_CTRL

2

M_A_BG0 22,23

-M_A_ACT 22,23 M_A_BG1 22

M_A_BS0 22,23

M_A_BS1 22,23

M_A_A[16:0] 22,23

-M_A_DQS[7:0] 22

M_A_DQS[7:0] 22

DDR_VTT_PG_CTRL 83

TABLE

BA51 BB54 BA52 AY52 AW52 AY55 AW54 BA54 BA55 AY54

AU46 AU48 AT46 AU50 AU52 AY51 AT48 AT50 BB50 AY50 BA50 BB52

LC Future Center Secret Data

DDR3L LPDDR3 DDR4

DDR0_MA[5] DDR0_MA[9] DDR0_MA[6] DDR0_MA[8] DDR0_MA[7] DDR0_BA[2] DDR0_MA[12] DDR0_MA[11] DDR0_MA[15] DDR0_MA[14]

DDR0_MA[13] DDR0_CAS# DDR0_WE# DDR0_RAS# DDR0_BA[0] DDR0_MA[2] DDR0_BA[1] DDR0_MA[10] DDR0_MA[1] DDR0_MA[0] DDR0_MA[3] DDR0_MA[4]

DDR0_CAA[0] DDR0_CAA[1] DDR0_CAA[2] DDR0_CAA[3] DDR0_CAA[4] DDR0_CAA[5] DDR0_CAA[6] DDR0_CAA[7] DDR0_CAA[8] DDR0_CAA[9]

DDR0_CAB[0] DDR0_CAB[1] DDR0_CAB[2] DDR0_CAB[3] DDR0_CAB[4] DDR0_CAB[5] DDR0_CAB[6] DDR0_CAB[7] DDR0_CAB[8] DDR0_CAB[9] Not Used Not Used

DDR0_MA[5] DDR0_MA[9] DDR0_MA[6] DDR0_MA[8] DDR0_MA[7] DDR0_BG[0] DDR0_MA[12] DDR0_MA[11] DDR0_ACT# DDR0_BG[1]

DDR0_MA[13] DDR0_MA[15] DDR0_MA[14] DDR0_MA[16] DDR0_BA[0] DDR0_MA[2] DDR0_BA[1] DDR0_MA[10] DDR0_MA[1] DDR0_MA[0] DDR0_MA[3] DDR0_MA[4]

LOGIC

Project Name

Date: Sheet of

Kolar-1

Rev Title

4.02

CPU(2/16) : DDR CHANNEL-A

Wednesday, November 01, 2017

1

4 97

5

4

3

2

1

TABLE

AY48

M_B_DQ[63:0]24

D D

TABLE

AF65 AF64 AK65 AK64 AF66 AF67 AK67 AK66 AF70

Block 1

AF68 AH71 AH68 AF71 AF69 AH70 AH69

C C

B B

A A

Block 3

Block 5

Block 7

AT66 AU66 AP65 AN65 AN66 AP66 AT65 AU65 AT61 AU61 AP60 AN60 AN61 AP61 AT60 AU60

AU40 AT40 AT37 AU37 AR40 AP40 AP37 AR37 AT33 AU33 AU30 AT30 AR33 AP33 AR30 AP30

AU27 AT27 AT25 AU25 AP27 AN27 AN25 AP25 AT22 AU22 AU21 AT21 AN22 AP22 AP21 AN21

Interleave

DDR1_DQ[0] DDR1_DQ[1] DDR1_DQ[2] DDR1_DQ[3] DDR1_DQ[4] DDR1_DQ[5] DDR1_DQ[6] DDR1_DQ[7] DDR1_DQ[8] DDR1_DQ[9] DDR1_DQ[10] DDR1_DQ[11] DDR1_DQ[12] DDR1_DQ[13] DDR1_DQ[14] DDR1_DQ[15]

DDR1_DQ[16] DDR1_DQ[17] DDR1_DQ[18] DDR1_DQ[19] DDR1_DQ[20] DDR1_DQ[21] DDR1_DQ[22] DDR1_DQ[23] DDR1_DQ[24] DDR1_DQ[25] DDR1_DQ[26] DDR1_DQ[27] DDR1_DQ[28] DDR1_DQ[29] DDR1_DQ[30] DDR1_DQ[31]

DDR1_DQ[32] DDR1_DQ[33] DDR1_DQ[34] DDR1_DQ[35] DDR1_DQ[36] DDR1_DQ[37] DDR1_DQ[38] DDR1_DQ[39] DDR1_DQ[40] DDR1_DQ[41] DDR1_DQ[42] DDR1_DQ[43] DDR1_DQ[44] DDR1_DQ[45] DDR1_DQ[46] DDR1_DQ[47]

DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]

LOGIC

5

Non-Interleave

DDR0_DQ[16] DDR0_DQ[17] DDR0_DQ[18] DDR0_DQ[19] DDR0_DQ[20] DDR0_DQ[21] DDR0_DQ[22] DDR0_DQ[23] DDR0_DQ[24] DDR0_DQ[25] DDR0_DQ[26] DDR0_DQ[27] DDR0_DQ[28] DDR0_DQ[29] DDR0_DQ[30] DDR0_DQ[31]

DDR0_DQ[48] DDR0_DQ[49] DDR0_DQ[50] DDR0_DQ[51] DDR0_DQ[52] DDR0_DQ[53] DDR0_DQ[54] DDR0_DQ[55] DDR0_DQ[56] DDR0_DQ[57] DDR0_DQ[58] DDR0_DQ[59] DDR0_DQ[60] DDR0_DQ[61] DDR0_DQ[62] DDR0_DQ[63]

DDR1_DQ[16] DDR1_DQ[17] DDR1_DQ[18] DDR1_DQ[19] DDR1_DQ[20] DDR1_DQ[21] DDR1_DQ[22] DDR1_DQ[23] DDR1_DQ[24] DDR1_DQ[25] DDR1_DQ[26] DDR1_DQ[27] DDR1_DQ[28] DDR1_DQ[29] DDR1_DQ[30] DDR1_DQ[31]

DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]

M_B_DQ4 M_B_DQ5

M_B_DQ6 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ10 M_B_DQ14 M_B_DQ13 M_B_DQ9 M_B_DQ11 M_B_DQ15 M_B_DQ8 M_B_DQ12 M_B_DQ16 M_B_DQ23 M_B_DQ17 M_B_DQ21 M_B_DQ20 M_B_DQ18 M_B_DQ19 M_B_DQ22 M_B_DQ28 M_B_DQ24 M_B_DQ31 M_B_DQ27 M_B_DQ29 M_B_DQ25 M_B_DQ30 M_B_DQ26 M_B_DQ36 M_B_DQ33 M_B_DQ34 M_B_DQ38 M_B_DQ32 M_B_DQ37 M_B_DQ39 M_B_DQ35 M_B_DQ40 M_B_DQ44 M_B_DQ42 M_B_DQ46 M_B_DQ41 M_B_DQ45 M_B_DQ43 M_B_DQ47 M_B_DQ54 M_B_DQ52 M_B_DQ55 M_B_DQ50 M_B_DQ49 M_B_DQ53 M_B_DQ48 M_B_DQ51 M_B_DQ56 M_B_DQ61 M_B_DQ57 M_B_DQ59 M_B_DQ60 M_B_DQ62 M_B_DQ63 M_B_DQ58

4

AF65 AF64 AK65 AK64 AF66 AF67 AK67 AK66 AF70 AF68 AH71 AH68 AF71 AF69 AH70 AH69 AT66 AU66 AP65 AN65 AN66 AP66 AT65 AU65 AT61 AU61 AP60 AN60 AN61 AP61 AT60 AU60 AU40 AT40 AT37 AU37 AR40 AP40 AP37 AR37 AT33 AU33 AU30 AT30 AR33 AP33 AR30 AP30 AU27 AT27 AT25 AU25 AP27 AN27 AN25 AP25 AT22 AU22 AU21 AT21 AN22 AP22 AP21 AN21

TABLE

Block 1

Block 3

Block 5

Block 7

U58C

DDR1_DQ[0]/DDR0_DQ[16] DDR1_DQ[1]/DDR0_DQ[17] DDR1_DQ[2]/DDR0_DQ[18] DDR1_DQ[3]/DDR0_DQ[19] DDR1_DQ[4]/DDR0_DQ[20] DDR1_DQ[5]/DDR0_DQ[21] DDR1_DQ[6]/DDR0_DQ[22] DDR1_DQ[7]/DDR0_DQ[23] DDR1_DQ[8]/DDR0_DQ[24] DDR1_DQ[9]/DDR0_DQ[25] DDR1_DQ[10]/DDR0_DQ[26] DDR1_DQ[11]/DDR0_DQ[27] DDR1_DQ[12]/DDR0_DQ[28] DDR1_DQ[13]/DDR0_DQ[29] DDR1_DQ[14]/DDR0_DQ[30] DDR1_DQ[15]/DDR0_DQ[31] DDR1_DQ[16]/DDR0_DQ[48] DDR1_DQ[17]/DDR0_DQ[49] DDR1_DQ[18]/DDR0_DQ[50] DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQ[23]/DDR0_DQ[55] DDR1_DQ[24]/DDR0_DQ[56] DDR1_DQ[25]/DDR0_DQ[57] DDR1_DQ[26]/DDR0_DQ[58] DDR1_DQ[27]/DDR0_DQ[59] DDR1_DQ[28]/DDR0_DQ[60] DDR1_DQ[29]/DDR0_DQ[61] DDR1_DQ[30]/DDR0_DQ[62] DDR1_DQ[31]/DDR0_DQ[63] DDR1_DQ[32]/DDR1_DQ[16] DDR1_DQ[33]/DDR1_DQ[17] DDR1_DQ[34]/DDR1_DQ[18] DDR1_DQ[35]/DDR1_DQ[19] DDR1_DQ[36]/DDR1_DQ[20] DDR1_DQ[37]/DDR1_DQ[21] DDR1_DQ[38]/DDR1_DQ[22] DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]

Kaby lake-U_BGA1356

AH66 AH65 AG69 AG70

AR66 AR65 AR61 AR60

AT38 AR38 AT32 AR32

AR25 AR27 AR22 AR21

SKL_ULT

DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[0] DDR1_CKP[1]

DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3]

DDR1_CS#[0] DDR1_CS#[1] DDR1_ODT[0]

DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]

DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]

DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]

DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]

DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]

DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]

DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]

DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]

DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]

DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]

DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]

DDR CH - B

3 OF 20

DDR1_ODT[1]

DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQSP[5]/DDR1_DQSP[3]

DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]

DDR1_ALERT#

DRAM_RESET# DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2]

InterleavePin Non-Interleave

DDR1_DQSN[0] DDR1_DQSP[0] DDR1_DQSN[1] DDR1_DQSP[1]

DDR1_DQSN[2] DDR1_DQSP[2] DDR1_DQSN[3] DDR1_DQSP[3]

DDR1_DQSN[4] DDR1_DQSP[4] DDR1_DQSN[5] DDR1_DQSP[5]

DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]

DDR0_DQSN[2] DDR0_DQSP[2] DDR0_DQSN[3] DDR0_DQSP[3]

DDR0_DQSN[6] DDR0_DQSP[6] DDR0_DQSN[7] DDR0_DQSP[7]

DDR1_DQSN[2] DDR1_DQSP[2] DDR1_DQSN[3] DDR1_DQSP[3]

DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]

LOGIC

DDR1_MA[3] DDR1_MA[4]

DDR1_PAR

M_B_A5 M_B_A9 M_B_A6 M_B_A8 M_B_A7

M_B_A12 M_B_A11

M_B_A13 M_B_A15 M_B_A14 M_B_A16

M_B_A2

M_B_A10 M_B_A1 M_B_A0 M_B_A3 M_B_A4

DDR_RCOMP0 DDR_RCOMP1 DDR_RCOMP2

-M_B_DDRCLK0_1200M

-M_B_DDRCLK1_1200M M_B_DDRCLK0_1200MM_B_DQ7 M_B_DDRCLK1_1200M

M_B_CKE0 M_B_CKE1

-M_B_CS0

-M_B_CS1 M_B_ODT0 M_B_ODT1

-M_B_DQS0 M_B_DQS0

-M_B_DQS1 M_B_DQS1

-M_B_DQS2 M_B_DQS2

-M_B_DQS3 M_B_DQS3

-M_B_DQS4 M_B_DQS4

-M_B_DQS5 M_B_DQS5

-M_B_DQS6 M_B_DQS6

-M_B_DQS7 M_B_DQS7

1 2

R11 121_0201_1%

1 2

R12 80.6_0201_1%

1 2

R13 100_0201_1%

-M_B_DDRCLK0_1200M 24

-M_B_DDRCLK1_1200M 24 M_B_DDRCLK0_1200M 24 M_B_DDRCLK1_1200M 24

M_B_CKE0 24 M_B_CKE1 24

-M_B_CS0 24

-M_B_CS1 24 M_B_ODT0 24 M_B_ODT1 24

M_B_BG0

-M_B_ACT M_B_BG1

M_B_BS0

M_B_BS1

2

M_B_BG0 24

-M_B_ACT 24 M_B_BG1 24

M_B_BS0 24

M_B_BS1 24

M_B_A[16:0] 24

-M_B_DQS[7:0] 24

M_B_DQS[7:0] 24

AN45 AN46 AP45 AP46

AN56 AP55 AN55 AP53

BB42 AY42 BA42 AW42

AY48 AP50 BA48 BB48 AP48 AP52 AN50 AN48 AN53 AN52

BA43 AY43 AY44 AW44 BB44 AY47 BA44 AW46 AY46 BA46 BB46 BA47

AH66 AH65 AG69 AG70 AR66 AR65 AR61 AR60 AT38 AR38 AT32 AR32 AR25 AR27 AR22 AR21

AN43 AP43 AT13 AR18 AT18 AU18

3

AP50 BA48 BB48 AP48 AP52 AN50 AN48 AN53 AN52

BA43 AY43 AY44 AW44 BB44 AY47 BA44 AW46 AY46 BA46 BB46 BA47

VCC1R2A

1 2

LC Future Center Secret Data

DDR3L LPDDR3 DDR4

DDR1_MA[5] DDR1_MA[9] DDR1_MA[6] DDR1_MA[8] DDR1_MA[7] DDR1_BA[2] DDR1_MA[12] DDR1_MA[11] DDR1_MA[15] DDR1_MA[14]

DDR1_MA[13] DDR1_CAS# DDR1_WE# DDR1_RAS# DDR1_BA[0] DDR1_MA[2] DDR1_BA[1] DDR1_MA[10] DDR1_MA[1] DDR1_MA[0] DDR1_MA[3] DDR1_MA[4]

R10 470_0201_5%

1 2

R699 0_0201_5%

DDR1_CAA[0] DDR1_CAA[1] DDR1_CAA[2] DDR1_CAA[3] DDR1_CAA[4] DDR1_CAA[5] DDR1_CAA[6] DDR1_CAA[7] DDR1_CAA[8] DDR1_CAA[9]

DDR1_CAB[0] DDR1_CAB[1] DDR1_CAB[2] DDR1_CAB[3] DDR1_CAB[4] DDR1_CAB[5] DDR1_CAB[6] DDR1_CAB[7] DDR1_CAB[8] DDR1_CAB[9] Not Used Not Used

-M_B_ALERT M_B_PARITY

-DRAMRST

2

@

C9392

0.1U_0201_6.3V6-K

1

Project Name

Rev Title

4.02

Date: Sheet of

DDR1_MA[5] DDR1_MA[9] DDR1_MA[6] DDR1_MA[8] DDR1_MA[7] DDR1_BG[0] DDR1_MA[12] DDR1_MA[11] DDR1_ACT# DDR1_BG[1]

DDR1_MA[13] DDR1_MA[15] DDR1_MA[14] DDR1_MA[16] DDR1_BA[0] DDR1_MA[2] DDR1_BA[1] DDR1_MA[10] DDR1_MA[1] DDR1_MA[0] DDR1_MA[3] DDR1_MA[4]

LOGIC

-M_B_ALERT 24 M_B_PARITY 24

-DRAMRST 22,24

Kolar-1

CPU(3/16) : DDR CHANNEL-B

Wednesday, November 01, 2017

1

5 97

5

D D

4

VCCSTG VCCSTVCC3B

3

2

1

C C

PECI56

-PROCHOT56,75

-TBT_PLUG_EVENT31

-WWAN_DISABLE46

B B

A A

PECI

-PROCHOT

-TBT_PLUG_EVENT

-WWAN_DISABLE

R14

R739

@

1 2

10K_0201_5%

1 2

R18 49.9_0201_1% R19 49.9_0201_1% R20 49.9_0201_1% R21 49.9_0201_1%

1K_0201_5%

1 2

R17 499_0402_1%

1 2 1 2 1 2 1 2

R15

1 2

R16

1K_0201_5%

1 2

1K_0201_5%

CATERR#

THERMTRIP#

PROC_POPIRCOMP PCH_OPIRCOMP OPCE_RCOMP OPC_RCOMP

AT16

AU16

D63 A54 C65 C63 A65

C55 D55 B54 C56

A6

A7 BA5 AY5

H66 H65

U58D

CATERR# PECI PROCHOT# THERMTRIP# SKTOCC#

CPU MISC

BPM#[0] BPM#[1] BPM#[2] BPM#[3]

GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3

PROC_POPIRCOMP PCH_OPIRCOMP OPCE_RCOMP OPC_RCOMP

Kaby lake-U_BGA1356

SKL_ULT

4 OF 20

JTAG

PROC_TCK

PROC_TDI PROC_TDO PROC_TMS

PROC_TRST#

PCH_JTAG_TCK

PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS

PCH_TRST#

JTAGX

B61 D60 A61 C60 B59

B56 D59 A56 C59 C61 A59

R22 51_0201_5%

1 2

R10355 0_0402_5%

1 2

R10356 0_0402_5%

1 2

R10357 0_0402_5%

1 2

R10358 0_0402_5%

1 2

R10359 0_0402_5%

1 2

R10360 0_0402_5%

XDP_TCK0 XDP_TDI XDP_TDO XDP_TMS

-XDP_TRST

PCH_TCK

XDP_TCK0 19 XDP_TDI 19 XDP_TDO 19 XDP_TMS 19

-XDP_TRST 19

PCH_TCK 19

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Kolar-1

Rev Title

4.02

CPU(4/16) : MISC/JTAG

Date: Sheet of

Wednesday, November 01, 2017

1

6 97

5

TABLE : Functional Strap

SPI0_MOSI (Boot Halt)

HIGH

Disabled (Default)

LOW

Enabled

4

3

2

1

TABLE : Functional Strap

D D

C C

B B

SPI0_MISO (JTAG ODT Disable)

HIGH

Enabled (Default)

LOW

Disabled

VCC3_SUSVCC3B

@

R24

@

1 2

R33 1K_0201_5%

10K_0201_5%

1 2

AW13

AY11

AV2

AW3

AV3

AW2

AU4 AU3 AU2 AU1

M2 M3

J4 V1 V2

M1

G3 G2 G1

SPI0_CLK SPI0_MISO SPI0_MOSI SPI0_IO2 SPI0_IO3 SPI0_CS0# SPI0_CS1# SPI0_CS2#

GPP_D1/SPI1_CLK GPP_D2/SPI1_MISO GPP_D3/SPI1_MOSI GPP_D21/SPI1_IO2 GPP_D22/SPI1_IO3 GPP_D0/SPI1_CS#

CL_CLK CL_DATA CL_RST#

GPP_A0/RCIN#

GPP_A6/SERIRQ

1 2

R23 8.2K_0201_5%

SPI_CLK21,63 SPI_MISO_IO121,63 SPI_MOSI_IO021,63 SPI_IO221 SPI_IO321

-SPI_CS021

-SPI_CS263

-NFC_DTCT59

CL_CLK_WLAN45 CL_DATA_WLAN45

-CL_RST_WLAN45

-KBRC55

IRQSER55,64

-NFC_DTCT

CL_CLK_WLAN

CL_DATA_WLAN

-CL_RST_WLAN

TABLE : Functional Strap

GPP_C5/SML0ALERT # (LPC or eSPI)

TABLE : Functional Strap

GPP_C2/SMBALERT# (TLS Confidentiality)

U58E

SPI - FLASH

SPI - TOUCH

C LINK

Kaby lake-U_BGA1356

TABLE : Functional Strap

SPI0_IO2 (Consent Strap)

HIGH

LOW

HIGH

eSPI is selected

LOW

LPC is selected (Default) LOGIC

HIGH

Enable ME Crypto TLS with Confidentiality

LOW

Disable ME Crypto TLS (Default)

SKL_ULT

SMBUS, SMLINK

GPP_B23/SML1ALERT#/PCHHOT#

LPC

5 OF 20

Enabled (Default)

Disabled

GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3

GPP_A5/LFRAME#/ESPI_CS#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

GPP_A10/CLKOUT_LPC1

GPP_C0/SMBCLK

GPP_C1/SMBDATA

GPP_C2/SMBALERT#

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT#

GPP_C6/SML1CLK

GPP_C7/SML1DATA

GPP_A8/CLKRUN#

R7 R8 R10

R9 W2 W1

W3 V3 AM7

AY13 BA13 BB13 AY12 BA12 BA11

AW9 AY9 AW11

VCC3_SUS

1 2

R25 1K_0201_5%

LPCCLK_0 LPCCLK_1

LOGIC

R26 499_0201_1%

1 2

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

R31 33_0201_5%EMC@ R32 0_0201_5%EMC_NS@

1 2

1 2 1 2

R27 499_0201_1%

R28

4.7K_0201_5%

1 2

2

C9639

1

RF@

22P_0201_25V8-J

C9640

RF_NS@

1 2

2

1

R29

4.7K_0201_5%

22P_0201_25V8-J

LPC_AD[3:0] 55,64

-LPC_FRAME 55,64

-SUS_STAT 55,64

LPCCLK_EC_24M 55 LPCCLK_DEBUG_24M 64

VCC3B

1 2

R30 8.2K_0201_5%

SMB_CLK SMB_DATA

SML0_CLK SML0_DATA

EC_SCL2 EC_SDA2

SMB_CLK 64 SMB_DATA 64

SML0_CLK 41 SML0_DATA 41

EC_SCL2 56 EC_SDA2 56

-CLKRUN 55,64

TABLE : Functional Strap

SPI0_IO3 (A0 Personality Strap)

HIGH

Disabled (Default)

LOW

Enabled

A A

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Kolar-1

Rev Title

CPU(5/16) : LPC/SPI/SMBUS/C-LINK

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

7 97

5

4

3

2

1

D D

1 2

R34 10K_0201_5%

R35 10K_0201_5%

NFC_DLREQ59

C C

EPRIVACY_ON26 TBT_FORCE_PWR31

-EC_SCI55

-EC_WAKE55

I2C0_DATA59 I2C0_CLK59

-WWAN_RESET46

-INT_MIC_DTCT27

WWAN_CFG046 WWAN_CFG146

@

R10530 100K_0201_5%

B B

1 2

-MIC_HW_EN

R37 0_0201_5%

1 2

VCC3_SUS

@

1 2

R36 1K_0201_5%

AH10

AH11 AH12

AF11 AF12

TABLE : Functional Strap

GPP_B22/GSPI1_MOSI (Boot BIOS Destination)

HIGH

Boot BIOS from LPC

LOW

Boot BIOS from SPI (Default) LOGIC

TABLE : Functional Strap

GPP_B18/GSPI0_MOSI (No Reboot)

HIGH

Enable "No Reboot" Mode

LOW

Disable "No Reboot" Mode (Default)

U58F

AN8

GPP_B15/GSPI0_CS#

AP7

GPP_B16/GSPI0_CLK

AP8

GPP_B17/GSPI0_MISO

AR7

GPP_B18/GSPI0_MOSI

AM5

GPP_B19/GSPI1_CS#

AN7

GPP_B20/GSPI1_CLK

AP5

GPP_B21/GSPI1_MISO

AN5

GPP_B22/GSPI1_MOSI

AB1

GPP_C8/UART0_RXD

AB2

GPP_C9/UART0_TXD

W4

GPP_C10/UART0_RTS#

AB3

GPP_C11/UART0_CTS#

AD1

GPP_C20/UART2_RXD

AD2

GPP_C21/UART2_TXD

AD3

GPP_C22/UART2_RTS#

AD4

GPP_C23/UART2_CTS#

U7

GPP_C16/I2C0_SDA

U6

GPP_C17/I2C0_SCL

U8

GPP_C18/I2C1_SDA

U9

GPP_C19/I2C1_SCL

AH9

GPP_F4/I2C2_SDA GPP_F5/I2C2_SCL

GPP_F6/I2C3_SDA GPP_F7/I2C3_SCL

GPP_F8/I2C4_SDA GPP_F9/I2C4_SCL

Kaby lake-U_BGA1356

LPSS ISH

SKL_ULT

GPP_F10/I2C5_SDA/ISH_I2C2_SDA GPP_F11/I2C5_SCL/ISH_I2C2_SCL

GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA

GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL

6 OF 20

GPP_D15/ISH_UART0_RTS#

GPP_D16/ISH_UART0_CTS#/SML0BALERT#

GPP_C12/UART1_RXD/ISH_UART1_RXD

GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15/UART1_CTS#/ISH_UART1_CTS#

GPP_A12/BM_BUSY#/ISH_GP6

GPP_D9 GPP_D10 GPP_D11 GPP_D12

GPP_D5/ISH_I2C0_SDA GPP_D6/ISH_I2C0_SCL

GPP_D7/ISH_I2C1_SDA GPP_D8/ISH_I2C1_SCL

GPP_A18/ISH_GP0 GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5

P2 P3 P4 P1

M4 N3

N1 N2

AD11 AD12

U1 U2 U3 U4

AC1 AC2 AC3 AB4

AY8 BA8 BB7 BA7 AY7 AW7 AP13

TABLE : -DISCRETE_PRESENCE

Model

SWG

UMA

-DISCRETE_PRESENCE

DGFX_VRAM_ID0 DGFX_VRAM_ID1

R10397

ASM

NO ASM

1 2

R10397 0_0201_5%SWG@

1 2

R10398 0_0201_5%@

1 2

R10399 0_0201_5%SWG@

TABLE : DGFX_VRAM_ID

DFX_VRAM_ID[1..0]

00B

1GB

01B 2GB

10B 4GB

11B N / A

LOGIC

WWAN_CFG2 46 WWAN_CFG3 46

A A

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Kolar-1

Rev Title

CPU(6/16) : LPSS/ISH

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

8 97

5

D D

4

3

2

1

VCC3_SUS

PLACE ON TOP SIDE

1 2

R38 1K_0201_5%

VCC3_SUS

@

1 2

HDA_SYNC67 HDA_BCLK67

HDA_SDO67

HDA_SDIN067

C C

B B

GC6_FB_EN53,89 NFC_ACTIVE59

-GPU_EVENT53 DGFX_PWRGD48

PCH_SPKR47

GC6_FB_EN

-GPU_EVENT

PCH_SPKR

R41 33_0201_5%

1 2

R42 33_0201_5%EMC@

1 2

R43 33_0201_5%EMC@

2

C3 22P_0201_25V8-J

1

R40 1K_0201_5%

R45 0_0201_5%@

1 2

R39 0_0603_5%@

TP936

TP2

Test_Point_20MIL

1

TP1

1

Test_Point_20MIL

TEST PAD BOTTOM SIDE DO NOT MOVE AFTER FIX

HDA_SYNC_R HDA_BCLK_R HDA_SDO_R

Test_Point_20MIL

1 2

1

NFC_ACTIVE_R

TABLE : Functional Strap

HDA_SDO/I2S0_TXD

Flash Descriptor Security Override

HIGH

Disable Flash Descriptor Security (Override)

LOW

Enable Flash Descriptor Security (Default)

U58G

AUDIO

BA22

HDA_SYNC/I2S0_SFRM

AY22

HDA_BLK/I2S0_SCLK

BB22

HDA_SDO/I2S0_TXD

BA21

HDA_SDI0/I2S0_RXD

AY21

HDA_SDI1/I2S1_RXD

AW22

HDA_RST#/I2S1_SCLK

J5

GPP_D23/I2S_MCLK

AY20

I2S1_SFRM

AW20

I2S1_TXD

AK7

GPP_F1/I2S2_SFRM

AK6

GPP_F0/I2S2_SCLK

AK9

GPP_F2/I2S2_TXD

AK10

GPP_F3/I2S2_RXD

H5

GPP_D19/DMIC_CLK0

D7

GPP_D20/DMIC_DATA0

D8

GPP_D17/DMIC_CLK1

C8

GPP_D18/DMIC_DATA1

AW5

GPP_B14/SPKR

Kaby lake-U_BGA1356

TABLE : Functional Strap

GPP_B14/SPKR (Top Swap Override)

HIGH

Enable "Top Swap" Mode

LOW

Disable "Top Swap" Mode (Default) LOGIC

SKL_ULT

7 OF 20

SDIO/SDXC

GPP_G0/SD_CMD GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3

GPP_G5/SD_CD# GPP_G6/SD_CLK

GPP_G7/SD_WP

GPP_A17/SD_PWR_EN#/ISH_GP7

GPP_A16/SD_1P8_SEL

SD_RCOMP

GPP_F23

AB11 AB13 AB12 W12 W11 W10 W8 W7

BA9 BB9

AB7

AF13

SD_RCOMP

1 2

R46 200_0201_1%

TBT_RTD3_PWR_EN 31 TBT_FORCE_USB_PWR 31

-TBT_PERST 31

-TBT_PCIE_WAKE 31

-SC_DTCT 60DDI_PRIORITY28

A A

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Kolar-1

Rev Title

CPU(7/16) : AUDIO/SDXC

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

9 97

5

4

3

2

1

I/O High Speed Signals Configuration Net Name

Port 1

Port 2

Port 3

Port 4

Port 5

Port 6

D D

Port 7

Port 8

Port 9

Port 10

Port 11

Port 12

Port 13

Port 14

Port 15

Port 16

C C

B B

A A

Flexible I/O Configuration

USB3 1

USB3 2/SSIC

USB3 3

USB3 4

USB3 5/PCIE 1

USB3 6/PCIE 2

PCIE 3 (GbE)

PCIE 4 (GbE)

PCIE 5 (GbE)

PCIE 6

PCIE 7/SATA 0

PCIE 8/SATA 1A

PCIE 9 (GbE) PCIE 9 (x4)

PCIE 10 (GbE) PCIE 10 (x4) PCIE8_L2

PCIE 11/SATA 1B

PCIE 12/SATA 2

PCIE8_L0_SATA2_RXN38 PCIE8_L0_SATA2_RXP38 PCIE8_L0_SATA2_TXN38 PCIE8_L0_SATA2_TXP38

USB3 1

USB3 2

USB3 3 USB3P2

USB3 4

PCIE 1 (x2)

PCIE 2 (x2)

PCIE 3

PCIE 4

PCIE 5 ( GbE )

PCIE 6

PCIE 7 (x2)

PCIE 8 (x2)

PCIE 11 (x4)

GPIO STRAP

PCIE0_L0_RXN48 PCIE0_L0_RXP48

PCIE0_L0_TXN_C48 PCIE0_L0_TXP_C48

PCIE0_L1_RXN48 PCIE0_L1_RXP48 PCIE0_L1_TXN_C48 PCIE0_L1_TXP_C48

PCIE3_RXN46 PCIE3_RXP46

PCIE3_TXN46 PCIE3_TXP46

PCIE4_RXN41 PCIE4_RXP41 PCIE4_TXN41 PCIE4_TXP41

PCIE5_RXN45 PCIE5_RXP45 PCIE5_TXN45 PCIE5_TXP45

PCIE6_L1_RXN31 PCIE6_L1_RXP31 PCIE6_L1_TXN31 PCIE6_L1_TXP31

PCIE6_L0_RXN31 PCIE6_L0_RXP31 PCIE6_L0_TXN31 PCIE6_L0_TXP31

PCIE8_L3_RXN38 PCIE8_L3_RXP38 PCIE8_L3_TXN38 PCIE8_L3_TXP38

PCIE8_L2_RXN38 PCIE8_L2_RXP38 PCIE8_L2_TXN38 PCIE8_L2_TXP38

-XDP_PRDY19

-XDP_PREQ19

-TPM_IRQ63

PCIE8_L1_RXN38 PCIE8_L1_RXP38 PCIE8_L1_TXN38 PCIE8_L1_TXP38

USB3P0

USB3P1

USB3P3

PCIE0_L0

PCIE0_L1

NA

PCIE3

PCIE4

PCIE5

PCIE6_L0

PCIE6_L1

PCIE8_L3

PCIE8_L1

PCIE8_L0_SATA2

VCC3_SUS

1 2

R47 10K_0201_5%

-XDP_PRDY

-XDP_PREQ

-TPM_IRQ

Near U58

1 2

C2472 0.22U_0201_6.3V6-K SWG@

1 2

C2473 0.22U_0201_6.3V6-K SWG@

1 2

C2474 0.22U_0201_6.3V6-K SWG@

1 2

C2475 0.22U_0201_6.3V6-K SWG@

1 2

R52 100_0201_1%

PCIe Port Assignment

dGPU

0 (x2)

23NA

M.2 WWAN Slot

4 GbE PHY

M.2 WLAN Slot Port 0

5

6 (x2) Thunderbolt

8 (x4) PCIe SSD

PCIE0_L0_TXN PCIE0_L0_TXP

PCIE0_L1_TXN PCIE0_L1_TXP

PCIE_RCOMPN PCIE_RCOMPP

BB11

U58H

PCIE/USB3/SATA

H13

PCIE1_RXN/USB3_5_RXN

G13

PCIE1_RXP/USB3_5_RXP

B17

PCIE1_TXN/USB3_5_TXN

A17

PCIE1_TXP/USB3_5_TXP

G11

PCIE2_RXN/USB3_6_RXN

F11

PCIE2_RXP/USB3_6_RXP

D16

PCIE2_TXN/USB3_6_TXN

C16

PCIE2_TXP/USB3_6_TXP

H16

PCIE3_RXN

G16

PCIE3_RXP

D17

PCIE3_TXN

C17

PCIE3_TXP

G15

PCIE4_RXN

F15

PCIE4_RXP

B19

PCIE4_TXN

A19

PCIE4_TXP

F16

PCIE5_RXN

E16

PCIE5_RXP

C19

PCIE5_TXN

D19

PCIE5_TXP

G18

PCIE6_RXN

F18

PCIE6_RXP

D20

PCIE6_TXN

C20

PCIE6_TXP

F20

PCIE7_RXN/SATA0_RXN

E20

PCIE7_RXP/SATA0_RXP

B21

PCIE7_TXN/SATA0_TXN

A21

PCIE7_TXP/SATA0_TXP

G21

PCIE8_RXN/SATA1A_RXN

F21

PCIE8_RXP/SATA1A_RXP

D21

PCIE8_TXN/SATA1A_TXN

C21

PCIE8_TXP/SATA1A_TXP

E22

PCIE9_RXN

E23

PCIE9_RXP

B23

PCIE9_TXN

A23

PCIE9_TXP

F25

PCIE10_RXN

E25

PCIE10_RXP

D23

PCIE10_TXN

C23

PCIE10_TXP

F5

PCIE_RCOMPN

E5

PCIE_RCOMPP

D56

PROC_PRDY#

D61

PROC_PREQ# GPP_A7/PIRQA#

E28

PCIE11_RXN/SATA1B_RXN

E27

PCIE11_RXP/SATA1B_RXP

D24

PCIE11_TXN/SATA1B_TXN

C24

PCIE11_TXP/SATA1B_TXP

E30

PCIE12_RXN/SATA2_RXN

F30

PCIE12_RXP/SATA2_RXP

A25

PCIE12_TXN/SATA2_TXN

B25

PCIE12_TXP/SATA2_TXP

Kaby lake-U_BGA1356

SATA Port Assignment

0

(PCIE 7)

1A

(PCIE 8)

1B

(PCIE 11)

SATA SSD

2

SKL_ULT

8 OF 20

SSIC / USB3

USB3_2_RXN/SSIC_1_RXN USB3_2_RXP/SSIC_1_RXP

USB3_2_TXN/SSIC_1_TXN USB3_2_TXP/SSIC_1_TXP

USB3_3_RXN/SSIC_2_RXN USB3_3_RXP/SSIC_2_RXP

USB3_3_TXN/SSIC_2_TXN USB3_3_TXP/SSIC_2_TXP

USB2

USB2_VBUSSENSE

GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3#

GPP_E4/DEVSLP0 GPP_E5/DEVSLP1 GPP_E6/DEVSLP2

GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2

GPP_E8/SATALED#

USB3_1_RXN

USB3_1_RXP USB3_1_TXN USB3_1_TXP

USB3_4_RXN

USB3_4_RXP USB3_4_TXN USB3_4_TXP

USB2N_1

USB2P_1

USB2N_2

USB2P_2

USB2N_3

USB2P_3

USB2N_4

USB2P_4

USB2N_5

USB2P_5

USB2N_6

USB2P_6

USB2N_7

USB2P_7

USB2N_8

USB2P_8

USB2N_9

USB2P_9

USB2N_10 USB2P_10

USB2_COMP

USB2_ID

VCC3_SUS

@

1 2

R48 10K_0201_5%

R49 10K_0201_5%

R10444 10K_0201_5%

H8 G8 C13 D13

J6 H6 B13 A13

J10 H10 B15 A15

E10 F10 C15 D15

AB9 AB10

AD6 AD7

AH3 AJ3

AD9 AD10

AJ1 AJ2

AF6 AF7

AH1 AH2

AF8 AF9

AG1 AG2

AH7 AH8

AB6

USBCOMP

AG3 AG4

A9 C9 D9 B9

J1 J2 J3

H2 H3 G4

H1

1 2

R50 113_0201_1%

1 2

R51 0_0201_5%

1 2

R53 1K_0201_5%

USB3P0_RXN 39 USB3P0_RXP 39 USB3P0_TXN 39 USB3P0_TXP 39

USB3P1_RXN 39 USB3P1_RXP 39 USB3P1_TXN 39 USB3P1_TXP 39

USB3P2_RXN 47 USB3P2_RXP 47 USB3P2_TXN 47 USB3P2_TXP 47

USB3P3_RXN 29 USB3P3_RXP 29 USB3P3_TXN 29 USB3P3_TXP 29

USBP0- 39 USBP0+ 39

USBP1- 39 USBP1+ 39

USBP2- 60 USBP2+ 60

USBP3- 36 USBP3+ 36

USBP4- 27 USBP4+ 27

USBP5- 46 USBP5+ 46

USBP6- 45 USBP6+ 45

USBP7- 27 USBP7+ 27

USBP8- 60 USBP8+ 60

USBP9- 26 USBP9+ 26

-USB_PORT0_OC0 39

-USB_PORT1_OC1 39

NFC_INT 59

USB Port Assignment

USB 3.0 System Port (AOU)

0

1

USB 3.0 System Port

Smart Card Reader

2

USB Type-C

3

IR Camera

4

M.2 WWAN Slot

5

M.2 WLAN Slot (Bluetooth)

6

RGB Camera

7

Fingerprint Reader

8

9

Touch Panel

USB 3.0 Port Assignment

0

USB 3.0 System Port (AOU)

USB 3.0 System Port

1

2

Mdia Card Controller

USB Type-C

3

4 (PCIE 1)

5

(PCIE 2)

VCC3_SUS

R54

1 2

10K_0201_5%

R740

1 2

10K_0201_5%

NFC_ON 59

SATA2_DEVSLP 38

BDC_ON 45

-SATA2_DTCT 38

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Kolar-1

Rev Title

CPU(8/16) : PCIE/USB/SATA

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

10 97

5

D D

C C

4

SKL_ULT

U58I

CSI-2

A36

CSI2_DN0

B36

CSI2_DP0

C38

CSI2_DN1

D38

CSI2_DP1

C36

CSI2_DN2

D36

CSI2_DP2

A38

CSI2_DN3

B38

CSI2_DP3

C31

CSI2_DN4

D31

CSI2_DP4

C33

CSI2_DN5

D33

CSI2_DP5

A31

CSI2_DN6

B31

CSI2_DP6

A33

CSI2_DN7

B33

CSI2_DP7

A29

CSI2_DN8

B29

CSI2_DP8

C28

CSI2_DN9

D28

CSI2_DP9

A27

CSI2_DN10

B27

CSI2_DP10

C27

CSI2_DN11

D27

CSI2_DP11

Kaby lake-U_BGA1356

GPP_D4/FLASHTRIG

EMMC

GPP_F13/EMMC_DATA0

GPP_F14/EMMC_DATA1

GPP_F15/EMMC_DATA2

GPP_F16/EMMC_DATA3

GPP_F17/EMMC_DATA4

GPP_F18/EMMC_DATA5

GPP_F19/EMMC_DATA6

GPP_F20/EMMC_DATA7

GPP_F21/EMMC_RCLK

GPP_F22/EMMC_CLK

GPP_F12/EMMC_CMD

9 OF 20

3

CSI2_CLKN0 CSI2_CLKP0 CSI2_CLKN1 CSI2_CLKP1 CSI2_CLKN2 CSI2_CLKP2 CSI2_CLKN3 CSI2_CLKP3

CSI2_COMP

EMMC_RCOMP

C37 D37 C32 D32 C29 D29 B26 A26

E13 B7

AP2 AP1 AP3 AN3 AN1 AN2 AM4 AM1

AM2 AM3

R738 0_0201_5%

AP4

AT1

1 2

PLANARID1 PLANARID2 PLANARID3 MEMORYID0 MEMORYID1 MEMORYID2 MEMORYID3 MEMORYID4

PLANARID0

-TAMPER_SW_DTCT 13

2

1

TABLE

LEVEL

1 NA

0

TABLE

LEVEL

EVT

FVT 0001B

SIT 0010B

SIT-R 0011B

SVT 0100B

R60 0_0201_5%

X76@

1 2

MEMORYID0 MEMORYID1 MEMORYID2 MEMORYID3 MEMORYID4

@

R61

R62 0_0201_5%

1 2

R63 0_0201_5%

1 2

2

0_0201_5%

1 2

3

TABLE

MEMORYID[4..0]

00000b

B B

00001b

00010b

00011b

00100b

01000b

01001b

01010b

01011b

01100b

01101b H5ANAG6NAMR-UHCSK Hynix 16Gbit DDP 8GB (2400)

01110b Micron MT40A512M16LY-075:E 8Gbit SDP 4GB (2400)

11111b NO_ASM

A A

U125, U126, U127, U128

Micron

Samsung

SK Hynix

Micron

Samsung

SK Hynix

5

MT40A512M16HA-083E:A

MT40A1G16HBA-083E:A

K4A8G165WB-BCPB

T.B.D.

MT40A512M16JY-083E:B 8Gbit SDP 4GB (2400)

MT40A1G16WBU-083E:B 16Gbit DDP 8GB (2400)

K4A8G165WC-BCRC 8Gbit SDP 4GB (2400)

K4AAG165WB-MCRC 16Gbit DDP 8GB (2400)

H5AN8G6NAFR-UHC 8Gbit SDP 4GB (2400)

8Gbit SDP

16Gbit DDP

8Gbit SDP

4GB (2133)

8GB (2133)

4GB (2133)

No Soldered Memory

4

R56 0_0201_5%

X76@

1 2

R57 0_0201_5%

X76@

1 2

R58 0_0201_5%

X76@

R59 0_0201_5%

X76@

1 2

R64 0_0201_5%

1 2

PLANARID0 PLANARID1 PLANARID2 PLANARID3

LC Future Center Secret Data

PLANAR ID

R61 R62 R63 R64

NA NA NA

ASM ASM ASM ASM

0123

PLANARID[3..0]

0000B

Project Name

Date: Sheet of

Kolar-1

Rev Title

CPU(9/16) : CSI-2/EMMC

4.02

Wednesday, November 01, 2017

1

11 97

5

4

3

2

1

D D

-CLKREQ_PCIE0

-CLKREQ_PCIE3

-CLKREQ_PCIE4

-CLKREQ_PCIE5

-CLKREQ_PCIE6

-CLKREQ_PCIE8

RP1

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

RP2

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

-CLKREQ_PCIE0

-CLKREQ_PCIE3

-CLKREQ_PCIE4

-CLKREQ_PCIE5

-CLKREQ_PCIE6

-CLKREQ_PCIE8

C C

-PCIE0_CLK_100M48 PCIE0_CLK_100M48

-CLKREQ_PCIE048

-PCIE3_CLK_100M46 PCIE3_CLK_100M46

-CLKREQ_PCIE346

-PCIE4_CLK_100M41 PCIE4_CLK_100M41

-CLKREQ_PCIE441

-PCIE5_CLK_100M45 PCIE5_CLK_100M45

-CLKREQ_PCIE545

-PCIE6_CLK_100M31 PCIE6_CLK_100M31

-CLKREQ_PCIE631

-PCIE8_CLK_100M38 PCIE8_CLK_100M38

-CLKREQ_PCIE838

B B

VCC3B

VCC3BVCC3_SUS

FLJ8

EMC_NS@

1 2

DLP0NSC280HL2L_4P

SUSCLK_32K 45,55

RTCX1 RTCX2

34

XTAL24_IN_U22_R

XTAL24_OUT_U22_R

R68 10M_0201_5%

1 2

U22@

R66 1M_0201_1%

1 2

C6 8P_0201_25V8-D

Y2

32.768KHZ 9PF 9H03280012

1 2

C7 8P_0201_25V8-D

For Y1 A layout is refering to the Intel's white paper(#564413).

Y1 24MHZ_10PF_1ZZHAE24000CC0G

1

U22@

GND1

GND2

2

U22@

24MHz 8pF 30ppm 2016 KDS 1ZZHAE24000CC0G TXC 7R24080003 Epson Q22FA1280055800

3

4

1 2

2

C4 8P_0201_25V8-D

1

2

C5 8P_0201_25V8-D

1

U22@

U58J

D42

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

AR10

GPP_B5/SRCCLKREQ0#

B42

CLKOUT_PCIE_N1

A42

CLKOUT_PCIE_P1

AT7

GPP_B6/SRCCLKREQ1#

D41

CLKOUT_PCIE_N2

C41

CLKOUT_PCIE_P2

AT8

GPP_B7/SRCCLKREQ2#

D40

CLKOUT_PCIE_N3

C40

CLKOUT_PCIE_P3

AT10

GPP_B8/SRCCLKREQ3#

B40

CLKOUT_PCIE_N4

A40

CLKOUT_PCIE_P4

AU8

GPP_B9/SRCCLKREQ4#

E40

CLKOUT_PCIE_N5

E38

CLKOUT_PCIE_P5

AU7

GPP_B10/SRCCLKREQ5#

Kaby lake-U_BGA1356

SKL_ULT

CLOCK SIGNALS

10 OF 20

CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P

GPD8/SUSCLK

XTAL24_IN

XTAL24_OUT

XCLK_BIASREF

RTCX1 RTCX2

SRTCRST#

RTCRST#

VCC1R0_SUS

R65

2.71K_0402_0.5%

F43 E43

BA17

E37 E35

E42

AM18 AM20

AN18 AM16

1 2

XTAL24_IN_U22 XTAL24_IN_U22_R XTAL24_OUT_U22 XTAL24_OUT_U22_R

XCLK_BIASREF

XTAL24_IN_U22

XTAL24_OUT_U22

1 2

R10445 0_0201_5%U22@

1 2

R10446 0_0201_5%U22@

-SRTCRST 20

-RTCRST 17,20

32.768kHz 9pF 20ppm 3215 TXC 9H03280012 KDS 1TJF090DJ1A000B EPSON X1A000141000200

A A

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Kolar-1

Rev Title

CPU(10/16) : CLOCK SIGNALS

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

12 97

5

1 2

D D

-PLTRST_NEAR38,63

-PLTRST_FAR31,41,45,46,48,55,64,65

2

C8 100P_0201_25V8-J

1

R70 33_0201_5%

1 2

R71 33_0201_5%

2

C9 100P_0201_25V8-J

1

VCC3M

4

5

Vcc

4

OUT

TC7SZ17FE_SON-5

3

U2

1

NC

2

IN A

GND

-PLTRST

3

2

1

C C

VCC3MVCC3M

U58K

1 2

R74 1K_0201_5%

-XDP_DBR17,19

-RSMRST19,65

BPWRG56,59,64,66

CPUCORE_PWRGD75

MPWRG65,66

-PCIE_WAKE31,45,46,65

-LANWAKE41 LANPHYPC41

B B

A A

CPUCORE_ON65,75

MPWRG

CPUCORE_ON

R73 4.7K_0201_5%

1

TP3

Test_Point_20MIL

VCC3_SUS VCC1R0_SUS

R81 10K_0201_5%

1 2

13

D

Q2

2

G

LSK3541G1ET2L_VMT3

S

-SUSWARN

R76 0_0201_5% R77 0_0201_5% R78 0_0201_5%

R79 0_0201_5%

2

G

CPU_PWRGD VCCST_PWRGD

1 2 1 2 1 2

1 2

13

D

Q3

S

R82 10K_0201_5%

R10504

1 2

0_0201_5%

LSK3541G1ET2L_VMT3

AN10

GPP_B13/PLTRST#

B5

SYS_RESET#

AY17

RSMRST#

A68

PROCPWRGD

B65

VCCST_PWRGD

B6

SYS_PWROK

BA20

PCH_PWROK

BB20

DSW_PWROK

AR13

GPP_A13/SUSWARN#/SUSPWRDNACK

AP11

GPP_A15/SUSACK#

BB15

WAKE#

AM15

GPD2/LAN_WAKE#

AW17

GPD11/LANPHYPC

AT15

GPD7/RSVD

Kaby lake-U_BGA1356

-TAMPER_SW_DTCT11

VCCST_PWRGD

SKL_ULT

SYSTEM POWER MANAGEMENT

11 OF 20

GPP_B12/SLP_S0#

GPD4/SLP_S3# GPD5/SLP_S4#

GPD10/SLP_S5#

SLP_SUS# SLP_LAN#

GPD9/SLP_WLAN#

GPD6/SLP_A#

GPD3/PWRBTN#

GPD1/ACPRESENT

GPD0/BATLOW#

GPP_A11/PME#

INTRUDER#

GPP_B11/EXT_PWR_GATE#

GPP_B2/VRALERT#

S3

1

4

2

3

SPVR310100_4P

VCC3_SUS

1 2

AT11 AP15 BA16 AY16

AN15 AW15 BB17 AN16

BA15 AY15 AU13

AU11 AP16

AM10 AM11

R80 0_0201_5%

@

R10487 10K_0201_5%

-INTRUDER

1 2

RTCVCC

@

C10

R72 1M_0201_5%

1 2

2

1

VCC3M

@

R75 10K_0201_5%

1 2

2

@

C671

1

1000P_0201_25V7-K

0.1U_0201_6.3V6-K

-PCH_SLP_S0 17,82

-PCH_SLP_S3 17,31,56,65,66

-PCH_SLP_S4 17,56,65,83

-PCH_SLP_S5 17,65

-PCH_SLP_SUS 56

-PCH_SLP_LAN 65

-PCH_SLP_WLAN 56

-PCH_SLP_M 17,65

-PWRSW_EC 56

AC_PRESENT 56

-BATLOW 31,57

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Kolar-1

Rev Title

CPU(11/16) : SYSTEM PM

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

13 97

5

4

3

2

1

D D

C C

B B

VCCCPUCORE

2

C9397

1

1U_0201_6.3V6-M

VCCCPUCORE

2

C9407

1

1U_0201_6.3V6-M

VCCCPUCORE

2

C9417

1

1U_0201_6.3V6-M

VCCCPUCORE

C9398

C9408

C9419

2

C9399

C9400

C9401

1

C9410

C9421

1

1U_0201_6.3V6-M

2

C9409

1

1U_0201_6.3V6-M

2

C9418

1

1U_0201_6.3V6-M

2

1

1U_0201_6.3V6-M

2

1

1U_0201_6.3V6-M

C9402

1

C9411

C9420

1

1U_0201_6.3V6-M

2

C9412

1

1U_0201_6.3V6-M

2

C9422

1

1U_0201_6.3V6-M

C9403

C9413

C9423

2

C9404

1

1U_0201_6.3V6-M

2

C9414

1

1U_0201_6.3V6-M

2

C9424

1

1U_0201_6.3V6-M

C9405

C9415

C9425

2

C9406

1

1U_0201_6.3V6-M

1 2

R83 0_0603_5%

VCCCPUCORE

AM32 AM33 AM35 AM37 AM38

AG62

AK33 AK35 AK37 AK38 AK40 AL33 AL37 AL40

AK32

AB62

AC63 AE63

AE62

AL63 AJ62

A30 A34 A39 A44

G30

K32

P62 V62

H63

G61

2

C9416

1

1U_0201_6.3V6-M

2

C9426

1

C9427

1

1U_0201_6.3V6-M

1

1U_0201_6.3V6-M

SKL_ULT

U58L

CPU POWER 1 OF 4

VCC_A30 VCC_A34 VCC_A39 VCC_A44 VCC_AK33 VCC_AK35 VCC_AK37 VCC_AK38 VCC_AK40 VCC_AL33 VCC_AL37 VCC_AL40 VCC_AM32 VCC_AM33 VCC_AM35 VCC_AM37 VCC_AM38 VCC_G30

RSVD_K32

RSVD_AK32

VCCOPC_AB62 VCCOPC_P62 VCCOPC_V62

VCC_OPC_1P8_H63

VCC_OPC_1P8_G61

VCCOPC_SENSE VSSOPC_SENSE

VCCEOPIO_AE62 VCCEOPIO_AG62

VCCEOPIO_SENSE VSSEOPIO_SENSE

Kaby lake-U_BGA1356

12 OF 20

VCC_G32 VCC_G33 VCC_G35 VCC_G37 VCC_G38 VCC_G40 VCC_G42

VCC_J30 VCC_J33 VCC_J37

VCC_J40 VCC_K33 VCC_K35 VCC_K37 VCC_K38 VCC_K40 VCC_K42 VCC_K43

VCC_SENSE VSS_SENSE

VIDALERT#

VIDSCK

VIDSOUT

VCCSTG_G20

G32 G33 G35 G37 G38 G40 G42 J30 J33 J37 J40 K33 K35 K37 K38 K40 K42 K43

E32 E33

B63 A63 D64

G20

VCCCPUCORE

VCCSTG_CPUVCCSTG

VCCSTG_CPU

VCCCPUCORE

R86 100_0201_5%

1 2

R87 220_0201_5%

R88 100_0201_5%

1 2

Near CPU

1 2

R84 56_0201_5%

VCCST

1 2

R85 100_0201_5%

VCC_SENSE

VSS_SENSE

-SVID_ALERT SVID_CLK

SVID_DATA

VCC_SENSE 75 VSS_SENSE 75

-SVID_ALERT 75 SVID_CLK 75 SVID_DATA 75

2

C9428

1

A A

2

C9430

C9431

C9429

1

10U_0402_6.3V6-M

1

10U_0402_6.3V6-M

5

C9433

2

1

10U_0402_6.3V6-M

C9432

2

C9434

1

10U_0402_6.3V6-M

Project Name

LC Future Center Secret Data

4

3

2

Project Name

Kolar-1

Rev Title

CPU(12/16) : CPU POWER (1/2)

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

14 97

5

VCCCPUCORE_GT

2

C9436

C9435

1

1U_0201_6.3V6-M

D D

2

C9437

1

1U_0201_6.3V6-M

2

C9438

C9439

1

1U_0201_6.3V6-M

4

1 2

R89 0_0603_5%

3

VCCST_CPU VCCSTG_CPU VCCST_CPU

2

1

C11 1U_0201_6.3V6-M

VCCPLL VDDQC VCCPLL_OC

2

1

C12 1U_0201_6.3V6-M

C13 1U_0201_6.3V6-M

2

VCC1R2A VCC1R2A

2

1

2

1

C15 10U_0402_6.3V6-M

C14 10U_0402_6.3V6-M

C16 10U_0402_6.3V6-M

1

C17 10U_0402_6.3V6-M

C18 10U_0402_6.3V6-M

2

C21

C22

1

22U_0603_6.3V6M

2

C23

C672

1

22U_0603_6.3V6M

1

VCC1R2A VCC1R2AVCCST_CPUVCCST

2

1

C24 10U_0402_6.3V6-M

2

1

C25 1U_0201_6.3V6-M

VCCGFXCORE_I

SKL_ULT

U58M

CPU POWER 2 OF 4

A48

VCCGT_A48

A53

VCCGT_A53

A58

VCCGT_A58

A62

VCCGT_A62

A66

VCCGT_A66

AA63

VCCGT_AA63

AA64

VCCGT_AA64

AA66

VCCGT_AA66

AA67

VCCGT_AA67

AA69

VCCGT_AA69

AA70

VCCGT_AA70

AA71

VCCGT_AA71

AC64

VCCGT_AC64

AC65

VCCGT_AC65

AC66

VCCGT_AC66

AC67

VCCGT_AC67

AC68

VCCGT_AC68

AC69

VCCGT_AC69

AC70

VCCGT_AC70

AC71

VCCGT_AC71

J43

VCCGT_J43

J45

VCCGT_J45

J46

VCCGT_J46

J48

VCCGT_J48

J50

VCCGT_J50

J52

VCCGT_J52

J53

VCCGT_J53

J55

VCCGT_J55

J56

VCCGT_J56

J58

VCCGT_J58

J60

VCCGT_J60

K48

VCCGT_K48

K50

VCCGT_K50

K52

VCCGT_K52

K53

VCCGT_K53

K55

VCCGT_K55

K56

VCCGT_K56

K58

VCCGT_K58

K60

VCCGT_K60

L62

VCCGT_L62

L63

VCCGT_L63

L64

VCCGT_L64

L65

VCCGT_L65

L66

VCCGT_L66

L67

VCCGT_L67

L68

VCCGT_L68

L69

VCCGT_L69

L70

VCCGT_L70

L71

VCCGT_L71

M62

VCCGT_M62

N63

VCCGT_N63

N64

VCCGT_N64

N66

VCCGT_N66

N67

VCCGT_N67

N69

VCCGT_N69

J70

VCCGT_SENSE

J69

VSSGT_SENSE

Kaby lake-U_BGA1356

2

C9447

C9448

C9449

1

1U_0201_6.3V6-M

C9450

1

1U_0201_6.3V6-M

2

C9451

C9452

1

1U_0201_6.3V6-M

VCCGT_N70 VCCGT_N71 VCCGT_R63 VCCGT_R64 VCCGT_R65 VCCGT_R66 VCCGT_R67 VCCGT_R68 VCCGT_R69 VCCGT_R70 VCCGT_R71 VCCGT_T62 VCCGT_U65 VCCGT_U68

VCCGT_U71 VCCGT_W63 VCCGT_W64 VCCGT_W65 VCCGT_W66 VCCGT_W67 VCCGT_W68 VCCGT_W69 VCCGT_W70 VCCGT_W71

VCCGT_Y62

VCCGTX_AK42 VCCGTX_AK43 VCCGTX_AK45 VCCGTX_AK46 VCCGTX_AK48 VCCGTX_AK50 VCCGTX_AK52 VCCGTX_AK53 VCCGTX_AK55 VCCGTX_AK56 VCCGTX_AK58 VCCGTX_AK60 VCCGTX_AK70 VCCGTX_AL43 VCCGTX_AL46 VCCGTX_AL50 VCCGTX_AL53 VCCGTX_AL56

VCCGTX_AL60 VCCGTX_AM48 VCCGTX_AM50 VCCGTX_AM52 VCCGTX_AM53 VCCGTX_AM56 VCCGTX_AM58 VCCGTX_AU58 VCCGTX_AU63

VCCGTX_BB57

VCCGTX_BB66

VCCGTX_SENSE

VSSGTX_SENSE

13 OF 20

2

C9453

1

1U_0201_6.3V6-M

C9445

1U_0201_6.3V6-M

VCCGFXCORE_I

R96 100_0201_5%

1 2

R97 100_0201_5%

1 2

Near CPU

2

C9446

1

1U_0201_6.3V6-M

VCCCPUCORE_GT

2

1

1U_0201_6.3V6-M

VCCCPUCORE

VCCGFXCORE_I

TABLE R90,R91 KOA:TLRZ2ATTD VISHAY:VSL080500000ZEA9

C C

VCCGT_SENSE75 VSSGT_SENSE75

B B

VCCGFXCORE_I

2

C9440

C9441

1

1U_0201_6.3V6-M

2

1

1U_0201_6.3V6-M

R90 0.0002_0805RU42@

R91 0.0002_0805U22@

VCCGFXCORE_I

VCCGT_SENSE VSSGT_SENSE

2

C9442

1

1U_0201_6.3V6-M

1 2

2

C9443

1

1 2

R701 0_0402_5%U22@

2

C9444

1

1U_0201_6.3V6-M

VCCGFXCORE_I

N70 N71 R63 R64 R65 R66 R67 R68 R69 R70 R71 T62 U65 U68 U71 W63 W64 W65 W66 W67 W68 W69 W70 W71 Y62

AK42 AK43 AK45 AK46 AK48 AK50 AK52 AK53 AK55 AK56 AK58 AK60 AK70 AL43 AL46 AL50 AL53 AL56 AL60 AM48 AM50 AM52 AM53 AM56 AM58 AU58 AU63 BB57 BB66

AK62 AL61

VCCCPUCORE

TP935

1

Test_Point_20MIL

TABLE

Logic Ref Des KBL-R U42 KBL U22

Page 12

Page 18

Page 15

VCC1R2A VCCCPUIO

SKL_ULT

U58N

CPU POWER 3 OF 4

AU23

VCCST_CPUVCCSTG_CPU

NO_ASM

Y1

NO_ASM

R67

NO_ASM

R66

NO_ASM

C4

NO_ASM

C5

R10445

NO_ASM

R10446

NO_ASM

ASM

Y3

ASM

R114

ASM

R110

ASM

C63

ASM

C64

R10466

ASM

R10467

ASM

R90

ASM

R91

NO_ASM

R701 NO_ASM ASM

VDDQ_AU23

AU28

VDDQ_AU28

AU35

VDDQ_AU35

AU42

VDDQ_AU42

BB23

VDDQ_BB23

BB32

VDDQ_BB32

BB41

VDDQ_BB41

BB47

VDDQ_BB47

BB51

VDDQ_BB51

AM40

VDDQC

A18

VCCST

A22

VCCSTG_A22

AL23

VCCPLL_OC

K20

VCCPLL_K20

K21

VCCPLL_K21

Kaby lake-U_BGA1356

ASM

NO_ASM

ASM

VCCIO_AK28 VCCIO_AK30 VCCIO_AL30

VCCIO_AL42 VCCIO_AM28 VCCIO_AM30 VCCIO_AM42

VCCSA_AK23 VCCSA_AK25

VCCSA_G23

VCCSA_G25

VCCSA_G27

VCCSA_G28

VCCSA_J22 VCCSA_J23 VCCSA_J27 VCCSA_K23 VCCSA_K25 VCCSA_K27 VCCSA_K28 VCCSA_K30

VCCIO_SENSE VSSIO_SENSE

VSSSA_SENSE

VCCSA_SENSE

14 OF 20

AK28 AK30 AL30 AL42 AM28 AM30 AM42

AK23 AK25 G23 G25 G27 G28 J22 J23 J27 K23 K25 K27 K28 K30

AM23 AM22

H21 H20

VCCSA

C9466

VCCSA

VCCCPUIO

R93

R92

100_0201_5%

1 2

R94

R95

100_0201_5%

1 2

2

C9467

1

1U_0201_6.3V6-M

2

C9468

C9469

C9470

1

1U_0201_6.3V6-M

Near CPU

2

C9471

1

1U_0201_6.3V6-M

VCCCPUIO

VSSSA_SENSE VCCSA_SENSE

2

C9472

1

1U_0201_6.3V6-M

2

C674

C675

1

1U_0201_6.3V6-M

2

1

1U_0201_6.3V6-M

C676

1

1U_0201_6.3V6-M

VSSSA_SENSE 75 VCCSA_SENSE 75

2

C673

1

1U_0201_6.3V6-M

2

VCCGFXCORE_I

2

C9454

C9455

C9456

C9457

A A

1

10U_0402_6.3V6-M

5

C9458

1

10U_0402_6.3V6-M

2

C9459

C9460

1

10U_0402_6.3V6-M

2

C9462

C9461

10U_0402_6.3V6-M

C9463

1

10U_0402_6.3V6-M

2

C9464

C9465

1

10U_0402_6.3V6-M

4

3

LOGIC

C9473

C9474

C9475

C9476

1

10U_0402_6.3V6-M

2

C9477

1

10U_0402_6.3V6-M

LC Future Center Secret Data

2

C9478

C9479

1

10U_0402_6.3V6-M

Project Name

Kolar-1

Rev Title

CPU(13/16) : CPU POWER (2/2)

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

15 97

5

4

3

2

1

VCC3M VCC3M_PCH

1 2

D D

VCCMPHY_GATE

R105

C C

1 2

0_0603_5%

VCC1R0_SUS

NEAR V15

B B

R100 0_0603_5%

VCC1R0_SUS VCC1R0_SUS_PRIM

1 2

R102 0_0603_5%

VCCMPHY_GATE VCCMPHY_GATE_OUT

1 2

R103 0_0603_5%

VCCMPHY_GATE_PLL

22U_0603_6.3V6M

1 2

FL1

@

1 2

NEAR V15

2

C37

1

@

22U_0603_6.3V6M

2

C44

1

2

C43

0.1U_0201_6.3V6-K

1

2

C36

1

@

R107 0_0603_5%

MMZ0603AFY560VT_2P

0.1U_0201_6.3V6-K

NEAR V15

2

1

R108

1 2

0_0603_5%

@

1 2

MMZ0603AFY560VT_2P

2

C47

1

0.1U_0201_6.3V6-K

C35 1U_0402_6.3V6-K

VCC3M_PCHVCC3_SUS

FL2

VCCMPHY_GATE_OUT

2

C48

1

0.1U_0201_6.3V6-K

VCCPCHCORE

VCC1R0_SUS

AB19 AB20

AF18 AF19

AB17

AD17 AD18

AF20 AF21

AK20

P18

V20 V21

AL1

K17

L1

N15 N16 N17 P15 P16

K15 L15

V15

Y18

AJ17

AJ19

AJ16

T19 T20

AJ21

N18

R99

1 2

0_0603_5%

SKL_ULT

U58O

CPU POWER 4 OF 4

VCCPRIM_1P0_AB19 VCCPRIM_1P0_AB20 VCCPRIM_1P0_P18

VCCPRIM_CORE_AF18 VCCPRIM_CORE_AF19 VCCPRIM_CORE_V20 VCCPRIM_CORE_V21

DCPDSW_1P0

VCCMPHYAON_1P0_K17 VCCMPHYAON_1P0_L1

VCCMPHYGT_1P0_N15 VCCMPHYGT_1P0_N16 VCCMPHYGT_1P0_N17 VCCMPHYGT_1P0_P15 VCCMPHYGT_1P0_P16

VCCAMPHYPLL_1P0_K15 VCCAMPHYPLL_1P0_L15

VCCAPLL_1P0

VCCPRIM_1P0_AB17 VCCPRIM_1P0_Y18

VCCDSW_3P3_AD17 VCCDSW_3P3_AD18 VCCDSW_3P3_AJ17

VCCHDA

VCCSPI

VCCSRAM_1P0_AF20 VCCSRAM_1P0_AF21 VCCSRAM_1P0_T19 VCCSRAM_1P0_T20

VCCPRIM_3P3_AJ21

VCCPRIM_1P0_AK20

VCCAPLLEBB

Kaby lake-U_BGA1356

VCCMPHY_GATEVCC1R0_SUS VCC3_SUS VCC1R8_SUS VCC1R0_SUS VCCPCHCORE

2

C28

1

22U_0603_6.3V6-M

VCC3_SUS

2

C32 1U_0402_6.3V6-K

1

RTCVCC

2

C40

1

0.1U_0201_6.3V6-K 1U_0402_6.3V6-K

15 OF 20

VCCPGPPA VCCPGPPB VCCPGPPC VCCPGPPD VCCPGPPE VCCPGPPF VCCPGPPG

VCCPRIM_3P3_V19

VCCPRIM_1P0_T1

VCCATS_1P8

VCCRTCPRIM_3P3

VCCRTC_AK19 VCCRTC_BB14

DCPRTC

VCCCLK1

VCCCLK2

VCCCLK3

VCCCLK4

VCCCLK5

VCCCLK6

GPP_B0/CORE_VID0 GPP_B1/CORE_VID1

AK15 AG15 Y16 Y15 T16 AF16 AD15

V19

T1

AA1

AK17

AK19 BB14

BB10

A14

K19

L21

N20

L19

A10

AN11 AN13

2

C26

1

C9393

22U_0603_6.3V6-M

VCC3_SUSVCC1R0_SUS_PRIM

VCC1R8_SUS

VCC1R0_SUS_PRIM

VCC1R0_SUS

C39

1 2

0.1U_0201_6.3V6-K

2

C27

1

22U_0603_6.3V6-M

2

C30

0.1U_0201_6.3V6-K

1

C9394

2

1

22U_0603_6.3V6-M

2

C31

1

C9395

2

1

22U_0603_6.3V6-M

2

C29

1

22U_0603_6.3V6-M

C33

@

C41

@

C45

@

2

1

C9396

22U_0603_6.3V6-M

VCC1R0_SUS_CLK2

2

1

22U_0603_6.3V6M

VCC1R0_SUS_CLK4

2

1

22U_0603_6.3V6M

VCC1R0_SUS_CLK5

2

1

22U_0603_6.3V6M

VCC1R0_SUS

R104

1 2

22U_0603_6.3V6M

0_0603_5%

R106

1 2

0_0603_5%

R109

1 2

0_0603_5%

VCC1R0_SUS

2

C34

1

@

2

C42

1

@

2

C46

1

@

NEAR AJ19 NEAR AJ19

VCC1R0_SUS

2

C50 1U_0402_6.3V6-K

1

NEAR K17 NEAR N15 NEAR N18 NEAR AA1

A A

5

VCCMPHY_GATE_OUT VCC1R8_SUSVCCMPHY_GATE_OUT

2

C53 1U_0402_6.3V6-K

1

4

2

1

C56 1U_0402_6.3V6-K

3

2

C61 1U_0402_6.3V6-K

1

Project Name

LC Future Center Secret Data

2

Project Name

Kolar-1

Rev Title

CPU(14/16) : PCH POWER

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

16 97

5

4

3

2

1

APS/PETS Interface

D D

-PCH_SLP_S013,82

-XDP_DBR13,19

-PWRSWITCH27,35,64,65

-RTCRST12,20

-PCH_SLP_M13,65

-PCH_SLP_S413,56,65,83

-PCH_SLP_S513,65

-PCH_SLP_S313,31,56,65,66

TP4

Test_Point_20MIL

TP5

Test_Point_20MIL

TP9

Test_Point_20MIL

TP10

Test_Point_20MIL

SKL_ULT

U58P

GND 1 OF 3

AA65 AA68 AB15 AB16 AB18 AB21

AD13 AD16 AD19 AD20 AD21 AD62

AE64 AE65 AE66 AE67 AE68 AE69

AF10 AF15 AF17

AF63 AG16 AG17 AG18 AG19 AG20 AG21 AG71 AH13

AH63 AH64 AH67

AK11 AK16 AK18 AK21 AK22 AK27 AK63 AK68 AK69

A5 A67 A70

AA2 AA4

AB8

AD8

AF1

AF2 AF4

AH6

AJ15 AJ18 AJ20

AJ4

AK8

AL2 AL28 AL32 AL35 AL38

AL4 AL45 AL48 AL52 AL55 AL58 AL64

VSS_A5 VSS_A67 VSS_A70 VSS_AA2 VSS_AA4 VSS_AA65 VSS_AA68 VSS_AB15 VSS_AB16 VSS_AB18 VSS_AB21 VSS_AB8 VSS_AD13 VSS_AD16 VSS_AD19 VSS_AD20 VSS_AD21 VSS_AD62 VSS_AD8 VSS_AE64 VSS_AE65 VSS_AE66 VSS_AE67 VSS_AE68 VSS_AE69 VSS_AF1 VSS_AF10 VSS_AF15 VSS_AF17 VSS_AF2 VSS_AF4 VSS_AF63 VSS_AG16 VSS_AG17 VSS_AG18 VSS_AG19 VSS_AG20 VSS_AG21 VSS_AG71 VSS_AH13 VSS_AH6 VSS_AH63 VSS_AH64 VSS_AH67 VSS_AJ15 VSS_AJ18 VSS_AJ20 VSS_AJ4 VSS_AK11 VSS_AK16 VSS_AK18 VSS_AK21 VSS_AK22 VSS_AK27 VSS_AK63 VSS_AK68 VSS_AK69 VSS_AK8 VSS_AL2 VSS_AL28 VSS_AL32 VSS_AL35 VSS_AL38 VSS_AL4 VSS_AL45 VSS_AL48 VSS_AL52 VSS_AL55 VSS_AL58 VSS_AL64

16 OF 20

Kaby lake-U_BGA1356

1

TP922Test_Point_16MIL

1

TP923Test_Point_16MIL

1

TP924Test_Point_16MIL

C C

B B

VSS_AL65

VSS_AL66 VSS_AM13 VSS_AM21 VSS_AM25 VSS_AM27 VSS_AM43 VSS_AM45 VSS_AM46 VSS_AM55 VSS_AM60 VSS_AM61 VSS_AM68 VSS_AM71

VSS_AM8 VSS_AN20 VSS_AN23 VSS_AN28 VSS_AN30 VSS_AN32 VSS_AN33 VSS_AN35 VSS_AN37 VSS_AN38 VSS_AN40 VSS_AN42 VSS_AN58 VSS_AN63

VSS_AP10 VSS_AP18 VSS_AP20 VSS_AP23 VSS_AP28 VSS_AP32 VSS_AP35 VSS_AP38 VSS_AP42 VSS_AP58 VSS_AP63 VSS_AP68

VSS_AP70 VSS_AR11 VSS_AR15 VSS_AR16 VSS_AR20 VSS_AR23 VSS_AR28 VSS_AR35 VSS_AR42 VSS_AR43 VSS_AR45 VSS_AR46 VSS_AR48

VSS_AR5 VSS_AR50 VSS_AR52 VSS_AR53 VSS_AR55 VSS_AR58 VSS_AR63

VSS_AR8

VSS_AT2

VSS_AT20 VSS_AT23 VSS_AT28 VSS_AT35

VSS_AT4

VSS_AT42 VSS_AT56 VSS_AT58

AL65 AL66 AM13 AM21 AM25 AM27 AM43 AM45 AM46 AM55 AM60 AM61 AM68 AM71 AM8 AN20 AN23 AN28 AN30 AN32 AN33 AN35 AN37 AN38 AN40 AN42 AN58 AN63 AP10 AP18 AP20 AP23 AP28 AP32 AP35 AP38 AP42 AP58 AP63 AP68 AP70 AR11 AR15 AR16 AR20 AR23 AR28 AR35 AR42 AR43 AR45 AR46 AR48 AR5 AR50 AR52 AR53 AR55 AR58 AR63 AR8 AT2 AT20 AT23 AT28 AT35 AT4 AT42 AT56 AT58

AT63 AT68 AT71 AU10 AU15 AU20 AU32 AU38

AW10 AW12 AW14 AW16 AW18 AW21 AW23 AW26 AW28 AW30 AW32 AW34 AW36 AW38 AW41 AW43 AW45 AW47 AW49 AW51 AW53 AW55 AW57

AW60 AW62 AW64 AW66

AV68 AV69 AV70 AV71

AW6

AW8 AY66

BA10 BA14 BA18

BA23 BA28 BA32 BA36

BA45

AV1

B10 B14 B18 B22 B30 B34 B39 B44 B48 B53 B58 B62 B66 B71

BA1

BA2

F68

1

TP925Test_Point_16MIL

1

TP926Test_Point_16MIL

1

TP927Test_Point_16MIL

1

TP928Test_Point_16MIL

1

TP929Test_Point_16MIL

U58Q

SKL_ULT

GND 2 OF 3

VSS_AT63 VSS_AT68 VSS_AT71 VSS_AU10 VSS_AU15 VSS_AU20 VSS_AU32 VSS_AU38 VSS_AV1 VSS_AV68 VSS_AV69 VSS_AV70 VSS_AV71 VSS_AW10 VSS_AW12 VSS_AW14 VSS_AW16 VSS_AW18 VSS_AW21 VSS_AW23 VSS_AW26 VSS_AW28 VSS_AW30 VSS_AW32 VSS_AW34 VSS_AW36 VSS_AW38 VSS_AW41 VSS_AW43 VSS_AW45 VSS_AW47 VSS_AW49 VSS_AW51 VSS_AW53 VSS_AW55 VSS_AW57 VSS_AW6 VSS_AW60 VSS_AW62 VSS_AW64 VSS_AW66 VSS_AW8 VSS_AY66 VSS_B10 VSS_B14 VSS_B18 VSS_B22 VSS_B30 VSS_B34 VSS_B39 VSS_B44 VSS_B48 VSS_B53 VSS_B58 VSS_B62 VSS_B66 VSS_B71 VSS_BA1 VSS_BA10 VSS_BA14 VSS_BA18 VSS_BA2 VSS_BA23 VSS_BA28 VSS_BA32 VSS_BA36 VSS_F68 VSS_BA45

17 OF 20

Kaby lake-U_BGA1356

VSS_BA49 VSS_BA53 VSS_BA57

VSS_BA6 VSS_BA62 VSS_BA66 VSS_BA71 VSS_BB18 VSS_BB26 VSS_BB30 VSS_BB34 VSS_BB38 VSS_BB43 VSS_BB55

VSS_BB6 VSS_BB60 VSS_BB64 VSS_BB67 VSS_BB70

VSS_C1

VSS_C25

VSS_C5 VSS_D10 VSS_D11 VSS_D14 VSS_D18 VSS_D22 VSS_D25 VSS_D26 VSS_D30 VSS_D34 VSS_D39 VSS_D44 VSS_D45 VSS_D47 VSS_D48 VSS_D53 VSS_D58

VSS_D6 VSS_D62 VSS_D66 VSS_D69 VSS_E11 VSS_E15 VSS_E18 VSS_E21 VSS_E46 VSS_E50 VSS_E53 VSS_E56

VSS_E6 VSS_E65 VSS_E71

VSS_F1 VSS_F13

VSS_F2 VSS_F22 VSS_F23 VSS_F27 VSS_F28 VSS_F32 VSS_F33 VSS_F35 VSS_F37 VSS_F38

VSS_F4 VSS_F40 VSS_F42

VSS_BA41

BA49 BA53 BA57 BA6 BA62 BA66 BA71 BB18 BB26 BB30 BB34 BB38 BB43 BB55 BB6 BB60 BB64 BB67 BB70 C1 C25 C5 D10 D11 D14 D18 D22 D25 D26 D30 D34 D39 D44 D45 D47 D48 D53 D58 D6 D62 D66 D69 E11 E15 E18 E21 E46 E50 E53 E56 E6 E65 E71 F1 F13 F2 F22 F23 F27 F28 F32 F33 F35 F37 F38 F4 F40 F42 BA41

1

TP930 Test_Point_16MIL

1

TP931 Test_Point_16MIL

1

TP932 Test_Point_16MIL

1

TP933 Test_Point_16MIL

1

TP934 Test_Point_16MIL

G10 G22 G43 G45 G48

G52 G55 G58

G60 G63 G66 H15 H18 H71

J11 J13 J25 J28 J32 J35 J38 J42

K16 K18 K22 K61 K63 K64 K65 K66 K67 K68 K70 K71

L11 L16 L17

SKL_ULT

F8

VSS_F8 VSS_G10 VSS_G22 VSS_G43 VSS_G45 VSS_G48

G5

VSS_G5 VSS_G52 VSS_G55 VSS_G58

G6

VSS_G6 VSS_G60 VSS_G63 VSS_G66 VSS_H15 VSS_H18 VSS_H71 VSS_J11 VSS_J13 VSS_J25 VSS_J28 VSS_J32 VSS_J35 VSS_J38 VSS_J42

J8

VSS_J8 VSS_K16 VSS_K18 VSS_K22 VSS_K61 VSS_K63 VSS_K64 VSS_K65 VSS_K66 VSS_K67 VSS_K68 VSS_K70 VSS_K71 VSS_L11 VSS_L16 VSS_L17

Kaby lake-U_BGA1356

Place bottom side

U58R

GND 3 OF 3

VSS_L18

VSS_L20

VSS_N10 VSS_N13 VSS_N19 VSS_N21

VSS_N6 VSS_N65 VSS_N68 VSS_P17 VSS_P19 VSS_P20 VSS_P21 VSS_R13

VSS_R6 VSS_T15 VSS_T17 VSS_T18

VSS_T2 VSS_T21

VSS_T4 VSS_U10 VSS_U63 VSS_U64 VSS_U66 VSS_U67 VSS_U69 VSS_U70 VSS_V16 VSS_V17 VSS_V18

VSS_W13

VSS_W6 VSS_W9 VSS_Y17 VSS_Y19 VSS_Y20 VSS_Y21

18 OF 20

VSS_L2

VSS_L4 VSS_L8

L18 L2 L20 L4 L8 N10 N13 N19 N21 N6 N65 N68 P17 P19 P20 P21 R13 R6 T15 T17 T18 T2 T21 T4 U10 U63 U64 U66 U67 U69 U70 V16 V17 V18 W13 W6 W9 Y17 Y19 Y20 Y21

VCC3_SUS VCC3M

1

JAPS

18

NC1

17

NC2

16

NC3

15

SLP_S0#

14

GND1

13

SYS_RESET#

12

GND2

11

PWRBTN#

10

GND3

9

RTCRST#

8

GND4

7

+V3.3DS

6

SLP_A#

5

SLP_S4#

4

SLP_S5#

3

VccDSW3_3

2

SLP_S3#

1

VccSus3_3

FCI_10051922-1810ELF

CONN@

PEG2 PEG1

20 19

A A

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Kolar-1

Rev Title

CPU(15/16) : GND

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

17 97

5

4

3

2

1

TABLE

CFG0 : Stall Reset Sequence after PCU PLL Lock until de-asserted 1 : No Stall 0 : Stall

D D

CFG319

C C

ITP_PMODE19

B B

CFG3 : MSR Privacy Bit Feature 1 : MSR (C80h) bit[0] setting 0 : MSR (C80h) bit[0] overridden

CFG4 : eDP Enable 1 : Disabled 0 : Enabled

CFG9 : SVID Bus Communication 1 : Enabled 0 : Disabled

1 2

R112 1K_0201_5%

@

1 2

R113 1K_0201_5%

1 2

R115 49.9_0201_1%

@

1 2

R111 1K_0201_5%

CFG_RCOMP

BA70 BA68

E68 B67 D65 D67 E70 C68 D68 C67 F71 G69 F70 G68 H70 G71 H69 G70

E63 F63

E66 F66

E60

E8

AY2 AY1

D1 D3

K46 K45

AL25 AL27

C71 B70

F60

A52

J71 J68

F65

G65

F61 E61

U58S

RESERVED SIGNALS-1

CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15]

CFG[16] CFG[17]

CFG[18] CFG[19]

CFG_RCOMP

ITP_PMODE

RSVD_AY2 RSVD_AY1

RSVD_D1 RSVD_D3

RSVD_K46 RSVD_K45

RSVD_AL25 RSVD_AL27

RSVD_C71 RSVD_B70

RSVD_F60

RSVD_A52

RSVD_TP_BA70 RSVD_TP_BA68

RSVD_J71 RSVD_J68

VSS_F65 VSS_G65

RSVD_F61 RSVD_E61

Kaby lake-U_BGA1356

SKL_ULT

19 OF 20

RSVD_TP_BB68 RSVD_TP_BB69

RSVD_TP_AK13 RSVD_TP_AK12

RSVD_BB2 RSVD_BA3

RSVD_D5 RSVD_D4

RSVD_B2

RSVD_C2

RSVD_B3 RSVD_A3

RSVD_AW1

RSVD_E1 RSVD_E2

RSVD_BA4 RSVD_BB4

RSVD_A4

RSVD_C4

RSVD_A69 RSVD_B69

RSVD_AY3

RSVD_D71 RSVD_C70

RSVD_C54 RSVD_D54

VSS_AY71

ZVM#

RSVD_TP_AW71 RSVD_TP_AW70

MSM#

PROC_SELECT#

BB68 BB69

AK13 AK12

BB2 BA3

AU5

TP5

AT5

TP6

D5 D4 B2 C2

B3 A3

AW1

E1 E2

BA4 BB4

A4 C4

BB5

TP4

A69 B69

AY3

D71 C70

C54 D54

AY4

TP1

BB3

TP2

AY71 AR56

AW71 AW70

AP56 C64

1 2

R116 0_0201_5%

1 2

R117 0_0201_5%

XTAL24_OUT_RU42

XTAL24_IN_RU42

FLJ9

EMC_NS@

1 2

DLP0NSC280HL2L_4P

1 2

R118 100K_0201_5%

34

VCCST

XTAL24_OUT_RU42_R

XTAL24_IN_RU42_R

SKL_ULT

U58T

AW69 AW68

AU56

XTAL24_OUT_RU42

RU42@

R10466 0_0201_5%

1 2

XTAL24_OUT_RU42_R XTAL24_IN_RU42_R

2

C63

RU42@

8P_0201_25V8-D

1

AW48

C7 U12 U11 H11

For Y3 A layout is refering to the Intel's white paper(#564413).

SPARE

RSVD_AW69 RSVD_AW68 RSVD_AU56 RSVD_AW48 RSVD_C7 RSVD_U12 RSVD_U11 RSVD_H11

Kaby lake-U_BGA1356

R110 1M_0201_5%RU42@

24MHZ_10PF_1ZZHAE24000CC0G

1

24MHz 8pF 30ppm 2016 KDS 1ZZHAE24000CC0G TXC 7R24080003 Epson Q22FA1280055800

20 OF 20

1 2

1

GND1

2

RSVD_F6

RSVD_E3 RSVD_C11 RSVD_B11 RSVD_A11 RSVD_D12 RSVD_C12 RSVD_F52

Y3

RU42@

3

GND2

4

F6

XTAL24_IN_RU42

E3 C11 B11 A11 D12 C12 F52

3

RU42@

R10467 0_0201_5%

1 2

2

C64 8P_0201_25V8-D

1

RU42@

A A

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Kolar-1

Rev Title

CPU(16/16) : CFG/RESERVED

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

18 97

5

D D

@

1 2

@

1 2

R705 51_0201_5%

R704 51_0201_5%

@

1 2

R706 51_0201_5%

XDP_TCK06

PCH_TCK6

XDP_TMS6 XDP_TDI6

-XDP_TRST6

C C

XDP_TDO6

-XDP_DBR13,17

ITP_PMODE18

-RSMRST13,65

CFG318

XDP_TCK0

PCH_TCK XDP_TCK1 XDP_TMS XDP_TDI

-XDP_TRST XDP_TDO

-XDP_DBR ITP_PMODE

-RSMRST

@

2

C677

1

0.1U_0201_6.3V6-K

@

1 2

R703 51_0201_5%

@

1 2

R119 1.5K_0201_1%

4

1 2

R702 0_0201_5%@

-XDP_PRDY10

-XDP_PREQ10

@

1 2

R10485 1K_0201_5%

R122 1K_0201_5%@

-XDP_PRDY

-XDP_PREQ

VCC3B VCCSTG VC C1R0_SUSVCC1R0_SUSVCCSTGVCCSTG VCC3_SUS

1 2

R120 1K_0201_5%

1 2

R121 51_0201_5%

2

@

C65

0.1U_0201_6.3V6-K

1

26 25

23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

3

MOLEX_52435-2671

26 25 2424GND1 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2

1

JXDP

CONN@

GND2

2

28 27

TABLE

Logic

Page 7

Page 19

Ref Des

R33

R111Page 18

J8

C65

R121

R120

R119

R122

R702

Merged

ASM

1

DCI 2.0

NO_ASM

ASM

NO_ASM

LOGIC

B B

A A

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Kolar-1

Rev Title

4.02

Date: Sheet of

Kolar-1

XDP CONNECTOR

Wednesday, November 01, 2017

1

19 97

5

D D

C C

4

D3

RB520CM-30T2R_VMN2M2

R125 1K_0201_5%

1 2

JRTC

1

2

3

GND1

4

GND2

TE_2041180-2

CONN@

3

VCC3SW

D1

1 2

D2

1 2

12

RTCVCC

RB520CM-30T2R_VMN2M2

2

@

C66 1U_0402_6.3V6-K

1

RB520CM-30T2R_VMN2M2

R126

1 2

20K_0201_5%

2

1

C67 1U_0402_6.3V6-K

-RTCRST

JCMOS1 SHORT PADS

@

1 2

2

-RTCRST 12,17

1

R127

1 2

20K_0201_5%

B B

A A

5

4

3

2

1

C68 1U_0402_6.3V6-K

-SRTCRST

JME1 SHORT PADS

@

1 2

-SRTCRST 12

2

LC Future Center Secret Data

Project Name

Date: Sheet of

Kolar-1

Rev Title

RTC BATTERY

4.02

Wednesday, November 01, 2017

1

20 97

5

D D

C C

-SPI_CS07

SPI_CLK7,63

SPI_MOSI_IO07,63

SPI_MISO_IO17,63

4

2

1

C69 0.1U_0201_6.3V6-K

-SPI_CS0 -SPI_CS0_R

SPI_CLK

SPI_MOSI_IO0

SPI_MISO_IO1

1 2

R131 0_0201_5%

1 2

R132 33_0201_5%EMC@

1 2

R135 33_0201_5%

1 2

R136 33_0201_5%

SPI_CLK_0_R

SPI_MOSI_IO0_0_R

SPI_MISO_IO1_0_R

3

VCC3_SUS

D4 RB520CM-30T2R_VMN2M2

1 2

8

VCC

7

/HOLD/RESET(IO3)

6

CLK

5

DI(IO0)

VCC3_SUS_SPI

W25Q128JVSIQ

DO(IO1)

/WP(IO2)

GND

2

16MB SOIC8 WINBOND W25Q128JVSIQ MACRONIX MX25L12873FM2I-10G

2

C70

U49

1

/CS

2

SPI_IO2_0_R

3

SPI_IO3_0_R

4

0.1U_0201_6.3V6-K

1

1 2

R133 33_0201_5%

1 2

R134 33_0201_5%

SPI_IO2 SPI_IO3

SPI_IO2 7 SPI_IO3 7

1

TABLE

SF100 PIN HEADER INTERFACE (TOP VIEW)

2

GND R132.2 R135.2 N/A

GND CLK MOSI (RESET)

4 6 8

Project Name

LC Future Center Secret Data

2

Project Name

Kolar-1

Rev Title

SPI FLASH

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

21 97

D4.1

VCC

1

R131.2

CS#

3

R136.2

MISO

5

N/A

(KEY)

7

B B

A A

5

4

3

5

4

3

VCC2R5A M_A_VREF_CA

2

1

M_A_DQ[63:0]4

-M_A_DQS[7:0]4

M_A_DQS[7:0]4

D D

C C

B B

M_A_A[16:0]4,23

VCC1R2A

M_A_DQ15 M_A_DQ14 M_A_DQ13 M_A_DQ12 M_A_DQ11 M_A_DQ10 M_A_DQ9 M_A_DQ8

M_A_DQS1

-M_A_DQS1

M_A_DQ7 M_A_DQ6 M_A_DQ5 M_A_DQ4 M_A_DQ3 M_A_DQ2 M_A_DQ1 M_A_DQ0

M_A_DQS0

-M_A_DQS0

M_A_DDRCLK0_1200M

-M_A_DDRCLK0_1200M

M_A_CKE04,23

-M_A_CS04,23

M_A_ODT04,23

-M_A_ACT4,23

M_A_BG04,23

M_A_BS14,23 M_A_BS04,23

M_A_CKE0

-M_A_CS0

M_A_ODT0

-M_A_ACT

M_A_BG1_R M_A_BG1_R M_A_BG1_R M_A_BG1_R M_A_BG0

M_A_BS1 M_A_BS0

M_A_A16 M_A _A16 M_A_A15 M_A_A14

M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0

D7 D3 C8 C2 C7 C3 B8 A3

B7 A7

E2

J7

J3 H8 H2 H7 H3

F7

G2

G3

F3

E7

K7 K8

K2

L7

K3

L3

M9 M2

N8 N2

L8

M8

L2

T8

M7

T2 M3 R7 R2 R8 P2 P8 N3 N7 R3 P7 P3

K4A8G165WB-BCPB_FBGA96

R137 0_0201_5%

X76@

1 2

DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0

DQSU_T DQSU_C

DMU_n/DBIU_n

DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0

DQSL_t DQSL_c

DML_n/DBIL_n

CK_t CK_c

CKE

CS_n

ODT

ACT_n

VSS_M9 BG0

BA1 BA0

RAS_n CAS_n WE_n/A14

A13 A12/BC_n A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

2

C71

0.1U_0201_6.3V6-K

1

C9685

2

RF@

U125

VREFCA

VDD_B3 VDD_B9 VDD_D1 VDD_G7

VDD_R1

VDDQ_A1 VDDQ_A9 VDDQ_C1 VDDQ_D9 VDDQ_F2 VDDQ_F8 VDDQ_G1 VDDQ_G9 VDDQ_J2 VDDQ_J8

VSSQ_A2 VSSQ_A8 VSSQ_C9 VSSQ_D2 VSSQ_D8 VSSQ_E3 VSSQ_E8 VSSQ_F1 VSSQ_H1 VSSQ_H9

VSS_G8

RESET_n

ALERT_n

X76@

47P_0201_25V8-G

VPP_B1 VPP_R9

VDD_J1 VDD_J9 VDD_L1 VDD_L9

VDD_T9

VSS_B2 VSS_E1

VSS_K1 VSS_K9 VSS_N1 VSS_T1

VSS_E9

C9686

RF@

NC

PAR

ZQ

TEN

2

C72

0.1U_0201_6.3V6-K

1

VCC2R5A

1

2

M_A_VREF_CA

100P_0201_25V8-J

B1 R9

M1

B3 B9 D1 G7 J1 J9 L1 L9 R1 T9

A1 A9 C1 D9 F2 F8 G1 G9 J2 J8

A2 A8 C9 D2 D8 E3 E8 F1 H1 H9

B2 E1 G8 K1 K9 N1 T1

T7

P1

T3

P9

E9

F9

N9

-DRAMRST

M_A_PARITY

-M_A_ALERT

R138

1 2

2

C73

0.1U_0201_6.3V6-K

1

VCC1R2A

R139

243_0201_1%

C9693

RF_NS@

1 2

0_0201_5%

C74

0.1U_0201_6.3V6-K

100P_0201_25V8-J

2

1

M_A_DQ31 M_A_DQ30 M_A_DQ29 M_A_DQ28 M_A_DQ27 M_A_DQ26 M_A_DQ25 M_A_DQ24

M_A_DQS3

-M_A_DQS3

M_A_DQ23 M_A_DQ22 M_A_DQ21 M_A_DQ20 M_A_DQ19 M_A_DQ18 M_A_DQ17 M_A_DQ16

M_A_DQS2

-M_A_DQS2

M_A_DDRCLK0_1200M

-M_A_DDRCLK0_1200M

M_A_CKE0

-M_A_CS0

M_A_ODT0

-M_A_ACT

M_A_BG0

M_A_BS1 M_A_BS0

M_A_A15 M_A_A14

M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0

2

C75

0.1U_0201_6.3V6-K

1

VCC1R2A VCC1R2A VCC1R2A

R140 0_0201_5%

1 2

C76

0.1U_0201_6.3V6-K

U126

D7

DQU7

D3

DQU6

C8

DQU5

C2

DQU4

C7

DQU3

C3

DQU2

B8

DQU1

A3

DQU0

B7

DQSU_T

A7

DQSU_C

E2

DMU_n/DBIU_n

J7

DQL7

J3

DQL6

H8

DQL5

H2

DQL4

H7

DQL3

H3

DQL2

F7

DQL1

G2

DQL0

G3

DQSL_t

F3

DQSL_c

E7

DML_n/DBIL_n

K7

CK_t

K8

CK_c

K2

CKE

L7

CS_n

K3

ODT

L3

ACT_n

M9

VSS_M9

M2

BG0

N8

BA1

N2

BA0

L8

RAS_n

M8

CAS_n

L2

WE_n/A14

T8

A13

M7

A12/BC_n

T2

A11

M3

A10/AP

R7

A9

R2

A8

R8

A7

P2

A6

P8

A5

N3

A4

N7

A3

R3

A2

P7

A1

P3

A0

K4A8G165WB-BCPB_FBGA96

X76@

2

C77

0.1U_0201_6.3V6-K

1

C9687

2

RF@

47P_0201_25V8-G

VPP_B1 VPP_R9

VREFCA

VDD_B3 VDD_B9 VDD_D1 VDD_G7

VDD_J1 VDD_J9 VDD_L1

VDD_L9 VDD_R1 VDD_T9

VDDQ_A1 VDDQ_A9 VDDQ_C1 VDDQ_D9 VDDQ_F2 VDDQ_F8 VDDQ_G1 VDDQ_G9 VDDQ_J2 VDDQ_J8

VSSQ_A2 VSSQ_A8 VSSQ_C9 VSSQ_D2 VSSQ_D8 VSSQ_E3 VSSQ_E8 VSSQ_F1 VSSQ_H1 VSSQ_H9

VSS_B2

VSS_E1 VSS_G8

VSS_K1

VSS_K9

VSS_N1

VSS_T1

RESET_n

ALERT_n

VSS_E9

X76@

PAR

TEN

NC

ZQ

2

1

VCC2R5A

1

C9688

2

RF@

100P_0201_25V8-J

B1 R9

M1

B3 B9 D1 G7 J1 J9 L1 L9 R1 T9

A1 A9 C1 D9 F2 F8 G1 G9 J2 J8

A2 A8 C9 D2 D8 E3 E8 F1 H1 H9

B2 E1 G8 K1 K9 N1 T1

T7

P1

T3

P9

E9

F9

N9

2

C78

0.1U_0201_6.3V6-K

1

M_A_VREF_CA

VCC1R2A

-DRAMRST -DRAMRST

M_A_PARITY

-M_A_ALERT

R141

1 2

243_0201_1%

C79 10U_0402_6.3V6-M

1

C9695

C9697

2

47P_0201_25V8-G

RF_NS@

R142 0_0201_5%

X76@

1 2

2

C80 10U_0402_6.3V6-M

1

2

100P_0201_25V8-J

M_A_DQ47 M_A_DQ46 M_A_DQ45 M_A_DQ44 M_A_DQ43 M_A_DQ42 M_A_DQ41 M_A_DQ40

M_A_DQS5

-M_A_DQS5

M_A_DQ39 M_A_DQ38 M_A_DQ37 M_A_DQ36 M_A_DQ35 M_A_DQ34 M_A_DQ33 M_A_DQ32

M_A_DQS4

-M_A_DQS4

M_A_DDRCLK0_1200M

-M_A_DDRCLK0_1200M

M_A_CKE0

-M_A_CS0

M_A_ODT0

-M_A_ACT

M_A_BG0

M_A_BS1 M_A_BS0

M_A_A16 M_A_A15 M_A_A14

M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0

C81

R143 0_0201_5%

X76@

1 2

2

1

2

C82

1

.047U_0201_6.3V6-K

C9689

RF@

U127

D7

DQU7

D3

DQU6

C8

DQU5

C2

DQU4

C7

DQU3

C3

DQU2

B8

DQU1

A3

DQU0

B7

DQSU_T

A7

DQSU_C

E2

DMU_n/DBIU_n

J7

DQL7

J3

DQL6

H8

DQL5

H2

DQL4

H7

DQL3

H3

DQL2

F7

DQL1

G2

DQL0

G3

DQSL_t

F3

DQSL_c

E7

DML_n/DBIL_n

K7

CK_t

K8

CK_c

K2

CKE

L7

CS_n

K3

ODT

L3

ACT_n

M9

VSS_M9

M2

BG0

N8

BA1

N2

BA0

L8

RAS_n

M8

CAS_n

L2

WE_n/A14

T8

A13

M7

A12/BC_n

T2

A11

M3

A10/AP

R7

A9

R2

A8

R8

A7

P2

A6

P8

A5

N3

A4

N7

A3

R3

A2

P7

A1

P3

A0

K4A8G165WB-BCPB_FBGA96

X76@

.047U_0201_6.3V6-K

1

2

VREFCA

VDD_G7

VDDQ_A1 VDDQ_A9 VDDQ_C1 VDDQ_D9 VDDQ_F2 VDDQ_F8 VDDQ_G1 VDDQ_G9 VDDQ_J2 VDDQ_J8

VSSQ_A2 VSSQ_A8 VSSQ_C9 VSSQ_D2 VSSQ_D8 VSSQ_E3 VSSQ_E8 VSSQ_F1 VSSQ_H1 VSSQ_H9

RESET_n

ALERT_n

47P_0201_25V8-G

VPP_B1 VPP_R9

VDD_B3 VDD_B9 VDD_D1

VDD_J1 VDD_J9 VDD_L1 VDD_L9 VDD_R1 VDD_T9

VSS_B2 VSS_E1 VSS_G8 VSS_K1 VSS_K9 VSS_N1 VSS_T1

VSS_E9

.047U_0201_6.3V6-K

M_A_VREF_CA

M_A_PARITY

-M_A_ALERT

R144

1 2

C84

VCC1R2A

243_0201_1%

2

1

C9696

RF_NS@

1 2

.047U_0201_6.3V6-K

1

2

47P_0201_25V8-G

R145 0_0201_5%

X76@

1

C9698

2

100P_0201_25V8-J

RF_NS@

2

C83

1

VCC2R5A

1

C9690

2

RF@

100P_0201_25V8-J

B1 R9

M1

B3 B9 D1 G7 J1 J9 L1 L9 R1 T9

A1 A9 C1 D9 F2 F8 G1 G9 J2 J8

A2 A8 C9 D2 D8 E3 E8 F1 H1 H9

B2 E1 G8 K1 K9 N1 T1

T7

NC

P1

T3

PAR

P9

E9

F9

ZQ

N9

TEN

M_A_DQ63 M_A_DQ62 M_A_DQ61 M_A_DQ60 M_A_DQ59 M_A_DQ58 M_A_DQ57 M_A_DQ56

M_A_DQS7

-M_A_DQS7

M_A_DQ55 M_A_DQ54 M_A_DQ53 M_A_DQ52 M_A_DQ51 M_A_DQ50 M_A_DQ49 M_A_DQ48

M_A_DQS6

-M_A_DQS6

M_A_DDRCLK0_1200M

-M_A_DDRCLK0_1200M

M_A_CKE0

-M_A_CS0

M_A_ODT0

-M_A_ACT

M_A_BG0

M_A_BS1 M_A_BS0

M_A_A16 M_A_A15 M_A_A14

M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0

D7 D3 C8 C2 C7 C3 B8 A3

B7 A7

E2

J7

J3 H8 H2 H7 H3 F7 G2

G3 F3

E7

K7 K8

K2

L7

K3

L3

M9 M2

N8 N2

L8 M8 L2

T8 M7 T2 M3 R7 R2 R8 P2 P8 N3 N7 R3 P7 P3

K4A8G165WB-BCPB_FBGA96

R146 0_0201_5%

X76@

1 2

U128

DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0

DQSU_T DQSU_C

DMU_n/DBIU_n

DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0

DQSL_t DQSL_c

DML_n/DBIL_n

CK_t CK_c

CKE

CS_n

ODT

ACT_n

VSS_M9 BG0

BA1 BA0

RAS_n CAS_n WE_n/A14

A13 A12/BC_n A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

X76@

C9691

RF@

1

2

47P_0201_25V8-G

VPP_B1 VPP_R9

VREFCA

VDD_B3 VDD_B9 VDD_D1 VDD_G7 VDD_J1 VDD_J9 VDD_L1 VDD_L9 VDD_R1 VDD_T9

VDDQ_A1 VDDQ_A9 VDDQ_C1 VDDQ_D9 VDDQ_F2 VDDQ_F8 VDDQ_G1 VDDQ_G9 VDDQ_J2 VDDQ_J8

VSSQ_A2 VSSQ_A8 VSSQ_C9 VSSQ_D2 VSSQ_D8 VSSQ_E3 VSSQ_E8 VSSQ_F1 VSSQ_H1 VSSQ_H9

VSS_B2 VSS_E1 VSS_G8 VSS_K1 VSS_K9 VSS_N1 VSS_T1

RESET_n

ALERT_n

VSS_E9

VCC2R5A

1

C9692

2

M_A_VREF_CA

RF@

100P_0201_25V8-J

VCC1R2A

B1 R9

M1

B3 B9 D1 G7 J1 J9 L1 L9 R1 T9

A1 A9 C1 D9 F2 F8 G1 G9 J2 J8

A2 A8 C9 D2 D8 E3 E8 F1 H1 H9

B2 E1 G8 K1 K9 N1 T1

T7

NC

P1

-DRAMRST

M_A_PARITY

T3

PAR

ZQ

TEN

-M_A_ALERT

P9

E9

F9

N9

R147

1 2

243_0201_1%

C9699

RF_NS@

1 2

1

2

47P_0201_25V8-G

R148 0_0201_5%

X76@

1

C9700

2

100P_0201_25V8-J

RF_NS@

2

1

C9694

2

47P_0201_25V8-G

RF_NS@

X76@

M_A_DDRCLK0_1200M4,23

-M_A_DDRCLK0_1200M4,23

M_A_BG14

A A

-DRAMRST5,24

M_A_PARITY4,23

-M_A_ALERT4,23

M_A_DDRCLK0_1200M

-M_A_DDRCLK0_1200M

M_A_BG1 M_A_BG1_R

-DRAMRST

M_A_PARITY

-M_A_ALERT

2

@

C678 3300P_0201_25V7-K

1

R149 0_0201_5%X76@

1 2

5

M_A_BG1_R 23

R137

R140

R143

R146

R149

R167 NA ASM

R139

R142

R145

R148

DRAM Configuration: X76@

4

SDP DDP

ASM

NA

0_5%

NA

ASM

243_1%

3

Project Name

LC Future Center Secret Data

2

Project Name

Kolar-1

Rev Title

DDR4 BASE MEMORY CH-A (1/2)

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

22 97

TABLE:

5

M_A_A[16:0]4,22

D D

M_A_BG1_R22

M_A_BG04,22

M_A_BS14,22

M_A_BS04,22

-M_A_ACT4,22

C C

M_A_PARITY4,22

-M_A_CS04,22

M_A_ODT04,22

M_A_CKE04,22

M_A_DDRCLK0_1200M4,22

-M_A_DDRCLK0_1200M4,22

-M_A_ALERT4,22

M_A_BG1_R

M_A_BG0

M_A_BS1

M_A_BS0

-M_A_ACT

M_A_PARITY

-M_A_CS0

M_A_ODT0

M_A_CKE0

M_A_DDRCLK0_1200M

-M_A_DDRCLK0_1200M

-M_A_ALERT

M_A_A16

M_A_A15

M_A_A14

M_A_A13

M_A_A12

M_A_A11

M_A_A10

M_A_A9

M_A_A8

M_A_A7

M_A_A6

M_A_A5

M_A_A4

M_A_A3

M_A_A2

M_A_A1

M_A_A0

4

1 2

R150 36_0201_1%

1 2

R151 36_0201_1%

1 2

R152 36_0201_1%

1 2

R153 36_0201_1%

1 2

R154 36_0201_1%

1 2

R155 36_0201_1%

1 2

R156 36_0201_1%

1 2

R157 36_0201_1%

1 2

R158 36_0201_1%

1 2

R159 36_0201_1%

1 2

R160 36_0201_1%

1 2

R161 36_0201_1%

1 2

R162 36_0201_1%

1 2

R163 36_0201_1%

1 2

R164 36_0201_1%

1 2

R165 36_0201_1%

1 2

R166 36_0201_1%

1 2

R167 36_0201_1%X76@

1 2

R168 36_0201_1%

1 2

R169 36_0201_1%

1 2

R170 36_0201_1%

1 2

R171 36_0201_1%

1 2

R172 36_0201_1%

1 2

R173 36_0201_1%

1 2

R174 36_0201_1%

1 2

R175 36_0201_1%

1 2

R176 36_0201_1%

1 2

R177 36_0201_1%

1 2

R178 49.9_0201_1%

VCC0R6B

VCC1R2A

3

VCC1R2A

2

1

VCC1R2A

2

1

VCC1R2A

2

1

EMC@

C86 1U_0402_6.3V6-K

EMC@

C94 1U_0402_6.3V6-K

C102 10U_0402_6.3V6-M

2

1

2

1

2

C103 10U_0402_6.3V6-M

1

C87 1U_0402_6.3V6-K

C95 1U_0402_6.3V6-K

2

1

2

1

2

C104 10U_0402_6.3V6-M

1

C88 1U_0402_6.3V6-K

C96 1U_0402_6.3V6-K

2

C89 1U_0402_6.3V6-K

1

2

C97 1U_0402_6.3V6-K

1

2

C105 10U_0402_6.3V6-M

1

2

C90 1U_0402_6.3V6-K

1

2

C98 1U_0402_6.3V6-K

1

2

C106 10U_0402_6.3V6-M

1

2

C91 1U_0402_6.3V6-K

1

2

C99 1U_0402_6.3V6-K

1

2

C9482 10U_0402_6.3V6-M

1

2

C92 1U_0402_6.3V6-K

1

2

C100 1U_0402_6.3V6-K

1

2

C9480 10U_0402_6.3V6-M

1

2

C93 1U_0402_6.3V6-K

1

2

C101 1U_0402_6.3V6-K

1

2

C9481 10U_0402_6.3V6-M

1

B B

VCC0R6B VCC0R6B

2

1

A A

5

C110 10U_0402_6.3V6-M

C111 10U_0402_6.3V6-M

1

2

C112

0.1U_0201_6.3V6-K

1

2

C113

0.1U_0201_6.3V6-K

1

4

2

C114

0.1U_0201_6.3V6-K

1

2

C115

0.1U_0201_6.3V6-K

1

2

C116

0.1U_0201_6.3V6-K

1

2

C117

0.1U_0201_6.3V6-K

1

2

C118

0.1U_0201_6.3V6-K

1

2

EMC@

C119

0.1U_0201_6.3V6-K

1

3

M_A_VREF_CA_CPU4

2

R180 2.74_0201_1%

2

C120

0.022U_0201_6.3V6-K

1

R182

24.9_0201_1%

1 2

VCC1R2A

R179

1.82K_0201_1%

1 2

R181

1.82K_0201_1%

1 2

LC Future Center Secret Data

M_A_VREF_CA

Project Name

Date: Sheet of

Kolar-1

Rev Title

DDR4 BASE MEMORY CH-A (2/2)

4.02

Wednesday, November 01, 2017

1

23 97

5

M_B_DQ[63:0]5

-M_B_DQS[7:0]5

M_B_DQS[7:0]5

M_B_A[16:0]5

D D

4

3

M_B_VREF_CA_CPU4

2

VCC1R2A

R184 2_0201_1%

2

C121

0.022U_0201_6.3V6-K

1

R186

24.9_0201_1%

1 2

R183 1K_0201_1%

1 2

R185 1K_0201_1%

1 2

M_B_VREF_CA

1

VCC1R2A VCC1R2A

M_B_DQ5

M_B_DQ1

-M_B_DQS0 M_B_DQS0

M_B_DQ7

M_B_DQ3

M_B_DQ13

M_B_DQ9

M_B_DQ15

M_B_CKE0

M_B_BG1 M_B_BG0

M_B_A12 M_B_A9

M_B_A8 M_B_A6

M_B_DQ10

M_B_DQ21

M_B_DQ17

-M_B_DQS2 M_B_DQS2

M_B_DQ23

M_B_DQ19

M_B_DQ29

M_B_DQ25

M_B_DQ30

M_B_DQ26

C C

M_B_CKE05

M_B_BG15 M_B_BG05

B B

JDDRA

1

VSS_1

3

DQ5

5

VSS_3

7

DQ1

9

VSS_5

11

DQS0_C

13

DQS0_t

15

VSS_8

17

DQ7

19

VSS_10

21

DQ3

23

VSS_12

25

DQ13

27

VSS_14

29

DQ9

31

VSS_16

33

DM1_n/DBl1_n

35

VSS_17

37

DQ15

39

VSS_19

41

DQ10

43

VSS_21

45

DQ21

47

VSS_23

49

DQ17

51

VSS_25

53

DQS2_c

55

DQS2_t

57

VSS_28

59

DQ23

61

VSS_30

63

DQ19

65

VSS_32

67

DQ29

69

VSS_34

71

DQ25

73

VSS_36

75

DM3_n/DBl3_n

77

VSS_37

79

DQ30

81

VSS_39

83

DQ26

85

VSS_41

87

CB5/NC

89

VSS_43

91

CB1/NC

93

VSS_45

95

DQS8_c

97

DQS8_t

99

VSS_48

101

CB2/NC

103

VSS_50

105

CB3/NC

107

VSS_52

109

CKE0

111

VDD_1

113

BG1

115

BG0

117

VDD_3

119

A12

121

A9

123

VDD_5

125

A8

127

A6

129

VDD_7

FOX_AS0A826-H4SB-7H

CONN@

VSS_2

VSS_4

VSS_6

DM0_n/DBIO_n

VSS_7

VSS_9

VSS_11

DQ12

VSS_13

VSS_15 DQS1_c

DQS1_t

VSS_18

DQ14

VSS_20

DQ11

VSS_22

DQ20

VSS_24

DQ16

VSS_26

DM2_n/DBl2_n

VSS_27

DQ22

VSS_29

DQ18

VSS_31

DQ28

VSS_33

DQ24 VSS_35 DQS3_c

DQS3_t

VSS_38

DQ31 VSS_40

DQ27 VSS_42 CB4/NC VSS_44 CB0/NC VSS_46

DBI8_n VSS_47 CB6/NC VSS_49 CB7/NC VSS_51

RESET_n

CKE1

VDD_2

ACT_n

ALERT_n

VDD_4

VDD_6

VDD_8

2 4

DQ4

6 8

DQ0

10 12 14 16

DQ6

18 20

DQ2

22 24 26 28

DQ8

30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120

A11

122

A7

124 126

A5

128

A4

130

M_B_DQ4

M_B_DQ0

M_B_DQ6

M_B_DQ2

M_B_DQ12

M_B_DQ8

-M_B_DQS1 M_B_DQS1

M_B_DQ14

M_B_DQ11

M_B_DQ20

M_B_DQ16

M_B_DQ22

M_B_DQ18

M_B_DQ28

M_B_DQ24

-M_B_DQS3 M_B_DQS3

M_B_DQ31

M_B_DQ27

-DRAMRST M_B_CKE1

-M_B_ACT

-M_B_ALERT

M_B_A11 M_B_A7

M_B_A5 M_B_A4

-DRAMRST 5,22 M_B_CKE1 5

-M_B_ACT 5

-M_B_ALERT 5

M_B_A1

M_B_DDRCLK0_1200M5

-M_B_DDRCLK0_1200M5

M_B_PARITY5

VCC3BVCC2R5A VCC0R6B

SMB_CLK_3B59,64 SMB_DATA_3B 59,64

M_B_DDRCLK0_1200M

-M_B_DDRCLK0_1200M

M_B_PARITY

M_B_BS1

M_B_BS15

-M_B_CS0

-M_B_CS05

M_B_A14

M_B_ODT0

M_B_ODT05

-M_B_CS1

-M_B_CS15

M_B_ODT1

M_B_ODT15

SMB_CLK_3B SMB_DATA_3B

VCC1R2A VCC1R2A

JDDRB

131

M_B_DQ37

M_B_DQ33

-M_B_DQS4 M_B_DQS4

M_B_DQ38

M_B_DQ34

M_B_DQ44

M_B_DQ40

M_B_DQ46

M_B_DQ42

M_B_DQ52

M_B_DQ49

-M_B_DQS6 M_B_DQS6

M_B_DQ55

M_B_DQ51

M_B_DQ61

M_B_DQ56

M_B_DQ62

M_B_DQ58

A3

133

A1

135

VDD_9

137

CK0_t

139

CK0_c

141

VDD_11

143

Parity

145

BA1

147

VDD_13

149

CS0_n

151

WE_n/A14

153

VDD_15

155

ODT0

157

CS1_n

159

VDD_17

161

ODT1

163

VDD_19

165

C1/CS3_n/NC

167

VSS_53

169

DQ37

171

VSS_55

173

DQ33

175

VSS_57

177

DQS4_c

179

DQS4_t

181

VSS_60

183

DQ38

185

VSS_62

187

DQ34

189

VSS_64

191

DQ44

193

VSS_66

195

DQ40

197

VSS_68

199

DM5_n/DBl5_n

201

VSS_69

203

DQ46

205

VSS_71

207

DQ42

209

VSS_73

211

DQ52

213

VSS_75

215

DQ49

217

VSS_77

219

DQS6_c

221

DQS6_t

223

VSS_80

225

DQ55

227

VSS_82

229

DQ51

231

VSS_84

233

DQ61

235

VSS_86

237

DQ56

239

VSS_88

241

DM7_n/DBl7_n

243

VSS_89

245

DQ62

247

VSS_91

249

DQ58

251

VSS_93

253

SCL

255

VDDSPD

257

VPP_1

259

VPP_2

261

GND_1

FOX_AS0A826-H4SB-7H

CONN@

EVENT_n

VDD_10

CK1_t

CK1_c

VDD_12

A10/AP

VDD_14

RAS_n/A16

VDD_16

CAS_n/A15

VDD_18

C0/CS2_n/NC

VREFCA

VSS_54

DQ36

VSS_56

DQ32

VSS_58

DM4_n/DBl4_n

VSS_59

DQ39

VSS_61

DQ35

VSS_63

DQ45

VSS_65

DQ41

VSS_67

DQS5_c

DQS5_t VSS_70

DQ47

VSS_72

DQ43

VSS_74

DQ53

VSS_76

DQ48

VSS_78

DM6_n/DBl6_n

VSS_79

DQ54

VSS_81

DQ50

VSS_83

DQ60

VSS_85

DQ57

VSS_87

DQS7_c

DQS7_t VSS_90

DQ63

VSS_92

DQ59

VSS_94

GND_2

A2

A0

BA0

A13

RFU

SDA SA0

Vtt

SA1

132 134 136 138 140 142 144

146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254 256 258 260

262

M_B_A2M_B_A3

M_B_DDRCLK1_1200M

-M_B_DDRCLK1_1200M

M_B_A0

M_B_A10

M_B_BS0 M_B_A16

M_B_A15 M_B_A13

M_B_DQ36

M_B_DQ32

M_B_DQ39

M_B_DQ35

M_B_DQ45

M_B_DQ41

-M_B_DQS5 M_B_DQS5

M_B_DQ47

M_B_DQ43

M_B_DQ53

M_B_DQ48

M_B_DQ54

M_B_DQ50

M_B_DQ60

M_B_DQ57

-M_B_DQS7 M_B_DQS7

M_B_DQ63

M_B_DQ59

M_B_DDRCLK1_1200M 5

-M_B_DDRCLK1_1200M 5

M_B_BS0 5

M_B_VREF_CA

SPD ADDRESS: 51H

VCC3B

1 2

R187 10K_0201_5%

VCC3B

C126

2.2U_0402_6.3V6-K

2

C127

0.1U_0201_6.3V6-K

1

2

1

A A

VCC2R5A VCC3B V CC1R2A

1

C9701

C9702

2

RF@

47P_0201_25V8-G

100P_0201_25V8-J

1

C9703

C9704

2

RF@

47P_0201_25V8-G

C9705

2

RF@

100P_0201_25V8-J

1

C9706

2

RF@

47P_0201_25V8-G

100P_0201_25V8-J

VCC2R5A

2

C124 10U_0402_6.3V6-M

1

2

C125 1U_0402_6.3V6-K

1

Near JDDR

5

4

3

2

M_B_VREF_CA

2

@

C122

2.2U_0402_6.3V6-K

1

LC Future Center Secret Data

2

C123

0.1U_0201_6.3V6-K

1

Project Name

Date: Sheet of

Kolar-1

Rev Title

DDR4 SO DIMM CHANNEL-B (1/2)

4.02

Wednesday, November 01, 2017

1

24 97

5

D D

4

3

2

1

VCC1R2A

C135 1U_0402_6.3V6-K

C148

0.1U_0201_6.3V6-K

C156

0.1U_0201_6.3V6-K

EMC_NS@

2

1

@

2

1

@

2

1

2

1

@

C C

B B

VCC1R2A

@

VCC1R2A

2

1

2

1

C136 1U_0402_6.3V6-K

C149

0.1U_0201_6.3V6-K

C157

0.1U_0201_6.3V6-K

EMC_NS@

2

C137 1U_0402_6.3V6-K

1

@

2

C150

0.1U_0201_6.3V6-K

1

@

2

C159

0.1U_0201_6.3V6-K

1

@

2

C138 1U_0402_6.3V6-K

1

@

2

C151

0.1U_0201_6.3V6-K

1

@

2

C160

0.1U_0201_6.3V6-K

1

@

2

C139 1U_0402_6.3V6-K

1

@

2

C153

0.1U_0201_6.3V6-K

1

@

2

C162

0.1U_0201_6.3V6-K

1

@

VCC1R2A

VCC0R6B

2

C128 1U_0402_6.3V6-K

1

2

C141 10U_0402_6.3V6-M

1

2

C154

0.1U_0201_6.3V6-K

1

2

C129 1U_0402_6.3V6-K

1

2

C142 10U_0402_6.3V6-M

1

2

C155

0.1U_0201_6.3V6-K

1

2

C130 1U_0402_6.3V6-K

1

2

C143 10U_0402_6.3V6-M

1

2

C158

0.1U_0201_6.3V6-K

1

2

C131 1U_0402_6.3V6-K

1

2

C144 10U_0402_6.3V6-M

1

2

C161

0.1U_0201_6.3V6-K

1

2

C132 1U_0402_6.3V6-K

1

2

C145 10U_0402_6.3V6-M

1

2

C133 1U_0402_6.3V6-K

1

2

C146 10U_0402_6.3V6-M

1

2

C134 1U_0402_6.3V6-K

1

2

C147 10U_0402_6.3V6-M

1

2

C140 1U_0402_6.3V6-K

1

2

C152 10U_0402_6.3V6-M

1

VCC0R6B

2

C163 10U_0402_6.3V6-M

1

A A

5

4

2

C164 10U_0402_6.3V6-M

1

3

Project Name

LC Future Center Secret Data

2

Project Name

Kolar-1

Rev Title

DDR4 SO DIMM CHANNEL-B (2/2)

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

25 97

VCC3M

5

4

3

2

1

Q22

D D

C C

1

3

TPCF8004_2-3U1S

VCC3P_DRV66

VCC3P_DRV

8

72

6

54

R190 100_0201_5%

1 2

2

C165

0.1U_0402_25V7-K

1

VCC3P

R188 47_0201_5%

1 2

D6 RB521CM-30T2R_VMN2M-2

1 2

R193 47K_0201_5%

1 2

2

C167 .01U_0402_25V7-K

1

F1

21

3A_32V_ERBRD3R00X

VBL15VSYS15

VCC3LCD_CONN VCC3P

VCC3B

R197

1 2

100K_0201_5%

VCC3LCD_CONN

R195 47K_0201_5%

1 2

F30

VCC3B

21

C170

0.01U_0201_6.3V7-K

F2

3A_32V_ERBRD3R00X

VCC3LCD_CONN

EMC@

1

C9707

2

47P_0201_25V8-G

RF_NS@

2

1

C168

C9708

RF_NS@

1U_0201_6.3V6-M

1

2

100P_0201_25V8-J

2

C169

0.1U_0201_6.3V6-K

1

2

1

Near JLCD

0.5A_32V_ERBRD0R50X

0.9A

21

VBL15

1.2A

1

C9709

LCD CONNECTOR

JLCD

40 39 38 37 36 35

1 2

-LID_CLOSE27,56,59 PANEL_BKLT_CTRL3 BACKLIGHT_ON55

EDP_HPD3

B B

USBP9+10 USBP9-10

USBP9+ USBP9-

USBP9+

USBP9-

1 2

R203 0_0402_5%EMC_NS@

L17

EMC@

1

4

EXC24CH900U_4P

2

3

1 2

R204 0_0402_5%EMC_NS@

USBP9+_CONN USBP9-_CONN

USBP9+_CONN

2

USBP9-_CONN

3

Co-layout

A A

EPRIVACY_ON8

EDP_AUXN3 EDP_AUXP3

EDP_TXP03 EDP_TXN03

EDP_TXP13 EDP_TXN13

EDP_TXP23 EDP_TXN23

EDP_TXP33 EDP_TXN33

D7 RB521CM-30T2R VMN2M

USBP9+_CONN USBP9-_CONN

C176 0.1U_0201_6.3V6-K

1 2 1 2

C177 0.1U_0201_6.3V6-K

1 2

C178 0.1U_0201_6.3V6-K

1 2

C179 0.1U_0201_6.3V6-K

1 2

C180 0.1U_0201_6.3V6-K

1 2

C181 0.1U_0201_6.3V6-K

1 2

C9487 0.1U_0201_6.3V6-K C9486 0.1U_0201_6.3V6-K

1 2

C9484 0.1U_0201_6.3V6-K

1 2

C9485 0.1U_0201_6.3V6-K

VCC3B_TP

EDP_AUXN_CONN EDP_AUXP_CONN

EDP_TXP0_CONN EDP_TXN0_CONN

EDP_TXP1_CONN EDP_TXN1_CONN

EDP_TXP2_CONN EDP_TXN2_CONN

EDP_TXP3_CONN EDP_TXN3_CONN

C182 1000P_0201_25V7-KEMC_NS@

1

2

1

D12

D13

2

EMC_NS@

2

SESD0201X1BN-0010-098_DFN2

34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

I-PEX_20654-040E-01

CONN@

SESD0201X1BN-0010-098_DFN2

52

40

GND12

51

39

GND11

50

38

GND10

49

37

GND9

48

36

GND8

47

35

GND7

46

34

GND6

45

33

GND5

44

32

GND4

43

31

GND3

42

30

GND2

41

29

GND1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

C9710

2

47P_0201_25V8-G

RF_NS@

Near JLCD

2

C173

0.01U_0201_25V7-K

1

100P_0201_25V8-J

2

C174

0.1U_0201_25V6-K

1

2

C175 1U_0402_25V6-K

1

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Kolar-1

Rev Title

4.02

LCD I/F

Date: Sheet of

Wednesday, November 01, 2017

1

26 97

5

D D

4

VCC3B_CAM

1

C9711

C9712

2

RF@

47P_0201_25V8-G

100P_0201_25V8-J

3

21

F3

2A_32V_ERBRD2R00X

21

F4

0.5A_32V_ERBRD0R50X

21

F5

3A_32V_ERBRD3R00X

2

VCC3MVCC3B VCC3BVCC3B

21

F6

0.5A_32V_ERBRD0R50X

1

Near JCAM

JCAM

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

I-PEX_20455-030E-02

CONN@

1 2

100K_0201_5%

2

1

2200P_0201_25V7-K

LC Future Center Secret Data

JLID

1 2 3 4

5 6

KYOCE_046811-604-000846

CONN@

G4 G3 G2 G1

1 2 3 4

GND1 GND2

34 33 32 31

Project Name

Date: Sheet of

Kolar-1

Rev Title

LID/MIC/CAMERA/PWR SW

4.02

Wednesday, November 01, 2017

1

27 97

2

C188

1

VCC3M_LOGO

0.1U_0201_6.3V6-K

VCC3SW VCC3SW

R10411

C185

-LED_LOGO55

-INT_MIC_DTCT8

DMIC_CLK67

USBP7-_CONN USBP7+_CONN

USBP4-_CONN USBP4+_CONN

USBP7-_CONN

USBP7+_CONN

USBP4-_CONN

USBP4+_CONN

DMIC_DATA67

C C

1 2

R199 0_0402_5%EMC_NS@

USBP7-10 USBP7+10

USBP4-10 USBP4+10

B B

USBP7USBP7+

USBP4USBP4+

USBP7-

USBP7+

USBP4-

USBP4+

1 2

R200 0_0402_5%EMC_NS@

1 2

R201 0_0402_5%EMC_NS@

1 2

R202 0_0402_5%EMC_NS@

L15

EMC@

1

4

EXC24CH900U_4P

L16

EMC@

1

4

EXC24CH900U_4P

2

3

2

3

-LED_LOGO

-INT_MIC_DTCT

DMIC_CLK DMIC_DATA

Co-layout

A A

-PWRSWITCH

1 2

R198 3.9K_0402_5%

-PWRSWITCH17,35,64,65

-LED_PWR55

USBP7-_CONN USBP7+_CONN

USBP4-_CONN USBP4+_CONN

-PWRSWITCH

-LED_PWR

@

SPWR

3

1

2

4

NTC008-XA1J-X160T_4P

1

D8

2

C183

1

EMC_NS@

@

1000P_0201_25V7-K

1

D9

D10

2

EMC_NS@

2

SESD0201X1BN-0010-098_DFN2

PLACE NEAR JCAM PLACE NEAR JCAM

VCC5M VCC3M

21

F35

@

0.5A_32V_ERBRD0R50X

1 2

R205 36_0402_5%

1

2

SESD0201X1BN-0010-098_DFN2

21

F7

1

D11

2

EMC_NS@

2

SESD0201X1BN-0010-098_DFN2

0.5A_32V_ERBRD0R50X

JPWR

1 2 3 4

HIGHS_WS83040-S0171-HF

CONN@

VCC3B_CAM

VCC3B_IR_LED

VCC3B_MIC

EMC@

R10447

1 2

33_0402_5%

2

C184

EMC@

1 2 3 4

5

GND1

6

GND2

2

1

C9713

EMC@

1

0.1U_0201_6.3V6-K 12P_0402_50V8-J

2

C186

C187

1

0.1U_0201_6.3V6-K

-LID_CLOSE26,56,59

Add power button in MB for NPI phase

5

4

3

2

5

4

3

2

1

VCC3B

R206

1 2

0_0603_5%

D D

C C

VCC3B

C193

2

C9637

1

0.1U_0201_6.3V6-K 1U_0201_6.3V6-K

DDIP2_0P3 DDIP2_0N3 DDIP2_1P3 DDIP2_1N3 DDIP2_2P3 DDIP2_2N3 DDIP2_3P3 DDIP2_3N3

DDIP2_CTRLCLK3 DDIP2_CTRLDATA3

DDI_PRIORITY9

SMB05_DATA29,57

DDIP2_AUXP3

DDIP2_AUXN3

USBC_HPD29,33

HDMI_HPD37

SMB05_CLK29,57

VCC3B_PS8337B

2

C192

0.1U_0201_6.3V6-K

1

1 2

C194 0.1U_0201_6.3V6-K

1 2

C195 0.1U_0201_6.3V6-K

1 2

C196 0.1U_0201_6.3V6-K

1 2

C197 0.1U_0201_6.3V6-K

1 2

C198 0.1U_0201_6.3V6-K

1 2

C199 0.1U_0201_6.3V6-K

1 2

C200 0.1U_0201_6.3V6-K

1 2

C201 0.1U_0201_6.3V6-K

1 2

C202 0.1U_0201_6.3V6-K

1 2

C203 0.1U_0201_6.3V6-K

1 2

R10544 0_0201_5%@

1 2

1M_0201_5%

R209

10K_0201_5%

2

1

2.2U_0402_6.3V6-K

1 2

R211

2

C190

0.1U_0201_6.3V6-K

1

VCC3B

R214

@

10K_0201_5%

1 2

6.19K_0402_1%

4.7K_0201_5%

R215

2

C189

0.1U_0201_6.3V6-K

1

Near pin14 Near pin28 Near pin41 Near pin56

R208

1 2

R10546 0_0201_5%

1 2

R10545 0_0201_5%@

DDIP2_AUXP DDIP2_AUXN

C204

R10413

1 2

27K_0201_5%

@

2

C191

0.1U_0201_6.3V6-K

1

VCC3B

R10547

@

4.7K_0201_5%

1 2

DDIP2_0P_C DDIP2_0N_C DDIP2_1P_C DDIP2_1N_C DDIP2_2P_C DDIP2_2N_C DDIP2_3P_C DDIP2_3N_C

PS8337_SDA HDMI_CLKP

DDIP2_AUXP_C DDIP2_AUXN_C

I2C_CTL_EN

PS8337_MODE

PS8337_TMDS_DDCBUF

PS8337_DP_CFG0 PS8337_DP_CFG1

U147

14

VDD33_1

28

VDD33_2

41

VDD33_3

56

VDD33_4

3

IN_D0p

4

IN_D0n

6

IN_D1p

7

IN_D1n

9

IN_D2P

10

IN_D2n

12

IN_D3p

13

IN_D3n

50

IN_DDC_SCL

49

IN_DDC_SDA

45

SW/SDA_CTL

46

PD

52

IN_AUXp

51

IN_AUXn

38

I2C_CTL_EN

53

MODE

1

CEXT

27

REXT

32

DP_HPD

42

DP_CA_DET

2

TMDS_DDCBUF

17

TMDS_HPD

44

DP_CFG0/SCL_CTL

29

DP_CFG1

PS8337BQFN56GTR2-A2_QFN56_7X7

IN_HPD

IN_CA_DET

DP_D0p DP_D0n DP_D1p DP_D1n DP_D2p DP_D2n DP_D3p DP_D3n

DP_AUXp_SCL

DP_AUXn_SDA

TMDS_CLKp TMDS_CLKn

TMDS_CH0p TMDS_CH0n TMDS_CH1p TMDS_CH1n TMDS_CH2p TMDS_CH2n

TMDS_SCL

TMDS_SDA

TMDS_PRE

TMDS_RT

GND1 GND2 GND3 EPAD

8

PEQ

5 11

40 39 37 36 34 33 31 30

55 54

16 15

19 18 22 21 25 24

48 47

PS8337_TMDS_PRE

20

PS8337_TMDS_RT

23

26 35 43 57

PS8337_PEQ

USBC_DDIP2_0P USBC_DDIP2_0N USBC_DDIP2_1P USBC_DDIP2_1N USBC_DDIP2_2P USBC_DDIP2_2N USBC_DDIP2_3P USBC_DDIP2_3N

USBC_DDIP2_AUXP USBC_DDIP2_AUXN

HDMI_CLKN

HDMI_DATA0P HDMI_DATA0N HDMI_DATA1P HDMI_DATA1N HDMI_DATA2P HDMI_DATA2N

HDMI_DDC_CLK HDMI_DDC_DATA

DDIP2_HPD 3

USBC_DDIP2_0P 29 USBC_DDIP2_0N 29 USBC_DDIP2_1P 29 USBC_DDIP2_1N 29 USBC_DDIP2_2P 29 USBC_DDIP2_2N 29 USBC_DDIP2_3P 29 USBC_DDIP2_3N 29

HDMI_CLKP 37 HDMI_CLKN 37

HDMI_DATA0P 37 HDMI_DATA0N 37 HDMI_DATA1P 37 HDMI_DATA1N 37 HDMI_DATA2P 37 HDMI_DATA2N 37

HDMI_DDC_CLK 37 HDMI_DDC_DATA 37

VCC3B

R210 100K_0201_5%

1 2

@

R212

@

100K_0201_5%

USBC_DDIP2_AUXP 29 USBC_DDIP2_AUXN 29

USBC_HPD

1

TP51Test_Point_20MIL

HDMI_HPD

1

B B

TP52Test_Point_20MIL

TABLE:

VCC3B

Pin45 SWHPort Priority Sequence

1 2

DP Port > TMDS PortL

DEFAULT

TMDS Port > DP Port

A A

5

4

R219 4.7K_0402_5%

1 2

R221 4.7K_0402_5%

1 2

R223 4.7K_0402_5%

1 2

R225 4.7K_0402_5%

1 2

R227 4.7K_0402_5%

1 2

R229 4.7K_0402_5%@

1 2

R10492 4.7K_0402_5%@

PS8337_PEQ

PS8337_TMDS_PRE

PS8337_MODE

PS8337_TMDS_RT

PS8337_DP_CFG0

PS8337_TMDS_DDCBUF

PS8337_DP_CFG1

3

1 2

R220 4.7K_0402_5%

1 2

R222 4.7K_0402_5%

1 2

R224 4.7K_0402_5%

1 2

R228 4.7K_0402_5%

1 2

R230 4.7K_0402_5%@

1 2

R10491 4.7K_0402_5%@

Project Name

LC Future Center Secret Data

2

Project Name

Kolar-1

Rev Title

DDI DEMUX/HDMI LEVEL SHIFTER

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

28 97

5

VCC3_PS8743BVCC3_SUS

R231

D D

1 2

0_0603_5%

2

C205

0.1U_0201_6.3V6-K

1

2

C206

0.1U_0201_6.3V6-K

1

2

C207

0.1U_0201_6.3V6-K

1

4

2

1

C208

0.1U_0201_6.3V6-K

2

C209

0.1U_0201_6.3V6-K

1

2

C210

0.01U_0201_6.3V7-K

1

3

2

C211

0.01U_0201_6.3V7-K

1

2

C212

0.01U_0201_6.3V7-K

1

2

1

1 2

USBC_DDIP2_0P28 USBC_DDIP2_0N28 USBC_DDIP2_3P28 USBC_DDIP2_3N28

USB3P3_RXP10 USB3P3_RXN10 USB3P3_TXP10 USB3P3_TXN10

USBC_DDIP2_2P28 USBC_DDIP2_2N28 USBC_DDIP2_1P28

C C

B B

USBC_DDIP2_1N28

USBC_DDIP2_AUXP28 USBC_DDIP2_AUXN28

SMB05_CLK28,57

SMB05_DATA28,57

USBC_DDIP2_AUXN_R

USBC_DDIP2_AUXP_R

1 2

R725 100K_0201_5%

1 2

R724 100K_0201_5%

C213 0.1U_0201_6.3V6-K

1 2

C215 0.1U_0201_6.3V6-K

1 2

C216 0.1U_0201_6.3V6-K

1 2

C214 0.1U_0201_6.3V6-K

1 2

C217 0.1U_0201_6.3V6-K

1 2

C218 0.1U_0201_6.3V6-K

1 2

C219 0.1U_0201_6.3V6-K

1 2

C220 0.1U_0201_6.3V6-K

1 2

C221 0.1U_0201_6.3V6-K

1 2

C222 0.1U_0201_6.3V6-K

1 2

C223 0.1U_0201_6.3V6-K

1 2

C224 0.1U_0201_6.3V6-K

1 2

R10479 0_0201_5%

1 2

R10480 0_0201_5%

1 2

R10542 0_0201_5%

1 2

R10543 0_0201_5%

VCC3_PS8743B

USBC_DDIP2_0P_C USBC_DDIP2_0N_C USBC_DDIP2_3P_C USBC_DDIP2_3N_C

PS8747_SSDE PS8747_CDE

USB3P3_RXP_C USB3P3_RXN_C USB3P3_TXP_C USB3P3_TXN_C

USBC_DDIP2_2P_C USBC_DDIP2_2N_C USBC_DDIP2_1P_C USBC_DDIP2_1N_C

USBC_DDIP2_AUXP_R USBC_DDIP2_AUXN_R

PS8747_I2C_CTL PS8747_DCICFG_ADDR

PS8747_DPEQ_SCL PS8747_CEQ_SDA

R232

4.99K_0402_1%

1 2

U217

9

ML0P

10

ML0N

18

ML3P

19

ML3N

11

SSDE/DCI_DATA

14

CDE/DCI_CLK

5

SSRXP

4

SSRXN

8

SSTXP

7

SSTXN

15

ML2P

16

ML2N

12

ML1P

13

ML1N

24

AUXP

25

AUXN

29

I2C_EN

3

DCICFG/ADDR

21

DPEQ/CSCL

22

CEQ/CSDA

2

REXT

PS8747BQFN40GTR-B1_QFN40_4X6

VDD33_16VDD33_220VDD33_3

17

28

VDD_DCI

30

RX1P

31

RX1N

40

RX2P

39

RX2N

33

TX1P

34

TX1N

37

TX2P

36

TX2N

1

CEXT

23

CE_DP

35

CE_USB

38

FLIP

27

SBU1

26

SBU2

32

IN_HPD

EPAD

41

2

C227

2.2U_0402_6.3V6-K

1

USBC_DP_MODE USBC_USB_MODE USBC_POL

USBC_HPD

USBC_RX1P 36 USBC_RX1N 36 USBC_RX2P 36 USBC_RX2N 36

USBC_TX1P 36 USBC_TX1N 36 USBC_TX2P 36 USBC_TX2N 36

USBC_DP_MODE 33 USBC_USB_MODE 33

USBC_POL 33 USBC_SBU1 36 USBC_SBU2 36

USBC_HPD 28,33

VCC3_PS8743B

R233 4.7K_0402_5%

R235 4.7K_0402_5%

R237 4.7K_0402_5%

R241 4.7K_0402_5%@

R242 4.7K_0402_5%@

USBC_USB_MODE

1 2

VCC3_PS8743B

12

@

R10497 20K_0201_5%

PS8747_DPEQ_SCL

PS8747_CEQ_SDA

PS8747_I2C_CTL

PS8747_DCICFG_ADDR

PS8747_SSDE

PS8747_CDE

1 2

R234 4.7K_0402_5%@

1 2

R236 4.7K_0402_5%@

1 2

R238 4.7K_0402_5%@

1 2

R240 4.7K_0402_5%@

A A

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Kolar-1

Rev Title

USB TYPE-C SWITCH

4.02

Date: Sheet of

Wednesday, November 01, 2017

1

29 97

5

D D

C C

4

3

2

1

BLANK

B B

A A

Project Name

LC Future Center Secret Data

5

4

3

2

Project Name

Date: Sheet of

Kolar-1

Rev Title

BLANK

4.02

Wednesday, November 01, 2017

1

30 97

Lenovo ThinkPad T480S Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual