Lenovo THINKPAD T470S Schematic

5

4

3

2

1

THP2 D-0

Thorpe-2 TBT Logic Schematics

VER 0.01

1.TITLE PAGE

2.EC HISTORY

D D

3.CPU(1/16) : DDI/EDP

4.CPU(2/16) : DDR CHANNEL-A

5.CPU(3/16) : DDR CHANNEL-B

6.CPU(4/16) : MISC/JTAG

7.CPU(5/16) : LPC/SPI/SMBUS/C-LINK

8.CPU(6/16) : LPSS/ISH

9.CPU(7/16) : AUDIO/SDXC

10.CPU(8/16) : PCIE/USB/SATA

11.CPU(9/16) : CSI-2/EMMC

12.CPU(10/16) : CLOCK SIGNALS

13.CPU(11/16) : SYSTEM PM

C C

14.CPU(12/16) : CPU POWER (1/2)

15.CPU(13/16) : CPU POWER (2/2)

16.CPU(14/16) : PCH POWER

17.CPU(15/16) : GND

18.CPU(16/16) : CFG/RESERVED

19.XDP CONNECTOR

20.RTC BATTERY

21.SPI FLASH

22.DDR4 BASE MEMORY CH-A (1/2)

23.DDR4 BASE MEMORY CH-A (2/2)

B B

24.DDR4 SO DIMM CHANNEL-B (1/2)

25.DDR4 SO DIMM CHANNEL-B (2/2)

26.LCD/USB/LID/MIC/CAMERA/PWR SW

27.BLANK

28.BLANK

29.DDI DEMUX/HDMI LEVEL SHIFTER

30.HDMI CONNECTOR

31.M.2 SATA/PCIE SSD CARD SLOT

32.USB POWER/CONN

33.BLANK

A A

34.GBE JACKSONVILLE

35.GBE LAN SWITCH

36.GBE MAGNETICS

5

37.RJ45 CONNECTOR

38.BLANK

39.BLANK

40.BLANK

41.BLANK

42.BLANK

43.BLANK

44.BLANK

45.BLANK

46.PCIE M.2 (NGFF) CARD SLOT

47.SD/AUDIO CONNECTOR I/F

48.BLANK

49.BLANK

50.AUDIO ALC3268

51.AUDIO HP JACK DETECT

52.AUDIO JACK SENSE

53.BLANK

54.AUDIO SPEAKER

55.AUDIO BEEP

56.BLANK

57.DOCKING CONNECTOR

58.MEC1653(1/3)

59.MEC1653(2/3)

60.MEC1653(3/3)

61.KEYBOARD/TRACK POINT

62.TOUCH PAD/FPR/SCR

63.FAN CONNECTOR

64.APS G-SENSOR

65.DISCRETE TPM 2.0

66.SMBUS SWITCH/LPC DEBUG PORT

67.THINK ENGINE-2(1/2)

68.THINK ENGINE-2(2/2)

69.DC-IN

70.BATTERY INPUT

71.BATTERY CHARGER(BQ25700) 103. USB TYPE-C PROTOCTOR

4

3

Oct/26/2016

72.CHARGER SELECTOR

73.BLANK

74.DC/DC VCC5M/VCC3M (TPS51285B-1)

75.DC/DC IMVP8 CONTROLLER(NCP81218)

76.DC/DC VCCCPUCORE(NCP81382)

77.DC/DC VCCGFXCORE_I(NCP81382)

78.DC/DC VCCSA(NCP81380)

79.BLANK

80.DC/DC VCCCPUIO(NB682)

81.DC/DC VCC1R0_SUS(BD91364BMUU)

82.LOAD SW VCCST & VCCSTG

83.DC/DC VCC1R2A(TPS51716RUKR)

84.BLANK

85.DC/DC VCC2R5A(TLV62080)

86.DC/DC VCC1R8_SUS(BU90104GWZ)

87.DC/DC VCCPCHCORE(NB695)

88.BLANK

89.BLANK

90.BLANK

91.BLANK

92.BLANK

93.LOAD SW PCH SUS/TRACK POINT

94.LOAD SW LAN

95.BLANK

96.LOAD SW B

97.LOAD SW WWAN & WLAN

98.BLANK

99.PTH FOR SCREW HOLES

100. ALPINE RIDGE LP(1/2)

101. ALPINE RIDGE LP(2/2)

102. TBT PORT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

2

BASE LOGIC :

thp2_sitr_lcfc_20161014

2014/07/01

Deciphered Date

2014/07/01

Title

TITLE PAGE

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

1 103

0.01

5

4

3

2

1

EC HISTORY

CS15 THP2 D-0 (BASE LOGIC : thp2_sitr_lcfc_20161014)

VER.0.01 10/26/2016 APPLIED Power ECR10192016 / EC10242016

D D

C C

B B

TABLE: Chip Capacitor Thermal Characteristics

Code

-55 to 150degC

-55 to 125degC

-55 to 105degC

-55 to 85degC

A A

+/-30ppm/degC +/-30ppm/degC

+/-15% +/-22% +/-15%

NPO

C0G

X7R X6S X5R

TABLE: Chip Capacitor Tolerance

Tol era nce Code

+/-0.25pF +/-0.5pF

+/-5% +/-10% +/-20% +80/-20%

C D

J K M

Z

TABLE: Chip Part Dimension

Size [mm]

0.40 x 0.20

0.60 x 0.30

1.00 x 0.50

1.60 x 0.80

2.00 x 1.25

2.00 x 1.60

2.50 x 2.00

3.20 x 1.60

3.20 x 2.50

4.50 x 1.60

4.50 x 2.50

4.50 x 3.20

5.00 x 2.50

6.40 x 3.20

mm Size Code Inch Size Code

0402 0603 1005 1608 2125 2016 2520 3216 3225 4516 4525 4532 5025 6432

01005 0201 0402 0603 0805 0806 1008 1206 1210 1806 1810 1812 2010 2512

LOGIC

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

EC HISTORY

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

2 103

0.01

5

D D

4

VCCCPUIOVCC3_SUS

3

2

1

12

R10227

2.2K_0201_5%

DDIP1_0N100 DDIP1_0P100 DDIP1_1N100 DDIP1_1P100 DDIP1_2N100 DDIP1_2P100 DDIP1_3N100 DDIP1_3P100

C C

DDIP2_0N29 DDIP2_0P29 DDIP2_1N29 DDIP2_1P29 DDIP2_2N29 DDIP2_2P29 DDIP2_3N29 DDIP2_3P29

DDIP1_0N DDIP1_0P DDIP1_1N DDIP1_1P DDIP1_2N DDIP1_2P DDIP1_3N DDIP1_3P

DDIP2_0N DDIP2_0P DDIP2_1N DDIP2_1P DDIP2_2N DDIP2_2P DDIP2_3N DDIP2_3P

TABLE : Functional Strap

DDPB_CTRLDATA

HIGH

Port B is detected.

LOW

Port B is not detected.

DDIP2_CTRLCLK29 DDIP2_CTRLDATA29

DDIP2_CTRLCLK

DDIP2_CTRLDATA

DDPC_CTRLDATA

HIGH

Port C is detected.

LOW

Port C is not detected.

B B

12

R5

24.9_0201_1%

EDP_COMP

U58A

E55

DDI1_TXN[0]

F55

DDI1_TXP[0]

E58

DDI1_TXN[1]

F58

DDI1_TXP[1]

F53

DDI1_TXN[2]

G53

DDI1_TXP[2]

F56

DDI1_TXN[3]

G56

DDI1_TXP[3]

C50

DDI2_TXN[0]

D50

DDI2_TXP[0]

C52

DDI2_TXN[1]

D52

DDI2_TXP[1]

A50

DDI2_TXN[2]

B50

DDI2_TXP[2]

D51

DDI2_TXN[3]

C51

DDI2_TXP[3]

L13

GPP_E18/DDPB_CTRLC LK

L12

GPP_E19/DDPB_CTRLD ATA

N7

GPP_E20/DDPC_CTRLC LK

N8

GPP_E21/DDPC_CTRLD ATA

N11

GPP_E22/DDPD_CTRLC LK

N12

GPP_E23/DDPD_CTRLD ATA

E52

EDP_RCOMP

Kaby lake-U_BGA1356

SKL_ULT

DDI

DISPLAY SIDEBANDS

1 OF 20

EDP

EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]

EDP_AUXN EDP_AUXP

EDP_DISP_UTIL

DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP DDI3_AUXN DDI3_AUXP

GPP_E13/DDPB_HPD0 GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3

GPP_E17/EDP_HPD

EDP_BKLTEN

EDP_BKLTCTL

EDP_VDDEN

100K_0201_5%

EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1 EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3

EDP_AUXN EDP_AUXP

DDIP1_AUXN DDIP1_AUXP DDIP2_AUXN DDIP2_AUXP

DDIP1_HPD DDIP2_HPD

R10234

1 2

100K_0201_5%

EDP_TXN0 26 EDP_TXP0 26 EDP_TXN1 26 EDP_TXP1 26 EDP_TXN2 26 EDP_TXP2 26 EDP_TXN3 26 EDP_TXP3 26

EDP_AUXN 26 EDP_AUXP 26

DDIP1_AUXN 100 DDIP1_AUXP 100 DDIP2_AUXN 29 DDIP2_AUXP 29

DDIP1_HPD 100 DDIP2_HPD 29

EDP_HPD 26

VGA_BLON 58 PANEL_BKLT_CTRL 26 PANEL_POWER_ON 68

C47 C46 D46 C45 A45 B45 A47 B47

E45 F45

B52

G50 F50 E48 F48 G46 F46

L9 L7 L6 N9 L10

R12 R11 U13

R433

1 2

100K_0201_5%

R8

R138

1 2

100K_0201_5%

R10261

1 2

100K_0201_5%

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

CPU(1/16) : DDI/EDP

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

3 103

0.01

5

M_A_DQ[63:0]22

D D

4

3

2

1

TAB LE

AL71 AL68 AN68 AN69 AL70 AL69 AN70 AN71 AR70

Block 0

AR68 AU71 AU68 AR71 AR69 AU70 AU69

C C

B B

A A

Block 2

Block 4

Block 6

BB65

AW65 AW63 AY6 3 BA65 AY6 5 BA63 BB63 BA61 AW61 BB59 AW59 BB61 AY6 1 BA59 AY5 9

AY39

AW39 AY3 7 AW37 BB39 BA39 BA37 BB37 AY3 5 AW35 AY3 3 AW33 BB35 BA35 BA33 BB33

AY31

AW31 AY2 9 AW29 BB31 BA31 BA29 BB29 AY2 7 AW27 AY2 5 AW25 BB27 BA27 BA25 BB25

Interleave

DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15]

DDR0_DQ[16] DDR0_DQ[17] DDR0_DQ[18] DDR0_DQ[19] DDR0_DQ[20] DDR0_DQ[21] DDR0_DQ[22] DDR0_DQ[23] DDR0_DQ[24] DDR0_DQ[25] DDR0_DQ[26] DDR0_DQ[27] DDR0_DQ[28] DDR0_DQ[29] DDR0_DQ[30] DDR0_DQ[31]

DDR0_DQ[32] DDR0_DQ[33] DDR0_DQ[34] DDR0_DQ[35] DDR0_DQ[36] DDR0_DQ[37] DDR0_DQ[38] DDR0_DQ[39] DDR0_DQ[40] DDR0_DQ[41] DDR0_DQ[42] DDR0_DQ[43] DDR0_DQ[44] DDR0_DQ[45] DDR0_DQ[46] DDR0_DQ[47]

DDR0_DQ[48] DDR0_DQ[49] DDR0_DQ[50] DDR0_DQ[51] DDR0_DQ[52] DDR0_DQ[53] DDR0_DQ[54] DDR0_DQ[55] DDR0_DQ[56] DDR0_DQ[57] DDR0_DQ[58] DDR0_DQ[59] DDR0_DQ[60] DDR0_DQ[61] DDR0_DQ[62] DDR0_DQ[63]

LOGIC

5

Non-Interleave

DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15]

DDR0_DQ[32] DDR0_DQ[33] DDR0_DQ[34] DDR0_DQ[35] DDR0_DQ[36] DDR0_DQ[37] DDR0_DQ[38] DDR0_DQ[39] DDR0_DQ[40] DDR0_DQ[41] DDR0_DQ[42] DDR0_DQ[43] DDR0_DQ[44] DDR0_DQ[45] DDR0_DQ[46] DDR0_DQ[47]

DDR1_DQ[0] DDR1_DQ[1] DDR1_DQ[2] DDR1_DQ[3] DDR1_DQ[4] DDR1_DQ[5] DDR1_DQ[6] DDR1_DQ[7] DDR1_DQ[8] DDR1_DQ[9] DDR1_DQ[10] DDR1_DQ[11] DDR1_DQ[12] DDR1_DQ[13] DDR1_DQ[14] DDR1_DQ[15]

DDR1_DQ[32] DDR1_DQ[33] DDR1_DQ[34] DDR1_DQ[35] DDR1_DQ[36] DDR1_DQ[37] DDR1_DQ[38] DDR1_DQ[39] DDR1_DQ[40] DDR1_DQ[41] DDR1_DQ[42] DDR1_DQ[43] DDR1_DQ[44] DDR1_DQ[45] DDR1_DQ[46] DDR1_DQ[47]

M_A_DQ4 M_A_DQ0 M_A_DQ1 M_A_DQ7 M_A_DQ6 M_A_DQ2 M_A_DQ3 M_A_DQ5 M_A_DQ12 M_A_DQ14 M_A_DQ11 M_A_DQ9 M_A_DQ10 M_A_DQ8 M_A_DQ15 M_A_DQ13 M_A_DQ20 M_A_DQ16 M_A_DQ17 M_A_DQ23 M_A_DQ22 M_A_DQ18 M_A_DQ19 M_A_DQ21 M_A_DQ28 M_A_DQ24 M_A_DQ25 M_A_DQ31 M_A_DQ26 M_A_DQ30 M_A_DQ27 M_A_DQ29 M_A_DQ32 M_A_DQ38 M_A_DQ33 M_A_DQ39 M_A_DQ36 M_A_DQ34 M_A_DQ37 M_A_DQ35 M_A_DQ46 M_A_DQ44 M_A_DQ45 M_A_DQ41 M_A_DQ40 M_A_DQ42 M_A_DQ47 M_A_DQ43 M_A_DQ48 M_A_DQ50 M_A_DQ51 M_A_DQ55 M_A_DQ54 M_A_DQ52 M_A_DQ53 M_A_DQ49 M_A_DQ62 M_A_DQ56 M_A_DQ57 M_A_DQ61 M_A_DQ58 M_A_DQ60 M_A_DQ59 M_A_DQ63

SKL_ULT

DDR0_MA[5]/DDR0_CAA[0 ]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[1 ]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[2 ]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[3 ]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[4 ]/DDR0_MA[7]

DDR0_BA[2]/DDR0_CAA [5]/DDR0_BG[0] DDR0_MA[12]/DDR0_CAA [6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA [7]/DDR0_MA[11]

DDR0_MA[15]/DDR0_CAA [8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA [9]/DDR0_BG[1]

DDR0_MA[13]/DDR0_CAB [0]/DDR0_MA[13]

DDR0_CAS#/DDR0_C AB[1]/DDR0_MA[15]

DDR0_WE#/DDR0_ CAB[2]/DDR0_MA[14]

DDR0_RAS#/DDR0_C AB[3]/DDR0_MA[16]

DDR0_BA[0]/DDR0_CAB [4]/DDR0_BA[0]

DDR0_MA[2]/DDR0_CAB[5 ]/DDR0_MA[2]

DDR0_BA[1]/DDR0_CAB [6]/DDR0_BA[1] DDR0_MA[10]/DDR0_CAB [7]/DDR0_MA[10]

DDR0_MA[1]/DDR0_CAB[8 ]/DDR0_MA[1] DDR0_MA[0]/DDR0_CAB[9 ]/DDR0_MA[0]

DDR0_DQSN[2]/DDR0_D QSN[4] DDR0_DQSP[2]/DDR0_D QSP[4] DDR0_DQSN[3]/DDR0_D QSN[5] DDR0_DQSP[3]/DDR0_D QSP[5] DDR0_DQSN[4]/DDR1_D QSN[0] DDR0_DQSP[4]/DDR1_D QSP[0] DDR0_DQSN[5]/DDR1_D QSN[1] DDR0_DQSP[5]/DDR1_D QSP[1] DDR0_DQSN[6]/DDR1_D QSN[4] DDR0_DQSP[6]/DDR1_D QSP[4] DDR0_DQSN[7]/DDR1_D QSN[5] DDR0_DQSP[7]/DDR1_D QSP[5]

DDR CH - A

2 OF 20

Interleave

DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]

DDR0_DQSN[2] DDR0_DQSP[2] DDR0_DQSN[3] DDR0_DQSP[3]

DDR0_DQSN[4] DDR0_DQSP[4] DDR0_DQSN[5] DDR0_DQSP[5]

DDR0_DQSN[6] DDR0_DQSP[6] DDR0_DQSN[7] DDR0_DQSP[7]

LOGIC

DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1]

DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3]

DDR0_CS#[0] DDR0_CS#[1] DDR0_ODT[0] DDR0_ODT[1]

DDR0_MA[3] DDR0_MA[4]

DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]

DDR0_ALERT#

DDR0_PAR

DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ

DDR_VTT_CNTL

Non-Interleave

DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]

DDR0_DQSN[4] DDR0_DQSP[4] DDR0_DQSN[5] DDR0_DQSP[5]

DDR1_DQSN[0] DDR1_DQSP[0] DDR1_DQSN[1] DDR1_DQSP[1]

DDR1_DQSN[4] DDR1_DQSP[4] DDR1_DQSN[5] DDR1_DQSP[5]

3

AU53 AT53 AU55 AT55

BA56 BB56 AW56 AY56

AU45 AU43 AT45 AT43

BA51 BB54 BA52 AY52 AW52 AY55 AW54 BA54 BA55 AY54

AU46 AU48 AT46 AU50 AU52 AY51 AT48 AT50 BB50 AY50 BA50 BB52

AM70 AM69 AT69 AT70 BA64 AY64 AY60 BA60 BA38 AY38 AY34 BA34 BA30 AY30 AY26 BA26

AW50 AT52

AY67 AY68 BA67

AW67

-M_A_DDRCLK0_1066M M_A_DDRCLK0_1066 M

M_A_CKE0

-M_A_CS0

M_A_ODT0

M_A_A5 M_A_A9 M_A_A6 M_A_A8 M_A_A7

M_A_A12 M_A_A11

M_A_A13 M_A_A15 M_A_A14 M_A_A16

M_A_A2

M_A_A10 M_A_A1 M_A_A0 M_A_A3 M_A_A4

-M_A_DQS0 M_A_DQS0

-M_A_DQS1 M_A_DQS1

-M_A_DQS2 M_A_DQS2

-M_A_DQS3 M_A_DQS3

-M_A_DQS4 M_A_DQS4

-M_A_DQS5 M_A_DQS5

-M_A_DQS6 M_A_DQS6

-M_A_DQS7 M_A_DQS7

-M_A_ALERT M_A_PARITY

DDR_PG_CTRL

VCC1R2A

R1858 10K_0201_5%

1 2

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

-M_A_DDRCLK0_1066M 22,23 M_A_DDRCLK0_1066 M 2 2,23

M_A_CKE0 22,23

-M_A_CS0 22,23

M_A_ODT0 22,23

-M_A_ALERT 22,23

M_A_PARITY 22 ,23

M_A_VREF_CA_CPU 23

M_B_VREF_CA_CPU 24

VCC3M

R1838 100K_0201_5%

1 2

1

Q170

2

DTC115TMT2L_VMT3

3

2012/07/01

M_A_BG0

-M_A_ACT M_A_BG1

M_A_BS0

M_A_BS1

DDR_VTT_PG_CTRL

LC Future Center Secret Data

2

M_A_BG0 22,23

-M_A_ACT 22,23 M_A_BG1 22

M_A_BS0 22,23

M_A_BS1 22,23

M_A_A[16:0] 22 ,23

-M_A_DQS[7:0] 22

M_A_DQS[7:0] 22

DDR_VTT_PG_CTRL 83

Deciphered Date

TAB LE

BA51 BB54 BA52 AY 52

AW52 AY5 5 AW54 BA54 BA55 AY5 4

AU46 AU48 AT4 6 AU50 AU52 AY 51 AT4 8 AT5 0 BB50 AY 50 BA50 BB52

2014/07/01

DDR3L LPDDR3 DDR4

DDR0_MA[5] DDR0_MA[9] DDR0_MA[6] DDR0_MA[8] DDR0_MA[7]

DDR0_BA[2] DDR0_MA[12] DDR0_MA[11] DDR0_MA[15] DDR0_MA[14]

DDR0_MA[13]

DDR0_CAS# DDR0_WE# DDR0_RAS# DDR0_BA[0] DDR0_MA[2] DDR0_BA[1] DDR0_MA[10] DDR0_MA[1] DDR0_MA[0] DDR0_MA[3] DDR0_MA[4]

Title

Size

Date: Sheet of

DDR0_CAA[0] DDR0_CAA[1] DDR0_CAA[2] DDR0_CAA[3] DDR0_CAA[4] DDR0_CAA[5] DDR0_CAA[6] DDR0_CAA[7] DDR0_CAA[8] DDR0_CAA[9]

DDR0_CAB[0] DDR0_CAB[1] DDR0_CAB[2] DDR0_CAB[3] DDR0_CAB[4] DDR0_CAB[5] DDR0_CAB[6] DDR0_CAB[7] DDR0_CAB[8] DDR0_CAB[9] Not Used Not Used

CPU(2/16) : DDR CHANNEL-A

Document Number Rev

Custom

Thorpe-2 UMA

Wednesday, October 26, 2016

1

DDR0_MA[5] DDR0_MA[9] DDR0_MA[6] DDR0_MA[8] DDR0_MA[7] DDR0_BG[0] DDR0_MA[12] DDR0_MA[11] DDR0_ACT# DDR0_BG[1]

DDR0_MA[13] DDR0_MA[15] DDR0_MA[14] DDR0_MA[16]

DDR0_BA[0] DDR0_MA[2] DDR0_BA[1] DDR0_MA[10] DDR0_MA[1] DDR0_MA[0] DDR0_MA[3] DDR0_MA[4]

LOGIC

4 103

0.01

U58B

AL71

DDR0_DQ[0]

AL68

DDR0_DQ[1]

AN68

DDR0_DQ[2]

AN69

DDR0_DQ[3]

AL70

DDR0_DQ[4]

AL69

DDR0_DQ[5]

AN70

DDR0_DQ[6]

AN71

DDR0_DQ[7]

AR70

DDR0_DQ[8]

AR68

DDR0_DQ[9]

AU71

DDR0_DQ[10]

AU68

DDR0_DQ[11]

AR71

DDR0_DQ[12]

AR69

DDR0_DQ[13]

AU70

DDR0_DQ[14]

AU69

DDR0_DQ[15]

BB65

DDR0_DQ[16]/DDR0_DQ [32]

AW65

DDR0_DQ[17]/DDR0_DQ [33]

AW63

DDR0_DQ[18]/DDR0_DQ [34]

AY63

DDR0_DQ[19]/DDR0_DQ [35]

BA65

DDR0_DQ[20]/DDR0_DQ [36]

AY65

DDR0_DQ[21]/DDR0_DQ [37]

BA63

DDR0_DQ[22]/DDR0_DQ [38]

BB63

DDR0_DQ[23]/DDR0_DQ [39]

BA61

DDR0_DQ[24]/DDR0_DQ [40]

AW61

DDR0_DQ[25]/DDR0_DQ [41]

BB59

DDR0_DQ[26]/DDR0_DQ [42]

AW59

DDR0_DQ[27]/DDR0_DQ [43]

BB61

DDR0_DQ[28]/DDR0_DQ [44]

AY61

DDR0_DQ[29]/DDR0_DQ [45]

BA59

DDR0_DQ[30]/DDR0_DQ [46]

AY59

DDR0_DQ[31]/DDR0_DQ [47]

AY39

DDR0_DQ[32]/DDR1_DQ [0]

AW39

DDR0_DQ[33]/DDR1_DQ [1]

AY37

DDR0_DQ[34]/DDR1_DQ [2]

AW37

DDR0_DQ[35]/DDR1_DQ [3]

BB39

DDR0_DQ[36]/DDR1_DQ [4]

BA39

DDR0_DQ[37]/DDR1_DQ [5]

BA37

DDR0_DQ[38]/DDR1_DQ [6]

BB37

DDR0_DQ[39]/DDR1_DQ [7]

AY35

DDR0_DQ[40]/DDR1_DQ [8]

AW35

DDR0_DQ[41]/DDR1_DQ [9]

AY33

DDR0_DQ[42]/DDR1_DQ [10]

AW33

DDR0_DQ[43]/DDR1_DQ [11]

BB35

DDR0_DQ[44]/DDR1_DQ [12]

BA35

DDR0_DQ[45]/DDR1_DQ [13]

BA33

DDR0_DQ[46]/DDR1_DQ [14]

BB33

DDR0_DQ[47]/DDR1_DQ [15]

AY31

DDR0_DQ[48]/DDR1_DQ [32]

AW31

DDR0_DQ[49]/DDR1_DQ [33]

AY29

DDR0_DQ[50]/DDR1_DQ [34]

AW29

DDR0_DQ[51]/DDR1_DQ [35]

BB31

DDR0_DQ[52]/DDR1_DQ [36]

BA31

DDR0_DQ[53]/DDR1_DQ [37]

BA29

DDR0_DQ[54]/DDR1_DQ [38]

BB29

DDR0_DQ[55]/DDR1_DQ [39]

AY27

DDR0_DQ[56]/DDR1_DQ [40]

AW27

DDR0_DQ[57]/DDR1_DQ [41]

AY25

DDR0_DQ[58]/DDR1_DQ [42]

AW25

DDR0_DQ[59]/DDR1_DQ [43]

BB27

DDR0_DQ[60]/DDR1_DQ [44]

BA27

DDR0_DQ[61]/DDR1_DQ [45]

BA25

DDR0_DQ[62]/DDR1_DQ [46]

BB25

DDR0_DQ[63]/DDR1_DQ [47]

Kaby lake-U_BGA1356

TAB LE

AM70 AM69 AT6 9

Block 0

AT7 0

BA64 AY 64 AY 60

Block 2

BA60

BA38 AY 38 AY 34

Block 4

BA34

BA30 AY 30 AY 26

Block 6

BA26

4

5

4

3

2

1

D D

M_B_DQ[63:0]24

TAB LE

AF65 AF64 AK65 AK64 AF66 AF67 AK67 AK66 AF70

Block 1

AF68 AH71 AH68 AF71 AF69 AH70 AH69

C C

B B

A A

Block 3

Block 5

Block 7

AT6 6

AU66 AP65 AN65 AN66 AP66 AT6 5 AU65 AT6 1 AU61 AP60 AN60 AN61 AP61 AT6 0 AU60

AU40 AT4 0 AT3 7 AU37 AR40 AP40 AP37 AR37 AT3 3 AU33 AU30 AT3 0 AR33 AP33 AR30 AP30

AU27 AT2 7 AT2 5 AU25 AP27 AN27 AN25 AP25 AT2 2 AU22 AU21 AT2 1 AN22 AP22 AP21 AN21

Interleave

DDR1_DQ[0] DDR1_DQ[1] DDR1_DQ[2] DDR1_DQ[3] DDR1_DQ[4] DDR1_DQ[5] DDR1_DQ[6] DDR1_DQ[7] DDR1_DQ[8] DDR1_DQ[9] DDR1_DQ[10] DDR1_DQ[11] DDR1_DQ[12] DDR1_DQ[13] DDR1_DQ[14] DDR1_DQ[15]

DDR1_DQ[16] DDR1_DQ[17] DDR1_DQ[18] DDR1_DQ[19] DDR1_DQ[20] DDR1_DQ[21] DDR1_DQ[22] DDR1_DQ[23] DDR1_DQ[24] DDR1_DQ[25] DDR1_DQ[26] DDR1_DQ[27] DDR1_DQ[28] DDR1_DQ[29] DDR1_DQ[30] DDR1_DQ[31]

DDR1_DQ[32] DDR1_DQ[33] DDR1_DQ[34] DDR1_DQ[35] DDR1_DQ[36] DDR1_DQ[37] DDR1_DQ[38] DDR1_DQ[39] DDR1_DQ[40] DDR1_DQ[41] DDR1_DQ[42] DDR1_DQ[43] DDR1_DQ[44] DDR1_DQ[45] DDR1_DQ[46] DDR1_DQ[47]

DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]

LOGIC

5

Non-Interleave

DDR0_DQ[16] DDR0_DQ[17] DDR0_DQ[18] DDR0_DQ[19] DDR0_DQ[20] DDR0_DQ[21] DDR0_DQ[22] DDR0_DQ[23] DDR0_DQ[24] DDR0_DQ[25] DDR0_DQ[26] DDR0_DQ[27] DDR0_DQ[28] DDR0_DQ[29] DDR0_DQ[30] DDR0_DQ[31]

DDR0_DQ[48] DDR0_DQ[49] DDR0_DQ[50] DDR0_DQ[51] DDR0_DQ[52] DDR0_DQ[53] DDR0_DQ[54] DDR0_DQ[55] DDR0_DQ[56] DDR0_DQ[57] DDR0_DQ[58] DDR0_DQ[59] DDR0_DQ[60] DDR0_DQ[61] DDR0_DQ[62] DDR0_DQ[63]

DDR1_DQ[16] DDR1_DQ[17] DDR1_DQ[18] DDR1_DQ[19] DDR1_DQ[20] DDR1_DQ[21] DDR1_DQ[22] DDR1_DQ[23] DDR1_DQ[24] DDR1_DQ[25] DDR1_DQ[26] DDR1_DQ[27] DDR1_DQ[28] DDR1_DQ[29] DDR1_DQ[30] DDR1_DQ[31]

DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]

M_B_DQ4 M_B_DQ5 M_B_DQ7 M_B_DQ6 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ10 M_B_DQ14 M_B_DQ13 M_B_DQ9 M_B_DQ11 M_B_DQ15 M_B_DQ8 M_B_DQ12 M_B_DQ16 M_B_DQ23 M_B_DQ17 M_B_DQ21 M_B_DQ20 M_B_DQ18 M_B_DQ19 M_B_DQ22 M_B_DQ28 M_B_DQ24 M_B_DQ31 M_B_DQ27 M_B_DQ29 M_B_DQ25 M_B_DQ30 M_B_DQ26 M_B_DQ36 M_B_DQ33 M_B_DQ34 M_B_DQ38 M_B_DQ32 M_B_DQ37 M_B_DQ39 M_B_DQ35 M_B_DQ40 M_B_DQ44 M_B_DQ42 M_B_DQ46 M_B_DQ41 M_B_DQ45 M_B_DQ43 M_B_DQ47 M_B_DQ54 M_B_DQ52 M_B_DQ55 M_B_DQ50 M_B_DQ49 M_B_DQ53 M_B_DQ48 M_B_DQ51 M_B_DQ56 M_B_DQ61 M_B_DQ57 M_B_DQ59 M_B_DQ60 M_B_DQ62 M_B_DQ63 M_B_DQ58

4

AF65 AF64 AK65 AK64 AF66 AF67 AK67 AK66 AF70 AF68 AH71 AH68 AF71 AF69 AH70 AH69 AT66 AU66 AP65 AN65 AN66 AP66 AT65 AU65 AT61 AU61 AP60 AN60 AN61 AP61 AT60 AU60 AU40 AT40 AT37 AU37 AR40 AP40 AP37 AR37 AT33 AU33 AU30 AT30 AR33 AP33 AR30 AP30 AU27 AT27 AT25 AU25 AP27 AN27 AN25 AP25 AT22 AU22 AU21 AT21 AN22 AP22 AP21 AN21

TAB LE

Block 1

Block 3

Block 5

Block 7

U58C

DDR1_DQ[0]/DDR0_DQ[1 6] DDR1_DQ[1]/DDR0_DQ[1 7] DDR1_DQ[2]/DDR0_DQ[1 8] DDR1_DQ[3]/DDR0_DQ[1 9] DDR1_DQ[4]/DDR0_DQ[2 0] DDR1_DQ[5]/DDR0_DQ[2 1] DDR1_DQ[6]/DDR0_DQ[2 2] DDR1_DQ[7]/DDR0_DQ[2 3] DDR1_DQ[8]/DDR0_DQ[2 4] DDR1_DQ[9]/DDR0_DQ[2 5] DDR1_DQ[10]/DDR0_DQ [26] DDR1_DQ[11]/DDR0_DQ [27] DDR1_DQ[12]/DDR0_DQ [28] DDR1_DQ[13]/DDR0_DQ [29] DDR1_DQ[14]/DDR0_DQ [30] DDR1_DQ[15]/DDR0_DQ [31] DDR1_DQ[16]/DDR0_DQ [48] DDR1_DQ[17]/DDR0_DQ [49] DDR1_DQ[18]/DDR0_DQ [50] DDR1_DQ[19]/DDR0_DQ [51] DDR1_DQ[20]/DDR0_DQ [52] DDR1_DQ[21]/DDR0_DQ [53] DDR1_DQ[22]/DDR0_DQ [54] DDR1_DQ[23]/DDR0_DQ [55] DDR1_DQ[24]/DDR0_DQ [56] DDR1_DQ[25]/DDR0_DQ [57] DDR1_DQ[26]/DDR0_DQ [58] DDR1_DQ[27]/DDR0_DQ [59] DDR1_DQ[28]/DDR0_DQ [60] DDR1_DQ[29]/DDR0_DQ [61] DDR1_DQ[30]/DDR0_DQ [62] DDR1_DQ[31]/DDR0_DQ [63] DDR1_DQ[32]/DDR1_DQ [16] DDR1_DQ[33]/DDR1_DQ [17] DDR1_DQ[34]/DDR1_DQ [18] DDR1_DQ[35]/DDR1_DQ [19] DDR1_DQ[36]/DDR1_DQ [20] DDR1_DQ[37]/DDR1_DQ [21] DDR1_DQ[38]/DDR1_DQ [22] DDR1_DQ[39]/DDR1_DQ [23] DDR1_DQ[40]/DDR1_DQ [24] DDR1_DQ[41]/DDR1_DQ [25] DDR1_DQ[42]/DDR1_DQ [26] DDR1_DQ[43]/DDR1_DQ [27] DDR1_DQ[44]/DDR1_DQ [28] DDR1_DQ[45]/DDR1_DQ [29] DDR1_DQ[46]/DDR1_DQ [30] DDR1_DQ[47]/DDR1_DQ [31] DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]

Kaby lake-U_BGA1356

AH66 AH65 AG69 AG70

AR66 AR65 AR61 AR60

AT3 8

AR38 AT3 2 AR32

AR25 AR27 AR22 AR21

SKL_ULT

DDR1_MA[5]/DDR1_CAA[0 ]/DDR1_MA[5] DDR1_MA[9]/DDR1_CAA[1 ]/DDR1_MA[9] DDR1_MA[6]/DDR1_CAA[2 ]/DDR1_MA[6] DDR1_MA[8]/DDR1_CAA[3 ]/DDR1_MA[8] DDR1_MA[7]/DDR1_CAA[4 ]/DDR1_MA[7]

DDR1_BA[2]/DDR1_CAA [5]/DDR1_BG[0] DDR1_MA[12]/DDR1_CAA [6]/DDR1_MA[12] DDR1_MA[11]/DDR1_CAA [7]/DDR1_MA[11]

DDR1_MA[15]/DDR1_CAA [8]/DDR1_ACT# DDR1_MA[14]/DDR1_CAA [9]/DDR1_BG[1]

DDR1_MA[13]/DDR1_CAB [0]/DDR1_MA[13]

DDR1_CAS#/DDR1_C AB[1]/DDR1_MA[15]

DDR1_WE#/DDR1_ CAB[2]/DDR1_MA[14]

DDR1_RAS#/DDR1_C AB[3]/DDR1_MA[16]

DDR1_BA[0]/DDR1_CAB [4]/DDR1_BA[0]

DDR1_MA[2]/DDR1_CAB[5 ]/DDR1_MA[2]

DDR1_BA[1]/DDR1_CAB [6]/DDR1_BA[1] DDR1_MA[10]/DDR1_CAB [7]/DDR1_MA[10]

DDR1_MA[1]/DDR1_CAB[8 ]/DDR1_MA[1] DDR1_MA[0]/DDR1_CAB[9 ]/DDR1_MA[0]

DDR1_DQSN[0]/DDR0_D QSN[2] DDR1_DQSP[0]/DDR0_D QSP[2] DDR1_DQSN[1]/DDR0_D QSN[3] DDR1_DQSP[1]/DDR0_D QSP[3] DDR1_DQSN[2]/DDR0_D QSN[6] DDR1_DQSP[2]/DDR0_D QSP[6] DDR1_DQSN[3]/DDR0_D QSN[7] DDR1_DQSP[3]/DDR0_D QSP[7] DDR1_DQSN[4]/DDR1_D QSN[2] DDR1_DQSP[4]/DDR1_D QSP[2] DDR1_DQSN[5]/DDR1_D QSN[3] DDR1_DQSP[5]/DDR1_D QSP[3]

DDR CH - B

3 OF 20

Interleave

DDR1_DQSN[0] DDR1_DQSP[0] DDR1_DQSN[1] DDR1_DQSP[1]

DDR1_DQSN[2] DDR1_DQSP[2] DDR1_DQSN[3] DDR1_DQSP[3]

DDR1_DQSN[4] DDR1_DQSP[4] DDR1_DQSN[5] DDR1_DQSP[5]

DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]

LOGIC

DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[0] DDR1_CKP[1]

DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3]

DDR1_CS#[0] DDR1_CS#[1] DDR1_ODT[0] DDR1_ODT[1]

DDR1_MA[3] DDR1_MA[4]

DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]

DDR1_ALERT#

DDR1_PAR DRAM_RESET# DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2]

Non-Interleave

DDR0_DQSN[2] DDR0_DQSP[2] DDR0_DQSN[3] DDR0_DQSP[3]

DDR0_DQSN[6] DDR0_DQSP[6] DDR0_DQSN[7] DDR0_DQSP[7]

DDR1_DQSN[2] DDR1_DQSP[2] DDR1_DQSN[3] DDR1_DQSP[3]

DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]

3

AN45 AN46 AP45 AP46

AN56 AP55 AN55 AP53

BB42 AY42 BA42 AW42

AY48 AP50 BA48 BB48 AP48 AP52 AN50 AN48 AN53 AN52

BA43 AY43 AY44 AW44 BB44 AY47 BA44 AW46 AY46 BA46 BB46 BA47

AH66 AH65 AG69 AG70 AR66 AR65 AR61 AR60 AT38 AR38 AT32 AR32 AR25 AR27 AR22 AR21

AN43 AP43 AT13 AR18 AT18 AU18

-M_B_DDRCLK0_1066M

-M_B_DDRCLK1_1066M M_B_DDRCLK0_1066 M M_B_DDRCLK1_1066 M

M_B_CKE0 M_B_CKE1

-M_B_CS0

-M_B_CS1 M_B_ODT0 M_B_ODT1

M_B_A5 M_B_A9 M_B_A6 M_B_A8 M_B_A7

M_B_A12 M_B_A11

M_B_A13 M_B_A15 M_B_A14 M_B_A16

M_B_A2

M_B_A10 M_B_A1 M_B_A0 M_B_A3 M_B_A4

-M_B_DQS0 M_B_DQS0

-M_B_DQS1 M_B_DQS1

-M_B_DQS2 M_B_DQS2

-M_B_DQS3 M_B_DQS3

-M_B_DQS4 M_B_DQS4

-M_B_DQS5 M_B_DQS5

-M_B_DQS6 M_B_DQS6

-M_B_DQS7 M_B_DQS7

1 2

R7 121_0201_1%

1 2

R84 80.6_0201_1%

1 2

R576 100_0201_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

-M_B_DDRCLK0_1066M 24

-M_B_DDRCLK1_1066M 24 M_B_DDRCLK0_1066 M 24 M_B_DDRCLK1_1066 M 24

M_B_CKE0 24 M_B_CKE1 24

-M_B_CS0 24

-M_B_CS1 24 M_B_ODT0 24 M_B_ODT1 24

M_B_BG0

-M_B_ACT M_B_BG1

M_B_BS0

M_B_BS1

VCC1R2A

R1726 470_0201_5%

1 2

-M_B_ALERT M_B_PARITY

-DRAMRST

2012/07/01

M_B_BG0 24

-M_B_ACT 24 M_B_BG1 24

M_B_BS0 24

M_B_BS1 24

M_B_A[16:0] 24

-M_B_DQS[7:0] 24

M_B_DQS[7:0] 24

-M_B_ALERT 24 M_B_PARITY 24

-DRAMRST 22,24

LC Future Center Secret Data

Deciphered Date

2

TAB LE

AY48

AP50 BA48 BB48 AP48 AP52 AN50 AN48 AN53 AN52

BA43 AY 43 AY 44

AW44 BB44 AY4 7 BA44 AW46 AY4 6 BA46 BB46 BA47

2014/07/01

DDR3L LPDDR3 DDR4

DDR1_MA[5] DDR1_MA[9] DDR1_MA[6] DDR1_MA[8] DDR1_MA[7]

DDR1_BA[2] DDR1_MA[12] DDR1_MA[11] DDR1_MA[15] DDR1_MA[14]

DDR1_MA[13]

DDR1_CAS# DDR1_WE# DDR1_RAS# DDR1_BA[0] DDR1_MA[2] DDR1_BA[1] DDR1_MA[10] DDR1_MA[1] DDR1_MA[0] DDR1_MA[3] DDR1_MA[4]

Title

Size

Date: Sheet of

DDR1_CAA[0] DDR1_CAA[1] DDR1_CAA[2] DDR1_CAA[3] DDR1_CAA[4] DDR1_CAA[5] DDR1_CAA[6] DDR1_CAA[7] DDR1_CAA[8] DDR1_CAA[9]

DDR1_CAB[0] DDR1_CAB[1] DDR1_CAB[2] DDR1_CAB[3] DDR1_CAB[4] DDR1_CAB[5] DDR1_CAB[6] DDR1_CAB[7] DDR1_CAB[8] DDR1_CAB[9] Not Used Not Used

CPU(3/16) : DDR CHANNEL-B

Document Number Rev

Custom

Thorpe-2 UMA

Wednesday, October 26, 2016

1

DDR1_MA[5] DDR1_MA[9] DDR1_MA[6] DDR1_MA[8] DDR1_MA[7] DDR1_BG[0] DDR1_MA[12] DDR1_MA[11] DDR1_ACT# DDR1_BG[1]

DDR1_MA[13] DDR1_MA[15] DDR1_MA[14] DDR1_MA[16]

DDR1_BA[0] DDR1_MA[2] DDR1_BA[1] DDR1_MA[10] DDR1_MA[1] DDR1_MA[0] DDR1_MA[3] DDR1_MA[4]

LOGIC

5 103

0.01

5

D D

4

VCCSTG VCCST

3

2

1

C C

PECI59

-PROCHOT58,59,71,75

B B

A A

PECI

-PROCHOT

R64 1K_0201_5%

1 2

1

TP1 Tes t_Point_40MIL

1 2

R85 510_0201_5%

1 2

R2126 49.9_0201_1%

1 2

R2127 49.9_0201_1%

1 2

R2128 49.9_0201_1%

1 2

R2129 49.9_0201_1%

R9055 1K_0201_5%

1 2

AT16 AU16

D63 A54 C65 C63 A65

C55 D55 B54 C56

A6

A7 BA5 AY5

H66 H65

U58D

CATERR# PECI PROCHOT# THERMTRIP# SKTOCC#

CPU MISC

BPM#[0] BPM#[1] BPM#[2] BPM#[3]

GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3

PROC_POPIRCOMP PCH_OPIRCOMP OPCE_RCOMP OPC_RCOMP

Kaby lake-U_BGA1356

SKL_ULT

4 OF 20

JTAG

PROC_TCK

PROC_TDI PROC_TDO PROC_TMS

PROC_TRST#

PCH_JTAG_TCK

PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS

PCH_TRST#

JTAGX

B61 D60 A61 C60 B59

B56 D59 A56 C59 C61 A59

R2 51_0201_5%

1 2

R10228 0_0201_5%EMC@

1 2

R10229 0_0201_5%EMC@

1 2

R10230 0_0201_5%EMC@

1 2

R10231 0_0201_5%EMC@

1 2

R10232 0_0201_5%EMC@

1 2

R2494 0_0201_5%EMC@

XDP_TCK0 XDP_TDI XDP_TDO XDP_TMS

-XDP_TRST

XDP_TCK0 19 XDP_TDI 19 XDP_TDO 19 XDP_TMS 19

-XDP_TRST 19

PCH_TCK 19

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

CPU(4/16) : MISC/JTAG

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

6 103

0.01

5

TABLE : Functional Strap

SPI0_MOSI (Boot Halt)

HIGH

Disabled (Default)

LOW

Enabled

4

3

2

1

TABLE : Functional Strap

D D

C C

B B

SPI0_MISO (JTAG ODT Disable)

HIGH

Enabled (Default)

LOW

Disabled

VCC3_SUSVCC3B

@

R272

@

1 2

R2559 1K_0201_5%

10K_0201_5%

1 2

AW13

AY11

AV2

AW3

AV3

AW2

AU4 AU3 AU2 AU1

M2 M3

J4 V1 V2 M1

G3 G2 G1

SPI0_CLK SPI0_MISO SPI0_MOSI SPI0_IO2 SPI0_IO3 SPI0_CS0# SPI0_CS1# SPI0_CS2#

GPP_D1/SPI1_CLK GPP_D2/SPI1_MISO GPP_D3/SPI1_MOSI GPP_D21/SPI1_IO2 GPP_D22/SPI1_IO3 GPP_D0/SPI1_CS#

CL_CLK CL_DATA CL_RST#

GPP_A0/RCIN#

GPP_A6/SERIRQ

1 2

R860 8.2K_0201_5%

SPI_CLK21,65 SPI_MISO_IO121,65 SPI_MOSI_IO021,65 SPI_IO221 SPI_IO321

-SPI_CS021

-SPI_CS265

DOCKID[3:0]57

-DOCK_CAP_ID57

-NFC_DTCT62

CL_CLK_WLAN46 CL_DATA_WLAN46

-CL_RST_WLAN46

-KBRC58

IRQSER58,66

CL_DATA_WLAN

-CL_RST_WLAN

-NFC_DTCT

CL_CLK_WLAN

DOCKID1 DOCKID2 DOCKID3

DOCKID0

TABLE : Functional Strap

GPP_C5/SML0ALERT # (LPC or eSPI)

HIGH

LOW

TABLE : Functional Strap

GPP_C2/SMBALERT# (TLS Confidentiality)

HIGH

LOW

U58E

SPI - FLASH

SPI - TOUCH

C LINK

Kaby lake-U_BGA1356

TABLE : Functional Strap

SPI0_IO2 (Consent Strap)

HIGH

LOW

eSPI is selected

LPC is selected (Default) LOGIC

Enable ME Crypto TLS with Confidentiality

Disable ME Crypto TLS (Default)

SKL_ULT

SMBUS, SMLINK

GPP_C0/SMBCLK

GPP_C1/SMBDATA

GPP_C2/SMBALERT#

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT#

GPP_C6/SML1CLK

GPP_C7/SML1DATA

GPP_B23/SML1ALERT#/P CHHOT#

LPC

5 OF 20

Enabled (Default)

Disabled

GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3

GPP_A5/LFRAME#/ESPI_ CS#

GPP_A14/SUS_STAT#/ESP I_RESET#

GPP_A9/CLKOUT_LPC0 /ESPI_CLK

GPP_A10/CLKOUT_LPC 1

GPP_A8/CLKRUN#

R7 R8 R10

R9 W2 W1

W3 V3 AM7

AY13 BA13 BB13 AY12 BA12 BA11

AW9 AY9 AW11

VCC3_SUS

1 2

R226 1K_0201_5%

LPCCLK_0 LPCCLK_1

LOGIC

1 2

R106 499_0201_1%

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

R107 499_0201_1%

1 2

R193 33_0201_5%EMC@

1 2

R220 0_0201_5%EMC_NS@

1 2

2

C9515

1

EMC_NS@

R394

4.7K_0201_5%

C9516

33P_0402_50V8-J

EMC_NS@

2

1

1 2

33P_0402_50V8-J

R397

4.7K_0201_5%

LPC_AD[3:0] 58,66

-LPC_FRAME 5 8,66

-SUS_STAT 58,66

LPCCLK_EC_24M 58 LPCCLK_DEBUG_24M 66

VCC3B

1 2

R28 8.2K_0201_5%

SMB_CLK SMB_DATA

SML0_CLK SML0_DATA

EC_SCL2 EC_SDA2

SMB_CLK 66 SMB_DATA 66

SML0_CLK 34,62 SML0_DATA 34,62

EC_SCL2 59 EC_SDA2 59

-CLKRUN 58,66

TABLE : Functional Strap

SPI0_IO3 (A0 Personality Strap)

HIGH

Disabled (Default)

LOW

Enabled

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

CPU(5/16) : LPC/SPI/SMBUS/C-LINK

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

7 103

0.01

5

4

3

2

1

D D

1 2

R884 10K_0201_5%

R2340 10K_0201_5%

NFC_DLREQ62

C C

-TBT_PLUG_EVENT100 TBT_FORCE_PWR100

-EC_SCI58

-EC_WAKE58

I2C0_DATA62 I2C0_CLK62

-WWAN_RESET46

-INT_MIC_DTCT26

WWAN_CFG046 WWAN_CFG146

B B

-MIC_HW_EN

R961 0_0201_5%

1 2

TABLE : Functional Strap

VCC3_SUS VCC3_SUS

GPP_B22/GSPI1_MOSI (Boot BIOS Destination)

HIGH

Boot BIOS from LPC

LOW

Boot BIOS from SPI (Default) LOGIC

TABLE : Functional Strap

GPP_B18/GSPI0_MOSI (No Reboot)

@

1 2

R65 1K_0201_5%

U58F

AN8

GPP_B15/GSPI0_CS#

AP7

GPP_B16/GSPI0_CLK

AP8

GPP_B17/GSPI0_MISO

AR7

GPP_B18/GSPI0_MOSI

AM5

GPP_B19/GSPI1_CS#

AN7

GPP_B20/GSPI1_CLK

AP5

GPP_B21/GSPI1_MISO

AN5

GPP_B22/GSPI1_MOSI

AB1

GPP_C8/UART0_RXD

AB2

GPP_C9/UART0_TXD

W4

GPP_C10/UART0_RTS#

AB3

GPP_C11/UART0_CTS#

AD1

GPP_C20/UART2_RXD

AD2

GPP_C21/UART2_TXD

AD3

GPP_C22/UART2_RTS#

AD4

GPP_C23/UART2_CTS#

U7

GPP_C16/I2C0_SDA

U6

GPP_C17/I2C0_SCL

U8

GPP_C18/I2C1_SDA

U9

GPP_C19/I2C1_SCL

AH9

GPP_F4/I2C2_SDA

AH10

GPP_F5/I2C2_SCL

AH11

GPP_F6/I2C3_SDA

AH12

GPP_F7/I2C3_SCL

AF11

GPP_F8/I2C4_SDA

AF12

GPP_F9/I2C4_SCL

Kaby lake-U_BGA1356

HIGH

Enable "No Reboot" Mode

LOW

Disable "No Reboot" Mode (Default)

LPSS ISH

SKL_ULT

GPP_D13/ISH_UART0_R XD/SML0BDATA/I2C4B_SDA

GPP_D14/ISH_UART0_TXD/SML0 BCLK/I2C4B_SCL

GPP_D16/ISH_UART0_C TS#/SML0BALERT#

GPP_C12/UART1_RXD/ISH_U ART1_RXD

GPP_C14/UART1_RTS#/IS H_UART1_RTS# GPP_C15/UART1_CTS#/IS H_UART1_CTS#

6 OF 20

GPP_D9 GPP_D10 GPP_D11 GPP_D12

GPP_D5/ISH_I2C0_SDA GPP_D6/ISH_I2C0_SCL

GPP_D7/ISH_I2C1_SDA GPP_D8/ISH_I2C1_SCL

GPP_F10/I2C5_SDA/ISH _I2C2_SDA

GPP_F11/I2C5_SCL/ISH _I2C2_SCL

GPP_D15/ISH_UART0_R TS#

GPP_C13/UART1_TXD/ISH_UA RT1_TXD

GPP_A18/ISH_GP0 GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5

GPP_A12/BM_BUSY#/ISH_GP 6

P2 P3 P4 P1

M4 N3

N1 N2

AD11 AD12

U1 U2 U3 U4

AC1 AC2 AC3 AB4

AY8 BA8 BB7 BA7 AY7 AW7 AP13

1 2

R10233 10K_0201_5%

WWAN_CFG2 46 WWAN_CFG3 46

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

CPU(6/16) : LPSS/ISH

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

8 103

0.01

5

D D

4

3

2

1

VCC3_SUS

1 2

R846 1K_0201_5%

VCC3_SUS

1 2

HDA_SYNC50 HDA_BCLK50

HDA_SDO50

HDA_SDIN050

-HDA_RST50

C C

DDI_PRIORITY229

PCH_SPKR55

B B

PCH_SPKR

R423 33_0201_5% R60 33_0201_5%EMC@ R74 33_0201_5%EMC@

R456 33_0201_5%

2

C38 22P_0201_25V8-J

1

1 2 1 2

1 2

NFC_ACTIVE62

R1009 1K_0201_5%

PLACE ON TOP SIDE

1 2

R566 0_0603_5%@

VCC3_SUS

TP901

1

TEST PAD

Test_Point_40MIL

BOTTOM SIDE DO NOT MOVE AFTER FIX

HDA_SYNC_R HDA_BCLK_R HDA_SDO_R

-HDA_RST_R

@

1 2

R10226 0_0201_5%

TP900

1

Test_Point_40MIL

NFC_ACTIVE_R

TABLE : Functional Strap

HDA_SDO/I2S0_TXD

Flash Descriptor Security Override

HIGH

Disable Flash Descriptor Security (Override)

LOW

Enable Flash Descriptor Security (Default)

U58G

AUDIO

BA22

HDA_SYNC/I2S0_SFRM

AY22

HDA_BLK/I2S0_SCLK

BB22

HDA_SDO/I2S0_TXD

BA21

HDA_SDI0/I2S0_RXD

AY21

HDA_SDI1/I2S1_RXD

AW22

HDA_RST#/I2S1_SCLK

J5

GPP_D23/I2S_MCLK

AY20

I2S1_SFRM

AW20

I2S1_TXD

AK7

GPP_F1/I2S2_SFRM

AK6

GPP_F0/I2S2_SCLK

AK9

GPP_F2/I2S2_TXD

AK10

GPP_F3/I2S2_RXD

H5

GPP_D19/DMIC_CLK0

D7

GPP_D20/DMIC_DATA0

D8

GPP_D17/DMIC_CLK1

C8

GPP_D18/DMIC_DATA1

AW5

GPP_B14/SPKR

Kaby lake-U_BGA1356

TABLE : Functional Strap

GPP_B14/SPKR (Top Sw ap Override)

HIGH

Enable "Top Swap" Mode

LOW

Disable "Top Swap" Mode (Default) LOGIC

SKL_ULT

7 OF 20

SDIO/SDXC

GPP_G0/SD_CMD GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3

GPP_G5/SD_CD# GPP_G6/SD_CLK

GPP_G7/SD_WP

GPP_A17/SD_PWR _EN#/ISH_GP7

GPP_A16/SD_1P8_SE L

SD_RCOMP

GPP_F23

AB11 AB13 AB12 W12 W11 W10 W8 W7

BA9 BB9

AB7

AF13

1 2

R2131 200_0201_1%

-SC_DTCT 62DDI_PRIORITY129

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

CPU(7/16) : AUDIO/SDXC

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

9 103

0.01

5

I/O High Speed Signals Configuration Net Name

Port 1

Port 2

Port 3

Port 4

Port 5

Port 6

D D

Port 7

Port 8

Port 9

Port 10

Port 11

Port 12

Port 13

Port 14

Port 15

Port 16

C C

B B

Flexible I/O Configuration

USB3 1

USB3 2/SSIC

USB3 3

USB3 4

USB3 5/PCIE 1

USB3 6/PCIE 2

PCIE 3 (GbE)

PCIE 4 (GbE)

PCIE 5 (GbE)

PCIE 6

PCIE 7/SATA 0

PCIE 8/SATA 1A

PCIE 9 (GbE)

PCIE 10 (GbE)

PCIE 11/SATA 1B

PCIE 12/SATA 2

USB3 1

USB3 2 (MCC)

USB3 3 USB3P2

USB3 4

PCIE 1 (x2)

PCIE 2 (x2)

PCIE 3

PCIE 4

PCIE 5

NA

PCIE 9 (x4)

PCIE 10 (x4)

PCIE 11 (x4)

PCIE 12 (x4)

PCIE0_L0_RXN100 PCIE0_L0_RXP100 PCIE0_L0_TXN100 PCIE0_L0_TXP100

PCIE0_L1_RXN100 PCIE0_L1_RXP100 PCIE0_L1_TXN100 PCIE0_L1_TXP100

PCIE1_RXN46 PCIE1_RXP46 PCIE1_TXN46 PCIE1_TXP46

PCIE2_RXN34 PCIE2_RXP34 PCIE2_TXN34 PCIE2_TXP34

PCIE3_RXN46 PCIE3_RXP46 PCIE3_TXN46 PCIE3_TXP46

PCIE5_L3_RXN31 PCIE5_L3_RXP31 PCIE5_L3_TXN31 PCIE5_L3_TXP31

PCIE5_L2_RXN31 PCIE5_L2_RXP31 PCIE5_L2_TXN31 PCIE5_L2_TXP31

-XDP_PRDY19

-XDP_PREQ19

PCIE5_L1_RXN31 PCIE5_L1_RXP31 PCIE5_L1_TXN31

PCIE5_L1_TXP31 PCIE5_L0_SATA2_RXN31 PCIE5_L0_SATA2_RXP31 PCIE5_L0_SATA2_TXN31 PCIE5_L0_SATA2_TXP31

-TPM_IRQ65

USB3P0

USB3P1

USB3P3

PCIE0_L0

PCIE0_L1

PCIE1

PCIE2

PCIE3

X

PCIE5_L3

PCIE5_L2

PCIE5_L1

PCIE5_L0_SATA2

-XDP_PRDY

-XDP_PREQ

-TPM_IRQ

VCC3_SUS

1 2

R2341 10K_0201_5%

4

PCIe Port Assignment

Thunderbolt

0 (x2)

1

M.2 WLAN Slot Port 0

2

GbE PHY

3

M.2 WLAN Slot Port 1

NA

4 (x2)

PCIe SS D

5 (x4)

SATA Port Assignment

0

(PCIE 7)

1A

SATA SSD

1B

(PCIE 11)

2

SATA SSD

1 2

R8964 100_0201_1%

1 2

R10273 0_0201_5%EMC@

1 2

R10274 0_0201_5%EMC@

U58H

PCIE/USB3/ SATA

H13

PCIE1_RXN/USB3_5_RXN

G13

PCIE1_RXP/USB3_5_RXP

B17

PCIE1_TXN/USB3_5_TXN

A17

PCIE1_TXP/USB3_5_TXP

G11

PCIE2_RXN/USB3_6_RXN

F11

PCIE2_RXP/USB3_6_RXP

D16

PCIE2_TXN/USB3_6_TXN

C16

PCIE2_TXP/USB3_6_TXP

H16

PCIE3_RXN

G16

PCIE3_RXP

D17

PCIE3_TXN

C17

PCIE3_TXP

G15

PCIE4_RXN

F15

PCIE4_RXP

B19

PCIE4_TXN

A19

PCIE4_TXP

F16

PCIE5_RXN

E16

PCIE5_RXP

C19

PCIE5_TXN

D19

PCIE5_TXP

G18

PCIE6_RXN

F18

PCIE6_RXP

D20

PCIE6_TXN

C20

PCIE6_TXP

F20

PCIE7_RXN/SATA0_RXN

E20

PCIE7_RXP/SATA0_RXP

B21

PCIE7_TXN/SATA0_TXN

A21

PCIE7_TXP/SATA0_TXP

G21

PCIE8_RXN/SATA1A_RXN

F21

PCIE8_RXP/SATA1A_RXP

D21

PCIE8_TXN/SATA1A_TXN

C21

PCIE8_TXP/SATA1A_TXP

E22

PCIE9_RXN

E23

PCIE9_RXP

B23

PCIE9_TXN

A23

PCIE9_TXP

F25

PCIE10_RXN

E25

PCIE10_RXP

D23

PCIE10_TXN

C23

PCIE10_TXP

F5

PCIE_RCOMPN

E5

PCIE_RCOMPP

D56

PROC_PRDY#

D61

PROC_PREQ#

BB11

GPP_A7/PIRQA#

E28

PCIE11_RXN/SATA1B_RXN

E27

PCIE11_RXP/SATA1B_RXP

D24

PCIE11_TXN/SATA1B_TXN

C24

PCIE11_TXP/SATA1B_TXP

E30

PCIE12_RXN/SATA2_RXN

F30

PCIE12_RXP/SATA2_RXP

A25

PCIE12_TXN/SATA2_TXN

B25

PCIE12_TXP/SATA2_TXP

Kaby lake-U_BGA1356

SKL_ULT

8 OF 20

3

SSIC / USB3

USB3_2_RXN/SSIC_1_RXN USB3_2_RXP/SSIC_1_RXP USB3_2_TXN/SSIC_1_TXN

USB3_2_TXP/SSIC_1_TXP

USB3_3_RXN/SSIC_2_RXN USB3_3_RXP/SSIC_2_RXP USB3_3_TXN/SSIC_2_TXN

USB3_3_TXP/SSIC_2_TXP

USB2

USB2_VBUSSENSE

GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3#

GPP_E4/DEVSLP0 GPP_E5/DEVSLP1 GPP_E6/DEVSLP2

GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2

GPP_E8/SATALED#

USB3_1_RXN USB3_1_RXP USB3_1_TXN USB3_1_TXP

USB3_4_RXN USB3_4_RXP USB3_4_TXN USB3_4_TXP

USB2N_1 USB2P_1

USB2N_2 USB2P_2

USB2N_3 USB2P_3

USB2N_4 USB2P_4

USB2N_5 USB2P_5

USB2N_6 USB2P_6

USB2N_7 USB2P_7

USB2N_8 USB2P_8

USB2N_9 USB2P_9

USB2N_10 USB2P_10

USB2_COMP

USB2_ID

H8 G8 C13 D13

J6 H6 B13 A13

J10 H10 B15 A15

E10 F10 C15 D15

AB9 AB10

AD6 AD7

AH3 AJ3

AD9 AD10

AJ1 AJ2

AF6 AF7

AH1 AH2

AF8 AF9

AG1 AG2

AH7 AH8

AB6 AG3 AG4

A9 C9 D9 B9

J1 J2 J3

H2 H3 G4

H1

USBCOMP

VCC3_SUS

1 2

R648 10K_0201_5%

R248 10K_0201_5%

1 2

R2307 10K_0201_5%

USB3P3_RXN USB3P3_RXP USB3P3_TXN USB3P3_TXP

USBP3USBP3+

1 2

R564 113_0201_1%

1 2

R2573 0_0201_5%

1 2

R2580 1K_0201_5%

2

USB3P0_RXN 32 USB3P0_RXP 32 USB3P0_TXN 32 USB3P0_TXP 32

USB3P1_RXN 32 USB3P1_RXP 32 USB3P1_TXN 32 USB3P1_TXP 32

USB3P2_RXN 47 USB3P2_RXP 47 USB3P2_TXN 47 USB3P2_TXP 47

USBP0- 32 USBP0+ 32

USBP1- 32 USBP1+ 32

USBP4- 62 USBP4+ 62

USBP5- 46 USBP5+ 46

USBP6- 46 USBP6+ 46

USBP7- 26 USBP7+ 26

USBP8- 62 USBP8+ 62

USBP9- 26 USBP9+ 26

-USB_PORT0_OC0 32

-USB_PORT1_OC1 32

-USB_PORT2_OC2 26 NFC_INT 62

VCC3_SUS

R10259

1 2

USB Port Assignment

0

USB 3.0 System Port (AOU)

1

USB3.0 System Port

NA

2

3

USB 3.0 Docking / System Port (3rd Port)

4

Smart Card Slot

5

M.2 WWAN Slot

6

NGFF WLAN Slot

7

USB Camera

8

Fingerprint Reader

9

Touch Panel

USB 3.0 Port Assignment

0

USB 3.0 System Port (AOU)

1

USB3.0 System Port

2

Mdia Card Controller

3

USB 3.0 System or DockingPort

4

(PCIE 1)

5

(PCIE 2)

10K_0201_5%

-PE_DTCT

NFC_ON 62

SATA2_DEVSLP 31

-PE_DTCT 31

1

VCC3M

2

C2751

C2752

1

0.1U_0201_6.3V6-K

10

USB3P3_TXP USB3P3_TXN USB3P3_RXP USB3P3_RXN

A A

-DOCK_ATTACHED_3M57,59,60

-DOCK_ATTACHED_3M

U160

3 4 7 8

9 2

21

A0+ A0-

VDD_11VDD_26VDD_3

A1+ A1-

SEL PD

THERMAL_PAD

GND_15GND_211GND_3

20

19

B0+

18

B0-

17

B1+

16

B1-

15

C0+

14

C0-

13

C1+

12

C1-

PI3PCIE3212ZBED_TQFN20_2P5X4P5

USB 3.0 MUX

5

4

1

0.1U_0201_6.3V6-K

Pericom

NXP

2

C2753

1

0.1U_0201_6.3V6-K

USB3P3_TXP_DOCK 57 USB3P3_TXN_DOCK 57 USB3P3_RXP_DOCK 57 USB3P3_RXN_DOCK 57

USB3P3_TXP_SYS 26 USB3P3_TXN_SYS 26 USB3P3_RXP_SYS 26 USB3P3_RXN_SYS 26

PI3PCIE3212ZBE

CBTL02043ABQ

CBTL02042ABQ

U161

2012/07/01

2

Y-

1

Y+

10

SEL

8

OE

USBP3-

USBP3+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

C2754

0.1U_0201_6.3V6-K

1

9

M-

VDD

M+

D-

D+

GND

3

PI3USB102ZMEX_UQFN10_1P4X1P8

USBP3-_DOCK

4

USBP3+_DOCK

5

USBP3-_SYS-DOCK_ATTACHED_3M

6

USBP3+_SYS

7

USB 2.0 SWITCH

Pericom

NXP

LC Future Center Secret Data

Deciphered Date

2

PI3USB102ZME

NX3DV42GU

2014/07/01

USBP3-_DOCK 57

USBP3+_DOCK 57

USBP3-_SYS 26

USBP3+_SYS 26

Title

CPU(8/16) : PCIE/USB/SATA

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

10 103

0.01

5

D D

C C

4

SKL_ULT

U58I

CSI-2

A36

CSI2_DN0

B36

CSI2_DP0

C38

CSI2_DN1

D38

CSI2_DP1

C36

CSI2_DN2

D36

CSI2_DP2

A38

CSI2_DN3

B38

CSI2_DP3

C31

CSI2_DN4

D31

CSI2_DP4

C33

CSI2_DN5

D33

CSI2_DP5

A31

CSI2_DN6

B31

CSI2_DP6

A33

CSI2_DN7

B33

CSI2_DP7

A29

CSI2_DN8

B29

CSI2_DP8

C28

CSI2_DN9

D28

CSI2_DP9

A27

CSI2_DN10

B27

CSI2_DP10

C27

CSI2_DN11

D27

CSI2_DP11

Kaby lake-U_BGA1356

3

GPP_D4/FLASHTRIG

EMMC

GPP_F13/EMMC_DATA0

GPP_F14/EMMC_DATA1

GPP_F15/EMMC_DATA2

GPP_F16/EMMC_DATA3

GPP_F17/EMMC_DATA4

GPP_F18/EMMC_DATA5

GPP_F19/EMMC_DATA6

GPP_F20/EMMC_DATA7

GPP_F21/EMMC_RCLK

GPP_F22/EMMC_CLK

GPP_F12/EMMC_CMD

9 OF 20

CSI2_CLKN0 CSI2_CLKP0 CSI2_CLKN1 CSI2_CLKP1 CSI2_CLKN2 CSI2_CLKP2 CSI2_CLKN3 CSI2_CLKP3

CSI2_COMP

EMMC_RCOMP

C37 D37 C32 D32 C29 D29 B26 A26

E13 B7

AP2 AP1 AP3 AN3 AN1 AN2 AM4 AM1

AM2

1 2

AM3

R10324 0_0201_5%

AP4

AT1

PLANARID1 PLANARID2 PLANARID3 MEMORYID0 MEMORYID1 MEMORYID2 MEMORYID3 MEMORYID4

PLANARID0

2

-TAMPER_SW_DTCT 13

1

B B

TABLE

LEVEL

1

0

TABLE

LEVEL

PDV

SDV

FVT

ME SIT

SIT

SIT-R

SVT

SVT-R

SOVP

Title

CPU(9/16) : CSI-2/EMMC

Size

Document Number Rev

Custom

Date: Sheet of

R2335 0_0201_5%

X76@

1 2

MEMORYID0 MEMORYID1 MEMORYID2 MEMORYID3 MEMORYID4

@

R43

R47

0_0201_5%

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

R113

0_0201_5%

1 2

LC Future Center Secret Data

Deciphered Date

2

TABLE

MEMORYID[4..0]

00000b

00001b

00010b

00011b

00100b

A A

01000b

01001b

01010b

01011b

01100b

11111b

Micron

Samsung

SK Hynix

Micron

Samsung

SK Hynix

5

U125, U126, U127, U128

MT40A512M16HA-083E:A

MT40A1G16HBA-083E:A

K4A8G165WB-BCPB

T.B .D .

MT40A512M16JY-083E:B

MT40A1G16WBU-083E:B

K4A8G165WB-BCRC

K4AAG165WB-MCRC

H5AN8G6NAFR-UHC

NO_ASM

8Gbit SDP

16Gbit DDP

8Gbit SDP

16Gbit DDP

8Gbit SDP

16Gbit DDP

8Gbit SDP

No Soldered Memory

4GB (2133)

8GB (2133)

4GB (2133)

4GB (2400)

8GB (2400)

4GB (2400)

8GB (2400)

4GB (2400)

4

R2331 0_0201_5%

X76@

1 2

R2332 0_0201_5%

X76@

1 2

R2333 0_0201_5%

X76@

1 2

R2334 0_0201_5%

X76@

1 2

R48 0_0201_5%

1 2

PLANARID0 PLANARID1 PLANARID2 PLANARID3

2014/07/01

PLANAR ID

R43 R47

R113

NA

NA NA NA

ASM ASM ASM ASM

PLANARID[3..0]

0000B

0001B

0010B

0011B

0100B / 0101B

0110B / 0111B

1000B

Thorpe-2 UMA

Wednesday, October 26, 2016

1

R48

0123

11 103

0.01

5

D D

4

3

VCC1R0_SUS

2

1

C C

-PCIE0_CLK_100M100 PCIE0_CLK_100M100

-CLKREQ_PCIE0100

-PCIE1_CLK_100M46 PCIE1_CLK_100M46

-CLKREQ_PCIE146

-PCIE2_CLK_100M34 PCIE2_CLK_100M34

-CLKREQ_PCIE234

-PCIE3_CLK_100M46 PCIE3_CLK_100M46

-CLKREQ_PCIE346

-PCIE5_CLK_100M31 PCIE5_CLK_100M31

-CLKREQ_PCIE531

-CLKREQ_PCIE0

B B

12

R10314 100K_0201_5%

A A

U58J

D42

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

AR10

GPP_B5/SRCCLKREQ0 #

B42

CLKOUT_PCIE_N1

A42

CLKOUT_PCIE_P1

AT7

GPP_B6/SRCCLKREQ1 #

D41

CLKOUT_PCIE_N2

C41

CLKOUT_PCIE_P2

AT8

GPP_B7/SRCCLKREQ2 #

D40

CLKOUT_PCIE_N3

C40

CLKOUT_PCIE_P3

AT10

GPP_B8/SRCCLKREQ3 #

B40

CLKOUT_PCIE_N4

A40

CLKOUT_PCIE_P4

AU8

GPP_B9/SRCCLKREQ4 #

E40

CLKOUT_PCIE_N5

E38

CLKOUT_PCIE_P5

AU7

GPP_B10/SRCCLKREQ 5#

Kaby lake-U_BGA1356

SKL_ULT

CLOCK SIGNALS

10 OF 20

CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P

GPD8/SUSCLK

XTAL24_IN

XTAL24_OUT

XCLK_BIASREF

RTCX1 RTCX2

SRTCRST#

RTCRST#

F43 E43

BA17

E37 E35

E42

AM18 AM20

AN18 AM16

R609

2.71K_0402_0.5%

1 2

RTCX1 RTCX2

-SRTCRST 20

-RTCRST 17,20

SUSCLK_32K 46,58

R308 1M_0201_5%

1 2

R133 0_0201_5%

1 2

C348 5.6P_040 2_50V8-D

R351 10M_0201_5%

1 2

TXC 9H03280012 KDS 1TJF090DJ1A000B

EPSON FC-135R (X1A0001410002)

Y6

32.768KHZ 9PF 9H032 80012

1 2

C326 5.6P_0402_50V 8-D

1 2

For Y5 A layout is refering to the Intel's white paper(#564413).

2

C205 9P_0201_25V8-D

1

KDS 1ZZHAE24000CC0G TXC 7R24080003 Epson Q22FA1280055800

Y5 24MHZ_10PF_1ZZHA E24000CC0G

1

GND1

3

GND2

2

4

2

C206 9P_0201_25V8-D

1

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

CPU(10/16) : CLOCK SIGNALS

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

12 103

0.01

5

VCC3M

4

3

2

1

D D

C C

B B

-PLTRST_NEAR100

-PLTRST_FAR31,34,46,58,65,66,67

1 2

R991 33_0201_5%

1 2

R993 33_0201_5%

2

C460 100P_0201_25V8-J

1

2

C46 100P_0201_25V8-J

1

-XDP_DBR17,19

-RSMRST19,5 9

BPWRG50,59,62,66,68

CPUCORE_PWRGD75

MPWRG59,6 8

-PCIE_WAKE46,67,100

-LANWAKE34 LANPHYPC34 -EXT_PWR_GATE 16

MPWRG

5

4

1 2

R19 4.7K_0201_5%

VCC

OUT_Y

TC7SG17FE_SON5

VCC3MVCC3M

1 2

R612 1K_0201_5%

U73

NC

IN_A

GND

Test_Point_40MIL

1

2

3

TP160

-SUSWARN

-PLTRST

1 2

R10275 0_0201_5%

1 2

R10276 0_0201_5%

CPU_PWRGD

1

VCCST_PWRGD

1 2

R21 0_0201_5%

1 2

R617 0_0201_5%

1 2

R203 0_0201_5%

1 2

R1884 0_0201_5%

U58K

SYSTEM POWER MANAGEMENT

AN10

GPP_B13/PLTRST#

B5

SYS_RESET#

AY17

RSMRST#

A68

PROCPWRGD

B65

VCCST_PWRGD

B6

SYS_PWROK

BA20

PCH_PWROK

BB20

DSW_PWROK

AR13

GPP_A13/SUSWAR N#/SUSPWRDNACK

AP11

GPP_A15/SUSACK#

BB15

WAKE#

AM15

GPD2/LAN_WAKE#

AW17

GPD11/LANPHYPC

AT15

GPD7/RSVD

Kaby lake-U_BGA1356

SKL_ULT

11 OF 20

GPP_B12/SLP_S0#

GPD4/SLP_S3# GPD5/SLP_S4#

GPD10/SLP_S5#

SLP_SUS# SLP_LAN#

GPD9/SLP_WLAN#

GPD6/SLP_A#

GPD3/PWRBTN#

GPD1/ACPRESENT

GPD0/BATLOW#

GPP_A11/PME#

INTRUDER#

GPP_B11/EXT_PWR_GA TE#

GPP_B2/VRALERT#

AT11 AP15 BA16 AY16

AN15 AW15 BB17 AN16

BA15 AY15 AU13

AU11 AP16

AM10 AM11

-INTRUDER

RTCVCC

@

1 2

2

1

R646 1M_0201_5%

C7 1000P_0201_25V7 -K

VCC3M

1 2

@

R614 10K_0201_5%

-PCH_SLP_S0 1 7,80,82,87

-PCH_SLP_S3 1 7,59,67,80,100

-PCH_SLP_S4 1 7,59,67,83

-PCH_SLP_S5 1 7,67

-PCH_SLP_SUS 59

-PCH_SLP_LAN 60

-PCH_SLP_WLAN 59

-PCH_SLP_M 17,67

-PWRSW_EC 59

AC_PRESENT 59

-BATLOW 60,100

S3

1

4

1 2

2

3

Issued Date

SPVR310100_4P

-TAMPER_SW_DTCT 11

2012/07/01

VCC3_SUS VCC1R0_SUS

R2324 10K_0201_5%

1 2

13

D

A A

5

CPUCORE_ON67,75

CPUCORE_ON

Q194

2

G

LSK3541G1ET2L_VMT3

S

4

2

G

Q195

R2325 10K_0201_5%

1 2

13

D

LSK3541G1ET2L_VMT3

S

VCCST_PWRGD

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

R10 0_0201_5%

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

D5

1 2

-INTRUDER_EC

RB520CS-30GT2RA_VMN2 -2

Title

CPU(11/16) : SYSTEM PM

Size

Document Number Rev

Custom

Wednesday, October 26, 2016

Date: Sheet of

-INTRUDER_EC 60

Thorpe-2 UMA

1

13 103

0.01

5

D D

4

3

1 2

RJ196 0_0603_5%

2

VCCSTG_CPUVCCSTG

1

VCCCPUCORE

A30 A34 A39 A44

C C

B B

AK33 AK35 AK37 AK38 AK40 AL33 AL37 AL40 AM32 AM33 AM35 AM37 AM38

AK32

AB62

AC63 AE63

AE62 AG62

AL63 AJ62

G30

K32

P62 V62

H63

G61

SKL_ULT

U58L

CPU POWER 1 OF 4

VCC_A30 VCC_A34 VCC_A39 VCC_A44 VCC_AK33 VCC_AK35 VCC_AK37 VCC_AK38 VCC_AK40 VCC_AL33 VCC_AL37 VCC_AL40 VCC_AM32 VCC_AM33 VCC_AM35 VCC_AM37 VCC_AM38 VCC_G30

RSVD_K32

RSVD_AK32

VCCOPC_AB62 VCCOPC_P62 VCCOPC_V62

VCC_OPC_1P8_H63

VCC_OPC_1P8_G61

VCCOPC_SENSE VSSOPC_SENSE

VCCEOPIO_AE62 VCCEOPIO_AG62

VCCEOPIO_SENSE VSSEOPIO_SENSE

Kaby lake-U_BGA1356

12 OF 20

VCC_G32 VCC_G33 VCC_G35 VCC_G37 VCC_G38 VCC_G40 VCC_G42

VCC_J30 VCC_J33 VCC_J37

VCC_J40 VCC_K33 VCC_K35 VCC_K37 VCC_K38 VCC_K40 VCC_K42 VCC_K43

VCC_SENSE

VSS_SENSE

VIDALERT#

VIDSCK

VIDSOUT

VCCSTG_G20

G32 G33 G35 G37 G38 G40 G42 J30 J33 J37 J40 K33 K35 K37 K38 K40 K42 K43

E32 E33

B63 A63 D64

G20

VCCCPUCORE

VCCSTG_CPU

VCCCPUCORE

R9 100_0201_1%

1 2

R781 220_0201_5%

R70 100_0201_1%

1 2

Near CPU

1 2

R374 56_0201_5%

1 2

R782 100_0201_5%

@

VCCST

1 2

R2576 100_0201_5%

VCC_SENSE

VSS_SENSE

-SVID_ALERT SVID_CLK

SVID_DATA

VCC_SENSE 75 VSS_SENSE 75

-SVID_ALERT 75 SVID_CLK 75 SVID_DATA 75

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

CPU(12/16) : CPU POWER (1/2)

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

14 103

0.01

5

D D

4

1 2

RJ197 0_0603_5%

VCCST_CPU VCCSTG_CPU VCCST_CPU VCC1R2A VCC1R2AVCCST_CPUVCCST

3

2

C2422 1U_0402_6.3V6-K

1

2

C2423 1U_0402_6.3V6-K

1

VCCPLL

2

C2424 1U_0402_6.3V6-K

1

2

VCC1R2A VCC1R2A

2

1

C835 10U_0402_6.3V6-M

C1184 10U_0402_6.3V6-M

@

1

C1829 10U_0402_6.3V6-M

C1830 10U_0402_6.3V6-M

C1831 10U_0402_6.3V6-M

2

@

1

C838 10U_0402_6.3V6-M

C1832 10U_0402_6.3V6-M

2

C840

1

@

1

VCCQC VCCPLL_OC

2

C842

C844

1

@

22U_0603_6.3V6M

2

1

22U_0603_6.3V6M

C2426 10U_0402_6.3V6-M

2

C2427

0.1U_0201_6.3V6-K

1

N70 N71 R63 R64 R65 R66 R67 R68 R69 R70 R71 T62 U65 U68 U71 W63 W64 W65 W66 W67 W68 W69 W70 W71 Y62

AK42 AK43 AK45 AK46 AK48 AK50 AK52 AK53 AK55 AK56 AK58 AK60 AK70 AL43 AL46 AL50 AL53 AL56 AL60 AM48 AM50 AM52 AM53 AM56 AM58 AU58 AU63 BB57 BB66

AK62 AL61

VCCGFXCORE_I

VCC1R2A VCCCPUIO

SKL_ULT

U58N

CPU POWER 3 OF 4

AU23

VDDQ_AU23

AU28

VDDQ_AU28

AU35

VDDQ_AU35

AU42

VDDQ_AU42

BB23

VDDQ_BB23

BB32

VDDQ_BB32

BB41

VDDQ_BB41

VCCST_CPUVCCSTG_CPU

BB47

VDDQ_BB47

BB51

VDDQ_BB51

AM40

VDDQC

A18

VCCST

A22

VCCSTG_A22

AL23

VCCPLL_OC

K20

VCCPLL_K20

K21

VCCPLL_K21

Kaby lake-U_BGA1356

VCCIO_AK28 VCCIO_AK30 VCCIO_AL30

VCCIO_AL42 VCCIO_AM28 VCCIO_AM30 VCCIO_AM42

VCCSA_AK23 VCCSA_AK25

VCCSA_G23

VCCSA_G25

VCCSA_G27

VCCSA_G28

VCCSA_J22 VCCSA_J23 VCCSA_J27 VCCSA_K23 VCCSA_K25 VCCSA_K27 VCCSA_K28 VCCSA_K30

VCCIO_SENSE VSSIO_SENSE

VSSSA_SENSE VCCSA_SENSE

14 OF 20

AK28 AK30 AL30 AL42 AM28 AM30 AM42

AK23 AK25 G23 G25 G27 G28 J22 J23 J27 K23 K25 K27 K28 K30

AM23 AM22

H21 H20

VCCSA

R10305 100_0201_5%

1 2

VCCCPUIO

1 2

R10304 100_0201_5%

R2155 100_0201_5%

1 2

VCCSA

R2154 100_0201_5%

1 2

VSSSA_SENSE VCCSA_SENSE

VCCCPUIO_SENSE 80 VSSCPUIO_SENSE 80

VSSSA_SENSE 75 VCCSA_SENSE 75

VCCGFXCORE_I

SKL_ULT

U58M

CPU POWER 2 OF 4

A48

VCCGT_A48

A53

VCCGT_A53

A58

VCCGT_A58

A62

VCCGT_A62

A66

VCCGT_A66

AA63

VCCGT_AA63

AA64

VCCGT_AA64

AA66

VCCGT_AA66

AA67

VCCGT_AA67

AA69

VCCGT_AA69

AA70

VCCGT_AA70

AA71

VCCGT_AA71

AC64

C C

VCCGFXCORE_I

R2152

B B

VCCGT_SENSE75 VSSGT_SENSE75

VCCGT_SENSE VSSGT_SENSE

100_0201_5%

1 2

R2153 100_0201_5%

1 2

AC65 AC66 AC67 AC68 AC69 AC70 AC71

J43 J45 J46 J48 J50 J52 J53 J55 J56 J58 J60 K48 K50 K52 K53 K55 K56 K58 K60 L62 L63 L64 L65 L66 L67 L68 L69 L70 L71 M62 N63 N64 N66 N67 N69

J70 J69

VCCGT_AC64 VCCGT_AC65 VCCGT_AC66 VCCGT_AC67 VCCGT_AC68 VCCGT_AC69 VCCGT_AC70 VCCGT_AC71 VCCGT_J43 VCCGT_J45 VCCGT_J46 VCCGT_J48 VCCGT_J50 VCCGT_J52 VCCGT_J53 VCCGT_J55 VCCGT_J56 VCCGT_J58 VCCGT_J60 VCCGT_K48 VCCGT_K50 VCCGT_K52 VCCGT_K53 VCCGT_K55 VCCGT_K56 VCCGT_K58 VCCGT_K60 VCCGT_L62 VCCGT_L63 VCCGT_L64 VCCGT_L65 VCCGT_L66 VCCGT_L67 VCCGT_L68 VCCGT_L69 VCCGT_L70 VCCGT_L71 VCCGT_M62 VCCGT_N63 VCCGT_N64 VCCGT_N66 VCCGT_N67 VCCGT_N69

VCCGT_SENSE VSSGT_SENSE

Kaby lake-U_BGA1356

VCCGT_N70 VCCGT_N71 VCCGT_R63 VCCGT_R64 VCCGT_R65 VCCGT_R66 VCCGT_R67 VCCGT_R68 VCCGT_R69 VCCGT_R70 VCCGT_R71

VCCGT_T62 VCCGT_U65 VCCGT_U68 VCCGT_U71

VCCGT_W63 VCCGT_W64 VCCGT_W65 VCCGT_W66 VCCGT_W67 VCCGT_W68 VCCGT_W69 VCCGT_W70 VCCGT_W71

VCCGT_Y62

VCCGTX_AK42 VCCGTX_AK43 VCCGTX_AK45 VCCGTX_AK46 VCCGTX_AK48 VCCGTX_AK50 VCCGTX_AK52 VCCGTX_AK53 VCCGTX_AK55 VCCGTX_AK56 VCCGTX_AK58 VCCGTX_AK60 VCCGTX_AK70 VCCGTX_AL43 VCCGTX_AL46 VCCGTX_AL50 VCCGTX_AL53 VCCGTX_AL56

VCCGTX_AL60 VCCGTX_AM48 VCCGTX_AM50 VCCGTX_AM52 VCCGTX_AM53 VCCGTX_AM56 VCCGTX_AM58

VCCGTX_AU58

VCCGTX_AU63

VCCGTX_BB57

VCCGTX_BB66

VCCGTX_SENSE VSSGTX_SENSE

13 OF 20

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

CPU(13/16) : CPU POWER (2/2)

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

15 103

0.01

5

VCC3M VCC3M_PCH

1 2

D D

VCCMPHY_GATE

C C

B B

1 2

VCC1R0_SUS

1 2

RJ198 0_0603_5%

VCC1R0_SUS VCC1R0_SUS_PRIM

1 2

RJ199 0_0603_5%

VCCMPHY_GATE VCCMPHY_GATE_OUT

1 2

RJ200 0_0603_5%

R2302

0.001_0603_5%

R2303

0.001_0603_5%

2

C2447

1

@

22U_0603_6.3V6M

2

C2449

1

@

22U_0603_6.3V6M

VCCMPHY_GATE_PLL

2

C2446

1

@

22U_0603_6.3V6M

VCC1R0_SUS_PLL

2

C2448

1

@

22U_0603_6.3V6M

2

@

C2437 1U_0402_6.3V6-K

1

NEAR K15

2

C2655

0.1U_0201_6.3V6-K

1

NEAR V15

2

1

VCC3_SUS

C620 1U_0402_6.3V6-K

VCC3M_PCH

-EXT_PWR_GATE13

4

VCCPCHCORE

VCC1R0_SUS

VCCMPHY_GATE_OUT

R2564

@

1 2

0_0201_5%

VCC3_SUS

1 2

@

R2293 20K_0201_5%

AB19

AB20

P18

AF18

AF19

V20 V21

AL1

K17

L1

N15 N16 N17

P15 P16

K15 L15

V15

AB17

Y18

AD17

AD18

AJ17

AJ19

AJ16

AF20

AF21

T19 T20

AJ21

AK20

N18

VCC3_SUS

SKL_ULT

U58O

CPU POWER 4 OF 4

VCCPRIM_1P0_AB19 VCCPRIM_1P0_AB20 VCCPRIM_1P0_P18

VCCPRIM_CORE_AF18 VCCPRIM_CORE_AF19 VCCPRIM_CORE_V20 VCCPRIM_CORE_V21

DCPDSW_1P0

VCCMPHYAON_1P0_K17 VCCMPHYAON_1P0_L1

VCCMPHYGT_1P0_N15 VCCMPHYGT_1P0_N16 VCCMPHYGT_1P0_N17 VCCMPHYGT_1P0_P15 VCCMPHYGT_1P0_P16

VCCAMPHYPLL_1P0_K15 VCCAMPHYPLL_1P0_L15

VCCAPLL_1P0

VCCPRIM_1P0_AB17 VCCPRIM_1P0_Y18

VCCDSW_3P3_AD17 VCCDSW_3P3_AD18 VCCDSW_3P3_AJ17

VCCHDA

VCCSPI

VCCSRAM_1P0_AF20 VCCSRAM_1P0_AF21 VCCSRAM_1P0_T19 VCCSRAM_1P0_T20

VCCPRIM_3P3_AJ21

VCCPRIM_1P0_AK20

VCCAPLLEBB

Kaby lake-U_BGA1356

3

R2581

1 2

0.001_0603_5%

U146

@

4

VDD1S1

5

ON7S2

2

D1

GND

D2

VCCPRIM_3P3_V19

VCCPRIM_1P0_T1

VCCRTCPRIM_3P3

GPP_B0/CORE_VID0 GPP_B1/CORE_VID1

6

VCCPGPPA

VCCPGPPB VCCPGPPC VCCPGPPD VCCPGPPE VCCPGPPF

VCCPGPPG

VCCATS_1P8

VCCRTC_AK19 VCCRTC_BB14

DCPRTC

VCCCLK1

VCCCLK2

VCCCLK3

VCCCLK4

VCCCLK5

VCCCLK6

3

SLG59M1470VTR_FC-TDF N9_1P5X2

15 OF 20

AK15 AG15 Y16 Y15 T16 AF16 AD15

V19

T1

AA1

AK17

AK19 BB14

BB10

A14

K19

L21

N20

L19

A10

AN11 AN13

2

VCCMPHY_GATEVCC1R0_SUS

VCC3_SUS VCC1R8_SUS VCC1R0_SUS VCCPCHCORE

2

C2431 47U_0805_6.3V6-M

1

VCC1R0_SUS_CLK2

2

C2450

1

@

22U_0603_6.3V6M

VCC1R0_SUS_CLK4

2

C2452

1

@

22U_0603_6.3V6M

VCC1R0_SUS_CLK5

2

C2454

1

@

22U_0603_6.3V6M

2

C2451

1

@

2

C2453

1

@

2

C2455

1

@

VCC3_SUS

C832

0.1U_0201_6.3V6-K

C731 1U_0402_6.3V6-K

2

C2430 47U_0805_6.3V6-M

1

2

C380 1U_0402_6.3V6-K

1

C795

1 2

0.1U_0201_6.3V6-K

2

@

C2429 47U_0805_6.3V6-M

1

2

C763

0.1U_0201_6.3V6-K

1

2

1

RTCVCC

2

1

2

C2428 47U_0805_6.3V6-M

1

VCC3_SUSVCC1R0_SUS_PRIM

VCC1R8_SUS

VCC1R0_SUS_PRIM

VCC1R0_SUS

VCCPCHCORE_VID0 87 VCCPCHCORE_VID1 87

1

VCC1R0_SUS

R2304

1 2

0.001_0603_5%

22U_0603_6.3V6M

1 2

22U_0603_6.3V6M

1 2

22U_0603_6.3V6M

VCC1R0_SUS

R2305

0.001_0603_5%

VCC1R0_SUS

R2306

0.001_0603_5%

VCC1R0_SUS_PRIM VCCPCHCORE VCCMPHY_GATE_OUT VCC3_SUS VCC1R8_SUS VCC1R0_SUSVCCMPHY_GATE_OUT

A A

2

@

C2432 1U_0402_6.3V6-K

1

VCC1R0_SUS

2

C2433 1U_0402_6.3V6-K

1

NEAR K17

2

@

C2434 1U_0402_6.3V6-K

1

NEAR AF18

5

VCC3_SUS

2

1

@

C821 1U_0402_6.3V6-K

NEAR AJ19NEAR AB19

2

C2435 1U_0402_6.3V6-K

1

NEAR N15 NEAR N15

4

2

@

C2436 47U_0805_6.3V6-M

1

2

@

C2438 1U_0402_6.3V6-K

1

NEAR AF20

2

C2439 1U_0402_6.3V6-K

1

NEAR N18

3

2

@

C2440 1U_0402_6.3V6-K

1

NEAR AG15

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

Issued Date

2

@

C2441 1U_0402_6.3V6-K

1

NEAR Y16

2

@

C2442 1U_0402_6.3V6-K

1

NEAR T16 NEAR V19 NEAR AA1 NEAR A10

2012/07/01

2

@

C2443 1U_0402_6.3V6-K

1

LC Future Center Secret Data

Deciphered Date

2

C2444 1U_0402_6.3V6-K

1

2014/07/01

2

@

C2445 1U_0402_6.3V6-K

1

Title

CPU(14/16) : PCH POWER

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

16 103

0.01

5

4

3

2

1

APS/PETS Interface

D D

-PCH_SLP_S013,80,82,87

-XDP_DBR13,19

-PWRSWITCH26,57,66,67

-RTCRST12,20

-PCH_SLP_M13,67

-PCH_SLP_S413,59,67,83

-PCH_SLP_S513,67

-PCH_SLP_S313,59,67,80,10 0

TP2 Test_Point_40MIL

TP3 Test_Point_40MIL

TP4 Test_Point_40MIL

TP5 Test_Point_40MIL

SKL_ULT

U58P

GND 1 OF 3

AA65 AA68 AB15 AB16 AB18 AB21

AD13 AD16 AD19 AD20 AD21 AD62

AE64 AE65 AE66 AE67 AE68 AE69

AF10 AF15 AF17

AF63 AG16 AG17 AG18 AG19 AG20 AG21 AG71 AH13

AH63 AH64 AH67

AK11 AK16 AK18 AK21 AK22 AK27 AK63 AK68 AK69

AL28 AL32 AL35 AL38

AL45 AL48 AL52 AL55 AL58 AL64

A5 A67 A70

AA2 AA4

AB8

AD8

AF1

AF2 AF4

AH6

AJ15 AJ18 AJ20

AJ4

AK8 AL2

AL4

VSS_A5 VSS_A67 VSS_A70 VSS_AA2 VSS_AA4 VSS_AA65 VSS_AA68 VSS_AB15 VSS_AB16 VSS_AB18 VSS_AB21 VSS_AB8 VSS_AD13 VSS_AD16 VSS_AD19 VSS_AD20 VSS_AD21 VSS_AD62 VSS_AD8 VSS_AE64 VSS_AE65 VSS_AE66 VSS_AE67 VSS_AE68 VSS_AE69 VSS_AF1 VSS_AF10 VSS_AF15 VSS_AF17 VSS_AF2 VSS_AF4 VSS_AF63 VSS_AG16 VSS_AG17 VSS_AG18 VSS_AG19 VSS_AG20 VSS_AG21 VSS_AG71 VSS_AH13 VSS_AH6 VSS_AH63 VSS_AH64 VSS_AH67 VSS_AJ15 VSS_AJ18 VSS_AJ20 VSS_AJ4 VSS_AK11 VSS_AK16 VSS_AK18 VSS_AK21 VSS_AK22 VSS_AK27 VSS_AK63 VSS_AK68 VSS_AK69 VSS_AK8 VSS_AL2 VSS_AL28 VSS_AL32 VSS_AL35 VSS_AL38 VSS_AL4 VSS_AL45 VSS_AL48 VSS_AL52 VSS_AL55 VSS_AL58 VSS_AL64

16 OF 20

Kaby lake-U_BGA1356

1

TP922Test_Point_16MIL

1

TP923Test_Point_16MIL

1

TP924Test_Point_16MIL

C C

B B

VSS_AL65 VSS_AL66 VSS_AM13 VSS_AM21 VSS_AM25 VSS_AM27 VSS_AM43 VSS_AM45 VSS_AM46 VSS_AM55 VSS_AM60 VSS_AM61 VSS_AM68 VSS_AM71

VSS_AM8 VSS_AN20 VSS_AN23 VSS_AN28 VSS_AN30 VSS_AN32 VSS_AN33 VSS_AN35 VSS_AN37 VSS_AN38 VSS_AN40 VSS_AN42 VSS_AN58 VSS_AN63 VSS_AP10 VSS_AP18 VSS_AP20 VSS_AP23 VSS_AP28 VSS_AP32 VSS_AP35 VSS_AP38 VSS_AP42 VSS_AP58 VSS_AP63 VSS_AP68 VSS_AP70 VSS_AR11 VSS_AR15 VSS_AR16 VSS_AR20 VSS_AR23 VSS_AR28 VSS_AR35 VSS_AR42 VSS_AR43 VSS_AR45 VSS_AR46 VSS_AR48

VSS_AR5 VSS_AR50 VSS_AR52 VSS_AR53 VSS_AR55 VSS_AR58 VSS_AR63

VSS_AR8

VSS_AT2 VSS_AT20 VSS_AT23 VSS_AT28 VSS_AT35

VSS_AT4 VSS_AT42 VSS_AT56 VSS_AT58

AL65 AL66 AM13 AM21 AM25 AM27 AM43 AM45 AM46 AM55 AM60 AM61 AM68 AM71 AM8 AN20 AN23 AN28 AN30 AN32 AN33 AN35 AN37 AN38 AN40 AN42 AN58 AN63 AP10 AP18 AP20 AP23 AP28 AP32 AP35 AP38 AP42 AP58 AP63 AP68 AP70 AR11 AR15 AR16 AR20 AR23 AR28 AR35 AR42 AR43 AR45 AR46 AR48 AR5 AR50 AR52 AR53 AR55 AR58 AR63 AR8 AT2 AT20 AT23 AT28 AT35 AT4 AT42 AT56 AT58

1

TP925Test_Point_16MIL

1

TP926Test_Point_16MIL

1

TP927Test_Point_16MIL

1

TP928Test_Point_16MIL

1

TP929Test_Point_16MIL

AW10 AW12 AW14 AW16 AW18 AW21 AW23 AW26 AW28 AW30 AW32 AW34 AW36 AW38 AW41 AW43 AW45 AW47 AW49 AW51 AW53 AW55 AW57

AW60 AW62 AW64 AW66

AT63 AT68 AT71 AU10 AU15 AU20 AU32 AU38

AV68 AV69 AV70 AV71

AW6

AW8 AY66

BA10 BA14 BA18

BA23 BA28 BA32 BA36

BA45

AV1

B10 B14 B18 B22 B30 B34 B39 B44 B48 B53 B58 B62 B66 B71 BA1

BA2

F68

SKL_ULT

U58Q

GND 2 OF 3

VSS_AT63 VSS_AT68 VSS_AT71 VSS_AU10 VSS_AU15 VSS_AU20 VSS_AU32 VSS_AU38 VSS_AV1 VSS_AV68 VSS_AV69 VSS_AV70 VSS_AV71 VSS_AW10 VSS_AW12 VSS_AW14 VSS_AW16 VSS_AW18 VSS_AW21 VSS_AW23 VSS_AW26 VSS_AW28 VSS_AW30 VSS_AW32 VSS_AW34 VSS_AW36 VSS_AW38 VSS_AW41 VSS_AW43 VSS_AW45 VSS_AW47 VSS_AW49 VSS_AW51 VSS_AW53 VSS_AW55 VSS_AW57 VSS_AW6 VSS_AW60 VSS_AW62 VSS_AW64 VSS_AW66 VSS_AW8 VSS_AY66 VSS_B10 VSS_B14 VSS_B18 VSS_B22 VSS_B30 VSS_B34 VSS_B39 VSS_B44 VSS_B48 VSS_B53 VSS_B58 VSS_B62 VSS_B66 VSS_B71 VSS_BA1 VSS_BA10 VSS_BA14 VSS_BA18 VSS_BA2 VSS_BA23 VSS_BA28 VSS_BA32 VSS_BA36 VSS_F68 VSS_BA45

17 OF 20

Kaby lake-U_BGA1356

VSS_BA49 VSS_BA53 VSS_BA57

VSS_BA6 VSS_BA62 VSS_BA66 VSS_BA71 VSS_BB18 VSS_BB26 VSS_BB30 VSS_BB34 VSS_BB38 VSS_BB43 VSS_BB55

VSS_BB6 VSS_BB60 VSS_BB64 VSS_BB67 VSS_BB70

VSS_C1

VSS_C25

VSS_C5 VSS_D10 VSS_D11 VSS_D14 VSS_D18 VSS_D22 VSS_D25 VSS_D26 VSS_D30 VSS_D34 VSS_D39 VSS_D44 VSS_D45 VSS_D47 VSS_D48 VSS_D53 VSS_D58

VSS_D6 VSS_D62 VSS_D66 VSS_D69 VSS_E11 VSS_E15 VSS_E18 VSS_E21 VSS_E46 VSS_E50 VSS_E53 VSS_E56

VSS_E6 VSS_E65 VSS_E71

VSS_F1 VSS_F13

VSS_F2 VSS_F22 VSS_F23 VSS_F27 VSS_F28 VSS_F32 VSS_F33 VSS_F35 VSS_F37 VSS_F38

VSS_F4 VSS_F40 VSS_F42

VSS_BA41

BA49 BA53 BA57 BA6 BA62 BA66 BA71 BB18 BB26 BB30 BB34 BB38 BB43 BB55 BB6 BB60 BB64 BB67 BB70 C1 C25 C5 D10 D11 D14 D18 D22 D25 D26 D30 D34 D39 D44 D45 D47 D48 D53 D58 D6 D62 D66 D69 E11 E15 E18 E21 E46 E50 E53 E56 E6 E65 E71 F1 F13 F2 F22 F23 F27 F28 F32 F33 F35 F37 F38 F4 F40 F42 BA41

1

TP930 Test_Point_16MIL

1

TP931 Test_Point_16MIL

1

TP932 Test_Point_16MIL

1

TP933 Test_Point_16MIL

1

TP934 Test_Point_16MIL

G10 G22 G43 G45 G48

G52 G55 G58

G60 G63 G66 H15 H18 H71

J11 J13 J25 J28 J32 J35 J38 J42

K16 K18 K22 K61 K63 K64 K65 K66 K67 K68 K70 K71

L11 L16 L17

SKL_ULT

F8

VSS_F8 VSS_G10 VSS_G22 VSS_G43 VSS_G45 VSS_G48

G5

VSS_G5 VSS_G52 VSS_G55 VSS_G58

G6

VSS_G6 VSS_G60 VSS_G63 VSS_G66 VSS_H15 VSS_H18 VSS_H71 VSS_J11 VSS_J13 VSS_J25 VSS_J28 VSS_J32 VSS_J35 VSS_J38 VSS_J42

J8

VSS_J8 VSS_K16 VSS_K18 VSS_K22 VSS_K61 VSS_K63 VSS_K64 VSS_K65 VSS_K66 VSS_K67 VSS_K68 VSS_K70 VSS_K71 VSS_L11 VSS_L16 VSS_L17

Kaby lake-U_BGA1356

Place bottom side

U58R

GND 3 OF 3

VSS_L18

VSS_L2

VSS_L20

VSS_L4

VSS_L8 VSS_N10 VSS_N13 VSS_N19 VSS_N21

VSS_N6 VSS_N65 VSS_N68 VSS_P17 VSS_P19 VSS_P20 VSS_P21 VSS_R13

VSS_R6 VSS_T15 VSS_T17 VSS_T18

VSS_T2 VSS_T21

VSS_T4 VSS_U10 VSS_U63 VSS_U64 VSS_U66 VSS_U67 VSS_U69 VSS_U70 VSS_V16 VSS_V17 VSS_V18

VSS_W13

VSS_W6

VSS_W9 VSS_Y17 VSS_Y19 VSS_Y20 VSS_Y21

18 OF 20

VCC3_SUS VCC3M

1

L18 L2 L20 L4 L8 N10 N13 N19 N21 N6 N65 N68 P17 P19 P20 P21 R13 R6 T15 T17 T18 T2 T21 T4 U10 U63 U64 U66 U67 U69 U70 V16 V17 V18 W13 W6 W9 Y17 Y19 Y20 Y21

J41

18

NC1

17

NC2

16

NC3

15

SLP_S0#

14

GND1

13

SYS_RESET#

12

GND2

11

PWRBTN#

10

GND3

9

RTCRST#

8

GND4

7

+V3.3DS

6

SLP_A#

5

SLP_S4#

4

SLP_S5#

3

VccDSW3_3

2

SLP_S3#

1

VccSus3_3

FCI_10051922-1810 ELF

CONN@

PEG2 PEG1

20 19

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

CPU(15/16) : GND

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

17 103

0.01

5

4

3

2

1

TAB LE

CFG0 : Stall Reset Sequence after PCU PLL Lock until de-asserted

1 : No Stall 0 : Stall

D D

CFG3 : MSR Privacy Bit Feature

1 : MSR (C80h) bit[0] setting 0 : MSR (C80h) bit[0] overridden

CFG4 : eDP Enable

1 : Disabled 0 : Enabled

CFG9 : SVID Bus Communication 1 : Enabled 0 : Disabled

U58S

E68

CFG[0]

B67

CFG[1]

D65

CFG[2]

AL25 AL27

BA70 BA68

D67 E70 C68 D68 C67 F71 G69 F70 G68 H70 G71 H69 G70

E63 F63

E66 F66

E60

E8

AY2 AY1

D1 D3

K46 K45

C71 B70

F60

A52

J71 J68

F65

G65

F61 E61

CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15]

CFG[16] CFG[17]

CFG[18] CFG[19]

CFG_RCOMP

ITP_PMODE

RSVD_AY2 RSVD_AY1

RSVD_D1 RSVD_D3

RSVD_K46 RSVD_K45

RSVD_AL25 RSVD_AL27

RSVD_C71 RSVD_B70

RSVD_F60

RSVD_A52

RSVD_TP_BA70 RSVD_TP_BA68

RSVD_J71 RSVD_J68

VSS_F65 VSS_G65

RSVD_F61 RSVD_E61

Kaby lake-U_BGA1356

C C

B B

CFG319

1K_0201_5%

@

R1891

R8965

1 2

1K_0201_5%

1 2

R8898 49.9_0201_1%

@

R1892

1 2

ITP_PMODE19

SKL_ULT

RESERVED SIGNALS-1

19 OF 20

RSVD_TP_BB68 RSVD_TP_BB69

RSVD_TP_AK13 RSVD_TP_AK12

RSVD_BB2 RSVD_BA3

RSVD_D5 RSVD_D4 RSVD_B2 RSVD_C2

RSVD_B3 RSVD_A3

RSVD_AW1

RSVD_E1 RSVD_E2

RSVD_BA4 RSVD_BB4

RSVD_A4 RSVD_C4

RSVD_A69 RSVD_B69

RSVD_AY3

RSVD_D71 RSVD_C70

RSVD_C54 RSVD_D54

VSS_AY71

RSVD_TP_AW71 RSVD_TP_AW70

MSM#

PROC_SELECT#

ZVM#

BB68 BB69

AK13 AK12

BB2 BA3

AU5

TP5

AT5

TP6

D5 D4 B2 C2

B3 A3

AW1

E1 E2

BA4 BB4

A4 C4

BB5

TP4

A69 B69

AY3

D71 C70

C54 D54

AY4

TP1

BB3

TP2

AY71 AR56

AW71 AW70

AP56 C64

1 2

R2287 0_0201_5%

1 2

R2288 0_0201_5%

VCCST

1 2

R2289 100K_0201_5%

AW69 AW68

AU56

AW48

C7 U12 U11 H11

SKL_ULT

U58T

SPARE

RSVD_AW69 RSVD_AW68 RSVD_AU56 RSVD_AW48 RSVD_C7 RSVD_U12 RSVD_U11 RSVD_H11

Kaby lake-U_BGA1356

20 OF 20

RSVD_F6

RSVD_E3 RSVD_C11 RSVD_B11 RSVD_A11 RSVD_D12 RSVD_C12 RSVD_F52

F6 E3 C11 B11 A11 D12 C12 F52

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

CPU(16/16) : CFG/RESERVED

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

18 103

0.01

5

D D

VCC3B VCCSTG VCC1R0_SUSVCC1R0_SUS

@

1 2

XDP_TCK06

PCH_TCK6

XDP_TMS6 XDP_TDI6

C C

-XDP_TRST6

XDP_TDO6

-XDP_DBR13,17

ITP_PMODE18

-RSMRST13,59

CFG318

XDP_TCK0

PCH_TCK XDP_TMS XDP_TDI

-XDP_TRST XDP_TDO

-XDP_DBR ITP_PMODE

-RSMRST

-XDP_PRDY10

-XDP_PREQ10

-XDP_PRDY

-XDP_PREQ

R588 1.5K_0201_1%

1 2

R491 1K_0201_5%

1 2

R594 1K_0201_5%

1 2

R475 100_0201_5%

4

2

C8320

0.1U_0201_6.3V6-K

1

MOLEX_52435-2671

26

25

25 2424GND1

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

J8

CONN@

28

GND2

27

3

2

1

TAB LE

Logic

Page 6

Page 7

Page 18

Page 19

Ref Des

R2

R2559

R1892

J8

C8320

R475

R491

R588

R594

R2494

Merged

ASM ASM

ASM

DCI 2.0

NO_ASM

ASM

NO_ASM

LOGIC

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

XDP CONNECTOR

Size

Document Number Rev

Custom

Date: Sheet

Thorpe-2 UMA

Wednesday, October 26, 2016

1

19 103

0.01

of

5

4

3

2

1

VCC3SW

D D

@

1 2

R2577 1.5K_0201_1%

R2578

@

47K_0201_5%

1 2

D3

12

RB520CM-30T2R_VMN2M2

R4 1K_0201_5%

C C

CONN@

J12

1

2

3

GND1

4

GND2

TE_2041180-2

B B

1 2

VCC3SW

D290

1 2

D6

1 2

RTCVCC

RB520CM-30T2R_VMN2M2

2

@

C287 1U_0402_6.3V6-K

1

RB520CM-30T2R_VMN2M2

R620

1 2

20K_0201_5%

R250

1 2

20K_0201_5%

2

1

2

1

C459 1U_0402_6.3V6-K

C285 1U_0402_6.3V6-K

-RTCRST

-SRTCRST

-RTCRST 12,17

-SRTCRST 12

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

RTC BATTERY

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

20 103

0.01

5

D D

C C

-SPI_CS07

SPI_CLK7,65

SPI_MOSI_IO07,65

SPI_MISO_IO17,65

4

2

1

C629 0.1U_0201_6.3V6-K

-SPI_CS0 -SPI_CS0_R

SPI_CLK

SPI_MOSI_IO0

SPI_MISO_IO1

1 2

R322 33_0201_5%

1 2

R681 33_0201_5%EMC@

1 2

R674 33_0201_5%

1 2

R694 33_0201_5%

SPI_CLK_0_R

SPI_MOSI_IO0_0_R

SPI_MISO_IO1_0_R

1 2

R2342 10K_0201_5%

@

3

VCC3_SUS

D12 RB520CM-30T2R_VMN2M2

1 2

8

VCC

7

/HOLD/RESET(IO3)

6

CLK

5

DI(IO0)

VCC3_SUS_SPI

DO(IO1)

/WP(IO2)

GND

W25Q128FVSIQ_S O8

2

16MB SOIC8

WINBOND W25Q128FVSIQ

MACRONIX MX25L12873FM2I-10G

2

C429

@

U49

1

/CS

2

3

4

@

1 2

R706 3.3K_0201_5%

SPI_IO2_0_R SPI_IO2 SPI_IO3_0_R

1

1 2

R703 3.3K_0201_5%

0.1U_0201_6.3V6-K

1 2

R8980 33_0201_5%

1 2

R8981 33_0201_5%

SPI_IO3

SPI_IO2 7 SPI_IO3 7

1

TABLE

SF100 PIN HEADER INTERFACE (TOP VIEW)

1

VCC

3

CS#

5

MISO

7

(KEY)

B B

A A

5

4

D12.1 R322.2 R694.2 N/A

3

GND R681.2 R674.2 N/A

2

GND

4

CLK

6

MOSI

8

(RESET)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

SPI FLASH

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

21 103

0.01

5

4

3

VCC2R5A M_A_VREF_CA

2

1

M_A_DQ[63:0]4

-M_A_DQS[7:0]4

M_A_DQS[7:0]4

D D

C C

B B

M_A_A[16:0]4,23

VCC1R2A VCC2R5A

M_A_DQ15 M_A_DQ14 M_A_DQ13 M_A_DQ12 M_A_DQ11 M_A_DQ10 M_A_DQ9 M_A_DQ8

M_A_DQS1

-M_A_DQS1

M_A_DQ7 M_A_DQ6 M_A_DQ5 M_A_DQ4 M_A_DQ3 M_A_DQ2 M_A_DQ1 M_A_DQ0

M_A_DQS0

-M_A_DQS0

M_A_DDRCLK0_1066M

-M_A_DDRCLK0_1066M

M_A_CKE04,23

-M_A_CS04,23

M_A_ODT04,23

-M_A_ACT4,23

M_A_BG04,23

M_A_BS14,23 M_A_BS04,23

M_A_CKE0

-M_A_CS0

M_A_ODT0

-M_A_ACT

M_A_BG1_R M_A_BG1_R M_A_BG1_R M_A_BG1_R M_A_BG0

M_A_BS1 M_A_BS0

M_A_A16 M_A_A16 M_A_A15 M_A_A14

M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0

D7

DQU7

D3

DQU6

C8

DQU5

C2

DQU4

C7

DQU3

C3

DQU2

B8

DQU1

A3

DQU0

B7

DQSU_T

A7

DQSU_C

E2

DMU_n/DBIU_n

J7

DQL7

J3

DQL6

H8

DQL5

H2

DQL4

H7

DQL3

H3

DQL2

F7

DQL1

G2

DQL0

G3

DQSL_t

F3

DQSL_c

E7

DML_n/DBIL_n

K7

CK_t

K8

CK_c

K2

CKE

L7

CS_n

K3

ODT

L3

ACT_n

M9

VSS_M9

M2

BG0

N8

BA1

N2

BA0

L8

RAS_n

M8

CAS_n

L2

WE_n/A14

T8

A13

M7

A12/BC_n

T2

A11

M3

A10/AP

R7

A9

R2

A8

R8

A7

P2

A6

P8

A5

N3

A4

N7

A3

R3

A2

P7

A1

P3

A0

K4A8G165WB-BCPB_FBGA96

R2549 0_0201_5%

X76@

1 2

2

1

C2552

0.1U_0201_6.3V6-K

U125

VPP_B1 VPP_R9

VREFCA

VDD_B3 VDD_B9 VDD_D1

VDD_G7

VDD_J1 VDD_J9 VDD_L1

VDD_L9 VDD_R1 VDD_T9

VDDQ_A1 VDDQ_A9 VDDQ_C1 VDDQ_D9 VDDQ_F2 VDDQ_F8 VDDQ_G1 VDDQ_G9 VDDQ_J2 VDDQ_J8

VSSQ_A2 VSSQ_A8 VSSQ_C9 VSSQ_D2 VSSQ_D8 VSSQ_E3 VSSQ_E8 VSSQ_F1 VSSQ_H1 VSSQ_H9

VSS_B2

VSS_E1 VSS_G8

VSS_K1

VSS_K9 VSS_N1

VSS_T1

RESET_n

ALERT_n

VSS_E9

X76@

2

1

NC

PAR

ZQ

TEN

C2553

0.1U_0201_6.3V6-K

M_A_VREF_CA

B1 R9

M1

B3 B9 D1 G7 J1 J9 L1 L9 R1 T9

A1 A9 C1 D9 F2 F8 G1 G9 J2 J8

A2 A8 C9 D2 D8 E3 E8 F1 H1 H9

B2 E1 G8 K1 K9 N1 T1

T7

P1

T3

P9

E9

F9

N9

R9009

2

C2554

0.1U_0201_6.3V6-K

1

VCC1R2A

-DRAMRST

M_A_PARITY

-M_A_ALERT

1 2

243_0201_1%

C2555

0.1U_0201_6.3V6-K

2

1

M_A_DDRCLK0_1066M

-M_A_DDRCLK0_1066M

2

C2619

0.1U_0201_6.3V6-K

M_A_DQ31 M_A_DQ30 M_A_DQ29 M_A_DQ28 M_A_DQ27 M_A_DQ26 M_A_DQ25 M_A_DQ24

M_A_DQS3

-M_A_DQS3

M_A_DQ23 M_A_DQ22 M_A_DQ21 M_A_DQ20 M_A_DQ19 M_A_DQ18 M_A_DQ17 M_A_DQ16

M_A_DQS2

-M_A_DQS2

M_A_CKE0

-M_A_CS0

M_A_ODT0

-M_A_ACT

M_A_BG0

M_A_BS1 M_A_BS0

M_A_A15 M_A_A14

M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0

C2620

0.1U_0201_6.3V6-K

1

VCC1R2A VCC1R2A VCC1R2AVCC2R5A

D7

DQU7

D3

DQU6

C8

DQU5

C2

DQU4

C7

DQU3

C3

DQU2

B8

DQU1

A3

DQU0

B7

DQSU_T

A7

DQSU_C

E2

DMU_n/DBIU_n

J7

DQL7

J3

DQL6

H8

DQL5

H2

DQL4

H7

DQL3

H3

DQL2

F7

DQL1

G2

DQL0

G3

DQSL_t

F3

DQSL_c

E7

DML_n/DBIL_n

K7

CK_t

K8

CK_c

K2

CKE

L7

CS_n

K3

ODT

L3

ACT_n

M9

VSS_M9

M2

BG0

N8

BA1

N2

BA0

L8

RAS_n

M8

CAS_n

L2

WE_n/A14

T8

A13

M7

A12/BC_n

T2

A11

M3

A10/AP

R7

A9

R2

A8

R8

A7

P2

A6

P8

A5

N3

A4

N7

A3

R3

A2

P7

A1

P3

A0

K4A8G165WB-BCPB_FBGA96

R2550 0_0201_5%

X76@

1 2

2

C2621

0.1U_0201_6.3V6-K

1

U126

VPP_B1 VPP_R9

VREFCA

VDD_B3 VDD_B9 VDD_D1

VDD_G7

VDD_J1

VDD_J9 VDD_L1 VDD_L9 VDD_R1 VDD_T9

VDDQ_A1 VDDQ_A9 VDDQ_C1 VDDQ_D9 VDDQ_F2 VDDQ_F8 VDDQ_G1 VDDQ_G9

VDDQ_J2 VDDQ_J8

VSSQ_A2 VSSQ_A8 VSSQ_C9 VSSQ_D2 VSSQ_D8 VSSQ_E3 VSSQ_E8

VSSQ_F1 VSSQ_H1 VSSQ_H9

VSS_B2 VSS_E1 VSS_G8 VSS_K1 VSS_K9 VSS_N1

VSS_T1

RESET_n

ALERT_n

VSS_E9

X76@

PAR

TEN

NC

ZQ

2

1

B1 R9

M1

B3 B9 D1 G7 J1 J9 L1 L9 R1 T9

A1 A9 C1 D9 F2 F8 G1 G9 J2 J8

A2 A8 C9 D2 D8 E3 E8 F1 H1 H9

B2 E1 G8 K1 K9 N1 T1

T7

P1

T3

P9

E9

F9

N9

2

C2622

0.1U_0201_6.3V6-K

1

M_A_VREF_CA

VCC1R2A VCC2R5A

-DRAMRST -DRAMRST

M_A_PARITY

-M_A_ALERT

R9011

1 2

243_0201_1%

C2623 10U_0402_6.3V6-M

R9012 0_0201_5%

X76@

1 2

2

C2624 10U_0402_6.3V6-M

1

M_A_DDRCLK0_1066M

-M_A_DDRCLK0_1066M

M_A_DQ47 M_A_DQ46 M_A_DQ45 M_A_DQ44 M_A_DQ43 M_A_DQ42 M_A_DQ41 M_A_DQ40

M_A_DQS5

-M_A_DQS5

M_A_DQ39 M_A_DQ38 M_A_DQ37 M_A_DQ36 M_A_DQ35 M_A_DQ34 M_A_DQ33 M_A_DQ32

M_A_DQS4

-M_A_DQS4

M_A_CKE0

-M_A_CS0

M_A_ODT0

-M_A_ACT

M_A_BG0

M_A_BS1 M_A_BS0

M_A_A16 M_A_A15 M_A_A14

M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0

C2556

2

1

R2551 0_0201_5%

X76@

1 2

2

C2557

1

.047U_0201_6.3V6-K

U127

D7

DQU7

D3

DQU6

C8

DQU5

C2

DQU4

C7

DQU3

C3

DQU2

B8

DQU1

A3

DQU0

B7

DQSU_T

A7

DQSU_C

E2

DMU_n/DBIU_n

J7

DQL7

J3

DQL6

H8

DQL5

H2

DQL4

H7

DQL3

H3

DQL2

F7

DQL1

G2

DQL0

G3

DQSL_t

F3

DQSL_c

E7

DML_n/DBIL_n

K7

CK_t

K8

CK_c

K2

CKE

L7

CS_n

K3

ODT

L3

ACT_n

M9

VSS_M9

M2

BG0

N8

BA1

N2

BA0

L8

RAS_n

M8

CAS_n

L2

WE_n/A14

T8

A13

M7

A12/BC_n

T2

A11

M3

A10/AP

R7

A9

R2

A8

R8

A7

P2

A6

P8

A5

N3

A4

N7

A3

R3

A2

P7

A1

P3

A0

K4A8G165WB-BCPB_FBGA96

X76@

.047U_0201_6.3V6-K

VPP_B1 VPP_R9

VREFCA

VDD_B3

VDD_B9 VDD_D1 VDD_G7

VDD_J1

VDD_J9

VDD_L1

VDD_L9 VDD_R1

VDD_T9

VDDQ_A1

VDDQ_A9 VDDQ_C1 VDDQ_D9

VDDQ_F2

VDDQ_F8 VDDQ_G1 VDDQ_G9

VDDQ_J2

VDDQ_J8

VSSQ_A2

VSSQ_A8

VSSQ_C9

VSSQ_D2

VSSQ_D8

VSSQ_E3

VSSQ_E8

VSSQ_F1

VSSQ_H1

VSSQ_H9

VSS_B2 VSS_E1 VSS_G8 VSS_K1 VSS_K9 VSS_N1 VSS_T1

RESET_n

ALERT_n

VSS_E9

2

C2558

1

B1 R9

M1

B3 B9 D1 G7 J1 J9 L1 L9 R1 T9

A1 A9 C1 D9 F2 F8 G1 G9 J2 J8

A2 A8 C9 D2 D8 E3 E8 F1 H1 H9

B2 E1 G8 K1 K9 N1 T1

T7

NC

P1

T3

PAR

P9

E9

F9

ZQ

N9

TEN

2

C2559

1

.047U_0201_6.3V6-K

M_A_VREF_CA

VCC1R2A VCC2R5A

M_A_DQ63 M_A_DQ62 M_A_DQ61 M_A_DQ60 M_A_DQ59 M_A_DQ58 M_A_DQ57 M_A_DQ56

M_A_DQS7

-M_A_DQS7

M_A_DQ55 M_A_DQ54 M_A_DQ53 M_A_DQ52 M_A_DQ51 M_A_DQ50 M_A_DQ49 M_A_DQ48

M_A_DQS6

-M_A_DQS6

M_A_DDRCLK0_1066M

-M_A_DDRCLK0_1066M

M_A_CKE0

-M_A_CS0

M_A_ODT0

-M_A_ACT

M_A_BG0

M_A_BS1 M_A_BS0

M_A_A16 M_A_A15 M_A_A14

M_A_A13 M_A_A12 M_A_A11 M_A_A10

M_A_PARITY

-M_A_ALERT

R9013

1 2

243_0201_1%

1 2

R9014 0_0201_5%

X76@

M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0

1 2

D7

DQU7

D3

DQU6

C8

DQU5

C2

DQU4

C7

DQU3

C3

DQU2

B8

DQU1

A3

DQU0

B7

DQSU_T

A7

DQSU_C

E2

DMU_n/DBIU_n

J7

DQL7

J3

DQL6

H8

DQL5

H2

DQL4

H7

DQL3

H3

DQL2

F7

DQL1

G2

DQL0

G3

DQSL_t

F3

DQSL_c

E7

DML_n/DBIL_n

K7

CK_t

K8

CK_c

K2

CKE

L7

CS_n

K3

ODT

L3

ACT_n

M9

VSS_M9

M2

BG0

N8

BA1

N2

BA0

L8

RAS_n

M8

CAS_n

L2

WE_n/A14

T8

A13

M7

A12/BC_n

T2

A11

M3

A10/AP

R7

A9

R2

A8

R8

A7

P2

A6

P8

A5

N3

A4

N7

A3

R3

A2

P7

A1

P3

A0

K4A8G165WB-BCPB_FBGA96

R2552 0_0201_5%

X76@

U128

X76@

VPP_B1 VPP_R9

VREFCA

VDD_B3 VDD_B9 VDD_D1 VDD_G7

VDD_J1 VDD_J9 VDD_L1 VDD_L9

VDD_R1

VDD_T9

VDDQ_A1 VDDQ_A9 VDDQ_C1 VDDQ_D9 VDDQ_F2

VDDQ_F8 VDDQ_G1 VDDQ_G9

VDDQ_J2

VDDQ_J8

VSSQ_A2

VSSQ_A8 VSSQ_C9 VSSQ_D2 VSSQ_D8

VSSQ_E3

VSSQ_E8

VSSQ_F1 VSSQ_H1 VSSQ_H9

VSS_B2 VSS_E1

VSS_G8

VSS_K1 VSS_K9 VSS_N1 VSS_T1

RESET_n

ALERT_n

VSS_E9

M_A_VREF_CA

VCC1R2A

B1 R9

M1

B3 B9 D1 G7 J1 J9 L1 L9 R1 T9

A1 A9 C1 D9 F2 F8 G1 G9 J2 J8

A2 A8 C9 D2 D8 E3 E8 F1 H1 H9

B2 E1 G8 K1 K9 N1 T1

T7

NC

P1

-DRAMRST

M_A_PARITY

T3

PAR

ZQ

TEN

-M_A_ALERT

P9

E9

F9

N9

R9016 0_0201_5%

R9015

X76@

1 2

243_0201_1%

2

1

X76@

R9010

1 2

0_0201_5%

M_A_DDRCLK0_1066M4,23

-M_A_DDRCLK0_1066M4,23

M_A_BG14

-DRAMRST5,24

A A

M_A_PARITY4,23

-M_A_ALERT4,23

M_A_DDRCLK0_1066M

-M_A_DDRCLK0_1066M

M_A_BG1 M_A_BG1_R

-DRAMRST

M_A_PARITY

-M_A_ALERT

5

R2553 0_0201_5%X76@

1 2

2

1

@

C1063

0.1U_0201_6.3V6-K

M_A_BG1_R 23

R2549

R2550

R2551

R2552

R2553

R9041 NA

R9010

R9012

R9014

R9016

4

SDP

ASM

NA

0_5%

3

DDP

NA

ASM

243_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

DDR4 BASE MEMORY CH-A (1/2)

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

22 103

0.01

TAB LE:

5

M_A_A[16:0]4,22

D D

M_A_BG1_R22

M_A_BG04,22

M_A_BS14,22

M_A_BS04,22

-M_A_ACT4,22

C C

M_A_PARITY4,22

-M_A_CS04,22

M_A_ODT04,22

M_A_CKE04,22

M_A_DDRCLK0_1066 M4,22

-M_A_DDRCLK0_1066M4,22

-M_A_ALERT4,22

M_A_BG1_R

M_A_BG0

M_A_BS1

M_A_BS0

-M_A_ACT

M_A_PARITY

-M_A_CS0

M_A_ODT0

M_A_CKE0

M_A_DDRCLK0_1066M

-M_A_DDRCLK0_1066M

-M_A_ALERT

M_A_A16

M_A_A15

M_A_A14

M_A_A13

M_A_A12

M_A_A11

M_A_A10

M_A_A9

M_A_A8

M_A_A7

M_A_A6

M_A_A5

M_A_A4

M_A_A3

M_A_A2

M_A_A1

M_A_A0

4

1 2

R2555 34.8_02 01_1%

1 2

R9025 34.8_02 01_1%

1 2

R9026 34.8_02 01_1%

1 2

R9027 34.8_02 01_1%

1 2

R9028 34.8_02 01_1%

1 2

R9029 34.8_02 01_1%

1 2

R9030 34.8_02 01_1%

1 2

R9031 34.8_02 01_1%

1 2

R9032 34.8_02 01_1%

1 2

R9033 34.8_02 01_1%

1 2

R9034 34.8_02 01_1%

1 2

R9035 34.8_02 01_1%

1 2

R9036 34.8_02 01_1%

1 2

R9037 34.8_02 01_1%

1 2

R9038 34.8_02 01_1%

1 2

R9039 34.8_02 01_1%

1 2

R9040 34.8_02 01_1%

1 2

R9041 34.8_02 01_1%X76@

1 2

R9042 34.8_02 01_1%

1 2

R9043 34.8_02 01_1%

1 2

R9044 34.8_02 01_1%

1 2

R9045 34.8_02 01_1%

1 2

R9046 34.8_02 01_1%

1 2

R9047 34.8_02 01_1%

1 2

R2533 34.8_02 01_1%

1 2

R9049 34.8_02 01_1%

1 2

R9050 26.1_0201_1%

1 2

R9051 26.1_0201_1%

1 2

R2554 49.9_0201_1%

VCC0R6B

VCC1R2A

3

VCC1R2A

2

1

VCC1R2A

2

1

VCC1R2A

2

C479 10U_0402_6.3V6-M

1

C428 1U_0402_6.3V6-K

C2625 1U_0402_6.3V6-K

2

1

2

1

2

C481 10U_0402_6.3V6-M

1

C242 1U_0402_6.3V6-K

C2626 1U_0402_6.3V6-K

2

1

2

1

2

C485 10U_0402_6.3V6-M

1

C534 1U_0402_6.3V6-K

C2627 1U_0402_6.3V6-K

2

C537 1U_0402_6.3V6-K

1

2

C2628 1U_0402_6.3V6-K

1

2

C489 10U_0402_6.3V6-M

1

2

C540 1U_0402_6.3V6-K

1

2

C2629 1U_0402_6.3V6-K

1

2

C497 10U_0402_6.3V6-M

1

2

C425 1U_0402_6.3V6-K

1

2

C2630 1U_0402_6.3V6-K

1

2

C503 10U_0402_6.3V6-M

1

2

C426 1U_0402_6.3V6-K

1

2

C2631 1U_0402_6.3V6-K

1

2

C517 10U_0402_6.3V6-M

1

2

C427 1U_0402_6.3V6-K

1

2

C2632 1U_0402_6.3V6-K

1

2

C524 10U_0402_6.3V6-M

1

B B

2014/07/01

VCC1R2A

M_A_VREF_CA

R1889

1.82K_0201_1%

1 2

R1890

1.82K_0201_1%

1 2

Title

DDR4 BASE MEMORY CH-A (2/2)

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

23 103

0.01

VCC0R6B VCC0R6B

2

1

A A

5

C411 10U_0402_6.3V6-M

C466 10U_0402_6.3V6-M

1

2

C31

0.1U_0201_6.3V6-K

1

2

C87

0.1U_0201_6.3V6-K

1

4

2

C100

0.1U_0201_6.3V6-K

1

2

C103

0.1U_0201_6.3V6-K

1

2

C2633

0.1U_0201_6.3V6-K

1

2

C2634

0.1U_0201_6.3V6-K

1

2

C2635

0.1U_0201_6.3V6-K

1

2

C2636

0.1U_0201_6.3V6-K

1

3

M_A_VREF_CA_CPU4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

R1110 2.74_0201 _1%

2

C1602

0.022U_0201_6.3V6 -K

1

R1111

24.9_0201_1%

1 2

5

M_B_DQ[63:0]5

-M_B_DQS[7:0]5

M_B_DQS[7:0]5

M_B_A[16:0]5

D D

VCC1R2A VCC1R2A

M_B_DQ5

M_B_DQ1

-M_B_DQS0 M_B_DQS0

M_B_DQ7

M_B_DQ3

M_B_DQ13

M_B_DQ9

M_B_DQ15

M_B_DQ10

M_B_CKE0

M_B_BG1 M_B_BG0

M_B_A12 M_B_A9

M_B_A8 M_B_A6

M_B_DQ21

M_B_DQ17

-M_B_DQS2 M_B_DQS2

M_B_DQ23

M_B_DQ19

M_B_DQ29

M_B_DQ25

M_B_DQ30

M_B_DQ26

C C

M_B_CKE05

M_B_BG15 M_B_BG05

B B

J43A

1

VSS_1

3

DQ5

5

VSS_3

7

DQ1

9

VSS_5

11

DQS0_C

13

DQS0_t

15

VSS_8

17

DQ7

19

VSS_10

21

DQ3

23

VSS_12

25

DQ13

27

VSS_14

29

DQ9

31

VSS_16

33

DM1_n/DBl1_n

35

VSS_17

37

DQ15

39

VSS_19

41

DQ10

43

VSS_21

45

DQ21

47

VSS_23

49

DQ17

51

VSS_25

53

DQS2_c

55

DQS2_t

57

VSS_28

59

DQ23

61

VSS_30

63

DQ19

65

VSS_32

67

DQ29

69

VSS_34

71

DQ25

73

VSS_36

75

DM3_n/DBl3_n

77

VSS_37

79

DQ30

81

VSS_39

83

DQ26

85

VSS_41

87

CB5/NC

89

VSS_43

91

CB1/NC

93

VSS_45

95

DQS8_c

97

DQS8_t

99

VSS_48

101

CB2/NC

103

VSS_50

105

CB3/NC

107

VSS_52

109

CKE0

111

VDD_1

113

BG1

115

BG0

117

VDD_3

119

A12

121

A9

123

VDD_5

125

A8

127

A6

129

VDD_7

FOX_AS0A826-H4SB-7H

CONN@

VSS_2

VSS_4

VSS_6

DM0_n/DBIO_n

VSS_7

VSS_9

VSS_11

VSS_13

VSS_15 DQS1_c

DQS1_t

VSS_18

VSS_20

VSS_22

VSS_24

VSS_26

DM2_n/DBl2_n

VSS_27

VSS_29

VSS_31

VSS_33

VSS_35 DQS3_c

DQS3_t

VSS_38

VSS_40

VSS_42 CB4/NC VSS_44 CB0/NC VSS_46

DBI8_n VSS_47 CB6/NC VSS_49 CB7/NC VSS_51

RESET_n

VDD_2 ACT_n

ALERT_n

VDD_4

VDD_6

VDD_8

2 4

DQ4

6 8

DQ0

10 12 14 16

DQ6

18 20

DQ2

22 24

DQ12

26 28

DQ8

30 32 34 36 38

DQ14

40 42

DQ11

44 46

DQ20

48 50

DQ16

52 54 56 58

DQ22

60 62

DQ18

64 66

DQ28

68 70

DQ24

72 74 76 78 80

DQ31

82 84

DQ27

86 88 90 92 94 96 98 100 102 104 106 108 110

CKE1

112 114 116 118 120

A11

122

A7

124 126

A5

128

A4

130

M_B_DQ4

M_B_DQ0

M_B_DQ6

M_B_DQ2

M_B_DQ12

M_B_DQ8

-M_B_DQS1 M_B_DQS1

M_B_DQ14

M_B_DQ11

M_B_DQ20

M_B_DQ16

M_B_DQ22

M_B_DQ18

M_B_DQ28

M_B_DQ24

-M_B_DQS3 M_B_DQS3

M_B_DQ31

M_B_DQ27

4

-DRAMRST M_B_CKE1

-M_B_ACT

-M_B_ALERT

M_B_A11 M_B_A7

M_B_A5 M_B_A4

-DRAMRST 5,22 M_B_CKE1 5

-M_B_ACT 5

-M_B_ALERT 5

3

VCC1R2A VCC1R2A

J43B

131

M_B_A1

M_B_DDRCLK0_1066M5

-M_B_DDRCLK0_1066M5

VCC3BVCC2R5A VCC0R6B

SMB_CLK_3B62,66 SMB_DATA_3B 62,66

M_B_DDRCLK0_1066M

-M_B_DDRCLK0_1066M

M_B_PARITY

M_B_PARITY5

M_B_BS1

M_B_BS15

-M_B_CS0

-M_B_CS05

M_B_A14

M_B_ODT0

M_B_ODT05

-M_B_CS1

-M_B_CS15

M_B_ODT1

M_B_ODT15

M_B_DQ37

M_B_DQ33

-M_B_DQS4 M_B_DQS4

M_B_DQ38

M_B_DQ34

M_B_DQ44

M_B_DQ40

M_B_DQ46

M_B_DQ42

M_B_DQ52

M_B_DQ49

-M_B_DQS6 M_B_DQS6

M_B_DQ55

M_B_DQ51

M_B_DQ61

M_B_DQ56

M_B_DQ62

M_B_DQ58

SMB_CLK_3B SMB_DATA_3B

A3

133

A1

135

VDD_9

137

CK0_t

139

CK0_c

141

VDD_11

143

Parity

145

BA1

147

VDD_13

149

CS0_n

151

WE_n/A14

153

VDD_15

155

ODT0

157

CS1_n

159

VDD_17

161

ODT1

163

VDD_19

165

C1/CS3_n/NC

167

VSS_53

169

DQ37

171

VSS_55

173

DQ33

175

VSS_57

177

DQS4_c

179

DQS4_t

181

VSS_60

183

DQ38

185

VSS_62

187

DQ34

189

VSS_64

191

DQ44

193

VSS_66

195

DQ40

197

VSS_68

199

DM5_n/DBl5_n

201

VSS_69

203

DQ46

205

VSS_71

207

DQ42

209

VSS_73

211

DQ52

213

VSS_75

215

DQ49

217

VSS_77

219

DQS6_c

221

DQS6_t

223

VSS_80

225

DQ55

227

VSS_82

229

DQ51

231

VSS_84

233

DQ61

235

VSS_86

237

DQ56

239

VSS_88

241

DM7_n/DBl7_n

243

VSS_89

245

DQ62

247

VSS_91

249

DQ58

251

VSS_93

253

SCL

255

VDDSPD

257

VPP_1

259

VPP_2

261

GND_1

FOX_AS0A826-H4SB-7H

CONN@

EVENT_n

VDD_10

CK1_t

CK1_c

VDD_12

A10/AP VDD_14

RAS_n/A16

VDD_16

CAS_n/A15

VDD_18

C0/CS2_n/NC

VREFCA

VSS_54

DQ36

VSS_56

DQ32

VSS_58

DM4_n/DBl4_n

VSS_59

DQ39

VSS_61

DQ35

VSS_63

DQ45

VSS_65

DQ41

VSS_67 DQS5_c DQS5_t VSS_70

DQ47

VSS_72

DQ43

VSS_74

DQ53

VSS_76

DQ48

VSS_78

DM6_n/DBl6_n

VSS_79

DQ54

VSS_81

DQ50

VSS_83

DQ60

VSS_85

DQ57 VSS_87 DQS7_c DQS7_t VSS_90

DQ63 VSS_92

DQ59 VSS_94

GND_2

132

A2

134 136 138 140 142 144

A0

146 148 150

BA0

152 154 156 158

A13

160 162 164 166

RFU

168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254

SDA

256

SA0

258

Vtt

260

SA1

262

M_B_A2M_B_A3

M_B_DDRCLK1_1066M

-M_B_DDRCLK1_1066M

M_B_A0

M_B_A10

M_B_BS0 M_B_A16

M_B_A15 M_B_A13

M_B_DQ36

M_B_DQ32

M_B_DQ39

M_B_DQ35

M_B_DQ45

M_B_DQ41

-M_B_DQS5 M_B_DQS5

M_B_DQ47

M_B_DQ43

M_B_DQ53

M_B_DQ48

M_B_DQ54

M_B_DQ50

M_B_DQ60

M_B_DQ57

-M_B_DQS7 M_B_DQS7

M_B_DQ63

M_B_DQ59

2

M_B_VREF_CA_CPU4

M_B_DDRCLK1_1066M 5

-M_B_DDRCLK1_1066M 5

M_B_BS0 5

M_B_VREF_CA

SPD ADDRESS: 51H

VCC3B

1 2

R2066 10K_0201_5%

2

1

R2074

24.9_0201_1%

1 2

R2073 2_0201_1%

C2119

0.022U_0201_6.3V6-K

VCC1R2A

R2069 1K_0201_1%

1 2

R2070 1K_0201_1%

1 2

M_B_VREF_CA

2

@

C2120

2.2U_0402_6.3V6-K

1

M_B_VREF_CA

2

C2121

0.1U_0201_6.3V6-K

1

VCC2R5A

C2122 10U_0402_6.3V6-M

Thorpe-2 UMA

1

2

C2123 1U_0402_6.3V6-K

1

24 103

0.01

2

1

A A

VCC3B

2

1

C2117

2.2U_0402_6.3V6-K

5

2

C2118

0.1U_0201_6.3V6-K

1

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

2

LC Future Center Secret Data

Deciphered Date

2014/07/01

Title

DDR4 SO DIMM CHANNEL-B (1/2)

Size

Document Number Rev

Custom

Wednesday, October 26, 2016

Date: Sheet of

5

D D

4

3

2

1

VCC1R2A

C2640 1U_0402_6.3V6-K

C2645

0.1U_0201_6.3V6-K

C2650

0.1U_0201_6.3V6-K

EMC_NS@

2

1

@

2

1

@

2

1

2

1

@

C C

B B

VCC1R2A

@

VCC1R2A

2

1

2

1

C2641 1U_0402_6.3V6-K

C2646

0.1U_0201_6.3V6-K

C2651

0.1U_0201_6.3V6-K

EMC_NS@

2

C2642 1U_0402_6.3V6-K

1

@

2

C2647

0.1U_0201_6.3V6-K

1

@

2

C2652

0.1U_0201_6.3V6-K

1

@

2

C2643 1U_0402_6.3V6-K

1

@

2

C2648

0.1U_0201_6.3V6-K

1

@

2

C2653

0.1U_0201_6.3V6-K

1

@

2

C2644 1U_0402_6.3V6-K

1

@

2

C2649

0.1U_0201_6.3V6-K

1

@

2

C2654

0.1U_0201_6.3V6-K

1

@

VCC1R2A

2

1

VCC1R2A

2

1

VCC0R6B

2

1

C2124 1U_0402_6.3V6-K

C2132 10U_0402_6.3V6-M

C2140

0.1U_0201_6.3V6-K

2

C2125 1U_0402_6.3V6-K

1

2

C2133 10U_0402_6.3V6-M

1

2

C2141

0.1U_0201_6.3V6-K

1

2

C2126 1U_0402_6.3V6-K

1

2

C2134 10U_0402_6.3V6-M

1

2

C2142

0.1U_0201_6.3V6-K

1

2

C2127 1U_0402_6.3V6-K

1

2

C2135 10U_0402_6.3V6-M

1

2

C2143

0.1U_0201_6.3V6-K

1

2

C2128 1U_0402_6.3V6-K

1

2

C2136 10U_0402_6.3V6-M

1

2

C2129 1U_0402_6.3V6-K

1

2

C2137 10U_0402_6.3V6-M

1

2

C2130 1U_0402_6.3V6-K

1

2

C2138 10U_0402_6.3V6-M

1

2

C2131 1U_0402_6.3V6-K

1

2

C2139 10U_0402_6.3V6-M

1

VCC0R6B

2

C2144 10U_0402_6.3V6-M

1

A A

5

4

2

C2145 10U_0402_6.3V6-M

1

3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

DDR4 SO DIMM CHANNEL-B (2/2)

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

25 103

0.01

5

4

3

2

1

VCC3M

8

72

6

54

R76 100_0201_5%

1 2

2

C603

0.1U_0402_25V7-K

1

VCC3P

R361 47_0201_5%

1 2

D63 RB521CS-30GT2RA_VMN2-2

1 2

R714 47K_0201_5%

1 2

2

RF@

C9530 2200P_0201_25V7-K

1

Q22

1

D D

C C

3

TPCF8004_2-3U1S

VCC3P_DRV68

VCC3P_DRV

Touch Panel Sequence

R10336

F42

D739

C9541

Q266

R10341

C9542

R10339

D740

Page 60

R10337 ASM No ASM

Page 60

R10338 ASM No ASM

R38

F24

Page 60

R10323

Page 60

R2412

VCC3LCD

2

C315 1U_0402_6.3V6-K

1

Support Non-Support

ASM No ASM

ASM

No ASM

ASM

No ASM

ASM

No ASM

ASM

No ASM

ASM

No ASM

ASM

No ASM

ASM

No ASM

ASM

No ASM

ASM

No ASM

ASM

No ASM

ASM

No ASM

ASM

No ASM

2

C311

C308

0.1U_0201_6.3V6-K

0.01U_0201_6.3V7-K

1

F3

21

3A_32V_ERBRD3R00X

VCC3P

0.9A

VBL20

1.2A

VCC3P

R668

VCC5MVCC3M

10K_0201_5%

1 2

-USB_PORT2_OC210

LED_AC_CHG58,62 LED_AC_CON58

USB3P3_TXP_SYS10 USB3P3_TXN_SYS10

USB3P3_RXP_SYS10 USB3P3_RXN_SYS10

B B

A A

USBP3-_SYS10 USBP3+_SYS10

PANEL_BKLT_CTRL3 BACKLIGHT_ON58

-USB_PORT2_OC2 USB_ON1

USB_ON132,59

LED_AC_CHG LED_AC_CON

USB3P3_TXP_SYS USB3P3_TXN_SYS

USB3P3_RXP_SYS USB3P3_RXN_SYS

USBP3-_SYS USBP3+_SYS

PANEL_BKLT_CTRL BACKLIGHT_ON

EDP_HPD3

1 2

EDP_AUXN3 EDP_AUXP3

EDP_TXP03 EDP_TXN03

EDP_TXP13 EDP_TXN13

EDP_TXP23 EDP_TXN23

EDP_TXP33 EDP_TXN33

C8289 0.1U_0201_6.3V6-K

1 2

C8290 0.1U_0201_6.3V6-K

1 2

C8299 0.1U_0201_6.3V6-K

1 2

C8298 0.1U_0201_6.3V6-K

1 2

C8296 0.1U_0201_6.3V6-K

1 2

C8295 0.1U_0201_6.3V6-K

1 2

C8294 0.1U_0201_6.3V6-K

1 2

C8293 0.1U_0201_6.3V6-K

1 2

C8292 0.1U_0201_6.3V6-K

1 2

C8291 0.1U_0201_6.3V6-K

EDP_AUXN_CONN EDP_AUXP_CONN

EDP_TXP0_CONN EDP_TXN0_CONN

EDP_TXP1_CONN EDP_TXN1_CONN

EDP_TXP2_CONN EDP_TXN2_CONN

EDP_TXP3_CONN EDP_TXN3_CONN

@

2

C929 1000P_0201_25V7-K

1

LCD CONNECTOR

J10

60

59

58

57

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

I-PEX_20654-060E-01

CONN@

2

RF@

C9531 2200P_0201_25V7-K

1

GND1 GND2

GND3 GND4

GND5 GND6

GND7 GND8

GND9 GND10 GND11 GND12 GND13

61 62

63 64

65 66

67 68 69 70 71 72 73

2

C307 .01U_0402_25V7-K

1

EMC@

2

C310

0.1U_0402_25V7-K

1

2

C313 1U_0603_25V7-K

1

EMC@

USBP7+

USBP7-

VCC3M

VCC3TP_ON60

Co-layout

FLJ7

4

112

EXC24CH900U_4P

EMC_NS@

-PWRSWITCH17,57,66,67

-LED_PWR58,62

334

2

-PWRSWITCH

-LED_PWR

Q266

1

3

TPCF8004_2-3U1S

USBP7+_CONN

USBP7-_CONN

@

8

72

6

54

@

R10341 100_0201_5%

1 2

2

@

C9542

0.1U_0402_25V7-K

1

-LED_LOGO58,62

-INT_MIC_DTCT8 MIC_DATA50 MIC_CLK50

-LID_CLOSE59

1 2

R13 36 _0402_5%

VCC3TP

@

R10339 33_0201_5%

1 2

@

D740 RB521CS-30GT2RA_VMN2-2

1 2

USBP9-10 USBP9+10

USBP7-10 USBP7+10

2

C724 .01U_0402_25V7-K

1

TOUCH_EN60

USBP9USBP9+

-LED_LOGO

USBP7USBP7+

-INT_MIC_DTCT MIC_DATA MIC_CLK

-LID_CLOSE

VCC3M

21

F31

0.5A_32V_ERBRD0R50X

VBL20VSYS

F7

21

3A_32V_ERBRD3R00X

-LID_CLOSE

1 2

R2078 0_0201_5%

1 2

R2079 0_0201_5%

Co-layout

1 2

R786 0_0402_5%

1 2

R785 0_0402_5%

J52

1

2

3

4

5

GND1

6

GND2

HIGHS_WS23040-S0291-HF

CONN@

VCC3TP VCC3TP

R10336

1 2

@

1 2

D739 RB521CS-30GT2R A_VMN2-2

1 2

D11 RB521CS-30GT2RA_VMN2-2

1 2

R102 3.9K_0402_5%

VCC3BVCC3SWVCC3SW VCC3M VCC3BVCC3B

21

F16

F26

R38

R8954

1 2

100K_0201_5%

2

C33

C934

1

@

1000P_0201_25V7-K

EMC@

100K_0201_5%

0.5A_32V_ERBRD0R50X

USBP9-_CONN USBP9+_CONN

2

1

10P_0201_25V8-D

21

2

F24

C2578

1

0.1U_0201_6.3V6-K

EMC@

0.5A_32V_ERBRD0R50X

12

EMC_NS@

D293 DF2S6.8UFS_1-1L1A2

D294 DF2S6.8UFS_1-1L1A2

C2579

EMC@

2

1

0.1U_0201_6.3V6-K

USBP7-_CONN USBP7+_CONN

21

2

F42

C9541

@

1

0.1U_0201_6.3V6-K

0.5A_32V_ERBRD0R50X

EMC_NS@

J11

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

I-PEX_20455-030E-02

CONN@

34

G4

33

G3

32

G2

31

G1

PLACE NEAR J11

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2012/07/01

LC Future Center Secret Data

Deciphered Date

2014/07/01

Title

LCD/USB/LID/MIC/CAMERA/PWR SW

Size

Document Number Rev

Custom

Date: Sheet

Thorpe-2 UMA

Wednesday, October 26, 2016

1

26 103

0.01

of

5

D D

C C

4

3

2

1

BLANK

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

BLANK

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

27 103

0.01

5

D D

C C

4

3

2

1

BLANK

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

BLANK

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

28 103

0.01

5

4

3

2

1

VCC3B

D D

DDIP2_CTRLCLK3 DDIP2_CTRLDATA3

C C

2

C2576

0.1U_0201_6.3V6-K

1

R2378

2.2K_0201_5%

2

C2543

0.1U_0201_6.3V6-K

1

VCC3B

R2379

2.2K_0201_5%

1 2

2.2U_0402_6.3V6-K

DDIP2_HPD3

DDIP2_0P3 DDIP2_0N3 DDIP2_1P3 DDIP2_1N3 DDIP2_2P3 DDIP2_2N3 DDIP2_3P3 DDIP2_3N3

DDIP2_AUXN3

DDIP2_AUXP3

C2587

2

C2545

0.01U_0201_6.3V7-K

1

2

R2515

4.99K_0402_1%

1

1 2

DDI_PRIORITY19

DDI_PRIORITY29

C2522 0.1U_02 01_6.3V6-K C2523 0.1U_02 01_6.3V6-K C2524 0.1U_02 01_6.3V6-K C2525 0.1U_02 01_6.3V6-K C2526 0.1U_02 01_6.3V6-K C2527 0.1U_02 01_6.3V6-K C2528 0.1U_02 01_6.3V6-K C2529 0.1U_02 01_6.3V6-K

DDIP2_AUXP

C2530 0.1U_02 01_6.3V6-K

DDIP2_AUXN

C2531 0.1U_02 01_6.3V6-K

R10089

4.7K_0402_5%

2

C2546

0.1U_0201_6.3V6-K

1

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2 1 2

VCC3B

1 2

R2500

4.7K_0402_5%

1 2

2

C2544

0.01U_0201_6.3V7-K

1

DDIP2_0P_C DDIP2_0N_C DDIP2_1P_C DDIP2_1N_C DDIP2_2P_C DDIP2_2N_C DDIP2_3P_C DDIP2_3N_C

DDIP2_AUXP_C WIGIG_DP0P DDIP2_AUXN_C

PS8349B_DP_CFG0 PS8349B_DP_CFG1

PS8349B_MODE

PS8349B_PC1 PS8349B_PC2 PS8349B_PEQ

U147

1

VDD33_1

10

VDD33_2

34

VDD33_3

7

IN_HPD

8

IN_CA_DET

11

IN_D0p

12

IN_D0n

14

IN_D1p

15

IN_D1n

16

IN_D2p

17

IN_D2n

19

IN_D3p

20

IN_D3n

64

IN_AUXp

63

IN_AUXn

66

IN_DDC_SCL

65

IN_DDC_SDA

6

I2C_CTL_EN

2

DP_CFG0/SDA_CTL

3

DP_CFG1/SCL_CTL

56

CEXT

9

REXT

13

PD

5

SW0

4

SW1

21

MODE

22

PC1

45

PC2

18

PEQ

67

EPAD

PS8349BQFN66GTR-A0 _QFN66_5X10

TMDS_CLKp TMDS_CLKn

TMDS_CH0p TMDS_CH0n TMDS_CH1p TMDS_CH1n TMDS_CH2p TMDS_CH2n

DP1_D0p DP1_D0n DP1_D1p DP1_D1n DP1_D2p DP1_D2n DP1_D3p DP1_D3n

DP2_D0p DP2_D0n DP2_D1p DP2_D1n DP2_D2p DP2_D2n DP2_D3p DP2_D3n

TMDS_SDA

TMDS_SCL

DP1_AUXn_SDA DP1_AUXp_SCL

DP2_AUXn_SDA DP2_AUXp_SCL

TMDS_HPD

DP1_HPD DP2_HPD

DP1_CA_DET DP2_CA_DET

TMDS_PRE

TMDS_DDCBUF

25 24

28 27 30 29 33 32

55 54 52 51 50 49 47 46

44 43 41 40 39 38 36 35

57 58

61 62

59 60

31 53 42

48 37

26

23

PS8349B_TMDS_PRE

PS8349B_TMDS_DDCBU F

TAB L E:

SW1 SW0

LHLL

B B

LH

HH

MODE =

H : Automatic Switching mode,HDMI ID Enabled

L : Automatic Switching mode,HDMI ID Disabled

A A

Port Priority Sequence

DP1 Port > DP2 Port > TMDS Port

DP1 Port > TMDS Port > DP2 Port

TMDS Port > DP2 Port > DP1 Port

TMDS Port > DP1 Port > DP2 Port

DEFAULT

VCC3B

1 2

R2531 4.7K_0402_5%

1 2

R2523 4.7K_0402_5%

1 2

R2525 4.7K_0402_5%

1 2

R2527 4.7K_0402_5%

1 2

R2529 4.7K_0402_5%

1 2

R146 4.7K_0402_5%

1 2

R2561 4.7K_0402_5%

1 2

R1875 4.7K_0402_5%

1 2

R1877 4.7K_0402_5%

@

PS8349B_DP_CFG0

PS8349B_DP_CFG1

PS8349B_SW1

PS8349B_MODE

PS8349B_PC1

PS8349B_PC2

PS8349B_PEQ

PS8349B_TMDS_PRE

PS8349B_TMDS_DDCBU F

@

1 2

R2524 4.7K_0402_5%

@

1 2

R2526 4.7K_0402_5%

@

1 2

R2528 4.7K_0402_5%

@

1 2

R2530 4.7K_0402_5%

@

1 2

R147 4.7K_0402_5%

@

1 2

R2562 4.7K_0402_5%

@

1 2

R1897 4.7K_0402_5%

@

1 2

R1899 4.7K_0402_5%

VCC3B

12

HDMI_CLKP HDMI_CLKN

HDMI_DATA0P HDMI_DATA0N HDMI_DATA1P HDMI_DATA1N HDMI_DATA2P HDMI_DATA2N

DOCK_DDIP2_0P DOCK_DDIP2_0N DOCK_DDIP2_1P DOCK_DDIP2_1N DOCK_DDIP2_2P DOCK_DDIP2_2N DOCK_DDIP2_3P DOCK_DDIP2_3N

WIGIG_DP0N WIGIG_DP1P WIGIG_DP1N WIGIG_DP2P WIGIG_DP2N WIGIG_DP3P WIGIG_DP3N

HDMI_DDC_DATA HDMI_DDC_CLK

DOCK_DDIP2_AUXN DOCK_DDIP2_AUXP

WIGIG_AUXN WIGIG_AUXP

HDMI_HPD_CONN DOCK_DDIP2_HPD WIGIG_HPD

R9129 1M_0201_5%

DDIP2_AUXN_C

R2516 1M_0201_5%

1 2

HDMI_CLKP 30 HDMI_CLKN 30

HDMI_DATA0P 30 HDMI_DATA0N 30 HDMI_DATA1P 30 HDMI_DATA1N 30 HDMI_DATA2P 30 HDMI_DATA2N 30

DOCK_DDIP2_0P 57 DOCK_DDIP2_0N 57 DOCK_DDIP2_1P 57 DOCK_DDIP2_1N 57 DOCK_DDIP2_2P 57 DOCK_DDIP2_2N 57 DOCK_DDIP2_3P 57 DOCK_DDIP2_3N 57

WIGIG_DP0P 46 WIGIG_DP0N 46 WIGIG_DP1P 46 WIGIG_DP1N 46 WIGIG_DP2P 46 WIGIG_DP2N 46 WIGIG_DP3P 46 WIGIG_DP3N 46

HDMI_DDC_DATA 30 HDMI_DDC_CLK 30

DOCK_DDIP2_AUXN 57 DOCK_DDIP2_AUXP 57

WIGIG_AUXN 46 WIGIG_AUXP 46

HDMI_HPD_CONN 30 DOCK_DDIP2_HPD 57 WIGIG_HPD 46

R2517 1M_0201_5%

1 2

DOCK_DDIP2_HPD

WIGIG_HPD

1

TP918 Test_P oint_40MIL

1

TP919 Test_P oint_40MIL

For PARADE Debug use.

HDMI_CLKN

HDMI_DATA0N

HDMI_DATA1N

HDMI_DATA2N

HDMI_HPD_CONN

R9121 180_0402_1%@

R9123 180_0402_1%@

R9125 180_0402_1%@

R9127 180_0402_1%@

1 2

R2512 27K_0201_5%

HDMI_CLKP

HDMI_DATA0P

HDMI_DATA1P

HDMI_DATA2P

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

DDI DEMUX/HDMI LEVEL SHIFTER

Size

Document Number Rev

Custom

Date: Sheet of

Thorpe-2 UMA

Wednesday, October 26, 2016

1

29 103

0.01

5

VCC3BVCC3B PS8407A_VDD VCC3B

11

37

R9314

D D

HDMI_DDC_CLK29

HDMI_DDC_DATA29

C C

B B

R9311

10K_0201_5%

1 2

@

R9315

R9312

10K_0201_5%

1 2

@

4.7K_0201_5%

1 2

HDMI_DATA1N_U

HDMI_DATA1P_U

HDMI_DATA0N_U

HDMI_DATA0P_U

HDMI_DATA2N_U

HDMI_DATA2P_U

HDMI_CLKN_U

HDMI_CLKP_U

HDMI_DATA0P29 HDMI_DATA0N29 HDMI_DATA1P29 HDMI_DATA1N29 HDMI_DATA2P29 HDMI_DATA2N29 HDMI_CLKP29 HDMI_CLKN29

EXC24CH900U_4P

4

112

FLJ8

EXC24CH900U_4P

4

112

FLJ9

EXC24CH900U_4P

4

112

FLJ10

EXC24CH900U_4P

4

112

FLJ11

EMC_NS@

334

2

334

2

334

2

334

2

I2C_CTL_EN

DCIN_EN DDCBUF

HDMI_ISET

I2C_ADDR1

HDMI_EQ HDMI_PRE

R9313

3.9K_0402_5%

1 2

HDMI_DATA1N_CONN

HDMI_DATA1P_CONN

HDMI_DATA0N_CONN

HDMI_DATA0P_CONN

HDMI_DATA2N_CONN

HDMI_DATA2P_CONN

HDMI_CLKN_CONN

HDMI_CLKP_CONN

U3001

6

IN_D0p

7

IN_D0n

4

IN_D1p

5

IN_D1n

1

IN_D2p

2

IN_D2n

9

IN_CKp

10

IN_CKn

36

PD#

8

I2C_CTL_EN

13

DCIN_EN/SCL_CTL

14

DDCBUF/SDA_CTL

34

ISET

38

SCL_SRC

39

SDA_SRC

23

CFG/I2C_ADDR1

17

EQ/I2C_ADDR0

16

PRE

3

HPD_SRC

18

REXT

VDD33_1

GND1

GND2

15

35

41

12

40

20

31

19

VDDTA

VDD33_2

VDDTX_1

VDDTX_2

VDDRX_1

VDDRX_2

OUT_D0p OUT_D0n OUT_D1p OUT_D1n OUT_D2p OUT_D2n OUT_CKp OUT_CKn

SCL_SNK SDA_SNK

HPD_SNK

GND_PAD

PS8407ATQFN40GTR2A1_TQFN40_5X5

4

HDMI_DATA0P_U

25

HDMI_DATA0N_U

24

HDMI_DATA1P_U

27

HDMI_DATA1N_U

26

HDMI_DATA2P_U

30

HDMI_DATA2N_U

29

HDMI_CLKP_U

22

HDMI_CLKN_U

21

HDMI_DDC_CLK_CONN

32

HDMI_DDC_DATA_CONN

33

HDMI_HPD_CONN

28

HDMI_HPD_CONN29

1 2

R10265 0_0402_5%EMC@

1 2

R10266 0_0402_5%EMC@

1 2

R10267 0_0402_5%EMC@

1 2

R10268 0_0402_5%EMC@

1 2

R10269 0_0402_5%EMC@

1 2

R10270 0_0402_5%EMC@

1 2

R10271 0_0402_5%EMC@

1 2

R10272 0_0402_5%EMC@

TP8

1

Test_Point_40MIL

Place bottom side

HDMI_DATA2P_CONN

HDMI_DATA2N_CONN

HDMI_DATA0P_CONN

HDMI_DATA0N_CONN

HDMI_DDC_CLK_CONN

HDMI_HPD_CONN

12

D232

EMC@

DF2S6.8UFS_1-1L1A2

HDMI_DATA0P_CONN HDMI_DATA0N_CONN HDMI_DATA1P_CONN HDMI_DATA1N_CONN HDMI_DATA2P_CONN HDMI_DATA2N_CONN HDMI_CLKP_CONN HDMI_CLKN_CONN

NEAR HDMI CONN

3

@

1 2

R446 4.7K_0201_5%

@

1 2

R9316 4.7K_0201_5%

@

1 2

R9318 4.7K_0201_5%

1 2

R9320 4.7K_0201_5%

1 2

R9322 4.7K_0201_5%

VCC5B_HDMI

R1030

2.2K_0201_5%

1 2

12

2

D227

C2663

1

@

DF2S6.8UFS_1-1L1A2

EMC@

47P_0201_25V8-G

HDMI CONN

J42

TMDS_Data2+1TMDS_Data2_Shield TMDS_Data2-3TMDS_Data1+ TMDS_Data1_Shield5TMDS_Data1TMDS_Data0+7TMDS_Data0_Shield TMDS_Data0-9TMDS_Clock+ TMDS_Clock_Shield11TMDS_Clock-

13

CEC

15

SCL DDC/CEC_Ground17+5V_Power

19

Hot_Plug_Detect

20

GND1

21

GND2

22

GND3

23

GND4

ALLTO_C128V6-K1935-L

CONN@

I2C_CTL_EN

HDMI_EQ

HDMI_ISET

HDMI_PRE

DDCBUF

No need diode here because TPS2553 has reverse voltage protection function.

R1029

2.2K_0201_5%

1 2

2 4 6 8 10 12 14

Utility

16

SDA

18

2

C2661

EMC@

12

C2662

D228

1

@

47P_0201_25V8-G

0.1U_0201_6.3V6-K

EMC@

2

@

1 2

R457 4.7K_0201_5%

@

1 2

R9317 4.7K_0201_5%

@

1 2

R9319 4.7K_0201_5%

1 2

R9321 4.7K_0201_5%

@

1 2

R9323 4.7K_0201_5%

HDMI_DATA1P_CONN

HDMI_DATA1N_CONN

HDMI_CLKP_CONN

HDMI_CLKN_CONN

DF2S6.8UFS_1-1L1A2

HDMI_DDC_DATA_CONN

C9500

1

2

VCC5B

4.7U_0402_6.3V6-M

HDMI_DATA1N_CONN

HDMI_DATA1P_CONN

HDMI_DATA2N_CONN

HDMI_DATA2P_CONN

HDMI_CLKN_CONN

HDMI_CLKP_CONN

HDMI_DATA0N_CONN

HDMI_DATA0P_CONN

U110

6

OUT

IN

ILIM

3

FAULT

4

GND

EN

GND_PAD

TPS2553DRVR_SON6_2X2

1

2

4

5

3

AZ1045-04F_DFN2510P10E-10-9

1

2

4

5

3

AZ1045-04F_DFN2510P10E-10-9

1

VCC5B_HDMI

12

R10236

0.01_1206_1%

1

2

5

7

D283

9

10

1

8

9

2

7

4

6

5

3

8

EMC@

D284

9

10

1

8

9

2

7

4

6

5

3

8

EMC@

12

R10237

61.9K_0201_1%

HDMI_DATA1N_CONN

HDMI_DATA1P_CONN

HDMI_DATA2N_CONN

HDMI_DATA2P_CONN

HDMI_CLKN_CONN

HDMI_CLKP_CONN

HDMI_DATA0N_CONN

HDMI_DATA0P_CONN

1

2

C9499

4.7U_0402_6.3V6-M

NEAR HDMI CONN

PS8407A_VDD VCC3B

VCC1R2B_HDMIVCC1R2A

VCC1R2B_HDMI

VCC1R5B_HDMI

@

Q9403 RW1E014SNT2R_WEMT6

6

S

D

4

5 2 1

G

3

12

R9325 100_0201_5%@

A A

VCC5B_DRV68,96

2

@

C9359

0.1U_0201_25V6-K

1

5

12

R9324 33_0201_5%@

@

D368 RB521CS-30GT2RA_VMN2-2

1 2

VCC3B

1

2

4

BD15IC0WHFV-GTR_HVSOF6

6

5

4

C9543 1U_0402_6.3V6-K

U195

1

Vo

VCC

2

Vo_s

N.C

GND3EN

FIN

7

1 2

R10345 0_0603_5%@

1 2

R10346 0_0603_5%

VCC1R5B_HDMI

12

R10344 0_0402_5%

12

@

R10343

6.19K_0402_1%

PS8407A_VDD

BD15IC0WHFV-GTR

R10344

R10343 No ASM 6.1 9K (V o= 1. 4V )

3

BD00IC0WHFV-GTR

04. 7K (V o= 1 .4 V)



Vo=0.8x(R103 44+R10343)/R103 43

2

1

C9355 0.1U_0201_6.3V6-K

C9354 0.1U_0201_6.3V6-K

C9353 0.1U_0201_6.3V6-K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2012/07/01

2

1

C9356 0.1U_0201_6.3V6-K

C9358 0.01U_0201_6.3V7-K

C9357 0.01U_0201_6.3V7-K

LC Future Center Secret Data

Deciphered Date

2

1

C9378 0.1U_0201_6.3V6-K

2014/07/01

2

1

C9379 0.01U_0201_6.3V7-K

Title

Size

Custom

Date: Sheet

HDMI CONNECTOR

Document Number Rev

Thorpe-2 UMA

Wednesday, October 26, 2016

1

of

30 103

of

30 103

of

30 103

C

0.01

Lenovo THINKPAD T470S Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual