Lenovo ThinkPad T440P Schematic

5

O

asis-1 SHB SOVP LOGIC SCHEMATICS

4

3

AS1H-0

O

2

1

.TITLE PAGE

2.EC HISTORY

D D

3.CPU(1/8) : DMI/FDI/PEG

4.CPU(2/8) : MISC/JTAG/CLK

5.CPU(3/8) : DDR3L CHANNEL- A

6.CPU(4/8) : DDR3L CHANNEL- B

7.CPU(5/8) : POWER

8.CPU(6/8) : GND

9.CPU(7/8) : EDP/DDI

10.CPU(8/8) : CFG/RESERVED

11.PCH(1/10) : RTC/HDA/SATA/JTAG

12.PCH(2/10) : LPC/SPI/SMBUS/C-LINK/THERMAL

C C

13.PCH(3/10) : DMI/FDI/PM

14.PCH(4/10) : LCD/CRT/PCI/DDI CONTROL

15.PCH(5/10) : GPIO/CPU/MISC/NCTF/RSVD

16.PCH(6/10) : PCIE/USB

17.PCH(7/10) : CLOCKS

18.PCH(8/10) : POWER

19.PCH(9/10) : POWER

20.PCH(10/10):GND

21.XDP CONNECTOR

B B

22.RTC BATTERY

23.SPI FLASH

24.DDR3L SO DIMM CHANNEL-A

25.BLANK

26.DDR3L SO DIMM CHANNEL-B

27.DDR3L DECOUPLING

28.N14M-GS(1/6) : PEG I/F

29.N14M-GS(2/6) : DIGITAL OUT I/F

30.N14M-GS(3/6) : VRAM I/F

31.N14M-GS(4/6) : GPIO

A A

32.N14M-GS(5/6) : POWER

33.N14M-GS(6/6) : GND

34.VRAM CHANNEL-A

35.BLANK

5

4

36.MEMORY TERMINATION

37.BLANK

38.LCD CONNECTOR

39.BLANK

40.EXT CRT INTERFACE

41.DISPLAY PORT CONNECTOR

42.BLANK

43.SATA HDD CONN

44.SATA BAY I/F CONN

45.USB CONNECTOR

46.AOU/USB POWER SWITCH

47.GBE LAN CLARKVILLE

48.GBE LAN SWITCH

49.RJ45 SUB CARD I/F

50.PCIE NGFF CARD SLOT

51.MEDIA CARD CONTROLLER

52.MEDIA CARD INTERFACE

53.SMART CARD/3rd NGFF I/F

54.AUDIO ALC3232

55.AUDIO CONNECTOR

56.AUDIO JACK SENSE

57.AUDIO EXT MIC I/F

58.AUDIO SPEAKER

59.AUDIO BEEP

60.DOCKING CONNECTOR

61.MEC1633L(1/3)

62.MEC1633L(2/3)

63.MEC1633L(3/3)

64.KEYBOARD CONNECTOR

65.CLICK PAD/NFC/FPR CONNECTOR

66.BLANK

67.FAN CONNECTOR

68.G-SENSOR

69.TPM

70.EEPROM/SMBUS SW

3

VER 1.01 Aug/08/2013

71.THINK ENGINE(1/2)

72.THINK ENGINE(2/2)

73.DC-IN

74.BATTERY INPUT

75.BATTERY CHARGER(BQ24760)

76.CHARGER SELECTOR

77.BATTERY MONITOR

78.DC/DC VCC5M/VCC3M (TPS51220A)

79.DC/DC VCCCPUCORE(TPS51631) 8

0.DC/DC VCCCPUCORE(CSD97374)

81.BLANK

82.VCCCPUCORE DECOUPLING

83.DC/DC VCCGFXCORE_D (TPS51219)

84.BLANK

85.DC/DC VCC1R05AMT(VT384B)

86.DC/DC VCC1R35A(VT387B)

87.DC/DC VCC0R675B(TPS51200)

88.DC/DC VCC1R5VIDEO(VT382B)

89.DC/DC VCC1R05VIDEO_PLL(TPS74801)

90.BLANK

91.BLANK

92.DC/DC VCC1R5B(BD3551)

93.LOAD SW PCH SUS

94.LOAD SW LAN

95.LOAD SW VIDEO

96.LOAD SW B

97.LOAD SW VCC5MUBAY

98.LOAD SW WWAN & WLAN

99.PTH FOR SCREW HOLES

2

Project Name :

Size :

C

Date: Sheet :of

Document Number :

T

itle :

Title :

T

ITLE PAGEOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

99Monday, August 12, 2013

5

E

HISTORY

C

Oasis-1 SP ASSESS (BASE LOGIC :NZM5H-0 VER 0.44 May/18/2012) SDV stage

VER.0.01 05/29/2012 APPLIED OAS1_SP_EC001 VER.0.02 05/31/2012 APPLIED OAS1_SP_EC002 VER.0.03 06/05/2012 APPLIED OAS1_SP_EC003,004 VER.0.04 06/06/2012 APPLIED OAS1_SP_EC005

D D

VER.0.05 06/07/2012 APPLIED OAS1_SP_EC006-010 VER.0.06 06/08/2012 APPLIED OAS1_SP_EC011,012,014-016 VER.0.07 06/13/2012 APPLIED OAS1_SP_EC017-019 VER.0.08 06/14/2012 APPLIED OAS1_SP_EC020 VER.0.09 06/18/2012 APPLIED OAS1_SP_EC021-024 VER.0.10 06/20/2012 APPLIED OAS1_SP_EC025-027 VER.0.11 06/27/2012 APPLIED OAS1_SP_EC028-040,042 VER.0.12 06/28/2012 APPLIED OAS1_SP_EC043-055 VER.0.13 06/29/2012 APPLIED OAS1_SP_EC056,057 VER.0.14 07/02/2012 APPLIED OAS1_SP_EC058-062 VER.0.15 07/03/2012 APPLIED OAS1_SP_EC063,064 VER.0.16 07/04/2012 APPLIED OAS1_SP_EC065,066 VER.0.17 07/05/2012 APPLIED OAS1_SP_EC069-073,075,078,079 VER.0.18 07/06/2012 APPLIED OAS1_SP_EC067,068,074,076,077 VER.0.19 07/10/2012 APPLIED OAS1_SP_EC080,081 VER.0.20 07/12/2012 APPLIED OAS1_SP_EC082-087 VER.0.21 07/31/2012 APPLIED OA1_MB_SDV_EC001_0727 VER.0.22 08/03/2012 APPLIED OA1_MB_SDV_EC002_0803 VER.0.23 08/07/2012 APPLIED OA1_MB_SDV_EC003_0807 VER.0.24 08/10/2012 APPLIED OA1_MB_SDV_EC004_0810

C C

08/14/2012 APPLIED OA1_MB_SDV_EC005_0814 VE

R.0.25 08/15/2012 APPLIED OA1_MB_SDV_EC006_0815 VER.0.26 08/17/2012 APPLIED OA1_MB_SDV_EC007_0817 VER.0.27 08/23/2012 APPLIED OA1_MB_SDV_EC008_0823 VER.0.28 08/28/2012 APPLIED OA1_MB_SDV_EC009_0828 VER.0.29 08/29/2012 APPLIED OA1_MB_SDV_EC010_0829 VER.0.30 08/31/2012 APPLIED OA1_MB_SDV_EC011_0831 VER.0.31 09/04/2012 APPLIED OA1_MB_SDV_EC012_0904 VER.0.32 09/06/2012 APPLIED OA1_MB_SDV_EC013_0906 VER.0.33 09/10/2012 APPLIED OA1_MB_SDV_EC014_0910 09/11/2012 APPLIED OA1_MB_SDV_EC015_0911 VER.0.34 09/12/2012 APPLIED OA1_MB_SDV_EC016_0912 VER.0.35 09/14/2012 APPLIED OA1_MB_SDV_EC017_0914 VE

R.0.36 09/20/2012 APPLIED OA1_MB_SDV_EC018_0920 09/21/2012 APPLIED OA1_MB_SDV_EC019_0921 VER.0.37 09/24/2012 APPLIED OA1_MB_SDV_EC020_0924 VER.0.38 09/26/2012 APPLIED OA1_MB_SDV_EC021_0926 VER.0.39 09/28/2012 APPLIED OA1_MB_SDV_EC022_0928 VER.0.40 10/02/2012 APPLIED OA1_MB_SDV_EC023_1002

B B

VER.0.41 10/04/2012 APPLIED OA1_MB_SDV_EC024_1004 10/04/2012 APPLIED OA1_MB_SDV_EC025_1004a 10/05/2012 APPLIED OA1_MB_SDV_EC026_1005 VER.0.42 10/08/2012 APPLIED OA1_MB_SDV_EC027_1008 10/11/2012 APPLIED OA1_MB_SDV_EC028_1011 VER.0.43 10/16/2012 APPLIED OA1_MB_SDV_EC029_1015 VER.0.44 10/16/2012 APPLIED OA1_MB_SDV_EC030_1016 10/17/2012 APPLIED OA1_MB_SDV_EC031_1017 VER.0.45 10/18/2012 APPLIED OA1_MB_SDV_EC032_1018 VER.0.46 10/29/2012 APPLIED OA1_MB_SDV_EC033_1029 VER.0.47 11/02/2012 APPLIED OA1_MB_SDV_EC034_1102

MFVT stage

VER.1.01 11/22/2012 APPLIED OA1_MB_MFVT_EC001_1120 VER.1.02 12/03/2012 APPLIED OA1_MB_MFVT_EC002_1203 12/05/2012 APPLIED OA1_MB_MFVT_EC003_1205 VER.1.03 12/10/2012 APPLIED OA1_MB_MFVT_EC004_1210

FVT stage

SIT stage

SIT-v stage

SVT stage

SOVP stage

4

VER.0.01 12/19/2012 APPLIED OA1_MB_FVT_EC001_1219 12/21/2012 APPLIED OA1_MB_FVT_EC002_1221 VER.0.02 12/21/2012 APPLIED OA1_MB_FVT_EC003_1221_R1 12/25/2012 APPLIED OA1_MB_FVT_EC004_1225 VER.0.03 12/26/2012 APPLIED OA1_MB_FVT_EC005_1226 VER.0.04 12/27/2012 APPLIED OA1_MB_FVT_EC006_1227 VER.0.05 12/28/2012 APPLIED OA1_MB_FVT_EC007_1228 VER.0.06 01/03/2012 APPLIED ECR_1R05VIDEO_PLL discharge.ppt RF_EC_FVT_0103-oscar.ppt VER.1.00 01/04/2012 APPLIED FVT gerber out VER.1.01 01/08/2013 APPLIED OA1_MB_FVT_EC008_0108 OA1_MB_FVT_EC008_0108_R1 VER.1.02 01/17/2013 APPLIED OA1_MB_FVT_EC009_0117

VER.0.01 02/06/2013 APPLIED OA1_MB_SIT_EC001_0206 VER.0.02 02/18/2013 APPLIED OA1_MB_SIT_EC002_0218 VER.0.03 02/25/2013 APPLIED OA1_MB_SIT_EC003_0225 VER.0.04 03/07/2013 APPLIED OA1_MB_SIT_EC004_0307 VER.0.05 03/08/2013 APPLIED OA1_MB_SIT_EC005_0308 VER.0.06 03/11/2013 APPLIED OA1_MB_SIT_EC006_0311

03/12/2013 APPLIED OA1_MB_SIT_EC007_0312 VER.0.07 03/13/2013 APPLIED OA1_MB_SIT_EC008_0313 03/14/2013 APPLIED RF_EC_SIT_0305-Tony.pptx Oasis EMC solution list on FVT stage 20130204 VER.0.08 03/14/2013 APPLIED OA1_MB_SIT_EC009_0314

VER.1.00 03/19/2013 APPLIED SIT gerber out VER.1.01 03/25/2013 APPLIED OA1_MB_SIT_EC010_0325 VER.1.02 04/02/2013 Applied ECR_20130416

VER.0.01 04/19/2013 APPLIED OA1_MB_SITV_EC001_0419 VER.0.02 04/25/2013 APPLIED OA1_MB_SITV_EC002_0425 VER.1.00 05/02/2013 Applied ECR_20130502 VER.1.01 05/09/2013 APPLIED OA1_MB_SITV_EC003_05/09 05/10/2013 APPLIED OA1_MB_SITV_EC004_05/10 VER.1.02 05/20/2013 APPLIED ECR_20130520

06/14/2013 APPLIED ECR_20130614

VER.0.01 06/12/2013 APPLIED OA1_MB_SVT_EC001_0612 VER.0.02 06/18/2013 APPLIED OA1_MB_SVT_EC002_0618

06/18/2013 APPLIED OA1_MB_SVT_EC003_0618

VER.0.03 06/24/2013 APPLIED OA1_MB_SVT_EC004_0624

06/25/2013 APPLIED OA1_MB_SVT_EC005_0625 VER.1.00 06/26/2013 APPLIED OA1_MB_SVT_EC006_0626 06/26/2013 APPLIED OA1_MB_SVT_EC007_0626 VER.1.01 06/28/2013 APPLIED OA1_MB_SVT_EC008_0628 VER.1.02 07/11/2013 APPLIED OA1_MB_SVT_EC009_0711

V

R.1.00 08/06/2013 APPLIED ECR_20130806

E

VER.1.01 08/08/2013 APPLIED ECR_20130808

3

General BOM Structure

@ : No ASM for all model UMA@ : ASM for UMA model, No ASM for SWG model SWG@ : No ASM for UMA model, ASM for SWG model CONN_ASM@ : ASM connector CONN_NOASM@ : NO ASM connector PLM@ : For PCB material

VRAM BOM Structure

M1G@ : ASM for SWG model with Micron 1G VRAM. S1G@ : ASM for SWG model with Samsung 1G VRAM.

SPI ROM BOM Structure

SPI_1ST@ : ASM for Winbond SPI ROM. SPI_2ND@ : ASM for Macronix SPI ROM.

2

1

BOM option

UMA : PLM@ / UMA@ / CONN_ASM@

SWG + Samsung 1G VRAM : PLM@ / SWG@ / CONN_ASM@ / X76_S1G@

SWG + Micron 1G VRAM : PLM@ / SWG@ / CONN_ASM@ / X76_M1G@

Z

Z1

Z

N

-A131_PCB

M

D

Z0SQ00100

A

PLM@

A A

roject Name :

P

Size :

C

Date: Sheet :

5

4

3

2

Date: Sheet :

Document Number :

T

tle :

Title :

i

E

HISTORYOAS-1 SP ASSESS

C

1

Rev :

Rev : 1

1

01

.

2

9

o

f

9Monday, August 12, 2013

5

D D

C C

B B

4

J

CPU1A

D

MI_TXN[3:0]13

D

MI_TXP[3:0]13

D

MI_RXN[3:0]13

D

MI_RXP[3:0]13

F

DI_CSYNC13

F

DI_INT13

DI_CSYNC

F

DI_INT

D

MI_TXN0

D

MI_TXN1

D

MI_TXN2

D

MI_TXN3

D

MI_TXP0

D

MI_TXP1

D

MI_TXP2

D

MI_TXP3

D

MI_RXN0

D

MI_RXN1

D

MI_RXN2

D

MI_RXN3

D

MI_RXP0

D

MI_RXP1

D

MI_RXP2

D

MI_RXP3

CPU1A

D21

D

MI_RXN_0

C21

D

MI_RXN_1

B21

D

MI_RXN_2

A21

D

MI_RXN_3

D20

D

MI_RXP_0

C20

D

MI_RXP_1

B20

D

MI_RXP_2

A20

D

MI_RXP_3

D18

D

MI_TXN_0

C17

D

MI_TXN_1

B17

D

MI_TXN_2

A17

D

MI_TXN_3

D17

D

MI_TXP_0

C18

D

MI_TXP_1

B18

D

MI_TXP_2

A18

D

MI_TXP_3

H29

F

DI_CSYNC

J29

D

ISP_INT

LOTES_AZIF0012 P002B_INTELHASWEL

C

ONN_ASM@

H

aswell rPGA EDS

D

D MI FDI

MI FDI

3

E23

P

EG_RCOMP

M29

P

EG_RXN_0

K28

P

EG_RXN_1

M31

P

EG_RXN_2

L30

P

EG_RXN_3

M33

P

EG_RXN_4

L32

P

EG_RXN_5

M35

P

EG_RXN_6

EG

EG P

P

1

OF 9

P

EG_RXN_7

P

EG_RXN_8

P

EG_RXN_9

P

EG_RXN_1 0

P

EG_RXN_1 1

P

EG_RXN_1 2

P

EG_RXN_1 3

P

EG_RXN_1 4

P

EG_RXN_1 5 P

EG_RXP_ 0

P

EG_RXP_ 1

P

EG_RXP_ 2

P

EG_RXP_ 3

P

EG_RXP_ 4

P

EG_RXP_ 5

P

EG_RXP_ 6

P

EG_RXP_ 7

P

EG_RXP_ 8

P

EG_RXP_ 9

P

EG_RXP_ 10

P

EG_RXP_ 11

P

EG_RXP_ 12

P

EG_RXP_ 13

P

EG_RXP_ 14

P

EG_RXP_ 15 P

EG_TXN_0

P

EG_TXN_1

P

EG_TXN_2

P

EG_TXN_3

P

EG_TXN_4

P

EG_TXN_5

P

EG_TXN_6

P

EG_TXN_7

P

EG_TXN_8

P

EG_TXN_9

P

EG_TXN_10

P

EG_TXN_11

P

EG_TXN_12

P

EG_TXN_13

P

EG_TXN_14

P

EG_TXN_15 P

EG_TXP_0

P

EG_TXP_1

P

EG_TXP_2

P

EG_TXP_3

P

EG_TXP_4

P

EG_TXP_5

P

EG_TXP_6

P

EG_TXP_7

P

EG_TXP_8

P

EG_TXP_9

P

EG_TXP_1 0

P

EG_TXP_1 1

P

EG_TXP_1 2

P

EG_TXP_1 3

P

EG_TXP_1 4

P

EG_TXP_1 5

L34 E29 D28 E31 D30 E35 D34 E33 E32 L29 L28 L31 K30 L33 K32 L35 K34 F29 E28 F31 E30 F35 E34 F33 D32 H35 H34 J33 H32 J31 G30 C33 B32 B31 A30 B29 A28 B27 A26 B25 A24 J35 G34 H33 G32 H31 H30 B33 A32 C31 B30 C29 B28 C27 B26 C25 B24

P

EG_TXN7_C

P

EG_TXN6_C

P

EG_TXN5_C

P

EG_TXN4_C

P

EG_TXN3_C

P

EG_TXN2_C

P

EG_TXN1_C

P

EG_TXN0_C

P

EG_TXP7_C

P

EG_TXP6_C

P

EG_TXP5_C

P

EG_TXP4_C

P

EG_TXP3_C

P

EG_TXP2_C

P

EG_TXP1_C

P

EG_TXP0_C

P

EG_COMP

P

EG_RXN7

P

EG_RXN6

P

EG_RXN5

P

EG_RXN4

P

EG_RXN3

P

EG_RXN2

P

EG_RXN1

P

EG_RXN0

P

EG_RXP7

P

EG_RXP6

P

EG_RXP5

P

EG_RXP4

P

EG_RXP3

P

EG_RXP2

P

EG_RXP1

P

EG_RXP0

1 2

R

57 24.9_0201_1%

1 2

C

649 0.22U_0201_6.3V6K

SWG@

1 2

C

689 0.22U_0201_6.3V6K

SWG@

1 2

C

789 0.22U_0201_6.3V6K

SWG@

1 2

C

581 0.22U_0201_6.3V6K

SWG@

1 2

C

684 0.22U_0201_6.3V6K

SWG@

1 2

C

779 0.22U_0201_6.3V6K

SWG@

1 2

C

330 0.22U_0201_6.3V6K

SWG@

1 2

C

665 0.22U_0201_6.3V6K

SWG@

2

V

CCCPUIO_A

1 2

C

790 0.22U_0201_6.3V6K

SWG@

1 2

C

635 0.22U_0201_6.3V6K

SWG@

1 2

C

688 0.22U_0201_6.3V6K

SWG@

1 2

C

783 0.22U_0201_6.3V6K

SWG@

1 2

C

504 0.22U_0201_6.3V6K

SWG@

1 2

C

668 0.22U_0201_6.3V6K

SWG@

1 2

C

740 0.22U_0201_6.3V6K

SWG@

1 2

C

328 0.22U_0201_6.3V6K

SWG@

P

EG_TXN7

P

EG_TXN6

P

EG_TXN5

P

EG_TXN4

P

EG_TXN3

P

EG_TXN2

P

EG_TXN1

P

EG_TXN0

P

EG_TXP7

P

EG_TXP6

P

EG_TXP5

P

EG_TXP4

P

EG_TXP3

P

EG_TXP2

P

EG_TXP1

P

EG_TXP0

1

P

EG_RXN[7:0] 28

P

EG_RXP[7:0] 28

P

EG_TXN[7:0] 28

P

EG_TXP[7:0] 28

A A

Project Name :

Size :

C

Date: Sheet :of

5

4

3

2

Date: Sheet :of

Document Number :

T

itle :

Title :

C

PU(1/8) : DMI/FDI/PEGOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

3

99Monday, August 12, 2013

5

D D

4

3

2

1

VC

CCPUIO

R6

4

62_0201_5%

1 2

PE

1 2

CI

-P

ROCHOT

-T

HERMTRIP

PM

_SYNC

CP

UPWRGD

DR

AMPWRG

-P

LTRST_PROC

-E

DP_NS_CLK_135M

ED

P_NS_CLK_135M

-E

DP_SS_CLK_135M

ED

P_SS_CLK_135M

-C

PU_CLK_100M

CP

U_CLK_100M

R9

243 0_0201_5%@R9243 0_0201_5%@

R8

969 0_0201_5%

VC

C3M

R9

280

0_0402_5%

1 2

5

1

P

B

Y

2

A

G

U1

12

3

MC74VHC1G09DFT2G_SC70-5

R

249 0_0201_5%

9

1 2

R8

5 56_0201_5%

1 2 1 2

C1

901

2

0.1U_0201_6.3V6K

1

R9

244

1 2

4

0_0201_5%

@

1 2

PE

CI62

-P

ROCHOT62,75,79

-T

-E

DP_NS_CLK_135M17

ED

P_NS_CLK_135M17

-E

DP_SS_CLK_135M17

ED

P_SS_CLK_135M17

-C

PU_CLK_100M17

CP

U_CLK_100M17

VC

240

2

C8

484

@

0.01U_0201_6.3V7K

1

HERMTRIP15

PM

_SYNC13

CP

UPWRGD15,21

DR

AMPWRG13

-P

LTRST_PROC15

C3M

R9

100K_0201_5%

1 2

241

R9

286 0_0201_5%

C C

VC

C3M

R9

100K_0201_5%

1 2

DD

R_VR_PWRGD86

B B

VC

C1R35A

R1

2

1K_0201_5%

1 2

-C

PURST

R9

239

2K_0201_5%

1 2

VC

CCPUIO_PCH

Ha

swell rPGA EDS

MI

TOCC

TERR CI _AK31 OCHOT ERMTRIP

_SYNC

RGOOD _DRAMPW ROK TRSTIN

LL_REF_C LKN LL_REF_C LKP C_DPLL_R EF_CLKN C_DPLL_R EF_CLKP LKN LKP

swell rPGA EDS

SC

P

P W

W R

R

AP3

SM

_RCOMP_0 SM SM SM

AG

AG T

T J

J

_RCOMP_1

_RCOMP_2

_DRAMRST

PR PR

TR

BP

M_N_0

BP

M_N_1

BP

M_N_2

BP

M_N_3

BP

M_N_4

BP

M_N_5

BP

M_N_6

BP

M_N_7

AR3 AP2 AN

3

AR

29

DY

AT

29

EQ

AM34

TC

K

AN33

TM

S

AM

33

ST

AM31

TD

I

AL33

TD

O

AP

33

DB

R

AR30 AN31 AN29 AP31 AP30 AN28 AP29 AP28

T

T H

H

R3

R3 ERMAL

ERMAL

D

CLOCK

2

OF 9

1 2

R7 1

R7 1 R8

R8

4 75_0201_1%

R5

76 100_0201_1%

1 2 1 2

00_0201_1%

1 2

R2

5

1_0201_5%

-X

DP_PRDY

-X

DP_PREQ XD XD

-X

DP_TRST XD XD

-X

DP_DBR

P_TCK P_TMS

P_TDI P_TDO

-D

RAMRST 24,26

-X

DP_PRDY 21

-X

DP_PREQ 21

XD

P_TCK 21

XD

P_TMS 21

-X

DP_TRST 21

XD

P_TDI 21

XD

P_TDO 21

-X

DP_DBR 13,20,21

JCPU1B

AP

32

SK

AN

TP

936TP936

@

7

7 R1

R1

900

900 1

1 C

C

1 2

10K_0201_5%

32

CA

AR27

PE

AK31

FC

AM

30

PR

AM

35

TH

AT28

PM

AL34

PW

AC10

SM

AT

26

PL

G28

DP

H28

DP

F27

SS

E27

SS

D26

BC

E26

BC

LOTES_AZIF0012P002B_INTELHASWEL

2

LOTES_AZIF0012P002B_INTELHASWEL

CONN_ASM@

1

0.1U_0201_6.3V6K

A A

roject Name :

P

Size :

C

Date: Sheet :

5

4

3

2

Date: Sheet :

Document Number :

Title :

C

U(2/8) : MISC/JTAG/CLKOAS-1 SP ASSESS

P

1

Rev :

Rev : 1

1

01

.

4

9

o

f

9Monday, August 12, 2013

5

D D

M

_A_DQ[63:0]24

C C

B B

D

DR3_VREF_CA_M326

D

DR3_VREF_DQ_SA_M324

D

DR3_VREF_DQ_SB_M324

4

H

aswell rPGA EDS

3

OF 9

M

_A_DQ0

M

_A_DQ1

M

_A_DQ2

M

_A_DQ3

M

_A_DQ4

M

_A_DQ5

M

_A_DQ6

M

_A_DQ7

M

_A_DQ8

M

_A_DQ9

M

_A_DQ10

M

_A_DQ11

M

_A_DQ12

M

_A_DQ13

M

_A_DQ14

M

_A_DQ15

M

_A_DQ16

M

_A_DQ17

M

_A_DQ18

M

_A_DQ19

M

_A_DQ20

M

_A_DQ21

M

_A_DQ22

M

_A_DQ23

M

_A_DQ24

M

_A_DQ25

M

_A_DQ26

M

_A_DQ27

M

_A_DQ28

M

_A_DQ29

M

_A_DQ30

M

_A_DQ31

M

_A_DQ32

M

_A_DQ33

M

_A_DQ34

M

_A_DQ35

M

_A_DQ36

M

_A_DQ37

M

_A_DQ38

M

_A_DQ39

M

_A_DQ40

M

_A_DQ41

M

_A_DQ42

M

_A_DQ43

M

_A_DQ44

M

_A_DQ45

M

_A_DQ46

M

_A_DQ47

M

_A_DQ48

M

_A_DQ49

M

_A_DQ50

M

_A_DQ51

M

_A_DQ52

M

_A_DQ53

M

_A_DQ54

M

_A_DQ55

M

_A_DQ56

M

_A_DQ57

M

_A_DQ58

M

_A_DQ59

M

_A_DQ60

M

_A_DQ61

M

_A_DQ62

M

_A_DQ63

JCPU1C

AR15

S

A_DQ_0

AT14

S

A_DQ_1

AM14

S

A_DQ_2

AN14

S

A_DQ_3

AT15

S

A_DQ_4

AR14

S

A_DQ_5

AN15

S

A_DQ_6

AM15

S

A_DQ_7

AM9

S

A_DQ_8

AN9

S

A_DQ_9

AM8

S

A_DQ_10

AN8

S

A_DQ_11

AR9

S

A_DQ_12

AT9

S

A_DQ_13

AR8

S

A_DQ_14

AT8

S

A_DQ_15

AJ9

S

A_DQ_16

AK9

S

A_DQ_17

AJ6

S

A_DQ_18

AK6

S

A_DQ_19

AJ10

S

A_DQ_20

AK10

S

A_DQ_21

AJ7

S

A_DQ_22

AK7

S

A_DQ_23

AF4

S

A_DQ_24

AF5

S

A_DQ_25

AF1

S

A_DQ_26

AF2

S

A_DQ_27

AG4

S

A_DQ_28

AG5

S

A_DQ_29

AG1

S

A_DQ_30

AG2

S

A_DQ_31

J1

S

A_DQ_32

J2

S

A_DQ_33

J5

S

A_DQ_34

H5

S

A_DQ_35

H2

S

A_DQ_36

H1

S

A_DQ_37

J4

S

A_DQ_38

H4

S

A_DQ_39

F2

S

A_DQ_40

F1

S

A_DQ_41

D2

S

A_DQ_42

D3

S

A_DQ_43

D1

S

A_DQ_44

F3

S

A_DQ_45

C3

S

A_DQ_46

B3

S

A_DQ_47

B5

S

A_DQ_48

E6

S

A_DQ_49

A5

S

A_DQ_50

D6

S

A_DQ_51

D5

S

A_DQ_52

E5

S

A_DQ_53

B6

S

A_DQ_54

A6

S

A_DQ_55

E12

S

A_DQ_56

D12

S

A_DQ_57

B11

S

A_DQ_58

A11

S

A_DQ_59

E11

S

A_DQ_60

D11

S

A_DQ_61

B12

S

A_DQ_62

A12

S

A_DQ_63

AM3

S

M_VREF

F16

S

A_DIMM_VR EFDQ

F13

S

B_DIMM_VR EFDQ

LOTES_AZIF0012P002B_INTELHASWEL

CONN_ASM@

R

S

A_CK_N_0

S

A_CK_P_ 0

S

A_CKE_0

S

A_CK_N_1

S

A_CK_P_ 1 S

A_CKE_1

S

A_CK_N_2

S

A_CK_P_ 2 S

A_CKE_2

S

A_CK_N_3

S

A_CK_P_ 3 S

A_CKE_3

S

A_CS_N_0

S

A_CS_N_1

S

A_CS_N_2

S

A_CS_N_3 S

A_ODT_0

S

A_ODT_1

S

A_ODT_2

S

A_ODT_3 S S S

S

A_MA_0

S

A_MA_1

S

A_MA_2

S

A_MA_3

S

A_MA_4

S

A_MA_5

S

A_MA_6

S

A_MA_7

S

A_MA_8

S

A_MA_9

S

A_MA_10

S

A_MA_11

S

A_MA_12

S

A_MA_13

S

A_MA_14

S

A_MA_15

S

A_DQS_N_ 0

S

A_DQS_N_ 1

S

A_DQS_N_ 2

S

A_DQS_N_ 3

S

A_DQS_N_ 4

S

A_DQS_N_ 5

S

A_DQS_N_ 6

S

A_DQS_N_ 7

S

A_DQS_P _0

S

A_DQS_P _1

S

A_DQS_P _2

S

A_DQS_P _3

S

A_DQS_P _4

S

A_DQS_P _5

S

A_DQS_P _6

S

A_DQS_P _7

SVD_0

A_BS_0 A_BS_1 A_BS_2

V

SS_0

A_RAS

S

A_WE

A_CAS

3

AC7 U4 V4 AD9 U3 V3 AC9 U2 V2 AD8 U1 V1 AC8

M7 L9 M9 M10 M8 L7 L8 L10 V5 U5 AD1

V10 U U U

V8 AC6 V9 U9 AC5 AC4 AD6 AC3 AD5 AC2 V6 AC1 AD4 V7 AD3 AD2

AP15 AP8 AJ8 AF3 J3 E2 C5 C11 AP14 AP9 AK8 AG3 H3 E3 C6 C12

-

M_A_DDRCLK0_800M

M

_A_DDRCLK0_800M

M

_A_CKE0

-

M_A_DDRCLK1_800M

M

_A_DDRCLK1_800M

M

_A_CKE1

-

M_A_CS0

-

M_A_CS1

M

_A_ODT0

M

_A_ODT1

M

_A_BS0

M

_A_BS1

M

_A_BS2

6

-

7 8

M_A_RAS

-

M_A_WE

-

M_A_CAS

M

_A_A0

M

_A_A1

M

_A_A2

M

_A_A3

M

_A_A4

M

_A_A5

M

_A_A6

M

_A_A7

M

_A_A8

M

_A_A9

M

_A_A10

M

_A_A11

M

_A_A12

M

_A_A13

M

_A_A14

M

_A_A15

-

M_A_DQS0

-

M_A_DQS1

-

M_A_DQS2

-

M_A_DQS3

-

M_A_DQS4

-

M_A_DQS5

-

M_A_DQS6

-

M_A_DQS7

M

_A_DQS0

M

_A_DQS1

M

_A_DQS2

M

_A_DQS3

M

_A_DQS4

M

_A_DQS5

M

_A_DQS6

M

_A_DQS7

-

M_A_DDRCLK0_800M 24

M

_A_DDRCLK0_800M 24

M

_A_CKE0 24

-

M_A_DDRCLK1_800M 24

M

_A_DDRCLK1_800M 24

M

_A_CKE1 24

-

M_A_CS0 24

-

M_A_CS1 24

M

_A_ODT0 24

M

_A_ODT1 24

M

_A_BS0 24

M

_A_BS1 24

M

_A_BS2 24

-

M_A_RAS 24

-

M_A_WE 24

-

M_A_CAS 24

2

M

_A_A[15:0] 24

-

M_A_DQS[7:0] 24

M

_A_DQS[7:0] 24

1

A A

Project Name :

Size :

C

Date: Sheet :of

5

4

3

2

Date: Sheet :of

Document Number :

T

itle :

Title :

C

PU(3/8) : DDR3L CHANNEL- AOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

5

99Monday, August 12, 2013

5

D D

M_

B_DQ[63:0]26

C C

B B

4

Ha

swell rPGA EDS

SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB S S S S S S S S

_DQ_0 _DQ_1 _DQ_2 _DQ_3 _DQ_4 _DQ_5 _DQ_6 _DQ_7 _DQ_8 _DQ_9 _DQ_10 _DQ_11 _DQ_12 _DQ_13 _DQ_14 _DQ_15 _DQ_16 _DQ_17 _DQ_18 _DQ_19 _DQ_20 _DQ_21 _DQ_22 _DQ_23 _DQ_24 _DQ_25 _DQ_26 _DQ_27 _DQ_28 _DQ_29 _DQ_30 _DQ_31 _DQ_32 _DQ_33 _DQ_34 _DQ_35 _DQ_36 _DQ_37 _DQ_38 _DQ_39 _DQ_40 _DQ_41 _DQ_42 _DQ_43 _DQ_44 _DQ_45 _DQ_46 _DQ_47 _DQ_48 _DQ_49 _DQ_50 _DQ_51 _DQ_52 _DQ_53 _DQ_54 _DQ_55 _DQ_56

B

_DQ_57

B

_DQ_58

B

_DQ_59

B

_DQ_60

B

_DQ_61

B

_DQ_62

B

_DQ_63

B

4

OF 9

swell rPGA EDS

JCPU1D

M_

B_DQ0

M_

B_DQ1

M_

B_DQ2

M_

B_DQ3

M_

B_DQ4

M_

B_DQ5

M_

B_DQ6

M_

B_DQ7

M_

B_DQ8

M_

B_DQ9

M_

B_DQ10

M_

B_DQ11

M_

B_DQ12

M_

B_DQ13

M_

B_DQ14

M_

B_DQ15

M_

B_DQ16

M_

B_DQ17

M_

B_DQ18

M_

B_DQ19

M_

B_DQ20

M_

B_DQ21

M_

B_DQ22

M_

B_DQ23

M_

B_DQ24

M_

B_DQ25

M_

B_DQ26

M_

B_DQ27

M_

B_DQ28

M_

B_DQ29

M_

B_DQ30

M_

B_DQ31

M_

B_DQ32

M_

B_DQ33

M_

B_DQ34

M_

B_DQ35

M_

B_DQ36

M_

B_DQ37

M_

B_DQ38

M_

B_DQ39

M_

B_DQ40

M_

B_DQ41

M_

B_DQ42

M_

B_DQ43

M_

B_DQ44

M_

B_DQ45

M_

B_DQ46

M_

B_DQ47

M_

B_DQ48

M_

B_DQ49

M_

B_DQ50

M_

B_DQ51

M_

B_DQ52

M_

B_DQ53

M_

B_DQ54

M_

B_DQ55

M_

B_DQ56

M

B_DQ57

_

M

B_DQ58

_

M

B_DQ59

_

M

B_DQ60

_

M

B_DQ61

_

M

B_DQ62

_

M

B_DQ63

_

AR18 AT18 AM17 AM18 AR17 AT17 AN17 AN18 AT12 AR12 AN12 AM11 AT11 AR11 AM12 AN11

AR5 AR6 AM5 AM6 AT5 AT6 AN5 AN6

AJ4

AK4

AJ1

AJ2 AM1 AN1 AK2 AK1

L2

M2

L4

M4

L1

M1

L5 M5 G7

J8 G8 G9

J7

J9

G10

J10

A8 B8 A9 B9 D8 E8 D9 E9

E15 D15 A15 B15 E14 D14 A14 B14

LOTES_AZIF0012P002B_INTELHASWEL

CONN_ASM@

SB

SB SB SB SB

SB SB SB SB SB SB

SB

_DQS_N_0

SB

_DQS_N_1

SB

_DQS_N_2

SB

_DQS_N_3

SB

_DQS_N_4

SB

_DQS_N_5

S

_DQS_N_6

B

S

_DQS_N_7

B

S

_DQS_P_ 0

B

S

_DQS_P_ 1

B

S

_DQS_P_ 2

B

S

_DQS_P_ 3

B

S

_DQS_P_ 4

B

S

_DQS_P_ 5

B

S

_DQS_P_ 6

B

S

_DQS_P_ 7

B

3

RS

SB

_CKN0 SB _CKE_0

SB

_CKN1 SB _CKE_1

SB

_CKN2 SB _CKE_2

SB

_CKN3 SB _CKE_3

_CS_N_0 _CS_N_1 _CS_N_2 _CS_N_3

_ODT_0 _ODT_1 _ODT_2 _ODT_3

SB

_BS_0

SB

_BS_1

SB

_BS_2

VS SB

SB

_MA_0

SB

_MA_1

SB

_MA_2

SB

_MA_3

SB

_MA_4

SB

_MA_5

SB

_MA_6

SB

_MA_7

SB

_MA_8

SB

_MA_9 _MA_10 _MA_11 _MA_12 _MA_13 _MA_14 _MA_15

_RAS

_CAS

VD_1

_CK0

_CK1

_CK2

_CK3

_WE

2

AG8 Y4 AA4 AF10 Y3 AA3 AG10 Y2 AA2 AG9 Y1 AA1 AF9

P4 R2 P3 P1

R4 R3 R1 P2 R7 P8 AA9

R10

S_1

R6 P6 P7

R8 Y5 Y10 AA5 Y7 AA6 Y6 AA7 Y8 AA10 R9 Y9 AF7 P9 AA8 AG7

AP18 AP11 AP5 AJ3 L3 H9 C8 C14 AP17 AP12 AP6 AK3 M3 H8 C9 C15

-M

_B_DDRCLK0_800M

M_

B_DDRCLK0_800M

M_

B_CKE0

-M

_B_DDRCLK1_800M

M_

B_DDRCLK1_800M

M_

B_CKE1

-M

_B_CS0

-M

_B_CS1

M_

B_ODT0

M_

B_ODT1

M_

B_BS0

M_

B_BS1

M_

B_BS2

-M

_B_RAS

-M

_B_WE

-M

_B_CAS

M_

B_A0

M_

B_A1

M_

B_A2

M_

B_A3

M_

B_A4

M_

B_A5

M_

B_A6

M_

B_A7

M_

B_A8

M_

B_A9

M_

B_A10

M_

B_A11

M_

B_A12

M_

B_A13

M_

B_A14

M_

B_A15

-M

_B_DQS0

-M

_B_DQS1

-M

_B_DQS2

-M

_B_DQS3

-M

_B_DQS4

-M

_B_DQS5

-M

_B_DQS6

-

_B_DQS7

M

B_DQS0

_

M

B_DQS1

_

M

B_DQS2

_

M

B_DQS3

_

M

B_DQS4

_

M

B_DQS5

_

M

B_DQS6

_

M

B_DQS7

_

-M

_B_DDRCLK0_800M 26

M_

B_DDRCLK0_800M 26

M_

B_CKE0 26

-M

_B_DDRCLK1_800M 26

M_

B_DDRCLK1_800M 26

M_

B_CKE1 26

-M

_B_CS0 26

-M

_B_CS1 26

M_

B_ODT0 26

M_

B_ODT1 26

M_

B_BS0 26

M_

B_BS1 26

M_

B_BS2 26

-M

_B_RAS 26

-M

_B_WE 26

-M

_B_CAS 26

M_

B_A[15:0] 26

-M

_B_DQS[7:0] 26

M

B_DQS[7:0] 26

_

1

A A

roject Name :

P

Size :

C

Date: Sheet :

5

4

3

2

Date: Sheet :

Document Number :

T

tle :

Title :

i

C

U(4/8) : DDR3L CHANNEL- BOAS-1 SP ASSESS

P

1

Rev :

Rev : 1

1

01

.

6

9

o

f

9Monday, August 12, 2013

5

D D

C C

V

CCSENSE79

-

SVID_ALERT79

S

VID_CLK79

S

VID_DATA79

P

WR_DEBUG21

B B

CCSENSE

-

SVID_ALERT

S

VID_CLK

S

VID_DATA

P

WR_DEBUG

R

75_0201_5%

1 2

374

V

CCCPUIO

R

782

130_0201_5%

1 2

4

V

CCCPUIO_A

V

CCCPUIO_PCH

2

1

R

1900 0_0402_5%@R1900 0_0402_5%@

1 2

C

8296

@

4.7U_0402_6.3V6M

V

CCCPUIO

2

1

V

CCCPUCORE

V

CCIO2PCH

C

8297

@

4.7U_0402_6.3V6M

R

9

100_0201_1%

1 2

R

781 43_0201_5%

T

P941TP941

V

CCCPUCORE

I

ST_TRIGGER

CCCPUCORE

V

CC1R35A

3

JCPU1E

K27

R

SVD_2

L27

R

SVD_3

T27

R

SVD_4

V27

R

SVD_5

AB11

V

DDQ_0

AB2

V

DDQ_1

AB5

V

DDQ_2

AB8

V

DDQ_3

AE11

V

DDQ_4

AE2

V

DDQ_5

AE5

V

DDQ_6

AE8

V

DDQ_7

AH11

V

DDQ_8

K11

V

DDQ_9

N11

V

DDQ_10

N8

V

DDQ_11

T11

V

DDQ_12

T2

V

DDQ_13

T5

V

DDQ_14

T8

V

DDQ_15

W11

V

DDQ_16

W2

V

DDQ_17

W5

V

DDQ_18

W8

V

DDQ_19

N26

R

SVD_6

K26

V

CC_0

AL27

R

SVD_7

AK27

R

SVD_8

AL35

V

CC_SENSE

E17

R

SVD_9

AN35

V

CCIO_OUT

A23

R

SVD_10

F22

V

COMP_OUT

W32

R

SVD_11

AL16

R

SVD_12

J27

R

SVD_13

AL13

R

SVD_14

A

M28

V

IDALERT

AM29

V

IDSCLK

AL28

V

IDSOUT

AP35

V

SS_2

H27

P

WR_DEB UG

AP34

V

SS_3

AT35

R

SVD_TP_18

AR35

R

SVD_TP_19

AR32

R

SVD_TP_20

AL26

R

SVD_TP_21

AT34

V

SS_4

AL22

V

SS_5

AT33

V

SS_6

AM21

V

SS_7

AM25

V

SS_8

AM22

V

SS_9

AM20

V

SS_10

AM24

V

SS_11

AL19

V

SS_12

AM23

V

SS_13

AT32

V

SS_14

Y25

V

CC_1

Y26

V

CC_2

Y27

V

CC_3

Y28

V

CC_4

Y29

V

CC_5

Y30

V

CC_6

Y31

V

CC_7

Y32

V

CC_8

Y33

V

CC_9

Y34

V

CC_10

Y35

V

CC_11

LOTES_AZIF0012P002B_INTELHASWEL

CONN_ASM@

H

aswell rPGA EDS

2

V

CCCPUCORE

AA26

V

CC_12

AA28

V

CC_13

AA34

V

CC_14

AA30

V

CC_15

AA32

V

CC_16

AB26

V

CC_17

AB29

V

CC_18

AB25

V

CC_19

AB27

V

CC_20

AB28

V

CC_21

AB30

V

CC_22

AB31

V

CC_23

AB33

V

CC_24

AB34

V

CC_25

AB32

V

CC_26

AC26

V

CC_27

AB35

V

CC_28

AC28

V

CC_29

AD25

V

CC_30

AC30

V

CC_31

AD28

V

CC_32

AC32

V

CC_33

AD31

V

CC_34

AC34

V

CC_35

AD34

V

CC_36

AD26

V

CC_37

AD27

V

CC_38

AD29

V

CC_39

AD30

V

CC_40

AD32

V

CC_41

AD33

V

CC_42

AD35

V

CC_43

AE26

V

CC_44

AE32

V

CC_45

AE28

V

CC_46

AE30

V

CC_47

AG28

V

CC_48

AG34

V

CC_49

AE34

V

CC_50

AF25

V

CC_51

AF26

V

CC_52

AF27

V

CC_53

AF28

V

CC_54

AF29

V

CC_55

AF30

V

CC_56

AF31

V

CC_57

AF32

V

CC_58

AF33

V

CC_59

AF34

V

CC_60

AF35

V

CC_61

AG26

V

CC_62

AH26

V

CC_63

AH29

V

CC_64

AG30

V

CC_65

AG32

V

CC_66

AH32

V

CC_67

AH35

V

CC_68

AH25

V

CC_69

AH27

V

CC_70

AH28

V

CC_71

AH30

V

CC_72

AH31

V

CC_73

AH33

V

CC_74

AH34

V

CC_75

AJ25

V

CC_76

AJ26

V

CC_77

AJ27

V

CC_78

AJ28

V

CC_79

AJ29

V

CC_80

AJ30

V

CC_81

AJ31

V

CC_82

AJ32

V

CC_83

AJ33

V

CC_84

AJ34

V

CC_85

AJ35

V

CC_86

G25

V

CC_87

H25

V

CC_88

J25

V

CC_89

K25

V

CC_90

L25

V

CC_91

M25

V

CC_92

N25

V

CC_93

P25

V

CC_94

R25

V

CC_95

T25

V

CC_96

U25

V

CC_97

U26

V

CC_98

V25

V

CC_99

V26

V

CC_100

W26

V

CC_101

W27

V

CC_102

5

OF 9

D

esign note:

RF solution.

2

1

8458 1000P_0402_25V7-KC8458 1000P_0402_25V7-K C

2

1

8459 47P_0402_25VC8459 47P_0402_25V C

2

1

835 22U_0805_6.3V6MC835 22U_0805_6.3V6M C

838 1U_0402_6.3V6KC838 1U_0402_6.3V6K

1184 22U_0805_6.3V6MC1184 22U_0805_6.3V6M

C

2

1

V

CC1R35A

2

1

840 1U_0402_6.3V6KC840 1U_0402_6.3V6K

842 1U_0402_6.3V6KC842 1U_0402_6.3V6K

C

2

1

846 1U_0402_6.3V6KC846 1U_0402_6.3V6K

844 1U_0402_6.3V6KC844 1U_0402_6.3V6K

C

A A

Project Name :

Size :

C

Date: Sheet :of

5

4

3

2

Date: Sheet :of

Document Number :

Title :

C

PU(5/8) : POWEROAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

7

99Monday, August 12, 2013

5

D D

JCPU1F

A10

VS

S_15

A13

VS

S_16

A16

VS

S_17

A19

VS

S_18

A22

VS

S_19

A25

VS

S_20

A27

VS

S_21

A29

VS

S_22

A3

VS

S_23

A31

VS

S_24

A33

VS

S_25

A4

VS

S_26

A7

VS

S_27

AA11

VS

S_28

AA25

VS

S_29

AA27

VS

S_30

AA31

VS

S_31

AA29

VS

S_32

AB1

VS

S_33

AB10

VS

S_34

AA33

VS

S_35

AA35

VS

S_36

AB3

VS

S_37

AC25

VS

S_38

AC27

VS

S_39

AB4

VS

S_40

AB6

VS

S_41

AB7

VS

S_42

AB9

VS

S_43

AC11

VS

S_44

AD11

VS

S_45

AC29

VS

C C

B B

S_46

AC31

VS

S_47

AC33

VS

S_48

AC35

VS

S_49

AD7

VS

S_50

AE1

VS

S_51

AE10

VS

S_52

AE25

VS

S_53

AE29

VS

S_54

AE3

VS

S_55

AE27

VS

S_56

AE35

VS

S_57

AE4

VS

S_58

AE6

VS

S_59

AE7

VS

S_60

AE9

VS

S_61

AF11

VS

S_62

AF6

VS

S_63

AF8

VS

S_64

AG11

VS

S_65

AG25

VS

S_66

AE31

VS

S_67

AG31

VS

S_68

AE33

VS

S_69

AG6

VS

S_70

AH1

VS

S_71

AH10

VS

S_72

AH2

VS

S_73

AG27

VS

S_74

AG29

VS

S_75

AH3

VS

S_76

AG33

VS

S_77

AG35

VS

S_78

AH4

VS

S_79

AH5

VS

S_80

AH6

VS

S_81

AH7

VS

S_82

AH8

VS

S_83

AH9

V

S_84

S

AJ11

V

S_85

S

AJ5

V

S_86

S

AK11

V

S_87

S

AK25

V

S_88

S

AK26

V

S_89

S

AK28

V

S_90

S

AK29

V

S_91

S

AK30

V

S_92

S

AK32

V

S_93

S

E19

V

S_94

S

LOTES_AZIF0012P002B_INTELHASWEL

CONN_ASM@

H

swell rPGA EDS

a

4

AK34

VS

S_95

AK5

VS

S_96

AL1

VS

S_97

AL10

VS

S_98

AL11

VS

S_99

AL12

VS

S_100

AL14

VS

S_101

AL15

VS

S_330

AL17

VS

S_102

AL18

VS

S_103

AL2

VS

S_104

AL20

VS

S_105

AL21

VS

S_106

AL23

VS

S_107

E22

VS

S_108

AL3

VS

S_109

AL4

VS

S_110

AL5

VS

S_111

AL6

VS

S_112

AL7

VS

S_113

AL8

VS

S_114

AL9

VS

S_115

AM10

VS

S_116

AM13

VS

S_117

AM16

VS

S_118

AM19

VS

S_119

E25

VS

S_120

AM32

VS

S_121

AM4

VS

S_122

AM7

VS

S_123

AN10

VS

S_124

AN13

VS

S_125

AN16

VS

S_126

AN19

VS

S_127

AN2

VS

S_128

AN21

VS

S_129

AN24

VS

S_130

AN27

VS

S_131

AN30

VS

S_132

AN34

VS

S_133

AN4

VS

S_134

AN7

VS

S_135

AP1

VS

S_136

AP10

VS

S_137

AP13

VS

S_138

AP16

VS

S_139

AP19

VS

S_140

AP4

VS

S_141

AP7

VS

S_142

W25

VS

S_143

AR10

VS

S_144

AR13

VS

S_145

AR16

VS

S_146

AR19

VS

S_147

AR2

VS

S_148

AR22

VS

S_149

AR25

VS

S_150

AR28

VS

S_151

AR31

VS

S_152

AR34

VS

S_153

AR4

VS

S_154

AR7

VS

S_155

AT10

VS

S_156

AT13

VS

S_157

AT16

VS

S_158

AT19

VS

S_159

AT21

VS

S_160

AT24

VS

S_161

AT27

VS

S_162

AT3

V

S_163

S

AT30

V

S_164

S

AT4

V

S_165

S

AT7

V

S_166

S

B10

V

S_167

S

B13

V

S_168

S

B16

V

S_169

S

B19

V

S_170

S

B2

V

S_171

S

B22

V

S_172

S

6

OF 9

3

B34

B4 B7

C1 C10 C13 C16 C19

C2 C22 C24 C26 C28 C30 C32 C34

C4

C7 D10 D13 D16 D19 D22 D25 D27 D29 D31 D33 D35

D4

D7

E1 E10 E13 E16

E4

E7 F10 F11 F12 F14 F15 F17 F18 F20 F21 F23 F24 F26 F28 F30 F32 F34

F4 F6 F7 F8 F9

G1 G11

G2 G27 G29

G3 G31 G33 G35

G4

G5 H10 H26

H6

H7 J11 J26 J28 J30 J32 J34

J6

K1

2

H

swell rPGA EDS

a

JCPU1G

VS

S_173

VS

S_174

VS

S_175

VS

S_176

VS

S_177

VS

S_178

VS

S_179

VS

S_180

VS

S_181

VS

S_182

VS

S_183

VS

S_184

VS

S_185

VS

S_186

VS

S_187

VS

S_188

VS

S_189

VS

S_190

VS

S_191

VS

S_192

VS

S_193

VS

S_194

VS

S_195

VS

S_196

VS

S_197

VS

S_198

VS

S_199

VS

S_200

VS

S_201

VS

S_202

VS

S_203

VS

S_204

VS

S_205

VS

S_206

VS

S_207

VS

S_208

VS

S_209

VS

S_210

VS

S_211

VS

S_212

VS

S_213

VS

S_214

VS

S_215

VS

S_216

VS

S_217

VS

S_218

VS

S_219

VS

S_220

VS

S_221

VS

S_222

VS

S_223

VS

S_224

VS

S_225

VS

S_226

VS

S_227

VS

S_228

VS

S_229

VS

S_230

VS

S_231

VS

S_232

VS

S_233

VS

S_234

VS

S_235

VS

S_236

VS

S_237

VS

S_238

VS

S_239

VS

S_240

VS

S_241

V

S_242

S

V

S_243

S

V

S_244

S

V

S_245

S

V

S_246

S

V

S_247

S

V

S_248

S

V

S_249

S

V

S_250

S

V

S_251

S

V

S_252

S

V

S_253

S

LOTES_AZIF0012P002B_INTELHASWEL

CONN_ASM@

VS

S_254

VS

S_255

VS

S_256

VS

S_257

VS

S_258

VS

S_259

VS

S_260

VS

S_261

VS

S_262

VS

S_263

VS

S_264

VS

S_265

VS

S_266

VS

S_267

VS

S_268

VS

S_269

VS

S_270

VS

S_271

VS

S_272

VS

S_273

VS

S_274

VS

S_275

VS

S_276

VS

S_277

VS

S_278

VS

S_279

VS

S_280

VS

S_281

VS

S_282

VS

S_283

VS

S_284

VS

S_285

VS

S_286

VS

S_287

VS

S_288

VS

S_289

VS

S_290

VS

S_291

VS

S_292

VS

S_293

VS

S_294

VS

S_295

VS

S_296

VS

S_297

VS

S_298

VS

S_299

VS

S_300

VS

S_301

VS

S_302

VS

S_303

VS

S_304

VS

S_305

VS

S_306

VS

S_307

VS

S_308

VS

S_309

VS

S_310

VS

S_311

VS

S_312

VS

S_313

VS

S_314

VS

S_315

VS

S_316

VS

S_317

VS

S_318

VS

S_319

VS

S_320

VS

S_321

VS

S_322

V

S_323

S

V

S_324

S

V

S_325

S

V

S_326

S

V

S_327

S

V

S_328

S

V

S_329

S

V

S_SENSE

S

R

VD_15

S

7

OF 9

K10 K2 K29 K3 K31 K33 K35 K4 K5 K7 K8 K9 L11 L26 L6 M11 M26 M28 M30 M32 M34 M6 N1 N10 N2 N29 N3 N31 N33 N35 N4 N5 N6 N7 N9 P11 P26 P5 R11 R26 R28 R30 R32 R34 R5 T1 T10 T29 T3 T31 T33 T35 T4 T6 T7 T9 U11 U27 V11 V28 V30 V32 V34 W1 W10 W3 W35 W4 W6 W7 W9 Y11 H11 AL24 F19 T26 AK35 AK33

V

SSENSE

S

1 2

R

0 100_0201_1%

7

1

V

SSENSE 79

S

A A

roject Name :

P

Size :

C

Date: Sheet :

5

4

3

2

Date: Sheet :

Document Number :

T

tle :

Title :

i

C

U(6/8) : GNDOAS-1 SP ASSESS

P

1

Rev :

Rev : 1

1

01

.

8

9

o

f

9Monday, August 12, 2013

5

D D

D

PB_0N41

D

PB_0P41

D

PB_1N41

D

C C

PB_1P41

D

PB_2N41

D

PB_2P41

D

PB_3N41

D

PB_3P41

D

PC_0N60

D

PC_0P60

D

PC_1N60

D

PC_1P60

D

PC_2N60

D

PC_2P60

D

PC_3N60

D

PC_3P60

4

V

H

aswell rPGA EDS

JCPU1H

T28

D

DIB_TXBN_0

U28

D

DIB_TXBP_ 0

T30

D

DIB_TXBN_1

U30

D

DIB_TXBP_ 1

U29

D

DIB_TXBN_2

V29

D

DIB_TXBP_ 2

U31

D

DIB_TXBN_3

V31

D

DIB_TXBP_ 3

T34

D

DIC_TXCN_0

U34

D

DIC_TXCP_0

U35

D

DIC_TXCN_1

V35

D

DIC_TXCP_1

U32

D

DIC_TXCN_2

T32

D

DIC_TXCP_2

U33

D

DIC_TXCN_3

V33

D

DIC_TXCP_3

P29

D

DID_TXDN_0

R29

D

DID_TXDP_0

N28

D

DID_TXDN_1

P28

D

DID_TXDP_1

P31

D

DID_TXDN_2

R31

D

DID_TXDP_2

N30

D

DID_TXDN_3

P30

D

DID_TXDP_3

LOTES_AZIF0012P002B_INTELHASWEL

CONN_ASM@

e

DP

E

DP_AUXN

E

DP_AUXP E

DP_HPD

E

DP_RCOMP

DP_DISP_ UT IL

E

DP_TXN_0

E

DP_TXP_0

E

DP_TXN_1

E

DP_TXP_1

F

DI_TXN_0

F

DI_TXP_0

F

DI_TXN_1

F

DI_TXP_1

DDI

8

OF 9

M27 N27 P27 E24 R27

P35 R35 N34 P34 P33 R33 N32 P32

3

CCCPUIOVCCCPUIO_A

R

10

10K_0201_5%

1 2

E

DP_COMP

1 2

R

5

24.9_0201_1%

E

DP_AUXN

E

DP_AUXP

E

DP_TXN0

E

DP_TXP0

E

DP_TXN1

E

DP_TXP1

F

DI_TXN0

F

DI_TXP0

F

DI_TXN1

F

DI_TXP1

13

D

Q

1

2

G

LSK3541G1ET2L_VMT3

S

E

DP_AUXN 38

E

DP_AUXP 38

E

DP_TXN0 38

E

DP_TXP0 38

E

DP_TXN1 38

E

DP_TXP1 38

F

DI_TXN0 13

F

DI_TXP0 13

F

DI_TXN1 13

F

DI_TXP1 13

R

8

100K_0201_5%

1 2

E

DP_HPD 38

2

1

B B

A A

Project Name :

Size :

C

Date: Sheet :of

5

4

3

2

Date: Sheet :of

Document Number :

T

itle :

Title :

C

PU(7/8) : EDP/DDIOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

9

99Monday, August 12, 2013

5

D D

C C

B B

4

R8

898

49.9_0201_1%

1 2

CF

G321

@

1 2

900 49.9_0201_1%R8900 49.9_0201_1% R8

1 2

4 1K_0201_5%R14 1K_0201_5% R1

1 2

965 1K_0201_5%R8965 1K_0201_5%

966 1K_0201_5%

966 1K_0201_5% 8

8

R8

R

Table 10-1

C

G2 : PEG Static Lane Reversal

F 1 : Normal Operation 0 : Lane Reversal

CFG4 : Display Port Presence 1 : Disabled 0 : Enabled

CFG[6:5] : PEG Bifurcation 11 : Func 1 Disabled, Func 2 Disabled (x16,---,---) 10 : Func 1 Enabled, Func 2 Disabled (x8,x8,---) 01 : Func 1 Disabled, Func 2 Enabled 00 : Func 1 Enabled, Func 2 Enabled (x8,x4,x4)

CFG7 : PEG Defer Training 1 : PEG Train Immediately Following XXRESETB Deassertion 0 : PEG Wait for BIOS for Training

3

Ha

swell rPGA EDS

JCPU1I

AT1

RS

VD_TP_0

AT2

RS

VD_TP_1

AD10

RS

VD_16

VC

CCPUCORE

@

1 2

967 1K_0201_5%

968 1K_0201_5%

8

R

TP

940TP940

A34

RS

VD_TP_2

A35

RS

VD_TP_3

W29

RS

VD_TP_4

W28

RS

VD_TP_5

G26

TE

STLO_G26

W33

RS

VD_17

AL30

RS

VD_18

AL29

RS

VD_19

F25

VC

C_103

C35

RS

VD_TP_6

B35

RS

VD_TP_7

AL25

RS

VD_TP_8

W30

RS

VD_TP_9

W31

RS

VD_TP_10

W34

TE

STLO

AT20

CF

G_0

AR20

CF

G_1

AP20

CF

G_2

AP22

CF

G_3

AT22

CF

G_4

AN22

CF

G_5

AT25

CF

G_6

AN23

CF

G_7

AR24

CF

G_8

AT23

CF

G_9

AN20

CF

G_10

AP24

CF

G_11

AP26

CF

G_12

AN25

CF

G_13

AN26

CF

G_14

AP25

@

1 2

CF

G_15

231 1K_0201_5%

LOTES_AZIF0012P002B_INTELHASWEL

LOTES_AZIF0012P002B_INTELHASWEL 9

9 R

R

CONN_ASM@

Layout note: Trace length between Pin AP22 to R9231.2 as short as possible.

RS

VD_TP_11

RS

VD_TP_12

RS

VD_TP_13

RS

VD_TP_14

CF

G_RCOMP

RS

VD_TP_15

RS

VD_TP_16

RS

VD_TP_17

9

OF 9

C23 B23 D24 D23

AT31 AR21

CF

G_16

AR23

CF

G_18

AP21

CF

G_17

AP23

CF

G_19

AR33

RS

VD_29

G6

FC

_G6

AM27

RS

VD_30

AM26

RS

VD_31

F5

RS

VD_20

AM2

RS

VD_21

K6

RS

VD_22

E18

RS

VD_23

U10

RS

VD_24

P10

RS

VD_25

B

1

NC

A2

RS

VD_26

AR1

E21 E20

AP27

RS

VD_27

AR26

RS

VD_28

AL31

VS

S_330

AL32

VS

S_331

R8

963

49.9_0201_1%

1 2

2

1

A A

roject Name :

P

Size :

C

Date: Sheet :

5

4

3

2

Date: Sheet :

Document Number :

T

tle :

Title :

i

C

U(8/8) : CFG/RESERVEDOAS-1 SP ASSESS

P

1

Rev :

Rev : 1

1

01

.

1

99Monday, August 12, 2013

0

o

f

5

4

3

2

1

Table 11-4

Tamper DisableEnable

SW1 ASM NO_ASM

D D

C8486

D255

R9291

ASM

NO_ASMR9248

NO_ASMASM

NO_ASM

Table 11-1

32.768KHz 9pF 20ppm:

KDS 1TJF090DP1A0004 TXC 9H03200033 Epson Q13FC1350000300

1 2

C

348 10P_0201_25V8D

Y

6

32.768KHZ_9PF_9H03200033

1 2

C

326 10P_0201_25V8D

C C

H

P

-

H

B B

1

4

S

W1

2

3

SPVR310100_4P

DA_BCLK54

DA_SYNC54

CH_SPKR59

HDA_RST54

DA_SDIN054

H

DA_SDO54

-

EC_WAKE61

TEST PAD BOTTOM SIDE DO NOT MOVE AFTER FIX

-

INTRUDER_EC63

1 2

R

60 33_0201_5%

1 2

R

423 33_0201_5%

1 2

R

456 33_0201_5%

V

CC3_SUS

1 2

R

846 1K_0201_5%

1 2

R

74 33_0201_5%

SIT

R

351

10M_0201_5%

1 2

R

9248 0_0201_5%

D

255 RB520CS-30GT2RA_VMN2-2

R

-

SRTCRST22

12

-

RTCRST20,22

V

CC3_SUS

R

V

CC3_SUS

R

1009

1K_0201_5%

1 2

TCX1

TCX2

@

1 2

566 0_0603_5%

PLACE ON TOP SIDE

T

P900TP900

P901TP901

P

CH_TCK21

P

CH_TMS21

P

CH_TDI21

P

CH_TDO21

R

TCVCC

R

408

330K_0201_5%

1 2

R

TCVCC

1 2

2

1

R

646

1M_0201_5%

-

INTRUDER

C

8486

1000P_0201_25V7K

V

CC3B

1 2

R

65

@

1K_0201_5%

Table 11-2

SPKR TCO TIMER SYSTEM REBOOT

H

IGH

DISABLED (NO REBOOT)

LOW

ENABLED

L

PT_PCH_M_EDS

U5A

B5

R

TCX1

B4

R

TCX2

B9

S

RTCRST#

A8

I

NTRUDER#

G10

I

NTVRMEN

D9

R

TCRST#

B25

H

DA_BCLK

A22

H

DA_SYNC

AL10

S

PKR

C24

H

DA_RST#

L22

H

DA_SDI0

K22

H

DA_SDI1

G22

H

DA_SDI2

F22

H

DA_SDI3

A24

H

DA_SDO

B17

D

OCKEN#/G PIO33

C22

H

DA_DOCK_ RST#/GPIO13

AB3

J

TAG_TCK

AD1

J

TAG_TMS

AE2

J

TAG_TDI

AD3

J

TAG_TDO

F8

T

P25

C26

T

P22

AB6

T

P20

DH82QM87-SR17C-C2_FCBGA695

PT_PCH_M_EDS

J

J TAGRTC AZALIA

TAGRTC AZALIA

BC8

S

ATA_RXN_0

BE8

S

ATA_RXP_0

AW8

S

ATA_TXN_0

AY8

S

ATA_TXP_0

BC10

S

ATA_RXN_1

BE10

S

ATA_RXP_1

AV10

S

ATA_TXN_1

AW10

S

ATA_TXP_1

BB9

S

ATA_RXN_2

BD9

S

ATA_RXP_2

AY13

S

ATA_TXN_2

AW13

S

ATA_TXP_2

BC12

S

ATA_RXN_3

BE12

S

ATA_RXP_3

S

ATA_RXN4/P ERN1

S

ATA_RXP4/ PERP1

S

ATA_TXN4/PE TN1

S

ATA_TXP4/PE TP1

S

ATA_RXN5/P ERN2

S

ATA_RXP5/ PERP2

S

ATA_TXN5/PE TN2

S

ATA_TXP5/PE TP2

S

ATA0GP/GP IO21

S

ATA1GP/GP IO19

1

OF 11

S

ATA_RCOMP

S

ATALED#

S

ATA_IREF

BD13 BB13

AV15 AW15

BC14 BE14

AP15 AR15

AY5

AP3

AT1

AU2

BD4

BA2

T

P9

BB2

T

P8

S

ATA_RCOMP

1 2

R

604 7.5K_0201_1%

AR13

S

ATA_TXN_3

AT13

S

ATA_TXP_3

ATA

ATA S

V

CC1R5B

S

ATA0_HDD_RXN 43

S

ATA0_HDD_RXP 43

S

ATA0_HDD_TXN 43

S

ATA0_HDD_TXP 43

S

ATA1_WWAN_RXN 50

S

ATA1_WWAN_RXP 50

S

ATA1_WWAN_TXN 50

S

ATA1_WWAN_TXP 50

S

ATA4_3RD_RXN 53

S

ATA4_3RD_RXP 53

S

ATA4_3RD_TXN 53

S

ATA4_3RD_TXP 53

S

ATA5_ODD_RXN 44

S

ATA5_ODD_RXP 44

S

ATA5_ODD_TXN 44

S

ATA5_ODD_TXP 44

-

DISCRETE_PRESENCE

V

CC3B

UMA@

996

1 2

R

SWG@

239

1 2

R

Table 11-3

0

1

2

3

4

5

10K_0201_5%

SATA Port Assignment

HDD Connector

NGFF WWAN Slot

Reserved

NGFF Slot at Palmrest

Bay Connector

V

CC3B

10K_0201_5%

99

1 2

100K_0201_5%

R

9247

9247 R

R

Table 11-4

GFX SWG UMA

R239

ASM

R996

No-ASM

-

DASPHDD 71

No-ASM ASM

A A

Project Name :

Size :

C

Date: Sheet :of

5

4

3

2

Date: Sheet :of

Document Number :

T

itle :

Title :

P

CH(1/10) : RTC/HDA/SATA/JTAGOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

1

1 99Monday, August 12, 2013

5

D D

LP

C_AD[3:0]61,69,70

C C

-L

PC_FRAME61,69,70

IR

QSER61,69,70

SP

I2_CLK23

12

R9

268 33_0201_5%

SP

I_CLK23

SP

I_MOSI_IO023

SP

I_MISO_IO123

SP

I_IO223

SP

I_IO323

B B

268 33_0201_5%

-S

PI_CS023

-S

PI_CS123

12

R9

269 33_0201_5%

12

R9

270 33_0201_5%

12

R9

271 33_0201_5%

12

R9

272 33_0201_5%

SP

I2_MOSI_IO023

SP

I2_MISO_IO123

SP

I2_IO223

S

I2_IO323

P

R9

267 33_0201_5%

R9

273 33_0201_5%

R9

274 33_0201_5%

R9

275 33_0201_5%

R

276 33_0201_5%

9

Layout note: Put on below resistors near PCH (U5): R9268,R9269,R9270,R9271,R9272 R9267,R9273,R9274,R9275,R9276

4

VC

C3B

R8

60

8.2K_0201_5%

1 2

IN

TEGRATED PULL UP

INTEGRATED PULL UP

1 2

12

R9

287 33_0201_5%

12

R9

288 33_0201_5%

1 2

3

VC

C3LAN_SPI

@

266

265

1 2

R9

3.3K_0201_5%

3.3K_0201_5% U5D

U5D

LP

C_AD0

LP

C_AD1

LP

C_AD2

LP

C_AD3

A20

LA

D_0

C20

LA

D_1

A18

LA

D_2

C18

LA

D_3

B21

LF

RAME#

D21

LD

RQ0#

G20

LD

RQ1#/GPI O23

AL11

SE

RIRQ

AJ11

SP

I_CLK

AJ7

SP

I_CS0#

AL7

SP

I_CS1#

AJ10

SP

I_CS2#

AH1

SP

I_MOSI

AH3

SP

I_MISO

AJ4

SP

I_IO2

AJ2

SP

I_IO3

DH82QM87-SR17C-C2_FCBGA695

LP

T_PCH_M_EDS

SM

BCLK

SM

BDATA

SM

L0CLK

SM

L0DATA

L1CLK/GP IO58

CL

_CLK

CL

_DATA

CL

_RST#

TD

_IREF

N7

R10

U11

N8

U8

R7

H6

K6

N11

AF11

AF10

AF7

BA45

TP

1

BC45

TP

2

BE43

TP

4

BE44

TP

3

AY43

SM

SMBus

LPC

C-Link

SP

SP I

I

Thermal

3

OF 11

BALERT#/G PIO11

SM

L0ALERT#/ GPIO60

SM

L1ALERT#/ PCHHOT#/GPIO7 4

SM

L1DATA/GP IO75

C3_SUS

R9

R3

282

59

10K_0201_5%

1 2

R8

59

10K_0201_5%

1 2

971 8.25K_0201_1%

R1

499_0201_1%

1 2

2

R3

89

10K_0201_5%

R3

94

4.7K_0201_5%

1 2

R1

06

07

499_0201_1%

1 2

R3

97

4.7K_0201_5%

R2

@

10K_0201_5%

1 2

72

SM

B_CLK

SM

B_DATA

SM

L0_CLK

SM

L0_DATA

EC

_SCL2

EC

_SDA2

CL

_CLK_WLAN

CL

_DATA_WLAN

-C

L_RST_WLAN

1

SM

B_CLK 70

SM

B_DATA 70

SM

L0_CLK 47

SM

L0_DATA 47

EC

_SCL2 62

EC

_SDA2 62

CL

_CLK_WLAN 50

CL

_DATA_WLAN 50

-C

L_RST_WLAN 50

A A

roject Name :

P

Size :

C

Date: Sheet :

5

4

3

2

Date: Sheet :

Document Number :

T

tle :

Title :

i

P

H(2/10) : LPC/SPI/SMBUS/C-LINK/THERMALOAS-1 SP ASSESS

C

1

Rev :

Rev : 1

1

01

.

1

99Monday, August 12, 2013

2

o

f

5

D D

D

MI_RXN[3:0]3

D

MI_RXP[3:0]3

D

MI_TXN[3:0]3

D

C C

-

XDP_DBR20,21, 4

B

PWRG21,62,70,72

C

PUCORE_PWRGD21,79

M

EPWRG85

D

RAMPWRG4

-

RSMRST21,71

-

PWRSW_EC62

A

C_PRESENT20,71

-

B B

BATLOW71

-

PCH_SLP_WLAN62

MI_TXP[3:0]3

V

CC1R5B

-

SUSWARN

4

D

MI_RXN0

D

MI_RXN1

D

MI_RXN2

D

MI_RXN3

D

MI_RXP0

D

MI_RXP1

D

MI_RXP2

D

MI_RXP3

D

MI_TXN0

D

MI_TXN1

D

MI_TXN2

D

MI_TXN3

D

MI_TXP0

D

MI_TXP1

D

MI_TXP2

D

MI_TXP3

1 2

R

201 7.5K_0201_1%

1 2

R

9059 0_0201_5%

1 2

R

21 0_0201_5%

1 2

R

617 0_0201_5%

1 2

R

9250 0_0201_5%

3

V

CC3_SUS

CC3M

1 2

502 10K_0201_5%R502 10K_0201_5%

161 10K_0201_5%R161 10K_0201_5%

9177 100K_0201_5%R9177 100K_0201_5%

R

U5B

R

AW22

D

MI_RXN_0

AR20

D

MI_RXN_1

AP17

D

MI_RXN_2

AV20

D

MI_RXN_3

AY22

D

MI_RXP_0

AP20

D

MI_RXP_1

AR17

D

MI_RXP_2

AW20

D

MI_RXP_3

BD21

D

MI_TXN_0

BE20

D

MI_TXN_1

BD17

D

MI_TXN_2

BE18

D

MI_TXN_3

BB21

D

MI_TXP_0

BC20

D

MI_TXP_1

BB17

D

MI_TXP_2

BC18

D

MI_TXP_3

BE16

D

MI_IREF

AW17

T

P12

AV17

T

P7

AY17

D

MI_RCOMP

R6

S

USACK#

AM1

S

YS_RESET#

AD7

S

YS_PWRO K

F10

P

WROK

AB7

A

PWROK

H3

D

RAMPWRO K

J2

R

SMRST#

J4

S

USWARN# /SUSPWRNA CK/GPIO30

K1

P

WRBTN#

E6

A

CPRESENT/GP IO31

K7

B

ATLOW#/ GPIO72

N4

R

I#

AB10

T

P21

D2

S

LP_WL AN#/GPIO29

DH82QM87-SR17C-C2_FCBGA695

DMI

L

PT_PCH_M_EDS

System Power

Management

4

OF 11

FDI

S

US_STAT#/GP IO61

S

LP_S5#/ GPIO63

F

DI_RXN_0

F

DI_RXN_1

F

DI_RXP_0

F

DI_RXP_1

F

DI_CSYNC

F

DI_INT

F

DI_IREF

F

DI_RCOMP

D

SWVRME N

D

PWROK

W

AKE#

C

LKRUN#

USCLK/GP IO62

S

LP_S4#

S

LP_S3#

S

LP_A#

S

LP_SUS#

P

MSYNCH

S

LP_LAN#

AJ35

F

DI_TXN0

AL35

F

DI_TXN1

AJ36

F

DI_TXP0

AL36

F

DI_TXP1

AV43

T

P16

AY45

T

P5

AV45

T

P15

AW44

T

P10

AL39

F

DI_CSYNC

AL40

F

DI_INT

AT45

AU42

T

P17

AU44

T

P13

AR44

C8

L13

K3

AN7

U7

Y6

Y7

C6

H1

F3

F1

AY3

G5

1 2

R

8970 7.5K_0201_1%

1 2

R

203 0_0201_5%

F

DI_TXN0 9

F

DI_TXN1 9

F

DI_TXP0 9

F

DI_TXP1 9

F

DI_CSYNC 3

F

DI_INT 3

2

V

CC1R5B

R

TCVCC

1 2

164 330K_0201_5%R164 330K_0201_5% R

V

CC3BVCC3M

1 2

28 8.2K_0201_5%R28 8.2K_0201_5% R

V

CC3M

@

1 2

612 10K_0201_5%R612 10K_0201_5%

614 10K_0201_5%

R

1

M

PWRG 72

-

PCIE_WAKE 50,61,71

-

CLKRUN 61,69,70

-

SUS_STAT 61,70

S

USCLK_32K 61,71

-

PCH_SLP_S5 20,71

-

PCH_SLP_S4 20,62,71

-

PCH_SLP_S3 20,62,71,78

-

PCH_SLP_M 20,71

-

PCH_SLP_SUS 62

P

M_SYNC 4

-

PCH_SLP_LAN 71

1 2

R

9251 0_0201_5%@R9251 0_0201_5%@

D

esign Note : Put R9251 near PCH (U5) in order to shorten the stub of SUSCLK_32K.

A A

Project Name :

Size :

C

Date: Sheet :of

5

4

3

2

Date: Sheet :of

Document Number :

S

USCLK_32K_R 50

T

itle :

Title :

P

CH(3/10) : DMI/FDI/PMOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

1

3 99Monday, August 12, 2013

5

D D

C C

DD

CCLK40

DD

CDATA40

HS

YNC40

VS

YNC40

PA

NEL_BKLT_CTRL38

VG

A_BLON71

PA

NEL_POWER_ON72

B B

A A

VC

C3B

1 2

R4

0

2.2K_0201_5%

R3

8

2.2K_0201_5%

1 2

BL

UE40

GR

EEN40

RE

D40

R1

38

100K_0201_5%

1 2

R5

13 150_0201_1%

1 2

R2

42 150_0201_1%

1 2

R5

27 150_0201_1%

R4

33

100K_0201_5%

1 2

4

VC

C3B

1 2

63 8.2K_0201_5%

60 8.2K_0201_5%

R6

R1

@

R1

40

1 2

649_0201_0.5%

-

C_DTCT53

S

P

ANARID115

L

N

C_REG_ON65

F

1 2

50 8.2K_0201_5%

65 8.2K_0201_5%

69 8.2K_0201_5%

69 8.2K_0201_5% R6

R6

65 8.2K_0201_5%

5

4

R

-

LTRST_NEAR21,51,61,69,70,71

P

-

LTRST_FAR47,50,70

P

3

1 2

45 8.2K_0201_5%

46 8.2K_0201_5%

42 8.2K_0201_5%

5

R

LP

T_PCH_M_EDS

U5E

T45

VG

A_BLUE

U44

VG

A_GREEN

V45

VG

A_RED

M43

VG

A_DDC_CLK

M45

VG

A_DDC_DATA

N42

VG

A_HSYNC

N44

VG

A_VSYNC

U40

DA

C_IREF

U39

VG

A_IRTN

N36

ED

P_BKLTCTL

K36

ED

P_BKLTEN

G36

ED

P_VDDEN

H20

PI

RQA#

L20

PI

RQB#

K17

P

RQC#

I

M20

P

RQD#

I

A12

G

IO50

P

B13

G

IO52

P

C12

G

IO54

P

C10

G

IO51

P

A10

G

IO53

P

AL6

G

IO55

P

DH82QM87-SR17C-C2_FCBGA695

2

C

60

4

100P_0201_25V8J

1

T_PCH_M_EDS

1 2

R

91 33_0201_5%

9

1 2

R

93 33_0201_5%

9

2

C

6

4

100P_0201_25V8J

1

PB_CTRLCLK

PB_CTRLDATA

PC_CTRLCLK

PC_CTRLDATA

PD_CTRLCLK

PD_CTRLDATA

DD

PB_AUXN

DD

PC_AUXN

DD

PD_AUXN

DD

PB_AUXP

DD

PC_AUXP

DD

PD_AUXP

DD

PB_HPD

DD

PC_HPD

D

PD_HPD

D

P

RQE#/GPI O2

I

P

RQF#/GPIO 3

I

P

RQG#/GPI O4

I

P

RQH#/GPIO 5

I

P

L

C3M

C

R40

R39

R35

R36

N40

N38

H45

K43

J42

H43

K45

J44

K40

K38

H39

G17

F17

L15

M15

AD10

P

E#

M

Y11

TRST#

U

3

7

5

V

C

4

O

T_Y

U

TC7SG17FE_SON5

DD

SPLAY

SPLAY I

I D

D

L

L V

V DSCRT

DSCRT

P

I

C

5

OF 11

V

Table 14-1

2

I

TEGRATED PULL UP

N

1

N

C

2

I

_A

N

3

G

D

N

DP

B_CTRLCLK 41

DP

B_CTRLDATA 41

DO

CK_DP_CLK 60

DO

CK_DP_DATA 60

VC

C3B

1 2

30 8.2K_0201_5%

30 8.2K_0201_5% 4

4 R

R

1

1 2

35 8.2K_0201_5%

32 8.2K_0201_5%

4

R

V

C5B

C

G

2

S

R

38

4

10K_0201_5%

Q

86

1

1 2

1

LSK3541G1ET2L_VMT3

DP

B_AUXN 41

DO

CK_DPC_AUXN 60

DP

B_AUXP 41

D

CK_DPC_AUXP 60

O

D

B_HPD 41

P

N

C_INT 65

F

-

ATA0_DEVSLP 43

S

-

ATA1_DEVSLP 50

S

-

ATA4_DEVSLP 53

S

13

D

R

210

9

100K_0201_5%

1 2

D

CK_HPD 60

O

Buffer (U73)

TC7SG17FEToshiba

NL17SZ17XV5T2GONsemi

5

4

3

2

roject Name :

P

Size :

C

Date: Sheet :

Document Number :

T

tle :

Title :

i

P

H(4/10) : LCD/CRT/PCI/DDI CONTROLOAS-1 SP ASSESS

C

1

Rev :

Rev : 1

1

01

.

1

99Monday, August 12, 2013

4

o

f

5

4

3

2

1

Table 15-1

GPIO8

D D

Table 15-2

-

FB_CLAMP_TGL_REQ31

C C

B B

HIGH

LOW

G

PIO37

HIGH

LOW

-

EC_SCI61

F

B_CLAMP30,31

L

ANPHYPC47

D

GFX_PWRGD17,83

-

LANWAKE47

-

NFC_DTCT65

INT_MIC_DTCT38

-

WWAN_DTCT50

-

NGFF_DTCT53

INTEGRATED CLOCKING

DISABLED(BTM)

ENABLED(FCIM)

ME CRYPTO STRAP

WITH CONFIDENTIALITY

NO CONFIDENTIALITY

1 2

R

9140 0_0201_5%@

@

1 2

R

9141 0_0201_5%

S

ATA_BAY_DTCT

V

CC3B

R

690

10K_0201_5%

1 2

V

CC3_SUS

0K_0201_5%

0K_0201_5% 1

1

R

689

10K_0201_5%

1 2

V

CC3B

R

226

@

1 2

R

686

@

10K_0201_5%

R

961

10K_0201_5%

R

0K_0201_5%

0K_0201_5% 1

1

1 2

R

685

10K_0201_5%

1 2

R

610

R

360

280

0K_0201_5%

0K_0201_5% 1

1

280

0K_0201_5%

1

1 2

V

CC3_SUS

1

R

212

10K_0201_5%

1 2

R

9199

0K_0201_5%

0K_0201_5% 1

1

1 2

R

543 1K_0201_5%

V

CC3B

-

MIC_HW_EN

9198

FOR SOLDER CRACK DETECTION

R

933

@

0K_0201_5%

0K_0201_5% 1

1

1 2

R

544

0K_0201_5%

1

1 2

R

320 10K_0201_5%

R

547 1K_0201_5%

P

LANARID2

P

LANARID3

P

LANARID0

S

ATA_BAY_DTCT

R

9057

1 2

T

P108TP108

T

P109TP109

T

P110TP110

T

P111TP111

Design Note : Size : 1.55mm x 0.6mm

V

CC3_SUS

CC3M

R

8951

0K_0201_5%

0K_0201_5% 1

1

1 2

684

@

0K_0201_5%

0K_0201_5% 1

1

1 2

U5F

AT8

B

MBUSY#/GPI O0

F13

T

ACH1/GPIO 1

A14

T

ACH2/GPIO 6

G15

T

ACH3/GPIO 7

Y1

G

PIO8

K13

L

AN_PHY_PW R_CTRL/GPIO 12

AB11

G

PIO15

AN2

S

ATA4GP/GP IO16

C14

T

ACH0/GPIO 17

BB4

S

CLOCK/GP IO22

Y10

G

PIO24

R11

G

PIO27

AD11

G

PIO28

AN6

G

PIO34

AP1

G

PIO35/NMI #

AT3

S

ATA2GP/GP IO36

AK1

S

ATA3GP/GP IO37

AT7

S

LOAD/GPI O38

AM3

S

DATAOUT0/GPI O39

AN4

S

DATAOUT1/GPI O48

AK3

S

ATA5GP/GP IO49

U12

G

PIO57

C16

T

ACH4/GPIO 68

D13

T

ACH5/GPIO 69

G13

T

ACH6/GPIO 70

H15

T

ACH7/GPIO 71

BE41

V

SS

BE5

V

SS

C45

V

SS

A5

V

SS

DH82QM87-SR17C-C2_FCBGA695

L

PT_PCH_M_EDS

GPIO

6

OF 11

V

CC3B

R

937

CPU/Misc

AN10

T

P14

AY1

P

ECI

AT6

R

CIN#

AV3

P

ROCPWRG D

AV1

R

T

HRMTRIP#

P

LTRST_PROC#

V

V V V V V V V V V V V V V V V V

NCTF

V V V V

R

AU4

N10

SS

A2

SS

A41

SS

A43

SS

A44

SS

B1

SS

B2

SS

B44

SS

B45

SS

BA1

SS

BC1

SS

BD1

SS

BD2

SS

BD44

SS

BD45

SS

BE2

SS

BE3

SS

D1

SS

E1

SS

E45

SS

A4

SS

937

10K_0201_5%

1 2

357 390_0201_5%

Design Note : Size : 1.55mm x 0.6mm

-

KBRC 61

C

PUPWRGD 21,4

-

THERMTRIP 4

-

PLTRST_PROC 4

T

P112TP112

T

P113TP113

T

P114TP114

T

P115TP115

T

P116TP116

T

P117TP117

T

P118TP118

T

P119TP119

T

P120TP120

T

P121TP121

FOR SOLDER CRACK DETECTION

T

P122TP122

T

P123TP123

T

P124TP124

T

P125TP125

T

P126TP126

T

P127TP127

T

P128TP128

T

P129TP129

T

P130TP130

T

P131TP131

CC3BVCC3BVCC3BVCC3B

R

39

505

@

10K_0201_5%

R

43

10K_0201_5%

1 2

R

47

@

10K_0201_5%

1 2

A A

1 2

5

37

@

10K_0201_5%

1 2

R

113

10K_0201_5%

1 2

4

R

671

@

10K_0201_5%

1 2

R

48

10K_0201_5%

1 2

P

LANARID0

P

LANARID1

P

LANARID2

P

LANARID3

P

LANARID1 14

LEVEL

1 R39

0

Table 15-4

LEVEL

SDV 0000B

FVT 000 1B

SIT-v 0011B

V

Table 15-3

PLANAR ID

R505 R37 R671

R43 R47 R113 R48

PLANARID[3..0]

0010BSIT

0100BSVT

3

0123

Project Name :

Size :

C

Date: Sheet :of

2

Date: Sheet :of

Document Number :

Title :

P

CH(5/10) : GPIO/CPU/MISC/NCTF/RSVDOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

1

5 99Monday, August 12, 2013

5

4

3

2

1

Table 16-1 Table 16-2

Flexible I/O Configuration

I/O

High Speed Signals

Port 1

Port 2

D D

C C

B B

Port 3

Port 4

Port 5

Port 6

Port 7

Port 8

Port 9

Port 10

Port 11

Port 12

Port 13

Port 14

Port 15

Port 16

Port 17

Port 18

USB3 1

USB3 2

USB3 5

USB3 6

PCIE 1/USB3 3

PCIE 2/USB3 4

PCIE 3

PCIE 4

PCIE 5

PCIE 6

PCIE 7

PCIE 8

SATA 4/PCIE 1

SATA 5/PCIE 2

SATA 0

SATA 1

SATA 2

SATA 3

Configuration

USB3 1

USB3 2

USB3 5

USB3 6

PCIE 1

PCIE 2

PCIE 3

PCIE 4

PCIE 5

PCIE 6

PCIE 7

PCIE 8

SATA 4

SATA 5

SATA 0

SATA 1

SATA 2

SATA 3

Net Name

USB3P1_SYS0

USB3P2_SYS1

USB3P5_DOCK

NC

PCIE1_MCC

PCIE2_WLAN

NC

PCIE4_GBE

NC

SATA4_3RD

SATA5_ODD

SATA0_HDD

SATA1_WWAN

NC

PC

IE1_MCC_RXN51

PC

IE1_MCC_RXP51

PC

IE1_MCC_TXN51

PC

IE1_MCC_TXP51

PC

IE2_WLAN_RXN50

PC

IE2_WLAN_RXP50

PC

IE2_WLAN_TXN50

PC

IE2_WLAN_TXP50

PC

IE4_GBE_RXN47

PC

IE4_GBE_RXP47

PC

IE4_GBE_TXN47

PC

IE4_GBE_TXP47

Port Assignment

USB 3.0 System Port 0

USB 3.0 System Port 1

USB 3.0 Docking

Reserved

Media Card Controller

NGFF WLAN Slot

Reserved

GbE PHY

Reserved

NGFF Slot at Palmrest

Bay Connector

HDD Connector

NGFF WWAN Slot

Reserved

1 2

C8

479 0.1U_0201_6.3V6K

1 2

C1

50 0.1U_0201_6.3V6K

1 2

C7

99 0.1U_0201_6.3V6K

1 2

C8

480 0.1U_0201_6.3V6K

1 2

C1

51 0.1U_0201_6.3V6K

1 2

C7

20 0.1U_0201_6.3V6K

V

C1R5B

C

R

964 7.5K_0201_1%

8

PCIe Port Assignment

1 Media Card Controller

2 NGFF WLAN Slot

3 Reserved

4 GbE PHY

5 Reserved

6 Reserved

7 Reserved

8 Reserved

PC

IE4_GBE_TXN_C

PC

IE4_GBE_TXP_C

1 2

U5I

AW31

PE

RN1/USB3R N3

AY31

PE

RP1/USB3 RP3

BE32

PE

TN1/USB3TN3

BC32

PE

TP1/USB3TP3

AT31

PE

RN2/USB3R N4

AR31

PE

RP2/USB3 RP4

BD33

PE

TN2/USB3TN4

BB33

PE

TP2/USB3TP4

AW33

PE

RN_3

AY33

PE

RP_3

BE34

PE

TN_3

BC34

PE

TP_3

AT33

PE

RN_4

AR33

PE

RP_4

BE36

PE

TN_4

BC36

PE

TP_4

AW36

PE

RN_5

AV36

PE

RP_5

BD37

PE

TN_5

BB37

PE

TP_5

AY38

PE

RN_6

AW38

PE

RP_6

BC38

PE

TN_6

BE38

PE

TP_6

AT40

PE

RN_7

AT39

PE

RP_7

BE40

PE

TN_7

BC40

PE

TP_7

AN38

P

RN_8

E

AN39

P

RP_8

E

BD42

P

TN_8

E

BD41

P

TP_8

E

BE30

P

IE_IREF

C

BC30

T

11

P

BB29

T

6

P

BD29

P

IE_RCOMP

C

DH82QM87-SR17C-C2_FCBGA695

LP

T_PCH_M_EDS

P

P C

C Ie

Ie

VC

C3_SUS

Table 16-3

US

1 2

48 10K_0201_5%

54 10K_0201_5%

48 10K_0201_5%

6

2

R

S

R

BCOMP

B37

US

B2N0

D37

US

B2P0

A38

US

B2N1

C38

US

B2P1

A36

US

B2N2

C36

US

B2P2

A34

US

B2N3

C34

US

B2P3

B33

US

B2N4

D33

US

B2P4

F31

US

B2N5

G31

US

B2P5

K31

US

B2N6

L31

US

B2P6

G29

US

B2N7

H29

US

B2P7

A32

US

B2N8

C32

US

B2P8

A30

US

B2N9

C30

US

B2P9

B29

US

B2N10

D29

US

B2P10

A28

US

B2N11

C28

US

B2P11

G26

US

B2N12

B

B S

S U

U

9

OF 11

U

O

C

O

C

O

C

O

C

O

C O

O

C

O

C

US

B2P12

US

B2N13

US

B2P13

US

B3RN1

US

B3RP1

US

B3TN1

US

B3TP1

US

B3RN2

US

B3RP2

US

B3TN2

US

B3TP2

US

B3RN5

US

B3RP5

US

B3TN5

US

B3TP5

U

B3RN6

S

U

B3RP6

S

U

B3TN6

S

U

B3TP6

S

BRBIAS#

S

U

BRBIAS

S

0#/GPIO5 9 1#/GPIO4 0 2#/GPIO4 1 3#/GPIO4 2 4#/GPIO4 3

5#/GPIO9

C 6#/GPIO1 0 7#/GPIO1 4

F26 F24 G24

AR26 AP26 BE24 BD23 AW26 AV26 BD25 BC24 AW29 AV29 BE26 BC26 AR29 AP29 BD27 BE28

K24

U

K26

M33

T

24

P

L33

T

23

P

P3 V1 U2 P1 M3 T1 N2 M1

1 2

61 10K_0201_5%

62 10K_0201_5%

66 10K_0201_5%

01 10K_0201_5%

2

R

01 10K_0201_5% 1

1 R

R

US

BP0- 45

US

BP0+ 45

US

BP1- 45

US

BP1+ 45

US

BP2- 46

US

BP2+ 46

US

BP4- 60

US

BP4+ 60

US

BP5- 50

US

BP5+ 50

US

BP8- 53

US

BP8+ 53

US

BP9- 45

US

BP9+ 45

US

BP10- 65

US

BP10+ 65

US

BP12- 50

US

BP12+ 50

US

BP13- 38

US

BP13+ 38

US

B3P1_SYS0_RXN 45

US

B3P1_SYS0_RXP 45

US

B3P1_SYS0_TXN 45

US

B3P1_SYS0_TXP 45

US

B3P2_SYS1_RXN 45

US

B3P2_SYS1_RXP 45

US

B3P2_SYS1_TXN 45

US

B3P2_SYS1_TXP 45

US

B3P5_DOCK_RXN 60

US

B3P5_DOCK_RXP 60

US

B3P5_DOCK_TXN 60

US

B3P5_DOCK_TXP 60

1 2

64 22.6_0201_1%

5

-

SB_PORT0_OC0 46

U

-

SB_PORT1_OC1 46

U

-

SB_PORT2_OC2 46

U

S

B_3B_EN 70

M

-

SB_PORT9_OC5 46

U

60 10K_0201_5%

2

R

B 2.0 Port Assignment

0 USB 3.0 System Port 0

1 USB 3.0 System Port 1

2 USB 2.0 System Port 2 (AOU)

3 Reserved

4 USB 3.0 Docking

5 NGFF WWAN Slot

6 Reserved

7 Reserved

8 Smart Card Slot

9 USB 2.0 System Port 3 (Debug)

10 Fingerprint Reader

11 Reserved

12 NGFF WLAN Slot

13 USB Camera

Table 16-4

USB 3.0 Port Assignment

1 USB 3.0 System Port 0

2 USB 3.0 System Port 1

3 (N/A)

4 (N/A)

5 USB 3.0 Docking

6 Reserved

A A

roject Name :

P

Size :

C

Date: Sheet :

5

4

3

2

Date: Sheet :

Document Number :

Title :

P

H(6/10) : PCIE/USBOAS-1 SP ASSESS

C

1

Rev :

Rev : 1

1

01

.

1

99Monday, August 12, 2013

6

o

f

5

D D

V

CC3B

12

R

8957

10K_0201_5%

-

PCIE1_MCC_CLK_100M51

P

CIE1_MCC_CLK_100M51

-

CLKREQ_PCIE1_MCC51

-

PCIE2_WLAN_CLK_100M50

P

CIE2_WLAN_CLK_100M50

-

CLKREQ_PCIE2_WLAN50

-

PCIE4_GBE_CLK_100M47

P

CIE4_GBE_CLK_100M47

-

CLKREQ_PCIE4_GBE47

C C

R

114 33_0201_5%

L

PCCLK_CRYPT_33M69

L

PCCLK_DEBUG_33M70

L

PCCLK_EC_33M61

B B

P

CICLK_FB_33M

114 33_0201_5%

R

220 33_0201_5%@R220 33_0201_5%@

R

193 33_0201_5%

R

356 33_0201_5%

1 2

V

CC3_SUS

R

162 10K_0201_5%

R

658 10K_0201_5%

R

660 10K_0201_5%

V

CC3_SUS

12

1 2

4

R

9206

10K_0201_5%

L

PCCLK_CRYPT_33M_R

L

PCCLK_DEBUG_33M_R

L

PCCLK_EC_33M_R

P

CICLK_FB_33M_R

U5C

Y43

C

LKOUT_PCIE _N_0

Y45

C

LKOUT_PCIE _P_0

AB1

P

CIECLKRQ0 #/GPIO73

AA44

C

LKOUT_PCIE _N_1

AA42

C

LKOUT_PCIE _P_1

AF1

P

CIECLKRQ1 #/GPIO18

AB43

C

LKOUT_PCIE _N_2

AB45

C

LKOUT_PCIE _P_2

AF3

P

CIECLKRQ2 #/GPIO20/S MI#

AD43

C

LKOUT_PCIE _N_3

AD45

C

LKOUT_PCIE _P_3

T3

P

CIECLKRQ3 #/GPIO25

AF43

C

LKOUT_PCIE _N_4

AF45

C

LKOUT_PCIE _P_4

V3

P

CIECLKRQ4 #/GPIO26

AE44

C

LKOUT_PCIE _N5

AE42

C

LKOUT_PCIE _P_5

AA2

P

CIECLKRQ5 #/GPIO44

AB40

C

LKOUT_PCIE _N_6

AB39

C

LKOUT_PCIE _P_6

AE4

P

CIECLKRQ6 #/GPIO45

AJ44

C

LKOUT_PCIE _N_7

AJ42

C

LKOUT_PCIE _P_7

Y3

P

CIECLKRQ7 #/GPIO46

A

H43

C

LKOUT_ITPXDP

AH45

C

LKOUT_ITPXDP _P

D44

C

LKOUT_33M HZ0

E44

C

LKOUT_33M HZ1

B42

C

LKOUT_33M HZ2

F41

C

LKOUT_33M HZ3

A40

C

LKOUT_33M HZ4

DH82QM87-SR17C-C2_FCBGA695

L

PT_PCH_M_EDS

CLOCK SIGNAL

2

OF 11

C

LKOUT_PEG _A

C

LKOUT_PEG _A_P

P

EGA_CLK RQ#/GPIO47

C

LKOUT_PEG _B

C

LKOUT_PEG _B_P

P

EGB_CLK RQ#/GPIO56

C

LKOUT_DMI

C

LKOUT_DMI_P

C

LKOUT_DP

C

LKOUT_DP_ P

C

LKOUT_DPNS

C

LKOUT_DPNS _P

C

LKIN_DMI

C

LKIN_DMI_ P

C

LKIN_GND

C

LKIN_GND_ P

C

LKIN_DOT96 N

C

LKIN_DOT96 P

C

LKIN_SATA

C

LKIN_SATA _P

R

EFCLK14I N

C

LKIN_33M HZLOOPBACK

X

TAL25_IN

X

TAL25_OUT

C

LKOUTFLEX 0/GPIO64

C

LKOUTFLEX 1/GPIO65

C

LKOUTFLEX 2/GPIO66

C

LKOUTFLEX 3/GPIO67

I

CLK_IREF

D

IFFCLK_BI ASREF

3

A

B35

AB36

AF6

Y

39

Y38

U4

A

F39

AF40

A

J40

AJ39

A

F35

AF36

A

1 2

Y24

R

556 10K_0201_5%

AW24

A

1 2

R24

R

557 10K_0201_5%

AT24

1 2

H33

R

558 10K_0201_5%

G33

B

1 2

E6

R

563 10K_0201_5%

BC6

1 2

F45

R

565 10K_0201_5%

D17

AM43 AL44

C40

F38

F36

F39

AM45

AD39

T

P19

AD38

T

P18

AN44

-

CLKREQ_PEG_PCH

1 2

R

27 10K_0201_5%

1 2

R

567 10K_0201_5%

1 2

R

569 10K_0201_5%

1 2

R

573 10K_0201_5%

1 2

R

574 10K_0201_5%

P

CICLK_FB_33M

1 2

R

8758 4.7K_0201_5%

1 2

R

8760 4.7K_0201_5%

-

PEG_CLK_100M 28

P

EG_CLK_100M 28

V

CC3_SUS

-

CPU_CLK_100M 4

C

PU_CLK_100M 4

-

EDP_SS_CLK_135M 4

E

DP_SS_CLK_135M 4

-

EDP_NS_CLK_135M 4

E

DP_NS_CLK_135M 4

1 2

R

8759 4.7K_0201_5%

1 2

R

8761 4.7K_0201_5%

1 2

R

609 7.5K_0201_1%

2

V

CC3_SUS

R

9193

UMA@

10K_0201_5%

1 2

V

CC3B

1 2

D

27 1SS400CMT2R_VMN2M

SWG@

1 2

D

22 1SS400CMT2R_VMN2M

SWG@

R

147

SWG@

100K_0201_5%

1 2

R

308

1M_0201_5%

1 2

R

133 0_0201_5%

V

CC1R5B

-

CLKREQ_PEG

-

DGFX_PWRGD

2

C

12P_0201_25V8J

1

-

CLKREQ_PEG 28

V

CC3_SUS

R

551

SWG@

10K_0201_5%

1 2

13

D

2

G

Q

98

LSK3541G1ET2L_VMT3

S

SWG@

Y

5

Crystal

4

G

ND

205

1

I

N

25MHZ_10PF_8Y25000010

D

GFX_PWRGD 15,83

3

O

UT

2

G

ND

2

C

206

12P_0201_25V8J

1

Table 17-1

D D D D

OCKID0 OCKID1 OCKID2 OCKID3

D

OCKID[3:0] 60

25MHz 10pF 30ppm

K

DS

DSX211G

TXC

8Y250

Epson

FA-128

1ZZCAA25000CC0C 8Y25000010 Q22FA1280021400

A A

Project Name :

Size :

C

Date: Sheet :of

5

4

3

2

Date: Sheet :of

Document Number :

T

itle :

Title :

P

CH(7/10) : CLOCKSOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

1

7 99Monday, August 12, 2013

5

C

C1R05B_PCHIO

V

4

3

2

1

V

C3B

C

1 2

0.01_0603_LE_1%

V

C1R5B

C

D D

1 2

0.01_0603_LE_1%

VC

C1R05B

1 2

0.01_0603_LE_1%

VC

C1R05B

1 2

0.01_0603_LE_1%

VC

C1R05B

1 2

0.01_0603_LE_1%

VC

C1R05AMT

1 2

0.01_0603_LE_1%

C C

V

C3B_PCH

C

R

697

8

V

C1R5B_PCH

C

692

R8

VC

C1R05B_PCHCORE

R8

700

VC

R8

C1R05B_PCHIO

693

VC

C1R05B_CLKGEN

704

VC

C1R05AMT_PCH

706

VC

C1R05AMT_PCH

2

C7

49

22U_0805_6.3V6M

1

VC

C1R05B_PCHCORE

2

C7

57

22U_0805_6.3V6M

1

C

1

10U_0603_6.3V6M

2

1

C3

59

10U_0603_6.3V6M

2

C7

1U_0402_6.3V6K

1

85

2

C

2

1

1U_0402_6.3V6K

1

2

C5

00

1U_0402_6.3V6K

1

2

C8

1U_0402_6.3V6K

1

2

C

97

3

1U_0402_6.3V6K

1

233

482

2

C

05

5

1U_0402_6.3V6K

1

U5G

AA24

VC

C

AA26

VC

C

AD20

VC

C

AD22

VC

C

AD24

VC

C

AD26

VC

C

AD28

VC

C

AE18

VC

C

AE20

VC

C

AE22

VC

C

AE24

VC

C

AE26

VC

C

AG18

VC

C

AG20

VC

C

AG22

VC

C

AG24

VC

C

Y26

VC

C

U14

DC

PSUSBYP

AA18

VC

CASW

U18

VC

CASW

U20

VC

CASW

U22

VC

CASW

U24

VC

CASW

V18

VC

CASW

V20

VC

CASW

V22

VC

CASW

V24

VC

CASW

Y18

VC

CASW

Y20

VC

CASW

Y22

VC

CASW

DH82QM87-SR17C-C2_FCBGA695

C

7

1

1U_0402_6.3V6K

1

2

C5

38

1U_0402_6.3V6K

1

2

C8

18

01

1U_0402_6.3V6K

1

R9

5.11_0201_1%

1 2

2

C8

1U_0402_6.3V6K

1

2

C

49

1

1U_0402_6.3V6K

1

2

C

1U_0402_6.3V6K

1

LP

T_PCH_M_EDS

C

C o

o re

re

PC

VCCMPHY

7

53

8

CRT DAC

HVCMOS

USB3

Ie/DMI

SATA

OF 11

VC

C1R05B_PCHIO

P45

VC

CADAC1_5

P43

VS

S

CADACBG3 _3

VC

CVRM

VC

C3_3_R30

VC

C3_3_R32

DC

PSUS1

VC

CSUS3_3

VC

CSUS3_3

DC

PSUS3

DC

PSUS3

VC

CVRM

VC

CVRM

VC

CVRM

VC

CVRM

VC

VC VC VC VC VC VC

M31

BB44

AN34

CIO

AN35

CIO

R30 R32

Y12

AJ30 AJ32

AJ26 AJ28 AK20

CIO

AK26 AK28

BE22

AK18

CIO

AN11

AK22

CIO

AM18

CIO

AM20

CIO

AM22

CIO

AP22

CIO

AR22

CIO

AT22

CIO

VC

FDI

VC

C3_SUS

FL

82

1 2

BLM18PG181SN1D_2P

VC

C3B_PCH

VC

2

C3

98

0.1U_0201_6.3V6K

1

C1R5B_PCH

2

C5

08

0.01U_0201_6.3V7K

1

2

C8

489

@

0.01U_0201_6.3V7K

1

2

C5

57

0.1U_0201_6.3V6K

1

2

C8

490

@

0.01U_0201_6.3V7K

1

FL

1 2

BLM18PG181SN1D_2P

2

C7

29

10U_0603_6.3V6M

1

VC

C1R5B_PCH

41

B B

A A

roject Name :

P

Size :

C

Date: Sheet :

5

4

3

2

Date: Sheet :

Document Number :

T

tle :

Title :

i

P

H(8/10) : POWEROAS-1 SP ASSESS

C

1

Rev :

Rev : 1

1

01

.

1

99Monday, August 12, 2013

8

o

f

5

4

3

2

1

V

CC3_SUS

D D

2

C

0.1U_0201_6.3V6K

1

V

CC1R5B_PCH

V

C C

V

CC1R05B_CLKGEN

B B

CC1R05B

1 2

R

9234 1_0603_5%

R

8705

1 2

0.01_0603_LE_1%

F

L63

1 2

4.7UH_MLF1608A4R7JT_5%

V

CC1R05B_USB

2

C

848

1U_0402_6.3V6K

1

2

C

8483

10U_0603_6.3V6M

1

V

CC1R05B_CLKGEN

2

C

1U_0402_6.3V6K

1

2

C

8323

0.1U_0201_6.3V6K

1

2

C

8324

1U_0402_6.3V6K

1

2

C

796

833

760

1U_0402_6.3V6K

1

833

1U_0402_6.3V6K

1

V

CC3B_PCH

V

CC3_SUS

AG30 AG32

AF34

AP45

AD34

AA30 AA32

AD35

AD36

AE30 AE32

R24 R26 R28 U26

M24

U35

L24

U30 V28 V30 Y30

Y35

Y32

M29

L29

L26

M26

U32 V32

U5H

V

CCSUS3_3

V

CCSUS3_3

V

CCSUS3_3

V

CCSUS3_3

V

SS

V

CCUSBPLL

V

CC3_3

V

CCIO

V

CCIO

V

CCIO

V

CCIO

D

CPSUS2

V

CCVRM

V

CC

V

CCCLK

V

CCCLK3_3

V

CCCLK3_3

V

CCCLK3_3

V

CCCLK3_3

V

CCCLK3_3

V

CCCLK3_3

V

CCCLK

V

CCCLK

V

CCCLK

V

CCCLK

V

CCCLK

V

CCCLK

V

CCCLK

V

CCCLK

V

CCCLK

DH82QM87-SR17C-C2_FCBGA695

2

C

1

L

PT_PCH_M_EDS

C

834

1U_0402_6.3V6K

G

PIO/LPC

U

U SB

SB

Azalia

RTC

CPU

I

I CC

CC

S

Thermal

8

OF 11

1

PI

821

C

849

0.1U_0201_6.3V6K

V V

V

CCDSW3_ 3

V

CCSUSHDA

V

V V

2

1

CCSUS3_3 CCSUS3_3

D

CPSST

V

CC3_3

V

CC3_3

V

CC3_3

V

CCIO

CCSUS3_3

V

CCRTC

D

CPRTC

D

CPRTC

_PROC_IO _PROC_IO

V

CCSPI

V

CCASW

V

CCASW

V

CCVRM

V

CC3_3

V

CC3_3

C

850

0.1U_0201_6.3V6K

R20 R22

A16

AA14

AE14 AF12 AG14

U36

A26

K8

A6

P14 P16

AJ12 AJ14

AD12

P18

V

CC

P20

V

CC

L17

R18

AW40

AK30

AK32

V

CC3B_PCH

2

1

V

CC3_SUSVCC3B_PCH

V

CC3LAN_PCH

2

C

553

0.1U_0201_6.3V6K

1

C

822

0.1U_0201_6.3V6K

V

CC1R05B_PCHCORE

2

C

851

0.1U_0201_6.3V6K

1

V

CC1R05B_PCHIO

2

C

852

0.1U_0201_6.3V6K

1

1 2

C

731 0.1U_0201_6.3V6K

1 2

C

795 0.1U_0201_6.3V6K

V

CC3LAN

V

CC1R5B_PCH

V

CC1R05AMT_PCH

2

C

8322

1U_0402_6.3V6K

1

R

705 0_0402_5%

2

C

620

0.1U_0201_6.3V6K

1

2

C

763

0.1U_0201_6.3V6K

1

2

C

8298

0.1U_0201_6.3V6K

1

1 2

2

1

2

1

C

832

0.1U_0201_6.3V6K

V

C

8299

0.1U_0201_6.3V6K

V

CC3M

R

TCVCC

2

C

380

1U_0402_6.3V6K

1

CCCPUIO_PCH

R

1901 0_0402_5%

2

C

8300

10U_0603_6.3V6M

1

1 2

V

CC1R05B_PCHCORE

A A

Project Name :

Size :

C

Date: Sheet :of

5

4

3

2

Date: Sheet :of

Document Number :

Title :

P

CH(9/10) : POWEROAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

1

9 99Monday, August 12, 2013

5

D D

L

T_PCH_M_EDS

P

U5J

AL34

VS

S

AL38

VS

S

AL8

VS

S

AM14

VS

S

AM24

VS

S

AM26

VS

S

AM28

VS

S

AM30

VS

S

AM32

VS

S

AM16

VS

S

AN36

VS

S

AN40

VS

S

AN42

VS

S

AN8

VS

S

AP13

VS

S

AP24

VS

S

AP31

VS

S

AP43

VS

S

AR2

VS

S

AK16

VS

S

AT10

VS

S

AT15

VS

S

AT17

VS

S

AT20

VS

S

AT26

VS

S

AT29

VS

S

AT36

VS

S

AT38

VS

S

D42

VS

S

AV13

VS

S

AV22

VS

S

AV24

VS

S

AV31

VS

C C

S

AV33

VS

S

BB25

VS

S

AV40

VS

S

AV6

VS

S

AW2

VS

S

F43

VS

S

AY10

VS

S

AY15

VS

S

AY20

VS

S

AY26

VS

S

AY29

VS

S

AY7

VS

S

B11

VS

S

B15

VS

S

DH82QM87-SR17C-C2_FCBGA695

10

OF 11

K39

VS

S

L2

VS

S

L44

VS

S

M17

VS

S

M22

VS

S

N12

VS

S

N35

VS

S

N39

VS

S

N6

VS

S

P22

VS

S

P24

VS

S

P26

VS

S

P28

VS

S

P30

VS

S

P32

VS

S

R12

VS

S

R14

VS

S

R16

VS

S

R2

VS

S

R34

VS

S

R38

VS

S

R44

VS

S

R8

VS

S

T43

VS

S

U10

VS

S

U16

VS

S

U28

VS

S

U34

VS

S

U38

VS

S

U42

VS

S

U6

VS

S

V14

VS

S

V16

VS

S

V26

VS

S

V43

VS

S

W2

VS

S

W44

VS

S

Y14

VS

S

Y16

VS

S

Y24

VS

S

Y28

VS

S

Y34

VS

S

Y36

VS

S

Y40

VS

S

Y8

VS

S

4

L

T_PCH_M_EDS

P

U5K

AA16

VS

S

AA20

VS

S

AA22

VS

S

AA28

VS

S

AA4

VS

S

AB12

VS

S

AB34

VS

S

AB38

VS

S

AB8

VS

S

AC2

VS

S

AC44

VS

S

AD14

VS

S

AD16

VS

S

AD18

VS

S

AD30

VS

S

AD32

VS

S

AD40

VS

S

AD6

VS

S

AD8

VS

S

AE16

VS

S

AE28

VS

S

AF38

VS

S

AF8

VS

S

AG16

VS

S

AG2

VS

S

AG26

VS

S

AG28

VS

S

AG44

VS

S

AJ16

VS

S

AJ18

VS

S

AJ20

VS

S

AJ22

VS

S

AJ24

VS

S

AJ34

VS

S

AJ38

VS

S

AJ6

VS

S

AJ8

VS

S

AK14

VS

S

AK24

VS

S

AK43

VS

S

AK45

VS

S

AL12

VS

S

AL2

VS

S

BC22

VS

S

BB42

VS

S

11

OF 11

D

H82QM87-SR17C-C2_FCBGA695

OF 11

3

B19

VS

S

B23

VS

S

B27

VS

S

B31

VS

S

B35

VS

S

B39

VS

S

B7

VS

S

BA40

VS

S

BD11

VS

S

BD15

VS

S

BD19

VS

S

AY36

VS

S

AT43

VS

S

BD31

VS

S

BD35

VS

S

BD39

VS

S

BD7

VS

S

D25

VS

S

AV7

VS

S

F15

VS

S

F20

VS

S

F29

VS

S

F33

VS

S

BC16

VS

S

D4

VS

S

G2

VS

S

G38

VS

S

G44

VS

S

G8

VS

S

H10

VS

S

H13

VS

S

H17

VS

S

H22

VS

S

H24

VS

S

H26

VS

S

H31

VS

S

H36

VS

S

H40

VS

S

H7

VS

S

K10

VS

S

K15

VS

S

K20

VS

S

K29

VS

S

K33

VS

S

BC28

VS

S

2

T

ST PAD FOR METS/APS

E

V

C3_SUS

C3M

C

JA

1

4

14

1

-X

DP_DBR13,21,4

-P

WRSWITCH60,64,70,71

-R

TCRST11,22

-P

CH_SLP_M13,71

-P

CH_SLP_S413,62,71

-P

CH_SLP_S513,71

-P

CH_SLP_S313,62,71,78

AC

_PRESENT13,71

3

13

1

2

12

1

11

1

0

10

9

8

7

6

5

4

3

2

1

ACES_50501-01441-001

CONN_NOASM@

TP11TP

1

PS1

11

16

GN

D2

15

GN

D1

B B

A A

roject Name :

P

Size :

C

Date: Sheet :

5

4

3

2

Date: Sheet :

Document Number :

T

tle :

Title :

i

P

H(10/10):GNDOAS-1 SP ASSESS

C

1

Rev :

Rev : 1

1

01

.

2

99Monday, August 12, 2013

0

o

f

5

D D

4

3

2

1

V

CC3_SUS

V

CC3B

V

CC1R05B

491

491 R

R

@

1 2

@

1 2

@

1 2

@

1 2

475 51_0201_5%

475 51_0201_5% R

R

1K_0201_5%

X

T

able 21-1

DP_TCK

X

DP_TMS

X

DP_TDI

-X

DP_TRST

X

DP_TDO

-

XDP_DBR

-

PLTRST_NEAR

B

PWRG

P

WR_DEBUG

C

PUPWRGD

-

XDP_PRDY

-X

DP_PREQ

R

588 1K_0201_5%

R

594 1K_0201_5%

X

DP_TCK4

X

DP_TMS4

X

DP_TDI4

-X

DP_TRST4

X

DP_TDO4

-X

DP_DBR13, 20,4

-P

LTRST_NEAR14,51,61,69,70,71

B

C C

PWRG13,62,70,72

P

WR_DEBUG7

C

PUPWRGD15,4

C

FG310

-X

DP_PRDY4

-X

DP_PREQ4

SIGNAL REF DES ENABLE DISABLE

TDO

B B

TRST#

DBRST#

RESET#

CPUPWRGD

R475

R471

R491

R588

R594

ASM

PWR_DEBUG R9176 ASM ASM

C8320 ASM NO ASM

150_0201_5%

1 2

9176

9176 R

R

1 2

NO ASM

ASM

NO ASM

V

CCCPUIO

R

471

51_0201_5%

2

C

8320

@

0.1U_0201_6.3V6K

1

28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

J

XDP1

G

ND

G

ND

2

6

2

5

2

4

2

3

2

1

2

0

1

9

1

8

1

7

1

6

1

5

1

4

1

3

1

2

1

0 9 8 7 6 5 4 3 2 1

ACES_51522-02601-001

CONN_NOASM@

@

1 2

515 210_0402_1%

509 210_0402_1%

530 210_0402_1%

R

P

CH_TCK11

P

CH_TMS11

P

CH_TDI11

P

CH_TDO11

C

PUCORE_PWRGD13,79

-R

SMRST13,71

CH_TCK

P

CH_TMS

P

CH_TDI

P

CH_TDO

-X

DP_DBR

C

PUCORE_PWRGD

-R

SMRST

R

511 1K_0402_5%@R511 1K_0402_5%@

R

514 1K_0402_5%@R514 1K_0402_5%@

1 2

R

@

1 2

946 100_0402_5%

945 100_0402_5%

943 100_0402_5%

R

Table 21-2

SIGNAL REF DES ENABLE DISABLE

TDO

TMS

TDI

TCK

CPUCORE_PWRGD

-RSMRST

R509 R943 100 NO ASM R530 220 NO ASM R946 100 NO ASM R515 220 R945

R541

R511

R514 ASM NO ASM

ASMJXDP1 NO ASM

V

CC3_SUS

CC1R05B

1 2

541 51_0201_5%R541 51_0201_5% R

220

100 NO ASM

51

ASM

ASM NO ASMJXDP2

J

XDP2

28

G

ND

27

G

ND

26

2

6

25

2

5

24

2

4

23

2

3

22

2

21

2

1

20

2

0

19

1

9

18

1

8

17

1

7

16

1

6

15

1

5

14

1

4

13

1

3

12

1

2

11

1

10

1

0

9

8

7

6

5

4

3

2

1

ACES_51522-02601-001

CONN_NOASM@

NO ASM

51

NO ASM

LOGIC

A A

5

4

3

2

LOGIC

Project Name :

Size :

C

Date: Sheet :of

Document Number :

Title :

X

DP CONNECTOROAS-1 SP ASSESS

2

1

2

Rev :

Rev : 1

1

.01

1 99Monday, August 12, 2013

5

D D

4

3

2

1

VC

C3SW

1 2

D3

12

R

B520CS-30GT2RA_VMN2-2

R4

1

K_0201_5%

C C

JR

TC1

1

2

DRAPH_WS32020-S0471-HF

CONN_ASM@

B B

1 2

RT

D6

D6 R

R

B520CS-30GT2RA_VMN2-2

R6

20 20K_0201_5%

R2

50 20K_0201_5%

CVCC

1 2

2

C2

87

1U_0402_6.3V6K

1

2

C4

59

1U_0402_6.3V6K

1

2

C2

85

1U_0402_6.3V6K

1

JC

@

SHORT PADS

1 2

JC

@

SHORT PADS

1 2

-RT

MOS1

-SR

MOS2

CRST

TCRST

-RT

CRST 11, 20

-SR

TCRST 11

A A

roject Name :

P

Size :

C

Date: Sheet :

5

4

3

2

Date: Sheet :

Document Number :

T

le :

Title :

it

R

C BATTERYOAS-1 SP ASSESS

T

1

Rev :

Rev : 1

1

01

.

2

99Monday, August 12, 2013

2

o

f

5

D D

S

PI_IO312

S

PI_CLK12

S

PI_MOSI_IO012

C C

Z

S

Z

S

ZZ5

PI_1ST@

ZZ5

PI_1ST@

W

inbond

X7601301003

BOM note: Virtual symbol for BOM control.

S S

Z

ZZ4

PI_IO3 PI_CLK PI_MOSI_IO0

M

acronix

X7601301004

R

8981 33_0201_5%

1 2

R

681 33_0201_5%

1 2

R

674 33_0201_5%

Layout note: Put on resistors R8981,R681,R674 R694,R8980 near U49.

S

PI_2ND@

4

V

CC3LAN

D

12

RB520CS-30GT2RA_VMN2-2

1 2

V

CC3LAN_SPI

1 2

703 3.3K_0201_5%R703 3.3K_0201_5%

12

S

PI_IO3_R

S

PI_CLK_R

S

PI_MOSI_IO0_R

R

U

49

Winbond@

49

Winbond@

8

V

CC

7

D

/

O(IO1)

HOLD(IO3)

6

/

C

WP(IO2)

LK

5

D

I(IO0)

W25Q32FVSSIQ_SO8

U

M

U

M

49

XIC@

49

XIC@

M

X25L3275EM2I-10G_SO8

BOM note: Virtual symbol for BOM control.

3

2

629

429

C

1

0.1U_0201_6.3V6K

1 2

706 3.3K_0201_5%R706 3.3K_0201_5%

1

/

CS

2 3 4

G

ND

R

S

PI_MISO_IO1_R

S

PI_IO2_R

12

R

694 33_0201_5%

1 2

R

8980 33_0201_5%

-S

PI_CS1

S

PI_MISO_IO1

S

PI_IO2

2

Table 23-1

-S

PI_CS1 12

S

PI_MISO_IO1 12

S

PI_IO2 12

SPI Configuration

S

ingle

U113 (CS0#)

Dual

U113 (CS0#)

U49 (CS1#)

Supplier

16MB Macronix Winbond (Numonyx)

8MB Macronix Winbond (Numonyx)

4MB Macronix Winbond (Numonyx)

1

P/N

MX25L12875FM2I-10G W25Q128FVSIQ

MX25L6475EM2I-10G W25Q64FVSSIQ

MX25L3275EM2I-10G W25Q32FVSSIQ

LOGIC

Design Note: MX25Lxxx73E may be mixed from SIT. Don't mix it from FVT.

V

CC3LAN_SPI

U

113

Winbond@

113

Winbond@

/

M

D

O(IO1)

WP(IO2)

XIC@

1

/

CS

2 3 4

G

ND

3

S

PI2_MISO_IO1_R

S

PI2_IO2_R

12

R

9260 33_0201_5%

1 2

R

9262 33_0201_5%

-S

PI_CS0

S

PI2_MISO_IO1

S

PI2_IO2

-S

PI_CS0 12

S

PI2_MISO_IO1 12

S

PI2_IO2 12

Project Name :

Size :

C

Date: Sheet :of

2

Date: Sheet :of

Document Number :

Title :

S

PI FLASHOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

2

3 99Monday, August 12, 2013

8

V

S

PI2_IO312

S

PI2_CLK12

S

B B

A A

5

PI2_MOSI_IO012

PI2_IO3

S

PI2_CLK

S

PI2_MOSI_IO0

Layout note: Put on resistors R9259,R9261,R9263 R9260,R9262 near U113.

12

R

9259 33_0201_5%

1 2

R

9261 33_0201_5%

1 2

R

9263 33_0201_5%

S

PI2_IO3_R

S

PI2_CLK_R

S

PI2_MOSI_IO0_R

4

CC

7

/

HOLD(IO3)

6

C

LK

5

D

I(IO0)

W25Q64FVSSIQ_SO8

U

113

M

X25L6475EM2I-10G_SO8

BOM note: Virtual symbol for BOM control.

5

4

3

2

1

D

R3_VREF_DQ_SA

A_DQ[63:0]5

M_

-M

A_DQS[7:0]5

DD

C3

1

_

M_

R3_VREF_DQ_SA

2

41

1

2

C

7

8

1U_0402_6.3V6K

1

V

C0R675B

C

A_DQS[7:0]5

M

A_A[15:0]5

_

2

C3

44

0.1U_0201_6.3V6K

1

M_

A_CKE05

M_

A_BS25

2

C

03

1

1U_0402_6.3V6K

1

M_

-M_

M_

-M_

M_

A_DDRCLK0_800M5

-M_

A_DDRCLK0_800M5

V

C3B

C

M_

-M_

2

C

00

1

1U_0402_6.3V6K

1

A_BS05

A_WE5 A_CAS5

A_CS15

VC

C0R675B

D D

2.2U_0402_6.3V6K

DD

R3_VREF_DQ_SB

2.2U_0402_6.3V6K

C C

B B

A A

2

C

11

4

10U_0603_6.3V6M

1

VC

2

C3

43

2.2U_0402_6.3V6K

C0R675B

2

C

66

4

10U_0603_6.3V6M

1

2

C3

47

0.1U_0201_6.3V6K

1

2

C

3

1U_0402_6.3V6K

1

D

A_DDRCLK0_800M

A_BS0

A_WE A_CAS

A_CS1

S

D ADDRESS: 50H

P

V

C1R35A

C

J

IMM1

D

1

V

EF_DQ

S1

R

3

V

A_DQ0

M_

A_DQ1

M_

A_DQ2

M_

A_DQ3

M_

A_DQ8

M_

A_DQ9

-M_

A_DQS1

M_

A_DQS1

M_

A_DQ10

M_

A_DQ11

M_

A_DQ16

M_

A_DQ17

-M_

A_DQS2

M_

A_DQS2

M_

A_DQ18

M_

A_DQ19

M_

A_DQ24

M_

A_DQ25

M_

A_DQ26

M_

A_DQ27

M_

A_CKE0

M_

A_BS2

M_

A_A12

M_

A_A9

M_

A_A8

M_

A_A5

M_

A_A3

M_

A_A1

M_

A_A10

M_

A_A13

M_

A_DQ32

M_

A_DQ33

-M_

A_DQS4

M_

A_DQS4

M_

A_DQ34

M_

A_DQ35

M

A_DQ40

_

M

A_DQ41

_

M

A_DQ42

_

M

A_DQ43

_

M

A_DQ48

_

M

A_DQ49

_

-M

A_DQS6

_

M

A_DQS6

_

M

A_DQ50

_

M

A_DQ51

_

M

A_DQ56

_

M

A_DQ57

_

M

A_DQ58

_

M

A_DQ59

_

5

DQ

7

DQ

9

VS

11

DM

13

VS

15

DQ

17

DQ

19

VS

21

DQ

23

DQ

25

VS

27

DQ

29

DQ

31

VS

33

DQ

35

DQ

37

VS

39

DQ

41

DQ

43

VS

45

DQ

47

DQ

49

VS

51

DQ

53

DQ

55

VS

57

DQ

59

DQ

61

VS

63

DM

65

VS

67

DQ

69

DQ

71

VS

73

CK

75

VD

77

NC

79

BA

81

VD

83

A1

8

5

A9

87

VD

8

9

A8

9

1

A5

93

VD

9

5

A3

9

7

A1

99

VD

101

CK

103

CK

105

VD

107

A1

109

BA

111

VD

113

WE

115

CA

117

VD

119

A1

121

S1

123

VD

125

NC

127

VS

129

DQ

131

DQ

133

VS

135

DQ

137

DQ

139

VS

141

DQ

143

D

145

V

147

D

149

D

151

V

153

D

155

V

157

D

159

D

161

V

163

D

165

D

167

V

169

D

171

D

173

V

175

D

177

D

179

V

181

D

183

D

185

V

187

D

189

V

191

D

193

D

195

V

197

S

199

V

201

S

203

V

205

G

FOX_AS0A626-U4S6-7H

FOX_AS0A626-U4S6-7H CONN_ASM@

CONN_ASM@

S

D

S2

S

S4

S5

S7

S9

S11

S13

S15

S18

S20

S22

S23

S25

E0 D1 1 2 D3 2/BC#

D5

D7

D9 0 0# D11 0/AP 0 D13

S# D15 3 # D17 TEST S27

S29

S32

Q

S34

S Q Q

S36

S M

S37

S Q Q

S39

S Q Q

S41

S Q Q

S44

S Q Q

S46

S Q Q

S48

S M

S49

S Q Q

S51

S

0

A

DSPD

D

1

A

T1

T

N

4

Q

0

5

DQ

1

S3

VS

DQ

S#0

DQ

0

S0

VS

S6

DQ

2

6

DQ

3

7

VS

S8

DQ

8

12

DQ

9

13

VS

S10

DM

S#1

1

RE

S1

SET#

VS

S12

DQ

10

14

DQ

11

15

VS

S14

DQ

16

20

DQ

17

21

VS

S16

DM

S#2

2

VS

S2

S17

DQ

22

DQ

18

23

VS

19

S19

DQ

28

DQ

24

29

VS

25

S21

DQ

S#3

DQ

3

S3

VS

S24

DQ

26

30

DQ

27

31

VS

S26

CK

E1

VD

D2

A1

5

A1

4

VD

D4

A1

1

A7

VD

D6 A6 A4

VD

D8 A2 A0

VD

D10

CK

1

CK

1#

VD

D12

BA

1

RA

S#

VD

D14 S0

#

OD

T0

VD

D16

OD

T1

NC

2

VD

D18

VR

EF_CA VS

S28

DQ

32

36

DQ

33

37

VS

S30

DM

S#4

4

VS

S4

S31

DQ

38

DQ

34

39

V

35

S33

S D

44

Q

D

40

45

Q

V

41

S35

S

D

S#5

Q D

5

S5

Q

V

S38

S D

42

46

Q

D

43

47

Q

V

S40

S D

48

52

Q

D

49

53

Q

V

S42

S

D

S#6

6

M

V

S6

S43

S D

54

Q

D

50

55

Q

V

51

S45

S D

60

Q

D

56

61

Q

V

57

S47

S

D

S#7

Q D

7

S7

Q

V

S50

S D

58

62

Q

D

59

63

Q

V

S52

S

E

ENT#

V

S

A

D

S

L

C

V

T2

T

G

D1

D2

N

V

C1R35A

C

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 8

6 88 9

0 9

2 94 9

6 9

8 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

S

B_DATA_3B

M

S

B_CLK_3B

M

M M_

-M_ M_

M_ M_

-DR

M_ M_

-M_ M_

M_ M_

M_

M_ M_

M_

-M_

M_

-M_

-M_ M_

M_

A_DQ4

_

A_DQ5

A_DQS0

A_DQ6 A_DQ7

A_DQ12 A_DQ13

AMRST

A_DQ14 A_DQ15

A_DQ20 A_DQ21

A_DQ22 A_DQ23

A_DQ28 A_DQ29

A_DQS3

A_DQ30 A_DQ31

A_CKE1

A_A15 A_A14

A_A11 A_A7

A_A6 A_A4

A_A2 A_A0

A_DDRCLK1_800M

A_BS1

A_RAS

A_CS0

A_ODT0

A_ODT1

M_

A_DQ36

M_

A_DQ37

M_

A_DQ38

M_

A_DQ39

M

A_DQ44

_

M

A_DQ45

_

-M

A_DQS5

_

M

A_DQS5

_

M

A_DQ46

_

M

A_DQ47

_

M

A_DQ52

_

M

A_DQ53

_

M

A_DQ54

_

M

A_DQ55

_

M

A_DQ60

_

M

A_DQ61

_

-M

A_DQS7

_

M

A_DQS7

_

M

A_DQ62

_

M

A_DQ63

_

DD

R3_VREF_CA

S

B_DATA_3B 26,65,70

M

S

B_CLK_3B 26, 65,70

M

-DR

AMRST 26, 4

M_

A_CKE1 5

M_

A_DDRCLK1_800M 5

-M_

A_DDRCLK1_800M 5

M_

A_BS1 5

-M_

A_RAS 5

-M_

A_CS0 5

M_

A_ODT0 5

M_

A_ODT1 5

V

C1R35A

C

2

C

28

4

1U_0402_6.3V6K

1

PL

ACE 1UF NEAR VCC1R35A PIN.

VC

C1R35A

2

C6

6

0.1U_0201_6.3V6K

1

VC

C1R35A

PLACE NEAR DIMM Slot

V

C1R35A

C

V

C0R675B

C

R8

R8 1K_0201_1%

1K_0201_1%

1 2

R8

R8 1K_0201_1%

1K_0201_1%

1 2

R

R 1K_0201_1%

1K_0201_1%

1 2

R

R 1K_0201_1%

1K_0201_1%

1 2

908

909

910

8

911

8

2

C

42

2

1U_0402_6.3V6K

1

2

C4

30

0.1U_0201_6.3V6K

1

D

R3_VREF_DQ_SA_M35

D

2

C

34

5

1U_0402_6.3V6K

1

VC

C1R35A

2

C4

25

1U_0402_6.3V6K

1

R3_VREF_DQ_SB_M35

2

C

37

5

1U_0402_6.3V6K

1

2

C4

26

1U_0402_6.3V6K

1

VC

1 2

R5

008 0_0201_5%

R

2

C

447

8

0.022U_0201_6.3V6K

1

R

180

9

24.9_0201_1%

1 2

R

011 0_0201_5%

5

R

2

C

448

8

0.022U_0201_6.3V6K

1

R

181

9

24.9_0201_1%

1 2

2

C

40

5

1U_0402_6.3V6K

1

2

C4

27

1U_0402_6.3V6K

1

C3B

2

C3

42

2.2U_0402_6.3V6K

1

Layout note: trace width / spacing = 20/20mils

1 2

009 2_0201_1%

5

Layout note: trace width / spacing = 20/20mils

1 2

010 2_0201_1%

5

2

C9

08

0.1U_0201_6.3V6K

1

DD

R3_VREF_DQ_SA

D

R3_VREF_DQ_SB

D

2

C

83

5

1U_0402_6.3V6K

1

roject Name :

P

Size :

C

Date: Sheet :

5

4

3

2

Date: Sheet :

Document Number :

T

le :

Title :

it

D

R3L SO DIMM CHANNEL-AOAS-1 SP ASSESS

D

1

Rev :

Rev : 1

1

01

.

2

99Monday, August 12, 2013

4

o

f

5

D D

C C

4

3

2

1

BLANK

B B

A A

Project Name :

Size :

C

Date: Sheet :of

5

4

3

2

Date: Sheet :of

Document Number :

T

itle :

Title :

B

LANKOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

2

5 99Monday, August 12, 2013

5

4

3

2

1

M M_

M_ M_

-M_ M_

M_ M_

-M_ M_

M_ M_

M_

M_ M_

M_

M_ M_

-M_ M_

M_ M_

M M

-M M

M M

B_DQ0

_

B_DQ1

B_DQ2 B_DQ3

B_DQ8 B_DQ9

B_DQS1

B_DQ10 B_DQ11

B_DQ16 B_DQ17

B_DQS2

B_DQ18 B_DQ19

B_DQ24 B_DQ25

B_DQ26 B_DQ27

B_CKE0

B_BS2

B_A12 B_A9

B_A8 B_A5

B_A3 B_A1

B_A10

B_A13

B_DQ32 B_DQ33

B_DQS4

B_DQ34 B_DQ35

B_DQ40 B_DQ41

B_DQ42

_

B_DQ43

_

B_DQ48

_

B_DQ49

_

B_DQS6

_

B_DQ50

_

B_DQ51

_

B_DQ56

_

B_DQ57

_

B_DQ58

_

B_DQ59

_

B_DQS1

B_DQS2

B_DQS4

B_DQS6

V

C1R35A

C

J

IMM2

D

1

EF-DQ

S1

VR V

S2

S

D

0

Q

1

DQ

S4

VS

DQ

DM

0

VS

S5

DQ

2

DQ

3

VS

S7

DQ

8

DQ

9

VS

S9

DQ

S1#

RE

DQ

S1

VS

S11

DQ

10

DQ

11

VS

S13

DQ

16

DQ

17

VS

S15

DQ

S2#

DQ

VS

S2

VS

S18

DQ

18

DQ

VS

19

VS

S20

DQ

24

DQ

VS

25

VS

DQ

S22

DM

3

VS

S23

DQ

26

DQ

27

VS

S25

CK

E0

VD

D1

NC

1

BA

2

VD

D3

A1

2/BC# A9 VD

D5 A8 A5 VD

D7 A3 A1 VD

VD

D9 CK

0 CK

0# VD

VD

D11 A1

0/AP

BA

0 VD

VD

D13 WE

#

CA

S# VD

VD

D15 A1

3

S1

#

VD

D17 TE

VR

ST

EF-CA

VS

S27 DQ

32 DQ

33 VS

VS

S29 DQ

S4# DQ

VS

S4 VS

S32 DQ

34 DQ

VS

35 VS

S34 DQ

40 D

V

41

Q

V

D

S36

S

D

5

M

V

S37

S

D

42

Q

D

43

Q

V

S39

S

D

48

Q

D

49

Q

V

S41

S

D

S6#

Q

D

V

S6

Q

V

S44

S

D

50

Q

D

V

51

Q

V

S46

S

D

56

Q

D

V

57

Q

V

D

S48

S

D

7

M

V

S49

S

D

58

Q

D

59

Q

V

S51

S

E

0

A

V

D-SPD

D

S

1

A

V

T1

T

G

D1

N

3

C

FOX_AS0A626-H8SN-7H

CONN_ASM@

VS

D

4

Q

D

5

Q

S3

VS

S0#

DQ

S0

VS

S6

DQ

6

DQ

7

VS

S8

DQ

12

DQ

13

S10

DM

1

SET#

S12

DQ

14

DQ

15

S14

DQ

20

DQ

21

S16

DM

2

S17

DQ

22

DQ

23

S19

DQ

28

DQ

29 S21 S3#

DQ

S3 S24

DQ

30

DQ

31 S26

CK

E1

VD

D2 A1

5

A1

4

VD

D4 A1

1

A7

VD

D6

A6

A4

VD

D8

A2

A0 D10

CK

1

CK

1# D12 BA

1

RA

S# D14 S0

#

OD

T0 D16

OD

T1

NC

2

D18

S28

DQ

36

DQ

37 S30

DM

4

S31

DQ

38

DQ

39 S33

DQ

44

DQ

45 S35

S

S5#

Q D

S5

Q

S38

S

D

46

Q

D

47

Q S40

S

D

52

Q

D

53

Q S42

S

D

6

M

S43

S

D

54

Q

D

55

Q S45

S

D

60

Q

D

61

Q S47

S

S7#

Q D

S7

Q

S50

S

D

62

Q

D

63

Q S52

S ENT#

S

A

D

S

L

C

V

T2

T

D2

N

4

C

3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71

73 75 77 79 81 83 8

5 87 8

9 9

1 93 9

5 9

7 99

101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 205

207

D

R3_VREF_DQ_SB

B_DDRCLK0_800M

B_BS0

B_WE B_CAS

B_CS1

D

B_DQ[63:0]6

M_

B_DQS[7:0]6

DD

R3_VREF_CA

C

08

1

1U_0402_6.3V6K

-M_

M

B_DQS[7:0]6

_

B_A[15:0]6

M_

2

C4

00

2.2U_0402_6.3V6K

1

2

C

89

1

1U_0402_6.3V6K

1

V

C0R675B

C

2

C5

55

0.1U_0201_6.3V6K

1

Place near Slot-B(J30) pin126

M_

B_DDRCLK0_800M6

-M_

B_DDRCLK0_800M6

M_

-M_

2

C

13

2

1U_0402_6.3V6K

1

V

C3B

C

R

1

10K_0201_5%

1 2

M_

B_CKE06

M_

B_BS26

M_

-M_

2

C

14

2

1U_0402_6.3V6K

1

M_

-M_

B_BS06

B_WE6 B_CAS6

B_CS16

VC

C0R675B

87

D D

DD

R3_VREF_CA

2

C4

2.2U_0402_6.3V6K

C C

B B

1

2

C

82

6

10U_0603_6.3V6M

1

2

C5

03

VC

C0R675B

2

1

56

0.1U_0201_6.3V6K

1

Pl

ace near Slot-A(J21)

pin126

C

04

1

10U_0603_6.3V6M

2

1

SPD ADDRESS: 51H

A A

V

C1R35A

C

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 8

6 88 9

0 9

2 94 9

6 9

8 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206

208

S

B_DATA_3B

M

S

B_CLK_3B

M

M M

-M_ M_

M_ M_

-DR

M_ M_

-M_ M_

M_ M_

M_

M_ M_

M_

-M_

M_

-M_

-M_ M_

M_

B_DQ4

_

B_DQ5

_

B_DQS0

B_DQ6 B_DQ7

B_DQ12 B_DQ13

AMRST

B_DQ14 B_DQ15

B_DQ20 B_DQ21

B_DQ22 B_DQ23

B_DQ28 B_DQ29

B_DQS3

B_DQ30 B_DQ31

B_CKE1

B_A15 B_A14

B_A11 B_A7

B_A6 B_A4

B_A2 B_A0

B_DDRCLK1_800M

B_BS1

B_RAS

B_CS0

B_ODT0

B_ODT1

M_

B_DQ36

M_

B_DQ37

M_

B_DQ38

M_

B_DQ39

M_

B_DQ44

M_

B_DQ45

-M

B_DQS5

_

M

B_DQS5

_

M

B_DQ46

_

M

B_DQ47

_

M

B_DQ52

_

M

B_DQ53

_

M

B_DQ54

_

M

B_DQ55

_

M

B_DQ60

_

M

B_DQ61

_

-M

B_DQS7

_

M

B_DQS7

_

M

B_DQ62

_

M

B_DQ63

_

DD

R3_VREF_CA

S

B_DATA_3B 24,65,70

M

S

B_CLK_3B 24,65,70

M

-DR

AMRST 24, 4

M_

B_CKE1 6

M_

B_DDRCLK1_800M 6

-M_

B_DDRCLK1_800M 6

M_

B_BS1 6

-M_

B_RAS 6

-M_

B_CS0 6

M_

B_ODT0 6

M_

B_ODT1 6

V

C0R675B

C

V

C1R35A

C

2

C

80

6

1U_0402_6.3V6K

1

PL

ACE 1UF NEAR VCC1R35A PIN.

2

C

7

9

0.1U_0201_6.3V6K

1

C1R35A

R

183

9

1K_0201_1%

1 2

R

185

9

1K_0201_1%

1 2

D

R3_VREF_CA_M35

D

VC

1

C1R35A

V

C

29

1

2

C

10

4

0.1U_0201_6.3V6K

1

2

C

28

1

1U_0402_6.3V6K

1

VC

C1R35A

2

C1

1U_0402_6.3V6K

1

2

C

80

1

1U_0402_6.3V6K

1

2

C1

59

60

1U_0402_6.3V6K

1

VC

C3B

2

C

10

9

2.2U_0402_6.3V6K

1

1 2

R

184 0_0201_5%

9

1 2

R

186 2_0201_1%

9

2

C

449

8

0.022U_0201_6.3V6K

1

R

187

9

24.9_0201_1%

1 2

2

1

Layout note: trace width / spacing = 20/20mils

C

81

1

1U_0402_6.3V6K

2

C5

8

1U_0402_6.3V6K

1

2

C

9

0.1U_0201_6.3V6K

1

D

C

5

1U_0402_6.3V6K

1

44

R3_VREF_CA

7

roject Name :

P

Size :

C

Date: Sheet :

5

4

3

2

Date: Sheet :

Document Number :

T

le :

Title :

it

D

R3L SO DIMM CHANNEL-BOAS-1 SP ASSESS

D

1

Rev :

Rev : 1

1

01

.

2

99Monday, August 12, 2013

6

o

f

5

D D

V

CC1R35A

V

CC0R675B

@

2

C

455

10U_0603_6.3V6M

C C

10U_0603_6.3V6M

1

@

2

C

463

10U_0603_6.3V6M

1

V

CC1R35A

2

C

451

10U_0603_6.3V6M

1

2

C

479

10U_0603_6.3V6M

1

4

2

C

462

10U_0603_6.3V6M

1

2

C

481

10U_0603_6.3V6M

1

2

C

477

10U_0603_6.3V6M

1

2

C

485

10U_0603_6.3V6M

1

2

C

480

10U_0603_6.3V6M

1

2

C

489

10U_0603_6.3V6M

1

2

C

484

10U_0603_6.3V6M

1

2

C

497

10U_0603_6.3V6M

1

2

C

486

10U_0603_6.3V6M

1

2

C

503

10U_0603_6.3V6M

1

3

2

C

490

10U_0603_6.3V6M

1

2

C

517

10U_0603_6.3V6M

1

2

C

498

10U_0603_6.3V6M

1

2

C

524

10U_0603_6.3V6M

1

2

C

509

10U_0603_6.3V6M

1

2

C

518

10U_0603_6.3V6M

1

D

esign note:

RF solution.

2

C

8461

SWG@

1000P_0402_25V7-K

1

Design note: RF solution.

2

C

8463

SWG@

1000P_0402_25V7-K

1

2

C

8460

47P_0402_25V

1

2

C

8462

47P_0402_25V

1

2

C

U

C

U

8461

MA@

8461

MA@

2

200P_0402_25V

BOM note: Virtual symbol for BOM control.

C

U

C

U

8463

MA@

8463

MA@

2

200P_0402_25V

BOM note: Virtual symbol for BOM control.

1

B B

A A

Project Name :

Size :

C

Date: Sheet :of

5

4

3

2

Date: Sheet :of

Document Number :

T

itle :

Title :

D

DR3L DECOUPLINGOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

2

7 99Monday, August 12, 2013

5

4

3

2

1

1820mA

V

C1R05VIDEO

040

079

6

1

C

SWG@

22U_0805_6.3V6M

2

150mA

V

C1R05VIDEO_PLL

C

036

6

1

C6

041

SWG@

22U_0805_6.3V6M

2

N

AR BALLS UNDER GPU

E

C3VIDEO

D D

PE

G_RXP[7:0]3

PE

G_RXN[7:0]3

PE

G_TXP[7:0]3

PE

G_TXN[7:0]3

C C

B B

A A

-GP

U_RST71

-CL

KREQ_PEG17

PE

G_CLK_100M17

-PE

G_CLK_100M17

1 2

PE

G_RXP0

C6

042 0.22U_0201_6.3V6K SWG@

PE

G_RXN0

PE

G_TXP0

PE

G_TXN0

1 2

PE

G_RXP1

C6

044 0.22U_0201_6.3V6K SWG@

PE

G_RXN1

PE

G_TXP1

PE

G_TXN1

1 2

PE

G_RXP2

C6

046 0.22U_0201_6.3V6K SWG@

PE

G_RXN2

PE

G_TXP2

PE

G_TXN2

1 2

PE

G_RXP3

C6

050 0.22U_0201_6.3V6K SWG@

PE

G_RXN3

PE

G_TXP3

PE

G_TXN3

1 2

PE

G_RXP4

C6

052 0.22U_0201_6.3V6K SWG@

PE

G_RXN4

PE

G_TXP4

PE

G_TXN4

1 2

PE

G_RXP5

C6

054 0.22U_0201_6.3V6K SWG@

PE

G_RXN5

PE

G_TXP5

PE

G_TXN5

1 2

PE

G_RXP6

C6

059 0.22U_0201_6.3V6K SWG@

PE

G_RXN6

PE

G_TXP6

PE

G_TXN6

1 2

PE

G_RXP7

C6

063 0.22U_0201_6.3V6K SWG@

PE

G_RXN7

PE

G_TXP7

PE

G_TXN7

VC

R

541

8

SWG@

10K_0201_5%

1 2

C6

043 0.22U_0201_6.3V6K

SWG@

1 2

C6

045 0.22U_0201_6.3V6K

SWG@

1 2

C6

049 0.22U_0201_6.3V6K

SWG@

1 2

C6

051 0.22U_0201_6.3V6K

SWG@

1 2

C6

053 0.22U_0201_6.3V6K

SWG@

1 2

C6

055 0.22U_0201_6.3V6K

SWG@

1 2

C6

056 0.22U_0201_6.3V6K

SWG@

1 2

C6

065 0.22U_0201_6.3V6K

SWG@

PE

G_RXP0_C

PE

G_RXN0_C

PE

G_RXP1_C

PE

G_RXN1_C

PE

G_RXP2_C

PE

G_RXN2_C

PE

G_RXP3_C

PE

G_RXN3_C

PE

G_RXP4_C

PE

G_RXN4_C

PE

G_RXP5_C

PE

G_RXN5_C

PE

G_RXP6_C

PE

G_RXN6_C

PE

G_RXP7_C

PE

G_RXN7_C

AB

6

AC

7

AC

6

AE

8

AD

8

AC

9

AB

9

AG

6

AG

7

AB

10

AC

10

AF

7

AE

7

AD

11

AC

11

AE

9

AF

9

AC

12

AB

12

AG

9

AG

10

AB

13

AC

13

AF

10

AE

10

AD

14

AC

14

AE

12

AF

12

AC

15

AB

15

AG

12

AG

13

AB

16

AC

16

AF

13

AE

13

AD

17

AC

17

AE

15

AF

15

AC

18

AB

18

AG

15

AG

16

A

19

B

A

19

C

A

16

F

A

16

E

A

20

D

A

20

C

A

18

E

A

18

F

A

21

C

A

21

B

A

18

G

A

19

G

A

23

D

A

23

E

A

19

F

A

19

E

A

24

F

A

24

E

A

21

E

A

21

F

A

24

G

A

25

G

A

21

G

A

22

G

U

7A SW G@

4

14 PCI_EXPRESS

1/

GK

PE

X_WAKE

NC

PE

X_RST

PE

X_CLKREQ

PE

X_REFCLK

PE

X_REFCLK

PE

X_TX0

PE

X_TX0

PE

X_RX0

PE

X_RX0

PE

X_TX1

PE

X_TX1

PE

X_RX1

PE

X_RX1

PE

X_TX2

PE

X_TX2

PE

X_RX2

PE

X_RX2

PE

X_TX3

PE

X_TX3

PE

X_RX3

PE

X_RX3

PE

X_TX4

PE

X_TX4

PE

X_RX4

PE

X_RX4

PE

X_TX5

PE

X_TX5

PE

X_RX5

PE

X_RX5

PE

X_TX6

PE

X_TX6

PE

X_RX6

PE

X_RX6

PE

X_TX7

PE

X_TX7

PE

X_RX7

PE

X_RX7

PE

X_TX8

PE

X_TX8

PE

X_RX8

PE

X_RX8

PE

X_TX9

PE

X_TX9

PE

X_RX9

PE

X_RX9

P

X_TX10

E

P

X_TX10

E

P

X_RX10

E

P

X_RX10

E

P

X_TX11

E

P

X_TX11

E

P

X_RX11

E

P

X_RX11

E

P

X_TX12

E

P

X_TX12

E

P

X_RX12

E

P

X_RX12

E

P

X_TX13

E

P

X_TX13

E

P

X_RX13

E

P

X_RX13

E

P

X_TX14

E

P

X_TX14

E

P

X_RX14

E

P

X_RX14

E

P

X_TX15

E

P

X_TX15

E

P

X_RX15

E

P

X_RX15

E

G

G GK208

GK208

N14M-GS-S-A1_BGA595

208/GF117/GF119

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC N

N

C

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

F117GF119

PE PE PE PE PE PE

PE

X_IOVDDQ

PE

X_IOVDDQ

PE

X_IOVDDQ

PE

X_IOVDDQ

PE

X_IOVDDQ

PE

X_IOVDDQ

PE

X_IOVDDQ

PE

X_IOVDDQ

PE

X_IOVDDQ

PE

X_IOVDDQ

PE

X_IOVDDQ

PE

X_IOVDDQ

PE

X_IOVDDQ

PE

X_IOVDDQ

PE

X_PLL_HVDD

PE

X_PLL_HVDD

PE

X_SVDD_3V3

VD

GN

P

X_TSTCLK_OUT

E

P

X_TSTCLK_OUT

E

P

X_PLLVDD

E

P

X_PLLVDD

E

T

E

P

E

X_IOVDD X_IOVDD X_IOVDD X_IOVDD X_IOVDD X_IOVDD

D_SENSE

STMODE

X_TERMP

1

C

292

6

SWG@

1U_0402_6.3VAK

2

AA

22

AB

23

AC

24

AD

25

AE

26

AE

27

AA

10

AA

12

AA

13

AA

16

AA

18

AA

19

AA

20

AA

21

AB

22

AC

23

AD

24

AE

25

AF

26

AF

27

AA

8

AA

9

AB

8

NEAR BALLS UNDER GPU

1

C6

293

SWG@

1U_0402_6.3VAK

2

1 2

R8

544 0_0201_5%

F2

F1

R

545

8

@

0_0201_5%

1 2

@

A

22

F

A

22

E

A

14

A

15

A

9

D

1 2

R

540 200_0201_1%

8

2

C

6

SWG@

1U_0402_6.3VAK

1

2

C

031

SWG@

4.7U_0603_6.3VAK

1

C6

030

SWG@

1U_0402_6.3VAK

2

C6

047

SWG@

0.1U_0201_6.3V6K

VC

CGFXCORE_D

@

GF

XCORE_VDD_SENSE_D 83

GF

XCORE_GND_SENSE_D 83

032

6

2

C6

037

SWG@

4.7U_0603_6.3VAK

1

C6

048

SWG@

4.7U_0402_6.3V6M

2

1

C

SWG@

10U_0603_6.3V6M

2

210mA

VC

C3VIDEO

U

A

25

F

R

548

549

8

SWG@

2.49K_0201_1%

1 2

549

8

SWG@

10K_0201_5%

1 2

033

6

1

C6

038

SWG@

10U_0603_6.3V6M

2

1

C6

294

SWG@

4.7U_0402_6.3V6M

2

V

C1R05VIDEO_PEX_PLLVDD

C

2

C

077

6

SWG@

0.1U_0402_25V7K

1

DER GPU

N

1

C

SWG@

10U_0603_6.3V6M

2

034

6

1

C6

039

SWG@

10U_0603_6.3V6M

2

1

C

078

6

SWG@

1U_0402_6.3V6K

2

1

C

035

6

SWG@

22U_0805_6.3V6M

2

1

C6

SWG@

22U_0805_6.3V6M

2

1

C

SWG@

4.7U_0402_6.3V6M

2

Design note: RF solution.

2

C

465

8

SWG@

1000P_0402_25V7-K

1

2

C

464

8

SWG@

47P_0402_25V

1

roject Name :

P

Size :

C

Date: Sheet :

5

4

3

2

Date: Sheet :

Document Number :

T

le :

Title :

it

N

4M-GS(1/6) : PEG I/FOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

01

.

2

99Monday, August 12, 2013

8

o

f

5

U

47G SWG@

4

/14 IFPAB

GF119/GK208

A6

A

I

FPAB_RSET

V

D D

C C

7

FPAB_PLLVDD

I

W

7

I

FPAB_PLLVDD

GF119/GK208

W

6

I

FPA_IOVDD

Y

6

I

FPB_IOVDD

IFPAB

N14M-GS-S-A1_BGA595

GF117

4

GF117

GF119/GK208

NC

NC NC

GF117

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

FPA_TXC

I I

FPA_TXC

I

FPA_TXD0 FPA_TXD0

I

FPA_TXD1

I

FPA_TXD1

FPA_TXD2

I I

FPA_TXD2

I

FPA_TXD3

I

FPA_TXD3

I

FPB_TXC

I

FPB_TXC

I

FPB_TXD4

I

FPB_TXD4

I

FPB_TXD5

I

FPB_TXD5

I

FPB_TXD6

I

FPB_TXD6

I

FPB_TXD7

I

FPB_TXD7

G

PIO14

A

C4

A

C3

Y

3

Y

4

A

A2

A

A3

A

A1

A

B1

A

A5

A

A4

A

B4

A

B5

A

B2

A

B3

A

D2

A

D3

A

D1

A

E1

A

D5

A

D4

B

3

U

47H SWG@

5/14 IFPC

GF119/GK208

T

6

I

FPC_RSET

7

M

I

FPC_PLLVDD

N

7

I

FPC_PLLVDD

P

6

I

FPC_IOVDD

N14M-GS-S-A1_BGA595

U

47I SWG@

6/14 IFPD

GF119/GK208

U

6

I

FPD_RSET

T

7

I

FPD_PLLVDD

R

7

I

FPD_PLLVDD

R

6

I

FPD_IOVDD

GF119/GK208

N14M-GS-S-A1_BGA595

IFPD

GF117

NC

NC NC

NC NC NC

NC

GF117

NC

G

F117

2

IFPC

GF119/GK208

G

F117

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

GF117

DVI/HDMI

I2CW_SDA

I2CW_SDA I2CW_SCL

I2CW_SCL

TXD0

TXD0 TXD0

TXD0

TXD1

TXD1 TXD1

TXD1

TXD2

TXD2 TXD2

TXD2

DVI/HDMI

I2CX_SDA

NC

NC NC

I2CX_SCL

NC

I2CX_SCL

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

TXC

TXC TXC

TXC

GF119/GK208

TXC

TXC TXC

TXC

TXD0

TXD0 TXD0

TXD0

TXD1

TXD1 TXD1

TXD1

TXD2

TXD2 TXD2

TXD2

DP

I

FPC_AUX

I

FPC_AUX

FPC_L3

I I

FPC_L3

FPC_L2

I

FPC_L2

I

FPC_L1

I

FPC_L1

I

FPC_L0

I

FPC_L0

G

DP

I

FPD_AUX

I

FPD_AUX

I

FPD_L3

I

FPD_L3

I

FPD_L2

I

FPD_L2

I

FPD_L1

I

FPD_L1

I

FPD_L0

I

FPD_L0

G

PIO15

PIO17

5

N N

4

N

3

N

2

3

R R

2

R

1

T

1

T

3

T

2

C

3

P

4

P

3

R

5

R

4

T

5

T

4

U

4

U

3

V

4

V

3

D

4

1

U

47J SWG@

7/14 IFPEF

GF119

J

7

I

FPEF_PLLVDD

K

7

I

FPEF_PLLVDD

B B

A A

5

4

3

K

6

I

FPEF_RSET

GF119

H

6

I

FPE_IOVDD

J

6

I

FPF_IOVDD

N14M-GS-S-A1_BGA595

IFPE

IFPF

G

G GK208

GK208

GF117

GF117 GK208

GK208

F117

GF117

NC

NC NC

NC

NC NC

NC

NC TXD0

NC TXD0 NC

NC

NC NC

NC

GF117

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

GF119/GK208

DVI-DL

I2CY_SDA

I2CY_SDA I2CY_SCL

I2CY_SCL

TXC

TXD0

TXD1

TXD1 TXD1

TXD1

TXD2

TXD2 TXD2

TXD2

HPD_E

DVI-DL DP

I2CY_SDA

I2CY_SDA I2CY_SCL

I2CY_SCL

TXC

TXC TXCTXC

TXCTXC

TXD0

TXD0 TXD0

TXD0

TXD1NC

TXD1NC TXD1

TXD1

TXD2

TXD2 TXD2

TXD2

NC FOR GK208

HPD_E

GF119/GK208

DVI-SL/HDMI

I2CZ_SDA

I2CZ_SDA I2CZ_SCL

I2CZ_SCL

TXC

TXC TXC

TXC

TXD0

TXD3

TXD0

TXD3

TXD0

TXD3

TXD0

TXD3

TXD4

TXD1

TXD4

TXD1

TXD4

TXD1

TXD4

TXD1

TXD5NC

TXD2

TXD5NC

TXD2

TXD5

TXD2

TXD5

TXD2

NC FOR GK208

HPD_F

2

DPDVI-SL/HDMI

I

FPE_AUX

I

FPE_AUX

I

FPE_L3

I

FPE_L3

I

FPE_L2

I

FPE_L2

I

FPE_L1

I

FPE_L1

I

FPE_L0

I

FPE_L0

G

I

FPF_AUX

I

FPF_AUX

I

FPF_L3

I

FPF_L3

I

FPF_L2

I

FPF_L2

I

FPF_L1

I

FPF_L1

I

FPF_L0

I

FPF_L0

G

PIO18

PIO19

J

3

J

2

J

1

K

1

K

3

K

2

M

3

M

2

M

1

N

1

C

2

H

4

H

3

J

5

J

4

K

5

K

4

L

4

L

3

M

5

M

4

F

7

Project Name :

Size :

C

Date: Sheet :of

Document Number :

T

itle :

Title :

N

14M-GS(2/6) : DIGITAL OUT I/FOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

.01

2

9 99Monday, August 12, 2013

5

D D

C C

FB

A_DM034

FB

A_DM134

FB

A_DM234

FB

A_DM334

FB

A_DM434

FB

A_DM534

FB

A_DM634

FB

A_DM734

FB

A_DQS034

FB

A_DQS134

FB

A_DQS234

FB

A_DQS334

FB

A_DQS434

FB

A_DQS534

F

A_DQS634

B

F

A_DQS734

B B

B

-F

A_DQS034

B

-F

A_DQS134

B

-F

A_DQS234

B

-F

A_DQS334

B

-F

A_DQS434

B

-F

A_DQS534

B

-F

A_DQS634

B

-F

A_DQS734

B

4

A_D[63:0]34

FB

A_D0

FB F

A_D1FBA_D 1

B

F

A_D2FBA_D 2

B

F

A_D3FBA_D 3

B

F

A_D4FBA_D 4

B

A_D5FBA_D 5FBA_D5

FB

A_D6FBA_D 6FBA_D6

FB

A_D7FBA_D 7FBA_D7

FB F

A_D8FBA_D 8

B

F

A_D9FBA_D 9

B

A_D10

FB

A_D11

FB

A_D12

FB FB

A_D13

FB

A_D14

FB

A_D15

FB

A_D16

FB

A_D17

FB

A_D18

FB

A_D19

FB

A_D20

FB

A_D21

FB

A_D22

FB

A_D23

FB

A_D24

FB

A_D25

FB

A_D26

FB

A_D27

FB

A_D28

FB

A_D29

FB

A_D30

FB

A_D31

FB

A_D32

FB

A_D33

FB

A_D34

FB

A_D35

FB

A_D36

FB

A_D37

FB

A_D38

FB

A_D39

FB

A_D40

FB

A_D41

FB

A_D42

FB

A_D43

FB

A_D44

FB

A_D45

FB

A_D46

FB

A_D47

FB

A_D48

FB

A_D49

FB

A_D50

FB

A_D51

FB

A_D52

FB

A_D53

FB

A_D54

FB

A_D55

FB

A_D56

FB

A_D57

FB

A_D58

FB

A_D59

FB

A_D60

FB

A_D61

FB

A_D62

FB

A_D63

U

7B SW G@

4

2

14 FBA

/

E

8

1

F

A_D0

B

F

8

1

F

A_D1

B

6

E1

F

A_D2

B

F

7

1

F

A_D3

B

D

0

2

A_D4

FB

D

1

2

A_D5

FB

F

0

2

A_D6

FB

E

1

2

F

A_D7

B

E

5

1

F

A_D8

B

5

D1

A_D9

FB

F

5

1

A_D10

FB

F

3

1

A_D11

FB

C

3

1

F

A_D12

B

B1

3

FB

A_D13

E1

3

FB

A_D14

D1

3

FB

A_D15

B1

5

FB

A_D16

C1

6

FB

A_D17

A1

3

FB

A_D18

A1

5

FB

A_D19

B1

8

FB

A_D20

A1

8

FB

A_D21

A1

9

FB

A_D22

C1

9

FB

A_D23

B2

4

FB

A_D24

C2

3

FB

A_D25

A2

5

FB

A_D26

A2

4

FB

A_D27

A2

1

FB

A_D28

B2

1

FB

A_D29

C2

0

FB

A_D30

C2

1

FB

A_D31

R2

2

FB

A_D32

R2

4

FB

A_D33

T2

2

FB

A_D34

R2

3

FB

A_D35

N2

5

FB

A_D36

N2

6

FB

A_D37

N2

3

FB

A_D38

N2

4

FB

A_D39

V2

3

FB

A_D40

V2

2

FB

A_D41

T2

3

FB

A_D42

U2

2

FB

A_D43

Y2

4

FB

A_D44

AA

24

FB

A_D45

Y2

2

FB

A_D46

AA

23

FB

A_D47

AD

27

FB

A_D48

AB

25

FB

A_D49

AD

26

FB

A_D50

AC

25

FB

A_D51

AA

27

FB

A_D52

AA

26

FB

A_D53

W2

6

FB

A_D54

Y2

5

FB

A_D55

R2

6

FB

A_D56

T2

5

FB

A_D57

N2

7

FB

A_D58

R2

7

FB

A_D59

V2

6

FB

A_D60

V2

7

FB

A_D61

W2

7

FB

A_D62

W2

5

FB

A_D63

D1

9

FB

A_DQM0

D1

4

FB

A_DQM1

C1

7

FB

A_DQM2

C2

2

FB

A_DQM3

P2

4

FB

A_DQM4

W2

4

FB

A_DQM5

AA

25

FB

A_DQM6

U2

5

FB

A_DQM7

E1

9

FB

A_DQS_WP0

C1

5

FB

A_DQS_WP1

B1

6

FB

A_DQS_WP2

B2

2

FB

A_DQS_WP3

R2

5

FB

A_DQS_WP4

W2

3

FB

A_DQS_WP5

AB

26

FB

A_DQS_WP6

T

6

2

F

A_DQS_WP7

B

F

9

1

F

A_DQS_RN0

B

C

4

1

F

A_DQS_RN1

B

A

6

1

F

A_DQS_RN2

B

A

2

F

A_DQS_RN3

B

P

5

2

F

A_DQS_RN4

B

W

2

F

A_DQS_RN5

B

A

27

B

F

A_DQS_RN6

B

T

7

2

F

A_DQS_RN7

B

GF119 GF117/GK208

FB_PLLAVDD

GF117 GF119/GK208

3

F

3

F

_CLAMP

B

NC

R

998

8

SWG@

10K_0201_5%

1 2

C2

7

FB

A_CMD0

C2

6

FB

A_CMD1

E2

4

FB

A_CMD2

F2

4

FB

A_CMD3

D2

7

FB

A_CMD4

D2

6

FB

A_CMD5

F2

5

FB

A_CMD6

F2

6

FB

A_CMD7

F2

3

FB

A_CMD8

G2

2

FB

A_CMD9

G2

3

FB

A_CMD10

G2

4

FB

A_CMD11

F2

7

FB

A_CMD12

G2

5

FB

A_CMD13

G2

7

FB

A_CMD14

G2

6

FB

A_CMD15

M2

4

FB

A_CMD16

M2

3

FB

A_CMD17

K2

4

FB

A_CMD18

K2

3

FB

A_CMD19

M2

7

FB

A_CMD20

M2

6

FB

A_CMD21

M2

5

FB

A_CMD22

K2

6

FB

A_CMD23

K2

2

FB

A_CMD24

J2

3

FB

A_CMD25

J2

5

FB

A_CMD26

J2

4

FB

A_CMD27

K2

7

FB

A_CMD28

K2

5

FB

A_CMD29

J2

7

FB

A_CMD30

J2

6

FB

A_CMD31

F2

FB

A_DEBUG0

FB

A_DEBUG1

F

B

F

B

F

B

F

B

F

B

F

B

F

B

F

B

F

B

F

B

F

_DLLAVDD

B

FB

A_CLK0

FB

A_CLK0

FB

A_CLK1

FB

A_CLK1

A_WCK01 A_WCK01 A_WCK23 A_WCK23 A_WCK45 A_WCK45 A_WCK67 A_WCK67

_PLLAVDD

2

J2

2

D2

4

D2

5

N2

2

M2

2

D

8

1

C

8

1

D

7

1

D

6

1

T

4

2

U

4

2

V

4

2

V

5

2

F

6

1

P

2

H

2

C

SWG@

0.1U_0402_25V7K

1

TP

918TP918

TP

919TP919

2

C

290

6

134

6

SWG@

0.1U_0402_25V7K

1

2

F

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B

-FB

A_CS0 34

FB

A_ODT0 34

FB

A_CKE0 34

FB

A_A14 34

FB

A_RST 34

FB

A_A9 34

FB

A_A7 34

FB

A_A2 34

FB

A_A0 34

FB

A_A4 34

FB

A_A1 34

FB

A_BA0 34

-FB

A_WE 34

-FB

A_CAS 34

-FB

A_CS1 34

FB

A_ODT1 34

FB

A_CKE1 34

FB

A_A13 34

FB

A_A8 34

FB

A_A6 34

FB

A_A11 34

FB

A_A5 34

FB

A_A3 34

FB

A_BA2 34

FB

A_BA1 34

FB

A_A12 34

FB

A_A10 34

-FB

A_RAS 34

FB

A_CLK0 34

-FB

A_CLK0 34

FB

A_CLK1 34

-FB

A_CLK1 34

2

C

135

6

SWG@

0.1U_0402_25V7K

1

V

30ohm@100MHz ESR=0.01

2

C

137

6

SWG@

22U_0805_6.3V6M

1

C

F

27

SWG@

27

SWG@

L

1 2

MPZ1608S300AT_2P

97mA

C1R05VIDEO_PLL

1

N

AR BALLS

R

8

SWG@

10K_0201_5%

1 2

E

R

559

SWG@

10K_0201_5%

1 2

R

560

8

SWG@

10K_0201_5%

1 2

R

561

562

8

562

8

SWG@

10K_0201_5%

1 2

roject Name :

P

Size :

C

Date: Sheet :

2

Date: Sheet :

Document Number :

T

le :

Title :

it

N

4M-GS(3/6) : VRAM I/FOAS-1 SP ASSESS

1

Rev :

Rev : 1

1

01

.

3

99Monday, August 12, 2013

0

o

f

D

3

T

141

P

A A

5

4

2

F

_VREF_PROBE

B

N14M-GS-S-A1_BGA595

F

A_CKE0

B

F

A_CKE1

B

F

A_RST

B

F

A_ODT0

B

F

A_ODT1

B

R

558

8

SWG@

10K_0201_5%

1 2

3

Lenovo ThinkPad T440P Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual