Lenovo Thinkpad E495, Thinkpad E595 Schematic

A

1 1

B

C

D

E

LCFC Confidential

2 2

PICASSO EX95 Rev1.0 Schematic

AMD Picasso FP5 Processor with DDR4

2019-01-08 Rev1.0

3 3

4 4

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

C

2018/08/24

2018/08/24

2018/08/24

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

2019/06/01

2019/06/01

2019/06/01

Title

COVER PAGE

COVER PAGE

COVER PAGE

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

C

C

C

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Date: Sheet of

Date: Sheet of

Date: Sheet of

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

E

1 65

1 65

1 65

0.1

0.1

0.1

A

B

C

D

E

AMD Raven Ridge FP5

1 1

eDP Conn.

HDMI Conn.

SSD

Page 25

Page 26

Page 28

PCI-Express x4 Gen3

DP0 x2Lane

DDI

AMD

PICASSO

Processor

FP5 BGA 1140P
25mm * 35mm

PCIe x1 Gen1

DDR4 Channel A

1.2V 2400 MT/s

DDR4 Channel B

1.2V 2400 MT/s

USB 2.0 x1

USB2.0 x1

Repeato r
TI

CC

TUSB544

PD Controlle r
RTS545 7

SATA_redriver

Parade PS8527C

2 2

JUSB-C Conn.

Page 33

SATA 10pin CONN

Page 30

Page 33

Page 31

Page 29

USB C(DP1.2/USB3.0)

SATA Gen3

USB3.0 x1

USB2.0 x1

USB2.0 x1

USB charger

(AOU)

Page 35

TPS2546R TER

USB 3.0 x1

PCIE x1 Ge n1(1000M LAN)
PCIE x1 Gen1(Cardreader)

DDR4-SO-DIMM X1

BANK 0, 1

UP TO 16G

Page 14~15

DDR4-SO-DIMM X1

BANK 0, 1

UP TO 16G

NGFF WLAN Card

BT

USB Left Front

USB Left Behind

Page 14~15

Page 37

Page 35

Page 35

USB2.0 x1

SUB/B CONN

Page 36

3 3

SPI ROM
16M
W25Q128FWS IQ

Page 9

SPI BUS

1.8 V

Page 5~12

USB2.0 x1

Int. camera

Page 26

TPM

PWR
Button

SLB9670VQ2.0

Sub Board

Page 44

LPC BUS

3.3V 33MHz

EC
IT8996 E-256/DX

RJ45 Conn.

4 4

JCARD Conn.

JUSB4 Conn.

A

Realtek
RTL8111GUS

Realte k
RTS5232 S

SD/MMC

PCIe

PCIe

USB2.0

Page 36

B

G-Sensor
BMA255

Touch Pad
Track Point

Page 46Page 50

Int.KBD

Page 42

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

C

HD Audio

Thermal Sensor
F75303M

2018/03/26

2018/03/26

2018/03/26

Codec
CX1188 0

Page 38

HP_R/L_ JACK

MIC_CLK/M IC_DATA

Int. MIC Conn.
(JLCD Conn.)

Page 26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

SP_OUTR /L

2019/06/01

2019/06/01

2019/06/01

SPK Conn.

Page 39

Ext. HP/MIC
Combo Jack

Page 40Page 49Page 46

Title

Title

Title

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

C

C

C

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Date: Sheet of

Date: Sheet of

Date: Sheet of

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

E

2 65

2 65

2 65

0.1

0.1

0.1

5

4

3

2

1

Voltage Rails

Power Plane

D D

B9+

, X --> Means OFF )( O --> Means ON

+3VALW

+5VALW

+1.8VALW

+1.2V

+2.5V

+5VS

+3VS

+1.8VS

+0.9VS_ VDDP

+0.6VS

+VDDCR_ SOC

+VDDC_V DD

+VGA_CO RE

STATE

S0

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

SLP_S3#

HIGH

LOW

LOW

LOW

SUSP#

HIGH

HIGH

LOW

LOW

SYS ON

EC_ONSLP_S5#

ON

ON

ON

ON

+0.9VALW _VDDP

State

S0

S3

S5 S4/AC Only

S5 S4

C C

Battery only

O

O

O

O

O O

O

X

XX

OOO

X

X

X

USB2 Port

Port Devi ce

0

USBC

1

USB3 port1

2

USB3 port2

3

USB2 IOB

4

USB2 (BT )

5

Int. Camera

USB3 Port

Port Devi ce

USB Type-C

USB3 port1

1

USB3 port2

2
3
4

PCIE Port

Port Devi ce

GPP0
GPP1
GPP2
GPP3

X

X

GPP4
GPP5
GFX0
GFX1
GFX2
GFX3
GFX4 ~7

LAN

CardRea der

X
X

WLAN

X

M.2 SSD
M.2 SSD
M.2 SSD
M.2 SSD

X

SATA Port

Port Devi ce

GPP6
GPP7

SATA HDD0

X

S5 S4
AC & Battery
don't exist

B B

XX

X

X

EC

SMCLK1

SMDAT1

SMCLK0

SMDAT0

SMCLK3

SMDAT3

SMCLK2

SMDAT2

SMBUS Control Table

Schemic

EC_SMB_ CK1 EC

EC_SMB_ DA1

EC_SMB_ CK2

EC_SMB_ CK3

EC_SMB_ CK4

EC_SMB_ DA4

APU_SMB 0CLK

APU_SMB 0DATA

APU_SMB 1CLK

APU_SMB 1DATA

SOURCE

+3VL

EC

+3VLEC_SMB_ DA2

EC

+3VSEC_SMB_ DA3

EC

+3VL

APU

+3VS

APU

+3VALW

X

V

+3VS

Thermal
Sensor

X

V

+3VS

X

SODIMM

X

X

X

X

V

+3VS

CP
Module

+3VS

BATTDGPU

Charge

V

X

+3VL

+3VL

X X X

X

X

X

X X

PMIC

X

V

X

X

X

X

V

X

+3VL

PD

X

V

+3VL

X

X

APU

X

X

V

+3VS

X X

G-Senso r

X X X X X X XX X

X X X X X X X XX V

X

X

X

X

ZZZ2

PCB@

APPLY PCB PN

NM-C061

DA800012U00

A A

5

4

PD Controller I2C

SOURCE

REPETER_SC L
REPETER_SD A

PD

+LDO_3V 3V+1.8VAL WV+LDO_3V 3

3

Type C

APU

Redr ive r

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2019/06/01

2019/06/01

2019/06/01

Title

Title

Title

Note List

Note List

Note List

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

C

C

C

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Date: Sheet of

Date: Sheet of

Date: Sheet of

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

1

3 65

3 65

3 65

0.1

0.1

0.1

5

D D

4

3

2

1

BOM Structure Table

BOM Structure

HDT@ For HDT AMD debug port

LPC@ For LPC AMD debug port

NOTE

TPM@

UMA@

C C

CD@

EMC_ NS@

ME@

Trusted Platform Module(TPM)

UMA SKU ID

COST DOWN

EMC Reserves

ME Connector

For RF functionRF@

For EMI functionEMC@

RF_N S@

B B

reserves RF component

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

3

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2019/06/01

2019/06/01

2019/06/01

Title

BOM Structure

BOM Structure

BOM Structure

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

1

4 65

4 65

4 65

0.1

0.1

0.1

5

D D

PCIE0_SSD_CRX_DTX_P25
PCIE0_SSD_CRX_DTX_N25

PCIE1_SSD_CRX_DTX_P25

M.2 SSD M.2 SSD

C C

LAN

WLAN WLAN

HDD HDD

B B

PCIE1_SSD_CRX_DTX_N25

PCIE2_SSD_CRX_DTX_P25
PCIE2_SSD_CRX_DTX_N25

PCIE3_SSD_CRX_DTX_P25
PCIE3_SSD_CRX_DTX_N25

PCIE1_CRX_DTX_P36
PCIE1_CRX_DTX_N36

PCIE2_CRX_DTX_P36
PCIE2_CRX_DTX_N36

PCIE5_CRX_DTX_P37
PCIE5_CRX_DTX_N37

SATA_CRX_DTX_P029

4

P8

PCIE0_SSD_CRX_DTX_N

PCIE1_SSD_CRX_DTX_P PCIE1_SSD_CTX_DRX_P
PCIE1_SSD_CRX_DTX_N

PCIE2_SSD_CRX_DTX_P
PCIE2_SSD_CRX_DTX_N

PCIE3_SSD_CRX_DTX_P
PCIE3_SSD_CRX_DTX_N

PCIE1_CRX_DTX_P
PCIE1_CRX_DTX_N

PCIE2_CRX_DTX_P
PCIE2_CRX_DTX_N

PCIE5_CRX_DTX_P
PCIE5_CRX_DTX_N

SATA_CRX_DTX_N0

P_GFX_RXP0

P9

P_GFX_RXN0

N6

P_GFX_RXP1

N7

P_GFX_RXN1

M8

P_GFX_RXP2

M9

P_GFX_RXN2

L6

P_GFX_RXP3

L7

P_GFX_RXN3

K11

P_GFX_RXP4

J11

P_GFX_RXN4

H6

P_GFX_RXP5

H7

P_GFX_RXN5

G6

P_GFX_RXP6

F7

P_GFX_RXN6

G8

P_GFX_RXP7

F8

P_GFX_RXN7

N10

P_GPP_RXP0

N9

P_GPP_RXN0

L10

P_GPP_RXP1

L9

P_GPP_RXN1

L12

P_GPP_RXP2

M11

P_GPP_RXN2

P12

P_GPP_RXP3

P11

P_GPP_RXN3

V6

P_GPP_RXP4

V7

P_GPP_RXN4

T8

P_GPP_RXP5

T9

P_GPP_RXN5

R6

P_GPP_RXP6/SATA_RXP0

R7

P_GPP_RXN6/SATA_RXN0

R9

P_GPP_RXP7/SATA_RXP1

R10

P_GPP_RXN7/SATA_RXN1

AMD-RAVEN-FP5_BGA1140

PCIE

FP5 REV 0.90

PART 2 OF 13

UC1B

3

P_GFX_TXP0

P_GFX_TXN0

P_GFX_TXP1

P_GFX_TXN1

P_GFX_TXP2

P_GFX_TXN2

P_GFX_TXP3

P_GFX_TXN3

P_GFX_TXP4

P_GFX_TXN4

P_GFX_TXP5

P_GFX_TXN5

P_GFX_TXP6

P_GFX_TXN6

P_GFX_TXP7

P_GFX_TXN7

P_GPP_TXP0

P_GPP_TXN0

P_GPP_TXP1

P_GPP_TXN1

P_GPP_TXP2

P_GPP_TXN2

P_GPP_TXP3

P_GPP_TXN3

P_GPP_TXP4

P_GPP_TXN4

P_GPP_TXP5

P_GPP_TXN5

P_GPP_TXP6/SATA_TXP0
P_GPP_TXN6/SATA_TXN0

P_GPP_TXP7/SATA_TXP1
P_GPP_TXN7/SATA_TXN1

PCIE0_SSD_CTX_DRX_PPCIE0_SSD_CRX_DTX_P

N1

PCIE0_SSD_CTX_DRX_N

N3

M2

PCIE1_SSD_CTX_DRX_N

M4

PCIE2_SSD_CTX_DRX_P

L2

PCIE2_SSD_CTX_DRX_N

L4

PCIE3_SSD_CTX_DRX_P

L1

PCIE3_SSD_CTX_DRX_N

L3

K2
K4

J2
J4

H1
H3

H2
H4

PCIE1_CTX_DRX_P

N2

PCIE1_CTX_DRX_N

P3

PCIE2_CTX_DRX_P PCIE2_CTX_C_DRX_P

P4

PCIE2_CTX_DRX_N

P2

R3
R1

T4
T2

W2

PCIE5_CTX_DRX_N

W4

W3
V2

V1
V3

U2
U4

2

12

CC107 0.22U_0402_10V6-K

12

CC108 0.22U_0402_10V6-K

12

CC109 0.22U_0402_10V6-K

12

CC110 0.22U_0402_10V6-K

12

CC111 0.22U_0402_10V6-K

12

CC112 0.22U_0402_10V6-K

12

CC113 0.22U_0402_10V6-K

12

CC114 0.22U_0402_10V6-K

close APU

1 2

CC1 0.1U_0402_10V7-K

1 2

CC2 0.1U_0402_10V7-K

1 2

CC3 0.1U_0402_10V7-K

1 2

CC4 0.1U_0402_10V7-K

1 2

CC5 0.1U_0402_10V7-K

1 2

CC6 0.1U_0402_10V7-K

PCIE0_SSD_CTX_DRX_P_C
PCIE0_SSD_CTX_DRX_N_C

PCIE1_SSD_CTX_DRX_P_C
PCIE1_SSD_CTX_DRX_N_C

PCIE2_SSD_CTX_DRX_P_C
PCIE2_SSD_CTX_DRX_N_C

PCIE3_SSD_CTX_DRX_P_C
PCIE3_SSD_CTX_DRX_N_C

PCIE1_CTX_C_DRX_P
PCIE1_CTX_C_DRX_N

PCIE2_CTX_C_DRX_N

PCIE5_CTX_C_DRX_PPCIE5_CTX_DRX_P
PCIE5_CTX_C_DRX_N

SATA_CTX_DRX_P0SATA_CRX_DTX_P0
SATA_CTX_DRX_N0

1

PCIE0_SSD_CTX_DRX_P_C 25
PCIE0_SSD_CTX_DRX_N_C 25

PCIE1_SSD_CTX_DRX_P_C 25
PCIE1_SSD_CTX_DRX_N_C 25

PCIE2_SSD_CTX_DRX_P_C 25
PCIE2_SSD_CTX_DRX_N_C 25

PCIE3_SSD_CTX_DRX_P_C 25
PCIE3_SSD_CTX_DRX_N_C 25

PCIE1_CTX_C_DRX_P 36
PCIE1_CTX_C_DRX_N 36

PCIE2_CTX_C_DRX_P 36
PCIE2_CTX_C_DRX_N 36

PCIE5_CTX_C_DRX_P 37
PCIE5_CTX_C_DRX_N 37

SATA_CTX_DRX_P0 29
SATA_CTX_DRX_N0 29SATA_CRX_DTX_N029

LAN

CardRea derCardRea der

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

3

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2019/06/01

2019/06/01

2019/06/01

Title

PCIE I/F

PCIE I/F

PCIE I/F

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

1

5 65

5 65

5 65

0.1

0.1

0.1

5

4

3

2

1

D D

DDR_A_WE#14
DDR_A_CAS#14

C C

B B

A A

DDR_A_RAS#14

DDR_A_BA014
DDR_A_BA114

DDR_A_BG014
DDR_A_BG114

DDR_A_ACT_N14

SA_CLK_DDR014
SA_CLK_DDR#014
SA_CLK_DDR114
SA_CLK_DDR#114

DDR_A_CS0#14
DDR_A_CS1#14

DDR_A_CKE014
DDR_A_CKE114

DDR_A_ODT014
DDR_A_ODT114

DDR_A_ALERT_N14

DDR_A_EVENT#14
DDR4_A_DRAMRST#14

DDRA_MA_DM[0..7] 14

DDR_A_DQS#[0..7] 14

DDR_A_DQS[0..7] 14

DDR_A_D[0..63] 14

DDR_A_MA[0..13] 14

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#

DDR_A_BA0
DDR_A_BA1

DDR_A_BG0
DDR_A_BG1

DDR_A_ACT_N

DDRA_MA_DM0
DDRA_MA_DM1
DDRA_MA_DM2
DDRA_MA_DM3
DDRA_MA_DM4
DDRA_MA_DM5
DDRA_MA_DM6
DDRA_MA_DM7

DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS#7

SA_CLK_DDR0
SA_CLK_DDR#0
SA_CLK_DDR1
SA_CLK_DDR#1

DDR_A_CS0#
DDR_A_CS1#

DDR_A_CKE0
DDR_A_CKE1

DDR_A_ODT0
DDR_A_ODT1

DDR_A_ALERT_N

DDR_A_EVENT#
DDR4_A_DRAMRST#

AF25
AE23
AD27
AE21
AC24
AC26
AD21
AC27
AD22
AC21
AF22
AA24
AC23

AG27
AG23
AG26

AF21
AF27

AA21
AA27

AA22

AN27

AW25

AT21

AM26
AM27
AN24
AN25
AU23
AT23
AV20

AW20

AD25
AD24
AE26
AE27

AG21

AG24

AA25

AE24

AJ25

AL24

AJ27

AJ22

F21
G27
N24
N23

T27

F22
G22
H27
H26
N27
N26
R21
P21

V24
V23

Y23
Y26

Y24

MA_ADD0/MAB_CS0
MA_ADD1/RSVD
MA_ADD2/RSVD
MA_ADD3/RSVD
MA_ADD4/RSVD
MA_ADD5/RSVD
MA_ADD6/RSVD
MA_ADD7/MAA_CA3
MA_ADD8/MAA_CA4
MA_ADD9/MAA_CKE1
MA_ADD10/MAB_CKE0
MA_ADD11/MAA_CA5
MA_ADD12/MAA_CA2
MA_ADD13_BANK2/RSVD
MA_WE_L_ADD14/MAB_CA2
MA_CAS_L_ADD15/MAB_CA4
MA_RAS_L_ADD16/MAB_CA3

MA_BANK0/MAB_CS1
MA_BANK1/MAB_CA0

MA_BG0/MAA_CS1
MA_BG1/MAA_CKE0

MA_ACT_L/MAA_CS0

MA_DM0/MAA_DM1
MA_DM1/MAA_DM0
MA_DM2/MAA_DM2
MA_DM3/MAA_DM3
MA_DM4/MAB_DM2
MA_DM5/MAB_DM3
MA_DM6/MAB_DM1
MA_DM7/MAB_DM0
RSVD_36

MA_DQS_H0/MAA_DQS_H1
MA_DQS_L0/MAA_DQS_L1
MA_DQS_H1/MAA_DQS_H0
MA_DQS_L1/MAA_DQS_L0
MA_DQS_H2/MAA_DQS_H2
MA_DQS_L2/MAA_DQS_L2
MA_DQS_H3/MAA_DQS_H3
MA_DQS_L3/MAA_DQS_L3
MA_DQS_H4/MAB_DQS_H2
MA_DQS_L4/MAB_DQS_L2
MA_DQS_H5/MAB_DQS_H3
MA_DQS_L5/MAB_DQS_L3
MA_DQS_H6/MAB_DQS_H1
MA_DQS_L6/MAB_DQS_L1
MA_DQS_H7/MAB_DQS_H0
MA_DQS_L7/MAB_DQS_L0
RSVD_41
RSVD_40

MA_CLK_H0/MAA_CKT
MA_CLK_L0/MAA_CKC
MA_CLK_H1/MAB_CKT
MA_CLK_L1/MAB_CKC

MA_CS_L0/MAB_CKE1
MA_CS_L1/RSVD

MA_CKE0/MAA_CA0
MA_CKE1/MAA_CA1

MA_ODT0/MAB_CA5
MA_ODT1/RSVD

MA_ALERT_L/MA_TEST

MA_EVENT_L
MA_RESET_L

FP5 REV 0.90

PART 1 OF 13

UC1A

MEMORY A

MA_DATA16/MAA_DATA17
MA_DATA17/MAA_DATA16
MA_DATA18/MAA_DATA23
MA_DATA19/MAA_DATA20
MA_DATA20/MAA_DATA19
MA_DATA21/MAA_DATA18
MA_DATA22/MAA_DATA21
MA_DATA23/MAA_DATA22

MA_DATA24/MAA_DATA30
MA_DATA25/MAA_DATA31
MA_DATA26/MAA_DATA26
MA_DATA27/MAA_DATA27
MA_DATA28/MAA_DATA28
MA_DATA29/MAA_DATA29
MA_DATA30/MAA_DATA24
MA_DATA31/MAA_DATA25

MA_DATA32/MAB_DATA16
MA_DATA33/MAB_DATA17
MA_DATA34/MAB_DATA22
MA_DATA35/MAB_DATA20
MA_DATA36/MAB_DATA19
MA_DATA37/MAB_DATA18
MA_DATA38/MAB_DATA23
MA_DATA39/MAB_DATA21

MA_DATA40/MAB_DATA30
MA_DATA41/MAB_DATA31
MA_DATA42/MAB_DATA26
MA_DATA43/MAB_DATA27
MA_DATA44/MAB_DATA28
MA_DATA45/MAB_DATA29
MA_DATA46/MAB_DATA24
MA_DATA47/MAB_DATA25

MA_DATA48/MAB_DATA11
MA_DATA49/MAB_DATA10
MA_DATA50/MAB_DATA15
MA_DATA51/MAB_DATA14
MA_DATA52/MAB_DATA12
MA_DATA53/MAB_DATA13

MA_DATA0/MAA_DATA8

MA_DATA1/MAA_DATA9
MA_DATA2/MAA_DATA13
MA_DATA3/MAA_DATA12
MA_DATA4/MAA_DATA11
MA_DATA5/MAA_DATA10
MA_DATA6/MAA_DATA15
MA_DATA7/MAA_DATA14

MA_DATA8/MAA_DATA0

MA_DATA9/MAA_DATA1
MA_DATA10/MAA_DATA5
MA_DATA11/MAA_DATA4
MA_DATA12/MAA_DATA7
MA_DATA13/MAA_DATA6
MA_DATA14/MAA_DATA2
MA_DATA15/MAA_DATA3

MA_DATA54/MAB_DATA9
MA_DATA55/MAB_DATA8

MA_DATA56/MAB_DATA5
MA_DATA57/MAB_DATA6
MA_DATA58/MAB_DATA2
MA_DATA59/MAB_DATA3
MA_DATA60/MAB_DATA7
MA_DATA61/MAB_DATA4
MA_DATA62/MAB_DATA1
MA_DATA63/MAB_DATA0

RSVD_34
RSVD_35
RSVD_51
RSVD_52
RSVD_27
RSVD_28
RSVD_43
RSVD_42

MA_PAROUT/MAB_CA1

J21
H21
F23
H23
G20
F20
J22
J23

G25
F26
L24
L26
L23
F25
K25
K27

M25
M27
P27
R24
L27
M24
P24
P25

M22
N21
T22
V21
L21
M20
R23
T21

AL27
AL25
AP26
AR27
AK26
AK24
AM24
AP27

AM23
AM21
AR25
AU27
AL22
AL21
AP24
AP23

AW26
AV25
AV22
AW22
AU26
AV27
AW23
AT22

AW21
AU21
AP21
AN20
AR22
AN22
AT20
AR20

T24
T25
W25
W27
R26
R27
V27
V26

AF24

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7

DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15

DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23

DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31

DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39

DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47

DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55

DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_A_PARITY

DDR_A_PARITY 14

UC1I

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13

DDR_B_WE#15
DDR_B_CAS#15
DDR_B_RAS#15

DDR_B_BA015
DDR_B_BA115

DDR_B_BG015
DDR_B_BG115

DDR_B_ACT_N15

SB_CLK_DDR015
SB_CLK_DDR#015
SB_CLK_DDR115
SB_CLK_DDR#115

DDR_B_CS0#15
DDR_B_CS1#15

DDR_B_CKE015
DDR_B_CKE115

DDR_B_ODT015
DDR_B_ODT115

DDR_B_ALERT_N15

DDR_B_EVENT#15
DDR4_B_DRAMRST#15

DDR_B_WE#
DDR_B_CAS#
DDR_B_RAS#

DDR_B_BA0
DDR_B_BA1

DDR_B_BG0
DDR_B_BG1

DDR_B_ACT_N

DDRA_MB_DM0
DDRA_MB_DM1
DDRA_MB_DM2
DDRA_MB_DM3
DDRA_MB_DM4
DDRA_MB_DM5
DDRA_MB_DM6
DDRA_MB_DM7

DDR_B_DQS0
DDR_B_DQS#0
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS7
DDR_B_DQS#7

SB_CLK_DDR0
SB_CLK_DDR#0
SB_CLK_DDR1
SB_CLK_DDR#1

DDR_B_CS0#
DDR_B_CS1#

DDR_B_CKE0
DDR_B_CKE1

DDR_B_ODT0
DDR_B_ODT1

DDR_B_ALERT_N

DDR_B_EVENT#
DDR4_B_DRAMRST#

AG30

MB_ADD0/MBB_CS0

AC32

MB_ADD1/RSVD

AC30

MB_ADD2/RSVD

AB29

MB_ADD3/RSVD

AB31

MB_ADD4/RSVD

AA30

MB_ADD5/RSVD

AA29

MB_ADD6/RSVD

Y30

MB_ADD7/MBA_CA3

AA31

MB_ADD8/MBA_CA4

W29

MB_ADD9/MBA_CKE1

AH29

MB_ADD10/MBB_CKE0

Y32

MB_ADD11/MBA_CA5

W31

MB_ADD12/MBA_CA2

AL30

MB_ADD13_BANK2/RSVD

AK30

MB_WE_L_ADD14/MBB_CA2

AK32

MB_CAS_L_ADD15/MBB_CA4

AJ30

MB_RAS_L_ADD16/MBB_CA3

AH31

MB_BANK0/MBB_CS1

AG32

MB_BANK1/MBB_CA0

V31

MB_BG0/MBA_CS1

V29

MB_BG1/MBA_CKE0

V30

MB_ACT_L/MBA_CS0

C21

MB_DM0/MBA_DM1

C25

MB_DM1/MBA_DM0

E32

MB_DM2/MBA_DM2

K30

MB_DM3/MBA_DM3

AP30

MB_DM4/MBB_DM2

AW31

MB_DM5/MBB_DM3

BB26

MB_DM6/MBB_DM1

BD22

MB_DM7/MBB_DM0

N32

RSVD_21

D22

MB_DQS_H0/MBA_DQS_H1

B22

MB_DQS_L0/MBA_DQS_L1

D25

MB_DQS_H1/MBA_DQS_H0

B25

MB_DQS_L1/MBA_DQS_L0

F29

MB_DQS_H2/MBA_DQS_H2

F30

MB_DQS_L2/MBA_DQS_L2

K31

MB_DQS_H3/MBA_DQS_H3

K29

MB_DQS_L3/MBA_DQS_L3

AR29

MB_DQS_H4/MBB_DQS_H2

AR31

MB_DQS_L4/MBB_DQS_L2

AW30

MB_DQS_H5/MBB_DQS_H3

AW29

MB_DQS_L5/MBB_DQS_L3

BC25

MB_DQS_H6/MBB_DQS_H1

BA25

MB_DQS_L6/MBB_DQS_L1

BC22

MB_DQS_H7/MBB_DQS_H0

BA22

MB_DQS_L7/MBB_DQS_L0

N31

RSVD_20

N29

RSVD_18

AC31

MB_CLK_H0/MBA_CKT

AD30

MB_CLK_L0/MBA_CKC

AD29

MB_CLK_H1/MBB_CKT

AD31

MB_CLK_L1/MBB_CKC

AE30

RSVD_89

AE32

RSVD_90

AF29

RSVD_91

AF31

RSVD_92

AJ31

MB_CS_L0/MBB_CKE1

AM31

MB_CS_L1/RSVD

AJ29

RSVD_95

AM29

RSVD_97

U29

MB_CKE0/MBA_CA0

T30

MB_CKE1/MBA_CA1

V32

RSVD_93

U31

RSVD_94

AL31

MB_ODT0/MBB_CA5

AM32

MB_ODT1/RSVD

AL29

RSVD_96

AM30

RSVD_98

W30

MB_ALERT_L/MB_TEST

AG29

MB_EVENT_L

T31

MB_RESET_L

MEMORY B

FP5 REV 0.90

PART 9 OF 13

AMD-RAVEN-FP5_BGA1140

MB_DATA0/MBA_DATA8

MB_DATA1/MBA_DATA9
MB_DATA2/MBA_DATA13
MB_DATA3/MBA_DATA12
MB_DATA4/MBA_DATA11
MB_DATA5/MBA_DATA10
MB_DATA6/MBA_DATA15
MB_DATA7/MBA_DATA14

MB_DATA8/MBA_DATA0

MB_DATA9/MBA_DATA1
MB_DATA10/MBA_DATA5
MB_DATA11/MBA_DATA4
MB_DATA12/MBA_DATA7
MB_DATA13/MBA_DATA6
MB_DATA14/MBA_DATA2
MB_DATA15/MBA_DATA3

MB_DATA16/MBA_DATA19
MB_DATA17/MBA_DATA18
MB_DATA18/MBA_DATA22
MB_DATA19/MBA_DATA23
MB_DATA20/MBA_DATA20
MB_DATA21/MBA_DATA21
MB_DATA22/MBA_DATA17
MB_DATA23/MBA_DATA16

MB_DATA24/MBA_DATA30
MB_DATA25/MBA_DATA31
MB_DATA26/MBA_DATA26
MB_DATA27/MBA_DATA27
MB_DATA28/MBA_DATA28
MB_DATA29/MBA_DATA29
MB_DATA30/MBA_DATA25
MB_DATA31/MBA_DATA24

MB_DATA32/MBB_DATA16
MB_DATA33/MBB_DATA17
MB_DATA34/MBB_DATA21
MB_DATA35/MBB_DATA20
MB_DATA36/MBB_DATA19
MB_DATA37/MBB_DATA18
MB_DATA38/MBB_DATA23
MB_DATA39/MBB_DATA22

MB_DATA40/MBB_DATA24
MB_DATA41/MBB_DATA25
MB_DATA42/MBB_DATA29
MB_DATA43/MBB_DATA28
MB_DATA44/MBB_DATA31
MB_DATA45/MBB_DATA30
MB_DATA46/MBB_DATA26
MB_DATA47/MBB_DATA27

MB_DATA48/MBB_DATA11
MB_DATA49/MBB_DATA10
MB_DATA50/MBB_DATA14
MB_DATA51/MBB_DATA15
MB_DATA52/MBB_DATA12
MB_DATA53/MBB_DATA13

MB_DATA54/MBB_DATA9
MB_DATA55/MBB_DATA8

MB_DATA56/MBB_DATA6
MB_DATA57/MBB_DATA7
MB_DATA58/MBB_DATA2
MB_DATA59/MBB_DATA3
MB_DATA60/MBB_DATA4
MB_DATA61/MBB_DATA5
MB_DATA62/MBB_DATA1
MB_DATA63/MBB_DATA0

RSVD_17
RSVD_19
RSVD_26
RSVD_29
RSVD_16
RSVD_15
RSVD_25
RSVD_24

MB_PAROUT/MBB_CA1

DDRA_MB_DM[0..7] 15

DDR_B_DQS#[0..7] 15

DDR_B_DQS[0..7] 15

DDR_B_D[0..63] 15

DDR_B_MA[0..13] 15

DDR_B_D0

B21

DDR_B_D1

D21

DDR_B_D2

B23

DDR_B_D3

D23

DDR_B_D4

A20

DDR_B_D5

C20

DDR_B_D6

A22

DDR_B_D7

C22

DDR_B_D8

D24

DDR_B_D9

A25

DDR_B_D10

D27

DDR_B_D11

C27

DDR_B_D12

C23

DDR_B_D13

B24

DDR_B_D14

C26

DDR_B_D15

B27

DDR_B_D16

C30

DDR_B_D17

E29

DDR_B_D18

H29

DDR_B_D19

H31

DDR_B_D20

A28

DDR_B_D21

D28

DDR_B_D22

F31

DDR_B_D23

G30

DDR_B_D24

J29

DDR_B_D25

J31

DDR_B_D26

L29

DDR_B_D27

L31

DDR_B_D28

H30

DDR_B_D29

H32

DDR_B_D30

L30

DDR_B_D31

L32

DDR_B_D32

AP29

DDR_B_D33

AP32

DDR_B_D34

AT29

DDR_B_D35

AU32

DDR_B_D36

AN30

DDR_B_D37

AP31

DDR_B_D38

AR30

DDR_B_D39

AT31

DDR_B_D40

AU29

DDR_B_D41

AV30

DDR_B_D42

BB30

DDR_B_D43

BA28

DDR_B_D44

AU30

DDR_B_D45

AU31

DDR_B_D46

AY32

DDR_B_D47

AY29

DDR_B_D48

BA27

DDR_B_D49

BC27

DDR_B_D50

BA24

DDR_B_D51

BC24

DDR_B_D52

BD28

DDR_B_D53

BB27

DDR_B_D54

BB25

DDR_B_D55

BD25

DDR_B_D56

BC23

DDR_B_D57

BB22

DDR_B_D58

BC21

DDR_B_D59

BD20

DDR_B_D60

BB23

DDR_B_D61

BA23

DDR_B_D62

BB21

DDR_B_D63

BA21

M31
N30
P31
R32
M30
M29
P30
P29

DDR_B_PARITY

AG31

DDR_B_PARITY 15

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2019/06/01

2019/06/01

2019/06/01

Title

Memory DDR4

Memory DDR4

Memory DDR4

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

1

6 65

6 65

6 65

0.1

0.1

0.1

5

+1.8VALW

1 2

RC129 0_0402_5%

RB751V-40_SOD323-2

EC_RSMRST#42

D D

EC_RSMRST#

@

1 2

DC1

SCS00008K00

12

RC28
22K_0402_5%

RSMRST#

1

CC103

0.1U_0402_10V7-K

2

4

1

CC115

10U_25V_M_X5R_0603

2

PLT_RST#_R

RC157

1 2

33_0402_5%

2

CC106
150P_0201_25V9-J

1

PLT_RST#_R_G

3

1 2

RC155 0_0402_5%

+3VALW +3VALW

0.1U_0402_10V7-K

1

@

CC105

2

5

1

P

B

2

A

G

3

12

@

RC154
10K_0402_5%

UC7

@

4

Y

MC74VHC1G09DFT2G_SC70-5

SA000046R0J

PLT_RST#

2

PLT_RST# 25,36,37,42

APU_SMB1CLK
APU_SMB1DATA

1

RPC16

1 4
2 3

2.2K_0404_4P2R_5%

+3VALW

+3VALW_APU

C C

APU_AZ_BITCLK38
APU_AZ_RST#38
APU_AZ_SYNC38
APU_AZ_SDOUT38

TPC19 Test_Point_12MIL
TPC20 Test_Point_12MIL
TPC21 Test_Point_12MIL
TPC22 Test_Point_12MIL

B B

Str ap

RPC5

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

RC133 10K_0402_5%@

RC109 100K_0402_5%

RC146 10K_0402_5%

1

CC14

EMC@

2

10P_0402_50V8-J

12

1 2

1 2

APU_AZ_BITCLK AZ_BITCLK
APU_AZ_RST#
APU_AZ_SYNC

1
1
1
1

RPC7

1 8
2 7
3 6
4 5

EMC@

33_0804_8P4R_5%

RC117

10K_0402_5%

SYS_RESET#
PBTN_OUT#
EC_WAKE#

BATLOW#

APU_AZ_BITCLK

@

12

AC_PRESENT

PWR_GOOD

PLT_RST#_R_G

AZ_RST#
AZ_SYNC
AZ_SDOUTAPU_AZ_SDOUT

PM_SLP_S3#
PM_SLP_S5#

RSMRST#
PBTN_OUT#

PCIE_RST1_L/EGPIO27

PLT_RST#_R

1

TPC24 Test_Point_20MIL

PBTN_OUT#42
PWR_GOOD42

EC_WAKE#42

PM_SLP_S3#42
PM_SLP_S5#9,42

AC_PRESENT42

MEM_BEEP42

PCIE_RST1_L/EGPIO27

RSMRST#

PBTN_OUT#
PWR_GOOD
SYS_RESET#
EC_WAKE#

PM_SLP_S3#
PM_SLP_S5#

AC_PRESENT
BATLOW#

MEM_BEEP

FVT Change 2018/08/30

AZ_BITCLK

APU_AZ_SDIN038

APU_AZ_SDIN0

AZ_RST#
AZ_SYNC
AZ_SDOUT

ACPI/AUDIO/I2C/GPI O/MIS C

BD5

PCIE_RST0_L/EGPIO26

BB6

PCIE_RST1_L/EGPIO27

AT16

RSMRST_L

AR15

PWR_BTN_L/AGPIO0

AV6

PWR_GOOD

AP10

SYS_RESET_L/AGPIO1

AV11

WAKE_L/AGPIO2

AV13

SLP_S3_L

AT14

SLP_S5_L

AR8

S0A3_GPIO/AGPIO10

AT10

AC_PRES/AGPIO23

AN6

LLB_L/AGPIO12

AW8

EGPIO42

AR2

AZ_BITCLK/TDM_BCLK_MIC

AP7

AZ_SDIN0/CODEC_GPI

AP1

AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK

AP4

AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK

AP3

AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC

AR4

AZ_SYNC/TDM_FRM_MIC

AR3

AZ_SDOUT/TDM_FRM_PLAYBACK

AT2

SW_MCLK/TDM_BCLK_BT

AT4

SW_DATA0/TDM_DOUT_BT

AR6

AGPIO7/FCH_ACP_I2S_SDIN_BT

AP6

AGPIO8/FCH_ACP_I2S_LRCLK_BT

UC1D

EGPIO41/SFI_S5_EGPIO41
AGPIO39/SFI_S5_AGPIO39

I2C0_SCL/SFI0_I2C_SCL/EGPIO151
I2C0_SDA/SFI0_I2C_SDA/EGPIO152

I2C1_SCL/SFI1_I2C_SCL/EGPIO149
I2C1_SDA/SFI1_I2C_SDA/EGPIO150

I2C2_SCL/EGPIO113/SCL0

I2C2_SDA/EGPIO114/SDA0

I2C3_SCL/AGPIO19/SCL1

I2C3_SDA/AGPIO20/SDA1

SATA_ACT_L/AGPIO130

FP5 REV 0.90

PART 4 OF 13

AMD-RAVEN-FP5_BGA1140

PSA_I2C_SCL
PSA_I2C_SDA

AGPIO3

AGPIO4/SATAE_IFDET

AGPIO5/DEVSLP0
AGPIO6/DEVSLP1

AGPIO9
AGPIO40
AGPIO69
AGPIO86

INTRUDER_ALERT

SPKR/AGPIO91
BLINK/AGPIO11

GENINT1_L/AGPIO89
GENINT2_L/AGPIO90

FANIN0/AGPIO84

FANOUT0/AGPIO85

AW12
AU12

AR13
AT13

AN8
AN9

BC20
BA20

AM9
AM10

L16
M16

AT15
AW10

AP9
AU10
AV15

AU7
AU6
AW13
AW15

AU14
AU16
AV8

AW16
BD15

AR18
AT18

EGPIO151
EGPIO152

EGPIO149
EGPIO150

APU_SMB0CLK
APU_SMB0DATA

APU_SMB1CLK
APU_SMB1DATA

PSA_I2C_SCL
PSA_I2C_SDA

HDD_DEVSLP

SSD_DEVSLP

APU_SSD_RST#

EC_SMI#

APU_SPKR

NUMLOCK_LED#

F1_LED#

RF_OFF#
BT_ON

1 2

RC32 0_0402_5%

1 2

RC33 0_0402_5%

HDD_DEVSLP 30
SSD_DEVSLP 25

APU_SSD_RST# 25

EC_SMI# 42

1

TPC31 Test_Point_20MIL

APU_SPKR 39

NUMLOCK_LED# 46
F1_LED# 46

RF_OFF# 37
BT_ON 37

APU_SMB_CK0
APU_SMB_DA0

APU_SMB1_CLK
APU_SMB1_DATA
APU_SMB0CLK
APU_SMB0DATA

APU_SMB_CK0 9,14,15
APU_SMB_DA0 9,14,15

PSA_I2C_SDA
PSA_I2C_SCL

RC9 Implement KB connect side

NUMLOCK_LED#
F1_LED#

APU_SSD_RST#

EC_SMI#

RF_OFF#

BT_ON

RPC6

1 8
2 7
3 6
4 5

2.2K_0804_8P4R_5%

DIMM1, DIMM2

TOUCHPAD

RPC12

@
1 4
2 3

4.7K_0404_4P2R_5%

@

RPC9

1 4
2 3

10K_0404_4P2R_5%

RC167 10K_0402_5%@

RC153 2.2K_0402_5%

RC36 10K_0402_5%@

RC37 10K_0402_5%@

12

12

12

12

+3VS

+1.8VS

+3VS

SW Can't pull down

+3VS

2

G

APU_SMB1CLK

APU_SMB1DATA

A A

6 1

QC9A

D

2N7002KDWH_SOT363-6

SB00000EO1J

RC150 0_0402_5%@

RC149 0_0402_5%@

S

3 4

QC9B

2N7002KDWH_SOT363-6

1 2

1 2

5

G

D

Click PAD

Vgs(th) Ma x >=2.0V

APU_SMB1_CLK

S

APU_SMB1_DATA

APU_SMB1_CLK 46

APU_SMB1_DATA 46

EGPIO149
EGPIO150
EGPIO151
EGPIO152

SIT Change 2018/11/06

RPC19

1 8
2 7
3 6
4 5

1/16W_10K_5%_8P4R_0804

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

3

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2019/06/01

2019/06/01

2019/06/01

Title

AZ/GPIO

AZ/GPIO

AZ/GPIO

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Tuesday, January 15, 2019

Tuesday, January 15, 2019

Tuesday, January 15, 2019

1

7 65

7 65

7 65

0.1

0.1

0.1

1

2

3

4

5

UC1C

CPU_EDP_TX0+
CPU_EDP_TX0-

CPU_EDP_TX1+
CPU_EDP_TX1-

H_HDMI_TX2+
H_HDMI_TX2-

H_HDMI_TX1+
H_HDMI_TX1-

H_HDMI_TX0+
H_HDMI_TX0-

H_HDMI_TXC+
H_HDMI_TXC-

RC158 0_0402_5%HDT@
RC159 0_0402_5%HDT@
RC160 0_0402_5%HDT@
RC161 0_0402_5%HDT@
RC162 0_0402_5%

0_0402_5%

RC163

0_0402_5%

RC164

APU_TRST#_H

1

CC11

HDT@

0.01U_0201_25V7-K

2

APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBREQ#

APU_RESET#APU_RESET#_H

APU_SIC
APU_SID
APU_ALERT#

APU_PROCHOT#

SVC_RA
SVD_RA
SVT_RA

Cap close to JHDT.9

EC_SMB_CK3 42,49,50
EC_SMB_DA3 42,49,50

APU_TDI_H
APU_TDO_H
APU_TCK_H
APU_TMS_H
APU_TRST#_H

APU_PWROK

APU_PWROK_H

APU_THERMTRIP#
H_PROCHOT#

APU_SVC
APU_SVD
APU_SVT

1 2
1 2

CPU_EDP_TX0+26
CPU_EDP_TX0-26

CPU_EDP_TX1+26
CPU_EDP_TX1-26

H_HDMI_TX2+28
H_HDMI_TX2-28

H_HDMI_TX1+28
H_HDMI_TX1-28

H_HDMI_TX0+28
H_HDMI_TX0-28

H_HDMI_TXC+28
H_HDMI_TXC-28

1 2
1 2
1 2
1 2
1 2

1 2

HDT@

1 2

HDT@

1 2

RC14 0_0402_5%

1 2

RC15 0_0402_5%

1 2

RC16 0_0402_5%

1 2

RC17 0_0402_5%

EC_SMB_CK3
EC_SMB_DA3

DP0- EDP

A A

HDM I

+1.8VS

APU_PWROK59

APU_SVC59
APU_SVD59
APU_SVT59

APU_TDI_H
APU_TMS_H
APU_TCK_H
APU_TRST#_H

APU_PROCHOT#
APU_ALERT#

APU_SIC
APU_SID

APU_THERMTRIP#

APU_SVD

APU_SVC

1

300_0402_5%

56P_0402_50V8-J

RC6

1 2

APU_PWROK
APU_RESET#

1

@

CC7

2

RC26 0_0402_5%
RC27 0_0402_5%

RC8

300_0402_5%

1 2

1

@

CC8

2

56P_0402_50V8-J

B B

APU_THERMTRIP#42

H_PROCHOT#42

+1.8VALW

C C

+3VS

+3VS

D D

RPC1

1 8
2 7
3 6
4 5

1K_0804_8P4R_5%

HDT@

SIT Change 2018/11/06

RPC17

1 4
2 3

1K_0404_4P2R_5%

AMD check can change R value to 2.2K

RPC11

1 4
2 3

2.2K_0404_4P2R_5%

RC126

1 2

1K_0402_1%

1000P_0402_50V7-K

1000P_0402_50V7-K

@

@

1

1

CC9

CC10

2

2

HDT@

C8

A8

D8

B8

B6

C7

C6
D6

E6

D5

E1

C1

F3
E4

F4
F2

AU2
AU4
AU1
AU3
AV3

AW3

AW4
AW2

H14

J14
J15

AP16

L19

F16
H16

J16

RC21

1 2

RPC2

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

2

DP0_TXP0
DP0_TXN0

DP0_TXP1
DP0_TXN1

DP0_TXP2
DP0_TXN2

DP0_TXP3
DP0_TXN3

DP1_TXP0
DP1_TXN0

DP1_TXP1
DP1_TXN1

DP1_TXP2
DP1_TXN2

DP1_TXP3
DP1_TXN3

TDI
TDO
TCK
TMS
TRST_L
DBREQ_L

RESET_L
PWROK

SIC
SID
ALERT_L
THERMTRIP_L
PROCHOT_L

SVC0
SVD0
SVT0

33_0402_5%HDT@

DISPLAY/SVI2/JTAG /TES T

FP5 REV 0.90

PART 3 OF 13

AMD-RAVEN-FP5_BGA1140

APU_PWROK_H

APU_RESET#_H

DP_BLON

DP_DIGON

DP_VARY_BL

DP0_AUXP
DP0_AUXN

DP0_HPD

DP1_AUXP
DP1_AUXN

DP1_HPD

DP2_AUXP
DP2_AUXN

DP2_HPD

DP3_AUXP
DP3_AUXN

DP3_HPD

DP_STEREOSYNC

RSVD_4
RSVD_3

RSVD_2

TEST4
TEST5

TEST6

TEST14
TEST15
TEST16
TEST17

TEST31/RSVD

TEST41

TEST470
TEST471

SMU_ZVDD

CORETYPE

VDDP_SENSE

VDDCR_SOC_SENSE

VDDCR_SENSE

VSS_SENSE_A
VSS_SENSE_B

+1.8VALW

11

13

15

17

19

0.1U_0201_6.3V6-K

3

2

1

JHDT1

1

1

3

3

5

5

7

7

9

9

11

13

15

17

19

ME@

SAMTE_ASP-136446-07-B

CC100

UC6

2A

GND

1A

SA000023X0J

G15
F15
L14

D9
B9
C10

G11
F11
G13

J12
H12
K13

J10
H10
K8

K15

F14
F12

F10

AP14
AN14

F13

G18
H19
F18
F19

W24

AR11

AJ21
AK21

V4

AW11

AN11
J19
K18

J18
AM11

2

4

6

8

10

12

14

16

18

20

1

2

SN74LVC2G07YZPR_WCSP6HDT@

APU_ENBKL_R
APU_ENVDD
APU_EDP_PWM_R

CPU_EDP_AUX
CPU_EDP_AUX#
CPU_EDP_HPD

HDMI_CLK
HDMI_DAT
HDMI_HPD

APU_DP3_AUXP
APU_DP3_AUXN
DDIP3_HPD

DP_STEREOSYNC

APU_TEST4
APU_TEST3

APU_TEST2

TEST4
TEST5

TEST6

APU_TEST14
APU_TEST15
APU_TEST16
APU_TEST17

APU_TEST31

APU_TEST41

APU_TEST470
APU_TEST471

P_ZVDDP

CORETYPE

VDDP_SENSE
VDDCR_SOC_VCC_SENSE
VDDCR_VCC_SENSE

VDDCR_VSS_SENSE
VSS_SENSE_B

APU_TCK_H

2

APU_TMS_H

4

HDT@

1 2

6

RC20 0_0402_5%

APU_TDO_H

8

APU_PWROK_BUF

10

APU_RST#_BUF

12

14

HDT@

1 2

16

RC24 33_0402_5%

18

20

+1.8VALW+1.8VALW

HDT@

HDT@

1 2

4

2Y

5

VCC

6

1Y

APU_ENVDD 26

CPU_EDP_AUX 26

CPU_EDP_AUX# 26

CPU_EDP_HPD 26

HDMI_CLK 28
HDMI_DAT 28
HDMI_HPD 28

APU_DP3_AUXP 33
APU_DP3_AUXN 33
DDIP3_HPD 31,33

1

TPC1 Test_Point_20MIL

1

TPC2 Test_Point_20MIL

1

TPC46 Test_Point_20MIL

1

TPC3 Test_Point_20MIL

1

TPC4 Test_Point_20MIL

1

TPC5 Test_Point_20MIL

1

TPC6 Test_Point_20MIL

1

TPC7 Test_Point_20MIL

1

TPC8 Test_Point_20MIL

1

TPC9 Test_Point_20MIL

1

TPC10 Test_Point_20MIL

1

TPC11 Test_Point_20MIL

1

TPC12 Test_Point_20MIL

1

TPC13 Test_Point_20MIL

1 2

RC12196_0402_0.5%

@

1 2
1
1
1

1

1

HDT@

RC107
300_0402_5%

3

RC1310K_0402_5%

Test_Point_20MIL

TPC15

Test_Point_20MIL

TPC16

Test_Point_20MIL

TPC14

TPC17 Test_Point_20MIL

TPC18 Test_Point_20MIL

APU_TDI_H

APU_DBREQ#

1

CC12

0.01U_0201_25V7-K

2

RC108

HDT@

300_0402_5%

1 2

APU_PWROK_BUF

APU_RST#_BUF

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.

eDP

HDM I

Type c0

+0.9VS_VDDP

+3VALW_APU

VDDCR_SOC_VCC_SENSE 59
VDDCR_VCC_SENSE 59

VDDCR_VSS_SENSE 59

+1.8VALW

12

RC22
1K_0402_1%HDT@

Cap close to JHDT.16

2018/03/26

2018/03/26

2018/03/26

APU_ENBKL_R

12

@

RC5
100K_0402_5%

0814:Change EDP lever shift follow 720S dual MOS solution

APU_EDP_PWM_R

12

RC11
100K_0402_5%

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

4

+3VALW +3VS

@

RC136
10K_0402_5%

12

@

RC1

4.7K_0402_5%

1 2

34

D

@

5

QC2B

G

DMN5L06DWK-7 2N SOT363-6

2

G

61

D

QC2A
DMN5L06DWK-7 2N SOT363-6

S

S

@

1 2

RC3 0_0402_5%

+3VS+3VALW

12

RC9
10K_0402_5%

RC7

4.7K_0402_5%

1 2

34

D

5

QC8B

G

DMN5L06DWK-7 2N SOT363-6

61

D

2

QC8A

G

DMN5L06DWK-7 2N SOT363-6

S

APU_TEST14
APU_TEST16
APU_TEST15
APU_TEST17

For AMD suggest HDMI driver check HDMI port enable ,
change DP_STEREOSYNC from
1k pull down to 1K pull high

DP_STEREOSYNC

2019/06/01

2019/06/01

2019/06/01

S

SB00001HM00

@

1 2

RC135 0_0402_5%

RPC3

@
1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

Title

Title

Title

DP/JTAG

DP/JTAG

DP/JTAG

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

ENBKL

PANEL_BKLT_CTRL

+1.8VS

+1.8VS

RC23
1K_0402_1%

1 2

@

RC25
1K_0402_1%

1 2

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

12

RC148
100K_0402_5%

5

ENBKL 42

PANEL_BKLT_CTRL 26

0.1

0.1

0.1

8 65

8 65

8 65

5

4

3

2

1

EGPIO120 Reserves for SSD detect 8/4

If no use need SW internal PU PD

CLKREQ _PCIE1 _LAN#3 6
CLKREQ _PCIE2 _CR#36

CLKREQ _PCIE7 _SSD#25

D_J_CT L26
CLKREQ _PCIE3 _WLA N#37

D D

Vendor

C C

B B

TXC

Siward

+3VS

1

CC19

8.2P_04 02_50V 8-C

2

TABLE of Cystal (YC2)

LCFC P/N

SJ10000IO00

+1.8V_SP I

RC132

+1.8VALW

RC81

RC82

RPC8

CLKREQ _PCIE1 _LAN#

1 8

CLKREQ _PCIE2 _CR#

2 7

CLKREQ _PCIE3 _WLA N#

3 6

CLKREQ _PCIE7 _SSD#

4 5

10K_08 04_8P4 R_5%

RC75

1 2

1M_0402 _5%

YC2

1

OSC1

NC2

NC12OSC2

48MHZ_10 PF_7V4 80000 17

SJ1000 0IO00

Description
S CRYSTAL 48MHZ 10PF +-20PPM 7V48000017
S CRYSTAL 48MHZ 10PF XT L571100-A31-076SJ10000M000

X48M_X1

X48M_X2 X48M_X1

4

3

12

CC20
10P_04 02_50V 8-J

16MB(128Mb )

RPC14

1 8
2 7
3 6
4 5

10K_08 04_8P4 R_5%

1 2

1 2

@

1 2

10K_04 02_5%

10K_04 02_5%

10K_04 02_5%

SPI_SO
SPI_CS 1#
SPI_IO 2
SPI_IO 3

SPI_CS 3#

SPI_CS 2#

SPI_CS 2#_TPM

SSD_SA TA_PCI E_DET #25

CLK_PC IE_LAN36
CLK_PC IE_LAN#36

CLK_PC IE_CR36
CLK_PC IE_CR#36

CLK_PC IE_SSD25
CLK_PC IE_SSD #2 5

FVT Change 2018/08/3 0 AMD request

CLK_PC IE_WL AN37
CLK_PC IE_WL AN#37

CLKREQ _PCIE1 _LAN#
CLKREQ _PCIE2 _CR#
CLKREQ _PCIE7 _SSD#
D_J_CTL
CLKREQ _PCIE3 _WLA N#
SSD_SA TA_PCI E_DET #

CLK_PC IE_LAN
CLK_PC IE_LAN#

CLK_PC IE_CR
CLK_PC IE_CR#

CLK_PC IE_SSD
CLK_PC IE_SSD # CLK_PC IE_SSD #_R

CLK_PC IE_WL AN
CLK_PC IE_WL AN#

X48M_OS C

1

TPC37Test_Point_20MIL

1

TPC47Test_Po int_20MIL

1

TPC48Test_Po int_20MIL

RTCCLK _R

RTCCLK _R25,37

Follow 720S

Vendor

SEIKO

AV18

CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92

AN19

CLK_REQ1_L/AGPIO115

AP19

CLK_REQ2_L/AGPIO116

AT19

CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131

AU19

CLK_REQ4_L/OSCIN/EGPIO132

AW18

CLK_REQ5_L/EGPIO120

AW19

CLK_REQ6_L/EGPIO121

AK1

GPP_CLK0P

AK3

GPP_CLK0N

AM2

GPP_CLK1P

AM4

GPP_CLK1N

AM1

GPP_CLK2P

AM3

GPP_CLK2N

AL2

GPP_CLK3P

AL4

GPP_CLK3N

AN2

GPP_CLK4P

AN4

GPP_CLK4N

AN3

GPP_CLK5P

AP2

GPP_CLK5N

AJ2

GPP_CLK6P

AJ4

GPP_CLK6N

AJ3

X48M_OSC

BB3

X48M_X1

BA5

X48M_X2

AF8

RSVD_76

AF9

RSVD_77

AW14

RTCCLK

RTCCLK

X32K_X 1

AY1

X32K_X1

X32K_X 2

AY4

X32K_X2

1

CC17
10P_04 02_50V 8-J

2

Description

S CRYSTAL 32.768KHZ 9PF X1A000141000200SJ10000IX00

UC8M1

SPI_CS 1#

1

/CS

SPI_SO

2

DO(IO1)

SPI_IO 2

/HOLD or/RESET(IO3)

3

/WP(IO2)

4

GND

W25Q1 28FWS IQ_SO 8

SA0000 8E400

1024：Change SA000077F00 8M to SA00008E400 W25Q128FWSIQ 16M for TPM update

1 2

1 2

32.768K HZ_12.5P F_202 740-PG1 4

SJ1000 0IX00

1

CC16
10P_04 02_50V 8-J

2

LCFC P/N

CLK_PC IE_LAN_ R
CLK_PC IE_LAN# _R

CLK_PC IE_CR_ R
CLK_PC IE_CR_ R#

CLK_PC IE_WL AN_R
CLK_PC IE_WL AN#_R

X48M_X2

RC65

20M_040 2_5%

YC1

CLK_PC IE_SSD _R

1 2

RC48 0_0402 _5%

1 2

RC46 0_0402 _5%

1 2

RC47 0_0402 _5%

1 2

RC52 0_0402 _5%

1 2

RC58 0_0402 _5%

1 2

RC59 0_0402 _5%

1 2

RC54 0_0402 _5%

1 2

RC55 0_0402 _5%

1 2

RC64 0_0402 _5%

TABLE of Cystal (YC2)

SJ10000MU00SIWARD S CRYSTAL 32.768KHZ 9PF XTL721-L150-008

UC1E

CLK/LPC/EMMC/SD/S PI/e SPI/ UART

LPC_PME_L/SD_PWR_CTRL/AGPIO22

UART0_RTS_L/UART2_RXD/EGPIO137
UART0_CTS_L/UART2_TXD/EGPIO135

EGPIO142/UART1_RTS_L/UART3_RXD
EGPIO140/UART1_CTS_L/UART3_TXD

FP5 REV 0.90

PART 5 OF 13

8

VCC

7

6

CLK

5

DI(IO0)

EGPIO70/SD_CLK

LPC_PD_L/SD_CMD/AGPIO21

LAD0/SD_DATA0/EGPIO104
LAD1/SD_DATA1/EGPIO105
LAD2/SD_DATA2/EGPIO106
LAD3/SD_DATA3/EGPIO107

LPCCLK0/EGPIO74

LPC_CLKRUN_L/AGPIO88

LPCCLK1/EGPIO75

SERIRQ/AGPIO87

LFRAME_L/EGPIO109

LPC_RST_L/SD_WP_L/AGPIO32

AGPIO68/SD_CD

SPI_ROM_REQ/EGPIO67

SPI_ROM_GNT/AGPIO76

ESPI_RESET_L/KBRST_L/AGPIO129

ESPI_ALERT_L/LDRQ0_L/EGPIO108

SPI_CLK/ESPI_CLK

SPI_DI/ESPI_DAT1

SPI_DO/ESPI_DAT0

SPI_WP_L/ESPI_DAT2

SPI_HOLD_L/ESPI_DAT3

SPI_CS1_L/EGPIO118

SPI_CS2_L/ESPI_CS_L/AGPIO30

SPI_CS3_L/AGPIO31

SPI_TPM_CS_L/AGPIO29

UART0_RXD/EGPIO136

UART0_TXD/EGPIO138

UART0_INTR/AGPIO139

EGPIO141/UART1_RXD

EGPIO143/UART1_TXD

AGPIO144/UART1_INTR

AMD-RAVE N-FP5_BG A1140

0.085 A

+1.8V_SP I

SPI_IO 3

SPI_CL K

SPI_SI

BD13
BB14

AGPIO2 1
LPC_AD 0_R

BB12

LPC_AD 1_R

BC11

LPC_AD 2_R

BB15

LPC_AD 3_R

BC15

LPC_CL K0

BA15

LPC_CL KRUN#

BC13

LPC_CL K1

BB13
BC12
BA12

LPC_RS T#_R LPC_RS T#

BD11
BA11
BA13

BC8
BB8

BB11
BC6

LDRQ0#

BB7
BA9
BB10

SPI_IO 2

BA10

SPI_IO 3

BC10

SPI_CS 1#

BC9

SPI_CS 2#

BA8

SPI_CS 3#

BA6

SPI_CS 2#_TPM

BD8

UART0_R XD_C

BA16

UART0_T XD_C

BB18

UART0_R TS#

BC17

UART0_C TS#

BA18

UART0_I NTR

BD18

BC18
BA17
BC16
BB19
BB16

1 2

RC69 0_0402 _5%

1

CC18

0.1U_020 1_16V6 -K

2

@

1 2

RC169 0_ 0402_5 %

1 2

RC168 0_ 0402_5 %

1 2

RC45 10_040 2_5%

1 2

RC49 10_040 2_5%

1 2

RC50 10_040 2_5%

1 2

RC51 10_040 2_5%

1 2

RC53 22_040 2_5%

EMC@

1 2

RC56 33_040 2_5%

10_040 2_5%

1 2

RC60

SPI_CS 2#_TPM 44

1 2

RC171 0_ 0402_5 %

F4_LED # 46

+1.8VALW+1.8V_SP I

LPCPD#

FN_LED#
LPC_AD 0

LPC_AD 0 42

LPC_AD 1

LPC_AD 1 42

LPC_AD 2

LPC_AD 2 42

LPC_AD 3

LPC_AD 3 42

CLK_PC I_EC

SERIRQ

SERIRQ 42

LPC_FR AME#

LPC_FR AME# 42

LPC_RS T# 42

EC_SCI #

EC_SCI # 42

KBRST#

KBRST# 42

SPI_CL KSPI_CL K_C

SPI_CL K 44

SPI_SO

SPI_SO 44

SPI_SI

SPI_SI 44

TPM_SER IRQ 44

FVT Change 2018/08/30
Support RS4

FN_LED# 46

CLK_PC I_EC 42

FN_LED#

RC170 10K _0402_ 5%@

CLK_PC I_EC

LPCPD#

RC62

LPC_CL K1

RC115

LPC_RS T#

CC15 150P_ 0402_ 50V8-J

0814:Change F4_LED# GPIO control

F4_LED #F4_LED #

LPC_FR AME#

KBRST#

UART0_R XD_C

UART0_T XD_C

UART0_R TS#

UART0_C TS#

UART0_I NTR

SPI_CL K_C

+3VS

12

1

EMC_NS@

CC102

Close to APU

10P_04 02_50V 8-J

2

10K_04 02_5%

1 2

@

10K_04 02_5%

1 2

@

1 2

+3VS

10K_04 02_5%

1 2

RC166

@

10K_04 02_5%

1 2

RC139

@

10K_04 02_5%

1 2

RC67

1K_040 2_5%

1K_040 2_5%

1K_040 2_5%

1K_040 2_5%

1K_040 2_5%

10K_04 02_5%

+1.8VS

Stra p

1 2

RC73

@

1 2

RC74

@

1 2

RC71

@

1 2

RC72

@

1 2

RC116

@

1 2

RC83

LPC debug connector 20PIN, only reserve test point

As below is CRB circuit

LPC_RS T#

APU_SMB_ CK0

APU_SMB_ CK07,14,15

A A

5

4

LPC ROM EMULATOR HEADER

+3VS_AP U+3VALW

RC86

RC85

LPC@

LPC@

0_0402 _5%

0_0402 _5%

1 2

1 2

1 2

RC87 0_0402 _5%LPC@

1 2

RC89 0_0402 _5%LPC@

0.1U_040 2_10V7 -K

LPC_RS T#_H

LPCRUNPW R

APU_SMB_ CK0_LP C

1

1

CC22

CC23

0.1U_040 2_10V7 -K

2

2

LPC@

LPC@

PIN4 should be removed as a Key

APU_SMB1 _DATA_ LPC

SERIRQ

LDRQ0#

+3VS_AP U

RC91

RC92

DAISY CHAIN ROUTI NG FOR LPC SIGNALS

1 2

RC88 0_0 402_5%@

LPC@

1 2

RC90 0_0 402_5%

LPC@

10K_04 02_5%

1 2

@

10K_04 02_5%

1 2

LPCPD#

LPC_CL KRUN#

PM_SLP_ S5#

APU_SMB_ DA0

PM_SLP_ S5# 7,42

APU_SMB_ DA0 7,14,15

Security Classif ication

Security Classif ication

Security Classif ication

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2019/06/01

2019/06/01

2019/06/01

Title

Title

Title

CLK/LPC

CLK/LPC

CLK/LPC

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

D

D

D

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Date: Shee t of

Date: Shee t of

Date: Shee t of

1

9 65

9 65

9 65

0.1

0.1

0.1

1

IT12@

1

IT14@

1

IT16@

1

IT17@

3

UNNAMED_16_CON20_I130_P6

1

IT10 @

1

IT21 @

1

IT22 @

1

IT24 @

5

4

3

2

1

D D

T11

AC7

Y9

Y10

W11
W12

V9

V10

AA12
AC10

1 2

+3VALW

USB20_P 0
USB20_N0

USB20_P 1
USB20_N1

USB20_P 2
USB20_N2

USB20_P 3
USB20_N3

USB20_P _WLAN
USB20_N_ WLAN

USB20_P 5_CAMER A
USB20_N5 _CAMERA

USBC_I2 C_SCL

USBC_I2 C_SDA

INT#_TYP EC_CPU
USB_OC0 #
USB_OC1 #
USB_OC2 #

AGPIO1 3

@

RC118
10K_04 02_5%

RPC15

1 8
2 7
3 6
4 5

10K_08 04_8P4 R_5%

AE7
AE6

AG10

AG9

AF12
AF11

AE10

AE9

AJ12
AJ11

AD9
AD8

AM6

AM7

AK10

AK9
AL9
AL8
AW7

AT12

USBC0 For Full type c

C C

+1.8VALW

14

23

RPC18
1/16W_ 4.7K_5% _4P2R _0404

USB P0

USB3.0 Port1

USB P1

USB3.0 port2 AOU

USB P2

IO BOARD

USB P3

Blue Tooth

USB P4

Int. CAMERA

USB P5

USB20_P 033
USB20_N033

USB20_P 135
USB20_N135

USB20_P 235
USB20_N235

USB20_P 336
USB20_N336

USB20_P _WLAN37
USB20_N_ WLAN37

USB20_P 5_CAMER A26
USB20_N5 _CAMERA26

SIT Change 2018/11/07

INT#_TYP EC_CPU31
USB_OC0 #35
USB_OC1 #35
USB_OC2 #36

B B

RSVD_32

RSVD_66

RSVD_55
RSVD_56

RSVD_47
RSVD_48

RSVD_38
RSVD_39

RSVD_64
RSVD_68

USB_0_DP0
USB_0_DM0

USB_0_DP1
USB_0_DM1

USB_0_DP2
USB_0_DM2

USB_0_DP3
USB_0_DM3

USB_1_DP0
USB_1_DM0

USB_1_DP1
USB_1_DM1

USBC_I2C_SCL

USBC_I2C_SDA

USB_OC0_L/AGPIO16
USB_OC1_L/AGPIO17
USB_OC2_L/AGPIO18
USB_OC3_L/AGPIO24
AGPIO14/USB_OC4_L
AGPIO13/USB_OC5_L

USB_OC1 #
USB_OC0 #
USB_OC2 #

UC1L

RSVD

RSVD_62
RSVD_61
RSVD_65

RSVD_72

RSVD_67
RSVD_63

RSVD_33
RSVD_73

RSVD_53
RSVD_54

RSVD_45
RSVD_46

FP5 REV 0.90

PART 12 OF 13

AMD-RAVE N-FP5_BG A1140

UC1J

USB

USBC0_A2/USB_0_TXP0/DP3_TXP2
USBC0_A3/USB_0_TXN0/DP3_TXN2

USBC0_B11/USB_0_RXP0/DP3_TXP3
USBC0_B10/USB_0_RXN0/DP3_TXN3

USBC1_A2/USB_0_TXP3/DP2_TXP2
USBC1_A3/USB_0_TXN3/DP2_TXN2

USBC1_B11/USB_0_RXP3/DP2_TXP3
USBC1_B10/USB_0_RXN3/DP2_TXN3

FP5 REV 0.90

PART 10 OF 13

AMD-RAVE N-FP5_BG A1140

AA9
AA8
AC6

AD11

AC9
AA11

T12
AD12

Y6
Y7

W8
W9

USBC0_B2/DP3_TXP1
USBC0_B3/DP3_TXN1

USBC0_A11/DP3_TXP0
USBC0_A10/DP3_TXN0

USB_0_TXP1
USB_0_TXN1

USB_0_RXP1
USB_0_RXN1

USB_0_TXP2
USB_0_TXN2

USB_0_RXP2
USB_0_RXN2

USBC1_B2/DP2_TXP1
USBC1_B3/DP2_TXN1

USBC1_A11/DP2_TXP0
USBC1_A10/DP2_TXN0

USB_1_TXP0
USB_1_TXN0

USB_1_RXP0
USB_1_RXN0

USBC0_0 _TXP0

AD2

USBC0_0 _TXN0

AD4

USBC0_0 _RXP0

AC2

USBC0_0 _RXN0

AC4

USBC0_1 _TXP0

AF4

USBC0_1 _TXN0

AF2

USBC0_1 _RXP0

AE3

USBC0_1 _RXN0

AE1

USB3P1_ TXP

AG3

USB3P1_ TXN

AG1

USB3P1_ RXP

AJ9

USB3P1_ RXN

AJ8

USB3P2_ TXP

AG4

USB3P2_ TXN

AG2

USB3P2_ RXP

AG7

USB3P2_ RXN

AG6

AA2
AA4

Y1
Y3

AC1
AC3

AB2
AB4

AH4
AH2

AK7
AK6

Vgs(th) max= 1V

USBC_I2 C_SCL

USBC_I2 C_SDA

USBC0_0 _TXP0 33
USBC0_0 _TXN0 33

USBC0_0 _RXP0 33
USBC0_0 _RXN0 33

USBC0_1 _TXP0 33
USBC0_1 _TXN0 33

USBC0_1 _RXP0 33
USBC0_1 _RXN0 33

USB3P1_ TXP 35
USB3P1_ TXN 3 5

USB3P1_ RXP 35
USB3P1_ RXN 35

USB3P2_ TXP 35
USB3P2_ TXN 3 5

USB3P2_ RXP 35
USB3P2_ RXN 35

USB Typec 0

USB Typec integrated USBC SWITCH with DP

USB3.0 Port1

USB3.0 port2 AOU

+1.8VALW

G

2

S

61

D

QC4A
DMN5L06D WK-7 2N S OT363-6

SB0000 1HM00

S

QC4B
DMN5L06D WK-7 2N S OT363-6

5

G

34

D

PD I2C port

REPETE R_SCL

REPETE R_SDA

USBC0_A2/USB_0_ TXP0/DP3_TXP[ 2]1
USBC0_A3/USB_0_TXN0/DP3_TXN[2]1 O-IOVP-D USB Super Speed Port Transmit
USBC0_B11/USB_0 _RXP0/DP3_TXP [3]1
USBC0_B10/USB_0_RXN0/DP3_TXN[3]1 B-IOVP-D USB Super Speed Port Receive
USBC1_A11/DP 2_TXP[0]1
USBC1_A10/DP2_TXN[0]1 B-IOVP-D USB Super Speed Port Receive
USBC1_B2/DP 2_TXP[1]1
USBC1_B3/DP2_TXN[1]1 O-IOVP-D USB Super Speed Port Transmit
USBC1_A2/USB_0_ TXP3/DP2_TXP[ 2]1
USBC1_A3/USB_0_TXN3/DP2_TXN[2]1 O-IOVP-D USB Super Speed Port Transmit
USBC1_B11/USB_0 _RXP3/DP2_TXP [3]1
B-IOVP-D USB Super Speed Port Receive

USBC0_A11/DP 3_TXP[0]1
USBC0_A10/DP3_TXN[0]1 B-IOVP-D USB Super Speed Port Receive
USBC0_B2/DP 3_TXP[1]1
USBC0_B3/DP3_TXN[1]1 O-IOVP-D USB Super Speed Port Transmit

REPETE R_SCL 31,33

REPETE R_SDA 31,33

A A

Title

Title

Security Classif ication

Security Classif ication

Security Classif ication

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2019/06/01

2019/06/01

2019/06/01

Title

USB/WIFI

USB/WIFI

USB/WIFI

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

D

D

D

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Date: Shee t of

Date: Shee t of

Date: Shee t of

1

10 65

10 65

10 65

0.1

0.1

0.1

5

D D

C C

4

UC1M

CAM0_CSI2_CLOCKP
CAM0_CSI2_CLOCKN

CAM0_CSI2_DATAP0
CAM0_CSI2_DATAN0

CAM0_CSI2_DATAP1
CAM0_CSI2_DATAN1

CAM0_CSI2_DATAP2
CAM0_CSI2_DATAN2

CAM0_CSI2_DATAP3
CAM0_CSI2_DATAN3

CAM1_CSI2_CLOCKP
CAM1_CSI2_CLOCKN

CAM1_CSI2_DATAP0
CAM1_CSI2_DATAN0

CAM1_CSI2_DATAP1
CAM1_CSI2_DATAN1

RSVD_6

CAMERAS

CAM0_SHUTDOWN

CAM1_SHUTDOWN

FP5 REV 0.90

PART 13 OF 13

AMD-RAVE N-FP5_BG A1140

CAM0_I2C_SCL
CAM0_I2C_SDA

CAM1_I2C_SCL
CAM1_I2C_SDA

CAM_PRIV_LED

A18
C18

A15
C15

B16
C16

C19
B18

B17
D17

D12
B12

C13
A13

B11
C12

J13

CAM0_CLK

CAM1_CLK

CAM_IR_ILLU

3

B15

D15
C14

B13

B10

A11
C11

D11

D13
D10

2

1

B B

A A

Title

Title

Security Classif ication

Security Classif ication

Security Classif ication

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2019/06/01

2019/06/01

2019/06/01

Title

CAM

CAM

CAM

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

D

D

D

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Date: Shee t of

Date: Shee t of

Date: Shee t of

1

11 65

11 65

11 65

0.1

0.1

0.1

5

4

3

2

1

D D

All BU(on bottom side under SOC)

+3VS_AP U+3VS

@

2

J2 JUMP _43X39

112

+3VALW _APU+3VALW

@

2

J3 JUMP _43X39

112

+1.8VS

+3VS_AP U +1.8 VS

BUBO BO BUBO BO

1

1

CC46

CC38

2

2

22U_0603_6.3V6-M

1U_0201_6.3V6-M

C C

+3VALW _APU +1.8VALW

BU

BO

1

1

CC71

CC72

2

2

22U_0603_6.3V6-M

1U_0201_6.3V6-M

+0.9VALW _VDD P

1

1

CC39

CD@

2

2

22U_0603_6.3V6-M

1U_0201_6.3V6-M

BO BUBO BO

1

1

CC73

CD@

2

2

1U_0201_6.3V6-M

22U_0603_6.3V6-M

1

1

CC47

CC41

CC40

CC74

CD@

2

2

1U_0402_6.3V7-K

1U_0201_6.3V6-M

1

1

CC76

CC75

CD@

2

2

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1A

BU

BO BOB U

1

B B

CC83

2

22U_0603_6.3V6-M

+0.9VS_V DDP

BO BU BOBUBO BU BU BO BO BO BU

1

CC89

2

22U_0603_6.3V6-M

1

1

CC84

2

1U_0201_6.3V6-M

1

CC90

2

1U_0201_6.3V6-M

22U_0603_6.3V6-M

1

CC85

CC86

CD@

2

2

1U_0201_6.3V6-M

1U_0201_6.3V6-M

0815：Change for 0201 for layout

1

1

CC91

2

2

1U_0201_6.3V6-M

1

1

CC92

CC93

2

1U_0201_6.3V6-M

1

CC94

CC95

2

2

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1

1

CC97

CC96

2

2

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

+1.8VALW

12

RC156
0_0603 _5%

RC100

@

+VDDIO_ AZ

1 2

0_0603_5%

1

CC55

BO

2

22U_0603_6.3V6-M

0823： Chaneg from 1.5V to 1.8V HDA for codec

+1.8VS+1.8VALW+3VALW_APU+0.9VALW_VDDP

2A

0.5A

0.25 A

+0.9VS_VDDP

4A

+RTC_LDO

1K_040 2_5%

1

1

CC99

CC98

CD@

2

2

180P_0201_25V7-K

BU

+3VS_APU

1 2

1

CC56

1U_0402_6.3V6-K

2

0.25 A

RC101

+1.2V

CC87

+VDDIO_ AZ

+VDDBT_ RTC

1

2

1U_0402_6.3V6-K

+RTC_LD O

12

13

D

S

1

2

+VDDCR_ SOC

10A

0.1A

CC88

0.22U_0402_10V6-K

R395

@

470_06 03_5%

@

QC7

2

G

2N7002K W_SOT 323-3

M15
M18
M19
N16
N18
N20
P17
P19
R18
R20

T19
U18
U20
V19
W18
W20
Y19

T32
V28
W28
W32
Y22
Y25
Y28

AA20
AA23
AA26
AA28
AA32
AC20
AC22
AC25
AC28
AD23
AD26
AD28
AD32
AE20
AE22
AE25
AE28
AF23
AF26
AF28
AF32
AG20
AG22
AG25
AG28
AJ20
AJ23
AJ26
AJ28
AJ32
AK28
AL28
AL32

AP12

AL18

AM17

AL20

AM19

AL19

AM18

AL17

AM16

AL14
AL15

AM14

AL13
AM12
AM13

AN12

AN13

AT11

EC_RTC RST#_O N

12

VDDCR_SOC_1
VDDCR_SOC_2
VDDCR_SOC_3
VDDCR_SOC_4
VDDCR_SOC_5
VDDCR_SOC_6
VDDCR_SOC_7
VDDCR_SOC_8
VDDCR_SOC_9
VDDCR_SOC_10
VDDCR_SOC_11
VDDCR_SOC_12
VDDCR_SOC_13
VDDCR_SOC_14
VDDCR_SOC_15
VDDCR_SOC_16
VDDCR_SOC_17

VDDIO_MEM_S3_1
VDDIO_MEM_S3_2
VDDIO_MEM_S3_3
VDDIO_MEM_S3_4
VDDIO_MEM_S3_5
VDDIO_MEM_S3_6
VDDIO_MEM_S3_7
VDDIO_MEM_S3_8
VDDIO_MEM_S3_9
VDDIO_MEM_S3_10
VDDIO_MEM_S3_11
VDDIO_MEM_S3_12
VDDIO_MEM_S3_13
VDDIO_MEM_S3_14
VDDIO_MEM_S3_15
VDDIO_MEM_S3_16
VDDIO_MEM_S3_17
VDDIO_MEM_S3_18
VDDIO_MEM_S3_19
VDDIO_MEM_S3_20
VDDIO_MEM_S3_21
VDDIO_MEM_S3_22
VDDIO_MEM_S3_23
VDDIO_MEM_S3_24
VDDIO_MEM_S3_25
VDDIO_MEM_S3_26
VDDIO_MEM_S3_27
VDDIO_MEM_S3_28
VDDIO_MEM_S3_29
VDDIO_MEM_S3_30
VDDIO_MEM_S3_31
VDDIO_MEM_S3_32
VDDIO_MEM_S3_33
VDDIO_MEM_S3_34
VDDIO_MEM_S3_35
VDDIO_MEM_S3_36
VDDIO_MEM_S3_37
VDDIO_MEM_S3_38
VDDIO_MEM_S3_39
VDDIO_MEM_S3_40

VDDIO_AUDIO

VDD_33_1
VDD_33_2

VDD_18_1
VDD_18_2

VDD_18_S5_1
VDD_18_S5_2

VDD_33_S5_1
VDD_33_S5_2

VDDP_S5_1
VDDP_S5_2
VDDP_S5_3

VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5

VDDBT_RTC_G

@

RC145
100K_0 402_5%

UC1F

POWER

VDDCR_10
VDDCR_11
VDDCR_12
VDDCR_13
VDDCR_14
VDDCR_15
VDDCR_16
VDDCR_17
VDDCR_18
VDDCR_19
VDDCR_20
VDDCR_21
VDDCR_22
VDDCR_23
VDDCR_24
VDDCR_25
VDDCR_26
VDDCR_27
VDDCR_28
VDDCR_29
VDDCR_30
VDDCR_31
VDDCR_32
VDDCR_33
VDDCR_34
VDDCR_35
VDDCR_36
VDDCR_37
VDDCR_38
VDDCR_39
VDDCR_40
VDDCR_41
VDDCR_42
VDDCR_43
VDDCR_44
VDDCR_45
VDDCR_46
VDDCR_47
VDDCR_48
VDDCR_49
VDDCR_50
VDDCR_51
VDDCR_52
VDDCR_53
VDDCR_54
VDDCR_55
VDDCR_56
VDDCR_57
VDDCR_58
VDDCR_59
VDDCR_60
VDDCR_61
VDDCR_62
VDDCR_63
VDDCR_64
VDDCR_65
VDDCR_66
VDDCR_67
VDDCR_68
VDDCR_69
VDDCR_70
VDDCR_71
VDDCR_72
VDDCR_73
VDDCR_74
VDDCR_75
VDDCR_76
VDDCR_77
VDDCR_78
VDDCR_79
VDDCR_80
VDDCR_81
VDDCR_82
VDDCR_83

FP5 REV 0.90
PART 6 OF 13

AMD-RAVE N-FP5_BG A1140

EC_RTC RST#_O N 42

VDDCR_1
VDDCR_2
VDDCR_3
VDDCR_4
VDDCR_5
VDDCR_6
VDDCR_7
VDDCR_8
VDDCR_9

+VDDC_V DD

35A

G7
G10
G12
G14
H8
H11
H15
K7
K12
K14
L8
M7
M10
N14
P7
P10
P13
P15
R8
R14
R16
T7
T10
T13
T15
T17
U14
U16
V13
V15
V17
W7
W10
W14
W16
Y8
Y13
Y15
Y17
AA7
AA10
AA14
AA16
AA18
AB13
AB15
AB17
AB19
AC14
AC16
AC18
AD7
AD10
AD13
AD15
AD17
AD19
AE8
AE14
AE16
AE18
AF7
AF10
AF13
AF15
AF17
AF19
AG14
AG16
AG18
AH13
AH15
AH17
AH19
AJ7
AJ10
AJ14
AJ16
AJ18
AK13
AK15
AK17
AK19

+1.2V

1

CC59

2

22U_0603_6.3V6-M

+1.2V

EMC@

1

CC77

2

0.22U_0402_10V6-K

All BU(on bottom side under SOC)

All BU(on bottom side under SOC)

COST DOWN 4 PIECES

CD@

CD@

1

1

CC60

CC61

2

2

22U_0603_6.3V6-M

22U_0603_6.3V6-M

All BU(on bottom side under SOC)

DECOUPLING BETWEEN PROCESSOR AND DIMMs

ACROSS VDDIO AND VSS SPLIT

1

1

CC79

CC78

2

2

0.22U_0402_10V6-K

0.22U_0402_10V6-K

All BU(on bottom side under SOC)

4x0.22UF (0402)+2x180PF(0402)

Delete 22U 0603 and place PWR portion under SOC

Need discuss if space enough ,reserves others component

+VDDC_V DD

180P_0402_50V8-J

1

CC44

2

+VDDCR_ SOC

180P_0402_50V8-J

1U_0402_6.3V6-K

1

1

CC57

CC58

2

2

CD@

1

1

1

1

CC62

CC63

2

2

22U_0603_6.3V6-M

0.22U_0402_10V6-K

2

22U_0603_6.3V6-M

22U_0603_6.3V6-M

CD@

EMC@

1

1

CC81

CC80

2

2

180P_0402_50V8-J

180P_0201_25V7-K

1

CC64

CC65

2

2

22U_0603_6.3V6-M

22U_0603_6.3V6-M

1

CC82

2

1

1

CC66

2

22U_0603_6.3V6-M

1

CC68

CC67

2

2

1U_0402_6.3V6-K

1U_0402_6.3V6-K

180P_0402_50V8-J

1

CC69

CC70

2

A A

Title

Title

Security Classif ication

Security Classif ication

Security Classif ication

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2019/06/01

2019/06/01

2019/06/01

Title

Power

Power

Power

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

D

D

D

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Date: Shee t of

Date: Shee t of

Date: Shee t of

1

12 65

12 65

12 65

0.1

0.1

0.1

5

D D

4

3

2

1

UC1G

GND

N12

VSS_316

A3

VSS_1

A5

VSS_2

A7

VSS_3

A10

VSS_4

A12

VSS_5

A14

VSS_6

A16

VSS_7

A19

VSS_8

A21

VSS_9

A23

VSS_10

A26

VSS_11

A30

VSS_12

C3

VSS_13

C32

VSS_14

D16

VSS_15

D18

VSS_16

D20

VSS_17

E7

VSS_18

E8

VSS_19

E10

VSS_20

E11

VSS_21

E12

VSS_22

E13

VSS_23

E14

VSS_24

E15

VSS_25

E16

C C

B B

VSS_26

E18

VSS_27

E19

VSS_28

E20

VSS_29

E21

VSS_30

E22

VSS_31

E23

VSS_32

E25

VSS_33

E26

VSS_34

E27

VSS_35

F5

VSS_36

F28

VSS_37

G1

VSS_38

G5

VSS_39

G16

VSS_40

G19

VSS_41

G21

VSS_42

G23

VSS_43

G26

VSS_44

G28

VSS_45

G32

VSS_46

H5

VSS_47

H13

VSS_48

H18

VSS_49

H20

VSS_50

H22

VSS_51

H25

VSS_52

H28

VSS_53

K1

VSS_54

K5

VSS_55

K16

VSS_56

K19

VSS_57

K21

VSS_58

K22

VSS_59

K26

VSS_60

K28

VSS_61

VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123

FP5 REV 0.90
PART 7 OF 13

AMD-RAVE N-FP5_BG A1140

K32
L5
L13
L15
L18
L20
L25
L28
M1
M5
M12
M21
M23
M26
M28
M32
N4
N5
N8
N11
N13
N15
N17
N19
N22
N25
N28
P1
P5
P14
P16
P18
P20
P23
P26
P28
P32
R5
R11
R12
R13
R15
R17
R19
R22
R25
R28
R30
T1
T5
T14
T16
T18
T20
T23
T26
T28
U13
U15
U17
U19
V5

UC1K

GND/RSVD

AR5

VSS_248

AR7

VSS_249

AR12

VSS_250

AR14

VSS_251

AR16

VSS_252

AR19

VSS_253

AR21

VSS_254

AR26

VSS_255

AR28

VSS_256

AR32

VSS_257

AU5

VSS_258

AU8

VSS_259

AU11

VSS_260

AU13

VSS_261

AU15

VSS_262

AU18

VSS_263

AU20

VSS_264

AU22

VSS_265

AU25

VSS_266

AU28

VSS_267

AV1

VSS_268

AV5

VSS_269

AV7

VSS_270

AV10

VSS_271

AV12

VSS_272

AV14

VSS_273

AV16

VSS_274

AV19

VSS_275

AV21

VSS_276

AV23

VSS_277

AV26

VSS_278

AV28

VSS_279

AV32

VSS_280

AW5

VSS_281

AW28

VSS_282

AY6

VSS_283

AY7

VSS_284

AY8

VSS_285

AY10

VSS_286

AY11

VSS_287

AY12

VSS_288

AY13

VSS_289

AY14

VSS_290

AY15

VSS_291

AY16

VSS_292

AY18

VSS_293

AY19

VSS_294

AY20

VSS_295

AY21

VSS_296

AY22

VSS_297

AY23

VSS_298

AY25

VSS_299

AY26

VSS_300

AY27

VSS_301

BB1

VSS_302

BB20

VSS_303

BB32

VSS_304

BD3

VSS_305

BD7

VSS_306

BD10

VSS_307

BD12

VSS_308

BD14

VSS_309

VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315

RSVD_1
RSVD_5
RSVD_7
RSVD_8

RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13
RSVD_22
RSVD_23
RSVD_30
RSVD_31
RSVD_37
RSVD_44
RSVD_49
RSVD_50
RSVD_57
RSVD_58
RSVD_59
RSVD_60
RSVD_69
RSVD_70
RSVD_71
RSVD_74
RSVD_75
RSVD_78
RSVD_79
RSVD_80
RSVD_81
RSVD_82
RSVD_83
RSVD_87
RSVD_88

RSVD_14
RSVD_84
RSVD_85
RSVD_86

FP5 REV 0.90

PART 11 OF 13

AMD-RAVE N-FP5_BG A1140

BD16
BD19
BD21
BD23
BD26
BD30

B20
G3
J20
K3
K6
K20
M3
M6
M13
P6
P22
T3
T6
T29
W6
W21
W22
Y21
Y27
AA3
AA6
AC29
AD3
AD6
AF3
AF6
AF30
AJ6
AJ24
AK23
AK27
AL3
AN29
AN31

M14
AL6
AL11
AN16

UC1H

GND

V8

VSS_124

V11

VSS_125

V12

VSS_126

V14

VSS_127

V16

VSS_128

V18

VSS_129

V20

VSS_130

V22

VSS_131

V25

VSS_132

W1

VSS_133

W5

VSS_134

W13

VSS_135

W15

VSS_136

W17

VSS_137

W19

VSS_138

W23

VSS_139

W26

VSS_140

Y5

VSS_141

Y11

VSS_142

Y12

VSS_143

Y14

VSS_144

Y16

VSS_145

Y18

VSS_146

Y20

VSS_147

AA1

VSS_148

AA5

VSS_149

AA13

VSS_150

AA15

VSS_151

AA17

VSS_152

AA19

VSS_153

AB14

VSS_154

AB16

VSS_155

AB18

VSS_156

AB20

VSS_157

AC5

VSS_158

AC8

VSS_159

AC11

VSS_160

AC12

VSS_161

AC13

VSS_162

AC15

VSS_163

AC17

VSS_164

AC19

VSS_165

AD1

VSS_166

AD5

VSS_167

AD14

VSS_168

AD16

VSS_169

AD18

VSS_170

AD20

VSS_171

AE5

VSS_172

AE11

VSS_173

AE12

VSS_174

AE13

VSS_175

AE15

VSS_176

AE17

VSS_177

AE19

VSS_178

AF1

VSS_179

AF5

VSS_180

AF14

VSS_181

AF16

VSS_182

AF18

VSS_183

AF20

VSS_184

AG5

VSS_185

VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247

FP5 REV 0.90
PART 8 OF 13

AMD-RAVE N-FP5_BG A1140

AG8
AG11
AG12
AG13
AG15
AG17
AG19
AH14
AH16
AH18
AH20
AJ1
AJ5
AJ13
AJ15
AJ17
AJ19
AK5
AK8
AK11
AK12
AK14
AK16
AK18
AK20
AK22
AK25
AL1
AL5
AL7
AL10
AL12
AL16
AL23
AL26
AM5
AM8
AM15
AM20
AM22
AM25
AM28
AN1
AN5
AN7
AN10
AN15
AN18
AN21
AN23
AN26
AN28
AN32
AP5
AP8
AP13
AP15
AP18
AP20
AP25
AP28
AR1

A A

Title

Title

Security Classif ication

Security Classif ication

Security Classif ication

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2019/06/01

2019/06/01

2019/06/01

Title

GND

GND

GND

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

D

D

D

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Date: Shee t of

Date: Shee t of

Date: Shee t of

1

13 65

13 65

13 65

0.1

0.1

0.1

5

+1.2V

12

RD1

D D

DDR_A_D5

C C

B B

DDR_A_CKE06

DDR_A_BG16
DDR_A_BG06

DDR_A_D1

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D7

DDR_A_D3

DDR_A_D10

DDR_A_D13

DDRA_MA_DM1

DDR_A_D15

DDR_A_D14

DDR_A_D21

DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D23

DDR_A_D19

DDR_A_D29

DDR_A_D25

DDRA_MA_DM3

DDR_A_D30

DDR_A_D26

DDR_A_BG1
DDR_A_BG0

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA6

1K_0402_1%

M_VREF_CA_DIMMA

12

+1.2V +1.2V

RD2

1K_0402_1%

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129

1

CD13

0.1U_0402_10V7-K

2

JDIMM1A

1

VSS_1

3

DQ5

5

VSS_3

7

DQ1

9

VSS_5
DQS0_C
DQS0_t
VSS_8
DQ7
VSS_10
DQ3
VSS_12
DQ13
VSS_14
DQ9
VSS_16
DM1_n/DBl_n
VSS_17
DQ15
VSS_19
DQ10
VSS_21
DQ21
VSS_23
DQ17
VSS_25
DQS2_c
DQS2_t
VSS_28
DQ23
VSS_30
DQ19
VSS_32
DQ29
VSS_34
DQ25
VSS_36
DM3_n/DBl3_n
VSS_37
DQ30
VSS_39
DQ26
VSS_41
CB5/NC
VSS_43
CB1/NC
VSS_45
DQS8_c

DM8_n/DBl_n/NC
DQS8_t
VSS_48
CB2/NC
VSS_50
CB3/NC
VSS_52
CKE0
VDD_1
BG1
BG0
VDD_3
A12
A9
VDD_5
A8
A6
VDD_7

ARGOS_D4AR0-26005-1P40

ME@

VSS_2

VSS_4

VSS_6

DM0_n/DBl0_n

VSS_7

VSS_9

VSS_11

VSS_13

VSS_15

DQS1_c

DQS1_t
VSS_18

VSS_20

VSS_22

VSS_24

VSS_26

DM2_n/DBl2_n

VSS_27

VSS_29

VSS_31

VSS_33

VSS_35

DQS3_c

DQS3_t
VSS_38

VSS_40

VSS_42
CB4/NC
VSS_44
CB0/NC
VSS_46

VSS_47
CB6/NC
VSS_49
CB7/NC
VSS_51

RESET_n

VDD_2
ACT_n

ALERT_n

VDD_4

VDD_6

VDD_8

DQ4

DQ0

DQ6

DQ2

DQ12

DQ8

DQ14

DQ11

DQ20

DQ16

DQ22

DQ18

DQ28

DQ24

DQ31

DQ27

CKE1

A11

A7

A5
A4

4

+1.2V

1

2

+1.2V

2

0.1U_0402_10V7-K

1

2

DDR_A_D4

4
6

DDR_A_D0

8
10

DDRA_MA_DM0

12
14

DDR_A_D6

16
18

DDR_A_D2

20
22

DDR_A_D12

24
26

DDR_A_D8

28
30

DDR_A_DQS#1

32

DDR_A_DQS1

34
36

DDR_A_D9

38
40

DDR_A_D11

42
44

DDR_A_D20

46
48

DDR_A_D16

50
52

DDRA_MA_DM2

54
56

DDR_A_D22

58
60

DDR_A_D18

62
64

DDR_A_D28

66
68

DDR_A_D24

70
72

DDR_A_DQS#3

74

DDR_A_DQS3

76
78

DDR_A_D31

80
82

DDR_A_D27

84
86
88
90
92
94
96
98
100
102
104
106

DDR4_A_DRAMRST#

108

DDR_A_CKE1DDR_A_CKE0

110
112

DDR_A_ACT_N

114

DDR_A_ALERT_N

116
118

DDR_A_MA11

120

DDR_A_MA7

122
124

DDR_A_MA5

126

DDR_A_MA4

128
130

CD1

CD@

10U_0402_6.3V6-M

CD14

1

CD2

10U_0402_6.3V6-M

2

2

CD15

0.1U_0402_10V7-K

1

+1.2V

12

@

1

CD30

EMC_NS@

0.1U_0402_10V7-K

2

1

CD3

CD@

10U_0402_6.3V6-M

2

2

CD16

0.1U_0402_10V7-K

1

RD9

1K_0402_1%

DDR4_A_DRAMRST# 6
DDR_A_CKE1 6

DDR_A_ACT_N 6
DDR_A_ALERT_N 6

2

CD17

EMC@

0.1U_0402_10V7-K

1

+3VS +3VS +3VS

12

RD4

@

10K_0402_5%

SA0_CHA_P SA1_CHA_P SA2_CHA_P

12

R1
0_0402_5%

SPD Address = 0H

1

CD4

10U_0402_6.3V6-M

2

12

12

+3VS

3

1

CD5

10U_0402_6.3V6-M

2

2

CD18

0.1U_0402_10V7-K

1

DDRA_MA_DM[0..7] 6

DDR_A_D[0..63] 6

DDR_A_MA[0..13] 6

DDR_A_DQS#[0..7] 6

DDR_A_DQS[0..7] 6

RD5

@

10K_0402_5%

RD7
0_0402_5%

RD10

1 2

0_0402_5%

12

RD6

@

10K_0402_5%

12

RD8
0_0402_5%

1

CD6

10U_0402_6.3V6-M

2

2

CD19

0.1U_0402_10V7-K

1

SA_CLK_DDR06

SA_CLK_DDR#06

DDR_A_PARITY6

DDR_A_BA16

DDR_A_CS0#6

DDR_A_WE#6

DDR_A_ODT06
DDR_A_CS1#6

DDR_A_ODT16

APU_SMB_CK07,9,15

CD@

2

CD20

0.1U_0402_10V7-K

1

1

CD28

0.1U_0402_10V7-K

2

1

CD7

10U_0402_6.3V6-M

2

EMC@

DDR_A_MA3
DDR_A_MA1

SA_CLK_DDR0
SA_CLK_DDR#0

DDR_A_PARITY

DDR_A_BA1

DDR_A_CS0#

DDR_A_ODT0
DDR_A_CS1#

DDR_A_ODT1

DDR_A_D37

DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D38

DDR_A_D34

DDR_A_D44

DDR_A_D40

DDRA_MA_DM5

DDR_A_D46

DDR_A_D42

DDR_A_D52

DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D55

DDR_A_D51

DDR_A_D61

DDR_A_D60

DDRA_MA_DM7

DDR_A_D56

DDR_A_D57

APU_SMB_CK0

2

CD21

0.1U_0402_10V7-K

1

1

CD29

2.2U_0402_6.3V6-M

2

1

CD8

10U_0402_6.3V6-M

2

+1.2V+2.5V

2

1

CD75

@

100U_1206_6.3V6M

2

JDIMM1B

131

A3

133

A1

135

VDD_9

137

CK0_t

139

CK0_c

141

VDD_11

143

Parity

145

BA1

147

VDD_13

149

CS0_n

151

A14/WE_n

153

VDD_15

155

ODT0

157

CS1_n

159

VDD_17

161

ODT1

163

VDD_19

165

C1/CS3_n/NC

167

VSS_53

169

DQ37

171

VSS_55

173

DQ33

175

VSS_57

177

DQS4_c

179

DQS4_t

181

VSS_60

183

DQ38

185

VSS_62

187

DQ34

189

VSS_64

191

DQ44

193

VSS_66

195

DQ40

197

VSS_68

199

DM5_n/DBl5_n

201

VSS_69

203

DQ46

205

VSS_71

207

DQ42

209

VSS_73

211

DQ52

213

VSS_75

215

DQ49

217

VSS_77

219

DQS6_c

221

DQS6_t

223

VSS_80

225

DQS5

227

VSS_82

229

DQ51

231

VSS_84

233

DQ61

235

VSS_86

237

DQ56

239

VSS_88

241

DM7_n/DBl7_n

243

VSS_89

245

DQ62

247

VSS_91

249

DQ58

251

VSS_93

253

SCL

255

VDDSPD

257

VPP_1

259

VPP_2

261

GND_1

ME@

1

CD74

100U_1206_6.3V6M

2

EVENT_n/NF

VDD_10

CK1_t/NF

CK1_c/NF

VDD_12

A10/AP

VDD_14

BA0

A16/RAS_n

VDD_16

A15/CAS_n

A13

VDD_18

C0/CS2_n/NC

VREFCA

SA2

VSS_54

DQ36

VSS_56

DQ32

VSS_58

DM4_n/DBl4_n

VSS_59

DQ39

VSS_61

DQ35

VSS_63

DQ45

VSS_65

DQ41

VSS_67

DQS5_c

DQS5_t
VSS_70

DQ47

VSS_72

DQ43

VSS_74

DQ53

VSS_76

DQ48

VSS_78

DM6_n/DBl6_n

VSS_79

DQ54

VSS_81

DQ50

VSS_83

DQ60

VSS_85

DQ57

VSS_87

DQS7_c

DQS7_t
VSS_90

DQ63

VSS_92

DQ59

VSS_94

SDA
SA0
VTT
SA1

GND_2

ARGOS_D4AR0-26005-1P40

1

+2.5V

180P_0402_50V8-J

1

1

CD9

CD10

2

2

0.1U_0402_10V7-K

0.1U_0402_10V7-K
1U_0402_6.3V6-K

+0.6VS

1

CD25

@

@

1U_0402_6.3V6-K

+1.2V +0.6VS

132

A2

134
136
138
140
142
144

A0

146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
242
244
246
248
250
252
254
256
258
260

262

2

0.1U_0402_10V7-K

DDR_A_MA2
DDR_A_EVENT#

SA_CLK_DDR1
SA_CLK_DDR#1

DDR_A_MA0

DDR_A_MA10

DDR_A_BA0
DDR_A_RAS#DDR_A_WE#

DDR_A_CAS#
DDR_A_MA13

M_VREF_CA_DIMMA
SA2_CHA_P

DDR_A_D36

DDR_A_D32

DDRA_MA_DM4

DDR_A_D39

DDR_A_D35

DDR_A_D45

DDR_A_D41

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D47

DDR_A_D43

DDR_A_D53

DDR_A_D48

DDRA_MA_DM6

DDR_A_D54

DDR_A_D50

DDR_A_D63

DDR_A_D59

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62

DDR_A_D58

APU_SMB_DA0
SA0_CHA_P

SA1_CHA_P

CD23

+1.2V

12

RD3

1K_0402_1%

4.7U_0402_6.3V6-M

APU_SMB_DA0 7,9,15

CD11

1

CD24

2

DDR_A_EVENT# 6

SA_CLK_DDR1 6
SA_CLK_DDR#1 6

DDR_A_BA0 6
DDR_A_RAS# 6

DDR_A_CAS# 6

1

CD26

1000P_0402_50V7- K

2

1

CD66

2

1

2

CD27

0.1U_0402_10V7-K

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2019/06/01

2019/06/01

2019/06/01

Title

DDR4 CH-A PRIMARY

DDR4 CH-A PRIMARY

DDR4 CH-A PRIMARY

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Date: Sheet o f

Date: Sheet o f

Date: Sheet o f

14 65

14 65

14 65

1

0.1Custom

0.1Custom

0.1Custom

5

+0.6VS

CD41

+1.2V

12

RD11

1K_0402_1%

D D

C C

B B

DDR_B_CKE06

DDR_B_BG16
DDR_B_BG06

12

RD12

1K_0402_1%

M_VREF_CA_DIMMB

1

CD42

0.1U_0402_10V7-K

2

+1.2V +1.2V

JDIMM2A

1

DDR_B_D5

DDR_B_D1

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D7

DDR_B_D3

DDR_B_D13

DDR_B_D9

DDRA_MB_DM1

DDR_B_D15

DDR_B_D10

DDR_B_D21

DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D23

DDR_B_D19

DDR_B_D29

DDR_B_D25

DDRA_MB_DM3

DDR_B_D30

DDR_B_D26

DDR_B_CKE0

DDR_B_BG1
DDR_B_BG0

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA6

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129

VSS_1
DQ5
VSS_3
DQ1
VSS_5
DQS0_C
DQS0_t
VSS_8
DQ7
VSS_10
DQ3
VSS_12
DQ13
VSS_14
DQ9
VSS_16
DM1_n/DBl_n
VSS_17
DQ15
VSS_19
DQ10
VSS_21
DQ21
VSS_23
DQ17
VSS_25
DQS2_c
DQS2_t
VSS_28
DQ23
VSS_30
DQ19
VSS_32
DQ29
VSS_34
DQ25
VSS_36
DM3_n/DBl3_n
VSS_37
DQ30
VSS_39
DQ26
VSS_41
CB5/NC
VSS_43
CB1/NC
VSS_45
DQS8_c
DQS8_t
VSS_48
CB2/NC
VSS_50
CB3/NC
VSS_52
CKE0
VDD_1
BG1
BG0
VDD_3
A12
A9
VDD_5
A8
A6
VDD_7

ME@

1U_0402_6.3V6-K

+2.5V

1

CD43

2

VSS_2

DQ4

VSS_4

DQ0

VSS_6

DM0_n/DBl0_n

VSS_7

DQ6

VSS_9

DQ2

VSS_11

DQ12

VSS_13

DQ8

VSS_15

DQS1_c

DQS1_t
VSS_18

DQ14

VSS_20

DQ11

VSS_22

DQ20

VSS_24

DQ16

VSS_26

DM2_n/DBl2_n

VSS_27

DQ22

VSS_29

DQ18

VSS_31

DQ28

VSS_33

DQ24

VSS_35

DQS3_c

DQS3_t
VSS_38

DQ31

VSS_40

DQ27
VSS_42
CB4/NC
VSS_44
CB0/NC
VSS_46

DM8_n/DBl_n/NC

VSS_47
CB6/NC
VSS_49
CB7/NC
VSS_51

RESET_n

CKE1

VDD_2
ACT_n

ALERT_n

VDD_4

A11

VDD_6

VDD_8

ARGOS_D4AR0-26005-1P40

0.1U_0402_10V7-K

A7

A5
A4

4

1

CD39

@

Place Close DIMMs

0.1U_0402_10V7-K

2

1

CD44

0.1U_0402_10V7-K

2

Layout Node:

2

DDR_B_D4

4
6

DDR_B_D0

8
10

DDRA_MB_DM0

12
14

DDR_B_D6

16
18

DDR_B_D2

20
22

DDR_B_D12

24
26

DDR_B_D8

28
30

DDR_B_DQS#1

32

DDR_B_DQS1

34
36

DDR_B_D14

38
40

DDR_B_D11

42
44

DDR_B_D20

46
48

DDR_B_D16

50
52

DDRA_MB_DM2

54
56

DDR_B_D22 DDR_B_D34

58
60

DDR_B_D18

62
64

DDR_B_D28

66
68

DDR_B_D24

70
72

DDR_B_DQS#3

74

DDR_B_DQS3

76
78

DDR_B_D31

80
82

DDR_B_D27

84
86
88
90
92
94
96
98
100
102
104
106

DDR4_B_DRAMRST#

108

DDR_B_CKE1

110
112

DDR_B_ACT_N

114

DDR_B_ALERT_N

116
118

DDR_B_MA11

120

DDR_B_MA7

122
124

DDR_B_MA5

126

DDR_B_MA4

128
130

1

CD40

4.7U_0402_6.3V6-M

2

CD45

1U_0402_6.3V6-K

1

CD59

EMC_NS@

2

0.1U_0402_10V7-K

DDRA_MB_DM[0..7] 6

DDR_B_D[0..63] 6

DDR_B_MA[0..13] 6

DDR_B_DQS#[0..7] 6

DDR_B_DQS[0..7] 6

+3VS

+1.2V

SPD Address = 2H

12

RD20

@

1K_0402_1%

DDR4_B_DRAMRST# 6
DDR_B_CKE1 6

DDR_B_ACT_N 6
DDR_B_ALERT_N 6

3

+1.2V

1

CD31

10U_0402_6.3V6-M

2

+1.2V

2

2

+3VS +3VS

1 2

+3VS

CD47

0.1U_0402_10V7-K

1

12

RD15

10K_0402_5%

RD18

@

0_0402_5%

1 2

RD21

0_0402_5%

0.1U_0402_10V7-K

1

12

12

1

CD73

180P_0402_50V8-J

2

12

RD14

@

10K_0402_5%

SA0_CHB_P SA1_CHB_P SA2_CHB_P

12

RD17
0_0402_5%

1

CD32

10U_0402_6.3V6-M

2

CD48

SB_CLK_DDR06

SB_CLK_DDR#06

DDR_B_PARITY6

DDR_B_BA16

DDR_B_CS0#6

DDR_B_WE#6

DDR_B_ODT06
DDR_B_CS1#6

DDR_B_ODT16

RD16

@

10K_0402_5%

RD19
0_0402_5%

APU_SMB_CK07,9,14

2

1

2

2

CD49

0.1U_0402_10V7-K

1

1

CD60

0.1U_0402_10V7-K

2

1

CD33

10U_0402_6.3V6-M

2

2

CD50

0.1U_0402_10V7-K

1

DDR_B_MA3
DDR_B_MA1

SB_CLK_DDR0
SB_CLK_DDR#0

DDR_B_PARITY

DDR_B_BA1

DDR_B_CS0#
DDR_B_WE#

DDR_B_ODT0
DDR_B_CS1#

DDR_B_ODT1

DDR_B_D37

DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D38

DDR_B_D44

DDR_B_D40

DDRA_MB_DM5

DDR_B_D46

DDR_B_D42

DDR_B_D52

DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D55

DDR_B_D51

DDR_B_D61

DDR_B_D56

DDRA_MB_DM7

DDR_B_D62

DDR_B_D58 DDR_B_D59

APU_SMB_CK0

1

CD61

2.2U_0402_6.3V6-M

2

1

CD34

10U_0402_6.3V6-M

2

CD@

2

CD51

0.1U_0402_10V7-K

1

EMC@

+1.2V+2.5V +1.2V +0.6VS

CD35

10U_0402_6.3V6-M

2

CD52

0.1U_0402_10V7-K

1

JDIMM2B

131

A3

133

A1

135

VDD_9

137

CK0_t

139

CK0_c

141

VDD_11

143

Parity

145

BA1

147

VDD_13

149

CS0_n

151

A14/WE_n

153

VDD_15

155

ODT0

157

CS1_n

159

VDD_17

161

ODT1

163

VDD_19

165

C1/CS3_n/NC

167

VSS_53

169

DQ37

171

VSS_55

173

DQ33

175

VSS_57

177

DQS4_c

179

DQS4_t

181

VSS_60

183

DQ38

185

VSS_62

187

DQ34

189

VSS_64

191

DQ44

193

VSS_66

195

DQ40

197

VSS_68

199

DM5_n/DBl5_n

201

VSS_69

203

DQ46

205

VSS_71

207

DQ42

209

VSS_73

211

DQ52

213

VSS_75

215

DQ49

217

VSS_77

219

DQS6_c

221

DQS6_t

223

VSS_80

225

DQS5

227

VSS_82

229

DQ51

231

VSS_84

233

DQ61

235

VSS_86

237

DQ56

239

VSS_88

241

DM7_n/DBl7_n

243

VSS_89

245

DQ62

247

VSS_91

249

DQ58

251

VSS_93

253

SCL

255

VDDSPD

257

VPP_1

259

VPP_2

261

GND_1

ME@

1

2

CD@

ARGOS_D4AR0-26005-1P40

CD36

10U_0402_6.3V6-M

2

CD53

0.1U_0402_10V7-K

1

EVENT_n/NF

VDD_10

CK1_t/NF
CK1_c/NF

VDD_12

A10/AP

VDD_14

BA0

A16/RAS_n

VDD_16

A15/CAS_n

A13

VDD_18

C0/CS2_n/NC

VREFCA

SA2

VSS_54

DQ36

VSS_56

DQ32

VSS_58

DM4_n/DBl4_n

VSS_59

DQ39

VSS_61

DQ35

VSS_63

DQ45

VSS_65

DQ41

VSS_67

DQS5_c

DQS5_t
VSS_70

DQ47

VSS_72

DQ43

VSS_74

DQ53

VSS_76

DQ48

VSS_78

DM6_n/DBl6_n

VSS_79

DQ54

VSS_81

DQ50

VSS_83

DQ60

VSS_85

DQ57

VSS_87

DQS7_c

DQS7_t
VSS_90

DQ63

VSS_92

DQ59

VSS_94

SDA
SA0
VTT
SA1

GND_2

A2

A0

1

CD37

10U_0402_6.3V6-M

2

132
134
136
138
140
142
144

146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
242
244
246
248
250
252
254
256
258
260

262

2

CD54

0.1U_0402_10V7-K

1

CD@

DDR_B_MA2
DDR_B_EVENT#

SB_CLK_DDR1
SB_CLK_DDR#1

DDR_B_MA0

DDR_B_MA10

DDR_B_BA0
DDR_B_RAS#

DDR_B_CAS#
DDR_B_MA13

M_VREF_CA_DIMMB
SA2_CHB_P

DDR_B_D36

DDR_B_D32

DDRA_MB_DM4

DDR_B_D39

DDR_B_D35

DDR_B_D45

DDR_B_D41

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D47

DDR_B_D43

DDR_B_D53

DDR_B_D48

DDRA_MB_DM6

DDR_B_D54

DDR_B_D50

DDR_B_D60

DDR_B_D57

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D63

APU_SMB_DA0
SA0_CHB_P

SA1_CHB_P

1

CD38

10U_0402_6.3V6-M

2

CD@

1

CD63

@

100U_1206_6.3V6M

2

+1.2V

12

RD13

1K_0402_1%

1

2

CD56

1000P_0402_50V7-K

1

1

CD62

@

100U_1206_6.3V6M

2

DDR_B_EVENT# 6

SB_CLK_DDR1 6
SB_CLK_DDR#1 6

DDR_B_BA0 6
DDR_B_RAS# 6

DDR_B_CAS# 6

1

1

@

CD57

CD58

2.2U_0402_6.3V6-M

0.1U_0402_10V7-K

2

2

APU_SMB_DA0 7,9,14

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2019/06/01

2019/06/01

2019/06/01

Title

DDR4 CH-B PRIMARY

DDR4 CH-B PRIMARY

DDR4 CH-B PRIMARY

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

Date: Sheet o f

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

15 65

15 65

15 65

1

0.1

0.1

0.1

5

D D

C C

4

3

2

1

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INF ORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND TRADE SECRET INF ORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND TRADE SECRET INF ORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2019/06/01

2019/06/01

2019/06/01

Title

VGA Notes List

VGA Notes List

VGA Notes List

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

Date: Sheet o f

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

1

16 65

16 65

16 65

0.1

0.1

0.1

5

D D

C C

4

3

2

1

B B

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FU TURE CENTER NE ITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FU TURE CENTER NE ITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FU TURE CENTER NE ITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTE N CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTE N CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTE N CONSENT OF LC FUTURE CENTER.

5

4

2018/03/26

2018/03/26

2018/03/26

3

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2019/06/01

2019/06/01

2019/06/01

2

Titl e

ATI_R17M-M1-70_PCIE

ATI_R17M-M1-70_PCIE

ATI_R17M-M1-70_PCIE

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

Wednesday, January 09, 2019

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

1

17 65

17 65

17 65

0.1

0.1

0.1

5

D D

C C

4

3

2

1

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY O F LC FUTURE CENTER. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY O F LC FUTURE CENTER. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY O F LC FUTURE CENTER. AND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN C ONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN C ONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN C ONSENT OF LC FUTURE CENTER.

3

2018/03/26

2018/03/26

2018/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2019/06/01

2019/06/01

2019/06/01

Title

ATI_R17M-M1-70_Main_MSIC

ATI_R17M-M1-70_Main_MSIC

ATI_R17M-M1-70_Main_MSIC

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

18 65

18 65

18 65

1

0.1

0.1

0.1

5

D D

C C

B B

4

3

2

1

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2018/03/2 6

2018/03/2 6

2018/03/2 6

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2019/06/0 1

2019/06/0 1

2019/06/0 1

2

Title

ATI_R17M-M1-70_TMDP

ATI_R17M-M1-70_TMDP

ATI_R17M-M1-70_TMDP

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

19 65

19 65

19 65

1

0.1

0.1

0.1

5

D D

C C

4

3

2

1

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2018/03/2 6

2018/03/2 6

2018/03/2 6

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2019/06/0 1

2019/06/0 1

2019/06/0 1

2

Title

ATI_R17M-M1-70_DP Power

ATI_R17M-M1-70_DP Power

ATI_R17M-M1-70_DP Power

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

Wednesday, January 09, 2019

Wednesday, January 09, 2019

Wednesday, January 09, 2019

JINN/DOOKU 2.0

JINN/DOOKU 2.0

JINN/DOOKU 2.0

20 65

20 65

20 65

1

0.1

0.1

0.1