Lenovo Thinkpad E485 Schematic

A

www.teknisi-indonesia.com

1 1

B

C

D

E

2 2

LCFC Confidential

RAVEN EX85 Rev1.0 Schematic

AMD Raven Ridge FP5 Processor with DDR4

3 3

2018-04-10 Rev1.0

4 4

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

A

B

C

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

2018/06/01

2018/06/01

2018/06/01

Title

COVER PAGE

COVER PAGE

COVER PAGE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, April 10, 2018

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

E

1 65

1 65

1 65

1.0

1.0

1.0

A

www.teknisi-indonesia.com

B

C

D

E

AMD Raven Ridge FP5

DDR4 Channel A

DDR4-SO-DIMM X1

PCI-Express x4 Gen3 BANK 0, 1

1 1

eDP Conn.

SSD

Page 26

Page 25

DP0 x2Lane

AMD

Raven Ridge

Processor

1.2V 2400 MT/s

DDR4 Channel B

1.2V 2400 MT/s

UP TO 16G

Page 14~15

DDR4-SO-DIMM X1

BANK 0, 1

UP TO 16G

Page 14~15

FP5 BGA 1140P
25mm * 35mm

HDMI Conn.

Page 28

DDI

USB2.0 x1

Repeator
TI

JUSB-C Conn.

2 2

CC

Page 33

TUSB544

PD Controller
RTS5457

Page 33

PD

Page 31

USB C(DP1.2/USB3.0)

PCIe x1 Gen1

USB 2.0 x1

USB3.0 x1

USB2.0 x1

NGFF WLAN Card
BT

Page 37

USB Left Front

Page 35

USB charger
(AOU)

TPS2546RTER

Page 35

USB Left Behind

Page 35

SATA 10pin CONN

Page 30

SATA_redriver

Parade PS8527C

Page 29

SATA Gen3

USB2.0 x1

USB 3.0 x1

PCIE x1 Gen1(1000M LAN)
PCIE x1 Gen1(Cardreader)

USB2.0 x1

SUB/B CONN

Page 36

3 3

SPI ROM
64M
W25Q64FWSSIQ

Page 9

SPI BUS

1.8V

Page 5~12

TPM
SLB9670VQ1P2

PWR
Button

Page 44

Sub Board

LPC BUS

3.3V 33MHz

EC
IT8996E-256/DX

RJ45 Conn.

Realtek

PCIe

Page 42

RTL8111GUS

4 4

JCARD Conn.

BAYHUB
OZ711LV1LN

PCIe

G-Sensor
BMA255

SD/MMC

Touch Pad
Track Point

Page 46Page 50

Int.KBD

USB2.0 x1

HD Audio

Thermal Sensor
F75303M

Codec
CX11852-11Z

MIC_CLK/MIC_DATA

Int. MIC Conn.

(JLCD Conn.)

Page 26

Page 38

HP_R/L_JACK

SP_OUTR/L

Ext. HP/MIC
Combo Jack

Page 40Page 49Page 46

Int. camera

SPK Conn.

Page 26

Page 39

JUSB4 Conn.

A

USB2.0

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

B

C

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

2018/06/01

2018/06/01

2018/06/01

Title

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, April 10, 2018

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

E

2 65

2 65

2 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

4

3

2

1

Voltage Rails

Power Plane

D D

B9+

State

S0

S3

S5 S4/AC Only

C C

O

O

O

S5 S4
Battery only

O

, X --> Means OFF )( O --> Means ON

+3VALW

+5VALW

+1.8VALW

+0.9VALW_VDDP

O O

O

+1.2V

+2.5V

X

XX

+5VS
+3VS
+1.5VS
+0.9VS_VDDP
+0.6VS
+VDDCR_SOC

+VDDC_VDD

+VGA_CORE
+3.3VGS
+1.8VGS
+1.35VGS

+0.95VGS

OOO

X

X

X

USB2 Port

Port Device

0
1
2
3
4
5

USBC

USB3 port2
USB2 port1

USB2(BT)
Int. Camera

USB3 Port

Port Device

USB Type-C

1USB3 port1
2
3

USB3 port1
USB3 port2

STATE

S0

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

PCIE Port

Port Device

GPP0
GPP1
GPP2
GPP3

X

X4

GPP4
GPP5
GFX0
GFX1
GFX2
GFX3
GFX4~7

SLP_S3#SLP_A#

LOWLOW

LOW LOW

LOWLOW OFF

LAN

CardReader

X
X

WLAN

X

M.2 SSD
M.2 SSD
M.2 SSD
M.2 SSD

X

EC_ONSLP_S5#

HIGHHIGHHIGH

HIGH

LOW

ON

ON

HIGH

SATA Port

Port Device

1
2

SUSP#

ONON

OFFON

OFF

HDD0

X

S5 S4
AC & Battery
don't exist

XX

X

X

SMBUS Control Table

SOURCE

Main
VGA

SODIMMBATT

WLAN
WiMAX

Thermal
Sensor

APU

CP
Module

Charge

PD

G-Sensor

PMIC

EC_SMB_CK1 IT8996E-256-DX
EC_SMB_DA1

EC_SMB_CK2

B B

EC_SMB_CK3
EC_SMB_DA3

EC_SMB_CK4
EC_SMB_DA4

+3VL

IT8996E-256-DX

+3VALWEC_SMB_DA2

IT8996E-256-DX

+3VS

IT8996E-256-DX

+3VL

X

X

V

+3VS_VGA

X X

V

+3VL

X X X

X X

X

X

X

X

X

X

X

X

X

X X

V

+3VS

X

X

V

+3VS

X X

X

V

+3VL

X

X

V

+3VALW

XX

X

X

X

V

+3VS

X

X

X

X

V

APU I2C

APU Port

APU_SMB0CLK/SDAI2C2_SCL/SDA

I2C3_SCL/SDA

SIC/SID

ZZZ2

A A

PCB@

USBC_I2C_SCL

/SDA

APU_SMB1_CLK/SDA

EC_SMB_CK3/DA3 Conn EC

EC_SMB_CK2/DA2

Net

Device

DIMM1/DIMM2

TOUCHPAD

PD

APPLY PCB PN

NM-A861

DA800010W0

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2018/06/01

2018/06/01

2018/06/01

Title

BLANK

BLANK

BLANK

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, April 10, 2018

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

1

3 65

3 65

3 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

D D

4

3

2

1

BOM Structure Table

BOM Structure

NOTE

HDT@ For HDT AMD debug port

LPC@ For LPC AMD debug port

C C

TPM@
UMA@

CD@

EMC_NS@

ME@

Trusted Platform Module(TPM)
UMA SKU ID

COST DOWN

EMC Reserves
ME Connector
For RF functionRF@

For EMI functionEMC@

B B

RF_NS@

reserves RF component

RF_PXNS@

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

2017/02/16

2017/02/16

2017/02/16

3

VGA reserves RF component

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

2018/06/01

2018/06/01

Deciphered Date

Deciphered Date

Deciphered Date

2018/06/01

Title

Title

Title

SMBus Block

SMBus Block

SMBus Block

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

B

B

B

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Tuesday, April 10, 2018

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

1

4 65

4 65

4 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

D D

4

3

2

1

UC1B

PCIE

PCIE0_SSD_CRX_DTX_P25
PCIE0_SSD_CRX_DTX_N25

PCIE1_SSD_CRX_DTX_P25
PCIE1_SSD_CRX_DTX_N25

PCIE2_SSD_CRX_DTX_P25
PCIE2_SSD_CRX_DTX_N25

PCIE3_SSD_CRX_DTX_P25
PCIE3_SSD_CRX_DTX_N25

C C

LAN

WLAN

HDD

B B

PCIE1_CRX_DTX_P36
PCIE1_CRX_DTX_N36

PCIE2_CRX_DTX_P36
PCIE2_CRX_DTX_N36

PCIE5_CRX_DTX_P37
PCIE5_CRX_DTX_N37

SATA_CRX_DTX_P029
SATA_CRX_DTX_N029

PCIE0_SSD_CRX_DTX_N
PCIE1_SSD_CRX_DTX_P PCIE1_SSD_CTX_DRX_P

PCIE1_SSD_CRX_DTX_N
PCIE2_SSD_CRX_DTX_P

PCIE2_SSD_CRX_DTX_N
PCIE3_SSD_CRX_DTX_P

PCIE3_SSD_CRX_DTX_N

PCIE1_CRX_DTX_P
PCIE1_CRX_DTX_N

PCIE2_CRX_DTX_P
PCIE2_CRX_DTX_N

PCIE5_CRX_DTX_P
PCIE5_CRX_DTX_N

SATA_CRX_DTX_N0

P8

P_GFX_RXP0

P9

P_GFX_RXN0

N6

P_GFX_RXP1

N7

P_GFX_RXN1

M8

P_GFX_RXP2

M9

P_GFX_RXN2

L6

P_GFX_RXP3

L7

P_GFX_RXN3

K11

P_GFX_RXP4

J11

P_GFX_RXN4

H6

P_GFX_RXP5

H7

P_GFX_RXN5

G6

P_GFX_RXP6

F7

P_GFX_RXN6

G8

P_GFX_RXP7

F8

P_GFX_RXN7

N10

P_GPP_RXP0

N9

P_GPP_RXN0

L10

P_GPP_RXP1

L9

P_GPP_RXN1

L12

P_GPP_RXP2

M11

P_GPP_RXN2

P12

P_GPP_RXP3

P11

P_GPP_RXN3

V6

P_GPP_RXP4

V7

P_GPP_RXN4

T8

P_GPP_RXP5

T9

P_GPP_RXN5

R6

P_GPP_RXP6/SATA_RXP0

R7

P_GPP_RXN6/SATA_RXN0

R9

P_GPP_RXP7/SATA_RXP1

R10

P_GPP_RXN7/SATA_RXN1

P_GPP_TXP6/SATA_TXP0
P_GPP_TXN6/SATA_TXN0

P_GPP_TXP7/SATA_TXP1
P_GPP_TXN7/SATA_TXN1

FP5 REV 0.90
PART 2 OF 13

AMD-RAVEN-FP5_BGA1140

P_GFX_TXP0
P_GFX_TXN0

P_GFX_TXP1
P_GFX_TXN1

P_GFX_TXP2
P_GFX_TXN2

P_GFX_TXP3
P_GFX_TXN3

P_GFX_TXP4
P_GFX_TXN4

P_GFX_TXP5
P_GFX_TXN5

P_GFX_TXP6
P_GFX_TXN6

P_GFX_TXP7
P_GFX_TXN7

P_GPP_TXP0
P_GPP_TXN0

P_GPP_TXP1
P_GPP_TXN1

P_GPP_TXP2
P_GPP_TXN2

P_GPP_TXP3
P_GPP_TXN3

P_GPP_TXP4
P_GPP_TXN4

P_GPP_TXP5
P_GPP_TXN5

PCIE0_SSD_CTX_DRX_PPCIE0_SSD_CRX_DTX_P

N1

PCIE0_SSD_CTX_DRX_N

N3
M2

PCIE1_SSD_CTX_DRX_N

M4

PCIE2_SSD_CTX_DRX_P

L2

PCIE2_SSD_CTX_DRX_N

L4

PCIE3_SSD_CTX_DRX_P

L1

PCIE3_SSD_CTX_DRX_N

L3
K2

K4
J2

J4
H1

H3
H2

H4

PCIE1_CTX_DRX_P

N2

PCIE1_CTX_DRX_N

P3

PCIE2_CTX_DRX_P PCIE2_CTX_C_DRX_P

P4

PCIE2_CTX_DRX_N

P2
R3

R1
T4

T2

W2

PCIE5_CTX_DRX_N

W4
W3

V2

SATA_CTX_DRX_P0SATA_CRX_DTX_P0

V1

SATA_CTX_DRX_N0

V3
U2

U4

CC107 0.22U_0402_10V6-K
CC108 0.22U_0402_10V6-K

CC109 0.22U_0402_10V6-K
CC110 0.22U_0402_10V6-K

CC111 0.22U_0402_10V6-K
CC112 0.22U_0402_10V6-K

CC113 0.22U_0402_10V6-K
CC114 0.22U_0402_10V6-K

CC1 0.1U_0402_10V7-K
CC2 0.1U_0402_10V7-K

CC3 0.1U_0402_10V7-K
CC4 0.1U_0402_10V7-K

CC5 0.1U_0402_10V7-K
CC6 0.1U_0402_10V7-K

12
12

12
12

12
12

12
12

AC CAP Close to TX output

1 2
1 2

1 2
1 2

1 2
1 2

SATA_CTX_DRX_P0 29
SATA_CTX_DRX_N0 29

0814: Add SSD PCIE BUS0814: Add SSD PCIE BUS

PCIE0_SSD_CTX_DRX_P_C
PCIE0_SSD_CTX_DRX_N_C

PCIE1_SSD_CTX_DRX_P_C
PCIE1_SSD_CTX_DRX_N_C

PCIE2_SSD_CTX_DRX_P_C
PCIE2_SSD_CTX_DRX_N_C

PCIE3_SSD_CTX_DRX_P_C
PCIE3_SSD_CTX_DRX_N_C

PCIE1_CTX_C_DRX_P
PCIE1_CTX_C_DRX_N

PCIE2_CTX_C_DRX_N

PCIE5_CTX_C_DRX_PPCIE5_CTX_DRX_P
PCIE5_CTX_C_DRX_N

HDD

CO-LAY RV1 TV2

PCIE0_SSD_CTX_DRX_P_C 25
PCIE0_SSD_CTX_DRX_N_C 25

PCIE1_SSD_CTX_DRX_P_C 25
PCIE1_SSD_CTX_DRX_N_C 25

PCIE2_SSD_CTX_DRX_P_C 25
PCIE2_SSD_CTX_DRX_N_C 25

PCIE3_SSD_CTX_DRX_P_C 25
PCIE3_SSD_CTX_DRX_N_C 25

PCIE1_CTX_C_DRX_P 36
PCIE1_CTX_C_DRX_N 36

PCIE2_CTX_C_DRX_P 36
PCIE2_CTX_C_DRX_N 36

PCIE5_CTX_C_DRX_P 37
PCIE5_CTX_C_DRX_N 37

LAN

CardReaderCardReader

WLAN

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2018/06/01

2018/06/01

2018/06/01

Title

BLANK page

BLANK page

BLANK page

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Tuesday, April 10, 2018

5 65

5 65

1

5 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

4

3

2

1

D D

DDR_A_WE#14
DDR_A_CAS#14
DDR_A_RAS#14

C C

B B

DDR_A_BA014
DDR_A_BA114

DDR_A_BG014
DDR_A_BG114

DDR_A_ACT_N14

SA_CLK_DDR014

SA_CLK_DDR#014

SA_CLK_DDR114

SA_CLK_DDR#114

DDR_A_CS0#14
DDR_A_CS1#14

DDR_A_CKE014
DDR_A_CKE114

DDR_A_ODT014
DDR_A_ODT114

DDR_A_ALERT_N14

DDR_A_EVENT#14
DDR4_A_DRAMRST#14

DDR_A_ALERT_N

DDRA_MA_DM[0..7] 14

DDR_A_DQS#[0..7] 14

DDR_A_DQS[0..7] 14

DDR_A_D[0..63] 14

DDR_A_MA[0..13] 14

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#

DDR_A_BA0
DDR_A_BA1

DDR_A_BG0
DDR_A_BG1

DDR_A_ACT_N

DDRA_MA_DM0
DDRA_MA_DM1
DDRA_MA_DM2
DDRA_MA_DM3
DDRA_MA_DM4
DDRA_MA_DM5
DDRA_MA_DM6
DDRA_MA_DM7

DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS#7

SA_CLK_DDR0
SA_CLK_DDR#0
SA_CLK_DDR1
SA_CLK_DDR#1

DDR_A_CS0#
DDR_A_CS1#

DDR_A_CKE0
DDR_A_CKE1

DDR_A_ODT0
DDR_A_ODT1

DDR_A_EVENT#
DDR4_A_DRAMRST#

AF25
AE23
AD27
AE21
AC24
AC26
AD21
AC27
AD22
AC21
AF22
AA24
AC23

AJ25
AG27
AG23
AG26

AF21
AF27

AA21
AA27

AA22

AL24
AN27

AW25

AT21

AM26
AM27

AN24
AN25
AU23
AT23
AV20

AW20

AD25
AD24
AE26
AE27

AG21

AJ27

AG24

AJ22

AA25
AE24

MA_ADD0/MAB_CS0
MA_ADD1/RSVD
MA_ADD2/RSVD
MA_ADD3/RSVD
MA_ADD4/RSVD
MA_ADD5/RSVD
MA_ADD6/RSVD
MA_ADD7/MAA_CA3
MA_ADD8/MAA_CA4
MA_ADD9/MAA_CKE1
MA_ADD10/MAB_CKE0
MA_ADD11/MAA_CA5
MA_ADD12/MAA_CA2
MA_ADD13_BANK2/RSVD
MA_WE_L_ADD14/MAB_CA2
MA_CAS_L_ADD15/MAB_CA4
MA_RAS_L_ADD16/MAB_CA3

MA_BANK0/MAB_CS1
MA_BANK1/MAB_CA0

MA_BG0/MAA_CS1
MA_BG1/MAA_CKE0

MA_ACT_L/MAA_CS0

F21

MA_DM0/MAA_DM1

G27

MA_DM1/MAA_DM0

N24

MA_DM2/MAA_DM2

N23

MA_DM3/MAA_DM3
MA_DM4/MAB_DM2
MA_DM5/MAB_DM3
MA_DM6/MAB_DM1
MA_DM7/MAB_DM0

T27

RSVD_36

F22

MA_DQS_H0/MAA_DQS_H1

G22

MA_DQS_L0/MAA_DQS_L1

H27

MA_DQS_H1/MAA_DQS_H0

H26

MA_DQS_L1/MAA_DQS_L0

N27

MA_DQS_H2/MAA_DQS_H2

N26

MA_DQS_L2/MAA_DQS_L2

R21

MA_DQS_H3/MAA_DQS_H3

P21

MA_DQS_L3/MAA_DQS_L3
MA_DQS_H4/MAB_DQS_H2
MA_DQS_L4/MAB_DQS_L2
MA_DQS_H5/MAB_DQS_H3
MA_DQS_L5/MAB_DQS_L3
MA_DQS_H6/MAB_DQS_H1
MA_DQS_L6/MAB_DQS_L1
MA_DQS_H7/MAB_DQS_H0
MA_DQS_L7/MAB_DQS_L0

V24

RSVD_41

V23

RSVD_40
MA_CLK_H0/MAA_CKT

MA_CLK_L0/MAA_CKC
MA_CLK_H1/MAB_CKT
MA_CLK_L1/MAB_CKC

MA_CS_L0/MAB_CKE1
MA_CS_L1/RSVD

Y23

MA_CKE0/MAA_CA0

Y26

MA_CKE1/MAA_CA1

MA_ODT0/MAB_CA5
MA_ODT1/RSVD

MA_ALERT_L/MA_TEST
MA_EVENT_L

Y24

MA_RESET_L

FP5 REV 0.90
PART 1 OF 13

UC1A

MEMORY A

MA_DATA0/MAA_DATA8

MA_DATA1/MAA_DATA9
MA_DATA2/MAA_DATA13
MA_DATA3/MAA_DATA12
MA_DATA4/MAA_DATA11
MA_DATA5/MAA_DATA10
MA_DATA6/MAA_DATA15
MA_DATA7/MAA_DATA14

MA_DATA8/MAA_DATA0

MA_DATA9/MAA_DATA1
MA_DATA10/MAA_DATA5
MA_DATA11/MAA_DATA4
MA_DATA12/MAA_DATA7
MA_DATA13/MAA_DATA6
MA_DATA14/MAA_DATA2
MA_DATA15/MAA_DATA3

MA_DATA16/MAA_DATA17
MA_DATA17/MAA_DATA16
MA_DATA18/MAA_DATA23
MA_DATA19/MAA_DATA20
MA_DATA20/MAA_DATA19
MA_DATA21/MAA_DATA18
MA_DATA22/MAA_DATA21
MA_DATA23/MAA_DATA22

MA_DATA24/MAA_DATA30
MA_DATA25/MAA_DATA31
MA_DATA26/MAA_DATA26
MA_DATA27/MAA_DATA27
MA_DATA28/MAA_DATA28
MA_DATA29/MAA_DATA29
MA_DATA30/MAA_DATA24
MA_DATA31/MAA_DATA25

MA_DATA32/MAB_DATA16
MA_DATA33/MAB_DATA17
MA_DATA34/MAB_DATA22
MA_DATA35/MAB_DATA20
MA_DATA36/MAB_DATA19
MA_DATA37/MAB_DATA18
MA_DATA38/MAB_DATA23
MA_DATA39/MAB_DATA21

MA_DATA40/MAB_DATA30
MA_DATA41/MAB_DATA31
MA_DATA42/MAB_DATA26
MA_DATA43/MAB_DATA27
MA_DATA44/MAB_DATA28
MA_DATA45/MAB_DATA29
MA_DATA46/MAB_DATA24
MA_DATA47/MAB_DATA25

MA_DATA48/MAB_DATA11
MA_DATA49/MAB_DATA10
MA_DATA50/MAB_DATA15
MA_DATA51/MAB_DATA14
MA_DATA52/MAB_DATA12
MA_DATA53/MAB_DATA13

MA_DATA54/MAB_DATA9
MA_DATA55/MAB_DATA8

MA_DATA56/MAB_DATA5
MA_DATA57/MAB_DATA6
MA_DATA58/MAB_DATA2
MA_DATA59/MAB_DATA3
MA_DATA60/MAB_DATA7
MA_DATA61/MAB_DATA4
MA_DATA62/MAB_DATA1
MA_DATA63/MAB_DATA0

MA_PAROUT/MAB_CA1

RSVD_34
RSVD_35
RSVD_51
RSVD_52
RSVD_27
RSVD_28
RSVD_43
RSVD_42

J21
H21
F23
H23
G20
F20
J22
J23

G25
F26
L24
L26
L23
F25
K25
K27

M25
M27
P27
R24
L27
M24
P24
P25

M22
N21
T22
V21
L21
M20
R23
T21

AL27
AL25
AP26
AR27
AK26
AK24
AM24
AP27

AM23
AM21
AR25
AU27
AL22
AL21
AP24
AP23

AW26
AV25
AV22
AW22
AU26
AV27
AW23
AT22

AW21
AU21
AP21
AN20
AR22
AN22
AT20
AR20

T24
T25
W25
W27
R26
R27
V27
V26

AF24

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7

DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15

DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23

DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31

DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39

DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47

DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55

DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_A_PARITY DDR_B_ALERT_N

DDR_A_PARITY 14

DDR_B_WE#15
DDR_B_CAS#15
DDR_B_RAS#15

DDR_B_BA015
DDR_B_BA115

DDR_B_BG015
DDR_B_BG115

DDR_B_ACT_N15

SB_CLK_DDR015
SB_CLK_DDR#015
SB_CLK_DDR115
SB_CLK_DDR#115

DDR_B_CS0#15
DDR_B_CS1#15

DDR_B_CKE015
DDR_B_CKE115

DDR_B_ODT015
DDR_B_ODT115

DDR_B_ALERT_N15

DDR_B_EVENT#15
DDR4_B_DRAMRST#15

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_WE#
DDR_B_CAS#
DDR_B_RAS#

DDR_B_BA0
DDR_B_BA1

DDR_B_BG0
DDR_B_BG1

DDR_B_ACT_N

DDRA_MB_DM0
DDRA_MB_DM1
DDRA_MB_DM2
DDRA_MB_DM3
DDRA_MB_DM4
DDRA_MB_DM5
DDRA_MB_DM6
DDRA_MB_DM7

DDR_B_DQS0
DDR_B_DQS#0
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS7
DDR_B_DQS#7

SB_CLK_DDR0
SB_CLK_DDR#0
SB_CLK_DDR1
SB_CLK_DDR#1

DDR_B_CS0#
DDR_B_CS1#

DDR_B_CKE0
DDR_B_CKE1

DDR_B_ODT0
DDR_B_ODT1

DDR_B_EVENT#
DDR4_B_DRAMRST#

AG30

MB_ADD0/MBB_CS0

AC32

MB_ADD1/RSVD

AC30

MB_ADD2/RSVD

AB29

MB_ADD3/RSVD

AB31

MB_ADD4/RSVD

AA30

MB_ADD5/RSVD

AA29

MB_ADD6/RSVD

Y30

MB_ADD7/MBA_CA3

AA31

MB_ADD8/MBA_CA4

W29

MB_ADD9/MBA_CKE1

AH29

MB_ADD10/MBB_CKE0

Y32

MB_ADD11/MBA_CA5

W31

MB_ADD12/MBA_CA2

AL30

MB_ADD13_BANK2/RSVD

AK30

MB_WE_L_ADD14/MBB_CA2

AK32

MB_CAS_L_ADD15/MBB_CA4

AJ30

MB_RAS_L_ADD16/MBB_CA3

AH31

MB_BANK0/MBB_CS1

AG32

MB_BANK1/MBB_CA0

V31

MB_BG0/MBA_CS1

V29

MB_BG1/MBA_CKE0

V30

MB_ACT_L/MBA_CS0

C21

MB_DM0/MBA_DM1

C25

MB_DM1/MBA_DM0

E32

MB_DM2/MBA_DM2

K30

MB_DM3/MBA_DM3

AP30

MB_DM4/MBB_DM2

AW31

MB_DM5/MBB_DM3

BB26

MB_DM6/MBB_DM1

BD22

MB_DM7/MBB_DM0

N32

RSVD_21

D22

MB_DQS_H0/MBA_DQS_H1

B22

MB_DQS_L0/MBA_DQS_L1

D25

MB_DQS_H1/MBA_DQS_H0

B25

MB_DQS_L1/MBA_DQS_L0

F29

MB_DQS_H2/MBA_DQS_H2

F30

MB_DQS_L2/MBA_DQS_L2

K31

MB_DQS_H3/MBA_DQS_H3

K29

MB_DQS_L3/MBA_DQS_L3

AR29

MB_DQS_H4/MBB_DQS_H2

AR31

MB_DQS_L4/MBB_DQS_L2

AW30

MB_DQS_H5/MBB_DQS_H3

AW29

MB_DQS_L5/MBB_DQS_L3

BC25

MB_DQS_H6/MBB_DQS_H1

BA25

MB_DQS_L6/MBB_DQS_L1

BC22

MB_DQS_H7/MBB_DQS_H0

BA22

MB_DQS_L7/MBB_DQS_L0

N31

RSVD_20

N29

RSVD_18

AC31

MB_CLK_H0/MBA_CKT

AD30

MB_CLK_L0/MBA_CKC

AD29

MB_CLK_H1/MBB_CKT

AD31

MB_CLK_L1/MBB_CKC

AE30

RSVD_89

AE32

RSVD_90

AF29

RSVD_91

AF31

RSVD_92

AJ31

MB_CS_L0/MBB_CKE1

AM31

MB_CS_L1/RSVD

AJ29

RSVD_95

AM29

RSVD_97

U29

MB_CKE0/MBA_CA0

T30

MB_CKE1/MBA_CA1

V32

RSVD_93

U31

RSVD_94

AL31

MB_ODT0/MBB_CA5

AM32

MB_ODT1/RSVD

AL29

RSVD_96

AM30

RSVD_98

W30

MB_ALERT_L/MB_TEST

AG29

MB_EVENT_L

T31

MB_RESET_L

UC1I

MEMORY B

FP5 REV 0.90
PART 9 OF 13

AMD-RAVEN-FP5_BGA1140

DDRA_MB_DM[0..7] 15

DDR_B_DQS#[0..7] 15

DDR_B_DQS[0..7] 15

DDR_B_D[0..63] 15

DDR_B_MA[0..13] 15

MB_DATA0/MBA_DATA8

MB_DATA1/MBA_DATA9
MB_DATA2/MBA_DATA13
MB_DATA3/MBA_DATA12
MB_DATA4/MBA_DATA11
MB_DATA5/MBA_DATA10
MB_DATA6/MBA_DATA15
MB_DATA7/MBA_DATA14

MB_DATA8/MBA_DATA0

MB_DATA9/MBA_DATA1
MB_DATA10/MBA_DATA5
MB_DATA11/MBA_DATA4
MB_DATA12/MBA_DATA7
MB_DATA13/MBA_DATA6
MB_DATA14/MBA_DATA2
MB_DATA15/MBA_DATA3

MB_DATA16/MBA_DATA19
MB_DATA17/MBA_DATA18
MB_DATA18/MBA_DATA22
MB_DATA19/MBA_DATA23
MB_DATA20/MBA_DATA20
MB_DATA21/MBA_DATA21
MB_DATA22/MBA_DATA17
MB_DATA23/MBA_DATA16

MB_DATA24/MBA_DATA30
MB_DATA25/MBA_DATA31
MB_DATA26/MBA_DATA26
MB_DATA27/MBA_DATA27
MB_DATA28/MBA_DATA28
MB_DATA29/MBA_DATA29
MB_DATA30/MBA_DATA25
MB_DATA31/MBA_DATA24

MB_DATA32/MBB_DATA16
MB_DATA33/MBB_DATA17
MB_DATA34/MBB_DATA21
MB_DATA35/MBB_DATA20
MB_DATA36/MBB_DATA19
MB_DATA37/MBB_DATA18
MB_DATA38/MBB_DATA23
MB_DATA39/MBB_DATA22

MB_DATA40/MBB_DATA24
MB_DATA41/MBB_DATA25
MB_DATA42/MBB_DATA29
MB_DATA43/MBB_DATA28
MB_DATA44/MBB_DATA31
MB_DATA45/MBB_DATA30
MB_DATA46/MBB_DATA26
MB_DATA47/MBB_DATA27

MB_DATA48/MBB_DATA11
MB_DATA49/MBB_DATA10
MB_DATA50/MBB_DATA14
MB_DATA51/MBB_DATA15
MB_DATA52/MBB_DATA12
MB_DATA53/MBB_DATA13

MB_DATA54/MBB_DATA9
MB_DATA55/MBB_DATA8

MB_DATA56/MBB_DATA6
MB_DATA57/MBB_DATA7
MB_DATA58/MBB_DATA2
MB_DATA59/MBB_DATA3
MB_DATA60/MBB_DATA4
MB_DATA61/MBB_DATA5
MB_DATA62/MBB_DATA1
MB_DATA63/MBB_DATA0

RSVD_17
RSVD_19
RSVD_26
RSVD_29
RSVD_16
RSVD_15
RSVD_25
RSVD_24

MB_PAROUT/MBB_CA1

B21
D21
B23
D23
A20
C20
A22
C22

D24
A25
D27
C27
C23
B24
C26
B27

C30
E29
H29
H31
A28
D28
F31
G30

J29
J31
L29
L31
H30
H32
L30
L32

AP29
AP32
AT29
AU32
AN30
AP31
AR30
AT31

AU29
AV30
BB30
BA28
AU30
AU31
AY32
AY29

BA27
BC27
BA24
BC24
BD28
BB27
BB25
BD25

BC23
BB22
BC21
BD20
BB23
BA23
BB21
BA21

M31
N30
P31
R32
M30
M29
P30
P29

AG31

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7

DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15

DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23

DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31

DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39

DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47

DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55

DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_B_PARITY

DDR_B_PARITY 15

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2018/06/01

2018/06/01

2018/06/01

Title

Switch

Switch

Switch

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Tuesday, April 10, 2018

6 65

6 65

6 65

1

1.0

1.0

1.0

5

www.teknisi-indonesia.com

+1.8VALW

CC103

12

1

2

RC28
22K_0402_5%

RSMRST#

PWR_GOOD42

EC_WAKE#42

AC_PRESENT42

APU_AZ_SDIN038

1 2

@

RC129 0_0402_5%

DC1

RB751V-40_SOD323-2

12

AZ_RST#
AZ_SYNC
AZ_SDOUT

+3VALW

12

1 2

SCS00008K00

RC109
100K_0402_5%

@

@

0.1U_0402_10V7-K

AZ_BITCLK

EC_RSMRST#42

D D

+3VALW

@

@

RPC10

12

Strap

10K_0402_5%

CC14

RC11710K_0402_5%

12

2K_0402_1%

BOARD_ID0
BOARD_ID1

APU_AZ_SDIN2

APU_AZ_SDIN1

@

RC133 10K_0402_5%

+3VALW

RPC5

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

PWR_GOOD
PLT_RST#_R_G

C C

APU_AZ_BITCLK38

10P_0402_50V8-J

APU_AZ_RST#38
APU_AZ_SYNC38
APU_AZ_SDOUT38

B B

1 4
2 3

10K_0404_4P2R_5%

@

AC_PRESENT

SYS_RESET#
PBTN_OUT#
EC_WAKE#

BATLOW#

12

RC146

RC134

1 2

EMC@

1

EMC@

2

RPC7

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

EMC@

PCIE_RST1_L/EGPIO27

12

RC41

2K_0402_1%

33_0402_5%

RC42

4

0814: Follow 720S &DG add 10U Cap

1

CC115
10U_0603_25V6-K

2

RC157

1 2

33_0402_5%

Test_Point_20MIL

PBTN_OUT#42

PM_SLP_S3#42
PM_SLP_S5#9,42

PLT_RST#_R_G

2

CC106
150P_0201_25V9-J

1

PCIE_RST1_L/EGPIO27

1

TPC24

RSMRST#

PLT_RST#_R_G 25

0.1U_0402_10V7-K

PLT_RST#_R

PBTN_OUT#
PWR_GOOD
SYS_RESET#
EC_WAKE#

PM_SLP_S3#
PM_SLP_S5#

BOARD_ID1
AC_PRESENT

BATLOW#

AZ_BITCLK
APU_AZ_SDIN0
APU_AZ_SDIN1
APU_AZ_SDIN2
AZ_RST#
AZ_SYNC
AZ_SDOUT

BOARD_ID0

APU_SMB1DATA

3

+3VALW

1

CC105

@

2

5

UC7

1

P

B

4

Y

2

A

G

MC74VHC1G09DFT2G_SC70-5

3

@

1 2

@

RC155 0_0402_5%

ACPI/AUDIO/I2C/GPIO/MISC

BD5

PCIE_RST0_L/EGPIO26

BB6

PCIE_RST1_L/EGPIO27

AT16

RSMRST_L

AR15

PWR_BTN_L/AGPIO0

AV6

PWR_GOOD

AP10

SYS_RESET_L/AGPIO1

AV11

WAKE_L/AGPIO2

AV13

SLP_S3_L

AT14

SLP_S5_L

AR8

S0A3_GPIO/AGPIO10

AT10

AC_PRES/AGPIO23

AN6

LLB_L/AGPIO12

AW8

EGPIO42

AR2

AZ_BITCLK/TDM_BCLK_MIC

AP7

AZ_SDIN0/CODEC_GPI

AP1

AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK

AP4

AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK

AP3

AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC

AR4

AZ_SYNC/TDM_FRM_MIC

AR3

AZ_SDOUT/TDM_FRM_PLAYBACK

AT2

SW_MCLK/TDM_BCLK_BT

AT4

SW_DATA0/TDM_DOUT_BT

AR6

AGPIO7/FCH_ACP_I2S_SDIN_BT

AP6

AGPIO8/FCH_ACP_I2S_LRCLK_BT

+3VS

6 1

D

2N7002KDWH_SOT363-6

FP5 REV 0.90
PART 4 OF 13

2

G

S

QC9A

2N7002KDWH_SOT363-6

+3VALW

12

RC154

@

10K_0402_5%

Implement IO connect side

UC1D

AGPIO3

AGPIO9
AGPIO40
AGPIO69
AGPIO86

AW12
AU12

AR13
AT13

AN8
AN9

BC20
BA20

AM9
AM10

L16
M16

AT15
AW10

AP9
AU10
AV15

AU7
AU6
AW13
AW15

AU14
AU16
AV8

AW16
BD15

AR18
AT18

EGPIO41/SFI_S5_EGPIO41
AGPIO39/SFI_S5_AGPIO39

I2C0_SCL/SFI0_I2C_SCL/EGPIO151

I2C0_SDA/SFI0_I2C_SDA/EGPIO152

I2C1_SCL/SFI1_I2C_SCL/EGPIO149

I2C1_SDA/SFI1_I2C_SDA/EGPIO150

I2C2_SCL/EGPIO113/SCL0

I2C2_SDA/EGPIO114/SDA0

I2C3_SCL/AGPIO19/SCL1

I2C3_SDA/AGPIO20/SDA1

PSA_I2C_SCL

PSA_I2C_SDA

AGPIO4/SATAE_IFDET

AGPIO5/DEVSLP0
AGPIO6/DEVSLP1

SATA_ACT_L/AGPIO130

INTRUDER_ALERT

SPKR/AGPIO91

BLINK/AGPIO11

GENINT1_L/AGPIO89
GENINT2_L/AGPIO90

FANIN0/AGPIO84

FANOUT0/AGPIO85

AMD-RAVEN-FP5_BGA1140

TP SMB port

Vgs(th) Max >=2.0V

APU_SMB1_CLKAPU_SMB1CLK

5

G

S

APU_SMB1_DATA

3 4

D

QC9B

1

TPC19 Test_Point_12MIL

1

TPC20 Test_Point_12MIL

1

TPC21 Test_Point_12MIL

1

TPC22 Test_Point_12MIL

PLT_RST# 36,37,42

EGPIO151
EGPIO152

EGPIO149
EGPIO150

APU_SMB0CLK
APU_SMB0DATA

APU_SMB1CLK
APU_SMB1DATA

PSA_I2C_SCL
PSA_I2C_SDA

HDD_DEVSLP
SSD_DEVSLP

APU_SSD_RST#
EC_SMI#

1

TPC31 Test_Point_20MIL

APU_SPKR

NUMLOCK_LED#
F1_LED#

RF_OFF#
BT_ON

TOUCHPAD

2

PM_SLP_S3#
PM_SLP_S5#

RSMRST#
PBTN_OUT#

APU_SMB0CLK
APU_SMB0DATA

APU_SMB1CLK

APU_SMB1DATA

HDD_DEVSLP 30
SSD_DEVSLP 25

APU_SSD_RST# 25

EC_SMI# 42

APU_SPKR 39

NUMLOCK_LED# 46
F1_LED# 46

RF_OFF# 37
BT_ON 37

RC32 0_0402_5%

RC33 0_0402_5%

1

+1.8VS

RPC12

1 4
2 3

4.7K_0404_4P2R_5%

@

APU_SMB_CK0 9,14,15
APU_SMB_DA0 9,14,15

APU_SMB1_CLK 46

APU_SMB1_DATA 46

RPC6

1 8
2 7
3 6
4 5

2.2K_0804_8P4R_5%

1 2

@

1 2

@

RC149

1 2

RC150

1 2

@

@

0_0402_5%
0_0402_5%

PSA_I2C_SDA
PSA_I2C_SCL

APU_SMB_CK0

APU_SMB_DA0

APU_SMB1_CLK

APU_SMB1_DATA

APU_SMB1_CLK
APU_SMB1_DATA
APU_SMB0CLK
APU_SMB0DATA

RC9 Implement KB connect side

NUMLOCK_LED#

F1_LED#

APU_SSD_RST#

EC_SMI#

RF_OFF#

BT_ON

RPC9

1 4
2 3

10K_0404_4P2R_5%

@

RC167 10K_0402_5%

RC153 2.2K_0402_5%

@

RC36 10K_0402_5%
RC37

@

SW Can't pull down change to stuff 4/25

RC31 10K_0402_5%

RC110 10K_0402_5%

RC111 10K_0402_5%
RC113 10K_0402_5%

12

12

12

12

EGPIO149

EGPIO150

EGPIO151

EGPIO152

DIMM1, DIMM2

TOUCHPAD

+3VS

+3VS

12

12

12

12

10K_0402_5%

+3VALW

APU_SMB1CLK

APU_SMB1DATA

A A

2K_0402_1%

12

RC43

2K_0402_1%

@

5

RC44

12

@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

4

3

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2018/06/01

2018/06/01

2018/06/01

2.2K_0402_5%

2.2K_0402_5%

Title

Title

Title

Switch

Switch

Switch

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, April 10, 2018

RC151

12

RC152

12

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

1

7 65

7 65

7 65

1.0

1.0

1.0

1

www.teknisi-indonesia.com

2

3

4

5

UC1C

RC21

1 2

HDT@

HDT@

4
5
6

DISPLAY/SVI2/JTAG/TEST

DP_STEREOSYNC

VDDCR_SOC_SENSE

FP5 REV 0.90

PART 3 OF 13

AMD-RAVEN-FP5_BGA1140

33_0402_5%

+1.8VALW+1.8VALW

RC107
300_0402_5%

1 2

DP_BLON

DP_DIGON

DP_VARY_BL

DP0_AUXP
DP0_AUXN

DP0_HPD

DP1_AUXP
DP1_AUXN

DP1_HPD

DP2_AUXP
DP2_AUXN

DP2_HPD

DP3_AUXP
DP3_AUXN

DP3_HPD

RSVD_4
RSVD_3

RSVD_2

TEST4
TEST5

TEST6

TEST14
TEST15
TEST16
TEST17

TEST31/RSVD

TEST41

TEST470
TEST471

SMU_ZVDD

CORETYPE

VDDP_SENSE

VDDCR_SENSE

VSS_SENSE_A
VSS_SENSE_B

+1.8VALW

1
3
5
7

9
11
13
15
17
19

RC108
300_0402_5%

HDT@

1 2

APU_PWROK_BUF

APU_RST#_BUF

G15
F15
L14

D9
B9
C10

G11
F11
G13

J12
H12
K13

J10
H10
K8

K15
F14

F12
F10

AP14
AN14

F13
G18

H19
F18
F19

W24

AR11
AJ21

AK21

V4

AW11

AN11
J19
K18

J18
AM11

JHDT1

1
3
5
7
9
11
13
15
17
19

ME@

SAMTE_ASP-136446-07-B

DP0-EDP

A A

HDMI

+1.8VS

APU_PWROKAPU_RESET#

1

CC8
56P_0402_50V8-J

2

APU_PWROK59

H_PROCHOT#42

APU_RESET#
APU_PWROK

APU_PWROK_H

APU_SVC59
APU_SVD59
APU_SVT59

H_PROCHOT#

RC6 300_0402_5%

1 2
1 2

RC8 300_0402_5%

B B

1

CC7

@

56P_0402_50V8-J

2

C C

+1.8VALW

+3VS

+3VS

D D

RPC1

1 8
2 7
3 6
4 5

1K_0804_8P4R_5%

HDT@

1K_0402_5%

1K_0402_5%

RC127

1 2

RC128

1 2

AMD check can change R value to 2.2K

1 4
2 3

2.2K_0404_4P2R_5%

RC1261K_0402_1%

1 2

APU_TDI_H
APU_TMS_H
APU_TCK_H
APU_TRST#_H

RPC11

@

APU_THERMTRIP#42

APU_PROCHOT#

APU_ALERT#

APU_SIC
APU_SID

APU_THERMTRIP#

1

CPU_EDP_TX0+26
CPU_EDP_TX0-26

CPU_EDP_TX1+26
CPU_EDP_TX1-26

APU_TDI_H
APU_TDO_H
APU_TCK_H
APU_TMS_H
APU_TRST#_H

HDT@

APU_THERMTRIP#

APU_SVC

APU_SVD

APU_SVT

1

CC9

2

1000P_0402_50V7-K

@

H_HDMI_TX2+28
H_HDMI_TX2-28

H_HDMI_TX1+28
H_HDMI_TX1-28

H_HDMI_TX0+28

H_HDMI_TX0-28

H_HDMI_TXC+28
H_HDMI_TXC-28

HDT@

APU_PWROK

RC164

1 2

RC14

APU_PWROK_H

APU_RESET#_H

HDT@
HDT@

1 2

HDT@

CPU_EDP_TX0+
CPU_EDP_TX0-

CPU_EDP_TX1+
CPU_EDP_TX1-

H_HDMI_TX2+
H_HDMI_TX2-

H_HDMI_TX1+
H_HDMI_TX1-

H_HDMI_TX0+
H_HDMI_TX0-

H_HDMI_TXC+
H_HDMI_TXC-

1 2
1 2
1 2
1 2
1 2

RC162

RC163

1 2

0_0402_5%

@

RC15 0_0402_5%
RC16 0_0402_5%
RC17 0_0402_5%

1

CC10
1000P_0402_50V7-K

2

@

0_0402_5%

RC158

0_0402_5%

RC159
RC160 0_0402_5%HDT@
RC161 0_0402_5%HDT@

0_0402_5%

@

APU_DBREQ#

0_0402_5%

APU_SIC
APU_SID
APU_ALERT#

APU_PROCHOT#

0_0402_5%

@

1 2
1 2

@

1 2

@

APU_TRST#_H

1

CC11

Cap close to JHDT.9

0.01U_0201_25V7-K

2

0.1U_0201_6.3V6-K

3
2
1

APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#

APU_RESET#APU_RESET#_H

UC6

2A
GND
1A

AW3

AW4
AW2

AP16

SVC_RA
SVD_RA
SVT_RA

RPC2

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

HDT@

CC100

2

AU2
AU4
AU1
AU3
AV3

H14

J14
J15

L19

F16
H16

J16

SN74LVC2G07YZPR_WCSP6HDT@

C8
A8

D8
B8

B6
C7

C6
D6

E6
D5

E1
C1

F3
E4

F4
F2

1

2

HDT@

VCC

DP0_TXP0

DP0_TXN0
DP0_TXP1

DP0_TXN1
DP0_TXP2

DP0_TXN2
DP0_TXP3

DP0_TXN3
DP1_TXP0

DP1_TXN0
DP1_TXP1

DP1_TXN1
DP1_TXP2

DP1_TXN2
DP1_TXP3

DP1_TXN3

TDI
TDO
TCK
TMS
TRST_L
DBREQ_L

RESET_L
PWROK

SIC
SID
ALERT_L
THERMTRIP_L
PROCHOT_L

SVC0
SVD0
SVT0

2Y

1Y

APU_ENBKL_R
APU_ENVDD
APU_EDP_PWM_R

CPU_EDP_AUX
CPU_EDP_AUX#

CPU_EDP_HPD

HDMI_CLK
HDMI_DAT
HDMI_HPD

APU_DP3_AUXP
APU_DP3_AUXN
DDIP3_HPD

DP_STEREOSYNC

APU_TEST4
APU_TEST3

APU_TEST2

APU_TEST14
APU_TEST15
APU_TEST16
APU_TEST17

APU_TEST31

APU_TEST41
APU_TEST470

APU_TEST471

P_ZVDDP

TPC14

Test_Point_20MIL

VDDP_SENSE

1

VDDCR_SOC_VCC_SENSE

VDDCR_VCC_SENSE

VDDCR_VSS_SENSE
VSS_SENSE_B

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

TPC1 Test_Point_20MIL
TPC2 Test_Point_20MIL

TPC46 Test_Point_20MIL

TPC3

TEST4

TPC4

TEST5
TEST6

TPC5

TPC6 Test_Point_20MIL
TPC7 Test_Point_20MIL
TPC8 Test_Point_20MIL
TPC9 Test_Point_20MIL

TPC10 Test_Point_20MIL

TPC11 Test_Point_20MIL
TPC12 Test_Point_20MIL

TPC13 Test_Point_20MIL

CORETYPE

TPC18

APU_TCK_H
APU_TMS_H

HDT@

1 2

RC20

APU_TDO_H
APU_PWROK_BUF
APU_RST#_BUF

RC24

1 2

HDT@

1
1

1

1
1

1

1
1
1
1

1

1
1

1

1

Check again 3/30

3

APU_ENVDD 26

CPU_EDP_AUX 26

CPU_EDP_AUX# 26

CPU_EDP_HPD 26

HDMI_CLK 28
HDMI_DAT 28
HDMI_HPD 28

APU_DP3_AUXP 33
APU_DP3_AUXN 33

DDIP3_HPD 31,33

Test_Point_20MIL
Test_Point_20MIL

Test_Point_20MIL

1 2

RC13

1

Test_Point_20MIL

0_0402_5%

33_0402_5%

HDT@

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

RC12196_0402_0.5%

1 2

TPC15

1

Issued Date

Issued Date

Issued Date

10K_0402_5%@

Test_Point_20MIL

TPC16

Test_Point_20MIL

VDDCR_SOC_VCC_SENSE 59
VDDCR_VCC_SENSE 59

TPC17

1

Test_Point_20MIL

VDDCR_VSS_SENSE 59

APU_TDI_H

APU_DBREQ#

1

CC12

0.01U_0201_25V7-K

2

eDP

HDMI

Typec0

0814:Change EDP lever shift follow 720S dual MOS solution

+0.9VS_VDDP

+3VALW_APU

+1.8VALW

12

RC22
1K_0402_1%HDT@

Cap close to JHDT.16

2017/02/16

2017/02/16

2017/02/16

APU_ENBKL_R

12

RC5100K_0402_5%

@

APU_EDP_PWM_R

12

RC11100K_0402_5%

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

4

2

G

@

2

G

For AMD suggest HDMI driver check HDMI port enable ,change DP_STEREOSYNC from
1k pull down to 1K pull high

APU_SIC

APU_SID

2018/06/01

2018/06/01

2018/06/01

+3VALW

RC136

10K_0402_5%

1 2

@

61

D

QC2A
DMN5L06DWK-7 2N SOT363-6

S

+3VALW

RC9

10K_0402_5%

1 2

61

D

QC8A
DMN5L06DWK-7 2N SOT363-6

S

RC26

1 2

@

RC27

1 2

@

+3VS

12

RC1

4.7K_0402_5%

@

34

D

5

G

@

5

QC2B
DMN5L06DWK-7 2N SOT363-6

S

@

RC3 0_0402_5%

1 2

+3VS

12

RC7

4.7K_0402_5%

34

D

G

1 2

0_0402_5%

0_0402_5%

QC8B
DMN5L06DWK-7 2N SOT363-6

S

RC135

0_0402_5%

@

EC_SMB_CK3

Title

Title

Title

Switch

Switch

Switch

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

EC_SMB_DA3

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Tuesday, April 10, 2018

APU_TEST14
APU_TEST16
APU_TEST15

APU_TEST17

DP_STEREOSYNC

EC_SMB_CK3 42,50

EC_SMB_DA3 42,50

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

5

ENBKL

12

PANEL_BKLT_CTRL 26

RPC3

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

@

ENBKL 42

RC148
100K_0402_5%

+1.8VS

@

8 65

8 65

8 65

RC23
1K_0402_1%

1 2

RC25
1K_0402_1%

1 2

+1.8VS

1.0

1.0

1.0

5

www.teknisi-indonesia.com

4

3

2

1

UC1E

EGPIO120 Reserves for SSD detect 8/4

If no use need SW internal PU PD

+3VS

RPC8

CLKREQ_PCIE1_LAN#

1 8

CLKREQ_PCIE2_CR#

2 7

D D

Delete CLKREQ_PCIE_VGA#
change to RPC8 PIN4,PIN5 for CLKREQ_PCIE7_SSD 8/4

C C

3 6
4 5

10K_0804_8P4R_5%

CLKREQ_PCIE3_WLAN#
CLKREQ_PCIE7_SSD#

CLKREQ_PCIE1_LAN#36
CLKREQ_PCIE2_CR#36

D_J_CTL26
CLKREQ_PCIE3_WLAN#37
SSD_SATA_PCIE_DET#25

CLKREQ_PCIE7_SSD#25

CLK_PCIE_LAN36
CLK_PCIE_LAN#36

CLK_PCIE_CR36
CLK_PCIE_CR#36

CLK_PCIE_WLAN37
CLK_PCIE_WLAN#37

CLK_PCIE_SSD25
CLK_PCIE_SSD#25

CLKREQ_PCIE1_LAN#
CLKREQ_PCIE2_CR#

D_J_CTL
CLKREQ_PCIE3_WLAN#
SSD_SATA_PCIE_DET#
CLKREQ_PCIE7_SSD#

CLK_PCIE_LAN
CLK_PCIE_LAN#

CLK_PCIE_CR
CLK_PCIE_CR#

CLK_PCIE_WLAN
CLK_PCIE_WLAN#

CLK_PCIE_SSD
CLK_PCIE_SSD# CLK_PCIE_SSD#_R

1 2

RC48 0_0402_5%

1 2

RC46 0_0402_5%

1 2

RC47 0_0402_5%

1 2

RC52 0_0402_5%

1 2

RC54 0_0402_5%

1 2

RC55 0_0402_5%

1 2

RC58 0_0402_5%

1 2

RC59 0_0402_5%

RTCCLK_R25,37

Follow 720S

@
@

@
@

@
@

@
@

1

2

CLK_PCIE_LAN_R

CLK_PCIE_LAN#_R

CLK_PCIE_CR_R
CLK_PCIE_CR_R#

CLK_PCIE_WLAN_R
CLK_PCIE_WLAN#_R

CLK_PCIE_SSD_R

X48M_OSC

1

TPC37Test_Point_20MIL

1 2

RC64 0_0402_5%

@

RC65

1 2

20M_0402_5%
YC1

1 2

32.768KHZ_12.5PF_202740-PG14

CC16
10P_0402_50V8-J

X48M_X1

X48M_X2

X32K_X1

X32K_X2

1

2

AV18

CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92

AN19

CLK_REQ1_L/AGPIO115

AP19

CLK_REQ2_L/AGPIO116

AT19

CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131

AU19

CLK_REQ4_L/OSCIN/EGPIO132

AW18

CLK_REQ5_L/EGPIO120

AW19

CLK_REQ6_L/EGPIO121

AK1

GPP_CLK0P

AK3

GPP_CLK0N

AM2

GPP_CLK1P

AM4

GPP_CLK1N

AM1

GPP_CLK2P

AM3

GPP_CLK2N

AL2

GPP_CLK3P

AL4

GPP_CLK3N

AN2

GPP_CLK4P

AN4

GPP_CLK4N

AN3

GPP_CLK5P

AP2

GPP_CLK5N

AJ2

GPP_CLK6P

AJ4

GPP_CLK6N

AJ3

X48M_OSC

BB3

X48M_X1

BA5

X48M_X2

AF8

1

TPC47Test_Point_20MIL

RSVD_76

1

AF9

TPC48Test_Point_20MIL

RSVD_77

AW14

RTCCLK

RTCCLK

AY1

X32K_X1

AY4

X32K_X2

CC17
10P_0402_50V8-J

change YC2 PN change to SJ10000MQ00,manual modify PN to SJ10000MQ00

10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

8MB(64Mb)

SPI_CS3#
SPI_CS1#
SPI_IO2

SPI_IO3

SPI_CS2#

SPI_CS2#_TPM

SPI_SO

RC75

1 2

1M_0402_5%

YC2

1

OSC1

NC2

1

CC19

8.2P_0402_50V8-C

2

1023: For vendor test request : Change CC19 from 10p to 8.2p

NC12OSC2

48MHZ_10PF_7V48000017

X48M_X1

X48M_X2

4
3

12

CC20
10P_0402_50V8-J

+1.8V_SPI

+1.8VALW

B B

For layout change RPC9

1 2

RC122

RC123

1 2

RC124

1 2

RC125

1 2

0814: For AMD suggestion , pull 10k to S5

RC132

1 2

@

RC81

1 2

RC82

1 2

CLK/LPC/EMMC/SD/SPI/eSPI/UART

@

RC169 0_0402_5%

LPC_PD_L/SD_CMD/AGPIO21

LPC_RST_L/SD_WP_L/AGPIO32

LPC_PME_L/SD_PWR_CTRL/AGPIO22

ESPI_RESET_L/KBRST_L/AGPIO129
ESPI_ALERT_L/LDRQ0_L/EGPIO108

SPI_CS2_L/ESPI_CS_L/AGPIO30

UART0_RTS_L/UART2_RXD/EGPIO137
UART0_CTS_L/UART2_TXD/EGPIO135

EGPIO142/UART1_RTS_L/UART3_RXD
EGPIO140/UART1_CTS_L/UART3_TXD

FP5 REV 0.90
PART 5 OF 13

AMD-RAVEN-FP5_BGA1140

SPI_CS1#
SPI_SO
SPI_IO2

1
2
3
4

EGPIO70/SD_CLK

LAD0/SD_DATA0/EGPIO104
LAD1/SD_DATA1/EGPIO105
LAD2/SD_DATA2/EGPIO106
LAD3/SD_DATA3/EGPIO107

LPCCLK0/EGPIO74

LPC_CLKRUN_L/AGPIO88

LPCCLK1/EGPIO75

SERIRQ/AGPIO87

LFRAME_L/EGPIO109

AGPIO68/SD_CD

SPI_ROM_REQ/EGPIO67
SPI_ROM_GNT/AGPIO76

SPI_CLK/ESPI_CLK

SPI_DI/ESPI_DAT1

SPI_DO/ESPI_DAT0

SPI_WP_L/ESPI_DAT2

SPI_HOLD_L/ESPI_DAT3

SPI_CS1_L/EGPIO118

SPI_CS3_L/AGPIO31

SPI_TPM_CS_L/AGPIO29

UART0_RXD/EGPIO136
UART0_TXD/EGPIO138

UART0_INTR/AGPIO139

EGPIO141/UART1_RXD
EGPIO143/UART1_TXD

AGPIO144/UART1_INTR

/CS
DO(IO1)

/HOLD or/RESET(IO3)
/WP(IO2)
GND

W25Q128FWSIQ_SO8

BD13
BB14

AGPIO21

BB12
BC11
BB15
BC15

LPC_CLK0

BA15

LPC_CLKRUN#

BC13

LPC_CLK1

BB13
BC12

SERIRQ

LPC_FRAME#

BA12

LPC_RST#_R LPC_RST#

BD11
BA11

EC_SCI#

BA13

BC8
BB8

BB11

KBRST#

BC6

LDRQ0#

BB7
BA9
BB10
BA10
BC10

SPI_CS1#

BC9

SPI_CS2#

BA8

SPI_CS3#

BA6

SPI_CS2#_TPM

BD8

UART0_RXD_C

BA16

UART0_TXD_C

BB18

UART0_RTS#

BC17

UART0_CTS#

BA18

UART0_INTR

BD18

BC18
BA17

F4_LED#

BC16
BB19
BB16

UC8M1

+1.8V_SPI

8

VCC

SPI_IO3

7

SPI_CLK

6

CLK

SPI_SI

5

DI(IO0)

RC168 0_0402_5%

LPC_AD0_R
LPC_AD1_R
LPC_AD2_R
LPC_AD3_R

RC56 33_0402_5%

1 2

RC60

SPI_SO
SPI_SI

0.085 A

1 2

1 2

RC45
RC49
RC50 10_0402_5%

RC51

1 2

RC53

1 2

SPI_IO2
SPI_IO3

+1.8V_SPI

@
1 2
1 2
1 2
1 2

10_0402_5%

10_0402_5%

10_0402_5%
10_0402_5%

CLK_PCI_EC

22_0402_5%EMC@

SPI_CLKSPI_CLK_C

SPI_CS2#_TPM 44

F4_LED# 46

RC69 0_0402_5%

1

CC18

0.1U_0201_16V6-K

2

LPCPD#

FN_LED#

1 2

@

1024：Change SA000077F00 8M to SA00008E400 W25Q128FWSIQ 16M for TPM update

SPI_CS1#
SPI_SI
SPI_SO
SPI_CLK

1 2

RC76 22_0402_5%@

1 2

RC77 22_0402_5%@

1 2

RC78 22_0402_5%@

1 2

RC79 22_0402_5%@

0814 Mirror function change to offline burn

EC_SPI_CS1#
EC_SPI_SI
EC_SPI_SO
EC_SPI_CLK

FN_LED# 46

LPC_AD0

LPC_AD1

LPC_AD2
LPC_AD3

CLK_PCI_EC 42

SERIRQ 42
LPC_FRAME# 42

LPC_RST# 42
EC_SCI# 42

KBRST# 42

SPI_CLK 44
SPI_SO 44
SPI_SI 44

+1.8VALW

EC_SPI_CS1# 42
EC_SPI_SI 42
EC_SPI_SO 42
EC_SPI_CLK 42

LPC_AD0 42

LPC_AD1 42
LPC_AD2 42
LPC_AD3 42

LPCPD#

LPC_CLK1

FN_LED#

CLK_PCI_EC

Close to APU

LPC_RST#

SPI_CLK_C

CC15 150P_0402_50V8-J

0814:Change F4_LED# GPIO control

F4_LED#

LPC_FRAME#

KBRST#

UART0_RXD_C

UART0_TXD_C

UART0_RTS#

UART0_CTS#

UART0_INTR

RC170 10K_0402_5%

RC62
RC115

1 2

RC166

RC139
RC67

RC73 1K_0402_5%
RC74 1K_0402_5%
RC71 1K_0402_5%
RC72 1K_0402_5%
RC116 1K_0402_5%

RC83

12

@

EMC_NS@

1 2
1 2

1 2

1 2
1 2

@

1 2

@

1 2

@

1 2

@

1 2

@

1 2

1 2

@
@

@

@

+3VS

1

CC102
10P_0402_50V8-J

2

10K_0402_5%
10K_0402_5%

10K_0402_5%

10K_0402_5%
10K_0402_5%

10K_0402_5%

+3VS

+1.8VS

Strap

LPC ROM EMULATOR HEADER

+3VS_APU

+3VALW

RC86

RC85

0_0402_5%

0_0402_5%

LPC@

LPC@

1 2

LPC_FRAME#
LPC_RST#

+3VS_APU

RC93

CC24

APU_SMB_CK0

RC91
RC92

LPC@

1 2

1 2

APU_SMB_CK07,14,15

A A

5

4

1 2

RC87 0_0402_5%

1 2

RC89 0_0402_5%

LPC@

10K_0402_5%

1 2

@

10K_0402_5%

1 2

100K_0402_5%

150P_0402_50V8-J

@

LPC@

LPC@

1 2

LPC_RST#_H

LPCRUNPWR

APU_SMB_CK0_LPC

1

1

2

CC23

0.1U_0402_10V7-K

2

LPC@

CC22

0.1U_0402_10V7-K

LPC@

RC3152 RC3153 should be put on APU side to reduce stub when MP

LPCPD#

LPC_CLKRUN#

LPC_RST#

PIN4 should be removed as a Key

IT10 @

IT11@

1

IT12@

1

IT21 @

IT14@

1

IT22 @

IT16@

1

IT24 @

IT17@

1

3

DAISY CHAIN ROUTING FOR LPC SIGNALS

UNNAMED_16_CON20_I130_P6

1

1 2

RC88 0_0402_5%@

APU_SMB1_DATA_LPC

1
1

1

SERIRQ
LDRQ0#

1 2

RC90 0_0402_5%

PM_SLP_S5#

LPC@

PM_SLP_S5# 7,42

APU_SMB_DA0 7,14,15

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2018/06/01

2018/06/01

2018/06/01

Title

Title

Title

Switch

Switch

Switch

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

D

D

D

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Tuesday, April 10, 2018

1

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

9 65

9 65

9 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

4

3

2

1

D D

T11

RSVD_32

AC7

RSVD_66

Y9

RSVD_55

Y10

RSVD_56

W11

RSVD_47

W12

RSVD_48

V9

RSVD_38

V10

RSVD_39

AA12

RSVD_64

AC10

RSVD_68

+1.8VALW

C C

+3VALW

B B

USBC_I2C_SCL

1 2

RC94

4.7K_0402_5%

USBC_I2C_SDA USBC0_1_TXN0

1 2

RC95

4.7K_0402_5%

RPC13

USB_OC1#

1 4

USB_OC0#

2 3

10K_0404_4P2R_5%

USBC0 For Full typec

USB P0

USB3.0 Port1

USB P1

USB3.0 port2

USB P2

IO BOARD

USB3.0

USB P4

CAMERA

USB P5

USB20_P033
USB20_N033

USB20_P135
USB20_N135

USB20_P235
USB20_N235

USB20_P336
USB20_N336

USB20_P_WLAN37
USB20_N_WLAN37

USB20_P5_CAMERA26
USB20_N5_CAMERA26

INT#_TYPEC_CPU31
USB_OC0#35
USB_OC1#35
USB_OC2#36

USB20_P0
USB20_N0

USB20_P1
USB20_N1

USB20_P2
USB20_N2

USB20_P_WLAN
USB20_N_WLAN

USB20_P5_CAMERA
USB20_N5_CAMERA

USBC_I2C_SCL

USBC_I2C_SDA

INT#_TYPEC_CPU
USB_OC0#
USB_OC1#
USB_OC2#

AGPIO13

USB20_P3
USB20_N3

AE7
AE6

AG10

AG9

AF12
AF11

AE10

AE9

AJ12
AJ11

AD9
AD8

AM6
AM7

AK10

AK9
AL9

AL8
AW7
AT12

RSVD

FP5 REV 0.90

PART 12 OF 13

USB_0_DP0
USB_0_DM0

USB_0_DP1
USB_0_DM1

USB_0_DP2
USB_0_DM2

USB_0_DP3
USB_0_DM3

USB_1_DP0
USB_1_DM0

USB_1_DP1
USB_1_DM1

USBC_I2C_SCL
USBC_I2C_SDA

USB_OC0_L/AGPIO16
USB_OC1_L/AGPIO17
USB_OC2_L/AGPIO18
USB_OC3_L/AGPIO24
AGPIO14/USB_OC4_L
AGPIO13/USB_OC5_L

UC1L

RSVD_62
RSVD_61
RSVD_65

RSVD_72
RSVD_67

RSVD_63
RSVD_33

RSVD_73
RSVD_53

RSVD_54
RSVD_45

RSVD_46

AMD-RAVEN-FP5_BGA1140

UC1J

USB

USBC0_A2/USB_0_TXP0/DP3_TXP2

USBC0_A3/USB_0_TXN0/DP3_TXN2

USBC0_B11/USB_0_RXP0/DP3_TXP3

USBC0_B10/USB_0_RXN0/DP3_TXN3

USBC1_A2/USB_0_TXP3/DP2_TXP2

USBC1_A3/USB_0_TXN3/DP2_TXN2

USBC1_B11/USB_0_RXP3/DP2_TXP3

USBC1_B10/USB_0_RXN3/DP2_TXN3

FP5 REV 0.90
PART 10 OF 13

AMD-RAVEN-FP5_BGA1140

AA9
AA8
AC6

AD11
AC9

AA11
T12

AD12
Y6

Y7
W8

W9

USBC0_B2/DP3_TXP1
USBC0_B3/DP3_TXN1

USBC0_A11/DP3_TXP0
USBC0_A10/DP3_TXN0

USB_0_TXP1

USB_0_TXN1
USB_0_RXP1

USB_0_RXN1

USB_0_TXP2

USB_0_TXN2
USB_0_RXP2

USB_0_RXN2

USBC1_B2/DP2_TXP1
USBC1_B3/DP2_TXN1

USBC1_A11/DP2_TXP0
USBC1_A10/DP2_TXN0

USB_1_TXP0

USB_1_TXN0
USB_1_RXP0

USB_1_RXN0

AD2
AD4

AC2
AC4

AF4
AF2

AE3
AE1

AG3
AG1

AJ9
AJ8

AG4
AG2

AG7
AG6

AA2
AA4

Y1
Y3

AC1
AC3

AB2
AB4

AH4
AH2

AK7
AK6

USBC0_0_TXP0
USBC0_0_TXN0

USBC0_0_RXP0
USBC0_0_RXN0

USBC0_1_TXP0

USBC0_1_RXP0
USBC0_1_RXN0

USB3P1_TXP
USB3P1_TXN

USB3P1_RXP
USB3P1_RXN

USB3P2_TXP
USB3P2_TXN

USB3P2_RXP
USB3P2_RXN

USBC0_0_TXP0 33
USBC0_0_TXN0 33

USBC0_0_RXP0 33

USBC0_0_RXN0 33

USBC0_1_TXP0 33
USBC0_1_TXN0 33

USBC0_1_RXP0 33

USBC0_1_RXN0 33

USB3P1_TXP 35
USB3P1_TXN 35

USB3P1_RXP 35
USB3P1_RXN 35

USB3P2_TXP 35
USB3P2_TXN 35

USB3P2_RXP 35
USB3P2_RXN 35

USB Typec 0

USB Typec integrated USBC SWITCH with DP

USB3.0 Port1

USB3.0 port2

USBC0_A2/USB_0_TXP0/DP3_TXP[2]1
USBC0_A3/USB_0_TXN0/DP3_TXN[2]1 O-IOVP-D USB Super Speed Port Transmit
USBC0_B11/USB_0_RXP0/DP3_TXP[3]1
USBC0_B10/USB_0_RXN0/DP3_TXN[3]1 B-IOVP-D USB Super Speed Port Receive
USBC1_A11/DP2_TXP[0]1
USBC1_A10/DP2_TXN[0]1 B-IOVP-D USB Super Speed Port Receive
USBC1_B2/DP2_TXP[1]1
USBC1_B3/DP2_TXN[1]1 O-IOVP-D USB Super Speed Port Transmit
USBC1_A2/USB_0_TXP3/DP2_TXP[2]1
USBC1_A3/USB_0_TXN3/DP2_TXN[2]1 O-IOVP-D USB Super Speed Port Transmit
USBC1_B11/USB_0_RXP3/DP2_TXP[3]1
B-IOVP-D USB Super Speed Port Receive

USBC0_A11/DP3_TXP[0]1
USBC0_A10/DP3_TXN[0]1 B-IOVP-D USB Super Speed Port Receive
USBC0_B2/DP3_TXP[1]1
USBC0_B3/DP3_TXN[1]1 O-IOVP-D USB Super Speed Port Transmit

RC99

AGPIO13

A A

1 2

10K_0402_5%

USB_OC2#

Vgs(th) max= 1V

0814: Change MOS to Dual MOS

RC118
10K_0402_5%@

1 2

USBC_I2C_SCL

USBC_I2C_SDA

5

4

+1.8VALW

G

2

S

61

D

QC4A
DMN5L06DWK-7 2N SOT363-6

S

QC4B
DMN5L06DWK-7 2N SOT363-6

G

5

REPETER_SCL

REPETER_SDA

34

D

PD I2C port

REPETER_SCL 31,33

REPETER_SDA 31,33

3

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2018/06/01

2018/06/01

2018/06/01

Title

Title

Title

Switch

Switch

Switch

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

D

D

D

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Tuesday, April 10, 2018

1

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

10 65

10 65

10 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

D D

C C

4

UC1M

A18

CAM0_CSI2_CLOCKP

C18

CAM0_CSI2_CLOCKN

A15

CAM0_CSI2_DATAP0

C15

CAM0_CSI2_DATAN0

B16

CAM0_CSI2_DATAP1

C16

CAM0_CSI2_DATAN1

C19

CAM0_CSI2_DATAP2

B18

CAM0_CSI2_DATAN2

B17

CAM0_CSI2_DATAP3

D17

CAM0_CSI2_DATAN3

D12

CAM1_CSI2_CLOCKP

B12

CAM1_CSI2_CLOCKN

C13

CAM1_CSI2_DATAP0

A13

CAM1_CSI2_DATAN0

B11

CAM1_CSI2_DATAP1

C12

CAM1_CSI2_DATAN1

J13

RSVD_6

CAMERAS

CAM0_SHUTDOWN

CAM1_SHUTDOWN

FP5 REV 0.90
PART 13 OF 13

AMD-RAVEN-FP5_BGA1140

CAM0_CLK

CAM0_I2C_SCL
CAM0_I2C_SDA

CAM1_CLK

CAM1_I2C_SCL
CAM1_I2C_SDA

CAM_PRIV_LED

CAM_IR_ILLU

3

B15
D15

C14
B13

B10
A11

C11
D11
D13

D10

2

1

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2018/06/01

2018/06/01

2018/06/01

Title

Switch

Switch

Switch

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

D

D

D

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Tuesday, April 10, 2018

1

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

11 65

11 65

11 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

4

3

2

1

D D

All BU(on bottom side under SOC)

Delete 22U 0603 and place PWR portion under SOC

Need discuss if space enough ,reserves others component

+VDDC_VDD

112

112

1

CC47

2

1U_0402_6.3V7-K

CD@

1

CC74

BO

2

22U_0603_6.3V6-M

+0.9VALW_VDDP

CC96

1

BO

2

2

+3VALW_APU+3VALW

@

2

+1.8VS

BU

1

CC56

1U_0402_6.3V6-K

2

+1.2V

RC156

@

+1.5VS

1 2

0823： Chaneg from 1.5V to 1.8V HDA for codec

0_0603_5%

1 2

+VDDIO_AZ

RC100

0_0603_5%

1

@

CC55

BO

2

22U_0603_6.3V6-M

+3VS_APU

CC76

CC75

BO

BU

1

1

2

2

1U_0201_6.3V6-M

1U_0201_6.3V6-M

CD@

+3VALW_APU

+1.8VALW

0.5A

+1.8VS

2A

0.25A

0.25A

1A

+0.9VS_VDDP

4A

+RTC_LDO

0815：Change for 0201 for layout

CC97

CC98

1

1

BU

BO

BO

2

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1

CC99

2

2

180P_0201_25V7-K

1U_0201_6.3V6-M

CD@

1K_0402_5%

RC101

1 2

+RTC_LDO

CC87

1U_0402_6.3V6-K

+RTC_LDO

J2 JUMP_43X39

J3 JUMP_43X39

+3VS_APU

CC38

1

1

BU

CC46

BO

2

2

22U_0603_6.3V6-M

C C

+3VALW_APU

1

CC71

2

22U_0603_6.3V6-M

+0.9VALW_VDDP

1

CC83

BO

B B

+0.9VS_VDDP

2

22U_0603_6.3V6-M

1

BO BU

BO

CC90

CC89

2

22U_0603_6.3V6-M

22U_0603_6.3V6-M

1U_0201_6.3V6-M

CC72

BO

1

BU

BO

2

1U_0201_6.3V6-M

CC85

CC84

BU

BU

1

1

2

2

1U_0201_6.3V6-M

CC91

1

1

BU

BU

2

2

1U_0201_6.3V6-M

+1.8VS

CC39

1

BO

2

1U_0201_6.3V6-M

CD@

CC73

1

2

1U_0201_6.3V6-M

CD@

CC86

BO

1

2

1U_0201_6.3V6-M

1U_0201_6.3V6-M

CD@

CC94

CC92

CC93

1

1

1

BU

2

2

2

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

CC41

BO

BU

1

1

CC40

BO

2

2

22U_0603_6.3V6-M

1U_0201_6.3V6-M

+1.8VALW

BO

CC95

1

2

1U_0201_6.3V6-M

+3VS_APU+3VS

@

+VDDIO_AZ

+VDDBT_RTC

1

2

+VDDCR_SOC

1

CC88

2

0.22U_0402_10V6-K

10A

0.1A

M15
M18
M19
N16
N18
N20

P17

P19
R18
R20

T19
U18
U20

V19
W18
W20

Y19

T32

V28
W28
W32

Y22

Y25

Y28

AA20
AA23
AA26
AA28
AA32
AC20
AC22
AC25
AC28
AD23
AD26
AD28
AD32
AE20
AE22
AE25
AE28
AF23
AF26
AF28
AF32
AG20
AG22
AG25
AG28

AJ20
AJ23
AJ26
AJ28

AJ32
AK28
AL28
AL32

AP12
AL18

AM17
AL20

AM19
AL19

AM18
AL17

AM16
AL14

AL15
AM14

AL13
AM12
AM13
AN12
AN13

AT11

12

R395
470_0603_5%@

13

D

QC7

S

2N7002KW_SOT323-3

@

VDDCR_SOC_1
VDDCR_SOC_2
VDDCR_SOC_3
VDDCR_SOC_4
VDDCR_SOC_5
VDDCR_SOC_6
VDDCR_SOC_7
VDDCR_SOC_8
VDDCR_SOC_9
VDDCR_SOC_10
VDDCR_SOC_11
VDDCR_SOC_12
VDDCR_SOC_13
VDDCR_SOC_14
VDDCR_SOC_15
VDDCR_SOC_16
VDDCR_SOC_17

VDDIO_MEM_S3_1
VDDIO_MEM_S3_2
VDDIO_MEM_S3_3
VDDIO_MEM_S3_4
VDDIO_MEM_S3_5
VDDIO_MEM_S3_6
VDDIO_MEM_S3_7
VDDIO_MEM_S3_8
VDDIO_MEM_S3_9
VDDIO_MEM_S3_10
VDDIO_MEM_S3_11
VDDIO_MEM_S3_12
VDDIO_MEM_S3_13
VDDIO_MEM_S3_14
VDDIO_MEM_S3_15
VDDIO_MEM_S3_16
VDDIO_MEM_S3_17
VDDIO_MEM_S3_18
VDDIO_MEM_S3_19
VDDIO_MEM_S3_20
VDDIO_MEM_S3_21
VDDIO_MEM_S3_22
VDDIO_MEM_S3_23
VDDIO_MEM_S3_24
VDDIO_MEM_S3_25
VDDIO_MEM_S3_26
VDDIO_MEM_S3_27
VDDIO_MEM_S3_28
VDDIO_MEM_S3_29
VDDIO_MEM_S3_30
VDDIO_MEM_S3_31
VDDIO_MEM_S3_32
VDDIO_MEM_S3_33
VDDIO_MEM_S3_34
VDDIO_MEM_S3_35
VDDIO_MEM_S3_36
VDDIO_MEM_S3_37
VDDIO_MEM_S3_38
VDDIO_MEM_S3_39
VDDIO_MEM_S3_40

VDDIO_AUDIO
VDD_33_1

VDD_33_2
VDD_18_1

VDD_18_2
VDD_18_S5_1

VDD_18_S5_2
VDD_33_S5_1

VDD_33_S5_2
VDDP_S5_1

VDDP_S5_2
VDDP_S5_3

VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5

VDDBT_RTC_G

2

G

EC_RTCRST#_ON

@

UC1F

POWER

FP5 REV 0.90
PART 6 OF 13

AMD-RAVEN-FP5_BGA1140

12

RC145
100K_0402_5%

G7

VDDCR_1

G10

VDDCR_2

G12

VDDCR_3

G14

VDDCR_4

H8

VDDCR_5

H11

VDDCR_6

H15

VDDCR_7

K7

VDDCR_8

K12

VDDCR_9

K14

VDDCR_10

L8

VDDCR_11

M7

VDDCR_12

M10

VDDCR_13

N14

VDDCR_14

P7

VDDCR_15

P10

VDDCR_16

P13

VDDCR_17

P15

VDDCR_18

R8

VDDCR_19

R14

VDDCR_20

R16

VDDCR_21

T7

VDDCR_22

T10

VDDCR_23

T13

VDDCR_24

T15

VDDCR_25

T17

VDDCR_26

U14

VDDCR_27

U16

VDDCR_28

V13

VDDCR_29

V15

VDDCR_30

V17

VDDCR_31

W7

VDDCR_32

W10

VDDCR_33

W14

VDDCR_34

W16

VDDCR_35

Y8

VDDCR_36

Y13

VDDCR_37

Y15

VDDCR_38

Y17

VDDCR_39

AA7

VDDCR_40

AA10

VDDCR_41

AA14

VDDCR_42

AA16

VDDCR_43

AA18

VDDCR_44

AB13

VDDCR_45

AB15

VDDCR_46

AB17

VDDCR_47

AB19

VDDCR_48

AC14

VDDCR_49

AC16

VDDCR_50

AC18

VDDCR_51

AD7

VDDCR_52

AD10

VDDCR_53

AD13

VDDCR_54

AD15

VDDCR_55

AD17

VDDCR_56

AD19

VDDCR_57

AE8

VDDCR_58

AE14

VDDCR_59

AE16

VDDCR_60

AE18

VDDCR_61

AF7

VDDCR_62

AF10

VDDCR_63

AF13

VDDCR_64

AF15

VDDCR_65

AF17

VDDCR_66

AF19

VDDCR_67

AG14

VDDCR_68

AG16

VDDCR_69

AG18

VDDCR_70

AH13

VDDCR_71

AH15

VDDCR_72

AH17

VDDCR_73

AH19

VDDCR_74

AJ7

VDDCR_75

AJ10

VDDCR_76

AJ14

VDDCR_77

AJ16

VDDCR_78

AJ18

VDDCR_79

AK13

VDDCR_80

AK15

VDDCR_81

AK17

VDDCR_82

AK19

VDDCR_83

EC_RTCRST#_ON 42

35A

+VDDC_VDD

All BU(on bottom side under SOC)

All BU(on bottom side under SOC)

+1.2V

1

1

1

CC59

CC60

CC61

2

2

2

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

CD@

CD@

All BU(on bottom side under SOC)

COST DOWN 4 PIECES

+1.2V

DECOUPLING BETWEEN PROCESSOR AND DIMMs

ACROSS VDDIO AND VSS SPLIT

1

1

EMC@

1

2

CC79

CC78

CC77

2

2

0.22U_0402_10V6-K

0.22U_0402_10V6-K

All BU(on bottom side under SOC)

4x0.22UF (0402)+2x180PF(0402)

0.22U_0402_10V6-K

EMC@

1

180P_0402_50V8-J

CC44

2

+VDDCR_SOC

1

1

180P_0402_50V8-J

CC57

1U_0402_6.3V6-K

1

1

1

1

1

CC63

CC64

CC62

2

2

2

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

1

CC80

2

0.22U_0402_10V6-K

22U_0603_6.3V6-M

CD@

1

CC81

2

CD@

180P_0201_25V7-K

1

CC65

CC66

CC67

2

2

2

1U_0402_6.3V6-K

22U_0603_6.3V6-M

22U_0603_6.3V6-M

1

180P_0402_50V8-J

CC82

2

CC58

2

2

1

1

1

180P_0402_50V8-J

CC68

CC69

2

CC70

2

2

1U_0402_6.3V6-K

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2018/06/01

2018/06/01

2018/06/01

Title

Switch

Switch

Switch

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

D

D

D

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Tuesday, April 10, 2018

12 65

12 65

12 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

D D

4

3

2

1

UC1G

GND

N12

VSS_316

A3

VSS_1

A5

VSS_2

A7

VSS_3

A10

VSS_4

A12

VSS_5

A14

VSS_6

A16

VSS_7

A19

VSS_8

A21

VSS_9

A23

VSS_10

A26

VSS_11

A30

VSS_12

C3

VSS_13

C32

VSS_14

D16

VSS_15

D18

VSS_16

D20

VSS_17

E7

VSS_18

E8

VSS_19

E10

VSS_20

E11

VSS_21

E12

VSS_22

E13

VSS_23

E14

VSS_24

E15

VSS_25

E16

C C

B B

VSS_26

E18

VSS_27

E19

VSS_28

E20

VSS_29

E21

VSS_30

E22

VSS_31

E23

VSS_32

E25

VSS_33

E26

VSS_34

E27

VSS_35

F5

VSS_36

F28

VSS_37

G1

VSS_38

G5

VSS_39

G16

VSS_40

G19

VSS_41

G21

VSS_42

G23

VSS_43

G26

VSS_44

G28

VSS_45

G32

VSS_46

H5

VSS_47

H13

VSS_48

H18

VSS_49

H20

VSS_50

H22

VSS_51

H25

VSS_52

H28

VSS_53

K1

VSS_54

K5

VSS_55

K16

VSS_56

K19

VSS_57

K21

VSS_58

K22

VSS_59

K26

VSS_60

K28

VSS_61

FP5 REV 0.90
PART 7 OF 13

K32

VSS_62

L5

VSS_63

L13

VSS_64

L15

VSS_65

L18

VSS_66

L20

VSS_67

L25

VSS_68

L28

VSS_69

M1

VSS_70

M5

VSS_71

M12

VSS_72

M21

VSS_73

M23

VSS_74

M26

VSS_75

M28

VSS_76

M32

VSS_77

N4

VSS_78

N5

VSS_79

N8

VSS_80

N11

VSS_81

N13

VSS_82

N15

VSS_83

N17

VSS_84

N19

VSS_85

N22

VSS_86

N25

VSS_87

N28

VSS_88

P1

VSS_89

P5

VSS_90

P14

VSS_91

P16

VSS_92

P18

VSS_93

P20

VSS_94

P23

VSS_95

P26

VSS_96

P28

VSS_97

P32

VSS_98

R5

VSS_99

R11

VSS_100

R12

VSS_101

R13

VSS_102

R15

VSS_103

R17

VSS_104

R19

VSS_105

R22

VSS_106

R25

VSS_107

R28

VSS_108

R30

VSS_109

T1

VSS_110

T5

VSS_111

T14

VSS_112

T16

VSS_113

T18

VSS_114

T20

VSS_115

T23

VSS_116

T26

VSS_117

T28

VSS_118

U13

VSS_119

U15

VSS_120

U17

VSS_121

U19

VSS_122

V5

VSS_123

AMD-RAVEN-FP5_BGA1140

AW28

AR5

AR7
AR12
AR14
AR16
AR19
AR21
AR26
AR28
AR32

AU5

AU8
AU11
AU13
AU15
AU18
AU20
AU22
AU25
AU28

AV10
AV12
AV14
AV16
AV19
AV21
AV23
AV26
AV28
AV32

AW5

AY10
AY11
AY12
AY13
AY14
AY15
AY16
AY18
AY19
AY20
AY21
AY22
AY23
AY25
AY26
AY27

BB20
BB32

BD3

BD7
BD10
BD12
BD14

AV1
AV5
AV7

AY6
AY7
AY8

BB1

VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309

FP5 REV 0.90
PART 11 OF 13

UC1K

GND/RSVD

VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315

RSVD_1
RSVD_5
RSVD_7
RSVD_8

RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13
RSVD_22
RSVD_23
RSVD_30
RSVD_31
RSVD_37
RSVD_44
RSVD_49
RSVD_50
RSVD_57
RSVD_58
RSVD_59
RSVD_60
RSVD_69
RSVD_70
RSVD_71
RSVD_74
RSVD_75
RSVD_78
RSVD_79
RSVD_80
RSVD_81
RSVD_82
RSVD_83
RSVD_87
RSVD_88

RSVD_14
RSVD_84
RSVD_85
RSVD_86

AMD-RAVEN-FP5_BGA1140

V8
V11
V12
V14
V16
V18
V20
V22
V25

W1
W5

Y5
Y11
Y12
Y14
Y16
Y18
Y20
AA1
AA5

AC5
AC8

AD1
AD5

AE5

AF1
AF5

AG5

VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185

FP5 REV 0.90
PART 8 OF 13

UC1H

GND

AG8

VSS_186

AG11

VSS_187

AG12

VSS_188

AG13

VSS_189

AG15

VSS_190

AG17

VSS_191

AG19

VSS_192

AH14

VSS_193

AH16

VSS_194

AH18

VSS_195

AH20

VSS_196

AJ1

VSS_197

AJ5

VSS_198

AJ13

VSS_199

AJ15

VSS_200

AJ17

VSS_201

AJ19

VSS_202

AK5

VSS_203

AK8

VSS_204

AK11

VSS_205

AK12

VSS_206

AK14

VSS_207

AK16

VSS_208

AK18

VSS_209

AK20

VSS_210

AK22

VSS_211

AK25

VSS_212

AL1

VSS_213

AL5

VSS_214

AL7

VSS_215

AL10

VSS_216

AL12

VSS_217

AL16

VSS_218

AL23

VSS_219

AL26

VSS_220

AM5

VSS_221

AM8

VSS_222

AM15

VSS_223

AM20

VSS_224

AM22

VSS_225

AM25

VSS_226

AM28

VSS_227

AN1

VSS_228

AN5

VSS_229

AN7

VSS_230

AN10

VSS_231

AN15

VSS_232

AN18

VSS_233

AN21

VSS_234

AN23

VSS_235

AN26

VSS_236

AN28

VSS_237

AN32

VSS_238

AP5

VSS_239

AP8

VSS_240

AP13

VSS_241

AP15

VSS_242

AP18

VSS_243

AP20

VSS_244

AP25

VSS_245

AP28

VSS_246

AR1

VSS_247

AMD-RAVEN-FP5_BGA1140

BD16
BD19
BD21
BD23
BD26
BD30

W13
W15
W17

W19
B20
G3
J20
K3
K6
K20
M3
M6
M13
P6
P22
T3
T6
T29
W6
W21
W22
Y21
Y27
AA3
AA6
AC29
AD3
AD6
AF3
AF6
AF30
AJ6
AJ24
AK23
AK27
AL3
AN29
AN31

M14
AL6
AL11
AN16

W23

W26

AA13
AA15
AA17
AA19
AB14
AB16
AB18
AB20

AC11
AC12
AC13
AC15
AC17
AC19

AD14
AD16
AD18
AD20

AE11

AE12

AE13

AE15

AE17

AE19

AF14

AF16

AF18

AF20

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2018/06/01

2018/06/01

2018/06/01

Title

Switch

Switch

Switch

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

D

D

D

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Tuesday, April 10, 2018

1

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

13 65

13 65

13 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

4

3

2

+2.5V

1

1

CD66

180P_0402_50V8-J

2

DDR_A_EVENT# 6

SA_CLK_DDR1 6
SA_CLK_DDR#1 6

DDR_A_BA0 6
DDR_A_RAS# 6

DDR_A_CAS# 6

1

CD26
1000P_0402_50V7-K

2

1

CD27

0.1U_0402_10V7-K

2

BA0

SA2

SDA
SA0
VTT
SA1

1

CD9

2

0.1U_0402_10V7-K

+0.6VS

1

@

@

2

+1.2V +0.6VS

132

A2

134
136
138
140
142
144

A0

146
148
150
152
154
156
158

A13

160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
242
244
246
248
250
252
254
256
258
260

262

+1.2V

12

RD1
1K_0402_1%

D D

+1.2V +1.2V

DDR_A_D5

C C

B B

DDR_A_CKE06

DDR_A_BG16
DDR_A_BG06

DDR_A_D1
DDR_A_DQS#0

DDR_A_DQS0
DDR_A_D7
DDR_A_D3
DDR_A_D10
DDR_A_D13
DDRA_MA_DM1
DDR_A_D15

DDR_A_D14

DDR_A_D21
DDR_A_D17
DDR_A_DQS#2

DDR_A_DQS2
DDR_A_D23
DDR_A_D19
DDR_A_D29
DDR_A_D25
DDRA_MA_DM3
DDR_A_D30
DDR_A_D26

DDR_A_BG1
DDR_A_BG0

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA6

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129

M_VREF_CA_DIMMA

12

RD2
1K_0402_1%

JDIMM1A

VSS_1
DQ5
VSS_3
DQ1
VSS_5
DQS0_C

DM0_n/DBl0_n
DQS0_t
VSS_8
DQ7
VSS_10
DQ3
VSS_12
DQ13
VSS_14
DQ9
VSS_16
DM1_n/DBl_n
VSS_17
DQ15
VSS_19
DQ10
VSS_21
DQ21
VSS_23
DQ17
VSS_25
DQS2_c

DM2_n/DBl2_n
DQS2_t
VSS_28
DQ23
VSS_30
DQ19
VSS_32
DQ29
VSS_34
DQ25
VSS_36
DM3_n/DBl3_n
VSS_37
DQ30
VSS_39
DQ26
VSS_41
CB5/NC
VSS_43
CB1/NC
VSS_45
DQS8_c

DM8_n/DBl_n/NC
DQS8_t
VSS_48
CB2/NC
VSS_50
CB3/NC
VSS_52
CKE0
VDD_1
BG1
BG0
VDD_3
A12
A9
VDD_5
A8
A6
VDD_7

ARGOS_D4AR0-26005-1P40

ME@

RESET_n

ALERT_n

1

CD13

0.1U_0402_10V7-K

2

VSS_2

DQ4

VSS_4

DQ0

VSS_6
VSS_7

DQ6

VSS_9

DQ2

VSS_11

DQ12

VSS_13

DQ8

VSS_15

DQS1_c

DQS1_t
VSS_18

DQ14

VSS_20

DQ11

VSS_22

DQ20

VSS_24

DQ16

VSS_26
VSS_27

DQ22

VSS_29

DQ18

VSS_31

DQ28

VSS_33

DQ24

VSS_35

DQS3_c

DQS3_t
VSS_38

DQ31

VSS_40

DQ27
VSS_42
CB4/NC
VSS_44
CB0/NC
VSS_46

VSS_47
CB6/NC
VSS_49
CB7/NC
VSS_51

CKE1

VDD_2
ACT_n

VDD_4

A11

A7

VDD_6

A5
A4

VDD_8

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130

DDR_A_D4
DDR_A_D0
DDRA_MA_DM0
DDR_A_D6
DDR_A_D2
DDR_A_D12
DDR_A_D8
DDR_A_DQS#1

DDR_A_DQS1

DDR_A_D9
DDR_A_D11
DDR_A_D20
DDR_A_D16
DDRA_MA_DM2
DDR_A_D22
DDR_A_D18
DDR_A_D28
DDR_A_D24
DDR_A_DQS#3

DDR_A_DQS3
DDR_A_D31
DDR_A_D27

DDR_A_CKE1DDR_A_CKE0
DDR_A_ACT_N

DDR_A_ALERT_N
DDR_A_MA11

DDR_A_MA7
DDR_A_MA5

DDR_A_MA4

+1.2V

1

CD1
10U_0402_6.3V6-MCD@

2

+1.2V

2

CD14

0.1U_0402_10V7-K

1

+1.2V

12

RD9

@

1K_0402_1%

1

CD30

EMC_NS@

0.1U_0402_10V7-K

2

CD@

1

CD2
10U_0402_6.3V6-M

2

2

CD15

0.1U_0402_10V7-K

1

DDRA_MA_DM[0..7] 6
DDR_A_D[0..63] 6
DDR_A_MA[0..13] 6
DDR_A_DQS#[0..7] 6
DDR_A_DQS[0..7] 6

+3VS +3VS +3VS

12

RD4

@

10K_0402_5%

SA0_CHA_P SA1_CHA_P SA2_CHA_P

0_0402_5%
R1

1 2

1023: change 0 ohm to R SHORT

1

CD3
10U_0402_6.3V6-M

2

EMC@

2

CD16

0.1U_0402_10V7-K

1

12

1 2

RD5

@

10K_0402_5%

0_0402_5%
RD7

SPD Address = 0H

DDR4_A_DRAMRST# 6
DDR_A_CKE1 6

DDR_A_ACT_N 6
DDR_A_ALERT_N 6

+3VS

1

CD4
10U_0402_6.3V6-M

2

2

CD17

0.1U_0402_10V7-K

1

12

1 2

RD10

12

0_0402_5%

2

CD18

0.1U_0402_10V7-K

1

SA_CLK_DDR#06
DDR_A_PARITY6

RD6

@

10K_0402_5%

0_0402_5%

RD8

1

CD5
10U_0402_6.3V6-M

2

SA_CLK_DDR06

DDR_A_BA16

DDR_A_CS0#6

DDR_A_WE#6

DDR_A_ODT06
DDR_A_CS1#6

DDR_A_ODT16

APU_SMB_CK07,9,15

2

CD19

0.1U_0402_10V7-K

1

1

CD28

0.1U_0402_10V7-K

2

CD@

1

CD6
10U_0402_6.3V6-M

2

EMC@

DDR_A_MA3
DDR_A_MA1

SA_CLK_DDR0
SA_CLK_DDR#0

DDR_A_PARITY

DDR_A_BA1
DDR_A_CS0#

DDR_A_ODT0
DDR_A_CS1#

DDR_A_ODT1

DDR_A_D37
DDR_A_D33
DDR_A_DQS#4

DDR_A_DQS4
DDR_A_D38
DDR_A_D34
DDR_A_D44
DDR_A_D40
DDRA_MA_DM5
DDR_A_D46
DDR_A_D42
DDR_A_D52
DDR_A_D49
DDR_A_DQS#6

DDR_A_DQS6
DDR_A_D55
DDR_A_D51
DDR_A_D61
DDR_A_D60
DDRA_MA_DM7
DDR_A_D56
DDR_A_D57
APU_SMB_CK0

1

2

1

2

2

CD20

0.1U_0402_10V7-K

1

CD29

2.2U_0402_6.3V6-M

CD7
10U_0402_6.3V6-M

2

CD75 100U_1206_6.3V6M@

CD21

0.1U_0402_10V7-K

1

+1.2V+2.5V

131
133
135
137
139
141
143

145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
231
233
235
237
239
241
243
245
247
249
251
253
255
257
259

261

1

CD8
10U_0402_6.3V6-M

2

1

100U_1206_6.3V6M

2

JDIMM1B

A3
A1

EVENT_n/NF
VDD_9
CK0_t
CK0_c
VDD_11
Parity

BA1
VDD_13
CS0_n
A14/WE_n
VDD_15
ODT0
CS1_n
VDD_17
ODT1

C0/CS2_n/NC
VDD_19
C1/CS3_n/NC
VSS_53
DQ37
VSS_55
DQ33
VSS_57
DQS4_c

DM4_n/DBl4_n
DQS4_t
VSS_60
DQ38
VSS_62
DQ34
VSS_64
DQ44
VSS_66
DQ40
VSS_68
DM5_n/DBl5_n
VSS_69
DQ46
VSS_71
DQ42
VSS_73
DQ52
VSS_75
DQ49
VSS_77
DQS6_c

DM6_n/DBl6_n
DQS6_t
VSS_80
DQS5
VSS_82
DQ51
VSS_84
DQ61
VSS_86
DQ56
VSS_88
DM7_n/DBl7_n
VSS_89
DQ62
VSS_91
DQ58
VSS_93
SCL
VDDSPD
VPP_1
VPP_2

GND_1

ARGOS_D4AR0-26005-1P40

ME@

CD74

VDD_10

CK1_t/NF

CK1_c/NF

VDD_12

A10/AP

VDD_14

A16/RAS_n

VDD_16

A15/CAS_n

VDD_18

VREFCA

VSS_54

DQ36

VSS_56

DQ32

VSS_58
VSS_59

DQ39

VSS_61

DQ35

VSS_63

DQ45

VSS_65

DQ41

VSS_67

DQS5_c

DQS5_t
VSS_70

DQ47

VSS_72

DQ43

VSS_74

DQ53

VSS_76

DQ48

VSS_78
VSS_79

DQ54

VSS_81

DQ50

VSS_83

DQ60

VSS_85

DQ57

VSS_87

DQS7_c

DQS7_t
VSS_90

DQ63

VSS_92

DQ59

VSS_94

GND_2

CD25

1U_0402_6.3V6-K

1

CD10

2

0.1U_0402_10V7-K

1

CD23

2

0.1U_0402_10V7-K

DDR_A_MA2

SA_CLK_DDR1
SA_CLK_DDR#1

DDR_A_MA0

DDR_A_MA10
DDR_A_BA0

DDR_A_RAS#DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13

M_VREF_CA_DIMMA
SA2_CHA_P

DDR_A_D36
DDR_A_D32
DDRA_MA_DM4
DDR_A_D39
DDR_A_D35
DDR_A_D45
DDR_A_D41
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D47
DDR_A_D43
DDR_A_D53
DDR_A_D48
DDRA_MA_DM6
DDR_A_D54
DDR_A_D50
DDR_A_D63
DDR_A_D59
DDR_A_DQS#7

DDR_A_DQS7

DDR_A_D62
DDR_A_D58

APU_SMB_DA0
SA0_CHA_P

SA1_CHA_P

CD11

1U_0402_6.3V6-K

1

CD24

2

4.7U_0402_6.3V6-M

+1.2V

12

RD3
1K_0402_1%

APU_SMB_DA0 7,9,15

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2018/06/01

2018/06/01

2018/06/01

Title

DDR4 CH-A PRIMARY

DDR4 CH-A PRIMARY

DDR4 CH-A PRIMARY

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Tuesday, April 10, 2018

14 65

14 65

1

14 65

1.0Custom

1.0Custom

1.0Custom

5

www.teknisi-indonesia.com

+1.2V

12

RD11
1K_0402_1%

M_VREF_CA_DIMMB

12

D D

RD12
1K_0402_1%

1

CD42

0.1U_0402_10V7-K

2

Layout Node:

Place Close DIMMs

+1.2V +1.2V

DDR_B_D5

C C

B B

DDR_B_CKE06

DDR_B_BG16
DDR_B_BG06

DDR_B_D1
DDR_B_DQS#0

DDR_B_DQS0
DDR_B_D7
DDR_B_D3
DDR_B_D13
DDR_B_D9
DDRA_MB_DM1
DDR_B_D15
DDR_B_D10
DDR_B_D21
DDR_B_D17
DDR_B_DQS#2

DDR_B_DQS2
DDR_B_D23
DDR_B_D19
DDR_B_D29
DDR_B_D25
DDRA_MB_DM3
DDR_B_D30
DDR_B_D26

DDR_B_CKE0
DDR_B_BG1

DDR_B_BG0
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA6

JDIMM2A

1

VSS_1

3

DQ5

5

VSS_3

7

DQ1

9

VSS_5

11

DQS0_C

13

DQS0_t

15

VSS_8

17

DQ7

19

VSS_10

21

DQ3

23

VSS_12

25

DQ13

27

VSS_14

29

DQ9

31

VSS_16

33

DM1_n/DBl_n

35

VSS_17

37

DQ15

39

VSS_19

41

DQ10

43

VSS_21

45

DQ21

47

VSS_23

49

DQ17

51

VSS_25

53

DQS2_c

55

DQS2_t

57

VSS_28

59

DQ23

61

VSS_30

63

DQ19

65

VSS_32

67

DQ29

69

VSS_34

71

DQ25

73

VSS_36

75

DM3_n/DBl3_n

77

VSS_37

79

DQ30

81

VSS_39

83

DQ26

85

VSS_41

87

CB5/NC

89

VSS_43

91

CB1/NC

93

VSS_45

95

DQS8_c

97

DQS8_t

99

VSS_48

101

CB2/NC

103

VSS_50

105

CB3/NC

107

VSS_52

109

CKE0

111

VDD_1

113

BG1

115

BG0

117

VDD_3

119

A12

121

A9

123

VDD_5

125

A8

127

A6

129

VDD_7

ARGOS_D4AR0-26005-1P40

ME@

VSS_2
VSS_4
VSS_6

DM0_n/DBl0_n

VSS_7
VSS_9

VSS_11

DQ12

VSS_13
VSS_15

DQS1_c

DQS1_t
VSS_18

DQ14

VSS_20

DQ11

VSS_22

DQ20

VSS_24

DQ16

VSS_26

DM2_n/DBl2_n

VSS_27

DQ22

VSS_29

DQ18

VSS_31

DQ28

VSS_33

DQ24

VSS_35

DQS3_c

DQS3_t
VSS_38

DQ31

VSS_40

DQ27
VSS_42
CB4/NC
VSS_44
CB0/NC
VSS_46

DM8_n/DBl_n/NC

VSS_47
CB6/NC
VSS_49
CB7/NC
VSS_51

RESET_n

CKE1

VDD_2
ACT_n

ALERT_n

VDD_4

VDD_6

VDD_8

DQ4
DQ0

DQ6
DQ2

DQ8

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120

A11

122

A7

124
126

A5

128

A4

130

4

+0.6VS

1

CD41

1U_0402_6.3V6-K

@

+2.5V

1

CD43

0.1U_0402_10V7-K

2

DDR_B_D4
DDR_B_D0
DDRA_MB_DM0
DDR_B_D6
DDR_B_D2
DDR_B_D12
DDR_B_D8
DDR_B_DQS#1

DDR_B_DQS1
DDR_B_D14
DDR_B_D11
DDR_B_D20
DDR_B_D16
DDRA_MB_DM2
DDR_B_D22 DDR_B_D34
DDR_B_D18
DDR_B_D28
DDR_B_D24
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D31
DDR_B_D27

DDR4_B_DRAMRST#
DDR_B_CKE1

DDR_B_ACT_N
DDR_B_ALERT_N

DDR_B_MA11
DDR_B_MA7

DDR_B_MA5
DDR_B_MA4

CD39

0.1U_0402_10V7-K

2

1

CD44

0.1U_0402_10V7-K

2

DDRA_MB_DM[0..7] 6

DDR_B_D[0..63] 6
DDR_B_MA[0..13] 6
DDR_B_DQS#[0..7] 6
DDR_B_DQS[0..7] 6

+1.2V

12

RD20

@

1K_0402_1%

1

CD59

EMC_NS@

2

0.1U_0402_10V7-K

1

CD40

2

4.7U_0402_6.3V6-M

CD45

1U_0402_6.3V6-K

+3VS

12

RD14

@

10K_0402_5%

SA0_CHB_P SA1_CHB_P SA2_CHB_P

0_0402_5%

RD17

1 2

SPD Address = 2H

1023: change 0 ohm to R SHORT

DDR4_B_DRAMRST# 6
DDR_B_CKE1 6

DDR_B_ACT_N 6
DDR_B_ALERT_N 6

+3VS +3VS

@

+3VS

1

2

12

RD15
10K_0402_5%

RD18
0_0402_5%

1 2

3

CD73

180P_0402_50V8-J

RD21

0_0402_5%

+1.2V

1

CD31
10U_0402_6.3V6-M

2

+1.2V

2

CD47

0.1U_0402_10V7-K

1

SB_CLK_DDR06

SB_CLK_DDR#06

DDR_B_PARITY6

DDR_B_BA16

DDR_B_CS0#6

DDR_B_WE#6

DDR_B_ODT06
DDR_B_CS1#6

DDR_B_ODT16

12

RD16

@

10K_0402_5%

0_0402_5%
RD19

1 2

12

APU_SMB_CK07,9,14

1

CD60

0.1U_0402_10V7-K

2

2

2

CD51

0.1U_0402_10V7-K

1

EMC@

EVENT_n/NF

VDD_10

CK1_t/NF

CK1_c/NF

VDD_12

A10/AP

VDD_14

A16/RAS_n

VDD_16

A15/CAS_n

VDD_18

C0/CS2_n/NC

VREFCA

VSS_54

DQ36

VSS_56

DQ32

VSS_58

DM4_n/DBl4_n

VSS_59

DQ39

VSS_61

DQ35

VSS_63

DQ45

VSS_65

DQ41

VSS_67

DQS5_c

DQS5_t
VSS_70

DQ47

VSS_72

DQ43

VSS_74

DQ53

VSS_76

DQ48

VSS_78

DM6_n/DBl6_n

VSS_79

DQ54

VSS_81

DQ50

VSS_83

DQ60

VSS_85

DQ57

VSS_87

DQS7_c

DQS7_t
VSS_90

DQ63

VSS_92

DQ59

VSS_94

SDA
VTT

GND_2

1

CD35
10U_0402_6.3V6-M

2

CD@

132

A2

134
136
138
140
142
144

A0

146
148
150

BA0

152
154
156
158

A13

160
162
164
166

SA2

168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
242
244
246
248
250
252
254
256

SA0

258
260

SA1

262

1

2

CD@

2

CD52

0.1U_0402_10V7-K

1

DDR_B_MA2

SB_CLK_DDR1
SB_CLK_DDR#1

DDR_B_MA0

DDR_B_MA10
DDR_B_BA0

DDR_B_RAS#
DDR_B_CAS#

DDR_B_MA13

M_VREF_CA_DIMMB
SA2_CHB_P

DDR_B_D36
DDR_B_D32
DDRA_MB_DM4
DDR_B_D39
DDR_B_D35
DDR_B_D45
DDR_B_D41
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D47
DDR_B_D43
DDR_B_D53
DDR_B_D48
DDRA_MB_DM6
DDR_B_D54
DDR_B_D50
DDR_B_D60
DDR_B_D57
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_D63

APU_SMB_DA0
SA0_CHB_P

SA1_CHB_P

CD36
10U_0402_6.3V6-M

1

CD32
10U_0402_6.3V6-M

2

2

CD48

0.1U_0402_10V7-K

1

DDR_B_MA3
DDR_B_MA1

SB_CLK_DDR0
SB_CLK_DDR#0

DDR_B_PARITY

DDR_B_BA1
DDR_B_CS0#

DDR_B_WE#
DDR_B_ODT0

DDR_B_CS1#
DDR_B_ODT1

DDR_B_D37
DDR_B_D33
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D38

DDR_B_D44
DDR_B_D40
DDRA_MB_DM5
DDR_B_D46
DDR_B_D42
DDR_B_D52
DDR_B_D49
DDR_B_DQS#6

DDR_B_DQS6
DDR_B_D55
DDR_B_D51
DDR_B_D61
DDR_B_D56
DDRA_MB_DM7
DDR_B_D62
DDR_B_D58 DDR_B_D59
APU_SMB_CK0

1

CD61

2.2U_0402_6.3V6-M

2

1

CD33
10U_0402_6.3V6-M

2

2

CD49

0.1U_0402_10V7-K

1

+1.2V+2.5V +1.2V +0.6VS

1

2

2

CD50

0.1U_0402_10V7-K

1

JDIMM2B

131

A3

133

A1

135

VDD_9

137

CK0_t

139

CK0_c

141

VDD_11

143

Parity

145

BA1

147

VDD_13

149

CS0_n

151

A14/WE_n

153

VDD_15

155

ODT0

157

CS1_n

159

VDD_17

161

ODT1

163

VDD_19

165

C1/CS3_n/NC

167

VSS_53

169

DQ37

171

VSS_55

173

DQ33

175

VSS_57

177

DQS4_c

179

DQS4_t

181

VSS_60

183

DQ38

185

VSS_62

187

DQ34

189

VSS_64

191

DQ44

193

VSS_66

195

DQ40

197

VSS_68

199

DM5_n/DBl5_n

201

VSS_69

203

DQ46

205

VSS_71

207

DQ42

209

VSS_73

211

DQ52

213

VSS_75

215

DQ49

217

VSS_77

219

DQS6_c

221

DQS6_t

223

VSS_80

225

DQS5

227

VSS_82

229

DQ51

231

VSS_84

233

DQ61

235

VSS_86

237

DQ56

239

VSS_88

241

DM7_n/DBl7_n

243

VSS_89

245

DQ62

247

VSS_91

249

DQ58

251

VSS_93

253

SCL

255

VDDSPD

257

VPP_1

259

VPP_2

261

GND_1

ARGOS_D4AR0-26005-1P40

ME@

CD34
10U_0402_6.3V6-M

2

CD53

0.1U_0402_10V7-K

1

+1.2V

1

1

CD37
10U_0402_6.3V6-M

2

2

0.1U_0402_10V7-K

1

CD@

12

RD13
1K_0402_1%

1

CD56

2

APU_SMB_DA0 7,9,14

1

2

CD@

CD54

CD63 100U_1206_6.3V6M@

DDR_B_EVENT# 6
SB_CLK_DDR1 6

SB_CLK_DDR#1 6

DDR_B_BA0 6
DDR_B_RAS# 6

DDR_B_CAS# 6

1

CD57

2.2U_0402_6.3V6-M

1000P_0402_50V7-K

2

@

CD38
10U_0402_6.3V6-M

1

100U_1206_6.3V6M

2

1

CD58

0.1U_0402_10V7-K

2

CD62

1

@

2

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2018/06/01

2018/06/01

2018/06/01

Title

DDR4 CH-B PRIMARY

DDR4 CH-B PRIMARY

DDR4 CH-B PRIMARY

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Tuesday, April 10, 2018

15 65

15 65

1

15 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

D D

C C

4

3

2

1

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2018/06/01

2018/06/01

2018/06/01

Title

VGA Notes List

VGA Notes List

VGA Notes List

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, April 10, 2018

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

1

16 65

16 65

16 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

D D

4

3

2

1

C C

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

2017/02/16

2017/02/16

2017/02/16

3

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2018/06/01

2018/06/01

2018/06/01

2

Title

ATI_R17M-M1-70_PCIE

ATI_R17M-M1-70_PCIE

ATI_R17M-M1-70_PCIE

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, April 10, 2018

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

1

17 65

17 65

17 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

D D

4

3

2

1

C C

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2018/06/01

2018/06/01

2018/06/01

Title

ATI_R17M-M1-70_Main_MSIC

ATI_R17M-M1-70_Main_MSIC

ATI_R17M-M1-70_Main_MSIC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Tuesday, April 10, 2018

1

18 65

18 65

18 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

D D

C C

4

3

2

1

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2018/06/01

2018/06/01

2018/06/01

2

Title

ATI_R17M-M1-70_TMDP

ATI_R17M-M1-70_TMDP

ATI_R17M-M1-70_TMDP

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, April 10, 2018

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

1

19 65

19 65

19 65

1.0

1.0

1.0

5

www.teknisi-indonesia.com

D D

C C

4

3

2

1

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2017/02/16

2017/02/16

2017/02/16

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2018/06/01

2018/06/01

2018/06/01

2

Title

ATI_R17M-M1-70_DP Power

ATI_R17M-M1-70_DP Power

ATI_R17M-M1-70_DP Power

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Tuesday, April 10, 2018

Tuesday, April 10, 2018

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, April 10, 2018

JINN/DOOKU

JINN/DOOKU

JINN/DOOKU

1

20 65

20 65

20 65

1.0

1.0

1.0