Lenovo S10 - QUANTA FL2 Schematics

5
hexainf@hotmail.com
4
3
2
1
VTERM(+0.9V) VTT(+1.05V) +1.5VSUS +1.5V
D D
+VCC18MEM
XDP
+1.8V +2.5V 3VPCU
Thermal Sensor
+3.3V +3VS5 LCD_3.3V
CRT
LCD_5V +5V
C C
10.1" LCD TS Panel
Lenovo Caucasus 2 (Pine Trail) Block Diagram
RGB
LVDS
Pineview
Micro-FCBGA8
X2 DMI
VID[0:6]
+/- CPU_CLK +/- HCLK DOT96_CLK LCD_CLK PE_CLK
MEMCLK0,1 MEMCLK2,3 CHA
CPU VCORE
Clock Gengerator
CK505M
DDR2
533/667
SO-DIMM
(Up to 2GB)
IMVP 6
2009.09.28.
USB
SATA
PCI-e
2.5" HDD/SSD
Mini PCIe Slot
WLAN (Half)
RJ-45
Ethernet LAN 10/100/1000
BCM57780
Tigerpoint
PCI-e
B B
HDA CODEC
HD Audio
360-MMAP
PCI-e/USB
Mini PCIe Slot
WWAN / SIM (Fully)
(Option DTV)
HP/Mic
Int. DMic
CX20582-11Z
USB
LPC BUS
Card Reader AU6433B52
USBX2
SPDIF
APS
LIS34ALTR
Int. SPK
A A
1.5W X 2
X,Y,Z
ITE
IT8502
SPI Flash
USB
USB
USB PORT X 2
Camera Conn.
6 in 1 Card Reader Socket
Camera Module
1.3M / VGA
BT Connector
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Int. KB T/P
5
4
Battery
Charger
3
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Block Diagram
Block Diagram
Block Diagram
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
FL2
FL2
FL2
1 36Thursday, November 05, 2009
1 36Thursday, November 05, 2009
1 36Thursday, November 05, 2009
1
1
2
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7
8
Table of Contents Voltage Rails & Power States
PAGE DESCRIPTION
1
Schematic Block Diagram
2
A A
B B
POWER PLANE
Adapter Power Pulg In VBAT VIN 5VPCU 3VPCU +5V_S5 System Aux Power (Wake Up On LAN) +3V_S5 +5VSUS
+5V +3V
Battery Power
System Power (Adapter or Battery Power)
System Always Power
System Always Power
System Aux Power (Wake Up On LAN)
System Aux Power
System Aux Power +3VSUS
System Normal Power
System Normal Power
DESCRIPTION
VOLTAGEVACONTROL SIGNAL
20V 12V ~ 10V 10V ~ 20V 5V
3.3V 5V
3.3V 5V
3.3V 5V
3.3V
PWM IC PWM IC S5_ON S5_ON SUS_ON SUS_ON Main_ON Main_ON
S0 S3 S4 S5
Y Y Y Y Y Y Y Y Y Y Y Y Y
Y Y Y Y Y Y Y Y Y Y Y Y
Y
Y
Y
N (Y)/ N /(Y) N N
N
N
N
N
Y Y
N (Y) N N N N
(Y)N
/ /
C C
GND PLANE PAGE
GND ALL
D D
1
2
DESCRIPTION
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
POWER MANAGER
POWER MANAGER
POWER MANAGER
Date: Sheet of
Date: Sheet of
4
5
6
Date: Sheet of
7
PROJECT :
FL2
FL2
FL2
1A
1A
2 36Thursday, November 05, 2009
2 36Thursday, November 05, 2009
2 36Thursday, November 05, 2009
8
1A
A
hexainf@hotmail.com
CLK_XIN_CK505
CLK_XOUT_CK505 PM_STPCPU# PM_STPPCI#
PCLK_SMB_M(11,14,18,24) PDAT_SMB_M(11,14,18,24)
VCC3_CK505
C299 0.1U/10V_4C299 0.1U/10V_4 C294 0.1U/10V_4C294 0.1U/10V_4 C281 0.1U/10V_4C281 0.1U/10V_4 C279 0.1U/10V_4C279 0.1U/10V_4 C292 0.1U/10V_4C292 0.1U/10V_4 C286 0.1U/10V_4C286 0.1U/10V_4
VCCP_CK505
C300 0.1U/10V_4C300 0.1U/10V_4 C301 0.1U/10V_4C301 0.1U/10V_4 C287 0.1U/10V_4C287 0.1U/10V_4 C277 0.1U/10V_4C277 0.1U/10V_4 C282 0.1U/10V_4C282 0.1U/10V_4 C280 0.1U/10V_4C280 0.1U/10V_4
R100
R100
8.2K_4
8.2K_4
3
1
PCI
33.33
Q20
Q20
2N7002E
2N7002E
14.318
CLKEN
REF
CLKEN CLKUSB_48_R CLK_FSB_R 14M_ICH_R
add at 7/20 a-shian
33.33
14.31833.33
33.33
RESERVED
CLKUSB_48(8)
14M_ICH(11)
BSEL0BSEL1BSEL2
C130 27P/50V_4C130 27P/50V_4
27P/50V_4
27P/50V_4
C129
C129
CPU
0
266.66
1
133.33
0
200.00
1
166.66
0
333.33
1
100.00
0
400.00
1
21
Y1
Y1
14.318MHZ/20P/20PPM
14.318MHZ/20P/20PPM
R96 0_4R96 0_4
PM_STPCPU#(11) PM_STPPCI#(11)
CPU_BSEL0 CPU_BSEL1
CPU_BSEL2
C305
C305 10U/6.3V_8
10U/6.3V_8
C269
C269 10U/6.3V_8
10U/6.3V_8
2
R233
R233 100K_4
100K_4
SRC
100 100 100 100 100 100 100
R79 33/F_4R79 33/F_4 R80 2.2K/F_4R80 2.2K/F_4 R232 1K/F_4R232 1K/F_4
R95 33/F_4R95 33/F_4 R94 10K/F_4R94 10K/F_4
+3.3V
add at 7/20 a-shian for Intel
+3.3V
R259
R259 *10K_4
*10K_4
R260
R260 *10K_4
*10K_4
PM_STPCPU# PM_STPPCI#
+3.3V
4 4
del R101 R196 by a-shian 9/18
VCCP
3 3
CLKUSB_48_R
C102 10P/50V_4C102 10P/50V_4
14M_ICH_R
C125 *10P/50V_4C125 *10P/50V_4
FSC
0 0 0 0 1 1 1 1
VR_PWRGD_CK410#(27)
FSB FSA
0 0 1 1 0 0 1 1
2 2
1 1
116mA
USB
48
B
U2
U2
3
X1
2
X2
44
CPU_STOP#
45
PCI_STOP#
7
SMBCLK
6
SMBDAT
63
CK_PWRGD/PD#
17
USB_48MHz/FSLA
64
FSLB/TEST_MODE
5
REF0/FSLC/TEST_SEL
4
VDDREF
9
VDDPCI
16
VDD48
23
VDD
46
VDDSRC
62
VDDCPU
19
VDD96_IO
27
VDDPLL3_IO
33
VDDSRC_IO
43
VDDSRC_IO
52
VDDSRC_IO
56
VDDCPU_IO
1
GNDREF
15
GNDPCI
18
GND48
22
GND
26
GND
30
GNDSRC
36
GNDSRC
49
GNDSRC
59
GNDCPU
SLG8SP513VTR/ICS9LPRS365
SLG8SP513VTR/ICS9LPRS365
CLKEN (11)
Spread
DOT
%
0.5 Down
96
0.5 Down
964814.31833.33
0.5 Down
964814.318
0.5 Down
9648
0.5 Down
964814.31833.33
0.5 Down
964814.31833.33
0.5 Down
964814.318
CPUC0 CPUT0
CPUC1_F CPUT1_F
CPUC2_ITP/SRCC8
CPUT2_ITP/SRCT8
27MHz_NonSS/SRCT1/SE1
27MHz_SS/SRCC1/SE2
DOTT_96/SRCT0
DOTC_96/SRCC0
SRCT3/CR#_C SRCC3/CR#_D
SRCT4 SRCC4
SRCC6 SRCT6
SRCC7/CR#_E
SRCT7/CR#_F
SRCT9 SRCC9
SRCT10 SRCC10
SRCC11/CR#_G
SRCT11/CR#_H
SRCT2/SATAT
SRCC2/SATAC
PCI0/CR#_A PCI1/CR#_B
PCI2/TME
PCI3
PCI4/27_Select
PCI_F5/ITP_EN
Thermal PAD
CPU_BSEL0 CPU_BSEL1 CPU_BSEL2
C
60 61
57 58
53 54
24 25
20 21
31 32
34 35
47 48
50 51
37 38
41 42
39 40
28 29
8 10 11 12 13 14
65
55
NC
R78
R78 *0_4
*0_4
HCLK_CPUN (4) HCLK_CPUP (4)
HCLK_MCHN (4) HCLK_MCHP (4)
CLK_PCIE_DMIN (4) CLK_PCIE_DMIP (4)
DREFSSCLKP (4) DREFSSCLKN (4)
DREFCLKP (4) DREFCLKN (4)
PCIE_REQ_HD#_R PCIE_REQ_CARD#_R
CLK_PCIE_ICHN (8) CLK_PCIE_ICHP (8)
CLK_PCIE_HDN CLK_PCIE_HDP
CLK_PCIE_MINIP (18) CLK_PCIE_MININ (18)
CLK_PCIE_LANP (21) CLK_PCIE_LANN (21)
PCIE_REQ_MINI#_R PCIE_REQ_LAN#_R
CLK_PCIE_SATAP (9) CLK_PCIE_SATAN (9)
PCLK_EC_R TME 27_SEL
PCLK_ICH_MP_R
T12T12 T13T13
T11T11
R76 475/F_4R76 475/F_4
CLK_PCIE_CRDP (24) CLK_PCIE_CRDN (24)
R210 475/F_4R210 475/F_4 R207 475/F_4R207 475/F_4
R91 22_4R91 22_4 R92 22_4R92 22_4
R89 10K_4R89 10K_4 R82 33/F_4R82 33/F_4
SY3 --> Reserve for HD
1C: change Debug clk to same with EC(for layout)
1B: add R22 for request pin
PCIE_REQ_HD#_R PCIE_REQ_MINI#_R PCIE_REQ_LAN#_R TME
PCIE_REQ_CARD#_R
PCLK_ICH_MP_R
Need to confirm with Tony that it is else pull high or down - ALF
R93
R93
R231
R231
0_4
0_4
*0_4
*0_4
R77 *10K_4R77 *10K_4 R209 10K_4R209 10K_4 R206 10K_4R206 10K_4 R208 10K_4R208 10K_4 R75 10K_4R75 10K_4
R88 10K_4R88 10K_4
CPU_BSEL0 (4) CPU_BSEL1 (4) CPU_BSEL2 (4)
Swap pin define at 7/20 a-shian
PCIE_REQ_MINI# (18) PCIE_REQ_LAN# (21)
PCLK_EC (22) PCLK_MP (18)
PCLK_ICH (10)
D
PCIE_REQ_CARD# (24)
+3.3V
27 Select
PIN13
0
*
1
0
*
1
CLK REQ Mapping
CR#_C
REQ Mapping
SRC_0 or SRC_2 CR#_D LCCLK or SRC_4 CR#_E SRC_6 CR#_F SRC_8 CR#_G SRC_9 CR#_H SRC_10
PIN 20/21
DOT_96 / DOT_96#
LCDCLK / LCDCLK#
SRC_0 / SRC_0#
PIN53/54ITP_EN(PIN14)
SRC8#/SRC8
ITP/ITP#
E
03
PIN 24/25
27M / 27M_SS
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
A
B
C
D
Thursday, November 05, 2009
PROJECT :
Clock Gen SLG8SP513VTR
Clock Gen SLG8SP513VTR
Clock Gen SLG8SP513VTR
FL2
FL2
FL2
363
363
E
363
5
?
?
PINEVIEW_M
U16C
U16C
D12
XDP_RSVD_00
A7
XDP_RSVD_01
D6
XDP_RSVD_02
C5
XDP_RSVD_03
C7
XDP_RSVD_04
T19T19
C6
PDC 4/24
D D
C C
B B
R162 1K/F_4R162 1K/F_4
DMI_TXP0(8) DMI_TXN0(8) DMI_TXP1(8) DMI_TXN1(8)
CLK_PCIE_DMIN(3) CLK_PCIE_DMIP(3)
H_THERMTRIP#
Tiger Point chipset follows this flow for THRMTRIP#. At boot (PLTRST# low), THRMTRIP# ignored.
D8
B7
A9 D9 C8
T21T21
B8
C10 D10 B11 B10 B12
T20T20
C11
L11
AA7 AA6
R5 R6
AA21
W21
T21 V21
F3
F2 H4 G3
N7 N6
R10
R9
N10
N9
K2
J1 M4
L3
R62 330_4R62 330_4
PLT_RST#(11,18,21,24)
XDP_RSVD_05 XDP_RSVD_06 XDP_RSVD_07 XDP_RSVD_08 XDP_RSVD_09 XDP_RSVD_10 XDP_RSVD_11 XDP_RSVD_12 XDP_RSVD_13 XDP_RSVD_14 XDP_RSVD_15 XDP_RSVD_16 XDP_RSVD_17
RSVD
RSVD_TP RSVD_TP RSVD_TP RSVD_TP
RSVD_TP RSVD_TP RSVD_TP RSVD_TP
Pineview
Pineview
U16A
U16A
DMI_RXP_0 DMI_RXN_0 DMI_RXP_1 DMI_RXN_1
EXP_CLKINN EXP_CLKINP
RSVD RSVD RSVD RSVD
RSVD_K2 RSVD_J1 RSVD_M4 RSVD_L3
Pineview
Pineview
Thermal Sensor
A A
SYS_SHDN#(26)
5
PINEVIEW_M
REV = 1.1
REV = 1.1
VGA
VGA
MISC
MISC
3 OF 6
3 OF 6
PINEVIEW_M
PINEVIEW_M
?
? REV = 1.1
REV = 1.1
DMI
DMI
1 OF 6
1 OF 6
+3.3V
2
Q10
Q10
MMBT3904
MMBT3904
C51 0.1U/10V_4C51 0.1U/10V_4
SYS_SHDN#
CRT_HSYNC CRT_VSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN
CRT_DDC_DATA
CRT_DDC_CLK
DAC_IREF
DPL_REFCLKINP
DPL_REFCLKINN DPL_REFSSCLKINP DPL_REFSSCLKINN
PM_EXTTS#_1/DPRSLPVR
PM_EXTTS#_0
PWROK
RSTINB
HPL_CLKINN HPL_CLKINP
DMI_TXP_0 DMI_TXN_0 DMI_TXP_1 DMI_TXN_1
EXP_RCOMPO
EXP_ICOMPI
EXP_RBIAS
RSVD_TP RSVD_TP
RSVD_K3
RSVD_L2 RSVD_M2 RSVD_N2
+3.3V
R63
R63
8.2K_4
8.2K_4
2
U13
TC7SH08FU
TC7SH08FU
1
3 5
1 3
+3.3V +3.3V
R55
R55
R180
R180
200K/F_4
200K/F_4
15K_4
15K_4
6
215
4 3
?
?
Q7 2N7002DWQ72N7002DW
4
VGA_HSYNC_R
M30
VGA_VSYNC_R
M29
N31 P30 P29 N30
L31 L30
VGA_IREF
P28 Y30
Y29 AA30 AA31
R188 0_4R188 0_4
K29
R45 10K/F_4R45 10K/F_4
J30 L5 AA3
W8 W9
R183 10/F_4R183 10/F_4 R182 10/F_4R182 10/F_4
VGA_RED VGA_GRE VGA_BLU
VGA_DDC_DAT (15) VGA_DDC_CLK (15)
R65 665/F_4R65 665/F_4
DREFCLKN (3) DREFSSCLKP (3) DREFSSCLKN (3)
HCLK_MCHN (3) HCLK_MCHP (3)
VGA_RED VGA_GRE VGA_BLU
R185 150/F_4R185 150/F_4 R190 150/F_4R190 150/F_4 R187 150/F_4R187 150/F_4
PM_DPRSLPVR (11,27)
+3.3V
IMVP_PWRGD (11,16,27) PLT_RST# (11,18,21,24)
VGA_HSYNC (15) VGA_VSYNC (15)
VGA_RED (15) VGA_GRE (15) VGA_BLU (15)
3
L_BKLT_EN(16)DREFCLKP (3) L_BKLTCTL(16)
LVDS_CLK(16)
LVDS_DATA(16)
L_VDD_EN(16)
LCTLA_CLK LCTLB_DATA LVDS_CLK LVDS_DATA
XDP PU
XDP_TMS
SYS_SHDN#
SMBCLK SMDATA
D+
D-
XDP_TDI H_PREQ# XDP_TCK XDP_TRST#
8 7 2 3
G2 G1 H3 J2
L10 L9 L8
N11 P11
K3 L2 M2 N2
?
?
R56 200K/F_4R56 200K/F_4U13
4
DMI_RXP0 (8) DMI_RXN0 (8) DMI_RXP1 (8) DMI_RXN1 (8)
R52 49.9/F_4R52 49.9/F_4
EXP_COMP EXP_RBIAS
R57 750/F_4R57 750/F_4
C52
C52
0.1U/10V_4
0.1U/10V_4
C242 0.1U/10V_4C242 0.1U/10V_4
THRM#(11)
H_THERMTRIP#_Delay
+3.3V
U12
U12
1
VCC
6
ALERT
4
T_CRIT_A
5
GND
EMC1412-1-ACZL-TR
EMC1412-1-ACZL-TR
Original LM95245CIMM 2009/06/04 charge to BMC1412-1-ACZL-TR
4
R25 51_4R25 51_4 R27 51_4R27 51_4 R38 51_4R38 51_4 R157 51_4R157 51_4 R26 51_4R26 51_4
XDP_BPM#5 : Length<200mil
6
215
4 3
THERMDA
C243
C243 220P/50V_4
220P/50V_4
THERMDC
Q18
Q18 2N7002DW
2N7002DW
MBCLK_THRM (22) MBDATA_THRM (22)
3
INT_TXLCLKN(16) INT_TXLCLKP(16) INT_TXLOUTN0(16) INT_TXLOUTP0(16) INT_TXLOUTN1(16) INT_TXLOUTP1(16) INT_TXLOUTN2(16) INT_TXLOUTP2(16)
R66 2.37K/F_4R66 2.37K/F_4
R54 *2.2K/F_4R54 *2.2K/F_4 R53 *2.2K/F_4R53 *2.2K/F_4 R160 2.2K/F_4R160 2.2K/F_4 R161 2.2K/F_4R161 2.2K/F_4
VCCP
H_PROCHOT_1#
EC_PROCHOT (22)
Themal I2C
LCTLA_CLK LCTLB_DATA LVDS_CLK LVDS_DATA
+3.3V
XDP_TDI XDP_TCK
XDP_TMS XDP_TRST#
THERMDA THERMDC
U16D
U16D
U25
LVD_A_CLKM
U26
LVD_A_CLKP
R23
LVD_A_DATAM_0
R24
LVD_A_DATAP_0
N26
LVD_A_DATAM_1
N27
LVD_A_DATAP_1
R26
LVD_A_DATAM_2
R27
LVD_A_DATAP_2
LIBG
R22
LVD_IBG
J28
LVD_VBG
N22
LVD_VREFH
N23
LVD_VREFL
L27
LBKLT_EN
L26
LBKLT_CTL
L23
LCTLA_CLK
K25
LCTLB_CLK
K23
LDDC_CLK
K24
LDDC_DATA
H26
LVDD_EN
G11
BPM_1B_0
E15
BPM_1B_1
G13
BPM_1B_2
F13
BPM_1B_3
B18
BPM_2_0#/RSVD
B20
BPM_2_1#/RSVD
C20
BPM_2_2#/RSVD
B21
BPM_2_3#/RSVD
G5
RSVD
D14
TDI
D13
TDO
B14
TCK
C14
TMS
C16
TRST_B
D30
THRMDA_1
E30
THRMDC_1
C30
RSVD_C30
D31
RSVD_D31
Pineview
Pineview
VCCP +3.3V
+3.3V
R192
R192
R164
R164
15K_4
15K_4
68/F_4
68/F_4
6
215
4 3
R194
R194 15K_4
15K_4
Q19
Q19 2N7002DW
2N7002DW
2
?
?
PINEVIEW_M
PINEVIEW_M
REV = 1.1
REV = 1.1
ICH
ICH
LVDS
LVDS
CPU
CPU
4 OF 6
4 OF 6
A20M_B FERR_B
IGNNE_B
STPCLK_B
DPRSTP_B
DPSLP_B
PRDY_B PREQ_B
THERMTRIP_B
PROCHOT_B
CPUPWRGOOD
GTLREF
RSVD_TP RSVD_TP
EXTBGREF
chang to short pad a-shian 9/18
R189 *0_4SR189 *0_4S
R40
R40 976/F_4
976/F_4
R44
R44
3.32K/F_4
3.32K/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
E7
SMI_B
H7 H6 F10
LINT00
F11
LINT10
E5 F8
G6 G10 G8
INIT_B
E11 F15
E13
C18 W1
A13 H27
VSS
L6
RSVD
E17
RSVD
H10
BCLKN
J10
BCLKP
K5
BSEL_0
H5
BSEL_1
K6
BSEL_2
H30
VID_0
H29
VID_1
H28
VID_2
G30
VID_3
G29
VID_4
F29
VID_5
E29
VID_6
L7
RSVD
D20
RSVD
H13
RSVD
D18
RSVD
K9 D19 K7
?
?
H_PROCHOT# (27)
C39
C39
1U/6.3V_4
1U/6.3V_4
Thursday, November 05, 2009
Thursday, November 05, 2009
Thursday, November 05, 2009
1
H_SMI# (9) H_A20M# (9) H_FERR# (9) H_INTR (9) H_NMI (9) H_IGNNE# (9) H_STPCLK# (9)
ICH_DPRSTP# (11,27) H_DPSLP# (11)
CPU_VID0 (27) CPU_VID1 (27) CPU_VID2 (27) CPU_VID3 (27) CPU_VID4 (27) CPU_VID5 (27) CPU_VID6 (27)
R163
R163 1K/F_4
1K/F_4
R156
R156 2K/F_4
2K/F_4
H_INIT# (9)
H_THERMTRIP# (9)
H_PWRGD (11)
HCLK_CPUN (3) HCLK_CPUP (3)
CPU_BSEL0 (3) CPU_BSEL1 (3) CPU_BSEL2 (3)
R51 470_4R51 470_4 R39 470_4R39 470_4 R49 470_4R49 470_4
H_GTLREFH_EXBGREF
C235
C235 1U/6.3V_4
1U/6.3V_4
H_PREQ#
H_PROCHOT_1# H_PWRGD
H_GTLREF
CPU_BSEL0 CPU_BSEL1 CPU_BSEL2
H_EXBGREF
CPU_BSEL0 CPU_BSEL1 CPU_BSEL2
VCCPVCCP
1D: add C19 220p(CRB)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Pineview DMI/Display
Pineview DMI/Display
Pineview DMI/Display
1
C236
C236 220P/50V_4
220P/50V_4
FL2
FL2
FL2
04
VCCP
364
364
364
1A
1A
1A
5
hexainf@hotmail.com
U16B
U16B
M_A_A[14..0](14)
D D
M_A_WE#(14) M_A_CAS#(14) M_A_RAS#(14)
M_A_BS0(14) M_A_BS1(14) M_A_BS2(14)
M_CS#0(14) M_CS#1(14)
M_CKE0(14) M_CKE1(14)
C C
M_ODT0(14) M_ODT1(14)
M_CLK0(14) M_CLK#0(14) M_CLK1(14) M_CLK#1(14)
1C: reserve for ES1(WW10 MOW)
B B
change valume 0.01 to 0.1 at 7/20 a-shian
R230 80.6/F_4R230 80.6/F_4 R226 80.6/F_4R226 80.6/F_4
1.8VSUS
A A
SMVREF_GMCH(14,28)
1.8VSUS
R228 *0_4R228 *0_4
R86 10K/F_4R86 10K/F_4 R81 *10K/F_4R81 *10K/F_4
C297 0.1U/10V_4C297 0.1U/10V_4
C296 0.01U/25V_4C296 0.01U/25V_4
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8
M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14
M_A_WE# M_A_CAS# M_A_RAS#
M_A_BS0 M_A_BS1 M_A_BS2
M_CS#0 M_CS#1
M_CKE0 M_CKE1
M_ODT0 M_ODT1
M_CLK0 M_CLK#0 M_CLK1 M_CLK#1
DDR_VREF_P
SM_RCOMP SM_RCOMP#
1.8VSUS
R227
R227
1K/F_4
1K/F_4
DDR_VREF_P
R229
R229
1K/F_4
1K/F_4
AH19
AJ18 AK18 AK16
AJ14 AH14 AK14
AJ12 AH13 AK12 AK20 AH12
AJ11
AJ24
AJ10
AK22
AJ22 AK21
AJ20 AH20 AK11
AH22 AK25
AJ21
AJ25 AH10
AH9
AK10
AK24 AH26 AH24 AK27
AG15
AF15 AD13 AC13
AC15 AD15
AF13 AG13
AD17 AC17 AB15 AB17
AB4 AK8
AB11 AB13
AL28 AK28
AJ26 AK29
AJ8
DDR_A_MA_0 DDR_A_MA_1 DDR_A_MA_2 DDR_A_MA_3 DDR_A_MA_4 DDR_A_MA_5 DDR_A_MA_6 DDR_A_MA_7 DDR_A_MA_8 DDR_A_MA_9 DDR_A_MA_10 DDR_A_MA_11 DDR_A_MA_12 DDR_A_MA_13 DDR_A_MA_14
DDR_A_WEB DDR_A_CASB DDR_A_RASB
DDR_A_BS_0 DDR_A_BS_1 DDR_A_BS_2
DDR_A_CSB_0 DDR_A_CSB_1 DDR_A_CSB_2 DDR_A_CSB_3
DDR_A_CKE_0 DDR_A_CKE_1 DDR_A_CKE_2 DDR_A_CKE_3
DDR_A_ODT_0 DDR_A_ODT_1 DDR_A_ODT_2 DDR_A_ODT_3
DDR_A_CK_0 DDR_A_CKB_0 DDR_A_CK_1 DDR_A_CKB_1
DDR_A_CK_3 DDR_A_CKB_3 DDR_A_CK_4 DDR_A_CKB_4
RSVD_AD17 RSVD_AC17 RSVD_AB15 RSVD_AB17
VSS RSVD
RSVD_TP RSVD_TP
DDR_VREF DDR_RPD DDR_RPU
RSVD
DDR_A
DDR_A
1D: add optional power for DDR_VREF(CRB)
Pineview
Pineview
5
PINEVIEW_M
PINEVIEW_M
4
?
?
REV = 1.1
REV = 1.1
2 OF 6
2 OF 6
4
DDR_A_DQS_0
DDR_A_DQSB_0
DDR_A_DM_0 DDR_A_DQ_0
DDR_A_DQ_1 DDR_A_DQ_2 DDR_A_DQ_3 DDR_A_DQ_4 DDR_A_DQ_5 DDR_A_DQ_6 DDR_A_DQ_7
DDR_A_DQS_1
DDR_A_DQSB_1
DDR_A_DM_1 DDR_A_DQ_8
DDR_A_DQ_9 DDR_A_DQ_10 DDR_A_DQ_11 DDR_A_DQ_12 DDR_A_DQ_13 DDR_A_DQ_14 DDR_A_DQ_15
DDR_A_DQS_2
DDR_A_DQSB_2
DDR_A_DM_2 DDR_A_DQ_16
DDR_A_DQ_17 DDR_A_DQ_18 DDR_A_DQ_19 DDR_A_DQ_20 DDR_A_DQ_21 DDR_A_DQ_22 DDR_A_DQ_23
DDR_A_DQS_3
DDR_A_DQSB_3
DDR_A_DM_3 DDR_A_DQ_24
DDR_A_DQ_25 DDR_A_DQ_26 DDR_A_DQ_27 DDR_A_DQ_28 DDR_A_DQ_29 DDR_A_DQ_30 DDR_A_DQ_31
DDR_A_DQS_4
DDR_A_DQSB_4
DDR_A_DM_4 DDR_A_DQ_32
DDR_A_DQ_33 DDR_A_DQ_34 DDR_A_DQ_35 DDR_A_DQ_36 DDR_A_DQ_37 DDR_A_DQ_38 DDR_A_DQ_39
DDR_A_DQS_5
DDR_A_DQSB_5
DDR_A_DM_5 DDR_A_DQ_40
DDR_A_DQ_41 DDR_A_DQ_42 DDR_A_DQ_43 DDR_A_DQ_44 DDR_A_DQ_45 DDR_A_DQ_46 DDR_A_DQ_47
DDR_A_DQS_6
DDR_A_DQSB_6
DDR_A_DM_6 DDR_A_DQ_48
DDR_A_DQ_49 DDR_A_DQ_50 DDR_A_DQ_51 DDR_A_DQ_52 DDR_A_DQ_53 DDR_A_DQ_54 DDR_A_DQ_55
DDR_A_DQS_7
DDR_A_DQSB_7
DDR_A_DM_7 DDR_A_DQ_56
DDR_A_DQ_57 DDR_A_DQ_58 DDR_A_DQ_59 DDR_A_DQ_60 DDR_A_DQ_61 DDR_A_DQ_62 DDR_A_DQ_63
3
M_A_DQ[63..0] (14)
M_A_DQS0
AD3
M_A_DQS#0
AD2
M_A_DM0
AD4
M_A_DQ0
AC4
M_A_DQ1
AC1
M_A_DQ2
AF4
M_A_DQ3
AG2
M_A_DQ4
AB2
M_A_DQ5
AB3
M_A_DQ6
AE2
M_A_DQ7
AE3
M_A_DQS1
AB8
M_A_DQS#1
AD7
M_A_DM1
AA9
M_A_DQ8
AB6
M_A_DQ9
AB7
M_A_DQ10
AE5
M_A_DQ11
AG5
M_A_DQ12
AA5
M_A_DQ13
AB5
M_A_DQ14
AB9
M_A_DQ15
AD6
M_A_DQS2
AD8
M_A_DQS#2
AD10
M_A_DM2
AE8
M_A_DQ16
AG8
M_A_DQ17
AG7
M_A_DQ18
AF10
M_A_DQ19
AG11
M_A_DQ20
AF7
M_A_DQ21
AF8
M_A_DQ22
AD11
M_A_DQ23
AE10
M_A_DQS3
AK5
M_A_DQS#3
AK3
M_A_DM3
AJ3
M_A_DQ24
AH1
M_A_DQ25
AJ2
M_A_DQ26
AK6
M_A_DQ27
AJ7
M_A_DQ28
AF3
M_A_DQ29
AH2
M_A_DQ30
AL5
M_A_DQ31
AJ6
M_A_DQS4
AG22
M_A_DQS#4
AG21
M_A_DM4
AD19
M_A_DQ32
AE19
M_A_DQ33
AG19
M_A_DQ34
AF22
M_A_DQ35
AD22
M_A_DQ36
AG17
M_A_DQ37
AF19
M_A_DQ38
AE21
M_A_DQ39
AD21
M_A_DQS5
AE26
M_A_DQS#5
AG27
M_A_DM5
AJ27
M_A_DQ40
AE24
M_A_DQ41
AG25
M_A_DQ42
AD25
M_A_DQ43
AD24
M_A_DQ44
AC22
M_A_DQ45
AG24
M_A_DQ46
AD27
M_A_DQ47
AE27
M_A_DQS6
AE30
M_A_DQS#6
AF29
M_A_DM6
AF30
M_A_DQ48
AG31
M_A_DQ49
AG30
M_A_DQ50
AD30
M_A_DQ51
AD29
M_A_DQ52
AJ30
M_A_DQ53
AJ29
M_A_DQ54
AE29
M_A_DQ55
AD28
M_A_DQS7
AB27
M_A_DQS#7
AA27
M_A_DM7
AB26
M_A_DQ56
AA24
M_A_DQ57
AB25
M_A_DQ58
W24
M_A_DQ59
W22
M_A_DQ60
AB24
M_A_DQ61
AB23
M_A_DQ62
AA23
M_A_DQ63
W27
?
?
3
M_A_DM[7..0] (14)
M_A_DQS[7..0] (14) M_A_DQS#[7..0] (14)
2
1
05
VTT_MEM
M_A_A10
RN4 47X4_4RN4 47X4_4
1
M_A_A2 M_A_A0 M_A_A5
M_A_A8
RN6 47X4_4RN6 47X4_4
M_A_A14 M_A_A11 M_A_A9
M_A_A6
RN5 47X4_4RN5 47X4_4
M_A_A4 M_A_A3 M_A_A7
M_CS#0
RN2 47X4_4RN2 47X4_4
M_ODT0 M_A_A13 M_A_WE#
M_A_RAS#
RN3 47X4_4RN3 47X4_4
M_A_BS0 M_A_BS1 M_A_A1
M_A_A12
RN7 47X4_4RN7 47X4_4
M_CKE1 M_A_BS2 M_CKE0
M_ODT1
RN1 47X4_4RN1 47X4_4
M_A_CAS# M_CS#1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
2
Thursday, November 05, 2009
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Pineview DDR
Pineview DDR
Pineview DDR
FL2
FL2
FL2
1
365
365
365
1
A A
B B
chang to short pad a-shian 9/18
C C
+1.8V
change bead at 7/20 a-shian
D D
2
1.8VSUS
Layout Notes: Close PIN AA19
add at 7/20 a-shian
L24
L24
1 2
20CB160808-601U-600
20CB160808-601U-600
R90 *0_6SR90 *0_6S
+1.8V
0.33A
C84 2.2U/6.3V_6C84 2.2U/6.3V_6 C91 1U/6.3V_4C91 1U/6.3V_4 C69 1U/6.3V_4C69 1U/6.3V_4 C64 1U/6.3V_4C64 1U/6.3V_4 C93 1U/6.3V_4C93 1U/6.3V_4 C88 1U/6.3V_4C88 1U/6.3V_4 C77 1U/6.3V_4C77 1U/6.3V_4
C90 1U/6.3V_4C90 1U/6.3V_4 C357 22U/6.3V_8C357 22U/6.3V_8 C358 0.1U/10V_4C358 0.1U/10V_4
add at 7/20 a-shian
C119 2.2U/6.3V_6C119 2.2U/6.3V_6
C115 2.2U/6.3V_6C115 2.2U/6.3V_6
C118 2.2U/6.3V_6C118 2.2U/6.3V_6
C116 2.2U/6.3V_6C116 2.2U/6.3V_6 C361 0.01U/25V_4C361 0.01U/25V_4
add at 7/20 a-shian
VCC1.8_VCCCK_DDR
C120
C120 22U/6.3V_8
22U/6.3V_8
C70 22U/6.3V_8C70 22U/6.3V_8
C72 4.7U/6.3V_6C72 4.7U/6.3V_6
C74 1U/6.3V_4C74 1U/6.3V_4 C362 0.01U/25V_4C362 0.01U/25V_4
add at 7/20 a-shian
ADD at 8/4 ALF
C365 0.1U/10V_4C365 0.1U/10V_4 C366 0.1U/10V_4C366 0.1U/10V_4
C363 0.01U/25V_4C363 0.01U/25V_4 C97 1U/6.3V_4C97 1U/6.3V_4
C94 1U/6.3V_4C94 1U/6.3V_4
VCC1.8_VCCACRTDAC
C257
C257 1U/6.3V_4
1U/6.3V_4
VCCP VCCP
3
VCC_GFX_CORE
1.8VSUS
VCCP
0.006A
C73 1U/6.3V_4C73 1U/6.3V_4
C31 1U/6.3V_4C31 1U/6.3V_4 C32 1U/6.3V_4C32 1U/6.3V_4
VCCP
1U/6.3V_4
1U/6.3V_4
ADD at 8/4 ALF
1.38A
T13 T14 T16 T18
T19 V13 V19
W14 W16 W18 W19
2.27A
AK13 AK19
AK9
AL11 AL16 AL21 AL25
AK7 AL7
1.32A
U10
W10 W11
AA10 AA11
AA19
V11
AC31
0.154A
T30
+3.3V
T31
J31
A21
C364
C364
U16E
U16E
VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
VCCCK_DDR VCCCK_DDR
VCCA_DDR
U5
VCCA_DDR
U6
VCCA_DDR
U7
VCCA_DDR
U8
VCCA_DDR
U9
VCCA_DDR
V2
VCCA_DDR
V3
VCCA_DDR
V4
VCCA_DDR VCCA_DDR VCCA_DDR
VCCACK_DDR VCCACK_DDR
VCCD_AB_DPL
VCCD_HMPLL
VCCSFR_AB_DPL
VCCACRTDAC
VCC_GIO VCCRING_EAST
C3
VCCRING_WEST
B2
VCCRING_WEST
C2
VCCRING_WEST VCC_LGI_VID
Pineview
Pineview
4
PINEVIEW_M
PINEVIEW_M
GFX/MCH
GFX/MCH
DDR
DDR
EXP\CRT\PLL
EXP\CRT\PLL
5 OF 6
5 OF 6
?
?
REV = 1.1
REV = 1.1
POWER
POWER
DMI
DMI
3.5A
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
CPU
CPU
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCCSENSE VSSSENSE
VCCA
VCC
VCCP VCCP
VCCALVD VCCDLVD
LVDS
LVDS
VCCA_DMI VCCA_DMI VCCA_DMI
VCCSFR_DMIHMPLL
RSVD
VCCP
A23 A25 A27 B23 B24 B25 B26 B27 C24 C26 D23 D24 D26 D28 E22 E24 E27 F21 F22 F25 G19 G21 G24 H17 H19 H22 H24 J17 J19 J21 J22 K15 K17 K21 L14 L16 L19 L21 N14 N16 N19 N21
C29 B29 Y2
0.08A
D4 B4
B3
0.06A
V30 W31
0.48A
T1 T2 T3
P2 AA1
0.104A
E2
?
?
VCC_CORE
5
C56 1U/6.3V_4C56 1U/6.3V_4 C54 1U/6.3V_4C54 1U/6.3V_4 C33 1U/6.3V_4C33 1U/6.3V_4 C36 1U/6.3V_4C36 1U/6.3V_4 C37 22U/6.3V_8C37 22U/6.3V_8 C352 22U/6.3V_8C352 22U/6.3V_8 C353 22U/6.3V_8C353 22U/6.3V_8 C360 0.01U/25V_4C360 0.01U/25V_4
add at 7/20 a-shian
VCC1.5_VCCA
C268 0.01U/25V_4C268 0.01U/25V_4
C34 0.1U/10V_4C34 0.1U/10V_4
VCCP_VCCPVCCP_VCCP
VCCP_VCCPVCCP_VCCP
VCC1.8_LCCALVD
C103 1U/6.3V_4C103 1U/6.3V_4
VCCP_DMI
C251 1U/6.3V_4C251 1U/6.3V_4 C63 1U/6.3V_4C63 1U/6.3V_4
VCCP_VCCAPLL_DMI VCC1.8_DMIHMPLL
R159 *0_4SR159 *0_4S
VCCP
6
chang to short pad a-shian 9/18
R201 *0_4SR201 *0_4S
Eric: double check
VCCP
VCCP
Zo=27.4/Space=50mil Zo=27.4/Space=50mil
+1.5V
1B: change to VCC1.5
chang to short pad a-shian 9/18
R74 *0_6SR74 *0_6S
+1.8V
R191 *0_6SR191 *0_6S
R205 *0_4SR205 *0_4S
C276
C276 1U/6.3V_4
1U/6.3V_4
chang to short pad a-shian 9/18
chang to short pad a-shian 9/18
C262
C262 22U/6.3V_8
22U/6.3V_8
chang to short pad a-shian 9/18
VCCP
+1.8V
+1.8V
R181 *0_4R181 *0_4
C248
C248
0.1U/10V_4
0.1U/10V_4
7
VCC_CORE
R165
R165 *100/F_4
*100/F_4
R166
R166 *100/F_4
*100/F_4
1D: change to reversed
VCCP
VCCSENSE (27) VSSSENSE (27)
8
06
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
1
2
3
4
5
6
Thursday, November 05, 2009
7
PROJECT :
Pineview Power
Pineview Power
Pineview Power
FL2
FL2
FL2
1A
1A
1A
366
366
8
366
1
hexainf@hotmail.com
?
?
PINEVIEW_M
PINEVIEW_M
U16F
U16F
REV = 1.1
VSS VSS VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS RSVD_NCTF VSS VSS RSVD_NCTF RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS VSS VSS VSS VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS VSS VSS VSS RSVD_NCTF VSS RSVD_NCTF VSS VSS VSS VSS VSS VSS VSS
Pineview
Pineview
REV = 1.1
6 OF 6
6 OF 6
F24
VSS
F28
VSS
F4
VSS
G15
VSS
G17
VSS
G22
VSS
G27
VSS
G31
VSS
H11
VSS
H15
VSS
H2
VSS
H21
VSS
H25
VSS
H8
VSS
J11
VSS
J13
VSS
J15
VSS
J4
VSS
K11
VSS
K13
VSS
K19
VSS
K26
VSS
K27
VSS
GND
GND
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
K28 K30 K4 K8 L1 L13 L18 L22 L24 L25 L29 M28 M3 N1 N13 N18 N24 N25 N28 N4 N5 N8 P13 P14 P16 P18 P19 P21 P3 P4 R25 R7 R8 T11 U22 U23 U24 U27 V14 V16 V18 V28 V29 W13 W2 W23 W25 W26 W28 W30 W4 W5 W6 W7 Y28 Y3 Y4
T29
?
?
07
A11 A16 A19 A29
A3
A30
A4 AA13 AA14 AA16 AA18
AA2 AA22 AA25 AA26 AA29
AA8 AB19 AB21 AB28 AB29 AB30
AC10 AC11 AC19
AC2 AC21 AC28 AC30 AD26
AD5
AE1 AE11 AE13 AE15 AE17 AE22 AE31 AF11 AF17 AF21 AF24 AF28
AG10
AG3 AH18 AH23 AH28
AH4
A A
AH6
AH8
AJ1 AJ16 AJ31
AK1
AK2 AK23 AK30 AK31 AL13 AL19
AL2 AL23 AL29
AL3 AL30
AL9
B13
B16
B19
B22
B30
B31
C12
C21
C22
C25
C31
D22
E10
E19
E21
E25
F17
F19
B5 B9 C1
E1
E8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
1
Thursday, November 05, 2009
PROJECT :
Pineview GND
Pineview GND
Pineview GND
FL2
FL2
FL2
1A
1A
1A
367
367
367
DMI_RXN0(4) DMI_RXP0(4) DMI_TXN0(4) DMI_TXP0(4) DMI_RXN1(4) DMI_RXP1(4) DMI_TXN1(4) DMI_TXP1(4)
1C: add cap for DMI bus(Intel suggestion)
PCIE_RXN1(21)
Ethernet LAN
WLAN
WWAN
PCIE_RXP1(21) PCIE_TXN1(21) PCIE_TXP1(21) PCIE_RXN2(18) PCIE_RXP2(18) PCIE_TXN2(18) PCIE_TXP2(18) PCIE_RXN3(24) PCIE_RXP3(24) PCIE_TXN3(24) PCIE_TXP3(24)
SY3 --> Reserve for HD decoder
C261 0.1U/10V_4C261 0.1U/10V_4 C263 0.1U/10V_4C263 0.1U/10V_4
C265 0.1U/10V_4C265 0.1U/10V_4 C267 0.1U/10V_4C267 0.1U/10V_4
C245 0.1U/10V_4C245 0.1U/10V_4 C247 0.1U/10V_4C247 0.1U/10V_4
C250 0.1U/10V_4C250 0.1U/10V_4 C255 0.1U/10V_4C255 0.1U/10V_4
C68 0.1U/10V_4C68 0.1U/10V_4 C78 0.1U/10V_4C78 0.1U/10V_4
DMI_TXN0_C DMI_TXP0_C
DMI_TXN1_C DMI_TXP1_C
PCIE_TXN1_C PCIE_TXP1_C
PCIE_TXN2_C PCIE_TXP2_C
PCIE_TXN3_C PCIE_TXP3_C
R23 R24 P21 P20 T21 T20 T24 T25 T19 T18
U23
U24 V21 V20 V24 V23
K21 K22
M18 M19
K24 K25 L23 L24 L22
M21
P17
P18 N25 N24
1
08
U1LB
U1LB
TGP
U15B
U15B
DMI0RXN DMI0RXP DMI0TXN DMI0TXP DMI1RXN DMI1RXP DMI1TXN DMI1TXP DMI2RXN DMI2RXP DMI2TXN DMI2TXP DMI3RXN DMI3RXP DMI3TXN DMI3TXP
PERN1 PERP1
J23
PETN1
J24
PETP1 PERN2 PERP2 PETN2 PETP2 PERN3 PERP3 PETN3 PETP3 PERN4 PERP4 PETN4 PETP4
TGP
H7
USBP0N
H6
USBP0P
H3
USBP1N
H2
USBP1P
J2
USBP2N
J3
DMI
DMI
USB
USB
PCI-E
PCI-E
USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P
OC0# OC1# OC2# OC3#
OC4# OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31
USBRBIAS
USBRBIAS#
CLK48
K6 K5 K1 K2 L2 L3 M6 M5 N1 N2
D4 C5 D3 D2 E5 E6 C2 C3
G2 G3
F4
USBOC0# USBOC1# USBOC2# USBOC3# USBOC4# USBOC5# USBOC6# USBOC7#
USBRBIAS
CLKUSB_48
USBP0- (24) USBP0+ (24) USBP1- (24) USBP1+ (24) USBP2- (24) USBP2+ (24) USBP3- (18) USBP3+ (18) USBP4- (24) USBP4+ (24) USBP5- (18) USBP5+ (18) USBP6- (24) USBP6+ (24) USBP7- (16) USBP7+ (16)
USBOC0# (24) USBOC1# (24)
R184 22.6/F_4R184 22.6/F_4
CLKUSB_48 (3)
USB_PORT #0 USB_PORT #1 Touch Panel BT WWAN WLAN Card Reader Camera
USBOC2# USBOC3# USBOC6# USBOC7#
USBOC5# USBOC4# USBOC1# USBOC0#
RP8 8.2KX4_4RP8 8.2KX4_4
1
2
3
4
5
6
7
RP2 8.2KX4_4RP2 8.2KX4_4
8
1
2
3
4
5
6
7
8
3V_S5
3V_S5
A A
+1.5V
R46 24.9/F_4R46 24.9/F_4
CLK_PCIE_ICHN(3) CLK_PCIE_ICHP(3)
DMI_COMP
H24
W23 W24
J22
DMI_ZCOMP DMI_IRCOMP
DMI_CLKN DMI_CLKP
Tiger Point
Tiger Point
2
2
?
?
EMI
CLKUSB_48
R42
R42 *10/F_4
*10/F_4
C35
C35 *10P/50V_4
*10P/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
1
Thursday, November 05, 2009
PROJECT :
Tiger Point DMI/PCIE/USB
Tiger Point DMI/PCIE/USB
Tiger Point DMI/PCIE/USB
FL2
FL2
FL2
1A
1A
1A
368
368
368
5
hexainf@hotmail.com
4
3
2
1
09
D D
U1LB
U1LB
TGP
U15C
U15C
R12
RSVD03
AE20
RSVD04
AD17
RSVD05
AC15
RSVD06
AD18
RSVD07
Y12
RSVD08
AA10
RSVD09
AA12
RSVD10
Y10
RSVD11
AD15
RSVD12
W10
RSVD13
V12
RSVD14
AE21
RSVD15
AE18
RSVD16
AD19
RSVD17
U12
RSVD18
AC17
RSVD19
AB13
C C
BT_ON(18)
B B
PCH_GPIO36
AC13 AB15
AB16 AE24 AE23
AA14
AD16 AB11 AB10 AD23
Y14
V14
RSVD20 RSVD21 RSVD22 RSVD23
RSVD24 RSVD25 RSVD26
RSVD27 RSVD28
RSVD29 RSVD30 RSVD31 GPIO36
Tiger Point
Tiger Point
TGP
AE6
SATA0RXN
AD6
SATA0RXP
AC7
SATA0TXN
AD7
SATA0TXP
AE8
SATA1RXN
AD8
SATA1RXP
AD9
SATA1TXN
AC9
SATA
SATA
HOST
HOST
SATA1TXP
SATA_CLKN SATA_CLKP
SATARBIAS#
SATARBIAS
SATALED#
A20GATE
A20M#
CPUSLP#
IGNNE#
INIT3_3V#
INIT# INTR
FERR#
RCIN#
SERIRQ
SMI#
STPCLK#
THERMTRIP#
3
3
NMI
AD4 AC4
AD11 AC11 AD25
U16 Y20 Y21 Y18 AD21 AC25 AB24 Y22 T17 AC21 AA16 AA21 V18 AA20
?
?
SATA_RXN0 (19) SATA_RXP0 (19)
SATA_TXN0 (19) SATA_TXP0 (19)
CLK_PCIE_SATAN (3) CLK_PCIE_SATAP (3)
SATARBIAS#
R223 10K/F_4R223 10K/F_4
Need one buffer to driver , don't direct sink low
GATEA20
RCIN# SERIRQ
H_THERMTRIP_R
SATA HDD
R216 24.9/F_4R216 24.9/F_4
+3.3V
GATEA20 (22)
H_A20M# (4) H_IGNNE# (4) H_INIT# (4)
H_INTR (4) H_NMI (4)
RCIN# (22)
SERIRQ (22) H_SMI# (4) H_STPCLK# (4)
R203 *0_4SR203 *0_4S
SATALED# (24)
VCCP
R71
R71 56_4
56_4
chang to short pad a-shian 9/18
R83 0_4R83 0_4
R68
R68 56_4
56_4
swap location at 7/20 a-shian
VCCP
SERIRQ GATEA20 RCIN# PCH_GPIO36
1D: add R139(CRB)
H_FERR# (4)
R211 8.2K_4R211 8.2K_4 R85 8.2K_4R85 8.2K_4 R219 10K/F_4R219 10K/F_4 R220 *10K/F_4R220 *10K/F_4
H_THERMTRIP# (4)
+3.3V
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
5
4
3
2
Thursday, November 05, 2009
PROJECT :
Tiger Point Sata/Host
Tiger Point Sata/Host
Tiger Point Sata/Host
FL2
FL2
FL2
369
369
1
369
5
4
3
2
1
10
TGP
U15A
D D
PCLK_ICH(3)
C C
WWAN_OFF#(24)
+3.3V
PCI_DEVSEL#
T22T22
PCI_IRDY# PCI_SERR#
PCI_STOP# PCI_LOCK# PCI_TRDY# PCI_PERR# PCI_FRAME#
T23T23 T24T24
PCI_REQ1# PCI_REQ2#
PCH_GPIO48
T3T3
PCH_GPIO17
T25T25
WWAN_OFF# PCH_GPIO1
PCI_INTA# PCI_INTB# PCI_INTC# PCI_INTD# PCI_INTE# PCI_INTF# PCI_INTG# PCI_INTH#
PCH_A16WP
T26T26 R59 10K/F_4R59 10K/F_4 R28 8.2K_4R28 8.2K_4
1D: add R138/R128(CRB)
B B
U15A
A5
PAR
B15
DEVSEL#
J12
PCICLK
A23
PCIRST#
B7
IRDY#
C22
PME#
B11
SERR#
F14
STOP#
A8
PLOCK#
A10
TRDY#
D10
PERR#
A16
FRAME#
A18
GNT1#
E16
GNT2#
G16
REQ1#
A20
REQ2#
G14
GPIO48/ STRAP1#
A2
GPIO17/ STRAP2#
C15
GPIO22
C9
GPIO1
B2
PIRQA#
D7
PIRQB#
B3
PIRQC#
H10
PIRQD#
E8
PIRQE#/GPIO2
D6
PIRQF#/GPIO3
H8
PIRQG#/GPIO4
F8
PIRQH#/GPIO5
D11
STRAP0#
K9
RSVD01
M13
RSVD02
Tiger Point
Tiger Point
ICH Boot BIOS select
PCH_GPIO17 (INT PU)
0 1 SPI 1 0 PCI 1 1 LPC
PCH_GPIO48 (INT PU)
Boot BIOS Location
(Default)
A16 SWAP Override strap
PCH_A16WP (INT PU)
Low = A16 swap override enabled High = Default
TGP
U1LB
U1LB
PCI
PCI
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8
AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE0# C/BE1# C/BE2# C/BE3#
1
1
B22 D18 C17 C18 B17 C19 B18 B19 D16 D15 A13 E14 H14 L14 J14 E10 C11 E12 B9 B13 L12 B8 A3 B5 A6 G12 H12 C8 D9 C7 C1 B1
H16 M15 C13 L16
?
?
PCI_INTA# PCI_INTC# PCI_INTF# PCI_INTB#
PCI_IRDY# PCI_LOCK# PCI_PERR# PCI_TRDY#
PCI_DEVSEL# PCI_FRAME# PCI_REQ1# PCI_REQ2#
WWAN_OFF# PCI_STOP# PCI_SERR# PCH_GPIO1
PCI_INTD# PCI_INTH# PCI_INTG# PCI_INTE#
RP4 8.2KX4_4RP4 8.2KX4_4
1
2
3
4
5
6
7
8
RP5 8.2KX4_4RP5 8.2KX4_4
1
2
3
4
5
6
7
8
RP6 8.2KX4_4RP6 8.2KX4_4
1
2
3
4
5
6
7
8
R263 8.2K_4R263 8.2K_4 R171 8.2K_4R171 8.2K_4 R170 8.2K_4R170 8.2K_4 R172 8.2K_4R172 8.2K_4
RP3 8.2KX4_4RP3 8.2KX4_4
1
2
3
4
5
6
7
8
IRQ
PIRQA PIRQB PIRQC PIRQD PIRQE PIRQF PIRQG PIRQH
PCI_GNT#2 Internal PU
+3.3V
+3.3V
+3.3V
add at 7/20 a-shian
+3.3V
+3.3V
Description
USB UHCI Controller #1, #4 AC'97 Codec; option for SMBUS
USB UH Controller #3; SATA/IDE Native Mode USB UHCI Controller #2 Internal LAN; Option for SCI, TCO, HPET#0,1,2 Option for SCI, TCO, HPET#0,1,2 Option for SCI, TCO, HPET#0,1,2 USB EHCI Controller; Option for SCI, TCO, HPET#0,1,2
Should not be PD
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
Thursday, November 05, 2009
Date: Sheet of
5
4
3
2
Thursday, November 05, 2009
PROJECT :
TigerPoint PCI(3/6)
TigerPoint PCI(3/6)
TigerPoint PCI(3/6)
FL2
FL2
FL2
1A
1A
1A
3610
3610
1
3610
5
hexainf@hotmail.com
10K change 2.2k at 7/20 a-shian
Q17
Q17
+3.3V
SMB0_CLK
+3.3V
D D
SMB0_DATA
5
2 6
2N7002DW
2N7002DW
R168 2.2K/F_4R168 2.2K/F_4
43
1
PCLK_SMB_M (3,14,18,24)
R173 2.2K/F_4R173 2.2K/F_4
PDAT_SMB_M (3,14,18,24)
+3.3V
+3.3V
SM_BUS_PCLK_SMB_M for SB
EMI
1. Clock Gen
2. Memory Rom
3. Mini Card
4. New Card
C C
D2 RB501V-40D2 RB501V-40
VCCRTC3
D1 RB501V-40D1 RB501V-40
R99
R99 1K/F_4
1K/F_4
VCCRTC_3
13
2
12
2 1
2 1
BT1
BT1 BT Connector
BT Connector
3VPCU
RTC
5VPCU
R104 4.7K/F_4R104 4.7K/F_4
R103 6.8K/F_4R103 6.8K/F_4
B B
VCCRTC_1
MMBT3904
MMBT3904
VCCRTC_2
Q11
Q11
R102
R102 15K_4
15K_4
ID0ID1ID2ID3
SDV 0 0 0 0
SIV 0 0 0 1
A A
MB_ID0
MB_ID1
MB_ID2
14M_ICH
R212
R212 *33_4
*33_4
C288
C288 *10P/50V_4
*10P/50V_4
VCCRTC
RSMRST# buffer
ICH_RSMRST#_L
+3.3V
R214
R214
R200
R200
*10K/F_4
*10K/F_4
10K/F_4
10K/F_4
MB_ID3
R198
R198
R213
R213
*10K/F_4
*10K/F_4
10K/F_4
10K/F_4
C131 1U/6.3V_4C131 1U/6.3V_4
R97 20K/F_4R97 20K/F_4
R98
R98 1M_4
1M_4
SM_INTRUDER#
M/B ID Select
R222
R222
*10K/F_4
*10K/F_4
R221
R221
10K/F_4
10K/F_4
PVD 0 0 1 1
5
ACZ_BITCLK(20)
ACZ_RST#(20)
ACZ_SDOUT(20) ACZ_SYNC(20)
R87
R87 10K/F_4
10K/F_4
C111
C111
0.1U/10V_4
0.1U/10V_4
R224
R224
*10K/F_4
*10K/F_4
R225
R225
10K/F_4
10K/F_4
4
14M_ICH(3)
4
LPC_AD0(18,22) LPC_AD1(18,22) LPC_AD2(18,22) LPC_AD3(18,22)
LPC_FRAME#(18,22)
R72 33/F_4R72 33/F_4 R193 33/F_4R193 33/F_4
R197 33/F_4R197 33/F_4 R195 33/F_4R195 33/F_4
change Y1000 type samll
C284 10P/50V_4C284 10P/50V_4
Y4
Y4
32.768K/20PPM
32.768K/20PPM
C283 10P/50V_4C283 10P/50V_4
C126
C126 1U/6.3V_4
1U/6.3V_4
*MC74VHC1G08DFT2G
*MC74VHC1G08DFT2G
PLT_RST#_Q
R178
R178
100K/F_4
100K/F_4
12
J1
J1 SHORTPAD
SHORTPAD
ICH_RSMRST# (22)
C234 0.1U/10V_4C234 0.1U/10V_4
U9
U9
2 1
R177 *0_4SR177 *0_4S
chang to short pad a-shian 9/18
21
3V_S5
3 5
ACZ_BITCLK_R ACZ_RST#_R
ACZ_SDOUT_R ACZ_SYNC_R
T10T10
T9T9
14M_ICH
LAN_RST#
R204
R204 10M_4
10M_4
RTC_X1 RTC_X2
RTC_RST# SMBALERT#
SMB0_CLK SMB0_DATA SMB_LINK_ALERT# SMLINK0 SMLINK1
T28T28 T27T27 T8T8 T5T5 T6T6
4
3
U15D
U15D
AA5
LDRQ1#/GPIO23
V6
LAD0/FWH0
AA6
LAD1/FWH1
Y5
LAD2/FWH2
W8
LAD3/FWH3
Y8
LDRQ0#
Y4
LFRAME#
P6
HDA_BIT_CLK
U2
HDA_RST#
W2
HDA_SDI0
V2
HDA_SDIN1
P8
HDA_SDIN2
AA1
HDA_SDOUT
Y1
HDA_SYNC
AA3
CLK14
U3
EE_CS
AE2
EE_DIN
T6
EE_DOUT
V3
EE_SHCLK
T4
LAN_CLK
P7
LANR_STSYNC
B23
LAN_RST#
AA2
LAN_RXD0
AD1
LAN_RXD1
AC2
LAN_RXD2
W3
LAN_TXD0
T7
LAN_TXD1
U4
LAN_TXD2
W4
RTCX1
V5
RTCX2
T5
RTCRST#
E20
SMBALERT#/GPIO11
H18
SMBCLK
E23
SMBDATA
H21
SMLALERT#
F25
SMLINK0
F24
SMLINK1
R2
SPI_MISO
T1
SPI_MOSI
M8
SPI_CS#
P9
SPI_CLK
R4
SPI_ARB
R176
R176 *100K/F_4
*100K/F_4
3
Tiger Point
Tiger Point
IMVP_PWRGD(4,16,27)
PLT_RST# (4,18,21,24)
CLKEN(3)
LPC AUDIO LAN
LPC AUDIO LAN
EPROM
EPROM
RTC SMB SPI
RTC SMB SPI
ECPWROK(22)
U1LB
U1LB
TGP
TGP
CPUPWRGD/GPIO49
MISC
MISC
SUS_STAT#/LPCPD#
C351 0.1U/10V_4C351 0.1U/10V_4
MC74VHC1G08DFT2G
MC74VHC1G08DFT2G
chang to short pad a-shian 9/18
2
GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO12 GPIO13 GPIO14 GPIO15
STP_PCI#
GPIO24 GPIO25 GPIO26 GPIO27 GPIO28
CLKRUN#
GPIO33 GPIO34 GPIO38 GPIO39
THRM#
SUSCLK
PLTRSTB
WAKE#
PWROK
RSMRST#
SPKR
SLP_S3# SLP_S4# SLP_S5#
DPRSTP#
DPSLP# RSVD31
3V_S5
3 5
T15 W16 W14 K18 H19 M17 A24 C23 P5 E24 AB20 Y16 AB19 R3 C24 D19 D20 F22 AC19 U14 AC1 AC23 AC24
AB22 AB17
V16 AC18 E21 H23
RI#
G22 D22 G18 G23 C25 T8 U10 AC3 AD3 J16
H20 E25 F21
B25 AB23 AA18 F20
BM_BUSY#/GPIO0
DPRSLPVR
STP_CPU#
VRMPWRGD MCH_SYNC#
PWRBTN#
SYS_RESET#
INTRUDER#
INTVRMEN
BATLOW#
U21
U21
2 1
R262 *0_4R262 *0_4
R265 *0_4SR265 *0_4S
add at 7/20 a-shian
2
R202 10K/F_4R202 10K/F_4
KBSMI# SCI# PCH_GPIO10 PCH_GPIO12 PCH_GPIO13 PCH_GPIO14 PCH_GPIO15
DMI_AC_ENABLE
PCI_CLKRUN# MB_ID0 MB_ID1 MB_ID2 MB_ID3
THRM# CK_PWRGD MCH_SYNC# DNBSWON# ICH_RI#
SUSCLK SYS_RST# PLT_RST#_Q WAKE# SM_INTRUDER# SB_PWROK ICH_RSMRST#_L ICH_INTVRMEN
R43 0_4R43 0_4
PM_BATLOW#
4
CK_PWRGD
PM_DPRSLPVR (4,27)ACZ_SDIN0(20) PM_STPPCI# (3) PM_STPCPU# (3) CCD_ON (16)
WLAN_OFF# (18)
T4T4
SB_PWROK
R261
R261 *100K/F_4
*100K/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
New add at 8/5 alf
+3.3V BT_DETECT# (18) SIM_Card_CD (19) KBSMI# (22) SCI# (22)
PCI_CLKRUN# (22)
DNBSWON# PCH_GPIO10 KBSMI# SYS_RST# SMBALERT# SMB_LINK_ALERT# PM_BATLOW# WAKE# SMLINK1 SMLINK0 PCH_GPIO14 SMB0_CLK SMB0_DATA
PCI_CLKRUN# SCI# THRM# MCH_SYNC#
R31 10K_4R31 10K_4 R64 10K/F_4R64 10K/F_4 R58 8.2K_4R58 8.2K_4 R34 10K/F_4R34 10K/F_4 R35 10K/F_4R35 10K/F_4 R33 10K/F_4R33 10K/F_4
RP7
RP7
R67 10K/F_4R67 10K/F_4 R36 2.2K/F_4R36 2.2K/F_4 R30 2.2K/F_4R30 2.2K/F_4
R218 8.2K_4R218 8.2K_4 R158 8.2K_4R158 8.2K_4 R84 10K/F_4R84 10K/F_4 R217 1K/F_4R217 1K/F_4
1C: Intel suggestion enable AC mode
H_PWRGD (4) THRM# (4)
Change at 7/20 a-shian
DNBSWON# (22)
T1T1 T2T2
WAKE# (18,21,24)
Change at 7/20 a-shian
PCSPK (20) PM_SLP_S3# (22)
PM_SLP_S4# (22)
ICH_DPRSTP# (4,27) H_DPSLP# (4)
ACZ_SDOUT (INT PD)
0
0
1
TigerPoint GPIO
TigerPoint GPIO
Thursday, November 05, 2009
Thursday, November 05, 2009
Thursday, November 05, 2009
TigerPoint GPIO
DMI_AC_ENABLE
R32 10K/F_4R32 10K/F_4
R215 332K/F_4R215 332K/F_4
Enable (default)
ACZ_SYNC (INT PD)
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
R29 1K/F_4R29 1K/F_4
PCH_GPIO13 LAN_RST# PCH_GPIO15 PCH_GPIO12
Disable
0
0
1 1 x 4s(1 port/4 lanes)
1
1 3 5 7
INTVRMEN
Description
4 x 1s
*
Reserved1
Reserved
FL2
FL2
FL2
11
3V_S5
2 4 6
8.2KX4_4
8.2KX4_4
8
+3.3V
3V_S5
3V_S5
RP1
RP1
1
2
3
4
5
6
7
8
8.2KX4_4
8.2KX4_4
VCCRTC
1
0
3611
3611
3611
1A
1A
1A
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