Lenovo IBM F41A Schematics

A

1 1

B

C

D

E

2 2

IGT30

Schematics Document

Compal confidential

Mobile Merom uFCPGA with Intel

3 3

Crestline_GM/PM+ICH8-M core logic

Monday, December 25, 2006

REV:0.1

4 4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

IGT30 LA-3571P

E

0.1

of

147

A

Compal confidential

File Name : LA-3451P

ZZZ1

14W_PCB

B

LEFT SWITCH Board

C

D

E

LEDs Board

1 1

LVDS

Mobile Merom

uFCPGA-478 CPU

Connector

Nvidia N8M

H_A#(3..35)
H_D#(0..63)

page4,5,6

FSB

667/800MHz

Clock Gen.
ICS9LPRS355

page15

PCI-E X16

Intel Crestline GMCH

CRT & TV OUT

page17

2 2

LVDS
Connector

page16

LVDS I/F

PCBGA 1299

page7,8,9,10,11,12

DMI

C-Line

DDR2 -667

Dual Channel

DDR2-SO-DIMM X2

BANK 0, 1, 2, 3

page 13,14

MODEM

Ver 1.5

page 28

AMP&Audio Jack

AZALIA

PCI Express
Mini card Slot

page28

BCM5906 BCM5787
10/100/1G LAN

3 3

page27

RJ45 CONN

page27

SUB Board

*RJ45 CONN
*RJ11 CONN
*MIC IN JACK
*HP OUT JACK
*LED

page32,36

PCI-E BUS

3.3V / 33 MHz

1394+Card Reader

RICOH R5C832

1394 Conn

page26

*1394 CONN
*DC JACK
*TVOUT CONN
*USB CONN
*SWITCH

Card reader(XD/SD
MMC/MS/MS-Pro
HD SD)

page26

PCI BUS

page26

Intel ICH8-M

mBGA-676

EC

ENE KB925/KB926

Touch Pad

page32

page19,20,21,22

LPC BUS

page33

Int.KBD

BIOS

*SWITCH

page32

page34

USB2.0

SATA
ATA100

Audio Codec
ALC 262H

Finger printer

CMOS Camera

BlueTooth Conn

USB conn X4

USB 3G

SATA HDD
Connector

PATA CDROM
Connector

4 4

page30

page29

page36

page36

page28

page31

page31

USB Board

page23

page23

Security Classification

TP Board

A

B

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

D

Date: Sheet

Compal Electronics, Inc.

Block Diagram

IGT30 LA-3571P

E

0.1

of

247Monday, December 25, 2006

Voltage Rails

power
plane

State

O MEANS ON X MEANS OFF

+B
LDO3
LDO5

+5VALW
+3VALW

+1.8V

+5V

+0.9V

+5VS
+3VS
+2.5VS
+1.8VS
+1.5VS
+1.25VS
+VGA_CORE
+CPU_CORE
+VCCP

CLOCK

A

SKU ID Table

Vcc 3.3V +/- 5%

Board ID

0

*

1
2
3
4
5
6
7 NC

100K +/- 5%Ra

Rb V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

AD_BID

0 V

Vtyp

AD_BID

0 V 0 V

V

AD_BID

max

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2.200 V

3.300 V

2.341 V

3.300 V

S0

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

O MEANS ON

X MEANS OFF

O

O
O
O

X

S3 : STR
S4 : STD

O

O
O

X

O

XX
X

XXX

OO

X

O

O
O

X

X
X

S5 : SOFT OFF

1 1

External PCI Devices

Device IDSEL # REQ # / GN T # Interrupts

1394 PIRQG/H

AD22

EC SM Bus1 address

Device

Smart Battery
EEPROM(24C16/02)

Address

0001 011X b
1010 000X b

0

EC SM Bus2 address

Device

ADM1032

Address

1001 100X b

BOM Structure USB PORT LIST

MARK FUNCTION

GIGA@

Address

100@
UMA@
VGA@

NC FOR ALL@
BCM5787
BCM5906
Internal 965GM
965PM + Ext VGA

PORT DEVICE

0

LEFT SIDE

1

WIRELESS

2

RIGHT SIDE
CMOS

3
4

RIGHT SIDE
NEW CARD

5
6

BT(HDL20)

7
8
93G

ICH8 SM Bus address

Device

Clock Generator
( ICS954226)

DDRII DIMM0
DDRII DIMM1

Address

1101 001Xb
1010 000Xb
1010 010Xb

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Notes List

IGT30 LA-3571P

347Monday, December 25, 2006

of

0.1

5

4

3

2

1

XDP Reserve

D D

H_A#[3..16]7

H_ADSTB#07

H_REQ#07
H_REQ#17
H_REQ#27
H_REQ#37
H_REQ#47

H_A#[17..35]7

C C

H_ADSTB#17

H_A20M#20

H_FERR#20

H_IGNNE#20
H_STPCLK#20

H_INTR20

H_NMI20
H_SMI#20

B B

A A

H_ADSTB#0
H_REQ#0

H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1

H_A20M#
H_FERR#
H_IGNNE#

H_STPCLK#
H_INTR
H_NMI
H_SMI#

JP1A

J4

ADDR GROUP 0 ADDR GROUP 1

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD[01]

N5

RSVD[02]

T2

RSVD[03]

V3

RSVD[04]

B2

RSVD[05]

C3

RSVD[06]

D2

RSVD[07]

D22

RSVD[08]

D3

RSVD[09]

F6

RSVD[10]

Merom Ball-out Rev 1a

H_PROCHOT# OCP#

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA
THERMDC

ICH

THERMTRIP#

H CLK

RESERVED

+VCCP

12

R85

56_0402_5%@

B

2

E

3 1

C

Q4

@

MMBT3904_SOT23

BPRI#

DEFER#

DRDY#

DBSY#

IERR#

LOCK#

CONTROL

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TRST#

BCLK[0]
BCLK[1]

ME@

ADS#
BNR#

BR0#

INIT#

HIT#

TCK
TDO

TMS

DBR#

H_ADS#

H1

H_BNR#

E2

H_BPRI#

G5

H_DEFER#

H5

H_DRDY#

F21

H_DBSY#

E1

H_BR0#

F1

H_IERR#

D20

H_INIT#

B3

H_LOCK#

H4

H_RESET#

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3

H_TRDY#

G2

H_HIT#

G6

H_HITM#

E4

XDP_BPM#0

AD4

XDP_BPM#1

AD3

XDP_BPM#2

AD1

XDP_BPM#3

AC4

XDP_BPM#4

AC2

XDP_BPM#5

AC1

XDP_TCK

AC5

XDP_TDI

AA6

TDI

AB3
AB5
AB6
C20

D21
A24
B25

C7

A22
A21

OCP# 21

XDP_TDO
XDP_TMS
XDP_TRST#

XDP_DBRESET#

H_PROCHOT#

H_THERMDA
H_THERMDC

H_THERMTRIP#

CLK_CPU_BCLK
CLK_CPU_BCLK#

H_ADS# 7
H_BNR# 7

H_BPRI# 7

H_DEFER# 7
H_DRDY# 7
H_DBSY# 7

H_BR0# 7

H_INIT# 20
H_LOCK# 7
H_RESET# 7

H_RS#0 7

H_RS#1 7

H_RS#2 7

H_TRDY# 7

H_HIT# 7
H_HITM# 7

T17
T6
T13
T15
T12
T14
T7
T9
T16
T11
T5

XDP_DBRESET# 21

R87 56_0402_5%

CLK_CPU_BCLK 15
CLK_CPU_BCLK# 15

H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil

R92

56_0402_5%

12

H_THERMTRIP# 7,20

12

H_PROCHOT# 45

+VCCP

+VCCP

1
2
3
4

FAN_SPEED133

C528 10U_1206_16V4Z
U23

VEN
VIN
VO
VSET

G993P1UF_SOP8

U24

2

D+

3

D-

8

SCLK

7

SDATA

G781F_SOP8

Address:100_1100

1 2

GND
GND
GND
GND

H_THERMDA

C536

H_THERMDC

1 2

+VCC_FAN1
EN_FAN1

2200P_0402_50V7K

EC_SMB_DA2

+5VS

EC_SMB_CK233
EC_SMB_DA233

EN_FAN133

XDP_DBRESET#

XDP_TDI
XDP_TMS
XDP_TDO
XDP_BPM#5
XDP_HOOK1

XDP_TRST#
XDP_TCK

+3VS

C535

1 2

0.1U_0402_16V4Z

1

VDD1

THERM_SCI#

6

ALERT#

THERM#

GND

THERM#EC_SMB_CK2

4
5

FAN1 Conn

8
7
6
5

+3VS

12

R427
10K_0402_5%

1

C531
1000P_0402_50V7K

2

1 2

R157

R158 150_0402_1%

1 2

R159 39_0402_1%

1 2

R163 54.9_0402_1%@

1 2

R162 54.9_0402_1%

1 2

R161 54.9_0402_1%@

1 2

R155 560_0402_5%

1 2

R156 27_0402_5%

1 2

R445
10K_0402_5%

1 2

12

R442 0_0402_5%@

12

R44810K_0402_5%

+5VS

12

D17
1SS355_SOD323@

D18

1N4148_SOT23@

1 2

C532

10U_1206_16V4Z

1 2

C529

1000P_0402_50V7K

1 2

40mil

+VCC_FAN1

+3VS

1K_0402_5%@

+VCCP

EC_THERM# 21,33

+3VS

Check : to sb

JP61

1
2
3

ACES_85205-03001

ME@

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

Merom(1/3)-AGTL+/XDP

IGT30 LA-3571P

1

0.1

of

447Monday, December 25, 2006

5

4

3

2

1

H_D#[0..15]7

D D

H_DSTBN#07
H_DSTBP#07

H_DINV#07

H_D#[16..31]7

H_DSTBN#17

C C

H_DSTBP#17

H_DINV#17

R94 1K_0402_5%@

1 2

R93 1K_0402_5%@

1 2

C237 0.1U_0402_16V4Z@

1 2

CPU_BSEL015
CPU_BSEL115
CPU_BSEL215

T4
T8

T3

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1

+CPU_GTLREF

TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

CPU_BSEL0 H_PWRGOOD
CPU_BSEL1
CPU_BSEL2

JP1B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

Merom Ball-out Rev 1a

ME@

DATA GRP 0

DATA GRP 1

MISC

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#

DATA GRP 2DATA GRP 3

D[46]#

D[47]#
DSTBN[2]#
DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]#
DSTBN[3]#
DSTBP[3]#

DINV[3]#
COMP[0]

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3

COMP0
COMP1
COMP2
COMP3

H_DPRSTP#
H_DPSLP#
H_DPWR#

H_CPUSLP#
H_PSI#

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

CPU_BSEL CPU_BSEL2 CPU_BSEL1

166

200

B B

+CPU_GTLREF

01

+VCCP

0

12

R89
1K_0402_1%

12

R95
2K_0402_1%

1

CPU_BSEL0

1

0

H_D#[32..47] 7

H_DSTBN#2 7
H_DSTBP#2 7
H_DINV#2 7
H_D#[48..63] 7

H_DSTBN#3 7
H_DSTBP#3 7
H_DINV#3 7

H_DPRSTP# 7,20,45

H_DPSLP# 20
H_DPWR# 7
H_PWRGOOD 20

H_CPUSLP# 7
H_PSI# 45

12

12

12

R153

R154

27.4_0402_1%

54.9_0402_1%

Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
mils away from any other
toggling signal.
COMP[0,2] trace width is
18 mils. COMP[1,3] trace
width is 4 mils.

R96

54.9_0402_1%

12

R97

27.4_0402_1%

JP1C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

Merom Ball-out Rev 1a

ME@

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCA[01]
VCCA[02]

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VCCSENSE

VSSSENSE

+CPU_CORE+CPU_CORE

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

.

For testing purpose only

R91 0_0402_5%

12
12

R164 0_0402_5%

VCCSENSE

VSSSENSE

+VCCP

1

+

C214

2

CPU_VID0 45
CPU_VID1 45
CPU_VID2 45
CPU_VID3 45
CPU_VID4 45
CPU_VID5 45
CPU_VID6 45

VCCSENSE 45

VSSSENSE 45

330U_D2E_2.5VM_R7

Length match within 25 mils.
The trace width/space/other is
20/7/25.

+CPU_CORE

R483
100_0402_1%

1 2

R486
100_0402_1%

1 2

VCCSENSE

VSSSENSE

C231

1

C238

2

10U_0805_10V4Z

+1.5VS

1

2

0.01U_0402_16V7K

Near pin B26

Close to CPU pin AD26
within 500mils.

Close to CPU pin
within 500mils.

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

Merom(2/3)-AGTL+/PWR

IGT30 LA-3571P

1

0.1

of

547Monday, December 25, 2006

5

4

3

2

1

1

C324

0.1U_0402_16V4Z

2

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

1

+

C561

2

330U_V_2.5VK_R9

1

C546
10U_0805_6.3V6M

2

1

C549
10U_0805_6.3V6M

2

1

C321
10U_0805_6.3V6M

2

1

C267
10U_0805_6.3V6M

2

C312

330U_V_2.5VK_R9

1

C272

0.1U_0402_16V4Z

2

1

+

C548

2

330U_V_2.5VK_R9

C271

0.1U_0402_16V4Z

1

C289
10U_0805_6.3V6M

2

1

C297
10U_0805_6.3V6M

2

1

C547
10U_0805_6.3V6M

2

1

C292
10U_0805_6.3V6M

2

1

C562

2

330U_V_2.5VK_R9

1

2

+

C323

0.1U_0402_16V4Z

1

C564
10U_0805_6.3V6M

2

1

C542
10U_0805_6.3V6M

2

1

C291
10U_0805_6.3V6M

2

1

C298
10U_0805_6.3V6M

2

1

2

1

2

North Side Secondary

1

C325

0.1U_0402_16V4Z

2

1

C287
10U_0805_6.3V6M

2

1

C327
10U_0805_6.3V6M

2

C554
10U_0805_6.3V6M

C296
10U_0805_6.3V6M

1

C545
10U_0805_6.3V6M

2

1

C286
10U_0805_6.3V6M

2

1

C314
10U_0805_6.3V6M

2

1

C543
10U_0805_6.3V6M

2

ESR <= 1.5m ohm
Capacitor > 1980uF

Place these inside
socket cavity on L8
(North side
Secondary)

1

C322
10U_0805_6.3V6M

2

1

C559
10U_0805_6.3V6M

2

1

C295
10U_0805_6.3V6M

2

1

C315
10U_0805_6.3V6M

2

Mid Frequence Decoupling

C273

0.1U_0402_16V4Z

1

C268
10U_0805_6.3V6M

2

1

C558
10U_0805_6.3V6M

2

1

C555
10U_0805_6.3V6M

2

1

C563
10U_0805_6.3V6M

2

1

+

C557

2

330U_V_2.5VK_R9

1

2

1

C551
10U_0805_6.3V6M

2

1

C328
10U_0805_6.3V6M

2

1

C288
10U_0805_6.3V6M

2

1

C285
10U_0805_6.3V6M

2

1

1

+

+

C313

@

2

@

2

330U_V_2.5VK_R9

1

2

D D

C C

B B

JP1D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]
VSS[081]P3VSS[162]

Merom Ball-out Rev 1a

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

.

220U_D2_4VM

Place these capacitors on L8
(North side,Secondary Layer)

Place these capacitors on L8
(North side,Secondary Layer)

Place these capacitors on L8
(Sorth side,Secondary Layer)

Place these capacitors on L8
(Sorth side,Secondary Layer)

South Side Secondary

+VCCP

1

+

C229

2

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

Merom(3/3)-GND&Bypass

IGT30 LA-3571P

1

0.1

of

647Monday, December 25, 2006

5

M10

W10

AD12

AC14
AD11
AC11

AG3

AJ14

AE11
AH12

AH13

E2

G2
G7
M6
H7
H3
G4

F3
N8
H2

N12

N9
H5

P13

K9
M2

Y8

V4
M3

J1
N5
N3
W6
W9
N2

Y7

Y9

P4
W3
N1

AE3
AD9
AC9
AC7

AB2
AD7
AB1

Y3

AC6
AE2
AC5

AJ9
AH8

AE9

AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2

B3
C2

W1
W2

B6

E5

B9

A9

U22A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING
H_RCOMP

H_SCOMP
H_SCOMP#

H_CPURST#
H_CPUSLP#

H_AVREF
H_DVREF

CRESTLINE_1p0

HOST

H_ADSTB#_0
H_ADSTB#_1

H_BREQ#

H_DEFER#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1

H_REQ#_2
H_REQ#_3

H_REQ#_4

H_D#[0..63]5

D D

C C

+VCCP

12

12

R15

R18

54.9_0402_1%

54.9_0402_1%

H_RESET#4

H_CPUSLP#5

B B

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57

H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWNG
H_RCOMP

H_SCOMP
H_SCOMP#

H_RESET#
H_CPUSLP#

H_VREF

layout note:
Route H_SCOMP and H_SCOMP# with trace width, spacing and impedance (55 ohm) same as FSB data traces

Layout Note:
H_RCOMP / H_VREF / H_SWNG

trace width and spacing is 10/20

+VCCP

R16

R17

12

221_0603_1%

12

100_0402_1%

H_SWNGH_VREF

1

C15

2

0.1U_0402_16V4Z

+VCCP

12

R411

1K_0402_1%

A A

0.1U_0402_16V4Z

12

1

C23

R412

2

2K_0402_1%

12

R399

24.9_0402_1%

H_RCOMP

Near B3 pinwithin 100 mils from NB

5

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_DBSY#

H_HIT#
H_HITM#

H_LOCK#
H_TRDY#

H_RS#_0
H_RS#_1
H_RS#_2

+DDR_MCH_REF

4

H_A#3

J13

H_A#4

B11

H_A#5

C11

H_A#6

M11

H_A#7

C15

H_A#8

F16

H_A#9

L13

H_A#10

G17

H_A#11

C14

H_A#12

K16

H_A#13

B13

H_A#14

L16

H_A#15

J17

H_A#16

B14

H_A#17

K19

H_A#18

P15

H_A#19

R17

H_A#20

B16

H_A#21

H20

H_A#22

L19

H_A#23

D17

H_A#24

M17

H_A#25

N16

H_A#26

J19

H_A#27

B18

H_A#28

E19

H_A#29

B17

H_A#30

B15

H_A#31

E17

H_A#32

C18

H_A#33

A19

H_A#34

B19

H_A#35

N19

H_ADS#

G12

H_ADSTB#0

H17

H_ADSTB#1

G20

H_BNR#

C8

H_BPRI#

E8

H_BR0#

F12

H_DEFER#

D6

H_DBSY#

C10

CLK_MCH_BCLK

AM5

CLK_MCH_BCLK#

AM7

H_DPWR#

H8

H_DRDY#

K7

H_HIT#

E4

H_HITM#

C6

H_LOCK#

G10

H_TRDY#

B7

H_DINV#0

K5

H_DINV#1

L2

H_DINV#2

AD13

H_DINV#3

AE13

H_DSTBN#0H_D#58

M7

H_DSTBN#1

K3

H_DSTBN#2

AD2

H_DSTBN#3

AH11

H_DSTBP#0

L7

H_DSTBP#1

K2

H_DSTBP#2

AC2

H_DSTBP#3

AJ10

H_REQ#0

M14

H_REQ#1

E13

H_REQ#2

A11

H_REQ#3

H13

H_REQ#4

B12

H_RS#0

E12

H_RS#1

D7

H_RS#2

D8

ICH_POK21,33

VGATE21,45

PLT_RST#18,19,21,23,24,26,27

Layout Note:
V_DDR_MCH_REF
trace width and
spacing is 20/20.

4

H_A#[3..35] 4

H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BR0# 4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 15
CLK_MCH_BCLK# 15
H_DPWR# 5
H_DRDY# 4
H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4

H_DINV#0 5
H_DINV#1 5
H_DINV#2 5
H_DINV#3 5

H_DSTBN#0 5
H_DSTBN#1 5
H_DSTBN#2 5
H_DSTBN#3 5

H_DSTBP#0 5
H_DSTBP#1 5
H_DSTBP#2 5
H_DSTBP#3 5

H_REQ#0 4
H_REQ#1 4
H_REQ#2 4
H_REQ#3 4
H_REQ#4 4

H_RS#0 4
H_RS#1 4
H_RS#2 4

R436 0_0402_5%
R438 0_0402_5%@

1 2

R449 100_0402_5%

+DDR_MCH_REF

1

C161

2

0.1U_0402_16V4Z

3

SMRCOMP_VOH

SMRCOMP_VOL

2.2U_0603_10V6K

2.2U_0603_10V6K

MCH_CLKSEL015
MCH_CLKSEL115
MCH_CLKSEL215

Check : different from hdl00

12
12

PM_POK_R PM_POK_R

H_THERMTRIP#4,20

+3VS

+1.8V

12

12

R67

R68

0309 add

PLT_RST#_R

1K_0402_1%

1K_0402_1%

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

U22B

P36

RSVD1

P37

RSVD2

R35

RSVD3

N35

RSVD4

AR12

+1.8V

2

2

C73

1

1

2

C91

PM_BMBUSY#21

H_DPRSTP#5,20,45
PM_EXTTS#013
PM_EXTTS#114

DPRSLPVR21,45

R57 10K_0402_5%
R64 10K_0402_5%

C83

1

1

2

C84

CFG59
CFG6
CFG79
CFG89

CFG99
CFG10
CFG11
CFG129
CFG139

CFG169
CFG18

CFG199
CFG209

1 2
1 2

0.01U_0402_25V7K

0.01U_0402_25V7K

DDR_A_MA1413
DDR_B_MA1414

12

R31
1K_0402_1%

12

R38

3.01K_0402_1%

NA lead free

12

R45
1K_0402_1%

MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2

CFG5
CFG6
CFG7

CFG9
CFG10
CFG11
CFG12
CFG13

CFG16
CFG18

CFG19
CFG20

PM_BMBUSY#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1

PLT_RST#_R
H_THERMTRIP#
DPRSLPVR

PM_EXTTS#0
PM_EXTTS#1

2006/08/04 2006/10/06

RSVD5

AR13

RSVD6

AM12

RSVD7

AN13

RSVD8

J12

RSVD9

AR37

RSVD10

AM36

RSVD11

AL36

RSVD12

AM37

RSVD13

D20

RSVD14

H10

RSVD20

B51

RSVD21

BJ20

RSVD22

BK22

RSVD23

BF19

RSVD24

BH20

RSVD25

BK18

RSVD26

BJ18

RSVD27

BF23

RSVD28

BG23

RSVD29

BC23

RSVD30

BD24

RSVD31

BJ29

RSVD32

BE24

RSVD33

BH39

RSVD34

AW20

RSVD35

BK20

RSVD36

C48

RSVD37

D47

RSVD38

B44

RSVD39

C44

RSVD40

A35

RSVD41

B37

RSVD42

B36

RSVD43

B34

RSVD44

C34

RSVD45

P27

CFG_0

N27

CFG_1

N24

CFG_2

C21

CFG_3

C23

CFG_4

F23

CFG_5

N23

CFG_6

G23

CFG_7

J20

CFG_8

C20

CFG_9

R24

CFG_10

L23

CFG_11

J23

CFG_12

E23

CFG_13

E20

CFG_14

K23

CFG_15

M20

CFG_16

M24

CFG_17

L32

CFG_18

N33

CFG_19

L35

CFG_20

G41

PM_BM_BUSY#

L39

PM_DPRSTP#

L36

PM_EXT_TS#_0

J36

PM_EXT_TS#_1

AW49

PWROK

AV20

RSTIN#

N20

THERMTRIP#

G36

DPRSLPVR

BJ51

NC_1

BK51

NC_2

BK50

NC_3

BL50

NC_4

BL49

NC_5

BL3

NC_6

BL2

NC_7

BK1

NC_8

BJ1

NC_9

E1

NC_10

A5

NC_11

C51

NC_12

B50

NC_13

A50

NC_14

A49

NC_15

BK2

NC_16

CRESTLINE_1p0

Compal Secret Data

Deciphered Date

2

DDR MUXINGCLK

CFGRSVD

DMI

PM

GRAPHICS VID

ME

NC

MISC

2

SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4

SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4

SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4

SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3

SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_VREF_0
SM_VREF_1

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#
CL_VREF

SDVO_CTRL_CLK

SDVO_CTRL_DATA

CLK_REQ#

ICH_SYNC#

TEST_1
TEST_2

1

For Crestline: 20ohm

M_CLK_DDR0

AV29

M_CLK_DDR1

BB23

M_CLK_DDR2

BA25

M_CLK_DDR3

AV23

M_CLK_DDR#0

AW30

M_CLK_DDR#1

BA23

M_CLK_DDR#2

AW25

M_CLK_DDR#3

AW23

DDR_CKE0_DIMMA

BE29

DDR_CKE1_DIMMA

AY32

DDR_CKE2_DIMMB

BD39

DDR_CKE3_DIMMB

BG37

DDR_CS0_DIMMA#

BG20

DDR_CS1_DIMMA#

BK16

DDR_CS2_DIMMB#

BG16

DDR_CS3_DIMMB#

BE13

M_ODT0

BH18

M_ODT1

BJ15

M_ODT2

BJ14

M_ODT3

BE16

SMRCOMP

BL15

SMRCOMP#

BK14

SMRCOMP_VOH

BK31

SMRCOMP_VOL

BL31
AR49

+DDR_MCH_REF

AW4

CLK_MCH_DREFCLK

B42

CLK_MCH_DREFCLK#

C42

MCH_SSCDREFCLK

H48

MCH_SSCDREFCLK#

H47

CLK_MCH_3GPLL

K44

CLK_MCH_3GPLL#

K45

DMI_TXN0

AN47

DMI_TXN1

AJ38

DMI_TXN2

AN42

DMI_TXN3

AN46

DMI_TXP0

AM47

DMI_TXP1

AJ39

DMI_TXP2

AN41

DMI_TXP3

AN45

DMI_RXN0

AJ46

DMI_RXN1

AJ41

DMI_RXN2

AM40

DMI_RXN3

AM44

DMI_RXP0

AJ47

DMI_RXP1

AJ42

DMI_RXP2

AM39

DMI_RXP3

AM43

E35
A39
C38
B39
E36

For AMT function

CL_CLK0

AM49

CL_DATA0

AK50
AT43

CL_RST#

AN49

CL_VREF

AM50

H35
K36

CLKREQ_3GPLL#

G39

MCH_ICH_SYNC#

G40

A37
R32

12

R47

20K_0402_5%

Title

CRESTLINE(1/6)-AGTL+/DMI/DDR2

Size Document Number Rev

Custom

IGT30 LA-3571P

Date: Sheet

For Calero: 80.6ohm

M_CLK_DDR0 13
M_CLK_DDR1 13
M_CLK_DDR2 14
M_CLK_DDR3 14

M_CLK_DDR#0 13
M_CLK_DDR#1 13
M_CLK_DDR#2 14
M_CLK_DDR#3 14

DDR_CKE0_DIMMA 13
DDR_CKE1_DIMMA 13
DDR_CKE2_DIMMB 14
DDR_CKE3_DIMMB 14

DDR_CS0_DIMMA# 13
DDR_CS1_DIMMA# 13
DDR_CS2_DIMMB# 14
DDR_CS3_DIMMB# 14

M_ODT0 13
M_ODT1 13
M_ODT2 14

12

R423
0_0402_5%

M_ODT3 14

CLK_MCH_DREFCLK 15
CLK_MCH_DREFCLK# 15
MCH_SSCDREFCLK 15
MCH_SSCDREFCLK# 15

CLK_MCH_3GPLL 15
CLK_MCH_3GPLL# 15

DMI_TXN0 21
DMI_TXN1 21
DMI_TXN2 21
DMI_TXN3 21

DMI_TXP0 21
DMI_TXP1 21
DMI_TXP2 21
DMI_TXP3 21

DMI_RXN0 21
DMI_RXN1 21
DMI_RXN2 21
DMI_RXN3 21

DMI_RXP0 21
DMI_RXP1 21
DMI_RXP2 21
DMI_RXP3 21

CL_CLK0 21
CL_DATA0 21
M_PWROK 21
CL_RST# 21

0.1U_0402_16V4Z

CLKREQ_3GPLL# 15
MCH_ICH_SYNC# 21

CLKREQ_3GPLL#

20_0402_1%

R23
R22 20_0402_1%

+1.25VS

1

C167

2

R63

10K_0402_5%

Compal Electronics, Inc.

747Monday, December 25, 2006

1

12
12

12

R71
1K_0402_1%

12

R75
392_0402_1%

+1.8V

+3VS

12

0.1

of

5

D D

DDR_A_D[0..63]13

C C

B B

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8

DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AR43

AW44

BA45

AY46
AR41
AR45

AT42

AW47

BB45

BF48
BG47

BJ45

BB47
BG50
BH49

BE45

AW43

BE44
BG42

BE40

BF44
BH45
BG40

BF40
AR40

AW40

AT39

AW36
AW41

AY41

AV38

AT38

AV13

AT13

AW11

AV11
AU15

AT11

BA13

BA11

BE10
BD10

BG10

AW9

AN10

AN11

AM8

AM9

BD8
AY9

BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3

AT9
AN9

U22D

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

CRESTLINE_1p0

DDR SYSTEM MEMORY A

SA_BS_0
SA_BS_1

SA_BS_2
SA_CAS#
SA_DM_0

SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13

SA_RAS#

SA_RCVEN#

SA_WE#

4

DDR_A_BS#0

BB19
BK19
BF29

BL17
AT45

BD44
BD42
AW38
AW13
BG8
AY5
AN6

AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2

BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16

BE18
AY20

BA19

DDR_A_BS#1
DDR_A_BS#2

DDR_A_CAS#
DDR_A_DM0

DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2

DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13

DDR_A_RAS#
SA_RCVEN#

DDR_A_WE#

DDR_A_BS#0 13
DDR_A_BS#1 13
DDR_A_BS#2 13

DDR_A_CAS# 13 DDR_B_CAS# 14
DDR_A_DM[0..7] 13

DDR_A_DQS[0..7] 13

DDR_A_DQS#[0..7] 13

DDR_A_MA[0..13] 13

DDR_A_RAS# 13

T2

DDR_A_WE# 13

3

DDR_B_D[0..63]14

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8

DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18DDR_A_DQS3
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41

DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AP49

AR51
AW50
AW51

AN51

AN50

AV50

AV49

BA50

BB50

BA49

BE50

BA51

AY49

BF50

BF49

BJ50

BJ44

BJ43

BL43

BK47

BK49

BK43

BK42

BJ41

BL41

BJ37

BJ36

BK41

BJ40

BL35

BK37

BK13

BE11

BK11

BC11

BC13

BE12

BC12
BG12

BJ10

BK10

BG1
BC2
BK3
BE4
BD3

BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2

BL9
BK5
BL5
BK9

BJ8
BJ6
BF4
BH5

BJ2

2

U22E

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

CRESTLINE_1p0

1

DDR_B_BS#0

AY17

SB_BS_0
SB_BS_1

SB_BS_2
SB_CAS#
SB_DM_0

SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

SB_RAS#

SB_RCVEN#

SB_WE#

DDR SYSTEM MEMORY B

BG18
BG36

BE17
AR50

BD49
BK45
BL39
BH12
BJ7
BF3
AW2

AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3

BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13

AV16
AY18

BC17

DDR_B_BS#1
DDR_B_BS#2

DDR_B_CAS#

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6

DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8

DDR_B_MA9
DDR_B_MA10DDR_B_D42
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13

DDR_B_RAS#

SB_RCVEN#

DDR_B_WE#

DDR_B_RAS# 14

T1

DDR_B_WE# 14

DDR_B_BS#0 14
DDR_B_BS#1 14
DDR_B_BS#2 14

DDR_B_DM[0..7] 14

DDR_B_DQS[0..7] 14

DDR_B_DQS#[0..7] 14

DDR_B_MA[0..13] 14

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

CRESTLINE((2/6)-DDR2 A/B CH

IGT30 LA-3571P

1

of

847Monday, December 25, 2006

0.1

5

4

3

2

1

+3VS

12

+3VS

12

R56

2.2K_0402_5%

UMA@

R425 10K_0402_5%

1 2

R429 10K_0402_5%

1 2

EDID_CLK_LCD
EDID_DAT_LCD

GMCH_LVDDEN

R62 2.4K_0402_1%

LVDSAC-37
LVDSAC+37
LVDSBC-37
LVDSBC+37

LVDSA0-37
LVDSA1-37

LVDSA2-37

LVDSA0+37
LVDSA1+37
LVDSA2+37

LVDSB0-37
LVDSB1-37
LVDSB2-37

LVDSB0+37
LVDSB1+37
LVDSB2+37

TV_COMPS17
TV_LUMA17
TV_CRMA17

1 2

R52 2.2K_0402_5%

CRT_B17
CRT_G17
CRT_R17

3VDDCCL17

3VDDCDA17

CRT_HSYNC

1 2

R424 39_0402_1%

CRT_VSYNC

1 2

R422 39_0402_1%

For Crestline:1.3kohm
For Calero: 255ohm

12

GMCH_ENBKL

LVDSAC­LVDSAC+
LVDSBC­LVDSBC+

LVDSA0­LVDSA1­LVDSA2-

LVDSA0+
LVDSA1+
LVDSA2+

LVDSB0­LVDSB1­LVDSB2-

LVDSB0+
LVDSB1+
LVDSB2+

TV_COMPS
TV_LUMA
TV_CRMA

CRT_B
CRT_G
CRT_R

3VDDCCL
3VDDCDA
HSYNC_R

VSYNC_R

R417

1.3K_0402_1%

12

U22C

J40

H39

E39

E40
C37
D35

K40

L41

L43
N41
N40
D46
C45
D44

E42
G51

E51

F49

G50

E50

F48

G44

B47

B45

E44

A47

A45

E27
G27

K27

F27

J27

L27
M35

P33

H32
G32

K29

J29

F29

E29

K33
G35

F33
C32

E33

CRESTLINE_1p0

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN

LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2

TVA_DAC
TVB_DAC
TVC_DAC

TVA_RTN
TVB_RTN
TVC_RTN

TV_DCONSEL_0
TV_DCONSEL_1

CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

PEG_COMPI

PEG_COMPO

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8

LVDS

TV VGA

PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_RX_10

PEG_RX_11

PEG_RX_12

PEG_RX_13

PEG_RX_14

PEG_RX_15

PEG_TX#_0

PEG_TX#_1

PEG_TX#_2

PEG_TX#_3

PEG_TX#_4

PEG_TX#_5

PEG_TX#_6

PEG_TX#_7

PEG_TX#_8

PEG_TX#_9

PEG_TX#_10

PCI-EXPRESS GRAPHICS

PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

PEG_TX_10

PEG_TX_11

PEG_TX_12

PEG_TX_13

PEG_TX_14

PEG_TX_15

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9

PEGCOMP tr ace width
and spacing is 20/25 mils.

N43

PEGCOMP

M43

PEG_RXN0

J51

PEG_RXN1

L51

PEG_RXN2

N47

PEG_RXN3

T45

PEG_RXN4

T50

PEG_RXN5

U40

PEG_RXN6

Y44

PEG_RXN7

Y40

PEG_RXN8

AB51

PEG_RXN9

W49

PEG_RXN10

AD44

PEG_RXN11

AD40

PEG_RXN12

AG46

PEG_RXN13

AH49

PEG_RXN14

AG45

PEG_RXN15

AG41

PEG_RXP0

J50

PEG_RXP1

L50

PEG_RXP2

M47

PEG_RXP3

U44

PEG_RXP4

T49

PEG_RXP5

T41

PEG_RXP6

W45

PEG_RXP7

W41

PEG_RXP8

AB50

PEG_RXP9

Y48

PEG_RXP10

AC45

PEG_RXP11

AC41

PEG_RXP12

AH47

PEG_RXP13

AG49

PEG_RXP14

AH45

PEG_RXP15

AG42

PEG_TXN0

N45

PEG_TXN1

U39

PEG_TXN2

U47

PEG_TXN3

N51

PEG_TXN4

R50

PEG_TXN5

T42

PEG_TXN6

Y43

PEG_TXN7

W46

PEG_TXN8

W38

PEG_TXN9

AD39

PEG_TXN10

AC46

PEG_TXN11

AC49

PEG_TXN12

AC42

PEG_TXN13

AH39

PEG_TXN14

AE49

PEG_TXN15

AH44

PEG_TXP0

M45

PEG_TXP1

T38

PEG_TXP2

T46

PEG_TXP3

N50

PEG_TXP4

R51

PEG_TXP5

U43

PEG_TXP6

W42

PEG_TXP7

Y47

PEG_TXP8

Y39

PEG_TXP9

AC38

PEG_TXP10

AD47

PEG_TXP11

AC50

PEG_TXP12

AD43

PEG_TXP13

AG39

PEG_TXP14

AE50

PEG_TXP15

AH43

R66

24.9_0402_1%

1 2

C277 0.1U_0402_16V4ZVGA@
C234 0.1U_0402_16V4ZVGA@
C259 0.1U_0402_16V4ZVGA@
C218 0.1U_0402_16V4ZVGA@
C279 0.1U_0402_16V4ZVGA@
C236 0.1U_0402_16V4ZVGA@
C264 0.1U_0402_16V4ZVGA@
C221 0.1U_0402_16V4ZVGA@
C282 0.1U_0402_16V4ZVGA@
C242 0.1U_0402_16V4ZVGA@
C257 0.1U_0402_16V4ZVGA@
C223 0.1U_0402_16V4ZVGA@
C284 0.1U_0402_16V4ZVGA@
C239 0.1U_0402_16V4ZVGA@
C262 0.1U_0402_16V4ZVGA@
C225 0.1U_0402_16V4ZVGA@

C276 0.1U_0402_16V4ZVGA@
C233 0.1U_0402_16V4ZVGA@
C258 0.1U_0402_16V4ZVGA@
C217 0.1U_0402_16V4ZVGA@
C278 0.1U_0402_16V4ZVGA@
C235 0.1U_0402_16V4ZVGA@
C263 0.1U_0402_16V4ZVGA@
C219 0.1U_0402_16V4ZVGA@
C281 0.1U_0402_16V4ZVGA@
C241 0.1U_0402_16V4ZVGA@
C256 0.1U_0402_16V4ZVGA@
C222 0.1U_0402_16V4ZVGA@
C283 0.1U_0402_16V4ZVGA@
C243 0.1U_0402_16V4ZVGA@
C261 0.1U_0402_16V4ZVGA@
C224 0.1U_0402_16V4ZVGA@

+VCC_PEG

PEG_RXN[0..15] 18

PEG_RXP[0..15] 18

PEG_M_TXN0
PEG_M_TXN1
PEG_M_TXN2
PEG_M_TXN3
PEG_M_TXN4
PEG_M_TXN5
PEG_M_TXN6
PEG_M_TXN7
PEG_M_TXN8
PEG_M_TXN9
PEG_M_TXN10
PEG_M_TXN11
PEG_M_TXN12
PEG_M_TXN13
PEG_M_TXN14
PEG_M_TXN15

PEG_M_TXP0
PEG_M_TXP1
PEG_M_TXP2
PEG_M_TXP3
PEG_M_TXP4
PEG_M_TXP5
PEG_M_TXP6
PEG_M_TXP7
PEG_M_TXP8
PEG_M_TXP9
PEG_M_TXP10
PEG_M_TXP11
PEG_M_TXP12
PEG_M_TXP13
PEG_M_TXP14
PEG_M_TXP15

PEG_M_TXN[0..15] 18

PEG_M_TXP[0..15] 18

CFG[2:0] FSB Freq select

CFG5 (DMI select)

CFG7 (CPU Strap)

CFG8 (Low power PCIE)

(PCIE Graphics Lane Reversal)

CFG[13:12] (XOR/ALLZ)

CFG[15:14] Reserved

CFG16 (FSB Dynamic ODT)

SDVO_CTRLDATA

CFG19 (DMI Lane Reversal)

CFG20 (PCIE/SDVO concurrent)

R59

2.2K_0402_5%

UMA@

12
12
12

12
12
12

CRT_HSYNC17
CRT_VSYNC17

EDID_CLK_LCD
EDID_DAT_LCD

GMCH_ENBKL16

GMCH_LVDDEN16

TV_COMPS
TV_LUMA
TV_CRMA

+3VS

CRT_R
CRT_G
CRT_B

EDID_CLK_LCD37
EDID_DAT_LCD37

D D

For Crestline:2.4kohm
For Calero: 1.5Kohm

C C

R414 150_0603_1%UMA@
R415 150_0603_1%UMA@
R416 150_0603_1%UMA@

R421 150_0603_1%UMA@
R419 150_0603_1%UMA@

B B

R418 150_0603_1%UMA@

Strap Pin Table

010 = FSB 800MHz
011 = FSB 667MHz
Others = Reserved

0 = DMI x 2
1 = DMI x 4

CFG6

CFG9

CFG[11:10]

CFG[18:17] Reserved

Reserved

0 = Reserved
1 = Mobile CPU

0 = Normal mode
1 = Low Power mode

0 = Reverse Lane
1 = Normal Operation

Reserved
00 = Reserved

01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation

0 = Disabled
1 = Enabled

0 = No SDVO Device Present
1 = SDVO Device Present

0 = Normal Operation

(Lane number in Order)

1 = Reverse Lane

0 = Only PCIE or SDVO is operational.
1 = PCIE/SDVO a r e o p e r a t ing simu.

CFG57

CFG77

CFG87

CFG97

CFG127

CFG137

CFG167

*

*

*

R32 4.02K_0402_1%@

1 2

R33 4.02K_0402_1%@

1 2

R26 4.02K_0402_1%@

1 2

R413 4.02K_0402_1%@

1 2

R25 4.02K_0402_1%@

1 2

R29 4.02K_0402_1%@

1 2

R27 4.02K_0402_1%@

1 2

*
*

(Default)

*

*

*

*

CFG[17:3] have internal pull up
CFG[19:18] have internal pull down

+3VS

R55 4.02K_0402_1%@

CFG197

A A

CFG207

1 2

R58 4.02K_0402_1%@

1 2

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

CRESTLINE((3/6)-VGA/LVDS/TV

IGT30 LA-3571P

1

of

947Monday, December 25, 2006

0.1

5

0.1U_0402_16V4Z

UMA@

0.1U_0402_16V4Z

UMA@

C8

150U_D_6.3VM

R37

0_0603_5%

0316 add

1

1

C64

2

2

UMA@

1

1

C54

2

2

UMA@

1

1

C65

2

2

UMA@

+3VS_DAC_BG

1

1

C96

2

2

+3VS_DAC_CRT

1

1

C117

2

2

1

+

22U_0805_6.3V4Z

2

+1.25VS_A_SM_CK

12

C75

R49

0_0603_5%

0.1U_0402_16V4Z

R35

0_0603_5%

0.1U_0402_16V4Z

UMA@

R36

0_0603_5%

0.1U_0402_16V4Z

UMA@

5

+3VS

R39

1 2

0_0603_5%

UMA@

D D

+3VS

R54

1 2

0_0603_5%

UMA@

+1.25VS

C C

+3VS_TVDACC

B B

0.022U_0402_16V7K

C76

UMA@

+3VS_TVDACA

0.022U_0402_16V7K

C56

UMA@

A A

+3VS_TVDACB

0.022U_0402_16V7K

C66

UMA@

0.022U_0402_16V7K

C97

UMA@

C92

0.022U_0402_16V7K

C116

UMA@

+3VS

0.1U_0402_16V4Z

R21

1 2

0_0805_5%

C28

1U_0402_6.3V4Z

C55

1

2

0317 change value

12

UMA@

12

12

+3VS

4.7U_0805_10V4Z

1

2

R72

0_0603_5%

0317 change value

1

4.7U_0805_6.3V6K

2

22U_0805_6.3V4Z

1

2

+3VS

+3VS

+3VS

R51

0_0603_5%

+1.8V_TXLVDS

+3VS_PEG_BG

12

C165

C29

C77

1

2

VCCSYNC

12

C94

+1.25VS_DPLLA
+1.25VS_DPLLB

+1.25VS_HPLL
+1.25VS_MPLL

1000P_0402_50V7K
C154

1

+1.25VS_PEGPLL

2

+1.25VS_A_SM

1

2

1U_0603_10V4Z

C82

1

2

+1.25VS_HPLL

+1.25VS_PEGPLL

+1.8V_LVDS

0.1U_0402_16V4Z

1

2

+3VS_DAC_CRT

+3VS_DAC_BG

1

2

1

2

1U_0603_10V4Z

0.1U_0402_16V4Z

+3VS_TVDACA
+3VS_TVDACB
+3VS_TVDACC

+1.5VS_TVDAC

+1.5VS_QDAC

+1.5VS_QDAC

0.022U_0402_16V7K

1

C58

2

UMA@

+1.8V_LVDS

10U_0805_10V6K

C155

1

2

UMA@

C34

C46

1U_0603_10V4Z

20 mils

1

2

UMA@

C152

AW18
AV19
AU19
AU18
AU17

AT22
AT21
AT19
AT18

AT17
AR17
AR16

BC29
BB29

0.1U_0402_16V4Z

0_0603_5%

UMA@

1

2

UMA@

J32

A33
B33

A30
B32

B49
H49
AL2

AM2

A41
B41

K50
K49

U51

C25
B25
C27
B27
B28
A28

M32

L29
N28
AN2
U48

J41
H42

R43

0_0603_5%

UMA@

R69

U22H

CRESTLINE_1p0

4

VCCSYNC
VCCA_CRT_DAC_1

VCCA_CRT_DAC_2

VCCA_DAC_BG
VSSA_DAC_BG

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

VCCA_LVDS
VSSA_LVDS

VCCA_PEG_BG
VSSA_PEG_BG

VCCA_PEG_PLL

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5

VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
VCCA_SM_10
VCCA_SM_11
VCCA_SM_NCTF_1
VCCA_SM_NCTF_2

VCCA_SM_CK_1
VCCA_SM_CK_2

VCCA_TVA_DAC_1
VCCA_TVA_DAC_2
VCCA_TVB_DAC_1
VCCA_TVB_DAC_2
VCCA_TVC_DAC_1
VCCA_TVC_DAC_2

VCCD_CRT
VCCD_TVDAC

VCCD_QDAC
VCCD_HPLL
VCCD_PEG_PLL
VCCD_LVDS_1

VCCD_LVDS_2

+1.5VS

12

12

4

CRTPLLA PEGA SMTV

POWER

A CK A LVDS

D TV/CRTLVDS

+1.8V

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13

VTT

VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22

VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5

AXD

VCC_AXD_6

VCC_AXD_NCTF

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

AXF

VCC_DMI

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

SM CK

VCC_TX_LVDS

VCC_HV_1
VCC_HV_2

HV

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4

PEG

VCC_PEG_5

VCC_RXR_DMI_1
VCC_RXR_DMI_2

DMI

VTTLF1
VTTLF2
VTTLF3

VTTLF

40 mils

1000P_0402_50V7K

1

C158

UMA@

2

3

+VCCP

330U_D2E_2.5VM_R7

U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1

AT23
AU28
AU24
AT29
AT25
AT30

AR29

B23
B21
A21

AJ50

BK24
BK23
BJ24
BJ23

A43

C40
B40

AD51
W50
W51
V49
V50

AH50
AH51

A7
F2
AH1

+1.8V_TXLVDS

1

220U_D2_4VM_R15

+

2

C14

C156

UMA@

+1.25VS_AXD

0.47U_0603_10V7K

1

2

R74

0_0603_5%

UMA@

C198

C135

1U_0603_10V4Z

1

2

+V1.25VS_AXF

+1.25VS_DMI

+1.8V_SM_CK

+1.8V_TXLVDS

+VCC_PEG

20mils

0.47U_0603_10V7K

C12

1

2

12

1

+

2

1

2

C68

C21

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

4.7U_0805_10V4Z

1

C24

2

0316 add

0.47U_0603_10V7K

C129

C87

1

2

+3VS_HV

C139

0.47U_0603_10V7K

1

2

+1.8V

2.2U_0805_16V4Z

4.7U_0805_10V4Z

1

1

C138

2

2

R34

1 2

10U_0805_10V6K

1

2

2006/08/04 2006/10/06

0_0805_5%

0.1U_0402_16V4Z

+1.25VS

Compal Secret Data

+1.25VS_DPLLB

0.1U_0402_16V4Z

+1.25VS_DMI

+1.25VS_PEGPLL

+1.25VS_DPLLA

+VCC_PEG

1

C199

+

2

0316 add

Deciphered Date

C164

1

2

0.1U_0402_16V4Z

C166

1

2

0.1U_0402_16V4Z
C168

1

2

0.1U_0402_16V4Z

C163

1

2

220U_D2_4VM

C181

2

R433

1 2

10U_0805_10V4Z

10U_FLC-453232-100K_0.25A_10%

1

C534

2

1 2

R73

0_0603_5%

BLM18PG121SN1D_0603

10U_0805_10V4Z

C162

1

2

10U_0805_10V6K

C533

1

2

220U_D2_4VM

1

C179

1

+

2

2

2

+1.25VS

0316 add

+1.25VS

+1.25VS

L4

12

R431

1 2

10U_FLC-453232-100K_0.25A_10%

0316 add

+1.25VS

04/10 stuff

R76

0_0805_5%

10U_0805_10V4Z

R435

@

0_0805_5%

04/10 no stuff

+VCCP

CH751H-40PT_SOD323-2

+3VS

1

+V1.25VS_AXF

10U_0805_10V4Z

+1.8V_SM_CK

22U_0805_6.3V4Z

22U_0805_6.3V4Z

1

C47

2

+1.5VS_TVDAC

C78

+1.25VS_HPLL

C13

0.1U_0402_16V4Z

+VCCP

12

+1.25VS

12

D16

2 1

U22

PM

VGA@

Title

Size Document Number Rev

Custom
Date: Sheet

+1.25VS_MPLL

C11

0.1U_0402_16V4Z

+VCCP_D

R426

10_0402_5%

C64

0_0402_5%

VGA@

C54

0_0402_5%

VGA@

Compal Electronics, Inc.

CRESTLINE(4/6)-PWR

IGT30 LA-3571P

1

2

1

C49

2

1

2

1

2

1

2

12

C58

0_0402_5%

VGA@

C65

0_0402_5%

VGA@

C36

0.022U_0402_16V7K

C79

1

2

1

2

1

2

R428

0_0402_5%

1U_0603_10V4Z

C38

1

2

1 2

0.1U_0402_16V4Z

C43

1

2

1 2

0.1U_0402_16V4Z

R398

MBK2012121YZF_0805

C525
10U_0805_10V4Z

R397

MBK2012121YZF_0805

C524
10U_0805_10V4Z

12

C158

0_0402_5%

VGA@

C96

0_0402_5%

VGA@

1

1 2

R28

0_0805_5%

R41

0_0805_5%

12

12

R24

0_0603_5%

+1.25VS

+1.25VS

+3VS_HV

10 47Monday, December 25, 2006

+1.25VS

+1.8V

+1.5VS

C152

0_0603_5%

VGA@

C117

0_0402_5%

VGA@

of

0.1

5

4

3

2

1

+VCCP

D D

220U_D2_4VM_R15

C211

C C

B B

1

2

0.22U_0402_10V4Z

22U_0805_6.3V4Z

1

+

2

0.22U_0402_10V4Z
C88

1

2

0.22U_0402_10V4Z

C111

C151

1

1

2

0.22U_0402_10V4Z
C122

1

2

2

+VCCP

10U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C53

1

1

2

2

+VCCP

0.1U_0402_16V4Z

C17

C16

1

2

10U_0805_10V4Z

C126

C45

1

1

2

2

0.1U_0402_16V4Z

C86

C52

1

2

U22F

AB33

VCC_NCTF_1

AB36

VCC_NCTF_2

AB37

VCC_NCTF_3

AC33

VCC_NCTF_4

AC35

VCC_NCTF_5

AC36

VCC_NCTF_6

AD35

VCC_NCTF_7

AD36

VCC_NCTF_8

AF33

VCC_NCTF_9

AF36

VCC_NCTF_10

AH33

VCC_NCTF_11

AH35

VCC_NCTF_12

AH36

VCC_NCTF_13

AH37

VCC_NCTF_14

AJ33

VCC_NCTF_15

AJ35

VCC_NCTF_16

AK33

VCC_NCTF_17

AK35

VCC_NCTF_18

AK36

VCC_NCTF_19

AK37

VCC_NCTF_20

AD33

VCC_NCTF_21

AJ36

VCC_NCTF_22

AM35

VCC_NCTF_23

AL33

VCC_NCTF_24

AL35

VCC_NCTF_25

AA33

VCC_NCTF_26

AA35

VCC_NCTF_27

AA36

VCC_NCTF_28

AP35

VCC_NCTF_29

AP36

VCC_NCTF_30

AR35

VCC_NCTF_31

AR36

VCC_NCTF_32

Y32

VCC_NCTF_33

Y33

VCC_NCTF_34

Y35

VCC_NCTF_35

Y36

VCC_NCTF_36

Y37

VCC_NCTF_37

T30

VCC_NCTF_38

T34

VCC_NCTF_39

T35

VCC_NCTF_40

U29

VCC_NCTF_41

U31

VCC_NCTF_42

U32

VCC_NCTF_43

U33

VCC_NCTF_44

U35

VCC_NCTF_45

U36

VCC_NCTF_46

V32

VCC_NCTF_47

V33

VCC_NCTF_48

V36

VCC_NCTF_49

V37

VCC_NCTF_50

AL24

VCC_AXM_NCTF_1

AL26

VCC_AXM_NCTF_2

AL28

VCC_AXM_NCTF_3

AM26

VCC_AXM_NCTF_4

AM28

VCC_AXM_NCTF_5

AM29

VCC_AXM_NCTF_6

AM31

VCC_AXM_NCTF_7

AM32

VCC_AXM_NCTF_8

AM33

VCC_AXM_NCTF_9

AP29

VCC_AXM_NCTF_10

AP31

VCC_AXM_NCTF_11

AP32

VCC_AXM_NCTF_12

AP33

VCC_AXM_NCTF_13

AL29

VCC_AXM_NCTF_14

AL31

VCC_AXM_NCTF_15

AL32

VCC_AXM_NCTF_16

AR31

VCC_AXM_NCTF_17

AR32

VCC_AXM_NCTF_18

AR33

VCC_AXM_NCTF_19

CRESTLINE_1p0

VCC NCTF

POWER

VCC AXM NCTF

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8

VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15

VSS NCTF

VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21

VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6

VSS SCBVCC AXM

VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7

T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28

A3
B2
C1
BL1
BL51
A51

AT33
AT31
AK29
AK24
AK23
AJ26
AJ23

+VCCP

C48

1U_0603_10V4Z

330U_D2E_2.5VM_R7

+1.8V

C125

1

1

+

C9

2

2

330U_D2E_2.5VM_R7

22U_0805_6.3V4Z

1

+

2

10U_0805_10V4Z

1

C26

C27

2

10U_0805_10V4Z

C114

1

2

1

2

0.01U_0402_16V7K

22U_0805_6.3V4Z

C143

1

2

+VCCGFX

0.1U_0402_16V4Z

C51

R53

1 2

0_0603_5%

C99

2

1

1

2

AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32

AU32
AU33
AU35

AV33
AW33
AW35

AY35

BA32

BA33

BA35

BB33

BC32

BC33

BC35

BD32

BD35

BE32

BE33

BE35

BF33

BF34

BG32
BG33
BG35

BH32

BH34

BH35

BJ32

BJ33

BJ34

BK32

BK33

BK34

BK35

BL33

AU30

W13
W14

AA20

AA23

AA26

AA28

AB21

AB24

AB29

AC20

AC21

AC23

AC24

AC26

AC28

AC29

AD20

AD23

AD24

AD28

AF21

AF26

AA31

AH20

AH21

AH23

AH24

AH26

AD31

AJ20

AN14

R30

R20

T14

Y12

U22G

VCC_1
VCC_2
VCC_3
VCC_5
VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

VCC_13

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34

VCC CORE

POWER

VCC SMVCC GFX

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8

VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54

VCC GFX NCTF

VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC SM LF

T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31

AW45
BC39
BE39
BD17
BD4
AW8
AT6

+VCCGFX

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

Check : power

0.1U_0402_16V4Z
C37

1

2

0.22U_0402_10V4Z

C19 0.1U_0402_16V4Z

C22 0.1U_0402_16V4Z

1

1

2

2

1

2

C18 0.22U_0603_10V7K

4.7U_0603_6.3V6K

C33

1

2

C35 0.22U_0603_10V7K

1

1

2

2

1

C39

2

C133 0.47U_0402_6.3V6K

C159 1U_0603_10V4Z

C145 1U_0603_10V4Z

1

1

2

2

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

CRESTLINE_1p0

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

CRESTLINE((5/6)-PWR/GND

IGT30 LA-3571P

1

of

11 47Monday, December 25, 2006

0.1

5

U22I

A13

VSS_1

A15

VSS_2

A17

VSS_3

A24

VSS_4

AA21

VSS_5

AA24

VSS_6

AA29

VSS_7

AB20

D D

C C

B B

A A

AB23
AB26
AB28
AB31
AC10
AC13

AC39
AC43
AC47

AD21
AD26
AD29

AD41
AD45
AD49

AD50
AE10

AE14
AF20

AF23
AF24
AF31

AG38
AG43
AG47
AG50

AH40
AH41

AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45

AJ49
AK20
AK21
AK26
AK28
AK31
AK51

AM11
AM13

AM41
AM45

AN38
AN39
AN43

AP48
AP50
AR11

AR39
AR44
AR47

AT10
AT14
AT41
AT49

AU23
AU29

AU36
AU49
AU51
AV39
AV48

AW1

AW12
AW16

AC3

AD1

AD3

AD5
AD8

AE6

AG2

AH3

AH7
AH9

AM3
AM4

AN1

AN5
AN7
AP4

AR2

AR7

AU1

AU3

AL1

VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

CRESTLINE_1p0

VSS

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198

4

AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41

3

U22J

C46

VSS_199

C50

VSS_200

C7

VSS_201

D13

VSS_202

D24

VSS_203

D3

VSS_204

D32

VSS_205

D39

VSS_206

D45

VSS_207

D49

VSS_208

E10

VSS_209

E16

VSS_210

E24

VSS_211

E28

VSS_212

E32

VSS_213

E47

VSS_214

F19

VSS_215

F36

VSS_216

F4

VSS_217

F40

VSS_218

F50

VSS_219

G1

VSS_220

G13

VSS_221

G16

VSS_222

G19

VSS_223

G24

VSS_224

G28

VSS_225

G29

VSS_226

G33

VSS_227

G42

VSS_228

G45

VSS_229

G48

VSS_230

G8

VSS_231

H24

VSS_232

H28

VSS_233

H4

VSS_234

H45

VSS_235

J11

VSS_236

J16

VSS_237

J2

VSS_238

J24

VSS_239

J28

VSS_240

J33

VSS_241

J35

VSS_242

J39

VSS_243

K12

VSS_245

K47

VSS_246

K8

VSS_247

L1

VSS_248

L17

VSS_249

L20

VSS_250

L24

VSS_251

L28

VSS_252

L3

VSS_253

L33

VSS_254

L49

VSS_255

M28

VSS_256

M42

VSS_257

M46

VSS_258

M49

VSS_259

M5

VSS_260

M50

VSS_261

M9

VSS_262

N11

VSS_263

N14

VSS_264

N17

VSS_265

N29

VSS_266

N32

VSS_267

N36

VSS_268

N39

VSS_269

N44

VSS_270

N49

VSS_271

N7

VSS_272

P19

VSS_273

P2

VSS_274

P23

VSS_275

P3

VSS_276

P50

VSS_277

R49

VSS_278

T39

VSS_279

T43

VSS_280

T47

VSS_281

U41

VSS_282

U45

VSS_283

U50

VSS_284

V2

VSS_285

V3

VSS_286

CRESTLINE_1p0

VSS

VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305

VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313

W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28

AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50

2

1

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

CRESTLINE((6/6)-PWR/GND

IGT30 LA-3571P

1

0.1

of

12 47Monday, December 25, 2006

5

DDR_A_DQS#[0..7]8

DDR_A_D[0..63]8

DDR_A_DM[0..7]8

DDR_A_DQS[0..7]8

DDR_A_MA[0..13]8

D D

Layout Note:
Place near JP41

+1.8V

2.2U_0805_16V4Z

2.2U_0805_16V4Z

C148

C144

1

1

2

2

C C

B B

DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
M_ODT1

DDR_A_BS#0
DDR_A_MA10
DDR_A_MA14

DDR_A_MA1
DDR_A_MA3
DDR_A_MA5

A A

DDR_A_MA8

DDR_A_MA9
DDR_A_MA12
DDR_A_BS#2
DDR_CKE0_DIMMA

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

+0.9VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C127

C119

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

R42

1 2

R46

1 2

R61

1 2

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

5

2.2U_0805_16V4Z

1

2

0.1U_0402_16V4Z

1

2

C112

RP1

56_0402_5%
56_0402_5%
56_0402_5%

RP7

RP11

2.2U_0805_16V4Z

C42

1

2

C85

+0.9VS

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

C153

1

2

0.1U_0402_16V4Z

1

2

C134

RP2

RP6

RP9

2.2U_0805_16V4Z
C41

1

2

0.1U_0402_16V4Z

1

2

C59

DDR_A_RAS#

18

DDR_CS0_DIMMA#

27

M_ODT0

36

DDR_A_MA13

45

DDR_A_BS#1

45

DDR_A_MA0

36

DDR_A_MA2

27

DDR_A_MA4

18

DDR_A_MA6

45

DDR_A_MA7

36

DDR_A_MA11

27

DDR_CKE1_DIMMA

18

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C146

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C93

C71

0.1U_0402_16V4Z

C98

1

2

0.1U_0402_16V4Z

1

2

C115

4

+DDR_MCH_REF114

0.1U_0402_16V4Z
C141

C67

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C132

1

1

2

2

C74

Layout Note:
Place these resistor
closely JP41,all
trace length Max=1.5"

4

1

+

C25
470U_D2_2.5VM_R15

2

0.1U_0402_16V4Z

1

2

C123

C63

Layout Note:
+DDR_MCH_REF
trace width and
spacing is 20/20.

+DDR_MCH_REF1

1

C254

2

0.1U_0402_16V4Z

3

+1.8V

12

R113

100_0402_1%

12

R112

100_0402_1%

EC_TX_P80_DATA14,33

DDR_CKE0_DIMMA7

EC_RX_P80_CLK14,33

DDR_A_BS#28

DDR_A_BS#08

DDR_A_WE#8

DDR_A_CAS#8

DDR_CS1_DIMMA#7

M_ODT17

EC_RX_P80_CLK_R14

EC_RX_P80_CLK EC_RX_P80_CLK_R

1 2

R19 0_0402_5%

CLK_SMBDATA14,15

CLK_SMBCLK14,15

DDR_A_D4
DDR_A_D1

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D14

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D9 DDR_A_D11
DDR_A_D15 DDR_A_D10

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2
DDR_A_MA12

DDR_A_MA9 DDR_A_MA7
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#

DDR_A_CAS#
DDR_CS1_DIMMA#

M_ODT1

DDR_A_D37
DDR_A_D36

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D38 DDR_A_D34
DDR_A_D32

DDR_A_D40
DDR_A_D44

DDR_A_DM5
DDR_A_D41

DDR_A_D46
DDR_A_D49

DDR_A_D48

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D61 DDR_A_D57

DDR_A_D60
DDR_A_DM7
DDR_A_D59

DDR_A_D58
CLK_SMBDATA

CLK_SMBCLK

0.1U_0402_16V4Z

+3VS

C6

+1.8V

1

2

JP3

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_ASOA426-M2RN-7F

ME@

SO-DIMM A

DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

RAS#

VDD
ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

VSS
DQ4
DQ5
VSS

CK0

A11

BA1
S0#

CK1

SA0
SA1

2

NC

NC

Top side

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

2

1

+1.8V

+DDR_MCH_REF1

2

DDR_A_D6

4

DDR_A_D0

6
8

DDR_A_DM0

10
12

DDR_A_D5

14

DDR_A_D7

16
18

DDR_A_D13

20

DDR_A_D12

22
24

DDR_A_DM1

26
28

M_CLK_DDR0

30

M_CLK_DDR#0

32
34
36
38
40

42

DDR_A_D20

44

DDR_A_D21

46
48
50

DDR_A_DM2

52
54

DDR_A_D23

56

DDR_A_D22

58
60

DDR_A_D28DDR_A_D29

62

DDR_A_D25DDR_A_D24

64
66

DDR_A_DQS#3

68

DDR_A_DQS3

70
72

DDR_A_D31

74

DDR_A_D30

76
78

DDR_CKE1_DIMMA

80
82
84

DDR_A_MA14

86
88

DDR_A_MA11

90
92

A7
A6

A4
A2
A0

94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#

M_ODT0
DDR_A_MA13

DDR_A_D33
DDR_A_D39

DDR_A_DM4
DDR_A_D35

DDR_A_D45
DDR_A_D43

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D47
DDR_A_D42

DDR_A_D52
DDR_A_D53

M_CLK_DDR1
M_CLK_DDR#1

DDR_A_DM6
DDR_A_D51DDR_A_D54

DDR_A_D55

DDR_A_D56
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D63

12

R14

R13

10K_0402_5%

10K_0402_5%

12

M_CLK_DDR0 7
M_CLK_DDR#0 7

PM_EXTTS#0 7

DDR_CKE1_DIMMA 7

DDR_A_MA14 7

DDR_A_BS#1 8
DDR_A_RAS# 8
DDR_CS0_DIMMA# 7

M_ODT0 7

M_CLK_DDR1 7
M_CLK_DDR#1 7

Title

Size Document Number Rev

Custom

IGT30 LA-3571P

Date: Sheet

0.1U_0402_16V4Z

2.2U_0805_16V4Z
C253

1

1

2

2

Compal Electronics, Inc.

DDRII-SODIMM SLOT1

C251

+DDR_MCH_REF1 14

1

0.1

of

13 47Monday, December 25, 2006

5

DDR_B_DQS#[0..7]8

DDR_B_D[0..63]8
DDR_B_DM[0..7]8

DDR_B_DQS[0..7]8

DDR_B_MA[0..13]8

D D

C C

B B

A A

Layout Note:
Place near JP42

+1.8V

2.2U_0805_16V4Z

1

2

0.1U_0402_16V4Z

1

2

C131

RP3

56_0402_5%

56_0402_5%
56_0402_5%

RP8

RP13

C149

1

2

C61

18
27
36
45

45
36
27
18

18
27
36
45

2.2U_0805_16V4Z
C157

1

2

0.1U_0402_16V4Z

1

2

C72

+0.9VS

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

RP4

RP5

RP12

2.2U_0805_16V4Z

0.1U_0402_16V4Z

2.2U_0805_16V4Z

2.2U_0805_16V4Z

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

+0.9VS

0.1U_0402_16V4Z

DDR_B_CAS#
DDR_B_WE#

M_ODT3

DDR_B_BS#0
DDR_B_MA10
DDR_B_MA14

DDR_B_MA1
DDR_B_MA3
DDR_B_MA5
DDR_B_MA9

DDR_CKE2_DIMMB
DDR_B_BS#2
DDR_B_MA12

DDR_B_MA8

C44

1

2

1

2

C124

C32

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C136

56_0804_8P4R_5%
R48
R44
R65

56_0804_8P4R_5%

56_0804_8P4R_5%

5

1 2
1 2
1 2

C31

1

2

1

2

C95

0.1U_0402_16V4Z
C121

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C137

DDR_B_MA13
M_ODT2
DDR_CS2_DIMMB#DDR_CS3_DIMMB#
DDR_B_RAS#

DDR_B_BS#1
DDR_B_MA0
DDR_B_MA2
DDR_B_MA4

DDR_B_MA7
DDR_B_MA11
DDR_B_MA6
DDR_CKE3_DIMMB

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C128

1

2

0.1U_0402_16V4Z

1

2

C113

C89

4

0.1U_0402_16V4Z

C147

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C118

C142

Layout Note:
Place these resistor
closely JP42,all
trace length Max=1.5"

4

C57

0.1U_0402_16V4Z

1

+

C81
470U_D2_2.5VM_R15

2

0.1U_0402_16V4Z

1

1

2

2

C62

C69

3

+1.8V

JP4

1

VREF

3

DDR_B_D0
DDR_B_D1

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D17
DDR_B_D20

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D25
DDR_B_D28

EC_TX_P80_DATA13,33

DDR_CKE2_DIMMB7

EC_RX_P80_CLK13,33

DDR_B_BS#28

DDR_B_BS#08

DDR_B_WE#8

DDR_B_CAS#8

DDR_CS3_DIMMB#7

M_ODT37

EC_RX_P80_CLK_R13

CLK_SMBDATA13,15

CLK_SMBCLK13,15

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DDR_B_DM3

DDR_B_D30
DDR_B_D31

DDR_CKE2_DIMMB

DDR_B_BS#2
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#

DDR_B_CAS#
DDR_CS3_DIMMB#

M_ODT3
DDR_B_D32

DDR_B_D33
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D34

DDR_B_D35
DDR_B_D40

DDR_B_D41
DDR_B_DM5
DDR_B_D42

DDR_B_D43
DDR_B_D48

DDR_B_D49
EC_RX_P80_CLK_R
DDR_B_DQS#6

DDR_B_DQS6

DDR_B_D50
DDR_B_D56

DDR_B_D61
DDR_B_DM7
DDR_B_D58

DDR_B_D59
CLK_SMBDATA

CLK_SMBCLK

+3VS

1

C7

0.1U_0402_16V4Z

2006/08/04 2006/10/06

2

Compal Secret Data

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_AS0A426-MARG-7F

SO-DIMM B

Deciphered Date

VSS
DQ4
DQ5

VSS
DM0

VSS
DQ6
DQ7

VSS

DQ12
DQ13

VSS
DM1

VSS

CK0

CK0#

VSS

DQ14
DQ15

VSS

VSS

DQ20
DQ21

VSS
DM2

VSS

DQ22
DQ23

VSS

DQ28
DQ29

VSS

DQS3#

DQS3

VSS

DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

BA1

RAS#

VDD

ODT0

NC/A13

VDD

VSS

DQ36
DQ37

VSS
DM4

VSS

DQ38
DQ39

VSS

DQ44
DQ45

VSS

DQS5#

DQS5

VSS

DQ46
DQ47

VSS

DQ52
DQ53

VSS

CK1

CK1#

VSS
DM6

VSS

DQ54
DQ55

VSS

DQ60
DQ61

VSS

DQS7#

DQS7

VSS

DQ62
DQ63

VSS
SAO

SA1

2

+1.8V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

2

+DDR_MCH_REF1

DDR_B_D4
DDR_B_D5

DDR_B_DM0
DDR_B_D6

DDR_B_D7
DDR_B_D12

DDR_B_D13
DDR_B_DM1
M_CLK_DDR3

M_CLK_DDR#3
DDR_B_D14

DDR_B_D15

DDR_B_D21
DDR_B_D16

DDR_B_DM2
DDR_B_D22

DDR_B_D23
DDR_B_D26

DDR_B_D24
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D29

DDR_B_D27
DDR_CKE3_DIMMB

DDR_B_MA14
DDR_B_MA11

DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_BS#1
DDR_B_RAS#
DDR_CS2_DIMMB#

M_ODT2
DDR_B_MA13

DDR_B_D36
DDR_B_D37

DDR_B_DM4
DDR_B_D39

DDR_B_D38
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D46

DDR_B_D47
DDR_B_D52

DDR_B_D53
M_CLK_DDR2

M_CLK_DDR#2
DDR_B_DM6
DDR_B_D54DDR_B_D51

DDR_B_D55
DDR_B_D60

DDR_B_D57
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_D62

DDR_B_D63

10K_0402_5%

12

R396

1

+DDR_MCH_REF1 13

0.1U_0402_16V4Z

2.2U_0805_16V4Z

M_CLK_DDR3 7
M_CLK_DDR#3 7

PM_EXTTS#1 7

DDR_CKE3_DIMMB 7

DDR_B_MA14 7

DDR_B_BS#1 8
DDR_B_RAS# 8
DDR_CS2_DIMMB# 7

M_ODT2 7

M_CLK_DDR2 7
M_CLK_DDR#2 7

R395

1 2

10K_0402_5%

Title

Size Document Number Rev

Date: Sheet of

1

1

C249

C255

2

2

+3VS

Compal Electronics, Inc.

DDRII-SODIMM SLOT2

IGT30 LA-3571P

1

14 47Monday, December 25, 2006

0.1

5

PCI

SRC

CPU

CLKSEL1

1

1

FSLA

CLKSEL0

MHz

200

166

MHz

1000

100

MHz

33.30

33.3

FSLC1FSLB

CLKSEL2

0

FSB Frequency Selet:

D D

CPU Driven

(Default)

*

Stuff

No Stuff

Stuff

667MHz

No Stuff

Stuff

800MHz

CPU_BSEL05

C C

CPU_BSEL15

B B

CPU_BSEL25

C348 27P_0402_50V8J

A A

14.31818MHZ_16PF_DSX840GA

C347 27P_0402_50V8J

FSC

No Stuff

2.2K_0402_5%

FSA

0_0402_5%

0_0402_5%@

2.2K_0402_5%

0_0402_5%@

R467

1 2

R471

1 2

R482

R478

1 2

R479

Routing the t race at least 10mil

R919 R940 R956

R914 R921 R930 R943 R954R949

R959 R930 R914

R919 R940 R956

R943R949

R959 R930 R921

R919 R940 R956

R943R949 R914

+VCCP

R472

@

56_0402_5%

1 2

1 2

12

R468

Y1

+VCCP

+VCCP

12

12

5

1K_0402_5%

12

R469
1K_0402_5%@

R484
1K_0402_5%

1 2

1 2

R485

1K_0402_5%

12

R481
0_0402_5%@

R473
1K_0402_5%@

1 2

1 2

R476

1K_0402_5%

12

R475
0_0402_5%

CLK_XTAL_IN

CLK_XTAL_OUT

FSB

R921

MCH_CLKSEL0 7

CLKSATAREQ#21

CLKREQ_3GPLL#7

CLK_PCI_139428

CLK_PCI_LPC33

MCH_CLKSEL1 7

MCH_CLKSEL2 7

CLK_PCI_DB32

CLK_PCI_ICH19

CLK_48M_ICH21

CLK_14M_ICH21
CLK_14M_SIO32

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
For 27_SEL, 0 = Enable DOT96 & SRC1,

1= Enable SRC0 & 27MHz

For PCI2_EN, 0 = Overclocking of CPU and SRC Allowed

1 = Overclocking of CPU and SRC NOT allowed

+3VS_CK505 +3VS_CK505 +3VS_CK505

R465
10K_0402_5%

@

1 2

ITP_EN 27_SEL

R462
10K_0402_5%

1 2

+3VS

R149 0_1206_5%

R464
10K_0402_5%

VGA@

1 2

R461
10K_0402_5%

UMA@

1 2

4

1 2

+1.25VS

4

+3VS_CK505

1

C329
10U_0805_10V4Z

2

1 2

R125 0_1206_5%

+1.25VS_CK505

1 2
1 2
1 2
1 2
1 2
1 2

1 2

1 2
1 2

R458
10K_0402_5%

1 2

PCI2_TME

R459
10K_0402_5%

@

1 2

+1.25VS_CK505

+3VS_CK505

R124475_0402_1%
R121475_0402_1%
R12333_0402_5%
R12233_0402_5%
R13933_0402_5%
R13833_0402_5%

CLK_XTAL_IN
CLK_XTAL_OUT

R13733_0402_5%

R16822_0402_5%
R16922_0402_5%

+1.25VS_CK505

3

1

C331

0.1U_0402_16V4Z

2

1

C319
10U_0805_10V4Z

2

PCI_CLK1
PCI2_TME
PCI_CLK3
27_SEL
ITP_EN

FSA

FSB

FSC

1

C335

0.1U_0402_16V4Z

2

1

C332

0.1U_0402_16V4Z

2

U3

2

VDD_PCI

9

VDD48

16

VDDPLL3

61

VDDREF

39

VDDSRC

55

VDDCPU

12

VDD96_IO

20

VDDPLL3_IO

26

VDDSRC_IO

36

VDDSRC_IO

49

VDDCPU_IO

1

PCI0/CR#_A

3

PCI1/CR#_B

4

PCI2/TME

5

PCI3

6

PCI4/27_Select

7

PCIF5/ITP_EN

60

X1

59

X2

10

USB_48MHZ/FSLA

57

FSLB/TEST MODE

62

REF0/FSLC/TEST_SEL

45

VDDSRC_IO

42

GNDSRC

8

GNDPCI

11

GND48

15

GND

19

GND

52

GNDCPU

23

GNDSRC

29

GNDSRC

58

GNDREF

* Internal Pull-Up Resistor
** Internal Pull-Down Resistor

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

SRC1/SE1/27MHz_NonSS

3

C333

0.1U_0402_16V4Z

1

C341

0.1U_0402_16V4Z

2

SRC1#/SE2/27MHz_SS

CK_PWRGD/PD#

SLG8SP510_TSSOP64

2006/08/04 2006/10/06

1

C342

0.1U_0402_16V4Z

2

1

C326
10U_0805_10V4Z

2

48

NC

64

SCLK

63

SDATA

38

PCI_STOP#

CPU0

CPU0#

CPU1_F

CPU1#_F

SRC8/ITP

SRC8#/ITP#

SRC10#

SRC10

SRC9

SRC9#

SRC6

SRC6#

SRC4

SRC4#

SRC2/SATA

37

54
53

51
50

47
46

35
34

33
32

30
31

44
43

41
40

27
28

24
25

21
22

17
18

13
14

56

CPU_STOP#

SRC11/CR#_H

SRC11#/CR#_G

SRC7/CR#_F

SRC7#/CR#_E

SRC3/CR#_C

SRC3#/CR#_D

SRC2#/SATA#

SRC0/DOT96

SRC0/DOT96#

ICS9LPRS365/ SA00001GT00

Compal Secret Data

1

C344

0.1U_0402_16V4Z

2

1

C334

0.1U_0402_16V4Z

2

CLK_SMBCLK
CLK_SMBDATA

R_CPU_BCLK
R_CPU_BCLK#

R_MCH_BCLK
R_MCH_BCLK#

R_CPU_XDP
R_CPU_XDP#

R_PCIE_NC1#
R_PCIE_NC1

CLKREQ#_H
CLKREQ_MCARD#R

R_CLK_PCIE_MCard
R_CLK_PCIE_MCard#

CLKREQ_LAN#R

R_PCIE_LAN
R_PCIE_LAN#

R_MCH_3GPLL
R_MCH_3GPLL#

R_PCIE_ICH
R_PCIE_ICH#

R_PCIE_SATA
R_PCIE_SATA#

R_SSCDREFCLK
R_SSCDREFCLK#

R_MCH_DREFCLK
R_MCH_DREFCLK#

R132 0_0402_5%VGA@
R131 0_0402_5%VGA@

R134 0_0402_5%VGA@
R133 0_0402_5%VGA@

R487 10K_0402_5%@

Deciphered Date

R179

1 2
1 2

R178
R182

1 2

1 2

R181
R177

1 2

1 2

R176
R173

1 2

1 2

R172

R167

R148

R144

1 2

1 2

R143

R184

R175

1 2

1 2

R174
R127

1 2

1 2

R126
R146

1 2

1 2

R145
R129

1 2

1 2

R128

R142 0_0402_5%UMA@

1 2

R141 0_0402_5%UMA@

1 2

1 2

1 2

R136

1 2

1 2

R135

1 2

1 2

2

1

C343

0.1U_0402_16V4Z

2

1

C339

0.1U_0402_16V4Z

2

0_0402_5%
0_0402_5%

0_0402_5%
0_0402_5%

0_0402_5%
0_0402_5%

0_0402_5%
0_0402_5%

R166 10K_0402_5%

475_0402_1%

12

475_0402_1%

12

R147 10K_0402_5%

0_0402_5%
0_0402_5%

R185 10K_0402_5%@

475_0402_1%

12

R515 10K_0402_5%

0_0402_5%
0_0402_5%

0_0402_5%
0_0402_5%

0_0402_5%
0_0402_5%

0_0402_5%
0_0402_5%

0_0402_5%UMA@
0_0402_5%UMA@

12

2

1 2

1 2

1 2

1 2

+3VS_CK505

1

+3VS

ICH_SMBDATA21,26,27

+3VS

ICH_SMBCLK21,26,27

CLK_SMBCLK 13,14
CLK_SMBDATA 13,14

H_STP_PCI# 21
H_STP_CPU# 21

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

CLK_MCH_BCLK 7
CLK_MCH_BCLK# 7

CLK_PCIE_MCARD1 27
CLK_PCIE_MCARD1# 27

CLK_PCIE_NC1# 26
CLK_PCIE_NC1 26

+3VS

CLKREQ_NC1# 26
CLKREQ_MCARD# 27

+3VS

CLK_PCIE_MCARD 27
CLK_PCIE_MCARD# 27

+3VS

CLKREQ_LAN# 24

CLK_PCIE_LAN 24
CLK_PCIE_LAN# 24

CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7

CLK_PCIE_ICH 21
CLK_PCIE_ICH# 21

CLK_PCIE_SATA 20
CLK_PCIE_SATA# 20

MCH_SSCDREFCLK 7
MCH_SSCDREFCLK# 7
CLK_27M_VGA 18
CLK_27M_VGA# 18

CLK_MCH_DREFCLK 7
CLK_MCH_DREFCLK# 7

CLK_PCIE_VGA 18
CLK_PCIE_VGA# 18

CK_PWRGD 21

2.2K_0402_5%
Q12
2N7002_SOT23

D

S

1 3

G

2
2

G

1 3

D

S

2N7002_SOT23

Q9

C316
C345
C317
C346
C299
C311
C318

R165

12
12
12
12
12
12
12

R152

2.2K_0402_5%

CLK_SMBDATA

CLK_SMBCLK

CLK_48M_ICH

5P_0402_50V8C@

CLK_14M_ICH

4.7P_0402_50V8C@

CLK_PCI_ICH

4.7P_0402_50V8C@

CLK_14M_SIO

4.7P_0402_50V8C@

CLK_PCI_1394

4.7P_0402_50V8C@

CLK_PCI_LPC

4.7P_0402_50V8C@

CLK_PCI_DB

4.7P_0402_50V8C@

Place close to U41

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Clock generator

IGT30 LA-3571P

15 47Monday, December 25, 2006

1

0.1

of

A

B

C

D

E

F

G

H

1 1

+LCDVDD

12

R446

100_0402_1%

UMA@

2N7002_SOT23

Q27

UMA@

R437

GMCH_LVDDEN9

2 2

INVT_PWM33
DAC_BRIG33

0.1U_0603_50V4Z

68P_0402_50V8K

INVPWR_B+

C526

12

12

C527

DISPOFF#

JP40

1
2
3
4
5
6
7

MOLEX_53780-0790

ENBKL33

GMCH_ENBKL9

G7X_ENBKL18

L14 0_0805_5%

INVPWR_B+B+

1 2

L13 0_0805_5%@

1 2

3 3

12

0_0402_5%UMA@

R434
100K_0402_5%

UMA@

1 2

BKOFF#33

R117

12

0_0402_5%UMA@

R118

12

0_0402_5%VGA@

+LCDVDD_R

13

D

S

2

+5VALW

2

G

R669

2.2K_0402_5%

VGA@

R452
100K_0402_5%

UMA@

1 2

UMA@

1 2

R849 10K_0402_5%

13

Q28
DTC124EK_SC59

UMA@

0.1U_0402_16V4Z

D2
CH751H-40_SC76

D3
CH751H-40_SC76@

R119
100K_0402_5%

UMA@

1 2

+LCDVDD

C212

UMA@

1

C215

0.047U_0402_16V4Z

UMA@

2

+3VS

1 2

21

21

R886

0_0805_5%

1 2

1

1

C213

4.7U_0805_10V4Z

UMA@

2

2

R116

4.7K_0402_5%

DISPOFF#

Q3

D

1 3

2

S

AO3413_SOT23

UMA@

G

+3VS

1

C232

4.7U_0805_10V4Z

UMA@

2

4 4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2006/08/04 2006/10/06

E

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

F

Date: Sheet

Compal Electronics, Inc.

LVDS Connector

IGT30 LA-3571P

G

0.1

of

16 47Monday, December 25, 2006

H

A

B

C

D

E

TV-OUT Conn.

CARD_LUMA18

CARD_CRMA18

CARD_COMP18

1 1

TV_LUMA9
TV_CRMA9

TV_COMPS9

Pop when with internal graphics

CARD_VGA_R18

CARD_VGA_G18

CARD_VGA_B18

CRT_R9

2 2

CRT_G9

CRT_B9

VGA@

R82 0_0402_5%

VGA@

R83 0_0402_5%

VGA@

R84 0_0402_5%

UMA@

R447 0_0402_5%

UMA@

R451 0_0402_5%

UMA@

R453 0_0402_5%

R88 0_0402_5%VGA@

R86 0_0402_5%VGA@

R98 0_0402_5%@

R455 0_0402_5%UMA@
R454 0_0402_5%UMA@
R456 0_0402_5%@

12

12

12

12

12

12

12

12

12

12

12

12
12
12

R

G

B

12

R3

R2

150_0402_1%

12

R4

150_0402_1%

150_0402_1%

R6

150_0402_1%

12

R5

R7

150_0402_1%

12

@

150_0402_1%

C3

@

1

1

C849

C848

82P_0402_50V8J

1

C1

2

@

22P_0402_50V8J

C850

2

2

82P_0402_50V8J

1

1

C2

2

2

@

22P_0402_50V8J

22P_0402_50V8J

Pop when with internal graphics

+3VS+3VS

12

R12

2.2K_0402_5%

G

2

VGA@

CARD_DDCDATA18

CARD_DDCCLK18

3 3

3VDDCDA9

3VDDCCL9

CARD_HSYNC18

CARD_VSYNC18

CRT_HSYNC9

CRT_VSYNC9

R77 0_0402_5%
R79 0_0402_5%VGA@

R441 0_0402_5%

R444 0_0402_5%

12
12

UMA@

1 2

UMA@

1 2

VGA@

12

R78 0_0402_5%

VGA@

12

R81 0_0402_5%

UMA@

1 2

R439 39_0402_5%

UMA@

1 2

R443 39_0402_5%

DDCDA

DDCCL

HSYNC

VSYNC

Pop when with internal graphics

4 4

D

S

+CRT_VCC

1

0.1U_0402_16V4Z
C4

2

+CRT_VCC

1

C5

2

0.1U_0402_16V4Z

13

R8

2.2K_0402_5%

Q2
2N7002_SOT23

12

G

2

S

1

5

U1

P

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

3

5

1

U2

P

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

3

1 2

FLM1608081R8K_0603

1 2

FLM1608081R8K_0603

1 2

FLM1608081R8K_0603

1

@

2

82P_0402_50V8J

Q1

2N7002_SOT23

13

D

4

4

L52

L53

L54

L55

BK1608LL121-T 0603

1 2

L56

BK1608LL121-T 0603

1 2

L57

BK1608LL121-T 0603

1 2

12

R1
1K_0402_5%

@

1

C845

2

82P_0402_50V8J

1

C851

2

+CRT_VCC+ C RT_VCC

R851

R850

L58 CHB1608B121_0603

L59 CHB1608B121_0603

1 2

2.2K_0402_5%

1 2

1 2

1 2

2.2K_0402_5%

1

C846

C847

2

82P_0402_50V8J

82P_0402_50V8J

1

C852

C853

2

22P_0402_50V8J

22P_0402_50V8J

VGA_DDC_DAT

VGA_DDC_CLK

+CRT_VCC+ C RT_VCC

12

R852

1K_0402_5%

1

2

1

2

@

22P_0402_50V8J

R853

1K_0402_5%

CRT Conn.

12

LUMA

CRMA

COMP

RED

GREEN

BLUE

JVGA_HS

JVGA_VS

+5VS +CRT _VCC

D31

21

RB751V_SOD323

VGA I/O PORT Connector

S-VIDEO

JP71

1

1

CRMA
LUMA
COMP

+CRT_VCC

RED
GREEN

BLUE
JVGA_VS
JVGA_HS
VGA_DDC_DAT

VGA_DDC_CLK

MSEMS#

1

C800

0.01U_0402_25V4Z

2

PIN4

1

2

PIN ASSIGMENT

D-SUB SVIDEO

1

9

2
3
4
5
6
7
8
9
10
11
12
13
14

6

2

7

3

8

14
10
13
11
12
15

4

FUNCTION FUNCTION
+CRT_VCC

RED
GND

GREEN

GND

BLUE

GND

VSYNC

GND
HSYNC
SENSE

SM_DAT
SM_CLK

PIN4

2

2

3

3

4

4

5

5

6

6

MOLEX_53780-0670

ME@

DSUB

JP72

1

1

2

2

3

3

4

4

5

5

6

6

7

7

15

8

8

16

9

9

10

10

11

11

12

12

13

13

14

14

ACES_87213-1400

C801

ME@

0.1U_0402_16V4Z

PINPIN
1
2
3
4
5
6

G1

G2

7

8

15
16

1
4
2
3
5
6

NC

CRMA1

GND

LUMA

GND

CVBS

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

D

Date: Sheet

Compal Electronics, Inc.

CRT & TVout Connector

IGT30 LA-3571P

E

0.1

of

17 47Monday, December 25, 2006

5

4

3

2

1

D D

MAX. 4.06A @ 1.8V
MAX. 130mA @ 2.5V
MAX. 655mA @ 3.3V

PEG_M_TXP[0..15]
PEG_M_TXN[0..15]

JP7

1

PEG_M_TXP1
PEG_M_TXN1

PEG_M_TXP3
PEG_M_TXN3

PEG_M_TXP5
PEG_M_TXN5

PEG_M_TXP7

C C

B B

PEG_M_TXN7
PEG_M_TXP9

PEG_M_TXN9
PEG_M_TXP11

PEG_M_TXN11
PEG_M_TXP13

PEG_M_TXN13
PEG_M_TXP15

PEG_M_TXN15

+2.5VS

+3VS +5VS

+1.5VS

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

ACES_88363-08001

41

41

42

42

43

43

44

44

45

45

46

46

47

47

48

48

49

49

50

50

51

51

52

52

53

53

54

54

55

55

56

56

57

57

58

58

59

59

60

60

61

61

62

62

63

63

64

64

65

65

66

66

67

67

68

68

69

69

70

70

71

71

72

72

73

73

74

74

75

75

76

76

77

77

78

78

79

79

80

80

PEG_RXP1

PEG_RXN1

PEG_RXP3

PEG_RXN3

PEG_RXP5
PEG_RXN5

PEG_RXP7
PEG_RXN7

PEG_RXP9
PEG_RXN9

PEG_RXP11
PEG_RXN11

PEG_RXP13
PEG_RXN13

PEG_RXP15
PEG_RXN15

+1.8VS

B+

CARD_DDCCLK17
CARD_DDCDATA17

CLK_PCIE_VGA15

CLK_PCIE_VGA#15

CARD_VSYNC17
CARD_HSYNC17

CARD_VGA_R17
CARD_VGA_G17

CARD_VGA_B17

PEG_M_TXP0
PEG_M_TXN0

PEG_M_TXP2
PEG_M_TXN2

PEG_M_TXP4
PEG_M_TXN4

PEG_M_TXP6
PEG_M_TXN6

PEG_M_TXP8
PEG_M_TXN8

PEG_M_TXP10
PEG_M_TXN10

PEG_M_TXP12
PEG_M_TXN12

PEG_M_TXP14
PEG_M_TXN14

JP8

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

ACES_88363-08001

41

41

42

42

43

43

44

44

45

45

46

46

47

47

48

48

49

49

50

50

51

51

52

52

53

53

54

54

55

55

56

56

57

57

58

58

59

59

60

60

61

61

62

62

63

63

64

64

65

65

66

66

67

67

68

68

69

69

70

70

71

71

72

72

73

73

74

74

75

75

76

76

77

77

78

78

79

79

80

80

PEG_RXP0

PEG_RXN0

PEG_RXP2

PEG_RXN2

PEG_RXP4

PEG_RXN4

PEG_RXP6

PEG_RXN6

PEG_RXP8

PEG_RXN8

PEG_RXP10
PEG_RXN10

PEG_RXP12
PEG_RXN12

PEG_RXP14
PEG_RXN14

SUSP#

G7X_THER_ALERT#

SUSP# 23,26,28,29,33,35,42,43,44
VGA_THER_ALERT# 21

G7X_ENBKL 16

PLT_RST# 7,19,21,23,24,26,27
CLK_27M_VGA 15
CLK_27M_VGA# 15

CARD_COMP 17
CARD_LUMA 17
CARD_CRMA 17

PEG_RXP[0..15]
PEG_RXN[0..15]

2

1

VGA@

PEG_M_TXP[0..15] 9
PEG_M_TXN[0..15] 9

PEG_RXP[0:15] 9
PEG_RXN[0:15] 9

2

C252

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

VGA@

+3VS

1

C227

2

0.047U_0402_16V4Z

VGA@

VGA@

+2.5VS+5VS

2

2

C228

C248

1

VGA@

1

C226

2

0.047U_0402_16V4Z

C216

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

VGA@

A A

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number R ev
Custom

Date: Sheet

Compal Electronics, Inc.

VGA/B connector

IGT30 LA-3571P

1

0.1

of

18 47Monday, December 25, 2006

5

+3VS

PCI_GNT3#

PCI_DEVSEL#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

PCI_PLOCK#
PCI_IRDY#
PCI_SERR#
PCI_PERR#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#

12

R234

@

1K_0402_5%

PCI_AD[0..31]28

1 2

R253 8.2K_0402_5%

1 2
1 2
1 2

1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2

D D

C C

B B

R254 8.2K_0402_5%
R219 8.2K_0402_5%
R585 8.2K_0402_5%

R536 8.2K_0402_5%
R216 8.2K_0402_5%
R233 8.2K_0402_5%
R539 8.2K_0402_5%

+3VS

R226 8.2K_0402_5%
R532 8.2K_0402_5%
R199 8.2K_0402_5%
R544 8.2K_0402_5%
R217 8.2K_0402_5%
R235 8.2K_0402_5%
R244 8.2K_0402_5%
R524 8.2K_0402_5%

R528 8.2K_0402_5%
R272 8.2K_0402_5%
R592 8.2K_0402_5%
R549 8.2K_0402_5%

A16 swap override Strap

Low= A16 swap override Enble

PCI_GNT3#

A A

High= Default

Place closely pin B10

CLK_PCI_ICH

R225

10_0402_5%@

1 2
1

C383

8.2P_0402_50V@

2

*

4

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

Boot BIOS Strap

PCI_GNT0# SPI_CS#1

0

1

1

12

R214

1K_0402_5%@

1

0

1

U28B

D20

AD0

E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15

B6

C11

A9
D11
B12
C12
D10

C7
F13
E11
E13
E12

D8

A6
E8

D6

A3

F9
B5

C5
A10

PCI

AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

Interrupt I/F

PIRQA#
PIRQB#
PIRQC#
PIRQD#

ICH8M REV 1.0

REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

PIRQE#/GPIO2

PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

Boot BIOS Location

SPI

PCI

LPC

*

SB_SPI_CS#121

SB_SPI_CS#1PCI_GNT0#

REQ0#
GNT0#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#
STOP#
TRDY#

FRAME#

PLTRST#

PCICLK

PME#

3

PCI_REQ0#

A4

PCI_GNT0#

D7

PCI_REQ1#

E18

PCI_GNT1#

C18

PCI_REQ2#

B19

PCI_GNT2#

F18

PCI_REQ3#

A11

PCI_GNT3#

C10

PCI_CBE#0

C17

PCI_CBE#1

E15

PCI_CBE#2

F16

PCI_CBE#3

E17

PCI_IRDY#

C8

PCI_PAR

D9

PCI_PCIRST#

G6

PCI_DEVSEL#

D16

PCI_PERR#

A7

PCI_PLOCK#

B7

PCI_SERR#

F10

PCI_STOP#

C16

PCI_TRDY#

C9

PCI_FRAME#

A17

PCI_PLTRST#

AG24

CLK_PCI_ICH

B10

PCI_PME#

G7

R195 8.2K_0402_5%

PCI_PIRQE#

F8

PCI_PIRQF#

G11

PCI_PIRQG#

F12

PCI_PIRQH#

B3

12

R286

1K_0402_5%@

@

1 2

PCI_REQ0# 28
PCI_GNT0# 28

PCI_CBE#0 28
PCI_CBE#1 28
PCI_CBE#2 28
PCI_CBE#3 24,28

PCI_IRDY# 28
PCI_PAR 28

PCI_DEVSEL# 28
PCI_PERR# 28

PCI_SERR# 28
PCI_STOP# 28
PCI_TRDY# 28
PCI_FRAME# 28

CLK_PCI_ICH 15
PCI_PME# 33

+3VALW

PCI_PIRQG# 28
PCI_PIRQH# 28

PCI_PCIRST#

PCI_PLTRST#

2

R189
0_0402_5%

R289
0_0402_5%

1

+3V_SB

5

U5

1

P

B

2

A

G

3

12

+3V_SB

5

1

P

B

2

A

G

3

12

PCI_RST#

4

Y

TC7SH08FU_SSOP5@

U11

PLT_RST#

4

Y

TC7SH08FU_SSOP5@

12

12

PCI_RST# 28,32,33

R188
100K_0402_5%

PLT_RST# 7,18,21,23,24,26,27

R283
100K_0402_5%

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

ICH8(1/4)-PCI/INT

IGT30 LA-3571P

19 47Monday, December 25, 2006

1

0.1

of

5

4

3

2

1

ICH8M Internal VR Enable Strap
(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)

LAN100_SLP

ICH_INTVRMEN

+RTCVCC

D D

R287 330K_0402_1%

1 2

R295 1M_0402_5%

1 2

R319 330K_0402_1%

1 2

C C

B B

Low = Internal VR Disabled
High = Internal VR Enabled(Default)

LAN100_SLP

SM_INTRUDER#

ICH_INTVRMEN

C659 15P_0402_50V8J

32.768KHZ_12.5P_1TJS125BJ2A251

C651 15P_0402_50V8J

+RTCVCC

+3VS

PSATA_ITX_DRX_N023

PSATA_ITX_DRX_P023

1 2

R576 20K_0402_5%

1U_0603_10V4Z

HDA_BITCLK_MDC27
HDA_SYNC_MDC27

HDA_RST_MDC#27

HDA_SDIN029
HDA_SDIN127

HDA_SDOUT_MDC27

Y3

2

NC

3

NC

2

C623

1

SATA_LED#

R22710K_0402_5%

12

PSATA_ITX_DRX_N0

PSATA_ITX_DRX_P0

ICH_RTCX1

1

IN

4

OUT

ICH_RTCX2

21

CLRP1
2MM

R616 24.9_0402_1%

PSATA_IRX_DTX_N0_C23
PSATA_IRX_DTX_P0_C23

1 2

1 2

1 2
1 2

1 2

1 2

1 2

SATA_LED#36

PSATA_ITX_DRX_N0_C

PSATA_ITX_DRX_P0_C

CLK_PCIE_SATA#15
CLK_PCIE_SATA15

+1.5VS

R565 33_0402_5%
R556 33_0402_5%

R552 33_0402_5%

R547 33_0402_5%

C582 3900P_0402_50V7K

C584 3900P_0402_50V7K

KILL_MDC#27
IDERST_CD#23

12

R614
10M_0402_5%

ICH_RTCRST#

ICH_INTVRMEN
LAN100_SLP

GLAN_COMP

HDA_BITCLK_R
HDA_SYNC_R

HDA_RST_R#

ICH_AC_SDIN0
ICH_AC_SDIN1

HDA_SDOUT_R

KILL_MDC#
IDERST_CD#

SATA_LED#

PSATA_IRX_DTX_N0_C
PSATA_IRX_DTX_P0_C
PSATA_ITX_DRX_N0_C
PSATA_ITX_DRX_P0_C

CLK_PCIE_SATA#
CLK_PCIE_SATA

R517

1 2

24.9_0402_1%

Within 500 mils

U28A

AG25

RTCX1

AF24

RTCX2

AF23

RTCRST#

AD22

INTRUDER#

AF25

INTVRMEN

AD21

LAN100_SLP

B24

GLAN_CLK

D22

LAN_RSTSYNC

C21

LAN_RXD0

B21

LAN_RXD1

C22

LAN_RXD2

D21

LAN_TXD0

E20

LAN_TXD1

C20

LAN_TXD2

AH21

GLAN_DOCK#/GPIO13

D25

GLAN_COMPI

C25

GLAN_COMPO

AJ16

HDA_BIT_CLK

AJ15

HDA_SYNC

AE14

HDA_RST#

AJ17

HDA_SDIN0

AH17

HDA_SDIN1

AH15

HDA_SDIN2

AD13

HDA_SDIN3

AE13

HDA_SDOUT

AE10

HDA_DOCK_EN#/GPIO33

AG14

HDA_DOCK_RST#/GPIO34

AF10

SATALED#

AF6

SATA0RXN

AF5

SATA0RXP

AH5

SATA0TXN

AH6

SATA0TXP

AG3

SATA1RXN

AG4

SATA1RXP

AJ4

SATA1TXN

AJ3

SATA1TXP

AF2

SATA2RXN

AF1

SATA2RXP

AE4

SATA2TXN

AE3

SATA2TXP

AB7

SATA_CLKN

AC6

SATA_CLKP

AG1

SATARBIAS#

AG2

SATARBIAS

ICH8M REV 1.0

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

RTCLAN / GLAN

LPCCPU

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD/GPIO49

IGNNE#

RCIN#

STPCLK#

THRMTRIP#

IHDA

DD10
DD11
DD12
DD13
DD14
DD15

IDE

SATA

DCS1#
DCS3#

DIOR#

DIOW#

DDACK#

IDEIRQ

IORDY

DDREQ

INIT#

INTR

SMI#

NMI

TP8
DD0

DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9

DA0
DA1
DA2

E5
F5
G8
F6

C4
G9

E6
AF13

AG26
AF26

AE26
AD24
AG29
AF27
AE24

AC20
AH14

AD23
AG28

AA24
AE27
AA23
V1

U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6

AA4
AA1
AB3

Y6
Y5

W4
W3
Y2
Y3
Y1
W5

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#
LPC_DRQ0#

GATEA20
H_A20M#

H_FERR#
H_PWRGOOD
H_IGNNE#
H_INIT#

H_INTR
KB_RST#

H_NMI
H_SMI#

H_STPCLK#
THRMTRIP_ICH#

PD_D0
PD_D1
PD_D2
PD_D3
PD_D4
PD_D5
PD_D6
PD_D7
PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15

PD_A0
PD_A1
PD_A2

PD_CS#1
PD_CS#3

PD_IOR#
PD_IOW#
PD_DACK#
PD_IRQ
PD_IORDY
PD_DREQ

LPC_AD[0..3] 32,33

LPC_FRAME# 32,33
LPC_DRQ#0 32

GATEA20 33
H_A20M# 4

12

R327 0_0402_5%

H_DPSLP# 5

H_FERR# 4

H_PWRGOOD 5
H_IGNNE# 4
H_INIT# 4

H_INTR 4

KB_RST# 33

H_NMI 4
H_SMI# 4

H_STPCLK# 4
1 2

PD_D[0..15] 23

PD_A0 23
PD_A1 23
PD_A2 23

PD_CS#1 23
PD_CS#3 23

PD_IOR# 23
PD_IOW# 23
PD_DACK# 23
PD_IRQ 23
PD_IORDY 23
PD_DREQ 23

H_DPRSTP#H_DPRSTP_R#

R329 24_0402_1%

GATEA20

KB_RST#

H_DPRSTP#

H_DPSLP#SM_INTRUDER#

H_DPRSTP# 5,7,45

10K_0402_5%

10K_0402_5%

H_FERR#

within 2" from R1557

+VCCP

12

R328
56_0402_5%

placed within 2" from ICH8M

PD_IORDY

R192 4.7K_0402_5%

PD_IRQ

1 2

R196 8.2K_0402_5%

1 2

+3VS

R251

12

R247

12

+VCCP

R299

12

56_0402_5%

R331

@

12

56_0402_5%

R324

@

12

56_0402_5%

H_THERMTRIP# 4,7

+3VS

XOR CHAIN ENTRANCE STRAP:RSVD

+3VS

R543

A A

HDA_SDOUT_AUDIO

12

1K_0402_5%@

5

HDA_SDOUT_AUDIO29

HDA_SYNC_AUDIO29

HDA_RST_AUDIO#29

HDA_BITCLK_AUDIO29

Close to ICH

1 2

R548 33_0402_5%

1 2

R557 33_0402_5%

1 2

R553 33_0402_5%

1 2

R564 33_0402_5%

1

C394

@

27P_0402_50V8J

2

4

HDA_SDOUT_R

HDA_SYNC_R

HDA_RST_R#

HDA_BITCLK_R

+RTCVCC

R249

1 2

100_0603_1%

2

C396

0.1U_0402_16V4Z

1

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

2

BATT1.1

W=20mils

D8

21

RB751V_SOD323

BATT1

+-

1 2

ML1220T13RE

+CHGRTC

45@

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH8(2/4)_LAN,HD,IDE,LPC

IGT30 LA-3571P

1

0.1

of

20 47Monday, December 25, 2006

5

SIRQ

+3VS

D D

+3V_SB

C C

B B

+3V_SB

A A

1 2

R245 10K_0402_5%

R242 8.2K_0402_5%

R243 10K_0402_5%

@

1 2

R237 8.2K_0402_5%

1 2

R252 10K_0402_5%

R229 10K_0402_5%

R273 10K_0402_5%

R542 10K_0402_5%

R232 10K_0402_5%

R284 10K_0402_5%

R432 10K_0402_5%

R257 10K_0402_5%

R265 10K_0402_5%

R271 1K_0402_5%

R291 8.2K_0402_5%

R246 100K_0402_5%

R591 1K_0402_5%@

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

CLK_ENABLE#45

PCI_CLKRUN#

VGA_THER_ALERT#

EC_THERM#

CLKSATAREQ#

OCP#

WOL_EN

GPIO39

GPIO48

LINKALERT#

CL_RST#

XDP_DBRESET#

ICH_RI#

ICH_PCIE_W AKE#

ICH_LOW_BAT#

12

DPRSLPVR

ICH_RSVD

12

TV TUNER

WLAN

NEW CARD

LAN

RP14

USB_OC#6

18

CPUSB#

27

USB_OC#2

36

USB_OC#4

45

10K_1206_8P4R_5%

RP16

USB_OC#5

45

USB_OC#7

36

USB_OC#9

27

USB_OC#0

18

10K_1206_8P4R_5%

USB_OC#8

12

R248 10K_0402_5%
R258 10K_0402_5%

USB_OC#3

12

5

V

2

G

10K_0402_5%

H_STP_PCI#15
H_STP_CPU#15

+3VS

R582

1 2

R588 0_0402_5%@

13

D

S

PCIE_RXN127

PCIE_RXP127
PCIE_TXN127
PCIE_TXP127

PCIE_RXN227

PCIE_RXP227
PCIE_TXN227
PCIE_TXP227

PCIE_RXN326

PCIE_RXP326
PCIE_TXN326
PCIE_TXP326

PCIE_RXN424

PCIE_RXP424
PCIE_TXN424
PCIE_TXP424

+3V_SB

R274

330_0402_5%@

1 2

Q32

RHU002N06_SOT323@

R264
10K_0402_5%

1 2

1 2

0320 add

+3VS

10K_0402_5%

R583

1 2

VRMPWRGD

R278

@

10K_0402_5%

1 2

SB_SPI_CS#119

4

+3V_SB

12

12

R322

2.2K_0402_5%

ICH_SMBCLK15,26,27

ICH_SMBDATA15,26,27

XDP_DBRESET#4
PM_BMBUSY#7

EC_LID_OUT#33

R584 0_0402_5%@

PCI_CLKRUN#28,33

ICH_PCIE_WAKE#24,26,27

EC_THERM#4,33

VGATE7,45 PLT_RST# 7,18,19,23,24,26,27

SB_INT_FLASH_SEL#

CLKSATAREQ#15

VGA_THER_ALERT#18

SB_SPKR29

MCH_ICH_SYNC#7

1 2

+3VS

R222 10K_0402_5%@

PCIE_RXN1
PCIE_RXP1
PCIE_C_TXN1

C6720.1U_0402_16V7K

PCIE_C_TXP1

C6730.1U_0402_16V7K

PCIE_RXN2
PCIE_RXP2
PCIE_C_TXN2

C6740.1U_0402_16V7K

PCIE_C_TXP2

C6750.1U_0402_16V7K

PCIE_RXN3
PCIE_RXP3
PCIE_C_TXN3

C6760.1U_0402_16V7K

PCIE_C_TXP3

C6770.1U_0402_16V7K

PCIE_RXN4
PCIE_RXP4
PCIE_C_TXN4

C6780.1U_0402_16V7K

PCIE_C_TXP4

C6790.1U_0402_16V7K

USB_OC#031

CPUSB#26

USB_OC#237
USB_OC#437
USB_OC#6
USB_OC#8

0316 change design

R269

2.2K_0402_5%

ICH_SMB_CLK
ICH_SMB_DATA
LINKALERT#
ME__EC_CLK1
ME__EC_DATA1

ICH_RI#

XDP_DBRESET#
PM_BMBUSY#

1 2

R323 0_0402_5%

H_STP_PCI#

SIRQ28,32,33

1 2

T31PAD

T24PAD

SB_SPKR

R_STP_CPU#
PCI_CLKRUN#

ICH_PCIE_W AKE#

SIRQ
EC_THERM#

VRMPWRGD
SST_CTL
OCP#

EC_SMI#
EC_SCI#

CLKSATAREQ#
GPIO39

GPIO48
SB_SPKR
MCH_ICH_SYNC#
ICH_RSVD

low-->default
High -->No boot

U28D

P27

PERN1

P26

PERP1

N29

PETN1

N28

PETP1

M27

PERN2

M26

PERP2

L29

PETN2

L28

PETP2

K27

PERN3

K26

PERP3

J29

PETN3

J28

PETP3

H27

PERN4

H26

PERP4

G29

PETN4

G28

PETP4

F27

PERN5

F26

PERP5

E29

PETN5

E28

PETP5

D27

PERN6/GLAN_RXN

D26

PERP6/GLAN_RXP

C29

PETN6/GLAN_TXN

C28

PETP6/GLAN_TXP

C23

SPI_CLK

B23

SPI_CS0#

E22

SPI_CS1#

D23

SPI_MOSI

F21

SPI_MISO

AJ19

OC0#

AG16

OC1#/GPIO40

AG15

OC2#/GPIO41

AE15

OC3#/GPIO42

AF15

OC4#/GPIO43

AG17

OC5#/GPIO29

AD12

OC6#/GPIO30

AJ18

OC7#/GPIO31

AD14

OC8#

AH18

OC9#

ICH8M REV 1.0

12

R589 0_0402_5%

OCP#4

EC_SMI#33
EC_SCI#33

SB_SPI_CS#1

USB_OC#0
CPUSB#
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9

U28C

AJ26

SMBCLK

AD19

SMBDATA

AG21

LINKALERT#

AC17

SMLINK0

AE19

SMLINK1

AF17

RI#

F4

SUS_STAT#/LPCPD#

AD15

SYS_RESET#

AG12

BMBUSY#/GPIO0

AG22

SMBALERT#/GPIO11

AE20

STP_PCI#/GPIO15

AG18

STP_CPU#/GPIO25

AH11

CLKRUN#/GPIO32

AE17

WAKE#

AF12

SERIRQ

AC13

THRM#

AJ20

VRMPWRGD

AJ22

TP7

AJ8

TACH1/GPIO1

AJ9

TACH2/GPIO6

AH9

TACH3/GPIO7

AE16

GPIO8

AC19

GPIO12

AG8

TACH0/GPIO17

AH12

GPIO18

AE11

GPIO20

AG10

SCLOCK/GPIO22

AH25

QRT_STATE0/GPIO27

AD16

QRT_STATE1/GPIO28

AG13

SATACLKREQ#/GPIO35

AF9

SLOAD/GPIO38

AJ11

SDATAOUT0/GPIO39

AD10

SDATAOUT1/GPIO48

AD9

SPKR

AJ13

MCH_SYNC#

AJ21

TP3

ICH8M REV 1.0

PCI-Express

DMI_IRCOMP

SPI

USB

DMI0RXN
DMI0RXP
DMI0TXN

DMI0TXP

DMI1RXN
DMI1RXP
DMI1TXN

DMI1TXP

DMI2RXN
DMI2RXP
DMI2TXN

DMI2TXP

DMI3RXN
DMI3RXP
DMI3TXN

DMI3TXP

DMI_CLKN
DMI_CLKP

DMI_ZCOMP

Direct Media Interface

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBRBIAS#

USBRBIAS

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V27
V26
U29
U28

Y27
Y26
W29
W28

AB26
AB25
AA29
AA28

AD27
AD26
AC29
AC28

T26
T25

Y23
Y24

G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2

F2
F3

3

SATA

GPIO

SMB

Clocks

SYS

GPIO

Power MGTController Link

GPIO

ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14

MISC

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

CLK_PCIE_ICH#
CLK_PCIE_ICH

DMI_IRCOMP
USB20_N0

USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
USB20_N9
USB20_P9

USBRBIAS

3

2

+3VS

R236

8.2K_0402_5%

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA3GP/GPIO37

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

MEM_LED/GPIO24

WOL_EN/GPIO9

AJ12
AJ10
AF11
AG11

AG9

CLK14

G5

CLK48

D3

SUSCLK

AG23

SLP_S3#

AF21

SLP_S4#

AD18

SLP_S5#

AH27
AE23

PWROK

AJ14
AE21

BATLOW#

C2

PWRBTN#

AH20

LAN_RST#

AG27

RSMRST#

E1

CK_PWRGD

E3

CLPWROK

AJ25

SLP_M#

F23

CL_CLK0

AE18

CL_CLK1

F22

CL_DATA0

AF19

CL_DATA1

D24

CL_VREF0

AH23

CL_VREF1

AJ23

CL_RST#

AJ27
AJ24
AF22
AG19

DMI_RXN0 7
DMI_RXP0 7
DMI_TXN0 7
DMI_TXP0 7

DMI_RXN1 7
DMI_RXP1 7
DMI_TXN1 7
DMI_TXP1 7

DMI_RXN2 7
DMI_RXP2 7
DMI_TXN2 7
DMI_TXP2 7

DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7

CLK_PCIE_ICH# 15
CLK_PCIE_ICH 15

R296 24.9_0402_1%

1 2

USB20_N0 31
USB20_P0 31
USB20_N1 27
USB20_P1 27
USB20_N2 37
USB20_P2 37
USB20_N3 36
USB20_P3 36
USB20_N4 37
USB20_P4 37
USB20_N5 26
USB20_P5 26
USB20_N6
USB20_P6
USB20_N7 27
USB20_P7 27
USB20_N8
USB20_P8
USB20_N9 27
USB20_P9 27

1 2

R499 22.6_0402_1%

2006/08/04 2006/10/06

1 2

CLK_14M_ICH
CLK_48M_ICH

ICH_SUSCLK
SLP_S3#

SLP_S4#
SLP_S5#

ICH_POK
DPRSLPVR
ICH_LOW_BAT#
PBTN_OUT#

1 2

R277 0_0402_5%

CK_PWRGD_R CK_PWRGD
M_PWROK

CL_CLK0

CL_DATA0

CL_VREF0_ICH
CL_VREF1_ICH

CL_RST#
EC_FLASH#

1 2

R318 0_0402_5%@

WOL_EN

Within 500 mils

+1.5VS

CLK_14M_ICH 15
CLK_48M_ICH 15

T18 PAD

SLP_S3# 33

SLP_S4# 33
SLP_S5# 33

R884 100_0402_5%

1 2

M_PWROK

ICH_POK 7,33

DPRSLPVR 7,45

PBTN_OUT# 33

1 2

R511 0_0402_5%

M_PWROK 7

CL_CLK0 7

CL_DATA0 7

CL_RST# 7

EC_FLASH#

ACIN 33,39

WOL_EN

Within 500 mils

Compal Secret Data

Deciphered Date

2

R292

1 2

10K_0402_5%

EC_RSMRST#REC_RSMRST#R

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

2

RSMRST circuit

EC_RSMRST#33

R626

2.2K_0402_5%@

1

Place closely pin AG9Place closely pin G5

12

R193

10_0402_5%@

1

C349

4.7P_0402_50V8C@

2

1 2

R325 10K_0402_5%

CK_PWRGD 15

R313 3.24K_0402_1%@

12

R314

C419

453_0402_1%

@

@

R593 3.24K_0402_1%@

12

C644

@

BAV99DW-7_SOT363

D23B

1 2

1 2

1 2

1 2

R594
453_0402_1%

@

R628

2.2K_0402_5%@

5

3

1 2

E

2

4

+3VS

+3V_SB

R621

0_0402_5%

Q35

C

123

MMBT3906_SOT23@

B

R624 4.7K_0402_5%@

1

D23A
BAV99DW-7_SOT363

6

EC_RSMRST#R

1 2

USB PORT LIST

PORT DEVICE

0

LEFT SIDE

1

WIRELESS

2

RIGHT SIDE

3

CMOS

4

RIGHT SIDE
NEW CARD

5
6

BT(HDL20)

7
8
93G

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH8(3/4)_PM,USB,GPIO

IGT30 LA-3571P

1

CLK_14M_ICHCLK_48M_ICH

12

R228

10_0402_5%@

1

C385

4.7P_0402_50V8C@

2

+3V_SB

0.1

of

21 47Monday, December 25, 2006

5

D D

+5VS +3VS

12

R572

100_0402_5%

C C

10_0402_5%

B B

A A

+3VALW+5VALW

12

R187

+1.5VS

CHB1608U301_0603

0.1U_0402_16V4Z

+1.5VS

21

D22
CH751H-40_SC76

20 mils

ICH_V5REF_RUN

1

C627

0.1U_0402_16V4Z

2

21

D4
CH751H-40_SC76

ICH_V5REF_SUS

1

C354

0.1U_0402_16V4Z

2

R218

1 2

+1.5VS

0.1U_0402_16V4Z

+3VS

1

C366

2

1 2

CHB1608U301_0603

220U_D2_4VM

20 mils

C358

C359

1 2

+1.5VS

CHB1608U301_0603

5

0.1U_0402_16V4Z

R293

C429

1

C362

2

1U_0603_10V4Z

1

2

R615

C655

+RTCVCC

1

C423

2

40 mils

1

1

+

C428

2

2

10U_0805_6.3V6M

1

2

10U_0805_6.3V6M

+1.5VS

C368

0.1U_0402_16V4Z

2.2U_0603_10V6K

1

C653

2

10U_0805_6.3V6M

1

C424

0.1U_0402_16V4Z

2

ICH_V5REF_RUN

10U_0805_6.3V6M

1

C418

2

1U_0603_10V4Z

+1.5VS

1U_0603_10V4Z

1

2

T23
T25

1 2

1

+1.5VS

CHB1608U301_0603

2

20 mils

ICH_V5REF_SUS

1

C426

2

2.2U_0603_6.3V4Z

+1.5VS

1

C351

2

1

C372

2

+1.5VS

VCC_LAN1_05_INT_ICH_1
VCC_LAN1_05_INT_ICH_2

R618

4.7U_0805_10V4Z

1

C663

2

+3VS

AD25

AA25
AA26
AA27
AB27
AB28
AB29

W25

AG7

AC10

W23

A16

T7

G4

D28
D29
E25
E26
E27

F24

F25
G24
H23
H24

J23

J24
K24
K25

L23

L24

L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27

T23

T24

T27

T28

T29
U24
U25
V23
V24
V25

Y25

AJ6
AE7

AF7
AH7

AJ7
AC1

AC2
AC3
AC4
AC5

AC9
AA5

AA6
G12

G17

H7

AC7
AD7

D1

F1
L6

L7
M6
M7

F17

G18

F19

G20
A24
A26

A27
B26
B27
B28

B25

4

U28F

VCCRTC
V5REF[1]

V5REF[2]
V5REF_SUS
VCC1_5_B[01]

VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]

VCCSATAPLL
VCC1_5_A[01]

VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]

VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
VCC1_5_A[09]
VCC1_5_A[10]

VCC1_5_A[11]
VCC1_5_A[12]

VCC1_5_A[13]
VCC1_5_A[14]

VCC1_5_A[15]
VCC1_5_A[16]
VCC1_5_A[17]

VCC1_5_A[18]
VCC1_5_A[19]

VCCUSBPLL
VCC1_5_A[20]

VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]

VCC1_5_A[25]
VCCLAN1_05[1]

VCCLAN1_05[2]
VCCLAN3_3[1]

VCCLAN3_3[2]
VCCGLANPLL
VCCGLAN1_5[1]

VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN1_5[5]

VCCGLAN3_3

ICH8M REV 1.0

4

CORE

VCCA3GP ATXARX

VCCP_COREVCCPSUSVCCPUSB

IDE

PCI

VCCSUSHDA

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS1_5[1]

VCCSUS1_5[2]
VCCSUS3_3[01]
VCCSUS3_3[02]

VCCSUS3_3[03]
VCCSUS3_3[04]
VCCSUS3_3[05]

USB CORE

VCCSUS3_3[06]
VCCSUS3_3[07]

VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]

GLAN POWER

VCCCL3_3[1]
VCCCL3_3[2]

VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCC1_05[27]
VCC1_05[28]

VCCDMIPLL
VCC_DMI[1]

VCC_DMI[2]

V_CPU_IO[1]
V_CPU_IO[2]

VCC3_3[01]
VCC3_3[02]
VCC3_3[03]

VCC3_3[04]
VCC3_3[05]
VCC3_3[06]

VCC3_3[07]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]

VCC3_3[14]
VCC3_3[15]
VCC3_3[16]
VCC3_3[17]
VCC3_3[18]
VCC3_3[19]
VCC3_3[20]
VCC3_3[21]
VCC3_3[22]
VCC3_3[23]
VCC3_3[24]

VCCHDA

VCCCL1_05

VCCCL1_5

3

+VCCP

A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

R29
AE28

AE29
AC23

AC24
AF29
AD2
AC8

AD8
AE8
AF8

AA3
U7
V7
W1
W6
W7
Y7

A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11

AC12
AD11
J6

AF20

VCCSUS1_5_ICH_1

AC16

VCCSUS1_5_ICH_2

J7
C3
AC18

AC21
AC22
AG20
AH28

P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6

VCCCL1_05_ICH

G22
A22
F20

G21

0.1U_0402_16V7K

1

1

C386 0.1U_0402_16V4Z

C412

2

2

+3VS

+3VS

1

C357

0.1U_0402_16V4Z

2

1

C352

2

0.1U_0402_16V4Z

T19

T26
T22
T21

0.1U_0402_16V4Z

+3V_SB

T27

1

C645

+3VS

1U_0603_10V4Z@

2

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.01U_0402_16V7K

1

C436 10U_0805_6.3V6M

C433

2

1

C353

2

0.1U_0402_16V4Z

+3VS

1

1

C376

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C387

+3V_SB

1

1

C416

C414

0.1U_0402_16V4Z

2

2

1

C356

4.7U_0603_6.3V6K

2

3

R332

1 2

CHB1608U301_0603

1

2

+1.25VS

1

C681
22U_0805_6.3V4Z

2

+3VS

(SATA)

0.1U_0402_16V4Z

C367

0.1U_0402_16V4Z

+3V_SB

1

2

2006/08/04 2006/10/06

+1.5VS

+3VS

(DMI)

1

C434

2

1

C395

2

Compal Secret Data

+VCCP

4.7U_0603_6.3V6M

1

2

+3VS

Deciphered Date

C399

C421

0.1U_0402_16V4Z

1

2

2

C411

0.1U_0402_16V4Z

1

2

2

U28E

A23

VSS[001]

A5

VSS[002]

AA2

VSS[003]

AA7

VSS[004]

A25

VSS[005]

AB1

VSS[006]

AB24

VSS[007]

AC11

VSS[008]

AC14

VSS[009]

AC25

VSS[010]

AC26

VSS[011]

AC27

VSS[012]

AD17

VSS[013]

AD20

VSS[014]

AD28

VSS[015]

AD29

VSS[016]

AD3

VSS[017]

AD4

VSS[018]

AD6

VSS[019]

AE1

VSS[020]

AE12

VSS[021]

AE2

VSS[022]

AE22

VSS[023]

AD1

VSS[024]

AE25

VSS[025]

AE5

VSS[026]

AE6

VSS[027]

AE9

VSS[028]

AF14

VSS[029]

AF16

VSS[030]

AF18

VSS[031]

AF3

VSS[032]

AF4

VSS[033]

AG5

VSS[034]

AG6

VSS[035]

AH10

VSS[036]

AH13

VSS[037]

AH16

VSS[038]

AH19

VSS[039]

AH2

VSS[040]

AF28

VSS[041]

AH22

VSS[042]

AH24

VSS[043]

AH26

VSS[044]

AH3

VSS[045]

AH4

VSS[046]

AH8

VSS[047]

AJ5

VSS[048]

B11

VSS[049]

B14

VSS[050]

B17

VSS[051]

B2

VSS[052]

B20

VSS[053]

B22

VSS[054]

B8

VSS[055]

C24

VSS[056]

C26

VSS[057]

C27

VSS[058]

C6

VSS[059]

D12

VSS[060]

D15

VSS[061]

D18

VSS[062]

D2

VSS[063]

D4

VSS[064]

E21

VSS[065]

E24

VSS[066]

E4

VSS[067]

E9

VSS[068]

F15

VSS[069]

E23

VSS[070]

F28

VSS[071]

F29

VSS[072]

F7

VSS[073]

G1

VSS[074]

E2

VSS[075]

G10

VSS[076]

G13

VSS[077]

G19

VSS[078]

G23

VSS[079]

G25

VSS[080]

G26

VSS[081]

G27

VSS[082]

H25

VSS[083]

H28

VSS[084]

H29

VSS[085]

H3

VSS[086]

H6

VSS[087]

J1

VSS[088]

J25

VSS[089]

J26

VSS[090]

J27

VSS[091]

J4

VSS[092]

J5

VSS[093]

K23

VSS[094]

K28

VSS[095]

K29

VSS[096]

K3

VSS[097]

K6

VSS[098]

ICH8M REV 1.0

Title

Size Document Number Rev

Custom

IGT30 LA-3571P

Date: Sheet

VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

Compal Electronics, Inc.

ICH8(4/4)_POWER&GND

VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]

1

K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

1

0.1

of

22 47Monday, December 25, 2006

5

+3VS

0.1U_0402_16V4Z@

1

C441

22U_1206_6.3V6M

D D

PSATA_IRX_DTX_N0_C20

PSATA_IRX_DTX_P0_C20

+5VS +5VS_SATA

C C

C472

B B

ODD_LED#36

A A

+5VCD

SWDJ@

Q90

SI3456BDV-T1-E3_TSOP6

1

1

C463

2

2

0.1U_0402_16V4Z

1U_0603_10V4Z

SIDE_RST#

10K_0402_5%

ODD_LED#

1

C552
1U_0603_10V4Z

2

@

C432 3900P_0402_50V7K

C435 3900P_0402_50V7K

+3VS

+5VS

D

6

S

45
2
1

G

3

+3VS

12

R466

SW_IDE_SDCS1# SW_IDE_SDCS3#

1

C556
10U_0805_10V4Z

2

5

1

C445

2

2

1000P_0402_50V7K

@

Pleace near HD CONN

PSATA_ITX_DRX_P020
PSATA_ITX_DRX_N020

12

12

1 2

R341 0_0805_5%@

1 2

R355 0_0805_5%

NOSWDJ@

1

1

C467

2

22U_1206_6.3V6M

INT_CD_L29,31 INT_CD_R 29,31

CD_AGND29

PD_IOW#20

PD_IORDY20

PD_IRQ20

1

C462

C461

2

2

1000P_0402_50V7K

0.1U_0402_16V4Z

DTC124EK_SC59

SWDJ@

PD_D7
PD_D6
PD_D5
PD_D4
PD_D3
PD_D2
PD_D1
PD_D0

PD_IOW#
PD_IORDY PD_DACK#
PD_IRQ
PD_A1
PD_A0

+5VCD

PRI_CSEL

R457
470_0402_5%

1 2

1

C444

2

1U_0603_10V4Z@

PSATA_ITX_DRX_P0
PSATA_ITX_DRX_N0

PSATA_IRX_DTX_N0

PSATA_IRX_DTX_P0

+3VS_SATA

+5VS_SATA

R896

10K_0402_5%

SWDJ@

Q92

PD_D[0..15]
PD_A[0..2]

1

C449

2

+VSB

12

13

JP10

112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950

OCTEK_CDR-50DY1G

ME@

4

1

C446

2

0.1U_0402_16V4Z

@

JP9

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

19

GND

20

V12

21

V12

22

V12

ALLTO_C16616-122A3-L_NR

Main SATA +5V Default

2

2
4

PD_D8

6

PD_D9

8

PD_D10

10

PD_D11

12

PD_D12

14

PD_D13

16

PD_D14

18

PD_D15

20

PD_DREQ

22
24
26
28
30

PDIAG#

32

PD_A2

34
36
38
40
42
44

C553 0.1U_0402_16V4Z

46
48
50

PD_D[0..15] 20

PD_A[0..2] 20

4

CD_PLAY 29,33

12

PD_DREQ 20
ODD_IOR#

PD_DACK# 20

1 2

R463 100K_0402_5%

+5VCD

3

12

R771
10K_0402_5%

IDERST_CD#20

PLT_RST#7,18,19,21,24,26,27

+5VCD

SN74LVC125APWLE_TSSOP14

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

10

OE#

I9O

SWDJ@

U55C

PLT_RST#

PLT_RST#

8

Compal Secret Data

1
2

R857 0_0402_5%

R783

10K_0402_5%

SWDJ@

2

G

+5VALW

+5VALW

Deciphered Date

+5VS

5

U74

P

B
A

G

3

@

1 2

+3VALW

12

13

D

S

+5VS

SWDJ@

2

PCMRST#33

SD_IDERST#

4

Y

TC7SH08FU_SSOP5

10K_0402_5%

VCC= +3VALW

PD_CS#120

G_PCI_RST#

Q87
2N7002_SOT23

SWDJ@

PD_CS#320

80 mil 80 mil

R838 0_0805_5%

NOSWDJ@

1

C840
10U_0805_10V4Z

2

SWDJ@

1 2

R774

C843

1 2

1U_0603_10V4Z

SWDJ@

SUSP#18,26,28,29,33,35,42,43,44

PD_IOR#20 ODD_IOR#

2

VCC= +3VALW

1 2

Q80

S

G

2

240K_0402_5%

SUSP#

SN74LVC125APWLE_TSSOP14

SWDJ@

D

SI2301BDS_SOT23

+3VALW+3VS +5VCD

PCMRST#

SWDJ@

SN74LVC125APWLE_TSSOP14

R773

1 2

NOSWDJ@

1 2

R837 0_0402_5%

1 2

R843 0_0402_5%

NOSWDJ@

4

U55B

OE#

I5O

SWDJ@

13

U55D

OE#

I12O

SN74LVC125APWLE_TSSOP14

NOSWDJ@
1 2

R844 0_0402_5%

13

PLAY_MODE

2

+3VALW +3VS

C844

SWDJ@

5

P

0.1U_0402_16V4Z

I2O

G

3

NOSWDJ@

1 2

R840 0_0402_5%

1

C839 0.1U_0402_16V4Z

1 2
SWDJ@

1

14

U55A

SWDJ@

P

3

OE#

I2O
G

7

+5VCD

12

R782
10K_0402_5%

SWDJ@

6

SWDJ@
11

+5VCD

Title

Size Document Number Rev

Custom

Date: Sheet

SW_IDE_SDCS1#

+5VCD

12

R785
10K_0402_5%

SWDJ@

SW_IDE_SDCS3#

1
SWDJ@

C841
10U_0805_10V4Z

2

PLAY_MODE 30

13

Q85
DTC124EK_SC59

SWDJ@

CD_PLAY29,33

1

U70

R845

SWDJ@

4

OE#

33_0402_5%
74LVC1G125GW_SOT3535

SWDJ@

Compal Electronics, Inc.

HDD & CDROM

IGT30 LA-3571P

1

2

CD_PLAY

12

SWDJ@

SWDJ@

C842

0.1U_0402_16V4Z

2

R839

8.2K_0402_5%

NOSWDJ@

R772
10K_0402_5%

SIDE_RST#

SW_IDE_SDCS1#

SW_IDE_SDCS3#

13

1

SIDE_RST#

Q86
DTC124EK_SC59

SWDJ@

of

23 47Monday, December 25, 2006

0.1

5

Layout Notice : Filter place as close
chip as possible.

+2.5V_LAN

D D

C C

B B

A A

L15

0.1U_0402_16V4Z

L18

0.1U_0402_16V4Z

L22

+2.5V_LAN

2

C639

1

10U_0805_10V4Z

C636

C635

C624

C629

2

1

12

12

12

12

12

12

12

C589

C632

0.1U_0402_16V4Z

2

1

2

1

2

1

1

2

C642

2

1

FBM-L11-160808-601LMT_0603

FBM-L11-160808-601LMT_0603

FBM-L11-160808-601LMT_0603

+1.2V_LAN

L17 FBM-L11-160808-601LMT_0603

4.7U_0805_6.3V6K

L16 FBM-L11-160808-601LMT_0603

4.7U_0805_6.3V6K

L19 FBM-L11-160808-601LMT_0603

4.7U_0805_6.3V6K

L21 FBM-L11-160808-601LMT_0603

4.7U_0805_6.3V6K

Layout Notice : Place as close
chip as possible.

0.1U_0402_16V4Z
C641

2

1

21.5

2

C625

1

+LAN_BIASVDD

1

2

0.1U_0402_16V4Z

5

+XTALVDD

2

C634

0.1U_0402_16V4Z

1

C628

0.1U_0402_16V4Z

+AVDDL

2

C633

0.1U_0402_16V4Z

1

+GPHY_PLLVDD

2

C631

0.1U_0402_16V4Z

1

+PCIE_PLLVDD

2

C613

0.1U_0402_16V4Z

1

+PCIE_VDD

2

C617

0.1U_0402_16V4Z

1

+LAN_AVDD

2

1

EN_WOL33

(CLKREQ#) and (ENERGY_DET) are
only supported in BCM5787M

Y2

1 2

21.5

12

R538 200_0603_1%

25MHZ_16P_XSL025000FK1H

2

C612

1

27P_0402_50V8J

EN_WOL

2

Q93

2N7002_SOT23

2

C581

1

G

ICH_PCIE_WAKE#21,26,27

27P_0402_50V8J

4

+VSB

CLK_PCIE_LAN#15

CLK_PCIE_LAN15
CLKREQ_LAN#15

XTALO

XTALI

4

12

R902
33K_0402_5%

13

D

S

PCI_CBE#319,28

PCIE_TXN421

PCIE_TXP421
PCIE_RXN421
PCIE_RXP421

PLT_RST#7,18,19,21,23,26,27

1 2

R519 4.7K_0402_5%@

1 2

R518 4.7K_0402_5%@

+3VALW

SI3456BDV-T1-E3_TSOP6

1

2

+3VS
+3VS

+3V_LAN

L23
FBM-L11-321611-260-LMT_1206

1 2

6

Q34

2
1

C877

0.1U_0603_25V7K

R514 0_0402_5%@
R567 1K_0402_5%
R566 1K_0402_5%

R537

0.1U_0402_16V7K

0.1U_0402_16V7K

+3V_LAN
+3V_LAN

+3V_LAN

@

D

G

3

1 2
1 2
1 2

1 2

+GPHY_PLLVDD

C596
C598

1 2

R546 47K_0402_5%@

1 2

R551 47K_0402_5%@

R513 0_0402_5%

LAN_WP
GPIO2

1 2

R512 0_0402_5%@

S

45

0_0402_5%@

PCIE_MRX_C_LTX_N4
PCIE_MRX_C_LTX_P4

1 2

XTALI

XTALO

Security Classification

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Layout Notice : Place as close
chip as possible.

2

C661

1

10U_0805_10V4Z

U31

28
29
11

3
53
54

59
35
32
31
25
26

10
12

58
57

4

7

8

9

21
22

16
24

100@

2

2

C583

C575

1

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

PCIE_REFCLK_N
PCIE_REFCLK_P
CLKREQ

LOW PWR
VMAIN_PRSNT
VAUX_PRSNT

ENERGY_DET
GPHY_PLLVDD
PCIE_RXD_N
PCIE_RXD_P
PCIE_TXD_N
PCIE_TXD_P

PERST
WAKE

SMB_CLK
SMB_DATA

GPIO_0(SERIAL_DO)
GPIO_1(SERIAL_DI)
GPIO_2
UART_MODE

XTALI
XTALO

REG_GND
PCIE_GND

C591

SPD100LED
SPD1000LED
TRAFFICLED

SCLK(EECLK)

SO(EEDATA)

PCIE_PLLVDD

GND

69

Issued Date

3

2

+3V_LAN

2

C611

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

TRD0_N
TRD0_P
TRD1_N
TRD1_P
TRD2_N
TRD2_P
TRD3_N
TRD3_P

LINKLED

SI

CS

REGCTL12
REGCTL25

RDAC

XTALVDD

VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

VDDP
VDDP

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

BIASVDD

PCIE_VDD
PCIE_VDD

AVDD
AVDD
AVDD

AVDDL
AVDDL
AVDDL
AVDDL

2006/08/04 2006/10/06

U31

2

BCM5787MKML_QFN68

GIGA@

1

LAN_TX0-

41

LAN_TX0+

40

LAN_RX1-

42

LAN_RX1+

43

LAN_TX2-

48

LAN_TX2+

47

LAN_TX3-

49

LAN_TX3+

50

R521 0_0402_5%

2

1 2

R522 0_0402_5%@

1

1 2

R516 0_0402_5%@

67

1 2

66

LAN_CLK

65

SI

63

LAN_DATA

64

CS#

62

CTL12

14

CTL25

18
37

R587 1.24K_0402_1%

23
6
15
19
56
61

17
68

5
13
20
34
55
60

36
30
27
33

38
45
52

39
44
46
51

4.7K_0402_5%

LAN_WP
LAN_CLK
LAN_DATA

GIGA@

+XTALVDD

+3V_LAN

+2.5V_LAN

+1.2V_LAN

+LAN_BIASVDD

+PCIE_PLLVDD

+PCIE_VDD

+LAN_AVDD

+AVDDL

12

R489

12

LAN_CLK
SI
CS#

Compal Secret Data

LAN_TX0- 25
LAN_TX0+ 25
LAN_RX1- 25
LAN_RX1+ 25
LAN_TX2- 25
LAN_TX2+ 25
LAN_TX3- 25
LAN_TX3+ 25

12

R488

4.7K_0402_5%

Deciphered Date

R587

1K_0402_1%

100@

+3V_LAN

C567

0.1U_0402_16V4Z

U27

8
7
6
5

AT24C02_SO8

1 2

R526 4.7K_0402_5%

12

R533 4.7K_0402_5%GIGA@

1 2

R534 4.7K_0402_5%GIGA@

1 2

VCC
WP
SCL
SDA

2

LINKLED# 25

ACTIVITY# 25

A0
A1
NC

GND

Layout Notice : 1.2V filter. Place as close
chip as possible.

+1.2V_LAN

2

C568

1

4.7U_0805_6.3V6K

2

2

C576

C619

1

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CTL12

C585

0.1U_0402_16V4Z

CTL25

2

1

Q33

1

+2.5V_LAN

C597

2

1

0.1U_0402_16V4Z

+3V_LAN

2 3

Notice : 4.7u 6. 3V c apa cto r T hic kness 1.25mm

Layout Notice : Filter place as close
chip as possible.

1
2
3
4

Title

Size Document Number Rev

Custom

Date: Sheet

1

2

2

C572

C577

1

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C654 0.1U_0402_16V4Z

1 2

C656 4.7U_0805_10V4Z

1 2

MMJT9435T1G_SOT223

4

MBT35200MT1G_TSOP6

+1.2V_LAN

+3V_LAN

41

Q31

3

256

BCM5787MKML
IGT30 LA-3571P

1

1

C648
10U_0805_10V4Z

2

24 47Monday, December 25, 2006

0.1

of

5

4

3

2

1

D D

+2.5V_LAN

12

R523
FBM-L11-160808-601LMT_0603

U29

U32

TD-8TX­TD+
CT

CT
RD­RD+

NS0013_16P

100@

LAN_TX3-

LAN_TX3+

LAN_TX2-

LAN_TX2+

LAN_RX1-

LAN_RX1+

LAN_TX0-

LAN_TX0+

TX+

CT

CT

RX-

RX+

LAN_TX3-24

LAN_RX1-

LAN_RX1+

TCT

LAN_TX0-

LAN_TX0+

LAN_TX3+24

LAN_TX2-24

LAN_TX2+24

LAN_RX1-24

LAN_RX1+24

LAN_TX0-24

LAN_TX0+24

7
6

3
2
1

0.1U_0402_16V4Z

1 2

C578

GIGA@

0.1U_0402_16V4Z

1 2

C622

C C

C587

C599

1 2

1 2

C571

C573

GIGA@

0.1U_0402_16V4Z

GIGA@

0.1U_0402_16V4Z

GIGA@

0.01U_0402_16V7K

12

100@

0.01U_0402_16V7K

12

100@

TCT

12

TD4-

MX4-

11

TD4+

MX4+

10

TCT4

MCT4

9

TD3-

MX3-

8

TD3+

MX3+

7

TCT3

MCT3

TD2-6MX2-

5

TD2+

MX2+

4

TCT2

MCT2

3

TD1-

MX1-

2

TD1+

MX1+

1

TCT1

MCT1

0.5u_24HST1041A-2GIGA@

MDO1-

9

MDO1+

10

MCT0

11

MCT1

14

MDO0-

15

MDO0+

16

MDO3-

13

MDO3+

14

MCT0

15

MDO2-

16

MDO2+

17

MCT1

18

MDO1-

19

MDO1+

20
21

MDO0-

22

MDO0+

23
24

75_0402_5%

75_0402_5%

75_0402_5% GIGA@

75_0402_5% GIGA@

RJ45_PR

R575

12

R569

12

R529

12

R525

12

+3V_LAN

220P_0402_25V8J

+3V_LAN

220P_0402_25V8J

RJ45_PR

C882

2

1

1

2

C881

RJ45_PR

RJ11+RJ45 CONN

LINKLED#24

MDO0+
MDO0­MDO1+
MDO2+
MDO2­MDO1­MDO3+
MDO3-

ACTIVITY#24

R786 FBMA-L11-160808-181LMA15T

RJ_TIP
RJ_RING

FBMA-L11-160808-181LMA15T

1 2

C803

1000P_1206_2KV7K

4.7U_0805_10V4Z

R910

R909

12
12

R787

1

C804

2

0.1U_0402_16V4Z

MDO0+
MDO0­MDO1+
MDO2+
MDO2­MDO1­MDO3+
MDO3-

330_0402_5%

12

330_0402_5%

12

1

C802

2

JP73

11

VDD

12

GND

1

TX1+

2

TX1-

3

RX1+

4

TX2+

5

TX2-

6

RX1-

7

RX2+

8

RX2-

RJ45

13

VDD

14

GND

9

RJ11_1

10

15
16

RJ11

RJ11_2

SGND1
SGND2

ALLTO_C100B6-110A4-L

B B

LAN_TX3-

LAN_TX3+

LAN_TX2-

LAN_TX2+

LAN_RX1-

LAN_RX1+

A A

LAN_TX0-

LAN_TX0+

near LAN controller

5

R581 49.9_0402_1%@
R579 49.9_0402_1%@

R568 49.9_0402_1%@
R558 49.9_0402_1%@

R545 49.9_0402_1%100@
R541 49.9_0402_1%100@

R531 49.9_0402_1%100@
R527 49.9_0402_1%100@

12
12

12
12

12
12

12
12

12

C637 0.01U_0402_16V7K@

12

C615 0.01U_0402_16V7K@

100@

12

C592 0.01U_0402_16V7K

100@

12

C579 0.01U_0402_16V7K

4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

2

MDC CONN

JP74

RJ_TIP

RJ_RING

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

LAN CONTROLLER

IGT30 LA-3571P

1
2

EDL71_MDC

of

25 47Monday, December 25, 2006

1

0.1

A

1 1

12

C378 0.1U_0402_16V4Z

12

C375 0.1U_0402_16V4Z

12

C389 0.1U_0402_16V4Z

PLT_RST#7,18,1 9 ,21,23,24,27

SYSON33,35,42
SUSP#18 ,2 3 , 28 , 29,33,35,42,43,44

+3VALW

CPUSB#21

2 2

3 3

R211 100K_0402_5%

CPUSB#

USB20_N521

USB20_P521

ICH_PCIE_WAKE#21,24,27

Express Card Power Switch

+1.5VS

+3VS

+3VALW

PLT_RST#
SYSON
SUSP#

12

USB20_N5
USB20_P5

R259
R266

R315

1 2

0_0402_5%

CLKREQ_NC1#15

CLK_PCIE_NC1#15

CLK_PCIE_NC115

U8

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin
AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

R5538_QFN20

0_0402_5%

1 2
1 2

0_0402_5%

ICH_SMBCLK15,21,27

ICH_SMBDATA15,21,27

CPUSB#21

PCIE_RXN321

PCIE_RXP321
PCIE_TXN321

PCIE_TXP321

+3V_PEC
+3VS_PEC

1.5Vout

1.5Vout

3.3Vout

3.3Vout

OC#

PERST#

GND

+1.5VS_PEC
+1.5VS_PEC

B

11
13

3
5

15
19
8
16

NC

7

ICH_SMBCLK
ICH_SMBDATA

+1.5VS_PEC

+3VS_PEC

+3V_PEC

PERST#

USB5­USB5+
CPUSB#

PCIE_PME#_R

PERST#

CLKREQ_NC1#
CPUSB#
CLK_PCIE_NC1#
CLK_PCIE_NC1

PCIE_RXN3
PCIE_RXP3

PCIE_TXN3
PCIE_TXP3

C373

0.1U_0402_16V4Z

C384

0.1U_0402_16V4Z

C371

0.1U_0402_16V4Z

JP53

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

FOX_1CH4110C

+1.5VS_PEC

1

2

+3V_PEC

1

2

+3VS_PEC

1

2

4.7U_0805_10V4Z

1

C365

2

1

C392

4.7U_0805_10V4Z

2

4.7U_0805_10V4Z

1

C361

2

C

D

E

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/04 2006/10/06

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

CardBus Socket

Size Document Number Rev

IGT30 LA-3571P 0.1

Custom

Monday, December 25, 2006

D

Date: Sheet

E

26 47

of

A

B

C

D

E

1 1

ICH_PCIE_WAKE#21,24,26

2 2

3 3

4 4

BT_AVTIVE
WLAN_AVTIVE

CLKREQ_MCARD#15

CLK_PCIE_MCARD#15
CLK_PCIE_MCARD15

PCIE_RXN221
PCIE_RXP221

PCIE_TXN221
PCIE_TXP221

HDA_SDOUT_MDC20
HDA_SYNC_MDC20

HDA_SDIN120

HDA_RST_MDC#20

KILL_MDC#20

Mini-Express Card(Slot 1-WLAN)

JP54

R635 0_0402_5%@
R636 0_0402_5%@

CLK_PCIE_MCARD#
CLK_PCIE_MCARD

R497

1 2

R498

D21

2
3

DAP202U_SOT323

AZ_SYNC
AZ_SDIN3

33_0402_5%

12

0_0402_5%@

1

12
12

+3VALW

12

R496
10K_0402_1%

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

FOX_AS0B226-S56N-7F

1
3
5
7
9

11

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

GND2

MDC CONN.

JP17

1
3
5
7
9
11

131314141515161617171818191920

PLT_RST#

R595 0_0402_5%

R598 0_0402_5%@

ICH_SMBCLK
ICH_SMBDATA

2

2

4

4

6

6

8

8

10

10

12

12

ACES_88012-1207

ME@

20

C683

RF_OFF# 33
PLT_RST# 7,18,19,21,23,24,26

12
12

USB20_N1 21
USB20_P1 21

C586

1 2

1U_0805_25V4Z

12

1

2

+3VALW
+3VS

ICH_SMBCLK 15,21,26
ICH_SMBDATA 15,21,26

WIRELESS_LED# 36

+3V_SB

R535

10_0402_5%

@

C588
10P_0402_50V8J

@

+3VS

1

2

+1.5VS

1

C684

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

HDA_BITCLK_MDC 20

ICH_PCIE_W AKE#21,24,26

CLKREQ_MCARD1#

CLK_PCIE_MCARD1#15
CLK_PCIE_MCARD115

Mini-Express Card(Slot 2-3G)

JP55

BT_AVTIVE
WLAN_AVTIVE

PCIE_RXN121

PCIE_RXP121

PCIE_TXN121
PCIE_TXP121

+3VS

R555 0_0402_5%@
R561 0_0402_5%@

CLK_PCIE_MCARD1#
CLK_PCIE_MCARD1

R899

0_0603_5%

BT_OFF#33

BTONLED36

12
12

PCIE_RXN1
PCIE_RXP1

PCIE_TXN1
PCIE_TXP1

12

2

DTC124EK_SC59

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

FOX_AS0B226-S56N-7F

+5VS

BT MODULE CONN.

12

R171
10K_0402_1%

RF_OFF2

13

Q13
DTC124EK_SC59

BTONLED

Q11

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

GND2

13

2

12

R151
10K_0402_5%

PLT_RST#

ICH_SMBCLK

ICH_SMBDATA

+3VS

AO3413_SOT23

USB20_N721
USB20_P721

RF_OFF# 33
PLT_RST# 7,18,19,21,23,24,26

+3VALW

ICH_SMBCLK 15,21,26
ICH_SMBDATA 15,21,26

USB20_N9 21
USB20_P9 21

3G_LED# 36

D

13

2

USB20_N7
USB20_P7

+3VS_BT2

0.1U_0402_16V4Z

Q8

S

G

BTON_LED2
BT_AVTIVE
WLAN_AVTIVE

1

1

C682

C669

2

2

0.1U_0402_16V4Z

C337

12

JP56

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

GND1

10

GND2

MOLEX_53780-0870

ME@

+3VS
+1.5VS

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

D

Date: Sheet

Compal Electronics, Inc.

Mini Card / MDC CONN

IGT30 LA-3571P

E

0.1

of

27 47Monday, December 25, 2006

5

1

2

1 2

1 2

C496

R367

R375

270P_0402_50V7K

56.2_0402_1%

56.2_0402_1%

U18

125

AD31

126

AD30

127

AD29

1

AD28

2

AD27

3

AD26

5

AD25

6

AD24

9

AD23

11

AD22

12

AD21

14

AD20

15

AD19

17

AD18

18

AD17

19

AD16

36

AD15

37

AD14

38

AD13

39

AD12

40

AD11

42

AD10

43

AD9

44

AD8

46

AD7

47

AD6

48

AD5

49

AD4

50

AD3

51

AD2

52

AD1

53

AD0

7

C/BE3#

21

C/BE2#

35

C/BE1#

45

C/BE0#

33

PAR

23

FRAME#

25

TRDY#

24

IRDY#

29

STOP#

26

DEVSEL#

8

IDSEL

30

PERR#

31

SERR#

124

REQ#

123

GNT#

121

PCICLK

119

PCIRST#

71

GBRST#

117

CLKRUN#

70

PME#

115

INTA#

116

INTB#

69

HWSPND#

66

TEST

111

AGND

107

AGND

103

AGND

102

AGND

99

AGND

97

NC

R5C832_TQFP128~D

12

Z3008

1 2

1 2

R381

5.1K_0402_1%

R366

56.2_0402_1%

R374

56.2_0402_1%

R5C832

2

1

PCI_AD[0..31]19

D D

PCI_CBE#319,24
PCI_CBE#219
PCI_CBE#119
PCI_CBE#019

PCI_PAR19
PCI_FRAME#19

C C

B B

PCI_AD22 CBS_IDSEL

1 2

R363 100_0402_5%

PCI_CLKRUN#21,33

SUSP#18,23,26,29,33,35,42,43,44

PCI_TRDY#19
PCI_IRDY#19
PCI_STOP#19
PCI_DEVSEL#19

PCI_PERR#19
PCI_SERR#19

PCI_REQ0#19

PCI_GNT0#19

CLK_PCI_139415

PCI_RST#19,32,33

R659 10K_0402_5%@

1 2

R658 0_0402_5%

1 2

R5_PME#33
PCI_PIRQG#19
PCI_PIRQH#19

1 2

+3VS

R351 10K_0402_5%

1 2

R349 0_0402_5%@

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0

PCI_PAR
PCI_FRAME#
PCI_TRDY#
PCI_IRDY#
PCI_STOP#
PCI_DEVSEL#

PCI_PERR#
PCI_SERR#

PCI_REQ0#
PCI_GNT0#

CBS_GRST#

R5_PME#

Layout Not e: Place close to R5C832

CLK_PCI_1394

12

R365

@

10_0402_5%

2

A A

C495

1

@

4.7P_0402_50V8C

+3VS

12

R353

CBS_GRST#

1

C466
1U_0603_10V6K

2

IEEE1394_TPBN0
IEEE1394_TPBP0

100K_0402_5%

5

IEEE1394_TPAN0
IEEE1394_TPAP0

IEEE1394_TPBIAS0

2

C494

1

0.01U_0402_16V7K

4

VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V

VCC_RIN

VCC_ROUT
VCC_ROUT
VCC_ROUT
VCC_ROUT
VCC_ROUT

VCC_3V

VCC_MD3V

AVCC_PHY3V
AVCC_PHY3V
AVCC_PHY3V
AVCC_PHY3V

TPBIAS0

TPAP0
TPAN0

TPBP0
TPBN0

MDIO00
MDIO01
MDIO02
MDIO03
MDIO04
MDIO05
MDIO06
MDIO07
MDIO08
MDIO09
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
MDIO15
MDIO16
MDIO17
MDIO18
MDIO19

MSEN
XDEN

XO

FIL0
REXT
VREF

UDIO0/SERIRQ#

UDIO1
UDIO2
UDIO3
UDIO4
UDIO5

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

SDPWR0_MSPW R _XDPW R

Layout Note: Shield GND for
IEEE1394_TPA and TPB

C499

0.33U_0603_16V4Z

4

10
20
27
32
41
128

61
16

34
64
114
120

67
86
98

106
110
112

113
109

108
105

104
80

79
78
77
76
75
74
73
88
84
82
81
93
90
91
89
92
87
85
83

58
55

94

XI

95
96

101
100

72
60
56
65
59
57

4
13
22
28
54
62
63
68
118
122

+3VS

+3V_PHY

IEEE1394_TPBIAS0
IEEE1394_TPAP0

IEEE1394_TPAN0
IEEE1394_TPBP0

IEEE1394_TPBN0
SDCD#_XDCD0#

MSCD#_XDCD1
XD_CE#
SDWP#_XDRB#
SDPWR0_MSPW R _XDPW R
XDWP#
3IN1_LED#
TP_MSEXTCK
SDCMD_MSBS
SDCLK_MSCLK
SDDATA0_MSDATA0
SDDATA1_MSDATA1
SDDATA2_MSDATA2
SDDATA3_MSDATA3
XDD4
XDD5
XDD6
XDD7
XDCLE
XDALE

MSEN
XDEN

R5C832XI
R5C832XO

SIRQ
TP_UDIO1
TP_UDIO2
UDIO3
UDIO4
UDIO5

+3VS

1
2
3
4

U38

3
4

2

RT9701CB_SOT25

1

C665

2

0.1U_0402_16V4Z

JP13

TPB-

GND

TPB+

GND

TPA-

GND

TPA+

GND

SUYIN_020115FB004S512ZL

ME@

VIN
VIN/CE

GND

5
6
7
8

1

2

1

C469

C482

2

10U_0805_4VAM

0.01U_0402_16V7K

SDCD#_XDCD0# 37
MSCD#_XDCD1 37

XD_CE# 37

SDWP#_XDRB# 37

XDWP# 37

3IN1_LED#

SDCMD_MSBS 37

SDCLK_MSCLK 37
SDDATA0_MSDATA0 37
SDDATA1_MSDATA1 37
SDDATA2_MSDATA2 37
SDDATA3_MSDATA3 37

XDD4 37
XDD5 37
XDD6 37
XDD7 37

XDCLE 37
XDALE 37

1 2

C489

0.01U_0402_16V7K

SIRQ 21,32,33

T28PAD
T29PAD

Layout Note: Shield GND for
CBS_CCLK_INTERNAL and CBS_CCLK

40mil

+VCC_4IN1

1

VOUT

5

VOUT

C664

1

2

1U_0603_10V4Z

3

+3VS

1

1

1

1

2

12

+3VS

1

C481

C657

2

10U_0805_4VAM

0.01U_0402_16V7K

2

R656

C493

1

1 2

0.01U_0402_16V7K

+VCC_4IN1

1

R619

C668

2

150K_0402_5%

10U_1206_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH OUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

C487

C477

2

2

0.01U_0402_16V7K

0.01U_0402_16V7K

+3VS

Layout Not e: Place close to R5C832
and Shield GND for SDCLK_MSCLK

1 2

15P_0603_50V8J

10K_0603_1%

1

2

C671

0.1U_0402_16V4Z

1 2

15P_0603_50V8J

1

1

C492

2

0.47U_0603_16V4Z

L25

1 2

BLM21A601SPT_0805

C485

C488

2006/08/04 2006/10/06

2

C447

2

0.47U_0603_16V4Z

1

2

Layout Not e: Place close to R5C832
and Shield GND for SD_CLK

R5C832XI

X2

24.576MHz_16P_1BG24576CKIA

1 2

R5C832XO

Compal Secret Data

1

C451

2

0.01U_0402_16V7K

1

C714

2

22U_0805_6.3V6M

Deciphered Date

C699

2

C455

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

2

1

C452

2

C711

0.1U_0402_16V4Z

1

C448

2

10U_0805_4VAM

0.01U_0402_16V7K

+3V_PHY

1

1

C713

C712

2

2

1000P_0402_50V7K

1000P_0402_50V7K

Pull-up

SDDATA1_MSDATA1

SDDATA2_MSDATA2

+VCC_4IN1

+5VS

1 2

R627 10K_0402_5%@

1 2

R634 10K_0402_5%@

SDCD#_XDCD0# XD CD#

2N7002_SOT23

MSCD#_XDCD1
SDCD#_XDCD0#

1

SD,MMC,MS,XD muti-function pin define

MDIO
PIN Name
MDIO00

MDIO01
MDIO02
MDIO03
MDIO04
MDIO05
MDIO06
MDIO07
MDIO08
MDIO09 SDCCLK
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
MDIO15
MDIO16
MDIO17
MDIO18
MDIO19

Function set pin define

SD Card
PIN Name
SDCD#

MMC Card
PIN Name
MMCCD#

SDWP#
SDPWR0

MMCPWR
SDPWR1
SDLED#

SDCCMD

MMCLED#

MMCCMD

MMCCLK
SDCDAT0

MMCDAT
SDCDAT1
SDCDAT2
SDCDAT3

MSEN XDENUDIO3 UDIO4

Pull-upPull-up Enable

Pull-up

MSEN

R343 10K_0402_5%

UDIO3
UDIO4
UDIO5

XDEN

1 2

R347 10K_0402_5%

1 2

R342 10K_0402_5%

1 2

R344 100K_0402_5%

1 2

R345 10K_0402_5%

1 2

MS Card
PIN Name

MSCD#

XD Card
PIN Name
XDCD0#

XDCD1#
XDCE#
XDR/B#

MSWR

XDPWR
XDWP#

MSLED#

XDLED#
MSEXTCK
MSBS
MSCCLK
MSCDAT0
MSCDAT1
MSCDAT2
MSCDAT3

XDWE#

XDRE#

XDCDAT0

XDCDAT1

XDCDAT2

XDCDAT3

XDCDAT4

XDCDAT5

XDCDAT6

XDCDAT7

XDCLE

XDALE

Function

SD,XD,MS,MMC Card

+3VS

Solve MS Duo Adaptor short problem

R637 0_0402_5%

@

12

Q42

@

D

S

2N7002_SOT23

1 3

R629 0_0402_5%

Q39

@

G

2

D

S

2N7002_SOT23

1 3

G

2

13

D

2

G

S

Q36

D24

2
3

XDCD#

1

DAN202U_SC70

Title

1394+3 in 1 Card

Size Document Number R e v

Custom

IGT30 LA-3571P

Date: Sheet

SD_MSDATA1

12

SD_MSDATA2

1 2

R631 0_0805_5%

D

S

1 3

2

G

@

2N7002_SOT23

G

2

13

D

S

@

2N7002_SOT23

XDCD# 37

+VCC_4IN1_XD

Q38

Q41

Compal Electronics, Inc.

1

SD_MSDATA1 37

SD_MSDATA2 37

28 47Monday, December 25, 2006

0.1

of

A

1 1

BEEP#33

0.1U_0402_16V4Z@

SB_SPKR21

C453

C454

1

1U_0603_10V4Z

2

1U_0603_10V4Z

C459

12

1 2

560_0402_5%

R348

1 2

12

560_0402_5%

10K_0402_5%@

R352

R356

2

B

12

+VDDA

12

R358
10K_0402_1%

12

1U_0603_10V4Z

R357
10K_0402_1%

1

C

Q26
2SC2411K_SC59

E

3

D11

RB751V_SOD323

2 1

C473

12

MONO_IN1 MONO_IN

1 2

R642 20K_0402_5%

C685

SWDJ

SWDJ@

C805

1U_0603_10V4Z

INT_CD_L

1 2

+5VAMP

2 2

INT_CD_R

+5VAMP

EC_IDERST131

3 3

+5VAMP

+5VAMP

4 4

EC_IDERST1

1M_0402_5%

1U_0603_10V4Z

1 2

1M_0402_5%

1M_0402_5%

SWDJ@

SWDJ@

1M_0402_5%

EC_IDERST33

R788

SWDJ@

SWDJ@

C806

R790

SWDJ@

R796

R799

+5VALW

D

S

12

12

R789
1M_0402_5%

SWDJ@

12

12

R791
1M_0402_5%

SWDJ@

EC_IDERST1

0.1U_0402_16V4Z

LINE_OUTL AMP_LEFT

12

12

R797
1M_0402_5%

SWDJ@

LINE_OUTR AMP_RIGHT

12

12

R801
1M_0402_5%

SWDJ@

EC_IDERST

R803
10K_0402_5%

SWDJ@

1 2

Q81

SWDJ@

13

2N7002_SOT23

2

G

A

+5VALW

14

P
A1B

G7C

+5VALW

14

P
A11B

G7C

SWDJ@

+5VALW

C811

12

14

P
A4B
G7C

+5VALW

14

P
A8B
G7C

@

R804

1 2

0_0402_5%

1 2

R805 0_0402_5%

SWDJ@

DIRECT PLAY PATH

SWDJ@

U71A

AMP_LEFT

2

SN74HCT4066PW_TSSOP14

13

U71B

SWDJ@

AMP_RIGHT

10

SN74HCT4066PW_TSSOP14

12

POWER ON PATH

SWDJ@

U71C

3

SN74HCT4066PW_TSSOP14

5

R798 0_0402_5%

1 2

NOSWDJ@

SWDJ@

U71D

9

SN74HCT4066PW_TSSOP14

6

R802 0_0402_5%

1 2

NOSWDJ@

EC_IDERST

SUSP#

AMP_LEFT 30

AMP_RIGHT 30

SUSP# 18,23,26,28,33,35,42,43, 44

B

470P_0402_50V8J

1 2

C689 1U_0603_10V4Z

12

1 2

R646 20K_0402_5%

INT_CD_L23,31

INT_CD_R23,31

B

+VDDA

12

R648
10K_0402_1%

12

R645
10K_0402_1%

13

EAPD

D

2

G

S

PC Beep for DOS mode

+VDDA

INT_MIC_L30,36
INT_MIC_R30,36

CD_AGND23

R792 20K_0402_5%
R793 20K_0402_5%
R794 20K_0402_5%
R795 20K_0402_5%

JACK_PLUG_MIC37

12
12
12
12

CD_GNA

R848

HDA_RST_AUDIO#20
HDA_SYNC_AUDIO20
HDA_SDOUT_AUDIO20

10K_0402_5%

C

+5VS

L31

1 2

KC FBM-L11-201209-221LMAT_0805

L29

1 2

KC FBM-L11-201209-221LMAT_0805

1

C694 680P_0402_50V7K
C695 680P_0402_50V7K

Q43
2N7002_SOT23

L26

CHB1608U301_0603

1 2

C718

10U_0805_10V4Z

CD_R_L

C808 1U_0402_6.3V4Z

CD_R_R

C809 1U_0402_6.3V4Z

CD_GNA

C810 1U_0603_10V4Z

MIC30

MIC

C698 2.2U_0603_6.3V6K
C715 2.2U_0603_6.3V6K

R647 20K_0402_1%

1 2

EAPD

CD_GNACD_AGND

12

R847
10K_0402_5%

EAPD

10_0402_5%

EAPD33

SPDIF37

12

LINE_OUTL
LINE_OUTR

CD_PLAY23,33

0.1U_0402_16V4Z

1

1

C697

2

2

0.1U_0402_16V4Z

HP_L30

HP_R30

1 2

C691 2.2U_0603_6.3V6K

1 2

C693 2.2U_0603_6.3V6K

1 2
1 2
1 2
1 2
1 2

R641 0_0402_5%

1 2

R639 0_0402_5%

1 2

1 2

L24 CHB1608U301_0603@

R800

1 2

C734

10U_0805_10V4Z

1

C717

2

1 2

C479 1U_0603_10V4Z

1 2

C484 1U_0603_10V4Z

R657 0_0402_5%

1 2

R383 0_0402_5%

1 2

R373 0_0402_5%

1 2

CD_RC_L
CD_RC_R
CD_GNDA
C_MIC

MONO_IN

2

R905

10K_0402_1%

2

G

+5VS

12

+5VS

SWDJ@

13

D

S

+AVDD_AC97

U41

14

LINE2_L

15

LINE2_R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1_L

22

MIC1_R

13

SENSE A

12

PC_BEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

NC

46

NC

47

SPDIFI/EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

ALC262-GR_LQFP48-N

10U_1206_10V4Z

NOSWDJ@

1 2

R900 100_0402_5%

Q96
2N7002_SOT23

SWDJ@

38

AVDD125AVDD2

LINE_OUT_L

LINE_OUT_R

HP_OUT_L

HP_OUT_R

LINE1_VREFO

MIC2_VREFO

MIC1_VREFO_L

MIC1_VREFO_R

LINE2_VREFO

C732

@

1U_0603_10V4Z

MONO_O

BIT_CLK

SDATA_IN

SENSE B

GND GNDA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

GPIO2

GPIO3

DCVOL

GPIO0
GPIO1

AVSS1
AVSS2

1

2

D

+VDDC

DVDD11DVDD2

VREF

LFILT

GNDA

D

C724

9

60mil

35
36
37
39
41

6
8
2

3
29
30
28
27
32

31
33
34
43
44

40
26
42

28.7K for Module Design (VDDA = 4.702)

U42

4

VIN

2

SENSE or ADJ

1

2

DELAY
ERROR7CNOISE

8

SD

SI9182DH-AD_MSOP8

VOUT

GND

5
6
1
3

0.1U_0402_16V4Z

ALC262

ALC861D

R638

CHB1608U301_0603

1 2

1

1

C687

2

0.1U_0402_16V4Z

250_SDIN

10mil
10mil
10mil

R379 10K_0402_5%@
C812 1U_0603_10V4Z861@
C813 1U_0603_10V4Z861@

1

@

C728

0.1U_0402_16V4Z

2

1

C688

C686
10U_0805_10V4Z

2

2

0.1U_0402_16V4Z

C_LINE_OUTL
C_LINE_OUTR

1 2
1 2
1 2

R364
20K_0402_1%

1 2

1 2

C807 1U _0603_10V4Z

R644

1 2

22_0402_5%

R643

1 2

33_0402_5%

R354

1 2

22_0402_5%@

+MIC2_VREFO
+MIC1_VREFO_L

12

C719 10U_0805_10V4Z

+AUD_VREF

R382

+MIC1_VREFO_L+MIC2_VREFO +AUD_VREF

10mil10mil

1

C733

@

2

GNDA

1U_0603_10V4Z

Title

ALC861 VD Codec

Size Document Number Rev

Custom

IGT30 LA-3571P

Date: Sheet

1 2

C721 1U_0603_10V4Z

1 2

C722 1U_0603_10V4Z

HDA_BITCLK_AUDIO

HDA_SDIN0

+VDDA

1

@

C725

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

E

AC97 Codec

(output = 250 mA)

40mil

R655
150K_0603_1%

1

2

+3VS

1 2

LFE_OUT 31

C511

@

1 2
12

C727 1000P_0402_50V7K@
C726 1000P_0402_50V7K@

LINE_OUTL
LINE_OUTR

LFE_OUT 31

22P_0402_50V8J@

1

2

GNDA

1U_0603_10V4Z

E

R654
51K_0603_1%

1 2
1 2

10mil

C716

SUB WOOFER SUPPORT

C_LINE_OUTL
C_LINE_OUTR

C458

12

39.2K_0402_1%

+VDDA

4.85V

1

C692
10U_0805_10V4Z

2

LINE_OUTL
LINE_OUTR

HDA_BITCLK_AUDIO 20
HDA_SDIN0 20

JACK_PLUG_CODEC 37

1

@

C498

0.1U_0402_16V4Z

2

of

29 47Monday, December 25, 2006

0.1

A

+5VAMP

BTL# 31

Q89

S

G

3

+5VAMP

D

6
2

1

PLAY_MODE

W=40mil

0.1U_0402_16V4Z

1

1

C474

C483

4.7U_0805_10V4Z

2

2

VOL_AMP
VOLMAX
BTL#
LIN
RIN

1

C491

4.7U_0805_10V4Z

2

+5VAMP

10U_0805_10V4Z

PLAY_MODE 23

U19

10

VDD

15

VDD

7

VOLUME

8

VOLMAX

13

SE/BTL#

6

LIN-

3

RIN-

4

BYPASS

APA2068KAI-TRL_SOP16

1

C866

2

R368

SWDJ@

VOLUME31,33

(0.65V -> 10dB)

1 1

AMP_LEFT29

AMP_RIGHT29

2 2

R868 0_0402_5%

JACKCTL33

1 2

NOSWDJ@

1 2

R359 0_0402_5%

+5VALW

1

C865
10U_0805_10V4Z

2

10K_0402_5%

NOSWDJ@
1 2
12

R369

1.5K_0402_1%

NOSWDJ@

1 2

R377 0_0402_5%

R376 10K_0402_5%

1 2

R378 10K_0402_5%

1 2

+5VAMP

R914
10K_0402_5%

SWDJ@

1 2

BTL#

13

D

Q99

2

2N7002_SOT23

G

SWDJ@

S

SI3445DV_TSOP6

4 5

SHUTDOWN#

2

C867

0.1U_0402_16V4Z

1

B

R362

10K_0402_5%

1

MUTE

2
9

LOUT-

16

ROUT-

11

LOUT+

14

ROUT+

5

GND

12

GND

+3VALW

@

1 2

MUTE_AMP
AMP_OFF# EC_MUTE#

SPKR­SPKL+
SPKR+

R371 10K_0402_5%

1 2

R372 0_0402_5%

1 2

L7 0_0603_5%

1 2

L8 0_0603_5%

1 2

L11 0_0603_5%

1 2

L9 0_0603_5%

1 2

C

DOS mode

DOS mode

D

Window mode

DOS mode

E

Driver initial

ACPI

SPKL-OSPKL­SPKR-O
SPKL+O
SPKR+O

EC_MUTE

SPKL+O 31
SPKR+O 31

RST

12sec

SPKL+O
SPKL-O
SPKR+O
SPKR-O

C247

47P_0402_50V8J@

+MIC1_VREFO_L +MIC2_VREFO

+MIC2_VREFO

RST

EC_MUTE

1

47P_0402_50V8J@

2

INT MIC

12sec

JP20

1

1

2

2

3

3

4

4

5

G1

1

C246

2

47P_0402_50V8J@

C244

C245

47P_0402_50V8J@

2

2

1

1

6

G1

E&T_3802-E04N-01R

INT MICEXT MIC

12

R667

3K_0402_5%

L12

MIC29 EXT_MIC 37 INT_MIC_R 29,36

1 2

FBM-11-160808-601-T_0603

C497

47P_0402_50V8J

1

2

12

R664
3K_0402_5%

1

C723
47P_0402_50V8J

2

GNDA

INT_MIC_L 29,36

12

R854
3K_0402_5%

1

C856
47P_0402_50V8J

2

GNDAGNDA

HP_L_SWDJ31

3 3

+3VS

12

R653
10K_0402_5%

SWDJ@

R652

EC_MUTE#31,33

4 4

EC_MUTE#

A

1 2

HP_R29
HP_L29

NOSWDJ@

0_0402_5%

21

D39 RB751V_SOD323

SWDJ@

1

C696
1U_0603_10V4Z

2

14
18

15
13

1
3

+3VS

Reserve the 0 ohm resistor.

12

for voltage filtering

R361

0_0603_5%

U17

SHDNR#
SHDNL#

INR
INL

C1P
C1N

C486 1U_0603_10V4Z

10

19

SVDD

PVDD

PGND

PVss

SVss

2

5

7

1

C478
1U_0603_10V4Z

2

B

1 2

OUTR

OUTL

NC-4
NC-6

NC-8
NC-12
NC-16
NC-20

SGND

MAX4411ETP+T_TQFN20~N

17

HP_OUTR

11

HP_OUTL

9

4
6
8
12
16
20

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HP_OUTL

JACK_PLUG
HP_OUTR

C

HP_R_SWDJ31

R663 47_0402_5%

1 2

R662 47_0402_5%

1 2

1K_0402_5%

2006/08/04 2006/10/06

HP_CL+

HP_CR+

12

12

R666

Compal Secret Data

1 2

L28 FBMA-L11-160808-121LMT_0603

1 2

L27 FBMA-L11-160808-121LMT_0603

R665

1K_0402_5%

47P_0402_50V8J

Deciphered Date

C731

D

HEADPHONE

PL

PR

1

1

C729
47P_0402_50V8J

2

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

AMP & Audio Jack

IGT30 LA-3571P

PL 37

JACK_PLUG 33,37
PR 37

30 47Tuesday, Dece mber 26, 2006

E

0.1

of

SWDJ

SWDJ@

C860

1U_0603_10V4Z

SWDJ@

C863

1U_0603_10V4Z

1 2

1M_0402_5%

SWDJ@

SWDJ@

C864

1U_0603_10V4Z

1 2

SWDJ@

1M_0402_5%

EC_IDERST129

1 2

C861

1U_0603_10V4ZSWDJ@

1 2

R858

1M_0402_5%

SWDJ@

12

12

R861
1M_0402_5%

SWDJ@

R863

12

12

R864
1M_0402_5%

SWDJ@

+5VALW

12

USB_ON33,37

12

12

R859
1M_0402_5%

SWDJ@

EC_IDERST1

SWDJ@

C862

0.1U_0402_16V4Z

EC_IDERST1

USB_ON

INT_CD_L23,29

INT_CD_R23,29

+5VAMP

SPKL+O30

R860

+5VAMP

SPKR+O30

+5VAMP

C338 0.1U_0402_16V4Z

+5VALW

12

14

P
A11B

G7C

12

+5VALW

14

P
A4B

G7C

+5VALW

14

P
A8B
G7C

U4

1

GND

2

IN

3

IN

4

EN#

G545C1P1U_SO8

+5VALW

14

P
A1B
G7C

U75B

SWDJ@

10

SN74HCT4066PW_TSSOP14

SWDJ@

U75C

3

SN74HCT4066PW_TSSOP14

5

R862 0_0402_5%

1 2

SWDJ@

U75D

9

SN74HCT4066PW_TSSOP14

6

R865 0_0402_5%

1 2

OUT
OUT
OUT
FLG

DIRECT PLAY PATH

SWDJ@

U75A

0_0402_5% SWDJ@

2

1 2

R917

SN74HCT4066PW_TSSOP14

13

POWER ON PATH

0_0402_5% SWDJ@

1 2

R873

@

0_0402_5% SWDJ@

1 2

R881

@

+USB_VCCA

8
7
6
5

LFE_OUT

1U_0603_10V4Z

@

1 2

1U_0603_10V4Z

@

1 2

1

C336

1000P_0402_50V7K@

2

C870

1 2

R876
0_0402_5%

C871

1 2

R882
0_0402_5%

LFE_OUT 29

LFE_OUT29

+AUD_VREF_LF

1U_0603_10V4Z

SWDJ@

HP_L_SWDJ 30

SWDJ@

HP_R_SWDJ 30

USB_OC#0 21

SUBWOOFER (Reserved for C38)

C822

2

1

WOOFER@

+5VAMP

12

12

R808

100K_0402_5%

R810
100K_0402_5%

R811
100K_0402_5%

C814 1U_0603_10V4Z

1 2

1 2

C817

0.1U_0402_16V4Z

1 2

Gain = 3.1dB

(0.65V -> 10dB)

VOLUME30,33

+AUD_VREF_LF

+AUD_VREF_LF

C818

1 2

1U_0603_10V4Z

C821 100P_0402_50V8J

1 2

R870 0_0402_5%

SWDJ@

BTL#30

NOSWDJ@

1 2

R878 0_0402_5%

MIX_OUT
MIX_OUT

R879 10K_0402_5%
R880 0_0402_5%

3
2

1 2

@

+5VAMP

1 2
12

1 2
1 2

R869
10K_0402_5%

R871

1.5K_0402_1%

+5VAMP

C815 1U_0603_10V4Z

1 2

U72A

8

TLV2462CDR_SO8

P

+

1

O

-

G

4

R809

100K_0402_5%

12

NOSWDJ@

NOSWDJ@

1 2

R877 0_0402_5%

@

USB Port

USB20_N021
USB20_P021

PSOT24C_SOT23@

For EMI

R806

560_0402_5%

+5VAMP

0.1U_0402_16V4Z

1

C868

2

VOL_AMP
VOLMAX
BTL#
WIN1
WIN2

1

2

3

D1

12

R807

560_0402_5%

0.1U_0603_50V4Z

Fc(LPF)= 1.5KHz

W=40mil

1

C869

4.7U_0805_10V4Z

2

U76

10

VDD

15

VDD

7

VOLUME

8

VOLMAX

13

SE/BTL#

6

LIN-

3

RIN-

4

BYPASS

APA2068KAI-TRL_SOP16

C872

4.7U_0805_10V4Z

WOOFER-

WOOFER+

C565

150U_D_6.3VM

2

1

C816 0.1U_0603_50V4Z

1 2

12

2

C820

1

20mil

+3VALW

R872

10K_0402_5%

@

1 2

MUTE_AMP_1

1

MUTE

SHUTDOWN#

LOUT­ROUT­LOUT+
ROUT+

GND
GND

AMP_OFF#1 EC_MUTE#

2
9
16
11

WOFF+

14

5
12

30mil

L51

1 2

L50

1 2

1000P_0402_50V7K

1

+

C266

2

0.1U_0402_16V4Z

+USB_VCCA

1

1

C275

2

2

+5VAMP

8

5

P

+

7

O

6

-

G

U72B
TLV2462CDR_SO8

4

R874 10K_0402_5%

1 2

1 2

R875 0_0402_5%

L60 0_0603_5%

1 2

L61 0_0603_5%

1 2

SubWoofer Conn.

FBMA-L11-160808-700LMT_0603

WO­WO+

FBMA-L11-160808-700LMT_0603

ME@

SUYIN_020173MR004S558ZL

1

1

2

2

3

3

4

4

5

GND

6

GND

7

GND

8

GND

JP21

C819

12

0.22U_0603_10V7K

10mil

EC_MUTE# 30,33

WOOFER-WOOF-

WOOFER+

JP75

1

1

2

2

3

GND

4

GND

MOLEX_53780-0270

ME@

MIX_OUTLFE_OUT

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Bluetooth & U S B CONN.

IGT30 LA-3571P

of

31 47Tuesday, December 26, 2006

0.1

5

D D

C C

B B

INT_KBD CONN.( TYPE "D" KB)

KSI[0..7]

KSO[0..15]

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6

KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15

KSI[0..7] 33,36

KSO[0..15] 33

JP26

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

ACES_85202-2405

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6

KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15

C186 100P_0402_50V8J@
C182 100P_0402_50V8J@
C169 100P_0402_50V8J@
C171 100P_0402_50V8J@
C172 100P_0402_50V8J@
C183 100P_0402_50V8J@
C184 100P_0402_50V8J@
C185 100P_0402_50V8J@
C176 100P_0402_50V8J@
C177 100P_0402_50V8J@
C178 100P_0402_50V8J@
C187 100P_0402_50V8J@
C188 100P_0402_50V8J@
C189 100P_0402_50V8J@
C173 100P_0402_50V8J@
C174 100P_0402_50V8J@
C175 100P_0402_50V8J@
C191 100P_0402_50V8J@
C192 100P_0402_50V8J@
C193 100P_0402_50V8J@
C194 100P_0402_50V8J@
C195 100P_0402_50V8J@
C196 100P_0402_50V8J@
C197 100P_0402_50V8J@

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

4

ON/OFFBTN#36

3

1
2

1
2

ON/OFFBTN#

SW2

SW1

5

6

5

6

EC_ON33,40

3
4

SMT1-05_4P

3
4

SMT1-05_4P

EC_ON

+3VALW

12

R256

4.7K_0402_5%

1 2

R261 33K_0402_5%

13

D

2

G

Q19

S

2N7002_SOT23

100K_0402_5%

1

DAN202U_SC70

2

2

Power BTN

+3VALW

R255

D7

2
3

12

ON/OFF

51ON#

Q18
DTC124EK_SC59

13

1

2

C379

1000P_0402_50V7K

ON/OFF# 33
51ON# 36,39

12

D6
RLZ20A_LL34

1

Kill Switch

+3VS

1 2

KILL_SW#33

R816 10K_0402_5%

KILL_SW#

SW3

3

3

2

2

1

1

1BS003-1211L_3P

+3VALW

JP58

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

+5VS

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
PCI_RST#

SIRQ

5

+3VS

CLK_14M_SIO 15

LPC_FRAME# 20,33
LPC_DRQ#0 20

PCI_RST# 19,28,33
CLK_PCI_DB 15

SIRQ 21,28,33

FOR LPC SIO DEBUG PORT

LPC_AD[0..3]

R622

10K_0402_5%

LPC_AD[0..3] 20,33

12

4

RCIRRX33

+5VALW

+5VS

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

2

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20

ACES_85201-2005

A A

ME@

RCIRRX

CIR

R888
100_0603_5%

NOTV@

1 2

R819

TV@

1 2

33_0402_5%

C827

22P_0402_50V8J

TV@

1 2

R817 100_0603_5%

1 2

R818 100_0603_5%

@

4.7U_0805_10V4Z

Custom

1

TV@

2

IR1

1

Vout

2

1

C826

2

Title

KBD,ON/OFF,T/P,LED/B,DEBUG

Size Document Number Rev

IGT30 LA-3571P

Date: Sheet

VCC

3

GND

4

GND

IRM-V538/TR1_3P

TV@

Compal Electronics, Inc.

32 47Monday, December 25, 2006

1

of

0.1

5

L5

+3VALW +EC_AVCC

D D

C C

B B

1 2

FBM-11-160808-601-T_0603

0.1U_0402_16V4Z

CLK_PCI_LPC15

R5_PME#28

PCI_PME#19

1 2

R298 10K_0402_5%@

KSO[0..15]32

KSI[0..7]32,36

2

C398

1 2

L6 FBM-11-160808-601-T_0603

+5VALW

+3VS

1

ECAGND

12

R312 10_0402_5%@

C422

22P_0402_50V8J@

1 2

R285 0_0402_5%@

1 2

R281 0_0402_5%

KSO17

KSO[0..15]
KSI[0..7]

1 2

R276 4.7K_0402_5%

1 2

R275 4.7K_0402_5%

1 2

R282 4.7K_0402_5%

1 2

R288 4.7K_0402_5%

EC_SMB_CK1
EC_SMB_DA1

EC_SMB_CK2
EC_SMB_DA2

100P_0402_50V8J@

1

C397
1000P_0402_50V7K

2

12

+3VALW

R279
10K_0402_5%

1 2

EC_PME#

C417

ECAGND

KB_RST#20

EC_RST#

+3VALW

0.1U_0402_16V4Z

ISP MODE SUPPOR

1

1

C415

2

2

C382

0.1U_0402_16V4Z

1

2

RB751V_SOD323

2 1

D9

1 2

R224 47K_0402_5%

2

C377

1

12

R231 4.7K_0402_5%@

100P_0402_50V8J@

C431

0.1U_0402_16V4Z

1

2

PCI_CLKRUN#21,28
MODE_LED#36

EC_TX_P80_DATA13,14
EC_RX_P80_CLK13,14

XCLKI
XCLKO

C437

0.1U_0402_16V4Z

LPC_FRAME#20,32

PCI_RST#19,28,32

KSO3

EC_SMB_CK134,46
EC_SMB_DA134,46

EC_SMB_CK24
EC_SMB_DA24

SLP_S3#21
SLP_S5#21

EC_SMI#21

LID_SWITCH#36

PBTN_OUT#21
EC_PME#
EC_THERM#4,21

FAN_SPEED14

JACKCTL30

ON/OFF#32

PWR_LED#36

NUM_LED#36

GATEA2020

LPC_AD320,32
LPC_AD220,32
LPC_AD120,32
LPC_AD020,32

EC_SCI#21

SUSP#18,23,26,28,29,35,42,43,44

1

2

KSO1636
KSO1736

4

C439

0.1U_0402_16V4Z

SIRQ21,28,32

1 2

R223 0_0402_5%@

XCLKI
XCLKO

C425

1000P_0402_50V7K

1

2

LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

EC_RST#
EC_SCI#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

PM_SLP_S5#
EC_SMI#
LID_SWIT CH#
SUSP#

PBTN_OUT#

EC_PME#

EC_THERM#

FAN_SPEED1

EC_TX_P80_DATA
EC_RX_P80_CLK

+3VALW

C413

1000P_0402_50V7K

1

1

2

2

9

22

33

96

VCC

VCC

VCC

VCC

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

SM Bus

GPIO

GND

GND

GND

11

24

35

111

VCC

AD Input

GPIO

GND

94

U20

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

KB926QFA1_LQFP128

Int. K/B
Matrix

3

+EC_AVCC

67

125

VCC

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00
SDICLK/GPXOA01

SDIDO/GPXOA02

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

GPO

BKOFF#/GPXO08

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPI

AGND

GND

69

113

AD3/GPIO3B

AD4/GPIO42

DA3/GPIO3F

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICS#

GPXO10
GPXO11

GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

V18R

21
23
26
27

63
64
65
66
75
76

68
70
71
72

83
84
85
86

TP_CLK

87

TP_DATA

88

97
98
99
109

119
120
126
128

73
74
89

CHARGE_LED0#

90
91

CHARGE_LED1#

92
93
95
121
127

100

EC_LID_OUT#

101
102
103
104
105
106
107
108

110
112
114
115

JACK_DETECT

116
117
118

124

INVT_PWM
BEEP#KB_RST#R
ENLAN1
ACOFF

BATT_TEMP
BATT_OVP

BRD_ID
CHIP_ID

DAC_BRIG
EN_FAN1
IREF

SPI_PULLDOWN

FRD#SPI_SO
FWR#SPI_SI
SPI_CLK
FSEL#SPICS#

CAPS_LED#

SYSON

EC_ON

ICH_POK_EC

BKOFF#

BATT_TEMP

INVT_PWM 16
BEEP# 29

1 2

ACOFF 39,40

BATT_OVP 40
ADP_I 40
BRD_ID

DAC_BRIG 16
EN_FAN1 4
IREF 40
VOLUME 30,31

EC_MUTE# 30,31

TP_LOCK_LED# 36

CMOS_OFF# 36

TP_CLK 37

TP_DATA 37

R336 4.7K_0402_5%

1 2

BT_OFF# 27

CD_PLAY 23,29

MODE# 36

FRD#SPI_SO 34
FWR#SPI_SI 34
SPI_CLK 34

FSEL#SPICS# 34

RCIRRX 32

PCMRST# 23
FSTCHG 40
CHARGE_LED0# 36

CAPS_LED# 36

CHARGE_LED1# 36
NOVO_IN# 36

SYSON 26,35,42
VR_ON 45
ACIN 21,39

EC_RSMRST# 21
EC_LID_OUT# 21
EC_ON 32,40

EC_SWI#

BKOFF# 16

RF_OFF# 27

EC_IDERST 29

SCROLL_LED# 36

SLP_S4# 21
ENBKL 16
EAPD 29

KILL_SW# 32

STB_SB# 35

BATT_IN 46

XCLKO

R883 0_0402_5%

R338

1 2

20M_0603_5%@

2

C381 0.01U_0402_16V7K

R898

0_0402_5%

0_0402_5%

1 2

R294

KB925 SPI STRAP PIN

RB751V_SOD323D37

21

@

1 2

R893 0_0402_5%

1 2

XCLKI

ECAGND

12

EN_WOL 24

BATT_TEMP 46

@

Analog Board ID definition,
Please see page 3.

+3VALW

R574

100K_0402_1%

R578

56K_0402_5%

BRD_ID

1

C621

2

0.1U_0402_16V4Z

1 2

1 2

ID

0
1
2

EC_MUTE#

USB_ON31,37

ICH_POK

1 2

@

3
4
5
6
7

R119(Ra)=100K Ohm

R311 10K_0402_5%@

TP_CLK

R317

TP_DATA

R321

ICH_POK 7,21

+3VS

EN_WOL 24
USB_ON 31,37

R855 10K_0402_5%

JACK_PLUG 37

BRD ID

R01 (EVT)
R02 (DVT)
R03 (PVT)
R10A (MP)

1 2

1 2

4.7K_0402_5%

1 2

4.7K_0402_5%

1 2

R897 10K_0402_5%

+3VALW

R915

100K_0402_1%

1 2

CHIP_ID

1 2

+3VS

+5VS

1

UMA@

R916
10K_0402_5%

VGA@

0

8.2K
18K
33K
56K

100K
200K

NC

VabR578(Rb)

0V

0.25V

0.50V

0.82V

1.19V

1.65V

2.20V

3.30V

ECAGND

ECAGND

EC DEBUG PORT

JP59

A A

+3VALW

EC_TX_P80_DATA
EC_RX_P80_CLK

5

1

1

2

2

3

3

4

4

ACES_85205-0400

ME@

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

C443

15P_0402_50V8J

Compal Secret Data

1

IN

2

32.768KHZ_12.5P_1TJS125BJ2A251

X1

Deciphered Date

C442

4

OUT

NC3NC

15P_0402_50V8J

Compal Electronics, Inc.

Title

ENE-KB925

Size Document Number Rev

Custom

IGT30 LA-3571P

Tuesday, Decem ber 26, 2006

2

Date: Sheet

1

33 47

0.1

of

+3VALW

C658

1 2

0.1U_0402_16V4Z

10K_0402_5%

R908

C879

FSEL#SPICS#

R670 15_0402_5%

SPI_CLK

R617 15_0402_5%
R611 15_0402_5%

SPI_CLK_R

12

33_0402_5%

1

2

22P_0402_50V8J

FSEL#SPICS#33

SPI_CLK33

FWR#SPI_SI33

+3VALW

R885

12
12
12

20mils

1 2

SPI_CS#
SPI_CLK_R
SPI_SIFWR#SPI_SI

SPI_CS#
SPI_SO

SPI Flash (8Mb*1)

U36

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

SST25LF080A_SO8-200mil

JP11

E&T_2941-G08N-00E~D

ME@

112
334
556
778

VSS

4

SPI_SO

2

Q

R613

2
4

SPI_CLK_R

6

SPI_SI

8

15_0402_5%

+3VALW

12

FRD#SPI_SO 33

+5VALW

EC_SMB_CK133,46
EC_SMB_DA133,46

C364

0.1U_0402_16V4Z

1 2

U7

8

VCC

7

WP

6

SCL

5

SDA

AT24C16AN-10SU-2.7_SO8

+5VALW

12

R215
100K_0402_1%

1

A0

2

A1

3

A2

4

GND

12

R221
100K_0402_1%

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

BIOS & EC I/O Port

IGT30 LA-3571P

of

34 47Monday, December 25, 2006

0.1

A

1 1

2 2

STB_SB#33

STB_SB#

2N7002_SOT23 @

3 3

4 4

5 5

6 6

7 7

Q94

2

G

B

+3VALW

+VSB

12

@

13

R903
33K_0402_5%

D

S

1

@

2

@

J1
PAD-OPEN 3x3m

1 2

U77

8

D

7

D

6

D

5

D

SI4800DY_SO8

@

C875

0.1U_0603_25V7K

C

S
S
S
G

1
2
3
4

10U_0805_10V4Z

+3V_SB

1

C876

2

1

C874

2

0.1U_0402_16V4Z

D

SUSP

2N7002_SOT23

2N7002_SOT23

SUSP

2N7002_SOT23

2

G

Q37

2

G

Q7

VGA@

2

Q25

G

+VSB

12

13

+VSB

1 2

13

D

S

D

S

E

+VSB

12

R346
22K_0402_5%

13

D

S

10U_0805_10V4Z

R625
33K_0402_5%

10U_0805_10V4Z

R115
47K_0402_5%

VGA@

C465

10U_0805_10V4Z

C667

1

2

C539

VGA@

1

2

F

+5VALW to +5VS Transfer

+5VALW +5VS

U16

1

2

RUNON

1

C457

0.1U_0603_25V7K

2

8
7
6
5

S

D

S

D

S

D

G

D

SI4800DY_SO8

1
2
3
4

+3VALW to +3VS Transfer

+3VALW

U37

S

D

S

D

S

D

G

D

SI4800DY_SO8

1
2
3
4

8
7

1

6
5

2

C666

0.1U_0603_25V7K

+1.8V to +1.8VS Transfer

+1.8V

U25

S

D

S

D

S

D

G

D

SI4800DY_SO8

VGA@

1
2
3
4

8
7

1

6
5

2

C269

0.1U_0603_25V7K

VGA@

1

2

+3VS

1

2

R623

+1.8VS

1

2

R114

G

0.1U_0402_16V4Z

C468
10U_0805_10V4Z

0.1U_0402_16V4Z

C662
10U_0805_10V4Z

1 2

0_0402_5%@

VGA@

0.1U_0402_16V4Z

C537

VGA@

10U_0805_10V4Z

1 2

0_0402_5%@

1

2

1

2

1

2

C471

C652

RUNON

C538

RUNON

H

+5VS

D

S

D

S

12

R191
470_0402_5%

13

2

G

Q15
2N7002_SOT23

12

R111
470_0402_5%

13

2

G

Q6
2N7002_SOT23

SUSP

I

+5VALW

12

R339
47K_0402_5%

+1.8VS

12

13

D

S

+3VS

12

13

D

S

2

10K_0402_5%

2

R99
470_0402_5%

VGA@

SUSPSUSP

2

G

Q5
2N7002_SOT23

VGA@

R326
470_0402_5%

SUSP

2

G

Q22
2N7002_SOT23

SYSON#

@

SUSP

13

+5VALW

12

13

Q24

DTC124EK_SC59

R183

Q14

DTC124EK_SC59

+0.9VS

12

13

D

S

+2.5VS+1.8V

12

13

D

S

+1.25VS

12

13

D

S

SYSON#

SYSON26,33,42

SUSP43

SUSP#18,23,26,28,29,33,42,43,44

RTCVREF

12

R856
10K_0402_5%

R186
470_0402_5%

2

G

Q16
2N7002_SOT23

R495
470_0402_5%

SUSPSYSON

2

G

Q29
2N7002_SOT23

R333
470_0402_5%

SUSP

2

G

Q23
2N7002_SOT23

J

SUSP

8 8

A

B

C

D

Security Classification

Issued Date

THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

2006/08/04 2006/10/06

F

Compal Secret Data

Deciphered Date

G

Title

Size Document Number Rev

Custom

H

Date: Sheet

Compal Electronics, Inc.

DC/DC Circuit

IGT30 LA-3571P

I

35 47Monday, December 25, 2006

0.1

of

J

5

LED Indicator ON M/B

D D

WIRELESS_LED#27

( 1 )

BTONLED27

Wireless / Bluetooth LED

R820 150_0402_5%

1 2

BTONLED

R821 220_0402_5%

1 2

4

123

BBB

AA

Blue

HT-297UD/NB_BLUE/AMB_0603

Amber

LED1

3

+5VS

21

34

CMOS_OFF#33

CMOS@

2

2

CMOS Camera Conn

+5VS

12

R907
10K_0402_1%

13

CMOS1

USB20_N321
USB20_P321

Q98
DTC124EK_SC59

CMOS@

USB20_N3
USB20_P3

+5VS

AO3413_SOT23

Q97

CMOS@

0_0402_5%

0_0402_5%

NOCMOS@

0_0805_5%

1 2

D

S

13

G

R912

2

R394

12

R393

12

C880

10U_0805_10V4Z

1

R906

C523

0.1U_0402_10V6K

1

2

0_0805_5%

1 2

1

2

ACES_88266-05001

JP42

1

1

2

2

3

3

4

4

5

5

6

GND1

7

GND2

ME@

STATUS

AC

Chargin

Low BATT

( 2 )

CHARGE_LED0#33

( 3 )

CHARGE_LED1#33

PWR_LED#33

C C

BATT_CHG_LED#

CHARGE_LED0#

CHARGE_LED1#

BATT_LOW_LED#

PWR_LED#

R822 150_0402_5%

R823 220_0402_5%

R824 150_0402_5%

Blue : Power On,
Blinking Blue : Suspend

3G_LED#27

B B

+3VALW

A A

TP_LOCK_LED#33

1 2

R391 0_0402_5%

C519

0.1U_0402_16V4Z

1

OUTPUT

2

A3212ELHLT-T_SOT23W-3

5

2

VDD

3

GND

U21

1

R392
47K_0402_5%

1 2

1

2

1 2

D26

C521
10P_0402_25V8K

BLUE

Blinking Blue

Amber

1 2

1 2

1 2

R661 200_0402_5%

R836470_0402_5%

+3VALW

12

R668
100K_0402_5%

21

RB751V_SOD323

Blue

Amber

12

HT-297UD/NB_BLUE/AMB_0603

LED3

1 2

HT-191NB5-DT_BLUE_0603~D

LED4

1 2

HT-191NB5-DT_BLUE_0603~D

1 2

HT-191NB5-DT_BLUE_0603~D

LID_SWITCH# 33

4

LED5

+5VALW

LED2

+3VALW

21

34

51ON#32,39
MODE#33

+3VS

STATUS

AC

+3VS

KEY Matrix

KSI0

KSI1

NOVO BTN

Chargin

Low BATT

Dial Wheel

Function

KO16 KO17

DW-UP DW-DOWN

DW-ENTER MUTE

100K_0402_5%

NOVO_BTN#

D36

1

DAN202U_SC70

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BLUE

Blinking Blue

Amber

NOVA_BTN#

+3VALW

12

R835

NOVO_IN#

2

51ON#

3

3

KSO1633
KSI132,33
KSI032,33
KSO1733

KSI232,33

ON/OFFBTN#32
SCROLL_LED#33

NUM_LED#33

CAPS_LED#33

SATA_LED#20

HDD

CD-ROM

ODD_LED#23

NOVO_IN# 33
51ON# 32,39

2006/08/04 2006/10/06

+5VS +VCC5_LED+5VALW

D34

D35

C839, C841, C842 For EMI Solution

Compal Secret Data

Deciphered Date

100K_0402_5%

1 2

R827 0_0402_5%

1 2

R828 0_0402_5%

NOVO_BTN#

21

CH751H-40_SC76

21

CH751H-40_SC76

+3VALW

12

R904

2
3

DAN202U_SC70

@

KSO16
KSI1
KSI0
KSO17

R887 220_0402_5%
R832 220_0402_5%
R833 220_0402_5%
R834 220_0402_5%

2

D38

1

C830

1 2

1000P_0402_50V7K

1 2
1 2
1 2
1 2

DJ_ON

Left Switch BD(AUDIO DJ)

+5VALW

KSO1733
KSO1633
KSI432,33

KSI332,33
MODE_LED#33
INT_MIC_R29,30
INT_MIC_L29,30

+3VS

R913 150_0402_5%

1 2

JP76

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

GND

14

GND

MOLEX_53780-1270

Right Switch BD

100K_0402_5%

R830

Title

Size Document Number Rev

Custom

Date: Sheet

100K_0402_5%

12

12

R831

@

@

0.1U_0402_16V4Z

1

1

C835

C8340.1U_0402_16V4Z

2

2

Compal Electronics, Inc.

INDICATE LED

IGT30 LA-3571P

1

ACES_87151-16071

16

G18

16

15

G17

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

JP77

of

36 47Monday, December 25, 2006

18
17

0.1

5

4

3

2

1

4 in 1 Card Reader

+VCC_4IN1_XD +VCC_4IN1

SDDATA0_MSDATA028
SDDATA1_MSDATA128
SDDATA2_MSDATA228
SDDATA3_MSDATA328

D D

C C

B B

XDD428
XDD528
XDD628
XDD728

SDCMD_MSBS28

XDWP#28
XDALE28
XDCD#28

SDWP#_XDRB#28

XD_CE#28
XDCLE28

SDDATA0_MSDATA0
SDDATA1_MSDATA1
SDDATA2_MSDATA2
SDDATA3_MSDATA3
XDD4
XDD5
XDD6
XDD7

SDCMD_MSBS
XDWP#
XDALE

SDWP#_XDRB#
SDCLK_MSCLK
XD_CE#
XDCLE

JP12

41

XD-VCC

33

XD-D0

34

XD-D1

35

XD-D2

36

XD-D3

37

XD-D4

38

XD-D5

39

XD-D6

40

XD-D7

30

XD-WE

31

XD-WP

29

XD-ALE

23

XD-CD

25

XD-R/B

26

XD-RE

27

XD-CE

28

XD-CLE

32

XD-GND

24

XD-GND

18

N.C.

42

N.C.

45

SHIELD GND

46

SHIELD GND

TAITW_R012-210-LR

4 IN 1 CONN

SD-VCC
MS-VCC

SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3

SD-CMD

SD-CD-SW

SD-CD-COM

SD-WP-SW

SD-WP-COM

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

MS-INS

MS-BS
SD-GND
SD-GND

MS-GND
MS-GND

15
9

16

SDDATA0_MSDATA0

19

SD_MSDATA1

20

SD_MSDATA2

11

SDDATA3_MSDATA3

12

SDCMD_MSBS

13

SDCD#_XDCD0#

21
22

SDWP#_XDRB#

43
44

MSCLK

8

SDDATA0_MSDATA0

4

SDDATA1_MSDATA1

3

SDDATA2_MSDATA2

5

SDDATA3_MSDATA3

7

MSCD#_XDCD1

6

SDCMD_MSBS

2
14
17
1
10

T/P Board

9

10

ACES_87151-0807G

R651 22_0402_5%

1 2

R649 22_0402_5%

1 2

JP70

1

1

2

2

TP_DATA

3

3

TP_CLK

4

4

9

5

5

10

6

6

7

7

8

8

ME@

SDCLK_MSCLKSDCLK

SDDATA0_MSDATA0 28
SD_MSDATA1 28
SD_MSDATA2 28
SDDATA3_MSDATA3 28
SDCMD_MSBS 28
SDCD#_XDCD0# 28

SDWP#_XDRB# 28

SDCLK_MSCLKXDCD#

SDDATA0_MSDATA0 28
SDDATA1_MSDATA1 28
SDDATA2_MSDATA2 28
SDDATA3_MSDATA3 28
MSCD#_XDCD1 28
SDCMD_MSBS 28

+5VS

SDCLK_MSCLK 28

TP_DATA 33
TP_CLK 33

+LCDVDD +3VS

LVDSAC+9
LVDSAC-9

LVDSA2+9

LVDSA2-9

LVDSA1+9
LVDSA1-9

LVDSA0+9
LVDSA0-9

JACK_PLUG_CODEC29 USB20_P421

E

MMBT3906_SOT23

SWDJ@

3

C

1

1 2

R895 0_0402_5%

NOSWDJ@

JACK_PLUG33

1 2

(60 MIL)

LVDSAC+

LVDSAC­LVDSA2+

LVDSA1+
LVDSA1-

LVDSA0+
LVDSA0-

C836

150U_D_6.3VM

+3VALW

12

R894

SWDJ@

2.2K_0402_5%

B

JACK_PLUG

2

Q91

C513
470P_0402_50V8J

UMA LCD/PANEL Conn.

JP6

16

1116

17

2217

18

3318

19

4419

20

5520

21

6621

22

7722

23

8823

24

9924

25

101025

26

111126

27

121227

28

131328

29

141429

30

151530

32

GND31GND

ME@

ACES_88107-30001

Audio Jack/USB Conn.

1

1

C837

PL30
PR30

2

1 2
1 2
1 2
1 2
1 2

1

C838
1000P_0402_50V7K

2

USB20_N2
USB20_P2

USB20_N4
USB20_P4

EXT_MIC
SPDIF
JACK_PLUG_MIC

PL
PR

C878
470P_0402_50V8J
C512
470P_0402_50V8J
C516
470P_0402_50V8J
C515
470P_0402_50V8J
C514
470P_0402_50V8J

+

0.1U_0402_16V4Z

2

USB20_N221
USB20_P221

USB20_N421

EXT_MIC30
SPDIF29

JACK_PLUG_MIC29

+USB_VCCB

@

0.1U_0402_16V7K

C517

0.1U_0402_16V7K

C518

@

EXT_MICSPDIF
JACK_PLUG_MIC
PR
JACK_PLUG
PL

EDID_CLK_LCD
EDID_DAT_LCD

LVDSBC+

LVDSBC­LVDSB2+

LVDSB2-LVDSA2­LVDSB1+

LVDSB1­LVDSB0+

LVDSB0-

10
11
12
13
14
15
16
17
18
19
20

JP27

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9
10
11
12
13
14
15
16
17
18
19
20

ACES_87213-2000

ME@

EDID_CLK_LCD 9
EDID_DAT_LCD 9

LVDSBC+ 9

LVDSBC- 9

LVDSB2+ 9

LVDSB2- 9

LVDSB1+ 9

LVDSB1- 9

LVDSB0+ 9

LVDSB0- 9

+5VALW

C464 0.1U_0402_16V4Z

12

USB_ON31,33

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

2

USB_ON

U15

1

GND

2

IN

3

IN

4

EN#

G545A1P1U_SO8

+USB_VCCB

8

OUT

7

OUT

6

OUT

5

FLG

1

C476

1000P_0402_50V7K@

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

INDICATE LED

IGT30 LA-3571P

1

USB_OC#2 21
USB_OC#4 21

37 47Monday, December 25, 2006

0.1

A

B

C

D

E

F

G

H

I

J

1 1

2 2

IMVP

VGATE

NB

PWROK

VR_ON

EC

ICH_POK

3 3

4 4

FD1

1

FM8

1

5 5

6 6

H2
HOLEA

1

H24
HOLEA

1

H9
HOLEA

1

1

1

FM7

H1
HOLEA

1

H14
HOLEA

1

1

1

FM6

H25
HOLEA

1

H4
HOLEA

1

H15
HOLEA

1

1

1

FD2

FD3

FD5

FM5

H27
HOLEA

1

H7
HOLEA

1

H16
HOLEA

1

1

1

FD4

FM4

H28

HOLEA

1

H12

HOLEA

1

H18

HOLEA

1

1

1

FD6

FM1

H29
HOLEA

1

H11
HOLEA

1

H19
HOLEA

1

1

FM2

H26
HOLEA

1

H23
HOLEA

1

H8
HOLEA

1

FM3

H21
HOLEA

1

H13
HOLEA

1

1

FM9

H3
HOLEA

1

H17
HOLEA

1

M2
HOLEA

1

CL1
CLIP

H30
HOLEA

1

1

FM11

1

1

H6
HOLEA

1

H5
HOLEA

1

H31
HOLEA

1

VRMPWRGD

PWROK

ICH8

CK_PWRGD

CK505

7 7

8 8

A

B

C

D

Security Classification

Issued Date

THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

2006/08/04 2006/10/06

F

Compal Secret Data

Deciphered Date

G

Title

Size Document Number Rev

Custom

H

Date: Sheet

Compal Electronics, Inc.

Hole

IGT30 LA-3571P

I

38 47Monday, December 25, 2006

0.1

of

J

A

B

C

D

ACIN BATT ONLY

Precharge detector
Min. typ. Max.

H-->L 13.843V 14.247V 14.636V

PJP1

1

1 1

2 2

1

2

2

3

3

4

4

JST_B4B-EH-A(LF)(SN)@

12

PC5

0.068U_0603_25V7M

3.3V

3 3

PR21
560_0603_5%

1 2

+CHGRTC

1 2

PR22
560_0603_5%

VIN

RTCVREF

12

PF1
12A_65V_451012MRL

2 1

12

PR10

PR12

82.5K_0402_1%

215K_0402_1%

1 2

12

PR14

24.9K_0402_1%

PU2
G920AT24U_SOT89

3

OUT

PC11

4.7U_0805_6.3V6K

GND

ADPIN

12

PC1

560P_0402_50V7K

PR175
10K_0402_1%@

1 2

1 2

3

+

2

0.1U_0402_16V7K

IN

PR16
10K_0402_1%

2

-

12

PC6

1

1 2

PR5
1M_0402_1%

VS

8

PU1A

P

O

G

LM393DT_SO8

4

12

PR23
200_0805_5%

12

PC10

1U_0805_25V4Z

PL2
HCB4532KF-800T90_1812

1 2

12

PC2

100P_0402_50V8J

PC131

0.01U_0402_25V7K@

1

RTCVREF

3.3V

PD5
RLS4148_LLDS2

BATT+

CHGRTCP

12

PR27

51ON#32,36

22K_0402_1%

VIN

1 2

12

12

PR9

12

12

12

PC3

100P_0402_50V8J

10K_0805_5%

PD3

RLZ4.3B_LL34

12

12

PR26

100K_0402_5%

PC4

560P_0402_50V7K

PR11
10K_0402_5%

1 2

PACIN

12

PR15

10K_0402_1%

PQ4
TP0610K-T1-E3_SOT23

PC12

0.22U_1206_25V7K

VIN

12

PR1

10_1206_5%

12

PD1

RLZ24B_LL34

ACIN 21,33

PACIN 40

Vin Detector

High 18.135 17.566 17.011
Low 14.866 14.355 14.063

VIN

PD4

RLS4148_LLDS2

1 2
12

12

PR276

68_1206_5%

13

2

PR20

68_1206_5%

12

PC13

VS

MAINPWON41,46

ACON40

PRECHG40

0.1U_0603_25V7K

L-->H 14.936V 15.381V 15.814V

PR2
1K_1206_5%

1 2

ACOFF33,40

100K_0402_1%

PU1B
LM393DT_SO8

PC8

0.1U_0603_25V7K

PR3
1K_1206_5%

1 2

PR4
1K_1206_5%

1 2

PR8
1K_1206_5%

1 2

7

O

PR17

2.2M_0402_5%

PR28
10K_0402_5%

VS

RB715F_SOT323

2
3

PR271
200K_0402_1%

PD2
RLS4148_LLDS2

12

VL

PD6

1

12

12

PR19

12

RTCVREF

12

PR6

100K_0402_5%

13

PQ2
DTC115EUA_SC70-3

2

12

VS

12

PC191

8

P

+

G

4

0.01U_0402_25V7K

5
6

-

12

12

PC9

1000P_0402_50V7K

12

PR30

@

66.5K_0402_1%

Precharge detector

Min. typ. Max.
H-->L 6.138V 6.214V 6.359V
L-->H 7.196V 7.349V 7.505V

PQ1
TP0610K-T1-E3_SOT23

13

12

PR7

100K_0402_5%

2

12

PR24

205K_0402_1%

PRG++

PQ5
RHU002N06_SOT323

13

D

2

G

S

2

12

PR13

100K_0402_5%

13

PQ3
DTC115EUA_SC70-3

13

PR29
47K_0402_5%

PQ6
DTC115EUA_SC70-3

2

12

PR18

499K_0402_1%

12

PR25

499K_0402_1%

12

12

B+

PC7

0.01U_0402_25V7K

PACIN 40

+5VALWP

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

DCIN/DETECTOR

D

39 47Monday, December 25, 2006

of

0.1

A

B

C

D

E

CP mode

PQ9

AO4407_SO8

8

PQ12

2

13

PR66
3K_0402_1%

1 2

2

7
5

47K

47K

1 3

PQ15
DTC115EUA_SC70-3

13

4

2

G

PQ48
DTC115EUA_SC70-3

VIN

1 1

12

PR47

47K_0402_5%

DTA144EUA_SC70

2

13

D

2

PACIN39

ACON39

ACOFF33,39

G

S

PQ16
RHU002N06_SOT323

2 2

3 3

4 4

P2

1
2
36

12

PC27

0.1U_0603_25V7K

12

PR55

150K_0402_1%

IREF 33

13

D

PQ17

S

RHU002N06_SOT323

12

PR46

200K_0402_1%

PR60
133K_0402_1%

1 2

FSTCHG33

PQ10
AO4407_SO8

1
2
3 6

4

A/D

0.22U_0603_16V7K

PR51

10K_0402_1%

MB39A126

1 2

12

12

12

PR53

PC31

10K_0402_1%

0.01U_0402_25V7K

12

12

PR63

100K_0402_1%

8
7

5

ADP_I33

PC133

4700P_0402_25V7K

65W: PR54=34.8K

PR54

90W: PR54=21.0K

34.8K_0402_1%

PC33

MB39A126

0.22U_0603_16V7K

12

PC39

0.01U_0402_25V7K

+3VALWP

2

1

PC28

IREF=0.574~2.56V

12

13

P3

10K_0402_5%

1 2

1 2

PR57
1K_0402_1%

1 2

PR67

47K_0402_5%

PQ19
DTC115EUA_SC70-3

VS

PU12A

8

LM358DR_SO8

P

+

0

-

G

4

65W: 2.8A
90W: 4.0A

12

PR110

PR52
100K_0402_1%

PC34
2200P_0402_50V7K

1 2

13

2

3
2

PR45

1 2

0.02_2512_1%

12

PR61
10K_0402_1%

12

CS

PQ18
DTC115EUA_SC70-3

PR65

0_0402_5%

12

B+

PU4
MB39A126PFV-ER_SSOP24

1

-INC2

+INC2

2

OUTC2

GND

3

+INE2

CS

4

-INE2

VCC

5

ACOK

OUT

6

VREF

VH

7

ACIN

XACOK

8

-INE1

RT

9

+INE1

-INE3

10

OUTC1

FB123

11

SEL

CTL

12

-INC1

+INC1

BATT_OVP33

24

23

22

21

20

PC32

0.1U_0603_25V7K

19

18

PR58

56.2K_0402_1%

17

16

MB39A126

15

14

13

A/D

Fosc=14100/Rt=14100/47=300KHz

PL4
FBMA-L11-322513-201LMA40T_1210

1 2

12

1 2

1 2

PR62

1 2

33K_0402_1%

PC40
10P_0402_50V8J

P3

12

CS

1 2

PR49

PC30

0.1U_0603_25V7K

12

PC23

4.7U_1206_25V6K

0_0402_5%

PC29

0.22U_0603_16V7K

1 2

1 2

PC35
1500P_0603_50V7K

1 2

PC24

4.7U_1206_25V6K

ACON

@

1 2

1 2

PR337

LI-3S :13.5V----BATT-OVP=1.5V
BATT-OVP=0.1112*BATT+

PR277
10K_0402_1%

12

7

0

12

12

PC26

PC25

0.1U_0603_25V7K
2200P_0402_50V7K

578

ACON 39

PR278
0_0402_5%

PD25 RB751V-40TE17_SOD323-2

1 2

PD26 RB751V-40TE17_SOD323-2

1 2

100K_0402_5%

PC41
47P_0402_50V8J

1 2

VS

12

PC42

5

P

+

6

-

G

PU12B
LM358DR_SO8

0.01U_0402_25V7K

8

4

CHG_B+

36

241

PQ13
AO4407_SO8

LXCHRG

16UH_LF919AS-160M=P3_3.7A_20%

1 2

12

12

PD11

PD10

EC31QS04

BATT+

12

PR68

340K_0402_1%

12

PR69

499K_0402_1%

12

PR72

105K_0402_1%

PR48
47K_0402_1%

1 2

PR50

10K_0402_1%

1 2

13

0.1U_0603_25V7K

PL5

EC31QS04

FSTCHG 33

EC_ON 32,33

12

PD23

1SS355TE-17_SOD323-2

1 2

PQ14
DTC115EUA_SC70-3

1 2

2

PC243

PC43

0.01U_0402_25V7K

PQ11
AO4407_SO8

1
2
3 6

4

VIN

ACOFF 33,39

PR336

200K_0402_1%

1 2

PD34
1SS355TE-17_SOD323-2

12

1 2

0.02_2512_1%

D

S

PR56

VIN

13

2

PACIN 39

G

PQ49

RHU002N06_SOT323-3

CC=2.746A

(100K/(100K+ 1 3 3 K ))*2.56V=1.0985V

1.098/(20*0.02)=2.746A

CP Point=2.8A

5V*(10K/(34. 8 K+10K))=1.116V

1.116V/(20*0.02)=2.8A

Charge voltage
3S CC-CV MODE : 12.6V
SEL is L

PJ12
PAD-OPEN 3x3m

1 2

PQ39
AO4407_SO8

8

8

7

7

5

5

12

PR273

10K_0402_1%

47K

47K

1 3

PQ41

12

12

PC36

10U_1206_25VAK

4

PR272
100K_0402_1%

1 2

2

DTA144EUA_SC70

PC37

10U_1206_25VAK

Charger

1
2
36

13

12

PC38

BATT+

PQ40
DTC115EUA_SC70-3

2

PRECHG 39

10U_1206_25VAK

BATT+

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

CHARGER

40 47Monday, December 25, 2006

E

0.1

of

A

B

C

D

B+

PL6
FBMA-L11-322513-201LMA40T_1210

1 2

PC45

0.1U_0603_25V7K

1 2

BST5B

2

3

BST3B

PC46

0.1U_0603_25V7K

1 2

VL

1 1

MAX8743_B+

12

PC50

2200P_0402_50V7K

12

PC51

10U_1206_25VAK

D8D7D6D

S1S2S3G

5

PQ21

4

5HG

5

PR78
0_0402_5%

SI4800BDY-T1-E3_SO8

1 2

DH5

LX5

PR74

1 2

0_0402_5%

D8D7D6D

S1S2S3G

PQ29

4

SI4810BDY-T1-E3_SO8

DL5

PR94

47K_0402_5%@

1 2

BST5A

12

PR280 0_0402_5%

12

2VREF_8734

12

PR89

0_0402_5%

2 2

+5VALWP

1

+

2

3 3

PL7

1 2

4.7UH_PCMC063T-4R7MN_5.5A_20%

MAX8734_B++

VS

PR85

1 2

10.2K_0402_1%

@

PC56

150U_V_6.3VM_R18

PR87

0_0402_5%

1 2

PR86

0_0402_5%@

PR324

0_0402_5%

1 2

1 2

1 2

RLZ5.1B_LL34

PZD1

PR88
47K_0402_5%

1 2

PR91

1 2

100K_0402_5%

12

PC57

0.047U_0603_16V7K@

PC61

VL

0.047U_0603_16V7K@

PD13

1

CHP202UPT_SOT323-3

MAX8743_B+

12

PR76

4.7_1206_5%

MAX8734_B++

VL

PC52

4.7U_1206_25V6K

12

PC54

4.7U_0805_6.3V6K

14

BST5

16

DH5

15

LX5

19

DL5

21

OUT5

9

FB5

1

N.C.

MAX8734AEEI+_QSOP28

6

SHDN#

4

ON5

3

ON3

12

SKIP#

8

REF

12

PC59

0.22U_0603_16V7K

MAX8743_B+

12

PR77

@

12

PC55

12

0.1U_0603_25V7K

13

18

20

V+

LD05

PU6

GND

LDO3

23

25

12

PC60

1 2

4.7_1206_5%

17

TON

PGOOD

10

1 2

PR75

47_0402_5%

ILIM3

VCC

ILIM5
BST3

DH3

DL3
LX3

OUT3

FB3

PRO#

PR92

0_0402_5%

12

12

2VREF_8734

PC53

1U_0603_6.3V6M

5

11
28

26
24
27
22

7
2

PC49

0.1U_0402_16V7K

PR80

1 2

PR83

1 2

PR81

1 2

118K_0402_1%

PR84

1 2

499K_0402_1%

1 2

200K_0402_1%

499K_0402_1%

BST3A

SPOK 46

PR79

0_0402_5%

DH3

12

PC47

2200P_0402_50V7K

3HG

5

D8D7D6D

PQ20

S1S2S3G

4

SI4800BDY-T1-E3_SO8

5

12

PC48

10U_1206_25VAK

LX3

D8D7D6D

PQ30

S1S2S3G

DL3

4

SI4810BDY-T1-E3_SO8

PL8

PR82

1 2

0_0402_5%

1 2

4.7UH_PCMC063T-4R7MN_5.5A_20%

+3VALWP

PR90

1 2

3.57K_0402_1%@

1

+

PC58

2

150U_V_6.3VM_R18

PR93

0_0402_5%

1 2

4.7U_0805_6.3V6K

12

PR323

PC227

806K_0603_1%

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

+5VALWP/+3VALWP

D

41 47Monday, December 25, 2006

of

0.1

PR322

MAINPW O N39,46

0_0402_5%

12

0.047U_0603_25V7M

4 4

A

5

4

3

2

1

PR98
30K_0402_1%

1 2

PC68
4700P_0402_25V7K

1 2

12

PC69

22P_0402_50V8J

PL11

PR109
300K_0402_1%@

1 2

PC80

4700P_0402_25V7K

12

PC81

22P_0402_50V8J

OZ813_B+

PL9
FBMA-L11-322513-201LMA40T_1210

1 2

12

1

+

PR95

51_0402_1%

12

OZ813_B+

12

12

PC70

4700P_0402_25V7K

PR107

51_0402_1%

PC82

4700P_0402_25V7K

2

1

+

2

12

PR333

10.5K_0402_1%

12

PC66

PC78

220U_D2_4VM_R15

220U_D2_4VM_R15

B+

+1.8VP

12

PC228

4.7U_0805_6.3V6K

+1.05VSP

1

12

+

PC229

2

PC230

4.7U_0805_6.3V6K

220U_D2_4VM_R15

D D

1.8VS2N

1.8VS2P

DH_1.8V_1 DH_1.8V_2

PR266

0_0402_5%

SYSON26,33,35

C C

B B

SUSP#18,23,26,28,29,33,35,43,44

12

12

PR103

24K_0402_1%

@

PC184

0.01U_0402_25V7K

@

0_0402_5%

PC72

1 2

PR179
33K_0402_1%

0.022U_0402_16V7K

PR101

12

PC73

1.8VSET

12

12

12

0.1U_0603_25V7K

PR106

150K_0402_1%

1 2

1 2

75K_0402_1%

PR105

PR104

1 2

PR172

1 2

12

+5VALWP

PR99

1 2

22_0402_1%

12

100K_0402_1%

1.05SET

61.9K_0402_1%

PC132

1U_0402_6.3V6K

PC74

PR100

1K_0402_1%

1U_0603_6.3V6M

1 2

12

PC75

0.01U_0402_25V7K

1.8VSET

12

PC65

1000P_0402_50V7K

PU7

25

GNDA

1

ON/SKIP2

2

VIN

3

VREF

4

TSET

5

VDDA

6

ON/SKIP1

OZ813LN_QFN24

12

PC77

1000P_0402_50V7K

19

21

24

23

22

20

LX2

CS2P

CS2N

HDR2

PGD2

VSET2

VSET17CS1N8CS1P9PGD110LX111HDR1

12

PR263

0_0402_5%

@

1 2

+3VALWP

BST2
LDR2

VDDP

GDNP

LDR1
BST1

DH_1.05V_1
LX1.05V

1.05VS1P

1.05VS1N

PR262

0_0402_5%@

1 2

PR269
0_0402_5%

1 2

LX_1.8V

18
17
16
15
14
13

PC76

0.1U_0603_25V7K

+3VALWP

12

PC67

0.1U_0603_25V7K
RB751V-40TE17_SOD323-2

BST_1.8V

1 2

12

1U_0603_6.3V6M

BST_1.05V

1 2

12

RB751V-40TE17_SOD323-2

12

PR270

0_0402_5%

DH_1.05V_2

DL_1.05V

DL_1.8V

PD16

PC71

PD17

5

4

578

3 6

SI4800BDY-T1-E3_SO8

+5VALWP

241

5

PQ22

4

5

4

D8D7D6D

PQ24

S1S2S3G

PQ31
IRF7836PBF_SO8

12

12

SI4684DY-T1-E3_SO8

PC63

D8D7D6D

S1S2S3G

D8D7D6D

S1S2S3G

PC156

10U_1206_25VAK

PR97

100K_0402_1%

1 2

PQ23

1.8VS2P

SI4810BDY-T1-E3_SO8

1.8VS2N

+5VALWP

1UH_PCMB103E-1R0MS_20A_20%

2.2U_0603_6.3V6K

PR108

100K_0402_1%

1 2

12

1.05VS1P

PC79

10U_1206_25VAK

1.05VS1N

PL10

2.2UH_MPL73-2R2_8A_20%

1 2

1 2

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

2

Date: Sheet

1.05VSP/1.8VP

Monday, December 25, 2006

0.1

of

1

42 47

5

8

4

3

2

1

FBMA-L11-322513-201LMA40T_1210

PL12

+5VALWP

12

B+

12

D D

PR283

3K_0402_1%

SUSP#18,23,26,28,29,33,35,42,44

1 2

PC194

1U_0402_6.3V6K

12

12

+5VALWP

12

470K_0402_1%@

PR286

C C

12

12

PC196

33P_0402_50V8J

PC197

0.1U_0402_16V7K@

PR281

1M_0402_5%

PR334

470K_0402_1%

+1.5VSP

12

PR284

21.5K_0402_1%

12

PR288

10.7K_0402_1%

12

PR282
10_0402_5%

PD21

1 2

BST_1.5

RB751V-40TE17_SOD323-2

15

16

13

TON

NC5VSSA

6

14

NC

EN/PSV

PGND7DL

TPAD

17

BST

12

DH

11

LX

10

ILIM

9

VDDP

8

SC411MLTRT_MLPQ16_4X4

PU13

1

12

12

PC199

1000P_0402_50V7K

VOUT

2

VCCA

3

FB

4

PGD

PC200

1U_0603_6.3V6M

PR287

1 2

18.2K_0402_1%

12

PC198
1U_0603_6.3V6M

12

PC195

0.1U_0603_25V7K

DL_1.5

PR285

0_0402_5%

1 2

DH_1.5ADH_1.5

LX_1.5

5

4

5

4

D8D7D6D

SI4800BDY-T1-E3_SO8

S1S2S3G

PQ27

D8D7D6D

SI4810BDY-T1-E3_SO8

S1S2S3G

12

12

PC192

2200P_0402_50V7K

PQ26

PL13

3.3UH_MPL73-3R3_6A_20%

1 2

PC193

10U_1206_25VAK

+1.5VSP

1

12

+

PC88

2

220U_D2_4VM_R15

PC231

4.7U_0805_6.3V6K

VFB=0.5V

B B

+5VS

12

PC93

1U_0603_6.3V6M

6

PU10

7

POK

PR121

2.2K_0402_1%

,29,33,35,42,44

A A

SUSP#

1 2

PC100

1U_0402_6.3V6K

5

8

EN

12

5

VIN

4

VOUT

VCNTL

3

VOUT

2

FB

9

VIN

GND

1

APL5912-KAC-TRL_SO8

+3VS

1

PJ10

1

JUMP_43X79

2

2

12

PC96
22U_1206_6.3V6M

+2.5VSP

PC99

12

PC97

SUSP35

22U_1206_6.3V6M

12

12

PR125

1K_0402_1%

12

0.01U_0402_25V7K

PR122

2.15K_0402_1%

22U_1206_6.3V6M

PR123
10K_0402_1%

PC103

1U_0402_6.3V6K

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

PJ9

1

JUMP_43X118

2

PC94

2

12

1K_0402_1%

12

PR120

PU9

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

0.1U_0402_16V7K

12

PC102
22U_1206_6.3V6M

+0.9VSP

13

12

D

2

G

S

12

12

PQ28

PR124

1K_0402_1%

12

PC101

RHU002N06_SOT323

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

2

6
5

NC

7

NC

8

NC

9

TP

Title

Size Document Number Rev

Custom

Date: Sheet

+3VALWP

12

PC95
1U_0603_6.3V6M

Compal Electronics, Inc.

+1.5VSP/+0.9VSP/+2.5VSP

Monday, December 25, 2006

1

of

43 47

0.1

+1.8VP

5

D D

PR327

0_0402_5%

SUSP#18,23,26,28,29,33,35,42,43

C C

1 2

0.1U_0402_16V7K@

PC234

12

4

12

PC236

33P_0402_50V8J

1M_0402_5%

PR335
470K_0402_1%

+1.25VSP

12

12

PR328

12

PR332

PR325

15.4K_0402_1%

10.2K_0402_1%

3

+5VALWP

12

12

PR326
10_0402_5%

PD22

1 2

BST_1.25

RB751V-40TE17_SOD323-2

15

16

13

TON

NC5VSSA

6

14

NC

BST

12

DH

EN/PSV

TPAD

17

11

LX

10

ILIM

9

VDDP

PGND7DL

8

SC411MLTRT_MLPQ16_4X4

PU16

1

VOUT

2

VCCA

3

FB

4

PGD

12

12

PC240

1000P_0402_50V7K

PC241

1U_0603_6.3V6M

PR331

1 2

12.7K_0402_1%

12

PC239
1U_0603_6.3V6M

12

PC235

0.1U_0603_25V7K

DL_1.25

PR329

0_0402_5%

1 2

DH_1.25ADH_1.25

LX_1.25

2

PL17
FBMA-L11-322513-201LMA40T_1210

1 2

12

12

PC233

PC232

10U_1206_25VAK

2200P_0402_50V7K

5

D8D7D6D

PQ44

S1S2S3G

4

PL19

SI4800BDY-T1-E3_SO8

4.7UH_PCMC063T-4R7MN_5.5A_20%

1 2

5

D8D7D6D

S1S2S3G

4

PQ46

SI4810BDY-T1-E3_SO8

1

+

PC219

2

220U_D2_4VM_R15

B+

+1.25VSP

12

PC237

4.7U_0805_6.3V6K

1

VFB=0.5V

B B

PJ1
PAD-OPEN 3x3m@

1 2

PJ3
PAD-OPEN 3x3m@

+5VALWP

+3VALWP

+1.05VSP

A A

+1.25VSP

1 2

PJ6
PAD-OPEN 3x3m@

1 2

PJ7
PAD-OPEN 3x3m@

1 2

PJ19
PAD-OPEN 3x3m@

1 2

5

+1.5VS+1.5VSP

+5VALW

+3VALW

+VCCP

+1.25VS

+1.8VP

+0.9VSP

+2.5VSP

+VSBP +VSB

+VCCGFX

PJ2
PAD-OPEN 3x3m@

1 2

PJ4
JUMP_43X39@

112

PJ11
JUMP_43X39@

112

PJ8
JUMP_43X39@

112

PR313
0_1206_5%

PR309
0_1206_5%@

+1.8V

2

+0.9VS

2

+2.5VS

2

12

+VCCP

12

UMA PR313
Discrete PR309

4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

1.25VSP

Monday, December 25, 2006

0.1

of

1

44 47

5

D D

PR217

NTC

100K_0402_5%

PR218

1 2

1 2

1 2
1 2
1 2

PR241

10K_0402_1%

1 2

12
12
12
12
12
12

PR253
0_0402_5%@

1 2

PR219 0_0402_5%
PR221 0_0402_5%
PR222 0_0402_5%
PR223 0_0402_5%
PR225 0_0402_5%
PR227 0_0402_5%
PR228 0_0402_5%

C C

B B

CLK_ENABLE#21

PR233 499_0402_1%
PR234 0_0402_5%

VGATE7,21

VR_ON33

PR236 0_0402_5%

PR244
0_0402_5%

1 2

PR247
0_0402_5%

1 2

PR249
0_0402_5%

1 2

CPU_VID05
CPU_VID15
CPU_VID25
CPU_VID35
CPU_VID45
CPU_VID55
CPU_VID65

DPRSLPVR7,21
H_DPRSTP#5,7,20

H_PSI#5

+3VS

PR240

1 2

2K_0402_1%

PR250

1 2

10K_0402_5%

@

H_PROCHOT#4

CPU_POUT

A/D

A A

5

1 2

13K_0402_5%

PR232 71.5K_0402_1%

1 2

PC170 0.22U_0603_16V7K

+3VS

12

PR252

56_0402_5%

PR254
10K_0402_5%@

1 2

0.1U_0402_16V7K@

1 2

PC181

12

VCC

12
12

PC168470P_0402_50V7K

4

PR215
10_0402_5%

PC165
1U_0603_6.3V6M

1 2

PU11

19

Vcc

6

THRM

31

D0

32

D1

33

D2

34

D3

35

D4

36

D5

37

D6

7

TIME

9

CCV

11

REF

39

DPRSLPVR

40

DPRSTP

3

PSI

2

PWRGD

1

CLKEN

38

SHDN

5

VRHOT

4

POUT

MAX8770GTL+_TQFN40

VSSSENSE5

4

PR214

5VS1

0_1206_5%

2.2U_0603_6.3V6K

PC164

PGND1

PGND2

GNDS

+5VS

12

VDD
TON

BST1

DH1

LX1
DL1

GND
CSP1
CSN1

FB

CCI

DH2

BST2

LX2
DL2

CSP2
CSN2

0_0402_5%

1 2

12

12

PR216

1 2

25
8
30
29
28
26
27
18
17
16
12
10
21
20
22
24
23
14
15
13

PC174

4700P_0402_25V7K

PR251

100_0402_5%
PR314

PR255

10_0402_5%

200K_0402_5%

PR220

2.2_0402_5%

BST1_CPU BSTM1_CPU

1 2

DH1__CPU
LX1__CPU
DL1__CPU

CSP1__CPU
CSN1_CPU
FB_CPU
CCI_CPU
DH2_CPU
BST2_CPU
LX2_CPU
DL2__CPU

CSP2_CPU
CSN2__CPU

1 2

1 2

12

PC189

180P_0402_50V8J

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.

PC157

0.01U_0402_25V7K

1 2

12

PR274
0_0402_5%

PC175

12

3

0.22U_0603_16V7K
PC166

1 2

578

PQ33
IRF7836PBF_SO8

3 6

241

12

12

PC188

180P_0402_50V8J

PR239

1 2

2.2_0402_5%

BSTM2_CPU

12

0.22U_0603_16V7K

PC190
180P_0402_50V8J

PR275
0_0402_5%

1 2

NTC
1 2

PR248
20K_0402_1%

2006/08/04 2006/10/06

3

PC187
180P_0402_50V8J

1 2

PR242

3.65K_0402_1%

1 2

PR245

3K_0603_1%@

578

PQ37
IRF7836PBF_SO8

3 6

241

Compal Secret Data

Deciphered Date

CPU_B+

DL1__CPU

1 2

PR238
3K_0603_1%@

1 2

PR246

@

3K_0603_1%

470P_0402_50V7K

DL2__CPU

3 5

241

578

3 6

1 2

0_0402_5%

1 2

PC173

3 5

241

578

3 6

241

2

PC159

10U_1206_25VAK

PQ32
SI7686DP-T1-E3_SO8

PQ34
IRF7836PBF_SO8

241

PR237

PQ35
SI7686DP-T1-E3_SO8

PQ36
IRF7836PBF_SO8

1 2

PR260

0_0402_5%

2

12

PC160

12

12

1 2

12

PR256

12

12

12

PC161

10U_1206_25VAK

10U_1206_25VAK

PR226

PR224

2.1K_0603_1%

6.8_1206_5%
PR230

1 2

3.48K_0402_1%

1 2

PC167

470P_0603_50V7K

PC171

0.022U_0402_16V7K@

1 2

1 2

PR243

100_0402_5%

PC172

4700P_0402_25V7K

12

6.8_1206_5%

PC182

470P_0603_50V7K

1

PL14

FBMA-L11-322513-201LMA40T_1210

12

12

PC163

PC162

0.1U_0603_25V7K

P_0.36H_ETQP4LR36WFC_24A_20%

PC169

0.22U_0603_16V7K

1 2

PC176

PR257

2.1K_0603_1%

2200P_0402_50V7K

PL15

12

PR231

10KB_0603_5%_ERTJ1VR103J

1 2

CPU_VCC_SENSE

12

12

12

PC177

PC178

10U_1206_25VAK

3.48K_0402_1%

1 2

Size Document Number Rev

Date: Sheet

10U_1206_25VAK

10U_1206_25VAK

PL16

P_0.36H_ETQP4LR36WFC_24A_20%

Title

Custom

PR258

10KB_0603_5%_ERTJ1VR103J

PC183

0.22U_0603_16V7K

1 2

Compal Electronics, Inc.

+CPU_CORE

CPU_B+

12

PC180

PC179

0.1U_0603_25V7K

12

NTC

PR259

1 2

+CPU_CORE

12

1

+

2

+CPU_CORE

12

PR229

10_0402_5%

12

2200P_0402_50V7K

1

PC158

100U_25V_M

45 47Monday, December 25, 2006

1

+

2

VCCSENSE5

B+

PC242

100U_25V_M

PR235

1 2

of

0_0402_5%

0.1

A

B

C

D

12

PC14

1000P_0402_50V7K

+3VALWP

12

PC21

BATT++

12

A/D

+VSBP

0.1U_0603_25V7K

PC15

1000P_0402_50V7K

ALI/MH#

PL3
HCB4532KF-800T90_1812

1 2

BATT_TEMP 33

EC_SMB_DA1 33,34
EC_SMB_CK1 33,34

BATT_TEMP33

BATT+

PH1 under CPU botten side :

CPU thermal protection at 84 degree C
Recovery at 45 degree C

12

PC16

0.01U_0402_25V7K

PC226

0.22U_0603_16V7K

PR338
470K_0402_1%

CPU

0_0402_5%

12

12

PH1
100K_0603_1%_TH11-4H104FT

N71

PR317

PR318

215K_0603_1%

1 2

N72 OTPFB2

1 2

12

VL

PR320

24.3K_0603_1%

1 2

PR319
100K_0402_1%

100K_0402_1%

12

RTCVREF

12

PC244
1000P_0402_50V7K@

PR339
30K_0402_1%

12

PR340

470K_0402_1%

PR321

1 2

OTPREF2

1 2

5

+

6

-

12

PC245
1000P_0402_50V7K

VSVL

PC224

0.1U_0603_25V7K

1 2

VL

PR315

470K_0402_1%

1 2

8

PU15A

3

P

+

1

O

2

-

G

LM393DT_SO8

4

PR316
470K_0402_1%

1 2

12

PC225
1000P_0402_50V7K

VS +3VALWP +3VALWP

PR341
470K_0402_1%

8

PU15B

P

O

G

LM393DT_SO8

4

1 2

7

1 2

13

D

2

G

S

OTP

PR342
470K_0402_1%

2

PQ50
RHU002N06_SOT323

MAINPWON39,41

G

BATT_IN 33

13

D

PQ47
RHU002N06_SOT323

S

PJP2

@

ALLTO_C103D6-10701-L

1

2
3
4

1 1

2 2

3 3

5
6
7

SPOK41

1

2
3
4
5
6
7

VL

PR43

1 2

1 2

BATT_S1

ALI/NIMH#

AB/I

TS_A
EC_SMDA
EC_SMCA

B+

PR44

100K_0402_5%

0_0402_5%

12

12

PR31

100_0402_1%

2

G

PC22

0.1U_0402_16V7K

12

PR35

100_0402_1%

PR42
22K_0402_1%

1 2

13

D

PQ8

S

RHU002N06_SOT323

PR177
1K_0402_1%

1 2

12

12

PR38

1K_0402_1%

PF2
12A_65V_451012MRL

2 1

PR176

1K_0402_1%

PR36

6.49K_0402_1%

1 2

12

12

PR41

100K_0402_5%

PR178
47K_0402_5%

1 2

PQ7
TP0610K-T1-E3_SOT23

PC20

0.22U_1206_25V7K

2

+3VALWP

13

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.
BATTERY CONN. / OTP

D

46 47Monday, December 25, 2006

of

0.1

A

B

C

D

E

Version change list (P.I.R. List) Page 1 of 1

Rev. PG# Modify List B.Ver# PhaseFixed IssueItem

1 1

Improve CPU input capcaity noise issue Advence CPU input capacity PC24245

1

Decrease S5 power consumption. 40

2

Delete PR59
ADD PD19 PD

、

、

20.

PR64.

Protect battery discharge mos damage
when plug 15V adapter.

3

Improve 1.8v transient response. 42 Change PL10 to 2.2u, PR98 to 30k_0402_1%

4

45

42

2 2

3 3

Adjust power sequence.

5

For improve EPA 46 Add PR338, PR339, PR340, PR341, PR342, PC244, PC245, PQ50

6

43

Delete PD12.
ADD PD21 PD22 PR250 PQ50 PC198..

、、 、、

For adjust +1.8VP, Change PR179 to 33k_0402_1% and add PC132 1u_0402_6.3v
For adjust +1.5VSP, Change PR283 to 3k_0402_1% and add PC194 1u_0402_6.3v
For adjust +2.5VSP, Change PR121 to 2.2k_0402_1% and add PC100 1u_0402_6.3v
For adjust +0.9VSP, Change PR123 to 10k_0402_1% and add PC103 1u_0402_6.3v

4 4

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

POWER PIR

Size D ocument Number Rev

Date: Sheet

E

of

47 47Monday, December 25, 2006

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

Rev. PG# Modify List B.Ver# PhaseFixed IssueItem

D D

C C

Add Energize star function Add C(874~876),R903,J1,Q94,U7735

1

Modify LAN chip power control A2 24 Add C 877,R902,Q93

2

Fixed Speaker no function A2 37 Change Q91 form SI2301BDS to MMBT3906, Del R895

3

Fixed SWDJ function can't work A2 36 Add R904

4
5
6

Fixed USB Port4 can't work A2 27 Swap USB_N4 & USB_P4

7

Fixed EMI issue A2 32 37 Add R908,C878,C879

8

Fixed SWDJ mode EC_MUTE# ISSUE

Fixed CMOS noise B 36 Add R912,C880

9

Fixed EMI B 25 Add C881,C882

10

Add chipset id B 33

11

Fix SWDJ Subwoofer issue B 31 Add R917

12

A2

Add R905,Q9629A2Fixed Audio Codec can't work

B 30 Add D39,Q99,R914

Add R915,R916

B B

A A

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

POWER PIR

Size D ocument Number Rev

Date: Sheet

1

of

48 48Tuesday, December 26, 2006