Lenovo E15 THINKPAD Schematic

A

VInafix.com

B

C

D

E

1 1

LCFC Confidential

Skids/Mudflap

2 2

NM-C421 Rev1.0 Schematic

3 3

E14/R14/E15/R15

Intel Comet Processor with DDR4 + PCH

AMD R19M-P25 50/70

AMD

2019-07-05 Rev1.0

R19M-M25-50

4 4

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENTEXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENTEXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENTEXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAYBE USED BY OR D ISCLOSED TOANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAYBE USED BY OR D ISCLOSED TOANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

A

B

MAYBE USED BY OR D ISCLOSED TOANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

C

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2016/01/12

2016/01/12

2016/01/12

D

Title

COVER PAGE

COVER PAGE

COVER PAGE

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number R

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

1 128

1 128

1 128

E

ev

0.1

0.1

0.1

A

VInafix.com

B

C

D

E

HDD FFC cable

Type M CONN

Type M CONN

(2CH 4W/4ohm)

MIC IN/GND

HP R/L

DDR4

2400 Mhz
SODIMM A

(PORT 5)

Page 33~34

HDD 2.5"HDD CONN

PCIE SSD

SATA SSD

2CH Speaker

Page 82

Univeral Jack

Page 79

power botton&Finger Print

MDI

USB 2.0 x 1

JYT
JYAA139A

Giga LAN

Realtek
R8111GUS

USB 2.0 x 1

PCIe x 1

(PCIE Lane 9)

IO_Board

(PORT 9)

GPU

DDR5

VRAM

GDDR5

Page 45

(PORT 6)

(PORT 8)

SMBus

PS2

DIS only (SWG)

15" LCD FHD

Touch Panel (Optional)

Camera(Digital MIC)

LENOVO LED Logo

USB
JUSB3(Type-C)

Page 63

SMBus

I2C

G-sensor

Fintek

LIS3DSHTR

Page 51

Page 51

Embedded Controller

ITE

IT8227E-256

FAN

1 1

2 2

Thermal Sensor

Fintek

F75303M

Page 92

Click PadTrack Point

3 3

Page 89Page 89 Page 85

AMD

(R19M-P25-70)
(R18M-M2-60)

eDP x 2

USB 2.0 x 1

LED signal

Type-C PD
CONTROLLER

RTS5455

Page 59

HDMI Conn.

Page 54

Int. K/B Matrix SPI BUS

Flash ROM

Int. KB

16+8M

TPM 2.0

M:ST ST33HTPH2E32AHC0
S:Nuvoton NPCT750LABYX

Page 37~44

PCIE x 4

(PCIE Lane 5~8)

eDP coxail Y cable(40 Pin)

USB2.0

(PORT 2)

USB3.0

DDI1

DDI2

LPC BUS

eSPI BUS(RES ERVED)

Mirror function

SPI BUS

Page 21Page 88Page 90Page 91

Page 98

(PORT 2)

Intel CPU

Comet Lake U

15W (UM A& DIS)

Comet Lake PCH-LP

10 USB 2.0/1.1 Ports

6 USB 3.0 Ports

3 SATA Ports

16 PCIE Ports

HD Audio

LPC I/F

ACPI 3.0

NON interleave

USB 2.0 x 1

U

SB 3.0 x 1

USB 2.0 x 1

USB 3.0 x 1

SATA x 1

PCIE x 4

SATA x 1

PCIE x 1
USB 2.0 x 1
CNVi(TBD)

HDA

DDR4 400MHz

(PORT 4)

(PORT 4)

(PORT 3)

(PORT 3)

(PCIE Lane 11)

(

PCIELane13~16)

(TBD)

(PCIE Lane 10)
(PORT 5)

Left-Front

JUSB2

USB 2.0 Port 1
USB 3.0 Port 2

Page 69

Left-Back

JUSB3(AOU)

USB 2.0 Port 1
USB 3.0 Port 2

Page 69

Page 96

M2 Slot for 2280
(

Type M CONN)

Page 64

NGFF Card WLAN
(Type E)

Page 66

HDA Codec

Synaptics
CX11880- 11Z

Page 78

40 PIN WTB Cable

MB_40 Pin conn IO_40 Pin conn

Page 73

TOUCH FPR

RJ45 Conn.

4 4

Page ??

JUSB4 (USB2.0)

Page ??

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

D

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2016/01/12

2016/01/12

2016/01/12

Title

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

Date: Sheet of

Date: Sheet of

Date: Sheet of

E

2 128

2 128

2 128

0.1

0.1

0.1

5

VInafix.com

TABLE : Functional Strap

GPP_E19/DDP1_CTRLDATA/TBT_LSX0_RXD (DDP1 I2C / TBT LSX #0 PINS VCCIO CONFIGURATION)

GPP_E21/DDP2_CTRLDATA/TBT_LSX1_RXD (DDP2 I2C / TBT LSX #1 PINS VCCIO CONFIGURATION)

GPP_D10/DDP3_CTRLDATA/TBT_LSX2_RXD (DDP3 I2C / TBT LSX #2 PINS VCCIO CONFIGURATION)

D D

GPP_D12/DDP4_CTRLDATA/TBT_LSX3_RXD (DDP4 I2C / TBT LSX #3 PINS VCCIO CONFIGURATION)

HIGH

3.3V

1.8V

LOW

4

DP port

DDPB_CTRLDAT A

DDPC_CTRLDAT A

Pull up to 3.3 V with 2.2-k ohm ± 5% resistor

Pull up to 3.3 V with 2.2-k ohm ± 5% resistor

3

Enable Disable

no connect

no connect

2

1

DDIP1_0N

DDIP1_0N59

DDIP1_0P

DDIP1_0P59

DDIP1_1N

DDIP1_1N59

DDIP1_1P

HDMI

DDIP2_CTRLCLK54
DDIP2_CTRLDATA54

-GPU_RST37
GFX_PWR_EN50

DDIP1_1P59

DDIP1_2N

DDIP1_2N59

DDIP1_2P

DDIP1_2P59

DDIP1_3N

DDIP1_3N59

DDIP1_3P

DDIP1_3P59

DDIP2_2N

DDIP2_2N54

DDIP2_2P

DDIP2_2P54

DDIP2_1N

DDIP2_1N54

DDIP2_1P

DDIP2_1P54

DDIP2_0N

DDIP2_0N54

DDIP2_0P

DDIP2_0P54

DDIP2_3N

DDIP2_3N54

DDIP2_3P

DDIP2_3P54

Change to 2K for 15m test

DDIP2_CTRLCLK
DDIP2_CTRLDATA

-GPU_RST
GFX_PWR_EN

R0315 0_0201_SP

TX Net NAME:1R8VIDEO_AON_ON

VCC3B

VCC3_SUS

12

R03131/16W_2K_5%_0402

12

12

DIS@

12

12

R03111/20W_20K_5%_0201

R03011/20W_2.2K_5%_0201

R03141/16W_2K_5%_0402

@

1 2

GFX_PWR_EN_PCH

GPP_H17

12

12

R0309

DIS@

@

R0308

R0312

1/20W_1M_1%_0201

1/20W_1M_1%_0201

1/20W_20K_5%_0201

4

TYPE-C

C C

To VGA_CORE IC, RPC3.7

B B

eDP_RC OMP
Trace Width: 5 mils
Isolation Spacing: 25 mils
Resistor Value: 24.9 or 100 ohm 1%
Max Length: 600 mils

Pull-up to VCCIO through 24.9-ohm 1%resistor.
For CNL, it is 100 ohm 1%
Please refer to PDG Table 3-2.

Cited by 575412_WHL_U_PDG_Rev0.9

A A

5

AL5
AL6
AJ5
AJ6
AF6
AF5
AE5
AE6

AC4
AC3
AC1
AC2
AE4
AE3
AE1
AE2

VCCIO

12

R0307

1/20W_24.9_1%_0201

EDP_COMP

AM6

CC8

GPP_E19

CC9

CH4
CH3

CP4
CN4

CR26
CP26

UCPU1A

DDI1_TXN_0
DDI1_TXP_0
DDI1_TXN_1
DDI1_TXP_1
DDI1_TXN_2
DDI1_TXP_2
DDI1_TXN_3
DDI1_TXP_3

DDI2_TXN_0
DDI2_TXP_0
DDI2_TXN_1
DDI2_TXP_1
DDI2_TXN_2
DDI2_TXP_2
DDI2_TXN_3
DDI2_TXP_3

DISP_RCOMP

GPP_E18/DPPB_CTRLCLK/CNV_BT_HOST_WAKE#
GPP_E19/DPPB_CTRLDATA

GPP_E20/DPPC_CTRLCLK
GPP_E21/DPPC_CTRLDATA

GPP_E22/DPPD_CTRLCLK
GPP_E23/DPPD_CTRLDATA

GPP_H16/DDPF_CTRLCLK
GPP_H17/DDPF_CTRLDATA

@

WHISKEYLAKE-U_BGA1528

EDP_TXN_0
EDP_TXP_0
EDP_TXN_1
EDP_TXP_1
EDP_TXN_2
EDP_TXP_2
EDP_TXN_3
EDP_TXP_3

EDP_AUX_N
EDP_AUX_P

DISP_UTILS

DDI1_AUX_N
DDI1_AUX_P
DDI2_AUX_N
DDI2_AUX_P
DDI3_AUX_N
DDI3_AUX_P

GPP_E13/DDPB_HPD0/DISP_MISC0
GPP_E14/DDPC_HPD1/DISP_MISC1
GPP_E15/DPPD_HPD2/DISP_MISC2
GPP_E16/DPPE_HPD3/DISP_MISC3

GPP_E17/EDP_HPD/DISP_MISC4

EDP_BKLTEN

EDP_VDDEN

EDP_BKLTCTL

1 of 20

12

12

2015/01/12

2015/01/12

2015/01/12

EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1

EDP_AUXN
EDP_AUXP

DDIP1_AUXN
DDIP1_AUXP

DDIP1_HPD
DDIP2_HPD

EDP_HPD

VGA_BLON
PANEL_POWER_ON_CPU
PANEL_BKLT_CTRL_CPU

1/20W_10K_5%_0201

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

2

R0310

Deciphered Date

Deciphered Date

Deciphered Date

EDP_TXN0 51
EDP_TXP0 51
EDP_TXN1 51
EDP_TXP1 51

EDP_AUXN 51
EDP_AUXP 51

DDIP1_AUXN 59
DDIP1_AUXP 59

DDIP1_HPD 59
DDIP2_HPD 54

EDP_HPD 51

VGA_BLON 85

PANEL_BKLT_CTRL_CPU 51

1 2

PANEL_POWER_ON 51

2016/01/12

2016/01/12

2016/01/12

Title

Title

Title

CPU (1/16): DDI/TYPE-C

CPU (1/16): DDI/TYPE-C

CPU (1/16): DDI/TYPE-C

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

3 128

3 128

3 128

AG4
AG3
AG2
AG1
AJ4
AJ3
AJ2
AJ1

AH4
AH3

AM7

AC7
AC6
AD4
AD3
AG7
AG6

CN6
CM6
CP7
CP6
CM7

CK11
CG11
CH11

@

LCD_SELF_TEST_ON51,85

3

@

R0303

R0304

R0302

R0306

R0305

1 2

1 2

1 2

1 2

1 2

1/20W_100K_5%_0201

1/20W_100K_5%_0201

1/20W_100K_5%_0201

1/20W_100K_5%_0201

1/20W_100K_5%_0201

PANEL_POWER_ON_CPU PANEL_POWER_ON

LCD_SELF_TEST_ON

D0301 RB520CM-30T2R_VMN2M2

D0302 RB520CM-30T2R_VMN2M2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

0.1

0.1

0.1

5

VInafix.com

TABLE

Pin

D D

Block 0

C C

Block 2

Block 4

B B

Block 6

A A

A26
D26
D28
C28
B26
C26
B28
A28
B30
D30
B33
D32
A30
C30
B32
C32

H37
H34
K34
K35
H36
H35
K36
K37
N36
N34
R37
R34
N37
N35
R36
R35

AN35
AN34
AR35
AR34
AN37
AN36
AR36
AR37
AU35
AU34

AW35
AW34
AU37
AU36
AW36
AW37

BA35
BA34
BC35
BC34
BA37
BA36
BC36
BC37
BE35
BE34
BG35
BG34
BE37
BE36
BG36
BG37

Interleave

DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]

DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]

DDR0_DQ[16]
DDR0_DQ[17]
DDR0_DQ[18]
DDR0_DQ[19]
DDR0_DQ[20]
DDR0_DQ[21]
DDR0_DQ[22]
DDR0_DQ[23]
DDR0_DQ[24]
DDR0_DQ[25]
DDR0_DQ[26]
DDR0_DQ[27]
DDR0_DQ[28]
DDR0_DQ[29]
DDR0_DQ[30]
DDR0_DQ[31]

DDR0_DQ[32]
DDR0_DQ[33]
DDR0_DQ[34]
DDR0_DQ[35]
DDR0_DQ[36]
DDR0_DQ[37]
DDR0_DQ[38]
DDR0_DQ[39]
DDR0_DQ[40]
DDR0_DQ[41]
DDR0_DQ[42]
DDR0_DQ[43]
DDR0_DQ[44]
DDR0_DQ[45]
DDR0_DQ[46]
DDR0_DQ[47]

DDR0_DQ[48]
DDR0_DQ[49]
DDR0_DQ[50]
DDR0_DQ[51]
DDR0_DQ[52]
DDR0_DQ[53]
DDR0_DQ[54]
DDR0_DQ[55]
DDR0_DQ[56]
DDR0_DQ[57]
DDR0_DQ[58]
DDR0_DQ[59]
DDR0_DQ[60]
DDR0_DQ[61]
DDR0_DQ[62]
DDR0_DQ[63]

Non-Interleave

DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]

DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]

DDR0_DQ[32]
DDR0_DQ[33]
DDR0_DQ[34]
DDR0_DQ[35]
DDR0_DQ[36]
DDR0_DQ[37]
DDR0_DQ[38]
DDR0_DQ[39]
DDR0_DQ[40]
DDR0_DQ[41]
DDR0_DQ[42]
DDR0_DQ[43]
DDR0_DQ[44]
DDR0_DQ[45]
DDR0_DQ[46]
DDR0_DQ[47]

DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]

DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]

DDR1_DQ[32]
DDR1_DQ[33]
DDR1_DQ[34]
DDR1_DQ[35]
DDR1_DQ[36]
DDR1_DQ[37]
DDR1_DQ[38]
DDR1_DQ[39]
DDR1_DQ[40]
DDR1_DQ[41]
DDR1_DQ[42]
DDR1_DQ[43]
DDR1_DQ[44]
DDR1_DQ[45]
DDR1_DQ[46]
DDR1_DQ[47]

4

Block 0

Block 2

Block 4

Block 6

UCPU1B

A26

DDR0_DQ_0/DDR0_DQ_0

D26

DDR0_DQ_1/DDR0_DQ_1

D28

DDR0_DQ_2/DDR0_DQ_2

C28

DDR0_DQ_3/DDR0_DQ_3

B26

DDR0_DQ_4/DDR0_DQ_4

C26

DDR0_DQ_5/DDR0_DQ_5

B28

DDR0_DQ_6/DDR0_DQ_6

A28

DDR0_DQ_7/DDR0_DQ_7

B30

DDR0_DQ_8/DDR0_DQ_8

D30

DDR0_DQ_9/DDR0_DQ_9

B33

DDR0_DQ_10/DDR0_DQ_10

D32

DDR0_DQ_11/DDR0_DQ_11

A30

DDR0_DQ_12/DDR0_DQ_12

C30

DDR0_DQ_13/DDR0_DQ_13

B32

DDR0_DQ_14/DDR0_DQ_14

C32

DDR0_DQ_15/DDR0_DQ_15

H37

DDR0_DQ_16/DDR0_DQ_32

H34

DDR0_DQ_17/DDR0_DQ_33

K34

DDR0_DQ_18/DDR0_DQ_34

K35

DDR0_DQ_19/DDR0_DQ_35

H36

DDR0_DQ_20/DDR0_DQ_36

H35

DDR0_DQ_21/DDR0_DQ_37

K36

DDR0_DQ_22/DDR0_DQ_38

K37

DDR0_DQ_23/DDR0_DQ_39

N36

DDR0_DQ_24/DDR0_DQ_40

N34

DDR0_DQ_25/DDR0_DQ_41

R37

DDR0_DQ_26/DDR0_DQ_42

R34

DDR0_DQ_27/DDR0_DQ_43

N37

DDR0_DQ_28/DDR0_DQ_44

N35

DDR0_DQ_29/DDR0_DQ_45

R36

DDR0_DQ_30/DDR0_DQ_46

R35

DDR0_DQ_31/DDR0_DQ_47

AN35

DDR0_DQ_32/DDR1_DQ_0

AN34

DDR0_DQ_33/DDR1_DQ_1

AR35

DDR0_DQ_34/DDR1_DQ_2

AR34

DDR0_DQ_35/DDR1_DQ_3

AN37

DDR0_DQ_36/DDR1_DQ_4

AN36

DDR0_DQ_37/DDR1_DQ_5

AR36

DDR0_DQ_38/DDR1_DQ_6

AR37

DDR0_DQ_39/DDR1_DQ_7

AU35

DDR0_DQ_40/DDR1_DQ_8

AU34

DDR0_DQ_41/DDR1_DQ_9

AW35

DDR0_DQ_42/DDR1_DQ_10

AW34

DDR0_DQ_43/DDR1_DQ_11

AU37

DDR0_DQ_44/DDR1_DQ_12

AU36

DDR0_DQ_45/DDR1_DQ_13

AW36

DDR0_DQ_46/DDR1_DQ_14

AW37

DDR0_DQ_47/DDR1_DQ_15

BA35

DDR0_DQ_48/DDR1_DQ_32

BA34

DDR0_DQ_49/DDR1_DQ_33

BC35

DDR0_DQ_50/DDR1_DQ_34

BC34

DDR0_DQ_51/DDR1_DQ_35

BA37

DDR0_DQ_52/DDR1_DQ_36

BA36

DDR0_DQ_53/DDR1_DQ_37

BC36

DDR0_DQ_54/DDR1_DQ_38

BC37

DDR0_DQ_55/DDR1_DQ_39

BE35

DDR0_DQ_56/DDR1_DQ_40

BE34

DDR0_DQ_57/DDR1_DQ_41

BG35

DDR0_DQ_58/DDR1_DQ_42

BG34

DDR0_DQ_59/DDR1_DQ_43

BE37

DDR0_DQ_60/DDR1_DQ_44

BE36

DDR0_DQ_61/DDR1_DQ_45

BG36

DDR0_DQ_62/DDR1_DQ_46

BG37

DDR0_DQ_63/DDR1_DQ_47

WHISKEYLAKE-U_BGA1528

Pin

C27
D27
D31
C31

J35
J34
P34
P35

AP35
AP34
AV34
AV35

BB35
BB34

BF34
BF35

DDR0_DQSN_0/DDR0_DQSN_0
DDR0_DQSP_0/DDR0_DQSP_0
DDR0_DQSN_1/DDR0_DQSN_1
DDR0_DQSP_1/DDR0_DQSP_1
DDR0_DQSN_2/DDR0_DQSN_4
DDR0_DQSP_2/DDR0_DQSP_4
DDR0_DQSN_3/DDR0_DQSN_5
DDR0_DQSP_3/DDR0_DQSP_5
DDR0_DQSN_4/DDR1_DQSN_0
DDR0_DQSP_4/DDR1_DQSP_0
DDR0_DQSN_5/DDR1_DQSN_1
DDR0_DQSP_5/DDR1_DQSP_1
DDR0_DQSN_6/DDR1_DQSN_4
DDR0_DQSP_6/DDR1_DQSP_4
DDR0_DQSN_7/DDR1_DQSN_5
DDR0_DQSP_7/DDR1_DQSP_5

2 of 20

Interleave

DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]

DDR0_DQSN[2]
DDR0_DQSP[2]
DDR0_DQSN[3]
DDR0_DQSP[3]

DDR0_DQSN[4]
DDR0_DQSP[4]
DDR0_DQSN[5]
DDR0_DQSP[5]

DDR0_DQSN[6]
DDR0_DQSP[6]
DDR0_DQSN[7]
DDR0_DQSP[7]

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47

TABLE

DDR0_CKN_0/DDR0_CKN_0
DDR0_CKP_0/DDR0_CKP_0
DDR0_CKN_1/DDR0_CKN_1
DDR0_CKP_1/DDR0_CKP_1

DDR0_CKE_0/DDR0_CKE_0
DDR0_CKE_1/DDR0_CKE_1

DDR0_CKE_2/NC
DDR0_CKE_3/NC

DDR0_CS#_0/DDR0_CS#_0
DDR0_CS#_1/DDR0_CS#_1

DDR0_ODT_0/DDR0_ODT_0

NC/DDR0_ODT_1

DDR0_CAB_9/DDR0_MA_0
DDR0_CAB_8/DDR0_MA_1
DDR0_CAB_5/DDR0_MA_2

NC/DDR0_MA_3

NC/DDR0_MA_4
DDR0_CAA_0/DDR0_MA_5
DDR0_CAA_2/DDR0_MA_6
DDR0_CAA_4/DDR0_MA_7
DDR0_CAA_3/DDR0_MA_8
DDR0_CAA_1/DDR0_MA_9

DDR0_CAB_7/DDR0_MA_10
DDR0_CAA_7/DDR0_MA_11
DDR0_CAA_6/DDR0_MA_12
DDR0_CAB_0/DDR0_MA_13

DDR0_CAB_2/DDR0_MA_14
DDR0_CAB_1/DDR0_MA_15
DDR0_CAB_3/DDR0_MA_16

DDR0_CAB_4/DDR0_BA_0
DDR0_CAB_6/DDR0_BA_1
DDR0_CAA_5/DDR0_BG_0

DDR0_CAA_8/DDR0_ACT#
DDR0_CAA_9/DDR0_BG_1

NC/DDR0_ALERT#

NC/DDR0_PAR

DDR_VREF_CA

DDR0_VREF_DQ_0
DDR0_VREF_DQ_1

DDR1_VREF_DQ
DDR_VTT_CNTL

DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]

DDR0_DQSN[4]
DDR0_DQSP[4]
DDR0_DQSN[5]
DDR0_DQSP[5]

DDR1_DQSN[0]
DDR1_DQSP[0]
DDR1_DQSN[1]
DDR1_DQSP[1]

DDR1_DQSN[4]
DDR1_DQSP[4]
DDR1_DQSN[5]
DDR1_DQSP[5]

3

V32
V31
T32
T31

U36
U37
U34
U35

AE32
AF32
AE31
AF31

AC37
AC36
AC34
AC35
AA35
AB35
AA37
AA36
AB34
W36
Y31
W34
AA34
AC32

AC31
AB32
Y32

W32
AB31
V34

V35
W35

C27
D27
D31
C31
J35
J34
P34
P35
AP35
AP34
AV34
AV35
BB35
BB34
BF34
BF35

W37
W31
F36
D35
D37
E36
C35

Non-Interleave

-M_A_DDRCLK0_1066M
M_A_DDRCLK0_1066M

-M_A_DDRCLK1_1066M
M_A_DDRCLK1_1066M

M_A_CKE0
M_A_CKE1

-M_A_CS0

-M_A_CS1
M_A_ODT0
M_A_ODT1

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

M_A_A14
M_A_A15
M_A_A16

M_A_BS0
M_A_BS1
M_A_BG0

-M_A_ACT
M_A_BG1

-M_A_DQS0
M_A_DQS0

-M_A_DQS1
M_A_DQS1

-M_A_DQS4
M_A_DQS4

-M_A_DQS5
M_A_DQS5

-M_A_ALERT
M_A_PARITY
M_A_VREF_CA_CPU

DDR_PG_CTRL

TABLE

AB35
W36

AA37
AB34
AA36
V34
AA34
W34
V35
W35

AC32
AB32
AC31
Y32
W32
AC34
AB31
Y31
AC36
AC37
AC35

AA35

Pin

-M_A_DDRCLK0_1066M 33
M_A_DDRCLK0_1066M 33

-M_A_DDRCLK1_1066M 33
M_A_DDRCLK1_1066M 33

M_A_CKE0 33
M_A_CKE1 33

-M_A_CS0 33

-M_A_CS1 33
M_A_ODT0 33
M_A_ODT1 33

M_A_BS0 33
M_A_BS1 33
M_A_BG0 33

-M_A_ACT 33
M_A_BG1 33

-M_A_ALERT 33
M_A_PARITY 33
M_A_VREF_CA_CPU 33

DDR0_MA[5]
DDR0_MA[9]
DDR0_MA[6]
DDR0_MA[8]
DDR0_MA[7]

DDR0_BA[2]
DDR0_MA[12]
DDR0_MA[11]
DDR0_MA[15]
DDR0_MA[14]

DDR0_MA[13]
DDR0_CAS#
DDR0_WE#
DDR0_RAS#
DDR0_BA[0]
DDR0_MA[2]
DDR0_BA[1]
DDR0_MA[10]
DDR0_MA[1]
DDR0_MA[0]
DDR0_MA[3]
DDR0_MA[4]

2

Vendor
ROHM

TOSHIBA

ON

LPDDR3DDR3L

DDR0_CAA[0]
DDR0_CAA[1]
DDR0_CAA[2]
DDR0_CAA[3]
DDR0_CAA[4]
DDR0_CAA[5]
DDR0_CAA[6]
DDR0_CAA[7]
DDR0_CAA[8]
DDR0_CAA[9]

DDR0_CAB[0]
DDR0_CAB[1]
DDR0_CAB[2]
DDR0_CAB[3]
DDR0_CAB[4]
DDR0_CAB[5]
DDR0_CAB[6]
DDR0_CAB[7]
DDR0_CAB[8]
DDR0_CAB[9]
Not Used
Not Used

TABLE of BJT (Q0401)

VCC1R2A

2

DDR0_MA[5]
DDR0_MA[9]
DDR0_MA[6]
DDR0_MA[8]
DDR0_MA[7]
DDR0_BG[0]

DDR0_MA[12]
DDR0_MA[11]
DDR0_ACT#
DDR0_BG[1]

DDR0_MA[13]
DDR0_MA[15]
DDR0_MA[14]
DDR0_MA[16]
DDR0_BA[0]
DDR0_MA[2]
DDR0_BA[1]
DDR0_MA[10]
DDR0_MA[1]
DDR0_MA[0]
DDR0_MA[3]
DDR0_MA[4]

LCFC P/N

SB00000WC0J
SB000010700
SB000013J00

DDR_VTT_PG_CTRL

1

Q0401
DTC015TMT2L_VMT3

3

R0401

@

1/20W_10K_5%_0201

1 2

DDR4

M_A_DQ[63:0] 5,33

M_A_A[16:0] 33

-M_A_DQS[7:0] 5,33

M_A_DQS[7:0] 5,33

Description

S TR DTC015TMT2L NPN VMT3

S TR RN1131MFV NPN VESM

S TR DTC115TM3T5G NPN SOT-723-3

VCC3M

R0402

1/20W_100K_5%_0201

1 2

1

DDR_VTT_PG_CTRL 106

LOGIC

LOGIC

LOGIC

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2015/09/01

2015/09/01

2015/09/01

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/12/31

2016/12/31

2016/12/31

Title

CPU (2/16): DDR (1/2)

CPU (2/16): DDR (1/2)

CPU (2/16): DDR (1/2)

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

Date: Sheet o f

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

4 128

4 128

4 128

1

0.1

0.1

0.1

5

VInafix.com

TABLE

Pin

D D

Block 1

C C

Block 3

Block 5

B B

Block 7

A A

J22
H25
G22
H22
F25
J25
G25
F22
D22
C22
C24
D24

A22
B22
A24
B24

G31
G32

H29
H28
G28
G29
H31
H32

L31
L32
N29
N28
L28
L29
N31
N32

AJ29
AJ30
AM32
AM31
AM30
AM29
AJ31
AJ32
AR31
AR32
AV30
AV29
AR30
AR29
AV32
AV31

BA32
BA31
BD31
BD32
BA30
BA29
BD29
BD30
BG31
BG32
BK32
BK31
BG29
BG30
BK30
BK29

Interleave

DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]

DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]

DDR1_DQ[16]
DDR1_DQ[17]
DDR1_DQ[18]
DDR1_DQ[19]
DDR1_DQ[20]
DDR1_DQ[21]
DDR1_DQ[22]
DDR1_DQ[23]
DDR1_DQ[24]
DDR1_DQ[25]
DDR1_DQ[26]
DDR1_DQ[27]
DDR1_DQ[28]
DDR1_DQ[29]
DDR1_DQ[30]
DDR1_DQ[31]

DDR1_DQ[32]
DDR1_DQ[33]
DDR1_DQ[34]
DDR1_DQ[35]
DDR1_DQ[36]
DDR1_DQ[37]
DDR1_DQ[38]
DDR1_DQ[39]
DDR1_DQ[40]
DDR1_DQ[41]
DDR1_DQ[42]
DDR1_DQ[43]
DDR1_DQ[44]
DDR1_DQ[45]
DDR1_DQ[46]
DDR1_DQ[47]

DDR1_DQ[48]
DDR1_DQ[49]
DDR1_DQ[50]
DDR1_DQ[51]
DDR1_DQ[52]
DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQ[55]
DDR1_DQ[56]
DDR1_DQ[57]
DDR1_DQ[58]
DDR1_DQ[59]
DDR1_DQ[60]
DDR1_DQ[61]
DDR1_DQ[62]
DDR1_DQ[63]

Non-Interleave

DDR0_DQ[16]
DDR0_DQ[17]
DDR0_DQ[18]
DDR0_DQ[19]
DDR0_DQ[20]
DDR0_DQ[21]
DDR0_DQ[22]
DDR0_DQ[23]
DDR0_DQ[24]
DDR0_DQ[25]
DDR0_DQ[26]
DDR0_DQ[27]
DDR0_DQ[28]
DDR0_DQ[29]
DDR0_DQ[30]
DDR0_DQ[31]

DDR0_DQ[48]
DDR0_DQ[49]
DDR0_DQ[50]
DDR0_DQ[51]
DDR0_DQ[52]
DDR0_DQ[53]
DDR0_DQ[54]
DDR0_DQ[55]
DDR0_DQ[56]
DDR0_DQ[57]
DDR0_DQ[58]
DDR0_DQ[59]
DDR0_DQ[60]
DDR0_DQ[61]
DDR0_DQ[62]
DDR0_DQ[63]

DDR1_DQ[16]
DDR1_DQ[17]
DDR1_DQ[18]
DDR1_DQ[19]
DDR1_DQ[20]
DDR1_DQ[21]
DDR1_DQ[22]
DDR1_DQ[23]
DDR1_DQ[24]
DDR1_DQ[25]
DDR1_DQ[26]
DDR1_DQ[27]
DDR1_DQ[28]
DDR1_DQ[29]
DDR1_DQ[30]
DDR1_DQ[31]

DDR1_DQ[48]
DDR1_DQ[49]
DDR1_DQ[50]
DDR1_DQ[51]
DDR1_DQ[52]
DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQ[55]
DDR1_DQ[56]
DDR1_DQ[57]
DDR1_DQ[58]
DDR1_DQ[59]
DDR1_DQ[60]
DDR1_DQ[61]
DDR1_DQ[62]
DDR1_DQ[63]

4

M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

[WHL PDG]for WHL DDR4 COMPENSATION
DDR_RCOMP[0] Pull down 121 ohm resistor
DDR_RCOMP[1] Pull down 80.6 ohm resistor
DDR_RCOMP[2] Pull down 100 ohm resistor

TABLE

Pin

H24

DDR1_DQSN[0]

G24
C23
D23

G30

H30

L30
N30

AL31
AL30
AU31
AU30

BC31
BC30
BH31
BH30

DDR1_DQSP[0]
DDR1_DQSN[1]
DDR1_DQSP[1]

DDR1_DQSN[2]
DDR1_DQSP[2]
DDR1_DQSN[3]
DDR1_DQSP[3]

DDR1_DQSN[4]
DDR1_DQSP[4]
DDR1_DQSN[5]
DDR1_DQSP[5]

DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]

Block 1

Block 3

Block 5

Block 7

UCPU1C

J22

DDR1_DQ_0/DDR0_DQ_16

H25

DDR1_DQ_1/DDR0_DQ_17

G22

DDR1_DQ_2/DDR0_DQ_18

H22

DDR1_DQ_3/DDR0_DQ_19

F25

DDR1_DQ_4/DDR0_DQ_20

J25

DDR1_DQ_5/DDR0_DQ_21

G25

DDR1_DQ_6/DDR0_DQ_22

F22

DDR1_DQ_7/DDR0_DQ_23

D22

DDR1_DQ_8/DDR0_DQ_24

C22

DDR1_DQ_9/DDR0_DQ_25

C24

DDR1_DQ_10/DDR0_DQ_26

D24

DDR1_DQ_11/DDR0_DQ_27

A22

DDR1_DQ_12/DDR0_DQ_28

B22

DDR1_DQ_13/DDR0_DQ_29

A24

DDR1_DQ_14/DDR0_DQ_30

B24

DDR1_DQ_15/DDR0_DQ_31

G31

DDR1_DQ_16/DDR0_DQ_48

G32

DDR1_DQ_17/DDR0_DQ_49

H29

DDR1_DQ_18/DDR0_DQ_50

H28

DDR1_DQ_19/DDR0_DQ_51

G28

DDR1_DQ_20/DDR0_DQ_52

G29

DDR1_DQ_21/DDR0_DQ_53

H31

DDR1_DQ_22/DDR0_DQ_54

H32

DDR1_DQ_23/DDR0_DQ_55

L31

DDR1_DQ_24/DDR0_DQ_56

L32

DDR1_DQ_25/DDR0_DQ_57

N29

DDR1_DQ_26/DDR0_DQ_58

N28

DDR1_DQ_27/DDR0_DQ_59

L28

DDR1_DQ_28/DDR0_DQ_60

L29

DDR1_DQ_29/DDR0_DQ_61

N31

DDR1_DQ_30/DDR0_DQ_62

N32

DDR1_DQ_31/DDR0_DQ_63

AJ29

DDR1_DQ_32/DDR1_DQ_16

AJ30

DDR1_DQ_33/DDR1_DQ_17

AM32

DDR1_DQ_34/DDR1_DQ_18

AM31

DDR1_DQ_35/DDR1_DQ_19

AM30

DDR1_DQ_36/DDR1_DQ_20

AM29

DDR1_DQ_37/DDR1_DQ_21

AJ31

DDR1_DQ_38/DDR1_DQ_22

AJ32

DDR1_DQ_39/DDR1_DQ_23

AR31

DDR1_DQ_40/DDR1_DQ_24

AR32

DDR1_DQ_41/DDR1_DQ_25

AV30

DDR1_DQ_42/DDR1_DQ_26

AV29

DDR1_DQ_43/DDR1_DQ_27

AR30

DDR1_DQ_44/DDR1_DQ_28

AR29

DDR1_DQ_45/DDR1_DQ_29

AV32

DDR1_DQ_46/DDR1_DQ_30

AV31

DDR1_DQ_47/DDR1_DQ_31

BA32

DDR1_DQ_48/DDR1_DQ_48

BA31

DDR1_DQ_49/DDR1_DQ_49

BD31

DDR1_DQ_50/DDR1_DQ_50

BD32

DDR1_DQ_51/DDR1_DQ_51

BA30

DDR1_DQ_52/DDR1_DQ_52

BA29

DDR1_DQ_53/DDR1_DQ_53

BD29

DDR1_DQ_54/DDR1_DQ_54

BD30

DDR1_DQ_55/DDR1_DQ_55

BG31

DDR1_DQ_56/DDR1_DQ_56

BG32

DDR1_DQ_57/DDR1_DQ_57

BK32

DDR1_DQ_58/DDR1_DQ_58

BK31

DDR1_DQ_59/DDR1_DQ_59

BG29

DDR1_DQ_60/DDR1_DQ_60

BG30

DDR1_DQ_61/DDR1_DQ_61

BK30

DDR1_DQ_62/DDR1_DQ_62

BK29

DDR1_DQ_63/DDR1_DQ_63

WHISKEYLAKE-U_BGA1528

@

[WHL PDG]for CNL DDR4 COMPENSATION
DDR_RCOMP[0] Pull down 100 ohm resistor
DDR_RCOMP[1] Pull down 100 ohm resistor
DDR_RCOMP[2] Pull down 100 ohm resistor

Interleave

Non-Interleave

DDR0_DQSN[2]
DDR0_DQSP[2]
DDR0_DQSN[3]
DDR0_DQSP[3]

DDR0_DQSN[6]
DDR0_DQSP[6]
DDR0_DQSN[7]
DDR0_DQSP[7]

DDR1_DQSN[2]
DDR1_DQSP[2]
DDR1_DQSN[3]
DDR1_DQSP[3]

DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]

DDR1_CKN_0/DDR1_CKN_0

DDR1_CKP_0/DDR1_CKP_0

DDR1_CKN_1/DDR1_CKN_1

DDR1_CKP_1/DDR1_CKP_1

DDR1_CKE_0/DDR1_CKE_0
DDR1_CKE_1/DDR1_CKE_1

DDR1_CS#_0/DDR1_CS#_0

DDR1_CS#_1/DDR1_CS#_1

DDR1_ODT_0/DDR1_ODT_0

DDR1_CAB_9/DDR1_MA_0
DDR1_CAB_8/DDR1_MA_1
DDR1_CAB_5/DDR1_MA_2

DDR1_CAA_0/DDR1_MA_5
DDR1_CAA_2/DDR1_MA_6
DDR1_CAA_4/DDR1_MA_7
DDR1_CAA_3/DDR1_MA_8

DDR1_CAA_1/DDR1_MA_9
DDR1_CAB_7/DDR1_MA_10
DDR1_CAA_7/DDR1_MA_11
DDR1_CAA_6/DDR1_MA_12
DDR1_CAB_0/DDR1_MA_13

DDR1_CAB_2/DDR1_MA_14
DDR1_CAB_1/DDR1_MA_15
DDR1_CAB_3/DDR1_MA_16

DDR1_CAB_4/DDR1_BA_0
DDR1_CAB_6/DDR1_BA_1

DDR1_CAA_5/DDR1_BG_0

DDR1_CAA_9/DDR1_BG_1

DDR1_CAA_8/DDR1_ACT#

DDR1_DQSN_0/DDR0_DQSN_2
DDR1_DQSP_0/DDR0_DQSP_2
DDR1_DQSN_1/DDR0_DQSN_3
DDR1_DQSP_1/DDR0_DQSP_3
DDR1_DQSN_2/DDR0_DQSN_6
DDR1_DQSP_2/DDR0_DQSP_6
DDR1_DQSN_3/DDR0_DQSN_7
DDR1_DQSP_3/DDR0_DQSP_7
DDR1_DQSN_4/DDR1_DQSN_2
DDR1_DQSP_4/DDR1_DQSP_2
DDR1_DQSN_5/DDR1_DQSN_3
DDR1_DQSP_5/DDR1_DQSP_3
DDR1_DQSN_6/DDR1_DQSN_6
DDR1_DQSP_6/DDR1_DQSP_6
DDR1_DQSN_7/DDR1_DQSN_7
DDR1_DQSP_7/DDR1_DQSP_7

3 of 20

LOGIC

DDR1_CKE_2/NC
DDR1_CKE_3/NC

NC/DDR1_ODT_1

NC/DDR1_MA_3
NC/DDR1_MA_4

NC/DDR1_ALERT#

NC/DDR1_PAR

DRAM_RESET#

DDR_COMP_0
DDR_COMP_1
DDR_COMP_2

AF28
AF29
AE28
AE29

T28
T29
V28
V29

AL37
AL35
AL36
AL34
AG36
AG35
AF34
AG37
AE35
AF35
AE37
AC29
AE36
AB29
AG34
AC28
AB28
AK35

AJ35
AK34
AJ34

AJ37
AJ36
W29

Y28
W28

H24
G24
C23
D23
G30
H30
L30
N30
AL31
AL30
AU31
AU30
BC31
BC30
BH31
BH30

Y29
AE34
BU31

BN28
BN27
BN29

TABLE

AF35
A
AE37
AE36
AC29
W29
AB28
AC28
W28
Y28

AK35
AK34

AJ35
AJ34
AJ37
AF34
AJ36
AG34
AG35
AG36
AG37
AE35

3

-M_A_DQS2
M_A_DQS2

-M_A_DQS3
M_A_DQS3

-M_A_DQS6
M_A_DQS6

-M_A_DQS7
M_A_DQS7

-DRAMRST

DDR_RCOMP0
DDR_RCOMP1
DDR_RCOMP2

Pin

B29

1 2

R0501 1/20W_121_1%_0201

1 2

R0502 1/20W_80.6_1%_0201

1 2

R0503 1/20W_100_1%_0201

WHL RCOMP

DDR1_MA[5]
DDR1_MA[9]
DDR1_MA[6]
DDR1_MA[8]
DDR1_MA[7]

DDR1_BA[2]
DDR1_MA[12]
DDR1_MA[11]
DDR1_MA[15]
DDR1_MA[14]

DDR1_MA[13]
DDR1_CAS#
DDR1_WE#
DDR1_RAS#
DDR1_BA[0]
DDR1_MA[2]
DDR1_BA[1]
DDR1_MA[10]
DDR1_MA[1]
DDR1_MA[0]
DDR1_MA[3]
DDR1_MA[4]

LPDDR3DDR3L

DDR1_CAA[0]
DDR1_CAA[1]
DDR1_CAA[2]
DDR1_CAA[3]
DDR1_CAA[4]
DDR1_CAA[5]
DDR1_CAA[6]
DDR1_CAA[7]
DDR1_CAA[8]
DDR1_CAA[9]

DDR1_CAB[0]
DDR1_CAB[1]
DDR1_CAB[2]
DDR1_CAB[3]
DDR1_CAB[4]
DDR1_CAB[5]
DDR1_CAB[6]
DDR1_CAB[7]
DDR1_CAB[8]
DDR1_CAB[9]
Not Used
Not Used

VCC1R2A

12

R0504
1/20W_470_5%_0201

DDR4

DDR1_MA[5]
DDR1_MA[9]
DDR1_MA[6]
DDR1_MA[8]
DDR1_MA[7]
DDR1_BG[0]

DDR1_MA[12]
DDR1_MA[11]
DDR1_ACT#
DDR1_BG[1]

DDR1_MA[13]
DDR1_MA[15]
DDR1_MA[14]
DDR1_MA[16]
DDR1_BA[0]
DDR1_MA[2]
DDR1_BA[1]
DDR1_MA[10]
DDR1_MA[1]
DDR1_MA[0]
DDR1_MA[3]
DDR1_MA[4]

2

-DRAMRST 33

M_A_DQ[63:0] 4,33

-M_A_DQS[7:0] 4,33

M_A_DQS[7:0] 4,33

1

LOGIC

LOGIC

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2015/09/01

2015/09/01

2015/09/01

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/12/31

2016/12/31

2016/12/31

Title

CPU (3/16): DDR (2/2)

CPU (3/16): DDR (2/2)

CPU (3/16): DDR (2/2)

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

Date: Sheet o f

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

5 128

5 128

5 128

1

0.1

0.1

0.1

5

VInafix.com

4

3

2

1

TABLE : GT3e RCOMP Resistor

CPU SKU

Pin A14 Reserved

Pin B14

D D

TABLE : Functional Strap

ITP_PMODE (DFX Test Mode)

HIGH

LOW

TABLE : Functional Strap

GPP_E6 (JTAG ODT Disable)

HIGH

LOW

TABLE : Functional Strap

GPP_H2/CNV_BT_I2S_SDO (eSPI Flash Sharing Mode)

HIGH

LOW

C C

B B

U43e

OPCE_RCOMP

OPC_RCOMP

DFX Test Mode Disabled (Default)

DFX Test Mode Enabled

Enabled

Disabled

Slave Attached Flash Sharing (SAFS) Enabled

Master Attached Flash Sharing (MAFS) Enabled (Default)

U42

Reserved

VCCSTG

R0603
1/20W_1K_5%_0201

1 2

PECI85

-PROCHOT85,102,108

PECI

-PROCHOT

R0601 1/20W_499_1%_0201

[WHL PDG FOR DCL DEBUG]

VCCST VCCST

R0605
1/20W_1K_5%_0201

1 2

12

TP0601
TP0602
TP0603
TP0604

1 2

R0606 1/20W_49.9_1%_0201

1 2

R0607 1/20W_49.9_1%_0201

1 2

R0608 1/20W_49.9_1%_0201

1 2

R0609 1/20W_49.9_1%_0201

1 2

-CATERR

-PROCHOT_CPU

-THRMTRIP

XDP_BPM#0

1

XDP_BPM#1

1

XDP_BPM#2

1

XDP_BPM#3

1

PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_RCOMP
OPC_RCOMP

Follow the CRB
R0609, R0610 for WHL 4+3e

R0604
1/20W_49.9_1%_0201

BW25

UCPU1D

AA4

CATERR#

AR1

PECI

Y4

PROCHOT#

BJ1

THRMTRIP#

U1

BPM#_0

U2

BPM#_1

U3

BPM#_2

U4

BPM#_3

CE9

GPP_E3/CPU_GP0

CN3

GPP_E7/CPU_GP1

CB34

GPP_B3/CPU_GP2

CC35

GPP_B4/CPU_GP3

BP27

PROC_POPIRCOMP
PCH_OPIRCOMP

L5

RSVD35

N5

RSVD36

WHISKEYLAKE-U_BGA1528

@

4 of 20

PROC_TCK

PROC_TDI
PROC_TDO
PROC_TMS

PROC_TRST#

PCH_TCK

PCH_TDI
PCH_TDO
PCH_TMS

PCH_TRST#
PCH_JTAGX

PROC_PREQ#
PROC_PRDY#

T6
U6
Y5
T5
AB6

W6
U5
W5
P5
Y6
P6

W2
W1

PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST

PCH_TCK_R

VCCSTG

1 2

R0610

1/20W_51_5%_0201

R0617
1/20W_100_5%_0201

R0602

@

1/20W_51_5%_0201

1 2

1 2

1 2

R0611 0_0201_SP

1 2

R0612 0_0201_SP

1 2

R0613 0_0201_SP

1 2

R0614 0_0201_SP

1 2

R0615 0_0201_SP

XDP_TCK0
XDP_TDI
XDP_TDO
XDP_TMS

-XDP_TRST

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

CPU (4/16): MISC/JTAG

CPU (4/16): MISC/JTAG

CPU (4/16): MISC/JTAG

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

6 128

6 128

6 128

1

0.1

0.1

0.1

5

VInafix.com

D D

4

GPP_C5, Weak internal PD

Rising edge of RSMRST#

*L: LPC
H: eSPI

VCC3_SUS

R0719

1/20W_1K_5%_0201@

1 2

GPP_C5

12

R0720

@

1/20W_20K_5%_0201

GPP_C2, Internal PD 20K

L:Disable Intel ME Crypto TLS cipher suite (no confidentiality).
*H:Enable Intel ME Crypto Transport Layer Security (TLS) cipher
suite (with confidentiality).Support Intel AMT with TLS and
Intel SBA (Small Business Advantage) with TLS.

VCC3_SUS

R0711

1/20W_1K_5%_0201

1 2

GPP_C2

12

R0718

@

1/20W_20K_5%_0201

3

This signal has an internal pull-down.
0

= Disable IntelR DCI-OOB (Default)

FOR DCI USE

1 = Enable IntelR DCI-OOB

PCHHOT

1 2

R0717 1/20W_4.7K_5%_0201

2

VCC3_SUS

1

VCC3_SUS_SPI

C C

SPI_CLK21,98
SPI_MISO_IO121,98
SPI_MOSI_IO021,98
SPI_IO221
SPI_IO321

-SPI_CS0 For SPI

-SPI_CS1 For SPI

-SPI_CS2 For TPM

B B

A A

5

-SPI_CS021

-SPI_CS1_8MB21

-SPI_CS298

SPI_CLK
SPI_MISO_IO1
SPI_MOSI_IO0
SPI_IO2
SPI_IO3

R07231/20W_100K_5%_0201

1 2

1 2

R07211/20W_100K_5%_0201

R07221/20W_100K_5%_0201

1 2

C-LINK

CL_CLK_WLAN66

CL_DATA_WLAN66

-CL_RST_WLAN66

-KBRC85

IRQSER85

1 2

R0712 0_0402_SP

1 2

R0713 0_0402_SP

1 2

R0714 0_0402_SP

1 2

R0715 0_0402_SP

1 2

R0716 0_0402_SP

4

CL_CLK_WLAN
CL_DATA_WLAN

-CL_RST_WLAN

-KBRC
IRQSER

VCC3B

12

R07041/20W_8.2K_5%_0201

UCPU1E

CH37

R0712

SPI0_CLK

R0713
R0714
R0715
R0716

-SPI_CS0

-SPI_CS1_8MB

-SPI_CS2

R0705

1/20W_1K_5%_0201@

1 2

CF37

SPI0_MISO

CF36

SPI0_MOSI

CF34

SPI0_IO2

CG34

SPI0_IO3

CG36

SPI0_CS0#

CG35

SPI0_CS1#

CH34

SPI0_CS2#

CF20

GPP_D1/SPI1_CLK/BK1/SBK1

CG22

GPP_D2/SPI1_MISO_IO1/BK2/SBK2

CF22

GPP_D3/SPI1_MOSI_IO0/BK3/SBK3

CG23

GPP_D21/SPI1_IO2

CH23

GPP_D22/SPI1_IO3

CG20

GPP_D0/SPI1_CS0#/BK0/SBK0

CH7

CL_CLK

CH8

CL_DATA

CH9

CL_RST#

BV29

GPP_A0/RCIN#/TIME_SYNC1

BV28

GPP_A6/SERIRQ

WHISKEYLAKE-U_BGA1528

@

GPP_B23/SML1ALERT#/PCHHOT#

GPP_A5/LFRAME#/ESPI_CS#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

5 of 20

3

GPP_C0/SMBCLK

GPP_C1/SMBDATA

GPP_C2/SMBALERT#

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT#

GPP_C6/SML1CLK

GPP_C7/SML1DATA

GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3

GPP_A10/CLKOUT_LPC1

GPP_A8/CLKRUN#

CK14
CH15
CJ15

CH14
CF15
CG15

CN15
CM15
CC34

CA29
BY29
BY27
BV27
CA28
CA27

BV32
BV30
BY30

VCC3_SUS

R0707

R0709

R0710

1 2

1 2

1 2

1/20W_499_1%_0201

1/20W_499_1%_0201

1/20W_4.7K_5%_0201

GPP_C2

GPP_C5

PCHHOT

1 2

R0725 0_0201_SP

1 2

R0726 0_0201_SP

1 2

R0727 0_0201_SP

1 2

R0728 0_0201_SP

1 2

R0729 0_0201_SP

1 2

R0730 0_0201_SP

LPCCLK_0

1 2

R0702 1/20W_22_1%_0201EMC@

1

1

C0702

@

@

2

2

27P_25V_J_NPO_0201

27P_25V_J_NPO_0201

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2015/01/12

2015/01/12

2015/01/12

2

VCC3B

12

R07241/20W_10K_5%_0201

@

R0708

1 2

1/20W_4.7K_5%_0201

1

1

C0703

C0704

C0705

@

@

2

2

27P_25V_J_NPO_0201

27P_25V_J_NPO_0201

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

12

R07031/20W_8.2K_5%_0201

SMB_CLK
SMB_DATA

EC_SCL2
EC_SDA2

1

EMC_NS@

C0701
22P_50V_J_NPO_0402

2

2016/01/12

2016/01/12

2016/01/12

SMB_CLK 93
SMB_DATA 93

EC_SCL2 93
EC_SDA2 93

LPC_AD0 85
LPC_AD1 85
LPC_AD2 85
LPC_AD3 85

-LPC_FRAME 85

-SUS_STAT 85

LPCCLK_EC_24M 85

DIMM1,CP

GPU,G-Sensor Thermal-Sensor、EC

D

EC and TPM Module debug port

Title

Title

Title

CPU (5/16): ESPI/SPI/SMBUS/C-LINK

CPU (5/16): ESPI/SPI/SMBUS/C-LINK

CPU (5/16): ESPI/SPI/SMBUS/C-LINK

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

Date: Sheet

Date: Sheet

Date: Sheet

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

1

7 128

7 128

7 128

of

of

of

0.1

0.1

0.1

5

VInafix.com

D D

Size CTL51

FPR_RESET73,85

TP0801@
TP0802@

TP0803@

TP0804@

TP0805@
TP0806@

TP0807@
TP0808@

Size CTL
(GPP_C19)

0 (GND Low)

-TPM_IRQ

GPP_B18

-WLAN_RF_KILL

GPP_B22

BRI_RSP_CNVI
RGI_DT_CNVI
BRI_DT_CNVI
RGI_RSP_CNVI

UART_RX
UART_TX

-EC_SCI

-EC_WAKE

1
1

1

Size CTL

1

1
1

1

GPP_H9

1

Graphics ID

Status

UMA

-TPM_IRQ98

-WLAN_RF_KILL66

FN, F1, F4 PD 100K, BIOS need output
"High" while act i v e

C C

BRI_RSP_CNVI66
RGI_DT_CNVI66
BRI_DT_CNVI66
RGI_RSP_CNVI66

UART_RX66,84

UART_TX66,84

-EC_SCI85

-EC_WAKE85

Panel ID

(Pin#7 Control)

Status

B B

15"

14" 1 (NC High)

A A

5

VCC3B

1 2

-DISCRETE_

PRESENCE
(GPP_D13)

0 (R0824)

1 (R0823)DIS

R0801

GPP_A11

1 2

1/16W_20K_1%_0402

4

R0806

1 2

1/20W_10K_5%_0201

12

R08281/20W_0_5%_0201 @

Graphics Control

Status

R18M

4

R0802

R0803

1 2

1/20W_10K_5%_0201

FPR_RESET_PCH

-DISCRETE_CTL
(GPP_D14)

0 (R0826)

1 (R0825)R19M

1/20W_10K_5%_0201

VCC3_SUS

@

1 2

R0804

1/20W_1K_5%_0201

GPP_B17

CC27
CC32
CE28
CE27
CE29

CA31
CA32
CC29
CC30
CA30

CK20
CG19

CJ20

CH19

CR12
CP12
CN12
CM12

CM11
CN11

CK12

CJ12

CF27
CF29

CH27
CH28

CJ30
CJ31

UCPU1F

WHISKEYLAKE-U_BGA1528

@

GPP_B15/GSPI0_CS0#
GPP_A7/PIRQA#/GSPI0_CS1#
GPP_B16/GSPI0_CLK
GPP_B17/GSPI0_MISO
GPP_B18/GSPI0_MOSI

GPP_B19/GSPI1_CS0#
GPP_A11/PME#/GSPI1_CS1#/SD_VDD2_PWR_EN#
GPP_B20/GSPI1_CLK
GPP_B21/GSPI1_MISO
GPP_B22/GSPI1_MOSI

GPP_F5/CNV_BRI_RSP
GPP_F6/CNV_RGI_DT
GPP_F4/CNV_BRI_DT
GPP_F7/CNV_RGI_RSP

GPP_C20/UART2_RXD
GPP_C21/UART2_TXD
GPP_C22/UART2_RTS#
GPP_C23/UART2_CTS#

GPP_C16/I2C0_SDA
GPP_C17/I2C0_SCL

GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL

GPP_H4/I2C2_SDA
GPP_H5/I2C2_SCL

GPP_H6/I2C3_SDA
GPP_H7/I2C3_SCL

GPP_H8/I2C4_SDA
GPP_H9/I2C4_SCL

12

R0825

-DISCRETE_PRESENCE

-DISCRETE_CTL

1/20W_10K_5%_0201R19M@

12

R0826

R18M@

1/20W_10K_5%_0201

GPP_B22, Internal PD 20K

*L: SPI
H: LPC

GPP_B22 GPP_B18

3

GPP_D9/ISH_SPI_CS#/GSPI2_CS0#

GPP_D10/ISH_SPI_CLK/GSPI2_CLK
GPP_D11/ISH_SPI_MISO/GSPI2_MISO
GPP_D12/ISH_SPI_MOSI/GSPI2_MOSI

GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL

GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL

GPP_H10/I2C5_SDA/ISH_I2C2_SDA

GPP_H11/I2C5_SCL/ISH_I2C2_SCL

GPP_D13/ISH_UART0_RXD

GPP_D14/ISH_UART0_TXD

GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#

GPP_D16/ISH_UART0_CTS#/SML0BALERT#

GPP_C12/UART1_RXD/ISH_UART1_RXD

GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#

GPP_A12/ISH_GP6/BM_BUSY#/SX_EXIT_HOLDOFF#

6 of 20

VCC3B

12

R0823
1/20W_10K_5%_0201DIS@

12

R0824

UMA@

1/20W_10K_5%_0201

VCC3_SUS

12

R0809

@

1/20W_20K_5%_0201

12

R0810

@

1/20W_20K_5%_0201

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

CN22
CR22
CM22
CP22

CK22
CH20

CH22
CJ22

CJ27
CJ29

CM24
CN23
CM23
CR24

CG12
CH12
CF12
CG14

BW35

GPP_A18/ISH_GP0

BW34

GPP_A19/ISH_GP1

CA37

GPP_A20/ISH_GP2

CA36

GPP_A21/ISH_GP3

CA35

GPP_A22/ISH_GP4

CA34

GPP_A23/ISH_GP5

BW37

GPP_B18, Internal PD 20K

*L: Disable “ No Reboot” mode
H: Enable “ No Reboot” mode

2015/01/12

2015/01/12

2015/01/12

GPP_D12

GPP_D5

GPP_D7

-DISCRETE_PRESENCE

-DISCRETE_CTL

-LED_MUTE

-LED_MICMUTE
GPP_C15

TP4_RESET_PCH TP4_RESET

-LID_CLOSE_R

VCC3B

12

R0812

1/20W_10K_5%_0201@

GPP_D5

12

R0813

@

1/20W_10K_5%_0201

VCC3_SUS

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

1 2

R0805 0_0201_SP

-LED_MUTE 88

-LED_MICMUTE 88

1 2

R0821 0_0201_SP

1 2

R0827 0_0201_SP

1

EMC_NS@

C0801
10P_25V_J_NPO_0201

2

12

R0807

@

1/20W_1K_5%_0201

12

R0808

@

1/20W_20K_5%_0201

2016/01/12

2016/01/12

2016/01/12

2

R0817

1/16W_10K_5%_0402

1 2

@

R0818

1/16W_10K_5%_0402

1 2

@

R0819

1/16W_10K_5%_0402

1 2

@

PAD_DISABLE 89

TP4_RESET 88

-LID_CLOSE 51,73,85,89

GPP_D12

1

GPP_C15

-LED_MUTE

-LED_MICMUTE

VCC3B

PAD_DISABLEPAD_DISABLE_PCH

-LID_CLOSE

12

R0822
1/16W_100K_5%_0402

GPP_D12, External pull-up is required.

ecommend 100K if pulled up to 3.3V or 75K

R
if pulled up to 1.8V.

This strap should sample HIGH.
There should NOT be any on-board device driving it
to opposite direction during strap sampling.

GPP_D7, Reserved, Rising edge of DSW_PWROK

External pull-up is required. Recommend 100K.
This strap should sample HIGH.
There should NOT be any on-board device driving it
to opposite direction during strap sampling

Title

Title

Title

Size

Size

Size

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

GPP_D7

CPU (6/16): LPSS/ISH

CPU (6/16): LPSS/ISH

CPU (6/16): LPSS/ISH

Document Number Rev

Document Number Rev

Document Number Rev

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

1

VCC3_SUS

12

R0814

1/20W_100K_1%_0201

12

R0815

@

1/20W_10K_5%_0201

VCC3_SUS

12

R0816

1/20W_100K_1%_0201

8 128

8 128

8 128

0.1

0.1

0.1

5

VInafix.com

4

3

2

1

VCC3_SUS VCC3_SUS

R0903
1/20W_1K_5%_0201@

D D

C C

B B

ME_FLASH85

HDA_SYNC78
HDA_BCLK78
HDA_SDO78
HDA_SDIN078

-HDA_RST78

-CNV_RF_RESET66

CNV_CLKREQ66

PCH_SPKR83

ME_FLASH

HDA_BCLK
HDA_SDO HDA_SDO_CPU

-HDA_RST

EMC@

1

C0902

2

22P_25V_J_NPO_0201_MURATA

VCC3B

12

NTPM@

R0911

1/20W_10K_5%_0201

PLANARID4

12

TPM@

R0913

1/20W_10K_5%_0201

R0904 0_0402_SP

R0901 1/20W_33_5%_0201
R0907 1/20W_33_5%_0201EMC@
R0902 1/20W_33_5%_0201

R0908 1/20W_33_5%_0201

EMC@

1

C0901

2

22P_25V_J_NPO_0201_MURATA

TPM ID

1 2

1 2
1 2
1 2

1 2

Status

TPM

NTPM

PLANARID4
(GPP_D18)

0 (R0913)

1 (R0911)

1 2

Test_Point_20MIL

HDA_SYNC_CPUHDA_SYNC
HDA_BCLK_CPU

HDA_SDIN0

-HDA_RST_CPU

-CNV_RF_RESET

CNV_CLKREQ

PLANARID4

PCH_SPKR

R0905
1/20W_1K_5%_0201

1 2

TP0901

1

@

UCPU1G

BN34

HDA_SYNC/I2S0_SFRM

BN37

HDA_BCLK/I2S0_SCLK

BN36

HDA_SDO/I2S0_TXD

BN35

HDA_SDI0/I2S0_RXD

BL36

HDA_SDI1/I2S1_RXD/SNDW1_DATA

BL35

HDA_RST#/I2S1_SCLK/SNDW1_CLK

CK23

GPP_D23/I2S_MCLK

BL37

I2S1_SFRM/SNDW2_CLK

BL34

I2S1_TXD/SNDW2_DATA

CJ32

GPP_H1/I2S2_SFRM/CNV_BT_I2S_BCLK/CNV_RF_RESET#

CH32

GPP_H0/I2S2_SCLK/CNV_BT_I2S_SCLK

CH29

GPP_H2/I2S2_TXD/CNV_BT_I2S_SDI/MODEM_CLKREQ

CH30

GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO

CP24

GPP_D19/DMIC_CLK0/SNDW4_CLK

CN24

GPP_D20/DMIC_DATA0/SNDW4_DATA

CK25

GPP_D17/DMIC_CLK1/SNDW3_CLK

CJ25

GPP_D18/DMIC_DATA1/SNDW3_DATA

CF35

GPP_B14/SPKR

WHISKEYLAKE-U_BGA1528

@

GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7

7 of 20

GPP_G0/SD_CMD
GPP_G1/SD3_DATA0
GPP_G2/SD3_DATA1
GPP_G3/SD3_DATA2

GPP_G4/SD_DATA3

GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP

GPP_A16/SD_1P8_SEL

SD_1P8_RCOMP
SD_3P3_RCOMP

CH36

-LED_CAPSLOCK_PCH

CL35

-LED_NUMBER

CL36
CM35
CN35
CH35
CK36
CK34

BW36
BY31

CK33

SD_RCOMP

CM34

1 2

R0915 0_0201_SP

1 2

R0906 1/20W_200_1%_0201

Table 3-1.RCOMP Recommendation for WHL and CFL

VCC3B

12

R0914

@

1/16W_10K_5%_0402

-LED_CAPSLOCK 85,88

-LED_NUMBER 88

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER TH IS SHEET NOR THE INFORMATION IT C ONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER TH IS SHEET NOR THE INFORMATION IT C ONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER TH IS SHEET NOR THE INFORMATION IT C ONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2016/01/12

2016/01/12

2016/01/12

2

Title

CPU (7/16): AUDIO/SDXC

CPU (7/16): AUDIO/SDXC

CPU (7/16): AUDIO/SDXC

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

9 128

9 128

9 128

1

0.1

0.1

0.1

5

VInafix.com

4

3

2

1

D D

PCIE_RCOMP_N
PCIE_RCOMP_P

UCPU1H

BW9

PCIE5_RXN/USB31_5_RXN

BW8

PCIE5_RXP/USB31_5_RXP

BW4

PCIE5_TXN/USB31_5_TXN

BW3

PCIE5_TXP/USB31_5_TXP

BU6

PCIE6_RXN/USB31_6_RXN

BU5

PCIE6_RXP/USB31_6_RXP

BU4

PCIE6_TXN/USB31_6_TXN

BU3

PCIE6_TXP/USB31_6_TXP

BT7

PCIE7_RXN

BT6

PCIE7_RXP

BU2

PCIE7_TXN

BU1

PCIE7_TXP

BU9

PCIE8_RXN

BU8

PCIE8_RXP

BT4

PCIE8_TXN

BT3

PCIE8_TXP

BP5

PCIE9_RXN

BP6

PCIE9_RXP

BR2

PCIE9_TXN

BR1

PCIE9_TXP

BN6

PCIE10_RXN

BN5

PCIE10_RXP

BR4

PCIE10_TXN

BR3

PCIE10_TXP

BN10

PCIE11_RXN/SATA0_RXN

BN8

PCIE11_RXP/SATA0_RXP

BN4

PCIE11_TXN/SATA0_TXN

BN3

PCIE11_TXP/SATA0_TXP

BL6

PCIE12_RXN/SATA1A_RXN

BL5

PCIE12_RXP/SATA1A_RXP

BN2

PCIE12_TXN/SATA1A_TXN

BN1

PCIE12_TXP/SATA1A_TXP

BK6

PCIE13_RXN

BK5

PCIE13_RXP

BM4

PCIE13_TXN

BM3

PCIE13_TXP

BJ6

PCIE14_RXN

BJ5

PCIE14_RXP

BL2

PCIE14_TXN

BL1

PCIE14_TXP

BG5

PCIE15_RXN/SATA1B_RXN

BG6

PCIE15_RXP/SATA1B_RXP

BL4

PCIE15_TXN/SATA1B_TXN

BL3

PCIE15_TXP/SATA1B_TXP

BE5

PCIE16_RXN/SATA2_RXN

BE6

PCIE16_RXP/SATA2_RXP

BJ4

PCIE16_TXN/SATA2_TXN

BJ3

PCIE16_TXP/SATA2_TXP

CE6

PCIE_RCOMP_N

CE5

PCIE_RCOMP_P

CR28

GPP_H12/M2_SKT2/CFG_0

CP28

GPP_H13/M2_SKT2/CFG_1

CN28

GPP_H14/M2_SKT2/CFG_2

CM28

GPP_H15/M2_SKT2/CFG_3

WHISKEYLAKE-U_BGA1528

@

PCIE1_RXN/USB31_1_RXN
PCIE1_RXP/USB31_1_RXP
PCIE1_TXN/USB31_1_TXN

PCIE1_TXP/USB31_1_TXP

PCIE2_RXN/USB31_2_RXN/SSIC_1_RXN

PCIE2_RXP/USB31_2_RXP/SSIC_1_RXP
PCIE2_TXN/USB31_2_TXN/SSIC_1_TXN
PCIE2_TXP/USB31_2_TXP/SSIC_1_TXP

PCIE3_RXN/USB31_3_RXN
PCIE3_RXP/USB31_3_RXP
PCIE3_TXN/USB31_3_TXN

PCIE3_TXP/USB31_3_TXP

PCIE4_RXN/USB31_4_RXN
PCIE4_RXP/USB31_4_RXP
PCIE4_TXN/USB31_4_TXN

PCIE4_TXP/USB31_4_TXP

USB2_COMP

USB2_VBUSSENSE

GPP_E9/USB2_OC0#/GP_BSSB_CLK

GPP_E10/USB2_OC1#/GP_BSSB_DI

GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#

GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2

GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2

GPP_E8/SATALED#/SPI1_CS1#

8 of 20

USB2_1N
USB2_1P

USB2_2N
USB2_2P

USB2_3N
USB2_3P

USB2_4N
USB2_4P

USB2_5N
USB2_5P

USB2_6N
USB2_6P

USB2_7N
USB2_7P

USB2_8N
USB2_8P

USB2_9N
USB2_9P

USB2_10N
USB2_10P

USB2_ID

RSVD37

CB5
CB6
CA4
CA3

BY8
BY9
CA2
CA1

BY7
BY6
BY4
BY3

BW6
BW5
BW2
BW1

CE3
CE4

CE1
CE2

CG3
CG4

CD3
CD4

CG5
CG6

CC1
CC2

CG8
CG9

CB8
CB9

CH5
CH6

CC3
CC4

CC5
CE8
CC6

CK6
CK5
CK8
CK9

CP8
CR8
CM8

CN8
CM10
CP10

CN7

AR3

PCIE5_L0_RXN37
PCIE5_L0_RXP37
PCIE5_L0_TXN37
PCIE5_L0_TXP37

PCIE5_L1_RXN37
PCIE5_L1_RXP37
PCIE5_L1_TXN37

AMD GPU

C C

WLAN

2.5" SATA HDD

NVMe SSD

B B

A A

SATA SSD

PCIE5_L1_TXP37

PCIE5_L2_RXN37
PCIE5_L2_RXP37
PCIE5_L2_TXN37
PCIE5_L2_TXP37

PCIE5_L3_RXN37
PCIE5_L3_RXP37
PCIE5_L3_TXN37
PCIE5_L3_TXP37

PCIE9_RXN73
PCIE9_RXP73
PCIE9_TXN73

LAN

PCIE9_TXP73

PCIE10_RXN66
PCIE10_RXP66
PCIE10_TXN66
PCIE10_TXP66

PCIE11_L0_SATA0_RXN96
PCIE11_L0_SATA0_RXP96
PCIE11_L0_SATA0_TXN96
PCIE11_L0_SATA0_TXP96

NC

PCIE13_L3_RXN64
PCIE13_L3_RXP64
PCIE13_L3_TXN64
PCIE13_L3_TXP64

PCIE13_L2_RXN64
PCIE13_L2_RXP64
PCIE13_L2_TXN64
PCIE13_L2_TXP64

PCIE13_L1_RXN64
PCIE13_L1_RXP64
PCIE13_L1_TXN64
PCIE13_L1_TXP64

PCIE13_L0_SATA1_RXN64
PCIE13_L0_SATA1_RXP64
PCIE13_L0_SATA1_TXN64
PCIE13_L0_SATA1_TXP64

PCIE5_L0_RXN
PCIE5_L0_RXP
PCIE5_L0_TXN

1 2

C1000 0.22U_6.3V_K_X5R_0201

PCIE5_L0_TXP

1 2

C1001 0.22U_6.3V_K_X5R_0201

PCIE5_L1_RXN
PCIE5_L1_RXP
PCIE5_L1_TXN

1 2

C1002 0.22U_6.3V_K_X5R_0201

PCIE5_L1_TXP

1 2

C1003 0.22U_6.3V_K_X5R_0201

PCIE5_L2_RXN
PCIE5_L2_RXP
PCIE5_L2_TXN PCIE5_L2_TXN_C

1 2

C1004 0.22U_6.3V_K_X5R_0201

PCIE5_L2_TXP

1 2

C1005 0.22U_6.3V_K_X5R_0201

PCIE5_L3_RXN
PCIE5_L3_RXP
PCIE5_L3_TXN PCIE5_L3_TXN_C

1 2

C1006 0.22U_6.3V_K_X5R_0201

1 2

C1007 0.22U_6.3V_K_X5R_0201

PCIE9_RXN
PCIE9_RXP
PCIE9_TXN

1 2

C1010 0.1U_10V_K_X5R_0201

PCIE9_TXP

1 2

C1011 0.1U_10V_K_X5R_0201

PCIE10_RXN
PCIE10_RXP
PCIE10_TXN

1 2

C1008 0.1U_10V_K_X5R_0201

PCIE10_TXP

1 2

C1009 0.1U_10V_K_X5R_0201

PCIE11_L0_SATA0_RXN
PCIE11_L0_SATA0_RXP
PCIE11_L0_SATA0_TXN
PCIE11_L0_SATA0_TXP

PCIE13_L3_RXN
PCIE13_L3_RXP
PCIE13_L3_TXN
PCIE13_L3_TXP

PCIE13_L2_RXN
PCIE13_L2_RXP
PCIE13_L2_TXN
PCIE13_L2_TXP

PCIE13_L1_RXN
PCIE13_L1_RXP
PCIE13_L1_TXN
PCIE13_L1_TXP

PCIE13_L0_SATA1_RXN
PCIE13_L0_SATA1_RXP
PCIE13_L0_SATA1_TXN
PCIE13_L0_SATA1_TXP

1 2

R1007 1/20W_100_1%_0201

PCIE5_L0_TXN_C
PCIE5_L0_TXP_C

PCIE5_L1_TXN_C
PCIE5_L1_TXP_C

PCIE5_L2_TXP_C

PCIE5_L3_TXP_CPCIE5_L3_TXP

PCIE9_TXN_C
PCIE9_TXP_C

PCIE10_TXN_C
PCIE10_TXP_C

USB3P2_RXN
USB3P2_RXP
USB3P2_TXN
USB3P2_TXP

USB3P3_RXN
USB3P3_RXP
USB3P3_TXN
USB3P3_TXP

USB3P4_RXN
USB3P4_RXP
USB3P4_TXN
USB3P4_TXP

USBC_USB2N
USBC_USB2P

USBP3­USBP3+

USBP4­USBP4+

TBT_USB5N
TBT_USB5P

USBP6­USBP6+

USBP8­USBP8+

USBP9­USBP9+

USBP10­USBP10+

USB2_COMP
USB2_ID
USB2_VBU

-USB_PORT5_OC0

-USB_PORT4_OC2

-USB_PORT3_OC3

HD_SSD_DEVSLP

SATA1_DEVSLP2

BDC_ON

-SATA_DTCT

M2_CARD_DET

VCC3_SUS

12

1

1

R1009

1/20W_10K_5%_0201

TP1001 @

TP1002 @

12

12

12

R1010

R1001

R1002

1/20W_10K_5%_0201

1/20W_10K_5%_0201

1 2

VCC3B

12

12

12

R1006

R1011

R1012

1/20W_10K_5%_0201

1/20W_10K_5%_0201

1/20W_10K_5%_0201

1/20W_10K_5%_0201

USB3P2_RXN 59
USB3P2_RXP 59
USB3P2_TXN 59
USB3P2_TXP 59

USB3P3_RXN 69
USB3P3_RXP 69
USB3P3_TXN 69
USB3P3_TXP 69

USB3P4_RXN 69
USB3P4_RXP 69
USB3P4_TXN 69
USB3P4_TXP 69

USBC_USB2N 63
USBC_USB2P 63

USBP3- 69
USBP3+ 69

USBP4- 69
USBP4+ 69

TBT_USB5N 73
TBT_USB5P 73

USBP6- 51
USBP6+ 51

USBP8- 51
USBP8+ 51

USBP9- 73
USBP9+ 73

USBP10- 66

M2_CARD_DET
0 -W/CARD ==>GND
1 -W/O CARD ==>PU

USBP10+ 66

-USB_PORT5_OC0 73

-USB_PORT4_OC2 69

-USB_PORT3_OC3 69

HD_SSD_DEVSLP 96

1 2

R1003 1/20W_113_1%_0201

1 2

R1004 1/20W_0_5%_0201@

1 2

R1005 1/20W_1K_5%_0201@

R1008

1/20W_10K_5%_0201

SATA1_DEVSLP2 64

BDC_ON 66

-SATA_DTCT 64

M2_CARD_DET 64

-SATA_DTCT
0- SATA
1- PCIE

USB Port2 (TYPE-C)

USB Port3 (Left back AOU)

USB Port4 For DCI(Left Front)

NC

TYPE-C

Left back AOU

DCI(Left Front)

IO/B

Touch Panel

NC

CAMER A

Finger Printer

BT

(IO/B)

(Left Front)
(Left back AOU)

(2.5_HDD)

(M.2_SSD)

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

CPU (8/16): PCIE/USB/SATA

CPU (8/16): PCIE/USB/SATA

CPU (8/16): PCIE/USB/SATA

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

10 128

10 128

10 128

1

0.1

0.1

0.1

of

of

of

5

VInafix.com

D D

WGR_RXD0N66
WGR_RXD0P66

WGR_RXD1N66
WGR_RXD1P66

WGR_TXD0N66
WGR_TXD0P66

WGR_TXD1N66
WGR_TXD1P66

WGR_RXCN66
WGR_RXCP66

WGR_TXDCN66
WGR_TXDCP66

C C

Intel update Mow

R1101

1/20W_150_1%_0201

GPP_H23, Internal Weak
pull-down

B B

A A

This strap must be
configured to 0
(SAFS is disabled)
if the eSPI or LPC strap is
configured to 0
(eSPI is disabled)

GPP_H23

VCC3_SUS

12

R1115

@

1/20W_10K_5%_0201

12

R1116

@

1/20W_10K_5%_0201

5

1 2

GPP_H21, Internal Weak
pull-down
LOW: 38.4/19.2MHZ (DEFAULT)
HIGH: 24MHZ

Spec to 75K Ohm

1 2

XTAL_FREQ_SELECT

WGR_RXD0N
WGR_RXD0P

WGR_RXD1N
WGR_RXD1P

WGR_TXD0N
WGR_TXD0P

WGR_TXD1N
WGR_TXD1P

WGR_RXCN
WGR_RXCP

WGR_TXDCN
WGR_TXDCP

CNV_WT_RCOMP

20190123

A4WP_PRESENT

R1117
1/20W_75K_5%_0201

VCC3_SUS

R1113

@

R1114

4

CR30
CP30

CM30

CN30

CN32

CM32

CP33
CN33

CN31
CP31

CP34
CN34

CP32
CR32
CP20
CK19
CG17

CR14
CP14
CN14

CM14

CJ17
CH17

CF17

1 2

1/20W_4.7K_5%_0201

1 2

1/20W_10K_5%_0201

4

3

UCPU1I

CNV_WR_D0N
CNV_WR_D0P

CNV_WR_D1N
CNV_WR_D1P

CNV_WT_D0N
CNV_WT_D0P

CNV_WT_D1N
CNV_WT_D1P

CNV_WR_CLKN
CNV_WR_CLKP

CNV_WT_CLKN
CNV_WT_CLKP

CNV_WT_RCOMP_0
CNV_WT_RCOMP_1
GPP_F0/CNV_PA_BLANKING
GPP_F1
GPP_F2

GPP_C8/UART0_RXD
GPP_C9/UART0_TXD
GPP_C10/UART0_RTS#
GPP_C11/UART0_CTS#

GPP_F8/CNV_MFUART2_RXD
GPP_F9/CNV_MFUART2_TXD

GPP_F23/A4WP_PRESENT

WHISKEYLAKE-U_BGA1528

@

GPP_H18/CPU_C10_GATE#

GPP_H19/TIMESYNC_0

GPP_H21 / XTAL_FREQ_SELECT

GPP_D4/IMGCLKOUT0/BK4/SBK4

GPP_H20/IMGCLKOUT_1

GPP_F12/EMMC_DATA0
GPP_F13/EMMC_DATA1
GPP_F14/EMMC_DATA2
GPP_F15/EMMC_DATA3
GPP_F16/EMMC_DATA4
GPP_F17/EMMC_DATA5
GPP_F18/EMMC_DATA6
GPP_F19/EMMC_DATA7

GPP_F20/EMMC_RCLK

GPP_F21/EMMC_CLK

GPP_F11/EMMC_CMD

GPP_F22/EMMC_RESET#

EMMC_RCOMP

9 of 20

GPP_H22
GPP_H23
GPP_F10

GPD7

GPP_F3

CN27

CM27

CF25
CN26
CM26
CK17

BV35
CN20

CG25
CH25

CR20
CM20
CN19
CM19
CN18
CR18
CP18
CM18

CM16
CP16
CR16
CN16

CK15

-CPU_C10_GATE

XTAL_FREQ_SELECT

GPP_H23

GPD7
DGFX_PWRGD

PLANARID1
PLANARID2
PLANARID3

PLANARID0

EMMC_RCOMP

R1119
1/16W_200_1%_0402

1 2

TABLE: PLANARID

PLANARID[3:0]

VCC3M

R1118

1 2

GPD7

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1/20W_100K_5%_0201

2015/01/12

2015/01/12

2015/01/12

3

0h (0000b)

1h (0001b)

2h (0010b)

3h (0011b)

Fh (1111b)

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PHASE

EVT

FVT

SIT

SIT-R

SVT

2

-CPU_C10_GATE 15,123

DGFX_PWRGD 50

2016/01/12

2016/01/12

2016/01/12

2

@

@

R1102

1 2

1/20W_0_5%_0201

@

R1103

1 2

1/20W_0_5%_0201

Title

Title

Title

CPU (9/16): CSI-2/EMMC/CNVI

CPU (9/16): CSI-2/EMMC/CNVI

CPU (9/16): CSI-2/EMMC/CNVI

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

@

R1104

1 2

1 2

1/20W_0_5%_0201

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

1

PLANARID3
PLANARID2
PLANARID1
PLANARID0

R1105

1/20W_0_5%_0201

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

1

11 128

11 128

11 128

0.1

0.1

0.1

of

of

of

5

VInafix.com

D D

VCC3B

R1250
1/20W_10K_5%_0201UMA@

1 2

-CLKREQ_PCIE5

R1209
1/20W_10K_5%_0201

DIS@

1 2

C C

GPU

LAN

WLAN

-PCIE5_CLK_100M37
PCIE5_CLK_100M37

-CLKREQ_PCIE550

-PCIE9_CLK_100M73
PCIE9_CLK_100M73

-CLKREQ_PCIE973

-PCIE10_CLK_100M66
PCIE10_CLK_100M66

-CLKREQ_PCIE1066

NC

NC

M.2 SSD

B B

-PCIE13_CLK_100M64
PCIE13_CLK_100M64

-CLKREQ_PCIE1364

-PCIE5_CLK_100M
PCIE5_CLK_100M

-CLKREQ_PCIE5

-PCIE9_CLK_100M
PCIE9_CLK_100M

-CLKREQ_PCIE9

-PCIE10_CLK_100M
PCIE10_CLK_100M

-CLKREQ_PCIE10

AW2

AY3

CF32

BC1

BC2

CE32

BD3
BC3

CF30

BH3
BH4

CE31

BA1
BA2

CE30

BE1
BE2

CF31

WHISKEYLAKE-U_BGA1528

UCPU1J

CLKOUT_PCIE_N_0
CLKOUT_PCIE_P_0
GPP_B5/SRCCLKREQ0#

CLKOUT_PCIE_N_1
CLKOUT_PCIE_P_1
GPP_B6/SRCCLKREQ1#

CLKOUT_PCIE_N_2
CLKOUT_PCIE_P_2
GPP_B7/SRCCLKREQ2#

CLKOUT_PCIE_N_3
CLKOUT_PCIE_P_3
GPP_B8/SRCCLKREQ3#

CLKOUT_PCIE_N_4
CLKOUT_PCIE_P_4
GPP_B9/SRCCLKREQ4#

CLKOUT_PCIE_N_5
CLKOUT_PCIE_P_5
GPP_B10/SRCCLKREQ5#

@

4

10 of 20

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

GPD8/SUSCLK

XTAL_IN

XTAL_OUT

CLK_BIASREF

CLKIN_XTAL

RTCX1
RTCX2

SRTCRST#

RTCRST#

AU1
AU2

BT32

CK3
CK2

CJ1
CM3

BN31
BN32

BR37
BR34

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

SUSCLK_32K

XTAL24_IN
XTAL24_OUT

CLK_BIASREF
CNV_REFCLK_R

RTCX1
RTCX2

-SRTCRST

-RTCRST

1

TP1201

1

TP1202

1 2

R1207 0_0201_SP

2

C1205

1

@

6.8P_25V_C_NPO_0201

3

SUSCLK_32K 66

-SRTCRST 20

-RTCRST 20

FOOTPRINT:R_0402

SM01000JN0J

EMC

1 2

L1201 SBY100505T-300Y-N

1 2

L1202 SBY100505T-300Y-N

SM01000JN0J

EMC

R1204

1 2

1/20W_60.4_1%_0201

Vendor
TXC

HARMONY

CNV_REFCLK 66

R1203

1 2

1/20W_10M_5%_0201

RT C X1

1. Space > 15mils

2. No trace under crystal

3. Place on oppsosit side of
MCP for temp inf l uence

1 2

C1201 10P_25V_D_NPO_0201

Y1202

32.768KHZ_9PF_9H03280012

SJ10000J900

1 2

1 2

C1204 10P_25V_D_NPO_0201

、、、、

RT C X2

、、、、

2

TABLE of XTAL (Y1201)

LCFC P/N

SJ10000S500

SJ10000RR00

12

R1205
1/20W_200K_1%_0201

Description

S CRYSTAL 24MHZ 12PF +-20PPM 8Y24000034

S CRYSTAL 24MHZ 12PF X2C024000DC1H-HU

Cr y st al

XTAL24_IN_R

XTAL24_OUT_R

1

C1202
15P_25V_J_NPO_0201

2

Y1201
24MHZ_12PF_8Y24000034

1

3

SJ10000S500

4 2

1

1

C1203
15P_25V_J_NPO_0201

2

TABLE of XTAL (Y1202)

LCFC P/N

Vendor

SJ10000J900

TXC

SJ100069400

KDS

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Description

S CRYSTAL 32.768KHZ 9PF 20PPM

S CRYSTAL 32.768KHZ 9PF 1TJF09

2016/01/12

2016/01/12

Deciphered Date

Deciphered Date

Deciphered Date

2016/01/12

2

Title

Title

Title

CPU (10/16): CLOCK SIGNALS

CPU (10/16): CLOCK SIGNALS

CPU (10/16): CLOCK SIGNALS

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 11, 2019

Thursday, July 11, 2019

Thursday, July 11, 2019

12 128

12 128

12 128

1

0.1

0.1

0.1

of

of

of

5

VInafix.com

Vinafix.com

1 2

1 2

1 2

R1326 0_0402_SP

@

U1301

1

NC

Vcc

2

IN A

GND3OUT

NL17SZ17XV5T2G_SOT-553-5

VCC3M VCC3M

@

R1305

1 2

1/20W_10K_5%_0201

For vPro -LAN WAKE

5

4

R1306

1 2

D D

C C

-RSMRST85

TP1301 Test_Point_20MIL

CPUCORE_PWRGD85

VGATE85,108

-PCIE_WAKE66

B B

BPWRG85

1

R1308 0_0201_SP

R1322 1/20W_0_5%_0201@

VCC3M

4

-PLTRST_FAR

U1301

1/20W_1K_5%_0201

12

R13011/20W_33_5%_0201

12

@

R13021/20W_33_5%_0201

R1304

1 2

1/20W_10K_5%_0201

1 2

R1307 0_0201_SP

1 2

R1309 0_0201_SP

1 2

R1310 0_0201_SP

1 2

-PLTRST_NEAR

@

C1302

VCC3BVCC3M_PCH

@

R1325

1 2

R1328
0_0201_SP

2

1

1/20W_10K_5%_0201

100P_25V_J_NPO_0201_MURATA

2

C1301

1

100P_25V_J_NPO_0201_MURATA

-PLTRST

-XDP_DBR

-RSMRST

CPU_PWRGD
VCCST_PWRGD

BPWRG_R
CPUCORE_PWRGD_R
MPWRG_R

-SUSWARN

-SUSWARN_N

-PCIE_WAKE

-LANWAKE_DSW

3

-PLTRST_FAR 37,64,66,73,85

-PLTRST_NEAR 98

UCPU1K

BJ35

GPP_B13/PLTRST#

CN10

SYS_RESET#

BR36

RSMRST#

AR2

PROCPWRGD

BJ2

VCCST_PWRGOOD

CR10

SYS_PWROK

BP31

PCH_PWROK

BP30

DSW_PWROK

BV34

GPP_A13/SUSWARN#/SUSPWRDACK

BY32

GPP_A15/SUSACK#

BU30

WAKE#

BU32

GPD2/LAN_WAKE#

BU34

GPD11/LANPHYPC

@

CPUCORE_ON85,108

GPP_B11/EXT_PWR_GATE#

WHISKEYLAKE-U_BGA1528

11 of 20

-PCH_SLP_S3

-PCH_SLP_S4

-PCH_SLP_S5

GPP_B12/SLP_S0#

GPD4/SLP_S3#
GPD5/SLP_S4#

GPD10/SLP_S5#

SLP_SUS#
SLP_LAN#

GPD9/SLP_WLAN#

GPD6/SLP_A#

GPD3/PWRBTN#

GPD1/ACPRESENT

GPD0/BATLOW#

INTRUDER#

GPP_B2/VRALERT#

INPUT3VSEL

CPUCORE_ON

1
1
1

BJ37
BU36
BU27
BT29

BU29
BT31
BT30
BU37

BU28
BU35
BV36

BR35

CC37
CC36

BT27

2

VCC3_SUS VCC1R05_SUS

R1313

1/20W_10K_5%_0201

1 2

@

R1327
1/20W_0_5%_0201

1 2

TP1303
TP1304
TP1305

-PCH_SLP_S0

-PCH_SLP_S3

-PCH_SLP_S4

-PCH_SLP_S5

-PCH_SLP_SUS

-PCH_SLP_LAN

-PCH_SLP_WLAN

-PCH_SLP_M

-PWRSW_EC
AC_PRESENT

-BATLOW

-INTRUDER

GPP_B11

INPUT3VSEL

Q1302 Q1301

32

Q1302

1

LSK3541G1ET2L_VMT3

RTCVCC

VCC3_SUS

12

R1320

R1303

1 2

1/20W_1M_1%_0201

1/20W_100K_5%_0201

@

D1301

RB751VM-40TE-17_UMD2M2

1 2

1

TP1302

1

TP1306

1

TP1308

1

TP1311

1

TP1310

R1314
1/20W_1K_5%_0201

1 2

R1329

1/20W_62_5%_0201

1 2

32

Q1301

1

LSK3541G1ET2L_VMT3

-PCH_SLP_S3 85

-PCH_SLP_S4 85,106,107

-PCH_SLP_S5 85

-PWRSW_EC 64,85
AC_PRESENT 85

1

VCCST_PWRGD

Follow the CRB

VCC3_SUS

VCC3M

1 2

R1323 1/20W_10K_5%_0201

A A

1 2

R1324 1/20W_10K_5%_0201

1 2

R1317 1/20W_10K_5%_0201

1 2

R1318 1/20W_10K_5%_0201@

1 2

R1319 1/20W_10K_5%_0201@

5

-BATLOW

INPUT3VSEL

-RSMRST

CPUCORE_PWRGD

BPWRG

AC_PRESENT

@

R1315

1 2

1/20W_4.7K_5%_0201

Security Classification

Security Classification

R1316

1 2

1/20W_4.7K_5%_0201

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER TH IS SHEET NOR THE INFORMATION IT C ONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER TH IS SHEET NOR THE INFORMATION IT C ONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER TH IS SHEET NOR THE INFORMATION IT C ONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

1. must be always pulled-up to VCCRTC.

2. 1 = Enable DSW 3.3V-to-1.05V Integrated DeepSx Well (DSW) On-Die Voltage Regulator.
This must always be pulled high on product i on boar ds.

Title

Title

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2016/01/12

2016/01/12

2016/01/12

2

Title

CPU (11/16): SYSTEM PM

CPU (11/16): SYSTEM PM

CPU (11/16): SYSTEM PM

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

Date: Sheet of

Date: Sheet of

Date: Sheet of

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

1

13 128

13 128

13 128

0.1

0.1

0.1

VCCGFXCORE_I 110,112

VInafix.com

VCCCPUCORE 109,112

1

Cost@

C1450
10U_6.3V_M_X5R_0402

2

1

C1402
10U_6.3V_M_X5R_0402

2

1

C1412
10U_6.3V_M_X5R_0402

2

1

C1415

2.2U_6.3V_M_X5R_0201

2

1

Cost@

C1425

2.2U_6.3V_M_X5R_0201

2

5

1

Cost@

C1451
10U_6.3V_M_X5R_0402

2

1

Cost@

C1403
10U_6.3V_M_X5R_0402

2

1

Cost@

C1413
10U_6.3V_M_X5R_0402

2

1

C1416

2.2U_6.3V_M_X5R_0201

2

1

C1426

2.2U_6.3V_M_X5R_0201

2

1

Cost@

C1452
10U_6.3V_M_X5R_0402

2

1

C1404
10U_6.3V_M_X5R_0402

2

1

Cost@

C1433
10U_6.3V_M_X5R_0402

2

1

C1417

2.2U_6.3V_M_X5R_0201

2

1

C1427

2.2U_6.3V_M_X5R_0201

2

1

C1453
10U_6.3V_M_X5R_0402

2

1

C1405
10U_6.3V_M_X5R_0402

2

1

C1434
10U_6.3V_M_X5R_0402

2

1

Cost@

C1418

2.2U_6.3V_M_X5R_0201

2

1

C1428

2.2U_6.3V_M_X5R_0201

2

1

C1454
10U_6.3V_M_X5R_0402

2

x14

1

Cost@

C1406
10U_6.3V_M_X5R_0402

2

1

C1435
10U_6.3V_M_X5R_0402

2

1

Cost@

C1419

2.2U_6.3V_M_X5R_0201

2

1

C1429

2.2U_6.3V_M_X5R_0201

2

1

2

1

C1407
10U_6.3V_M_X5R_0402

2

1

C1436
10U_6.3V_M_X5R_0402

2

1

C1420

2.2U_6.3V_M_X5R_0201

2

1

Cost@

C1430
1U_6.3V_M_X5R_0201

2

VCCGFXCORE_I

VCCCPUCORE

Comet Lake U 4+2 Processor] VCCCPUCORE

Comet Lake U 4+2 Processor [BOTTOM]10uF x8 47uF x20

VCCCPUCORE

1

C1449
10U_6.3V_M_X5R_0402

2

D D

Comet Lake U 4+2 Processor] VCCCPUCORE

Comet Lake U 4+2Processor[TOP]2.2uFx21 10uFx29 22uF

VCCCPUCORE

1

C1401
10U_6.3V_M_X5R_0402

2

VCCCPUCORE

1

C1411
10U_6.3V_M_X5R_0402

2

VCCCPUCORE

1

C1440

C C

10U_6.3V_M_X5R_0402

2

VCCCPUCORE

1

Cost@

C1414

2.2U_6.3V_M_X5R_0201

2

VCCCPUCORE

1

Cost@

C1424

2.2U_6.3V_M_X5R_0201

2

B B

A A

4

1

Cost@

C1456

C1455

10U_6.3V_M_X5R_0402

10U_6.3V_M_X5R_0402

2

1

1

1

Cost@

C1408

C1409
10U_6.3V_M_X5R_0402

2

1

C1438
10U_6.3V_M_X5R_0402

2

1

C1422

2.2U_6.3V_M_X5R_0201

2

34

1

C1432

4.3U_0402_4V6-M

2

C1410
10U_6.3V_M_X5R_0402

2

1

C1439
10U_6.3V_M_X5R_0402

2

1

Cost@

C1423

2.2U_6.3V_M_X5R_0201

2

10U_6.3V_M_X5R_0402

2

1

C1437
10U_6.3V_M_X5R_0402

2

1

Cost@

C1421

2.2U_6.3V_M_X5R_0201

2

34

1

C1431

4.3U_0402_4V6-M

2

[WHL PDG]Package Sensing Recommendations

1.Trace Length Match: <25mil

2.Space: >25mil

3.Trace impedance:50ohm

4.Sense traces should be referenced to a solid ground plane

5.Avoid crossing over plane splits

[WHL PDG]SVID

VIDALERT#, VIDSCLK, and VIDSCLK comprise a three signal serial synchronous
interface (SVID) used to transfer power management information between the Whiskey
Lake processor and the voltage regulator controllers. Alert signal must be routed
between Clk and Data signals to minimize Cross-Talk.

3

VCCCPUCORE VCCCPUCORE

UCPU1L

AN9

VCCCORE5

VCCCORE35

AN10

VCCCORE1

VCCCORE36

AN24

VCCCORE2

VCCCORE37

AN26

VCCCORE3

VCCCORE38

AN27

VCCCORE4

VCCCORE44

AP2

VCCCORE6

VCCCORE45

AP9

VCCCORE9

VCCCORE48

AP24

VCCCORE7

VCCCORE49

AP26

VCCCORE8

VCCCORE50

AR5

VCCCORE13

VCCCORE46

AR6

VCCCORE14

VCCCORE47

AR7

VCCCORE15

VCCCORE51

AR8

VCCCORE16

VCCCORE52

AR10

VCCCORE10

VCCCORE56

AR25

VCCCORE11

VCCCORE57

AR27

VCCCORE12

VCCCORE58

AT9

VCCCORE19

VCCCORE59

AT24

VCCCORE17

VCCCORE53

AT26

VCCCORE18

VCCCORE54

AU5

VCCCORE24

VCCCORE55

AU6

VCCCORE25

VCCCORE63

AU7

VCCCORE26

VCCCORE64

AU8

VCCCORE27

VCCCORE60

AU9

VCCCORE28

VCCCORE61

AU24

VCCCORE20

VCCCORE62

AU25

VCCCORE21

VCCCORE69

AU26

VCCCORE22

VCCCORE65

AU27

VCCCORE23

VCCCORE66

AV2

VCCCORE30

VCCCORE67

AV5

VCCCORE32

VCCCORE68

AV7

VCCCORE33

VCCCORE70

AV10

VCCCORE29

VCCCORE73

AV27

VCCCORE31

VCCCORE71

AW5

VCCCORE39

VCCCORE72

AW6

VCCCORE40

VCCCORE74

AW7

VCCCORE41

AW8

VCCCORE42

VCC_SENSE

AW9

VCCCORE43

VSS_SENSE

AW10

VCCCORE34

VIDALERT#

BB9

RSVD3

BC24

VIDSCK

RSVD4

AY9

RSVD1

BB24

VIDSOUT

RSVD2

RSVD5

VCCSTG1

WHISKEYLAKE-U_BGA1528

12 of 20

@

UCPU1M

VCCCPUCORE

VCCGFXCORE_I

VCCCPUCORE

A5
A6

A8
A11
A12
A14
A15
A17
A18
A20
AA9
AB2
AB8
AB9

AB10

AC8
AD9
AE8
AE9

AE10

AF2
AF8

AF10

AG8
AG9
AH9
AJ8

AJ10

AK2
AK9
AL8
AL9

AL10

AM8

B3

B4

B6

B8
B11
B14
B17
B20

C2

C3

C6

C7

C8
C11
C12
C14
C15
C17
C18
C20

D4

D7
D11
D12
D14
Y10

VCCGT8
VCCGT9
VCCGT10
VCCGT1
VCCGT2
VCCGT3
VCCGT4
VCCGT5
VCCGT6
VCCGT7
VCCCORE75
VCCCORE76
VCCCORE77
VCCCORE78
VCCCORE79
VCCCORE80
VCCCORE81
VCCCORE82
VCCCORE83
VCCCORE84
VCCCORE85
VCCCORE86
VCCCORE87
VCCCORE88
VCCCORE89
VCCCORE90
VCCCORE91
VCCCORE92
VCCCORE93
VCCCORE94
VCCCORE95
VCCCORE96
VCCCORE97
VCCCORE98
VCCGT39
VCCGT40
VCCGT41
VCCGT42
VCCGT35
VCCGT36
VCCGT37
VCCGT38
VCCGT49
VCCGT51
VCCGT52
VCCGT53
VCCGT54
VCCGT43
VCCGT44
VCCGT45
VCCGT46
VCCGT47
VCCGT48
VCCGT50
VCCGT62
VCCGT63

VCCCORE100
VCCGT55
VCCGT56
VCCGT57
VCCCORE99

VCCCORE101

VCCGT_SENSE

VSSGT_SENSE

13 of 20

WHISKEYLAKE-U_BGA1528

@

VCCGT58
VCCGT59
VCCGT60
VCCGT61
VCCGT64
VCCGT69
VCCGT70
VCCGT71
VCCGT72
VCCGT65
VCCGT66
VCCGT67
VCCGT68
VCCGT73
VCCGT74
VCCGT75
VCCGT76
VCCGT77
VCCGT78
VCCGT79
VCCGT87
VCCGT88
VCCGT89
VCCGT90
VCCGT80
VCCGT81
VCCGT82
VCCGT83
VCCGT84
VCCGT85
VCCGT86
VCCGT95
VCCGT96
VCCGT91
VCCGT92
VCCGT93
VCCGT94
VCCGT98
VCCGT97
VCCGT100
VCCGT101
VCCGT99
VCCGT102
VCCGT104
VCCGT105
VCCGT106
VCCGT103
VCCGT107
VCCGT108
VCCGT109
VCCGT111
VCCGT112
VCCGT110
VCCGT114
VCCGT113

VCCGT116
VCCGT117
VCCGT118

D15
D17
D18
D20
E4
F5
F6
F7
F8
F11
F14
F17
F20
G11
G12
G14
G15
G17
G18
G20
H5
H6
H7
H8
H11
H12
H14
H15
H17
H18
H20
J7
J8
J11
J14
J17
J20
K2
K11
L7
L8
L10
M9
N7
N8
N9
N10
P2
P8
R9
T8
T9
T10
U8
U10
V2
V9
W8
W9
Y8

E3
D2

AW24
AW25
AW26
AW27
AY24
AY26
BA5
BA7
BA8
BA25
BA27
BB2
BB26
BC5
BC6
BC7
BC9
BC10
BC26
BC27
BD5
BD8
BD10
BD25
BD27
BE9
BE24
BE25
BE26
BE27
BF2
BF9
BF24
BF26
BG27

AN6
AN5

-SVID_ALERT_R

AA3

SVID_CLK

AA1

SVID_DATA

AA2

Y3

BG3

VCCGFXCORE_IVCCGFXCORE_I

VCCCPUCORE

R1412 0_0402_SP
R1413 0_0402_SP

1 2

R1410 0_0201_SP

1 2

R1411 0_0201_SP

1 2

R1416 1/20W_220_5%_0201

VCCSTG

R1414

1/16W_100_1%_0402

1 2
1 2

R1415

1/16W_100_1%_0402

[SKL PDG]VIDALERT#

Rs1

VCCGFXCORE_I

12

12

12

R1406
1/20W_56_5%_0201

Rpu1

VCCGT_SENSE 108
VSSGT_SENSE 108

2

575414_WHL_Ballout List

VCCCPUCORE

VCCST

12

12

R1407
1/20W_100_1%_0201

Rpu1 Rpu2

@

[SKL PDG]VIDSCK [SKL PDG]VIDSOUT

12

R1408

R1409

1/20W_100_1%_0201

1/20W_100_1%_0201

VCC_SENSE 108

VSS_SENSE 108

-SVID_ALERT

-SVID_ALERT 108

SVID_CLK 108

SVID_DATA 108

12

R1417
1/20W_100_1%_0201

Comet Lake U 4+2Processor Processor VCCGT
Comet Lake U 4+2Processor [BOTTOM] 47uF x4 22uF x 15

Comet Lake U 4+2Processor Processor VCCGT
Comet Lake U 4+2Processor[TOP] 10uF x15,1uF x11

VCCGFXCORE_I

1

1

2

VCCGFXCORE_I

1

2

VCCGFXCORE_I

1

2

Cost@

C1470
1U_6.3V_M_X5R_0201

C1481
10U_6.3V_M_X5R_0402

Cost@

C1490
10U_6.3V_M_X5R_0402

C1471
1U_6.3V_M_X5R_0201

2

1

C1482
10U_6.3V_M_X5R_0402

2

1

C1491
10U_6.3V_M_X5R_0402

2

1

C1472
1U_6.3V_M_X5R_0201

2

1

C1483
10U_6.3V_M_X5R_0402

2

1

C1492
10U_6.3V_M_X5R_0402

2

1

C1473
1U_6.3V_M_X5R_0201

2

1

C1484
10U_6.3V_M_X5R_0402

2

1

C1493
10U_6.3V_M_X5R_0402

2

1

C1474
1U_6.3V_M_X5R_0201

2

1

C1485
10U_6.3V_M_X5R_0402

2

1

C1494
10U_6.3V_M_X5R_0402

2

1

C1475
1U_6.3V_M_X5R_0201

2

1

C1486
10U_6.3V_M_X5R_0402

2

1

C1495
10U_6.3V_M_X5R_0402

2

1

C1476
1U_6.3V_M_X5R_0201

2

1

C1487
10U_6.3V_M_X5R_0402

2

1

34

1

C1477

4.3U_0402_4V6-M

2

1

C1488
10U_6.3V_M_X5R_0402

2

1

C1489
10U_6.3V_M_X5R_0402

2

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2016/01/12

2016/01/12

2016/01/12

Title

CPU (12/16): CPU POWER (1/2)

CPU (12/16): CPU POWER (1/2)

CPU (12/16): CPU POWER (1/2)

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

14 128

14 128

14 128

0.1

0.1

0.1

5

VInafix.com

Comet Lake U 4+2 Processor]VCCSA Comet Lake U 4+2 Processor]VDDQ
Comet Lake U 4+2 Processor[BOTTOM]10uF x6 47uF x2

VCCSA

1

C1501
10U_6.3V_M_X5R_0402

2

1

C1502
10U_6.3V_M_X5R_0402

2

D D

1

C1503
10U_6.3V_M_X5R_0402

2

1

C1504
10U_6.3V_M_X5R_0402

2

1

C1505
10U_6.3V_M_X5R_0402

2

1

C1506
10U_6.3V_M_X5R_0402

2

4

Comet Lake U 4+2 Processor[BOTTOM]10uF x6, 22uF x1

VCC1R2A

1

1

C1531

C1532

10U_6.3V_M_X5R_0402

10U_6.3V_M_X5R_0402

2

2

3

1

C1533
10U_6.3V_M_X5R_0402

2

1

C1534
10U_6.3V_M_X5R_0402

2

1

C1535
10U_6.3V_M_X5R_0402

2

1

C1536
10U_6.3V_M_X5R_0402

2

2

1

C1537
10U_6.3V_M_X5R_0402

2

2

C1551

22U_6.3V_M_X5R_0603

1

[CML PDG]VCCPLL_OC

[CML PDG]1uF x1

Primary side cap

VCCSFR_OC

2

C1545
1U_6.3V_K_X5R_0402_MURATA

1

1

[CML PDG]VCCSTG

[CML PDG]1uF x1

Primary side cap

VCCSTG

1

C1546
1U_6.3V_K_X5R_0201

2

Comet Lake U 4+2 Processor]VCCSA
Comet Lake U 4+2 Processor[TOP]10uF x7

VCCSA

1

C1507
10U_6.3V_M_X5R_0402

2

VCCSA

1

C1516

C C

10U_6.3V_M_X5R_0402

2

Comet Lake U 4+2 Processor]VCCIO
Comet Lake U 4+2 Processor[BOTTOM]1uF x4, 10uF x6

VCCIO

1

C1521
1U_6.3V_M_X5R_0201

2

VCCIO

1

B B

C1525
10U_6.3V_M_X5R_0402

2

A A

-CPU_C10_GATE11,123

20190604
R

emove for Cost

A_ON85,106,107,123

1

C1508
10U_6.3V_M_X5R_0402

2

1

C1517
10U_6.3V_M_X5R_0402

2

20190604
Remove for Cost

@

1

C1522
1U_6.3V_M_X5R_0201

2

1

C1526
10U_6.3V_M_X5R_0402

2

1 2

D1501 RB521CM-30T2R_VMN2M-2

1 2

D1502 RB521CM-30T2R_VMN2M-2

5

1

@

C1509
10U_6.3V_M_X5R_0402

2

1

C1520
10U_6.3V_M_X5R_0402

2

1

C1523
1U_6.3V_M_X5R_0201

2

1

C1527
10U_6.3V_M_X5R_0402

2

@

@

1

C1510
10U_6.3V_M_X5R_0402

2

1

C1524
1U_6.3V_M_X5R_0201

2

1

C1528
10U_6.3V_M_X5R_0402

2

VCC3M

12

R1506

1/16W_10K_1%_0402@

VCC1R2A

ON

1

C1511
10U_6.3V_M_X5R_0402

2

1

C1529
10U_6.3V_M_X5R_0402

2

1

C1548

@

10U_6.3V_M_X5R_0402

2

20190604
Remove for Cost

1

@

C1512
10U_6.3V_M_X5R_0402

2

1

C1530
10U_6.3V_M_X5R_0402

2

1 2

R1501 0_0603_SP

@

A2

A1

VIN1

VOUT1

B1

B2

VOUT2

VIN2

C2

C1

CT

PG

D2

D1

ON

GND

U1501
TPS22971YZPT_DSBGA8

4

1

C1513
10U_6.3V_M_X5R_0402

2

VCCSFR_OC

1

@

2

Comet Lake U 4+2 Processor]VDDQ
Comet Lake U 4+2 Processor[TOP]1uF x4, 10uF x3

VCC1R2A

1

1

C1538

C1539

1U_6.3V_M_X5R_0201

1U_6.3V_M_X5R_0201

2

VCCSTGVCCSFR_OC

C1547

0.1U_6.3V_K_X7R_0402

2

VCCST

1

C1540
1U_6.3V_M_X5R_0201

2

VCC1R2A

3

UCPU1N

AD36

VDDQ1

AH32

VDDQ2

AH36

VDDQ3

AM36

VDDQ4

AN32

VDDQ5

AW32

VDDQ6

AY36

VDDQ7

BE32

VDDQ8

BH36

VDDQ9

R32

VDDQ10

Y36

VDDQ11

BC28

RSVD1

BP11

VCCST1

BP2

VCCST2

BG1

VCCSTG1

BG2

VCCSTG2

BL27

VCCPLL_OC1

BM26

VCCPLL_OC2

BR11

VCCPLL1

BT11

VCCPLL2

WHISKEYLAKE-U_BGA1528

@

1

C1541
1U_6.3V_M_X5R_0201

2

VCCIO_SENSE
VSSIO_SENSE

VSSSA_SENSE
VCCSA_SENSE

14 of 20

VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16

VCCSA2
VCCSA1
VCCSA3
VCCSA5
VCCSA6
VCCSA4
VCCSA9
VCCSA7

VCCSA8
VCCSA13
VCCSA14
VCCSA10
VCCSA11
VCCSA12
VCCSA15
VCCSA16

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9

1

C1542
10U_6.3V_M_X5R_0402

2

VCCIO

AK24
AK26
AL24
AL25
AL26
AL27
AM25
AM27
BH24
BH25
BH26
BH27
BJ24

VCCSA
BJ26
BP16
BP18

BG8
BG10
BH9
BJ8
BJ9
BJ10
BK8
BK25
BK27
BL8
BL9
BL10
BL24
BL26
BM24
BN25

VCCIO_SENSE

BP28

VSSIO_SENSE

BP29

BE7
BG7

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

C1543
10U_6.3V_M_X5R_0402

2

VCCIO

12

R1502
1/20W_100_1%_0201

12

R1504
1/20W_100_1%_0201

1

C1544
10U_6.3V_M_X5R_0402

2

VCCSA

12

R1503
1/20W_100_1%_0201

2015/01/12

2015/01/12

2015/01/12

2

VSSSA_SENSE
VCCSA_SENSE

12

R1505
1/20W_100_1%_0201

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

[CML PDG]VCCST

[CML PDG]1uF x1

Primary side cap

VCCST

VSSSA_SENSE 108
VCCSA_SENSE 108

2016/01/12

2016/01/12

2016/01/12

2

C1549
1U_6.3V_K_X5R_0402_MURATA

1

[WHL PDG]VCCPLL

[WHL PDG]1uF x2

Primary side cap

2

C1550
1U_6.3V_K_X5R_0402_MURATA

1

Title

Title

Title

CPU (13/16): CPU POWER (2/2)

CPU (13/16): CPU POWER (2/2)

CPU (13/16): CPU POWER (2/2)

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

Date: Sheet o f

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

1

1

C1552
1U_6.3V_M_X5R_0201

2

15 128

15 128

15 128

0.1

0.1

0.1

5

VInafix.com

1 2

R1601 0_0603_SP

VCC3_SUS

1 2

R1602 0_0603_SP

VCC1R8_SUS

D D

VCC1R05_SUS VCC1R05_SUS_XTAL

C C

VCC1R05_SUS VCC1R05_SUS_AMP

B B

1 2

R1603 0_0603_SP

VCC1R05_SUS

1 2

R1604 0_0603_SP

1 2

R1605 0_0603_SP

[WHL PDG]VCCA_XTAL_1 P05

[WHL PDG]Close CP5
[WHL PDG]1uF x1

1 2

L1601 MMZ0603AFY560VT_2P

1 2

R1606 0_0603_SP

[WHL PDG]VCCAMPHYPLL_1P05

[WHL PDG]Close BV2
[WHL PDG]1uF x1

@

1 2

L1602 MMZ0603AFY560VT_2P

1 2

R1607 0_0603_SP

VCC3M_PCHVCC3M

VCC3_SUS_PRIM

VCC1R8_SUS_PRIM

VCC1R05_SUS_PRIM

VCCPRIM_COREVCC1R05_SUS

@

2

C1611

1

1U_6.3V_K_X5R_0402_MURATA

2

1

WHL PDG] VCCDPHY_1P24

[

WHL PDG]Close CP25

[
[WHL PDG]4.7uF x1

VCCDPHY_1P24 VCCDSW_1P05

C1614

1U_6.3V_K_X5R_0402_MURATA

2

C1604

4.7U_6.3V_M_X5R_0402_MURATA

1

VCCPRIM_CORE

2

C1615

1

1U_6.3V_K_X5R_0402_MURATA

VCC3_SUS_PRIM

VCC1R05_SUS_PRIM

4

[WHL PDG]VCCDSW_1P05

[WHL PDG]Close BT24 [WHL PDG]1uF x2
[WHL PDG]1uF x1

2

C1605

1

1U_6.3V_K_X5R_0402_MURATA

VCC1R8_SUS_PRIM

VCC3_SUS_PRIM

VCCPRIM_CORE

VCC1R05_SUS_PRIM

VCC1R05_SUS_AMP

VCC3M_PCH

VCCDSW_1P05

[WHL PDG]VCCPRIM_1P8 [WHL PDG]VCCPRIM_3P3

[WHL PDG]C lose CP17 and CP23

VCC1R8_SUS_PRIM

C1601

1U_6.3V_K_X5R_0402_MURATA

VCC1R05_SUS_PRIM

UCPU1P

BP20

VCCPRIM_1P051

BW16

VCCPRIM_1P059

BW18

VCCPRIM_1P0510

BW19

VCCPRIM_1P0511

BY16

VCCPRIM_1P0512

CA14

VCCPRIM_1P0514

CC15

VCCPRIM_1P81

CD15

VCCPRIM_1P84

CD16

VCCPRIM_1P85

CP17

VCCPRIM_1P88

CB22

VCCPRIM_3P34

CB23

VCCPRIM_3P35

CC22

VCCPRIM_3P36

CC23

VCCPRIM_3P37

CD22

VCCPRIM_3P38

CD23

VCCPRIM_3P39

CP29

VCCPRIM_3P310

BU15

VCCPRIM_CORE1

BU22

VCCPRIM_CORE2

BV15

VCCPRIM_CORE3

BV16

VCCPRIM_CORE4

BV18

VCCPRIM_CORE5

BV19

VCCPRIM_CORE6

BV20

VCCPRIM_CORE7

BV22

VCCPRIM_CORE8

BW20

VCCPRIM_CORE9

BW22

VCCPRIM_CORE10

CA12

VCCPRIM_CORE11

CA16

VCCPRIM_CORE12

CA18

VCCPRIM_CORE13

CA19

VCCPRIM_CORE14

CA20

VCCPRIM_CORE15

CB12

VCCPRIM_CORE16

CB14

VCCPRIM_CORE17

CB15

VCCPRIM_CORE18

BT24

VCCDSW_1P05

BU14

VCCAPLL_1P054

BV12

VCCPRIM_MPHY_1P051

BW12

VCCPRIM_MPHY_1P053

BW14

VCCPRIM_MPHY_1P054

BY12

VCCPRIM_MPHY_1P055

BY14

VCCPRIM_MPHY_1P056

BV2

VCCAMPHYPLL_1P05

BR15

VCCAPLL_1P052

CC12

VCCDUSB_1P05

BR24

VCCDSW_3P31

BT20

VCCHDA

BV23

VCCSPI

BT18

VCCPRIM_1P054

BT19

VCCPRIM_1P055

BU18

VCCPRIM_1P057

BU19

VCCPRIM_1P058

BT22

VCCPRIM_1P056

BP22

VCCPRIM_1P052

BV14

VCCPRIM_MPHY_1P052

WHISKEYLAKE-U_BGA1528

@

3

[WHL PDG]Close CP29
[WHL PDG]1uF x1 and 0.1uF x1 [WHL PDG]1uF x1 and 0.1uF x1

VCC3_SUS_PRIM

VCCRTC

DCPRTC

VCC3_SUS_PRIM

CB16

BR23

BY20
BP24

BR20

BT12

BP14

BR14

BU12

CP5

VCCLDOSRAM_1P24

BY24
CA24

BY23
CA23
CP25

BT23

BR12

CC18
CC19
CD18
CD19
CP23

BW23

BP23

CB36
CB35

1

C1606

2

0.1U_6.3V_K_X7R_0402

VCC1R05_SUS_PRIM

2

2

C1617

1

1

1U_6.3V_K_X5R_0402_MURATA

VCCPRIM_3P33

VCCPRIM_1P0513

VCCPRIM_1P053

VCCAPLL_1P053

VCCA_BCLK_1P05

VCCAPLL_1P051

VCCA_SRC_1P05

VCCA_XTAL_1P05

VCCDPHY_1P242
VCCDPHY_1P244

VCCDPHY_1P241
VCCDPHY_1P243

VCCDPHY_EC_1P24

VCCDSW_3P32

VCCA_19P2_1P05

VCCPRIM_1P82
VCCPRIM_1P83
VCCPRIM_1P86
VCCPRIM_1P87
VCCPRIM_1P89

VCCPRIM_3P32

VCCPRIM_3P31

GPP_B0/CORE_VID0
GPP_B1/CORE_VID1

16 of 20

2

C1618

1

VCCDPHY_1P24

VCC1R8_SUS_PRIM

[WHL PDG]VCCRTC

[WHL PDG]Close BR23

RTCVCC VCC3M_PCH VCCRTCEXT VCC1R05_SUS_PRIM VCC1R05_SUS_PRIM

2

1

C1608

1

1U_6.3V_K_X5R_0402_MURATA

RTCVCC

VCC1R05_SUS_XTAL

VCC3M_PCH

VCC3_SUS_PRIM

2

1U_6.3V_K_X5R_0402_MURATA

VCCRTCEXT

VCC1R05_SUS_PRIM

C1609

0.1U_6.3V_K_X5R_0201_MURATA

2

[WHL PDG]VCCDSW_GPIO

[WHL PDG]Close BR24
[WHL PDG]1uF x1

2

C1616

1

1U_6.3V_K_X5R_0402_MURATA

[WHL PDG]VCCRTCEXT

[WHL PDG]Close BP24
[WHL PDG]1uF x1

2

C1612

1

0.1U_6.3V_K_X5R_0201_MURATA

[WHL PDG]VCCPRIM_1P05

[WHL PDG]1uF x1

2

C1619

1

1U_6.3V_K_X5R_0402_MURATA

1

[WHL PDG]VCCPHYGTAON_1P05

[WHL PDG]22uF x1

C1620

1 2

22U_6.3V_M_X5R_0603

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2015/01/12

2015/01/12

2015/01/12

2

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2016/01/12

2016/01/12

2016/01/12

Title

CPU (1/16): DDI/TYPE-C

CPU (1/16): DDI/TYPE-C

CPU (1/16): DDI/TYPE-C

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

16 128

16 128

16 128

0.1

0.1

0.1

5

VInafix.com

4

3

2

1

CR34

CR34

VSS_1

BT5

VSS_2

BY5

VSS_3

CP35

VSS_4

CM37

VSS_5

CK37

VSS_6

AW1

VSS_7

CM1

VSS_8

BD6

VSS_9

AY4

VSS_10

B34

VSS_11

E35

VSS_12

A4

VSS_13

AE24

VSS_14

AE26

VSS_15

AF25

VSS_16

AG24

VSS_17

AG26

VSS_18

AH24

VSS_19

AH25

VSS_20

B2

VSS_21

B36

VSS_22

C36

VSS_23

C37

VSS_24

CN1

CN1

D1
A32

A36

VSS_25

CN2

VSS_26

CN37

VSS_27

CP2

VSS_28

D1

VSS_29

A32

VSS_30

F33

VSS_31

A3

VSS_32

BJ7

VSS_33

CJ36

VSS_34

A36

VSS_35

BK10

VSS_36

CJ4

VSS_37

AB27

VSS_38

BK2

VSS_39

CK1

VSS_40

AB3

VSS_41

BK28

VSS_42

AB30

VSS_43

BK3

VSS_44

CK4

VSS_45

AB33

VSS_46

BK33

VSS_47

CK7

VSS_48

AB36

VSS_49

BK4

VSS_50

CL2

VSS_51

AB4

VSS_52

BK7

VSS_53

CM13

VSS_54

AB7

VSS_55

BL25

VSS_56

CM17

VSS_57

AC10

VSS_58

BL28

VSS_59

CM21

VSS_60

AC27

VSS_61

BL29

VSS_62

CM25

VSS_63

AC30

VSS_64

BL30

VSS_65

CM29

VSS_66

BL31

VSS_67

CM31

VSS_68

AD33

VSS_69

BL32

VSS_70

CM33

VSS_71

AD35

VSS_72

17 of 20

WHISKEYLAKE-U_BGA1528

@

1

TP1702

@

Test_Point_20MIL

D D

1

TP1708

@

Test_Point_20MIL

1

TP1705

@

C C

Test_Point_20MIL

B B

A A

1

TP1703

@

Test_Point_20MIL

1

TP1704

@

Test_Point_20MIL

5

UCPU1R

VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144

BL7
AE25
BM33
CM5
AE27
BM35
CM9
AE30
BM36
CN13
AE7
BM9
CN17
AF27
BN30
CN21
AF3
BN7
CN25
AF30
CN29
AF33
BP15
AF36
AF4
CN5
AF7
BP25
CN9
AG10
BP3
CP1
BP32
CP11
AH27
BP33
CP13
AH28
BP4
CP15
AH29
BP7
CP19
AH30
CP21
AH31
BR19
CP27
AH33
BR25
AH35
CP37
AJ25
BT15
AJ28
BT16
CP9
AJ7
CR2
AK3
CR36
AK33
D21
AK36
BT25
D25
AK4
BT28
AL28
BT33
D5
AL29

CR36

1

CP1

TP1707

@

Test_Point_20MIL

1

TP1701

@

Test_Point_20MIL

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

UCPU1T

N6

VSS_290

B37

VSS_291

CB3

VSS_292

P10

VSS_293

B5

VSS_294

CB33

VSS_295

P3

VSS_296

B7

VSS_297

CB4

VSS_298

P33

VSS_299

B9

VSS_300

CB7

VSS_301

P36

VSS_302

BA10

VSS_303

CC11

VSS_304

P4

VSS_305

BA28

VSS_306

P7

VSS_307

BA3

VSS_308

CC20

VSS_309

R27

VSS_310

BB3

VSS_311

CC25

VSS_312

R28

VSS_313

BB33

VSS_314

CC28

VSS_315

R29

VSS_316

BB36

VSS_317

CC31

VSS_318

R30

VSS_319

BB4

VSS_320

CC7

VSS_321

R31

VSS_322

BC25

VSS_323

CD11

VSS_324

T27

VSS_325

CD12

VSS_326

T30

VSS_327

BC29

VSS_328

CD14

VSS_329

T33

VSS_330

T35

VSS_331

BC32

VSS_332

CD24

VSS_333

T36

VSS_334

CD25

VSS_335

T7

VSS_336

BC8

VSS_337

CE33

VSS_338

U26

VSS_339

BD28

VSS_340

CE35

VSS_341

U7

VSS_342

BD33

VSS_343

CE36

VSS_344

V26

VSS_345

BD35

VSS_346

CE7

VSS_347

V27

VSS_348

BD36

VSS_349

CF11

VSS_350

V3

VSS_351

BE10

VSS_352

CF14

VSS_353

V30

VSS_354

BE28

VSS_355

CF19

VSS_356

V33

VSS_357

BE29

VSS_358

CF2

VSS_359

V36

VSS_360

BE3

VSS_361

19 of 20

WHISKEYLAKE-U_BGA1528

@

2015/01/12

2015/01/12

2015/01/12

3

CF23

VSS_362

V4

VSS_363

BE30

VSS_364

CF28

VSS_365

W10

VSS_366

BE31

VSS_367

CF3

VSS_368

W27

VSS_369

CF4

VSS_370

W30

VSS_371

BF3

VSS_372

CG33

VSS_373

W7

VSS_374

BF33

VSS_375

CG7

VSS_376

BF36

VSS_377

Y26

VSS_378

BF4

VSS_379

CH31

VSS_380

Y27

VSS_381

BG25

VSS_382

Y30

VSS_383

BG28

VSS_384

CJ11

VSS_385

Y33

VSS_386

CJ14

VSS_387

Y35

VSS_388

BH28

VSS_389

CJ19

VSS_390

Y7

VSS_391

BH29

VSS_392

CJ23

VSS_393

BH32

VSS_394

CJ28

VSS_395

BH33

VSS_396

CJ33

VSS_397

BH35

VSS_398

CJ35

VSS_399

BP19

VSS_400

BR16

VSS_401

BY18

VSS_402

BY19

VSS_403

CC16

VSS_404

BU16

VSS_405

CC14

VSS_406

BR22

VSS_407

BU20

VSS_408

CD20

VSS_409

BT14

VSS_410

BP12

VSS_411

CB24

VSS_412

CC24

VSS_413

J5

VSS_414

U24

VSS_415

BD7

VSS_416

AR4

VSS_417

AU4

VSS_418

AW4

VSS_419

BA6

VSS_420

BC4

VSS_421

BE4

VSS_422

BE8

VSS_423

BA4

VSS_424

BD4

VSS_425

BG4

VSS_426

CJ2

VSS_427

CJ3

VSS_428

AM5

VSS_429

CM4

VSS_430

AC5

VSS_431

AG5

VSS_432

CR6

VSS_433

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2016/01/12

2016/01/12

2016/01/12

UCPU1S

BT35

VSS_145

D6

VSS_146

AL32

VSS_147

BT36

VSS_148

D8

VSS_149

AL7

VSS_150

D9

VSS_151

AM10

VSS_152

BU11

VSS_153

E23

VSS_154

AM28

VSS_155

E27

VSS_156

AM33

VSS_157

BU23

VSS_158

E29

VSS_159

AM35

VSS_160

BU24

VSS_161

E31

VSS_162

BU25

VSS_163

E33

VSS_164

AN25

VSS_165

BU7

VSS_166

E9

VSS_167

AN28

VSS_168

BV11

VSS_169

F12

VSS_170

AN29

VSS_171

F15

VSS_172

AN30

VSS_173

F18

VSS_174

AN31

VSS_175

BV3

VSS_176

F2

VSS_177

AN7

VSS_178

BV31

VSS_179

F21

VSS_180

AN8

VSS_181

BV33

VSS_182

F24

VSS_183

BV4

VSS_184

F3

VSS_185

AP3

VSS_186

BW11

VSS_187

F4

VSS_188

AP33

VSS_189

BW15

VSS_190

G21

VSS_191

AP36

VSS_192

G27

VSS_193

AP4

VSS_194

G33

VSS_195

AR28

VSS_196

G35

VSS_197

G36

VSS_198

AT33

VSS_199

BW24

VSS_200

G9

VSS_201

AT35

VSS_202

H21

VSS_203

AT36

VSS_204

BW7

VSS_205

H27

VSS_206

AT4

VSS_207

BY11

VSS_208

AU10

VSS_209

BY15

VSS_210

H9

VSS_211

AU28

VSS_212

BY22

VSS_213

J12

VSS_214

AU29

VSS_215

J15

VSS_216

18 of 20

WHISKEYLAKE-U_BGA1528

@

Title

Title

Title

Size

Size

Size

B

B

B

Date: Sheet

Date: Sheet

2

Date: Sheet

BY25

VSS_217

J18

VSS_218

AU32

VSS_219

BY28

VSS_220

J21

VSS_221

AV25

VSS_222

BY33

VSS_223

J24

VSS_224

AV28

VSS_225

BY35

VSS_226

J33

VSS_227

AV3

VSS_228

BY36

VSS_229

J36

VSS_230

AV33

VSS_231

J6

VSS_232

AV36

VSS_233

C1

VSS_234

K21

VSS_235

AV4

VSS_236

C21

VSS_237

K22

VSS_238

AV6

VSS_239

C25

VSS_240

K24

VSS_241

AV8

VSS_242

C29

VSS_243

K25

VSS_244

AW28

VSS_245

C33

VSS_246

K27

VSS_247

AW29

VSS_248

C4

VSS_249

K28

VSS_250

AW3

VSS_251

C9

VSS_252

K29

VSS_253

AW30

VSS_254

CA11

VSS_255

K3

VSS_256

AW31

VSS_257

CA15

VSS_258

K30

VSS_259

AY33

VSS_260

CA22

VSS_261

K31

VSS_262

AY35

VSS_263

K32

VSS_264

B12

VSS_265

K4

VSS_266

B15

VSS_267

CA25

VSS_268

K9

VSS_269

B18

VSS_270

CB11

VSS_271

L27

VSS_272

B21

VSS_273

L33

VSS_274

B23

VSS_275

L35

VSS_276

B25

VSS_277

CB18

VSS_278

L36

VSS_279

B27

VSS_280

CB19

VSS_281

L6

VSS_282

B29

VSS_283

CB2

VSS_284

N25

VSS_285

B31

VSS_286

CB20

VSS_287

N27

VSS_288

CB25

VSS_289

CPU (15/16): GND

CPU (15/16): GND

CPU (15/16): GND

Document Number Re v

Document Number Re v

Document Number Re v

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

1

C1

1

TP1706

@

Test_Point_20MIL

17 128

17 128

17 128

of

of

of

0.1

0.1

0.1

5

VInafix.com

4

3

2

1

VCCIO

CFG0
[SKL EDS]

12

L:Stall.

R1807

*

H:(Default) Normal

1/16W_1K_5%_0402@

D D

C C

B B

A A

Operation; No stall.

CFG0 CFG4 CFG3

12

R1808

1/16W_1K_1%_0402@

[SKL CRB]

[SKL PDG]Route
HOOK[6] to
Skylake
ITP_PMODE.
Termination:
Resistor value
from 1K ohm to 3K
ohm pull up to
PCH_V1.0A Rail.

12

R1805 1/16W_49.9_1%_0402

CFG4

*L: Embedded DisplayPort Enabled
H: Embedded DisplayPort Disabled

12

R1804
1/16W_1K_1%_0402

CFG0

CFG3
CFG4

CFG9

12

R1802

@

1/20W_1K_5%_0201

CFG_RCOMP

ITP_PMODE

1

RSVD25

TP1834@

1

RSVD24

TP1835@

1

RSVD34

TP1836@

1

RSVD33

TP1837@

1

RSVD22

TP1838@

1

RSVD23

TP1839@

1

RSVD69

TP1840@

1

RSVD70

TP1841@

1

RSVD17

TP1842@

1

RSVD16

TP1843@

1

RSVD35

TP1844@

1

RSVD7

TP1845@

1

RSVD71

TP1846@

1

RSVD1

TP1847@

1

RSVD30

TP1848@

1

RSVD32

TP1849@

1

RSVD31

TP1850@

UCPU1Q

T4

CFG_0

R4

CFG_1

T3

CFG_2

R3

CFG_3

J4

CFG_4

M4

CFG_5

J3

CFG_6

M3

CFG_7

R2

CFG_8

N2

CFG_9

R1

CFG_10

N1

CFG_11

J2

CFG_12

L2

CFG_13

J1

CFG_14

L1

CFG_15

L3

CFG_16

N3

CFG_18

L4

CFG_17

N4

CFG_19

AB5

CFG_RCOMP

W4

ITP_PMODE

CG2

RSVD25

CG1

RSVD24

H4

RSVD34

H3

RSVD33

BV24

RSVD22

BV25

RSVD23

G3

RSVD69

G4

RSVD70

BK36

RSVD17

BK35

RSVD16

W3

RSVD35

AM4

RSVD7

AM3

RSVD71

A35

RSVD1

D34

RSVD30

G2

RSVD32

G1

RSVD31

WHISKEYLAKE-U_BGA1528

@

CFG3

PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
0 : ENABLED
SET DFX ENABLED BIT IN DEBUG INTERFACE MSR
1 : DISABLED

RSVD_TP5
RSVD_TP4

IST_TRIG

RSVD_TP3

RSVD72
RSVD73

TP1
TP3

RSVD74
RSVD75

RSVD76
RSVD77

RSVD29

RSVD26
RSVD27

RSVD78
RSVD79

RSVD8
RSVD9

RSVD11
RSVD10

RSVD80
RSVD81

RSVD82
RSVD83

TP2

VSS_392

TP5

RSVD68

RSVD_TP1

RSVD67

RSVD84

RSVD66
RSVD85

SKTOCC#

20 of 20

12

R1801
1/16W_1K_1%_0402@

RSVD_TP5

F37

RSVD_TP4

F34

IST_TRIG

CP36

RSVD_TP3

CN36

BJ36

RSVD72

BJ34

RSVD73

BK34

TP1

BR18

TP3

BT9

RSVD74

BT8

RSVD75

BP8

RSVD76

BP9

RSVD77

CR4

RSVD29

CP3

RSVD26

CR3

RSVD27

AU3

RSVD78

AT3

RSVD79

AN1

RSVD8

AN2

RSVD9

AN4

RSVD11

AN3

RSVD10

AL2

RSVD80

AL1

RSVD81

AL4

RSVD82

AL3

RSVD83

BP34

TP2
VSS_392

BP36
BP35

TP5

C34

RSVD68

A34
B35

RSVD67

CR35

RSVD84

AH26

RSVD66

AJ27

RSVD85

E1

SKTOCC

VCC1R05_SUS_PRIM

1

TP1801 @

1

TP1802 @

1

TP1803 @

1

TP1804@

1

TP1805 @

1

TP1806 @

1

TP1807 @

1

TP1808 @

1

TP1809 @

1

TP1810 @

1

TP1811 @

1

TP1812 @

1

TP1813 @

1

TP1814 @

1

TP1815 @

1

TP1816 @

1

TP1817 @

1

TP1818 @

1

TP1819 @

1

TP1820 @

1

TP1821 @

1

TP1822 @

1

TP1823 @

1

TP1824 @

1

TP1825 @

1

TP1826 @

1

TP1827 @

1

TP1828 @

1

TP1829 @

1

TP1830 @

1

TP1831 @

1

TP1832 @

1

TP1833 @

R1811 0_0402_SP

DFXTESTMODE

R1809

1/16W_1.5K_5%_0402

1 2

ITP_PMODE

12

R1810

1/16W_1K_1%_0402@

HIGH - DFXTESTMODE DISABLED(DEFAULT)
LOW - DFXTESTMODE ENABLED
WEAK INTERNAL PU

1 2

TABLE

CFG0 : Stall Reset Sequence

after PCU PLL Lock until de-asserted

1 : No Stall

0 : Stall

CFG4 : eDP Enable

1 : Disabled
0 : Enabled

CFG9 : SVID Bus Communication
1 : Enabled
0 : Disabled

[SKL EDS]Zero Voltage Mode:VCCOPC is fixed OPC VR output voltage of 1V, the
processor can drive VR to LPM (Low Power Mode) which sets VR output to 0V using
ZVM# signal as shown below:

ZVM# state

VCCOPC

0V

0V

1V

[SKL EDS]Minimum Speed Mode: VCCEOPIO can be connected to OPC VR in this
case VCCEOPIO is fixed to 1V. The processor can drive VR to LPM (Low Power
Mode) which sets VR output to 0V using ZVM# signal .
In order to achieve better power/performance it is recommended to use a
separate VR for VCCEOPIO in this case VCCEOPIO is configurable to 0.8V/1V.
The processor drives the VR to set VCCEOPIO value(0.8V/1V) using MSM#
signal, based on the required bandwidth for the EOPIO interface as shown
below:

ZVM# state

1V

VCCEOPIO

MSM# state

0V

1V

1V

X

0V

1V 1V

1

TP1851@

1

TP1852@

1

TP1853@

1

TP1854@

1

TP1855@

1

TP1856@

1

TP1857@

1

TP1858@

1

TP1859@

1

TP1860@

1

TP1861@

1

TP1862@

1

TP1863@

1

TP1864@

1

TP1865@

1

TP1866@

1

TP1867@

1

TP1868@

0V

0.8V

RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52

RSVD54
RSVD55
RSVD56
RSVD57
RSVD58
RSVD59

RSVD60
RSVD61

RSVD62
RSVD63

UCPU1O

K12

RSVD46

K14

RSVD47

K15

RSVD48

K17

RSVD49

K18

RSVD50

K20

RSVD51

L25

RSVD52

M24

RSVD53

M26

RSVD54

P24

RSVD55

P26

RSVD56

R24

RSVD57

R25

RSVD58

R26

RSVD59

W25

RSVD60

V24

RSVD61

Y25

RSVD62

Y24

RSVD63

WHISKEYLAKE-U_BGA1528

@

15 of 20

RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

RSVD64
RSVD65

RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44RSVD53
RSVD45

1

TP1869 @

1

TP1870 @

1

TP1871 @

1

TP1872 @

1

TP1873 @

1

TP1874 @

1

TP1875 @

1

TP1876 @

1

TP1877 @

1

TP1878 @

AA24
AA26
AB25
AC24
AC25
AC26
AD24
AD26

V25
T25

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

CPU (16/16): CFG/RESERVED

CPU (16/16): CFG/RESERVED

CPU (16/16): CFG/RESERVED

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

18 128

18 128

18 128

0.1

0.1

0.1

5

VInafix.com

D D

C C

4

3

2

1

BLANK

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

BLANK

BLANK

BLANK

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

19 128

19 128

19 128

1

0.1

0.1

0.1

of

of

of

5

VInafix.com

RTCVCC

D D

RTCVCC 13,16,100

4

3

2

1

RTC CONN.

RTCVCC

RTC External Circuit

RTCBATT(R2001 D2003 )
RTCVCC
Trace width = 20mils

D2003

C C

ME@

JRTC1

1

1

2

2

3

GND1

4

GND2

B B

HIGHS_WS33020-S0351-HF

SP020011200

D2003

R2001
1/20W_1K_5%_0201

1 2

R2001

12

RB520CM-30T2R_VMN2M2

RTCVCC

1 2

R2002 1/20W_20K_5%_0201

1 2

R2003 1/20W_20K_5%_0201

2

C2001

@

1U_6.3V_M_X5R_0201

1

2

C2002
1U_6.3V_K_X5R_0402_MURATA

1

2

C2003
1U_6.3V_K_X5R_0402_MURATA

1

-RTCRST

-SRTCRST

@

@

JCMOS
SHORT PADS

1 2

JME
SHORT PADS

1 2

-RTCRST 12

-SRTCRST 12

A A

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

Title

Title

RTC BATTERY

RTC BATTERY

RTC BATTERY

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

20 128

20 128

20 128

1

0.1

0.1

0.1

VCC3_SUS_SPI

VInafix.com

VCC3_SUS

5

VCC3_SUS_SPI 7,85

VCC3_SUS 3,7,8,9,10,11,13,16,50,93,98,124

4

3

2

1

Mirror Code, Close to SPI ROM (U2101).

D D

C C

B B

A A

-ECSPI_SS85
ECSPI_MOSI85
ECSPI_MISO85
ECSPI_CLK85

5

-ECSPI_SS
ECSPI_MOSI
ECSPI_MISO

Vendor

WINBOND

MXIC

-SPI_CS07

SPI_MISO_IO17,98

SPI_IO27

-SPI_CS1_8MB7

1 2

R2107 0_0402_SP

1 2

R2108 0_0402_SP

1 2

R2109 0_0402_SP

1 2

R2110 0_0402_SP

TABLE of SPI ROM (U2101)

LCFC P/N

SA00008A300

SA00009WJ00

-SPI_CS0

SPI_MISO_IO1

SPI_IO2

-SPI_CS1_8MB

R2101 0_0402_SP

R2102 1/16W_33_5%_0402

R2104 1/16W_33_5%_0402

R2111 0_0402_SP

R2112 1/16W_33_5%_0402SPI_8M@

R2113 1/16W_33_5%_0402SPI_8M@

-SPI_CS0_16MB_R
SPI_MOSI_IO0_16MB_R
SPI_MISO_IO1_16MB_R
SPI_CLK_16MB_RECSPI_CLK

Description

S IC FL 128M W25Q128JVSIQ SOIC 8P SPI
S IC FL 128M MX25L12872FM2I-10

1 2

1 2

1 2

1 2

1 2

1 2

4

-SPI_CS0_16MB_R

SPI_MISO_IO1_16MB_R

SPI_IO2_16MB_R

-SPI_CS0_8MB_R

SPI_MISO_IO1_8MB_R

SPI_IO2_8MB_R

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

U2101

1

/CS

2

DO(IO1)

3

/WP(IO2)

4

GND

W25Q128JVSIQ_SO8

U2102

1

/CS

2

DO (IO1)

3

IO2

GND4DI (IO0)

W25Q64JVSSIQ_SO8

2015/01/12

2015/01/12

2015/01/12

0.1U_6.3V_K_X5R_0201_MURATA

8

VCC

7

/HOLD(IO3)

6

CLK

5

DI(IO0)

SPI_8M@

8

VCC

7

IO3

6

CLK

5

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

3

VCC3_SUS_SPI

2

C2101

1

VCC3_SUS_SPI

SPI_IO3_16MB_R

SPI_CLK_16MB_R

SPI_MOSI_IO0_16MB_R

2

C2102

0.1U_6.3V_K_X5R_0201_MURATA

1

VCC3_SUS_SPI

SPI_IO3_8MB_R

SPI_CLK_8MB_R

SPI_MOSI_IO0_8MB_R

2

SPI_8M@

C2103

0.1U_6.3V_K_X5R_0201_MURATA

1

Deciphered Date

Deciphered Date

Deciphered Date

VCC3_SUS

12

R2117
1/16W_0_5%_0402@

D2101

1 2

RB520CM-30T2R_VMN2M2

1 2

R2103 1/16W_33_5%_0402

1 2

R2105 1/16W_33_5%_0402

1 2

R2106 1/16W_33_5%_0402

1 2

R2114 1/16W_33_5%_0402SPI_8M@

1 2

R2115 1/16W_33_5%_0402SPI_8M@

1 2

R2116 1/16W_33_5%_0402SPI_8M@

2016/01/12

2016/01/12

2016/01/12

2

SPI_IO3

SPI_CLK

SPI_MOSI_IO0

Title

Title

Title

SPI FLASH

SPI FLASH

SPI FLASH

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

SPI_MOSI_IO0 7,98

1

SPI_IO3 7

SPI_CLK 7,98

21 128

21 128

21 128

0.1

0.1

0.1

of

of

of

5

VInafix.com

D D

C C

4

3

2

1

BLANK

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

BLANK

BLANK

BLANK

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

22 128

22 128

22 128

1

0.1

0.1

0.1

of

of

of

5

VInafix.com

D D

C C

4

3

2

1

BLANK

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

BLANK

BLANK

BLANK

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

23 128

23 128

23 128

1

0.1

0.1

0.1

of

of

of

5

VInafix.com

D D

C C

4

3

2

1

BLANK

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

BLANK

BLANK

BLANK

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

24 128

24 128

24 128

1

0.1

0.1

0.1

of

of

of

5

VInafix.com

D D

C C

4

3

2

1

BLANK

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

BLANK

BLANK

BLANK

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

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Thursday, July 04, 2019

Thursday, July 04, 2019

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D D

C C

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3

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1

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B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

BLANK

BLANK

BLANK

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

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Thursday, July 04, 2019

Thursday, July 04, 2019

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D D

C C

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3

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1

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B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

BLANK

BLANK

BLANK

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

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E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

27 128

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D D

C C

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3

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1

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B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

BLANK

BLANK

BLANK

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

28 128

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Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

BLANK

BLANK

BLANK

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

Thursday, July 04, 2019

Thursday, July 04, 2019

Thursday, July 04, 2019

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C C

4

3

2

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A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/01/12

2015/01/12

2015/01/12

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/01/12

2016/01/12

2016/01/12

Title

BLANK

BLANK

BLANK

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

E14/E15 NM-C421E14/E15 NM-C421

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Thursday, July 04, 2019

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