Kontron VX305-RC, VX305-SA, VX3058, VX3052 User Manual

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USER'S GUIDE

VX305x

3U VPX Computing Node

CA.DT.B25-7e - June 2017

VX305x User's Guide - CA.DT.B25-7e

VX305x User's Guide

Disclaimer

Kontron would like to point out that the information contained in this manual may be subject to alteration, particularly as a result of the constant upgrading of Kontron products. This document does not entail any guarantee on the part of Kontron with respect to technical processes described in the manual or any product characteristics set out in the manual. Kontron assumes no responsibility or liability for the use of the described product(s), conveys no license or title under any patent, copyright or mask work rights to these products and makes no representations or warranties that these products are free from patent, copyright or mask work right infringement unless otherwise specified. Applications that are described in this manual are for illustration purposes only. Kontron makes no representation or warranty that such application will be sui table for the specified use without further testing or modification. Kontron expressly informs the user that this manual only contains a general description of processes and instructions which may not be applicable in every individual case. In cases of doubt, please contact Kontron.

This manual is protected by copyright. All rights are reserved by Kontron. No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means (electronic, mechanical, photocopying, recording, or otherwise), without the express written permission of Kontron. Kontron points out that the information contained in this manual is constantly being updated in line with the technical alterations and improvements made by Kontron to the products and thus this manual only reflects the technical status of the products by Kontron at the time of publishing.

Brand and product names are trademarks or registered trademarks of their respective owners.

Lise-Meitner-Str. 3-5

86156 Augsburg

Germany

www.kontron.com

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VX305x User's Guide - CA.DT.B25-7e

REVISION HISTORY

PUBLICATION TITLE: VX305x User's Guide

DOC. ID: CA.DT.B25-7e

Revision Brief Description of Changes Date of Issue

7e Updated sections:

- 1.3.1 Main Features

- 1.3.3 Ordering Information

- 1.7 Related Publications New section:

- 7 / VX305x-RC Characteristics

6e Updated sections:

- 1.3.1 Main Features

- Table 3 Rear I/O Interfaces

- Table 36 VPX Connector P1 Signal Definition

5e New sections:

- 3.8 Reset

- 3.9 Write Protect Mode

- 3.10 Graphic Option Updated sections:

- 2.7 Battery Replacement

- 3.3 Battery and Supercap

4e New sections:

- 2.9 M2 Module Mechanical Parts References Updated sections:

- Table 1: Order Codes

- 5.2: Power Specifications

- Table 45: VX305x Functional Points Synthesis and

associated curves

3e Update of section 2.7 - Battery Replacement 06-2016 2e Updated sections:

- 1.3.1 Main Features / section: Rear Transition Module

- 4.2.1 XMC J15 Connector Pin Assignment

- 5.2 Power Specifications

- 5.3 Board Thermal Monitoring

- 5.4 CPU Thermal Monitoring New sections:

- 1.3.7 M2 Module List

- 5.1 Electrical Specifications

1e Updated sections:

- 1.6 - MTBF

- 4.4.2 - LEDs Activity

0e Preliminary Version 06-2015

06-2017

12-2016

11-2016

09-2016

05-2016

10-2015

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VX305x User's Guide - CA.DT.B25-7e

Customer Support

Please contact our support team at support.KFR@kontron.com

Customer Service

As a trusted technology innovator and global solutions provider, Kontron extends its embedded market strengths into a services portfolio allowing companies to break the barriers of traditional product lifecycles. Proven product expertise cou pled with collaborative and highly-experienced support enables Kontron to provide exceptional peace of mind to build and maintain successful products.

For more details on Kontron’s service offerings such as: enhanced repair services, extended warranty, Kontron training academy, and more visit http://www.kontron.com/support-and-services/services.

Customer Comments

If you have any difficulties using this manual, discover an error, or just want to provide some feedback, contact Kontron support. Detail any errors you find. We will correct the errors or problems as soon as possible and post the revised manual on our website.

www.kontron.com // iii

SYMBOLS

The following symbols may be used in this manual:

DANGER indicates a hazardous situation which, if not avoided, will result in death or serious injury.

WARNING indicates a hazardous situation which, if not avoided, could result in death or serious injury.

CAUTION indicates a hazardous situation which, if not avoided, may result in minor or moderate injury.

NOTICE indicates a property damage message.

Electric Shock!

This symbol and title warn of hazards due to electrical shocks (> 60 V) when touching products or parts of them. Failure to observe the precautions indicated and/or prescribed by the law may endanger your life/health and/or result in damage to your material.

VX305x User's Guide - CA.DT.B25-7e

ESD Sensitive Device!

This symbol and title inform that the electronic boards and their components are sensitive to static electricity. Care must therefore be taken during all handling operations and inspections of this pro duct in order to ensure product integrity at all times.

HOT Surface!

Do NOT touch! Allow to cool before servicing.

Laser!

This symbol inform of the risk of exposure to laser beam from an electrical device. Eye protection per manufacturer notice shall review before servicing.

This symbol indicates general information about the product and the user manual.

This symbol also indicates detail information about the specific product configuration.

This symbol precedes helpful hints and tips for daily use.

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VX305x User's Guide - CA.DT.B25-7e

FOR YOUR SAFETY

Your new Kontron product was developed and tested carefully to provide all features necessary to ensure its compliance with electrical safety requirements. It was also designed for a long fault-free life. However, the life expectancy of your product can be drastically reduced by improper treatment during unpacking and installation. Therefore, in the interest of your own safety and of the correct operation of your new Kontron product, you are requested to conform with the following guidelines.

High Voltage Safety Instructions

As a precaution and in case of danger, the power connector must be easily accessible. The power connector is the product’s main disconnect device.

Warning!

All operations on this device must be carried out by sufficiently skilled personnel only.

Caution, Electric Shock!

Before installing a non hot-swappable Kontron product into a system always ensure that your mains power is switched off. This also applies to the installation of piggybacks. Serious electrical shock hazards can exist during all installation, repair, and maintenance operations on this product. The refore, always unplug the power cable and any other cables which provide external voltages before performing any work on this product. Earth ground connection to vehicle’s chassis or a central grounding point shall remain connected. The earth ground cable shall be the last cable to be disconnected or the first cable to be connected when performing installation or removal procedures on this product.

Special Handling and Unpacking Instructions

ESD Sensitive Device!

Electronic boards and their components are sensitive to static electricity. Therefore, care must be taken during all handling operations and inspections of this product, in order to ensure product integrity at all times

Do not handle this product out of its protective enclosure while it is not used for operational purposes unless it is otherwise protected.

Whenever possible, unpack or pack this product only at EOS/ESD safe work stations. Where a safe work station is not guaranteed, it is important for the user to be electrically discharged before touching the product with his/her hands or tools. This is most easily done by touching a metal part of your system housing.

It is particularly important to observe standard anti-static precautions when changing piggybacks, ROM devices, jumper settings etc. If the product contains batteries for RTC or memory backup, ensure that the product is not placed on conductive surfaces, including anti-static plastics or sponges. They can cause short circuits and damage the batteries or conductive circuits on the product.

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VX305x User's Guide - CA.DT.B25-7e

GENERAL INSTRUCTIONS ON USAGE

In order to maintain Kontron’s product warranty, this product must not be altered or modified in any way. Changes or modifications to the product, that are not explicitly approved by Kontron and described in this manual or received from Kontron’s Technical Support as a special handling instruction, will void your warranty.

This product should only be installed in or connected to systems that fulfill all necessary technical and specific environmental requirements. This also applies to the operational temperature range of the specific board version, that must not be exceeded. If batteries are present, their temperature restrictions must be taken into account.

In performing all necessary installation and application operations, only follow the instructions supplied by the present manual.

Keep all the original packaging material for future storage or warranty shipments. If it is necessary to store or ship the pro duct then re-pack it in the same manner as it was delivered.

Special care is necessary when handling or unpacking the product. See Special Handling and Unpacking Instruction.

Kontron products may be equipped with parts from Japanese manufacturers. Customers must ensure that final Kontron products destination is not impacted by this condition.

ENVIRONMENTAL PROTECTION STATEMENT

This product has been manufactured to satisfy environmental protection requirements where possible. Many of the com ponents used (structural parts, printed circuit boards, connectors, batteries, etc.) are capable of being recycled.

Final disposition of this product after its service life must be accomplished in accordance with applicable country, state, or local laws or regulations.

Environmental protection is a high priority with Kontron. Kontron follows the DEEE/WEEE directive. You are encouraged to return our products for proper disposal.

The Waste Electrical and Electronic Equipment (WEEE) Directive aims to:

4 Reduce waste arising from electrical and electronic equipment (EEE)

4 Make producers of EEE responsible for the environmental impact of their products, especially when they become

waste

4 Encourage separate collection and subsequent treatment, reuse, recovery, recycling and sound environmental

disposal of EEE

Improve the environmental performance of all those involved during the lifecycle of EEE

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VX305x User's Guide - CA.DT.B25-7e

Table Of Contents

1 / Introduction 1..............................................................................

1.1 Manual Overview 2..........................................................................

1.1.1 Objective 2.................................................................................

1.1.2 Audience 2.................................................................................

1.1.3 Scope 2....................................................................................

1.1.4 Structure 2.................................................................................

1.1.5 Terminology, Definitions and Abbreviations 2....................................................

1.2 VPX Overview 3.............................................................................

1.3 Board Overview 3...........................................................................

1.3.1 Main Features 3.............................................................................

1.3.2 Block Diagram 6.............................................................................

1.3.3 Ordering Information 6.......................................................................

1.3.4 I/O Interfaces 8.............................................................................

1.3.5 Components Layout 10........................................................................

1.3.6 Technical Specification 12.....................................................................

1.3.7 M2 Module List 13............................................................................

1.4 Environmental Specifications 13................................................................

1.5 Board Weight 13.............................................................................

1.6 MTBF Data 14................................................................................

1.7 Related Publications 15.......................................................................

2 / Installation 16...............................................................................

2.1 Safety Requirements 16.......................................................................

2.2 Board Identification 17........................................................................

2.3 Board Configuration 18........................................................................

2.3.1 Microswitches 18.............................................................................

2.3.2 SW1 Microswitch Description 18................................................................

2.3.3 SW2 Microswitch Description 19................................................................

2.4 Package Content 19...........................................................................

2.5 Initial Installation Procedures 19................................................................

2.6 Standard Removal Procedure 20................................................................

2.7 Battery Replacement

2.8 XMC Module Insertion / Removal Instructions 22..................................................

2.9 M.2 Module Insertion / Removal Instructions 23..................................................

2.10 Software Installation 24.......................................................................

3 / Additional Board Features 25..................................................................

3.1 The Backplane Power Supplies and their Monitoring 25............................................

3.2 RTC, Watchdog, Timers 25.....................................................................

3.2.1 Real-Time Clock (RTC) 25......................................................................

3.2.2 CPLD Watchdog 26...........................................................................

3.3 Battery and Supercap 27......................................................................

3.4 I2C Structure 28..............................................................................

3.5 CPLD Features 29.............................................................................

3.5.1 cPLD Registers Definition: 29...................................................................

3.5.1.1 Overview 29.................................................................................

3.5.1.2 Detailed Description 29........................................................................

3.6 Serial Lines EIA-422/485 Additional Modes 35....................................................

3.7 GPIOs and GDISCRETE1 35......................................................................

3.7.1 GPIOs 35....................................................................................

3.7.2 GDISCRETE1 35...............................................................................

3.8 Reset 36....................................................................................

21.......................................................................

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3.9 Write Protect Mode 36........................................................................

3.10 Graphic Option 39............................................................................

4 / Physical I/O 40...............................................................................

4.1 Front Panel Connectors 40.....................................................................

4.1.1 Serial Connector - COM 40.....................................................................

4.1.2 Gigabit Ethernet Connector 42..................................................................

4.1.3 USB Connector 42............................................................................

4.1.4 HDMI Port 43................................................................................

4.2 Onboard Connectors 44.......................................................................

4.2.1 XMC J15 Connector Pin Assignments 45..........................................................

4.2.2 XMC J16 Connector Pin Assignment 46...........................................................

4.2.3 J4101 Connector Pin Assignment 47..............................................................

4.2.4 P2701/P2801 Connector Pin Assignment 48......................................................

4.3 Rear Connectors 49...........................................................................

4.3.1 P0 Connector 50..............................................................................

4.3.2 P1 Connector 51..............................................................................

4.3.3 P2 Connector 52..............................................................................

4.4 LEDs 53.....................................................................................

4.4.1 Status LEDs Default Setting 53.................................................................

4.4.2 LEDs Activity 53..............................................................................

5 / Power and Thermal Specifications 56...........................................................

5.1 Electrical Specifications 56....................................................................

5.1.1 Input Powers Supplies Protection 56............................................................

5.1.2 Output Powers Supplies Protection 56...........................................................

5.2 Power Specifications 57.......................................................................

5.2.1 VX3052 and VX3058 Thermal Power 57..........................................................

5.2.2 VX3052, VX3058 Maximum Current 58...........................................................

5.3 Board Thermal Monitoring 58..................................................................

5.4 CPU Thermal Monitoring 59....................................................................

5.5 Intel® Turbo Boost Technology 61...............................................................

6 / Backplane Suggestions 63....................................................................

7 / VX305x-RC Characteristics 65.................................................................

7.1 VX305x-RC Specificities 65

.....................................................................

7.2 VX305x-RC Board Identification 66..............................................................

7.3 VX305x-RC Environmental Specifications 67......................................................

7.4 VX305x-RC MTBF Data 67......................................................................

7.5 VX305x-RC Peripheral Connectivity 68...........................................................

7.6 VX305x-RC Board Insertion 68..................................................................

7.7 VX305x-RC Battery Option 68..................................................................

7.8 VX305x-RC Thermal Performance 68............................................................

7.9 VX305x-RC BIOS Default Configuration for VX305x-RC 70..........................................

7.10 VX305x-RC Optional Modules 70................................................................

7.11 VX305x-RC Covers Removal / Insertion Instructions. 70............................................

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VX305x User's Guide - CA.DT.B25-7e

List Of Figures

Figure 1: VX305x-SA 3U VPX Overview 1.................................................................

Figure 2: VX305x-SA Block Diagram 6...................................................................

Figure 3: VX305x-SA Front Panel I/O Interfaces 8.........................................................

Figure 4: VX305x-SA Rear I/O Distribution 9..............................................................

Figure 5: VX305x-SA Components Layout (Top view) 10.....................................................

Figure 6: VX305x-SA Components Layout (Bottom view) 11..................................................

Figure 7: VX305x-SA Functional Block Diagram 12..........................................................

Figure 8: VX305x-SA Identification (Top Side) 17...........................................................

Figure 9: VX305x-SA Board Configuration (Bottom view) 18..................................................

Figure 10: Battery Replacement on VX305x-SA Board 21....................................................

Figure 11: XMC Module Insertion 22.......................................................................

Figure 12: XMC Module Removal 22......................................................................

Figure 13: M.2 Module Insertion Process 23................................................................

Figure 14: M.2 Module Removal Process 23................................................................

Figure 15: Battery Socket 27.............................................................................

Figure 16: I2C Diagram 28...............................................................................

Figure 17: Location of the Front Panel Connectors 40........................................................

Figure 18: Serial Connector 40...........................................................................

Figure 19: Serial Cable 41...............................................................................

Figure 20: Ethernet Connector 42........................................................................

Figure 21: USB Connector 42............................................................................

Figure 22: HDMI Port Cable 43...........................................................................

Figure 23: Onboard Connectors 44.......................................................................

Figure 24: VPX Connectors 49...........................................................................

Figure 25: LEDs Front panel 53..........................................................................

Figure 26: Temperature Sensor Location 58...............................................................

Figure 27: CPU Location 59..............................................................................

Figure 28: Standard VX305x-SA Heat Sink without XMC slot option 60.........................................

Figure 29: Single Star x4, 8 SlotsTopology 63..............................................................

Figure 30: Distributed, 2 Slots Topology 64................................................................

Figure 31: VX305x-RC Overview 65.......................................................................

Figure 32: VX305x-RC Identification (Top Side) 66..........................................................

Figure 33: VX305x-RC Board Insertion - Wedgelock Screw Location 68........................................

Figure 34: VX305x-RCThermal Management Zone 69.......................................................

Figure 35: VX305x-RC Processor TDP versus Card edge Temperature, RC product CFG=40 and CFG=80. 70..........

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VX305x User's Guide - CA.DT.B25-7e

List Of Tables

Table 1: VX305x Order Codes 7.........................................................................

Table 2: Front I/O Interfaces 8..........................................................................

Table 3: Rear I/O Interfaces 9..........................................................................

Table 4: Non-exhaustive M.2 module list, tested on VX305x M.2 slots 13......................................

Table 5: VX305x-SA Environmental Specifications 13.......................................................

Table 6: VX305x-SA Weight 13...........................................................................

Table 7: VX3058SA881150000 MTBF Data 14..............................................................

Table 8: VX3058SA881151000 MTBF Data 14...............................................................

Table 9: Related Publications 15.........................................................................

Table 10: SW1 Microswitch Description 18.................................................................

Table 11: SW2 Microswitch Description 19.................................................................

Table 12: cPLD Registers Definition - Overwiew 29..........................................................

Table 13: I2C_BOARD_STATUS @0x72 30..................................................................

Table 14: I2C_BOARD_CONTROL @0x73 31.................................................................

Table 15: I2C_ERROR_STATUS @0x74 32..................................................................

Table 16: I2C_PORT80 @ 0x75 32.........................................................................

Table 17: I2C_FAILCODE @ 0x76 33........................................................................

Table 18: I2C_SCRATCHPAD @ 0x77 33....................................................................

Table 19: I2C_MISC @ 0x78 33...........................................................................

Table 20: POWER ERROR part 1 @ 0x79 34.................................................................

Table 21: POWER ERROR part 2 @ 0x7A 34.................................................................

Table 22: Serial Lines Additional Modes 35................................................................

Table 23: Serial Connector Pin Assignment 40.............................................................

Table 24: Serial Connector Signal Description 41...........................................................

Table 25: Serial Cable Pin Assignment 41..................................................................

Table 26: Gigabit Ethernet Connector Pin Assignment 42....................................................

Table 27: USB Connector Pin Assignment 42...............................................................

Table 28: HDMI Port Pin Assignment 43...................................................................

Table 29: XMC J15 Connector Pin Assignments 45...........................................................

Table 30: XMC J16 Connector Pin Assignment 46............................................................

Table 31: J4101 Connector Pin Assignment 47..............................................................

Table 32: P2801 Connector Pin Assignment 48.............................................................

Table 33: VPX Connector P0 Wafer Assignment 50..........................................................

Table 34: VPX Connector P0 Signal Definition 50...........................................................

Table 35: VPX Connector P1 Wafer Assignment 51..........................................................

Table 36: VPX Connector P1 Signal Definition 51............................................................

Table 37: VPX Connector P2 Wafer Assignment 52..........................................................

Table 38: VPX Connector P2 Signal Definition 53...........................................................

Table 39: LEDs Description 53...........................................................................

Table 40: LEDs Activity 54..............................................................................

Table 41: Input Powers Supplies Protection 56.............................................................

Table 42: Output Powers Supplies Protection 56...........................................................

Table 43: Thermal Power: board power based on current measurements 57...................................

Table 44: Maximum VS1 Current 58.......................................................................

Table 45: VX305x-SA Functional Points Synthesis (1) 60.....................................................

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VX305x User's Guide - CA.DT.B25-7e

Table 46: VX305x-RC Specificities 65.....................................................................

Table 47: VX305x-RC Environmental Specifications 67......................................................

Table 48: VX305x-RC MTBF Data 67......................................................................

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VX305x User's Guide - CA.DT.B25-7e

1 / Introduction

The Kontron VX305x-SA is a 3U VPX computing blade for data and signal processing application focusing on application domains such as Military & Aerospace, Transportation and Energy/Industry.

The Kontron VPX blade VX305x-SA is the ideal building block for intensive parallel computing workloads where a cluster of Kontron VX305x-SAs can be used in switched OpenVPX environments.

The VX305x-SA board comes with EFI BIOS and supports Linux. It is covered by Kontron's long term supply program, which guarantees customers multi-year supply of the product beyond its active life.

Featuring the Intel® Xeon® D processor family (formerly Broadwell- DE), the VX305x-SA is the first 8-core multipro cessing board of the Kontron 3U VPX ecosystem. The highly integrated 8-core architecture with Dual 10 Gigabit Ethernet, high bandwidth PCI Express 3.0, high speed DDR4 memory, and versatile mezzanine options, is consequently SWaP-C optimized and simply the best choice for high performance embedded computing platforms.

VX305x-SA provides two 10GBASE-KR ports and 8 lanes Gen3 PCI Express to the backplane. Kontron VxFabric™ technology provides a TCP/IP protocol over the PCI Express infrastructure towards the application. A 10 Gigabit Ethernet switch and a PCI Express Switch can be complemented with two single star data planes, for 10 GETH and for PCI Express, respectively. A unique API with TCP/IP sockets makes it a powerful, leading edge Multi-CPU computing node architecture.

The M.2 top/bottom slots can be used for storage or for integration of customized personality modules. A 2-D graphic module is available, based on the Silicon Motion SM750 graphic controller.

Front-I/O module options are selectable for DVI/HDMI or Ethernet or other interfaces.

Figure 1: VX305x-SA 3U VPX Overview

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VX305x User's Guide - CA.DT.B25-7e

1.1 Manual Overview

1.1.1 Objective

This guide provides general information, hardware instructions, operating instructions and functional description of the VX305x-SA board. The onboard programming, onboard firmware and other software (e.g. drivers and BSPs) are described in detail in separate guides (see section 1.7 "Related Publications").

This hardware technical documentation reflects the most recent version of the product. The “Release Notes" (see section 1.7 "Related Publications") might help to keep track of potential evolutions.

Functional changes that differ from previous version of the document are identified by a vertical bar in the margin.

1.1.2 Audience

This guide is written to cover, as far as possible the range of people who will handle or use the VX305x-SA, from unpackers/inspectors, through system managers and installation technicians to hardware and software engineers. Most chapters assume a certain amount of knowledge on the subjects of single board computer architecture, interfaces, peripherals, system, cabling, grounding and communications.

1.1.3 Scope

This guide describes all variants of the VX305x series.

1.1.4 Structure

This guide is structured in a way that will reflect the sequence of operations from receipt of the board up to getting it working in your system. Each topic is covered in a separate chapter and each chapter begins with brief introduction that tells you what the chapter contains. In this way, you can skip any chapters that are not applicable or with which you are already familiar.

The chapters are:

4 Chapter 1 - Introduction (this chapter)

4 Chapter 2 - Installation

4 Chapter 3 - Additional Board Features

4 Chapter 4 - Physical I/O

4 Chapter 5 - Power and Thermal Specifications

4 Chapter 6 - Backplane Suggestions

1.1.5 Terminology, Definitions and Abbreviations

In this document, the term:

VX305x -yy will be associated to the 3U VPX board family:

4 x number of physical processor cores

4 yy: SA, WA, RA o RC environment class as defined by Kontron standards (see product

environmental specifications in this document and product Release Notes)

As an example VX3058-SA means 8-core product specified for SA environmental class.

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VX305x User's Guide - CA.DT.B25-7e

4 Abbreviations

TBD To Be Defined. Information not available at the time this document was released.

TDP Thermal Design Power

PTU Power Thermal Utility

1.2 VPX Overview

VPX (VITA 46) specifications establish a new direction for the next revolution in bus boards. VPX is an ANSI standard which breaks out from the traditional connector scheme of VMEbus to merge the latest in connector and packaging technology with the latest in bus and serial fabric technology. VPX combines best-in-class technologies to assure a very long technology cycle similar to that of the original VMEbus solutions. Traditional parallel VMEbus will continue to be supported by VPX through bridging schemes that assure a solid migration pathway.

For further information regarding this standards and its use, visit the home page of the VITA - Open Standards, Open Markets (http://www.vita.com)

1.3 Board Overview

1.3.1 Main Features

4 IntelR XeonR Architecture

The VX305x-SA computing node is a VPX computing blade for parallel data and signal processing application. The VX305x-SA is the ideal building block for intensive parallel computing workloads where a cluster of VX305x-SAs is used in full mesh or switched OpenVPX environments. Target applications include radar, sonar, imaging systems, air borne fighters, and unmanned aerial vehicle (UAV) radar, as well as rugged multi-display consoles. It is also well suited for transport applications.

The processing node of the VX305x-SA implements a Xeon memory. The highly integrated Intel The 3U-format VX305x-SA described in this document is the standard air cooled model.

Frequency of the CPU: see Table 1 - Order Codes

However, the Xeon when the total on chip power allows it.

Processor Fifth Generation Intel® Xeon® D-1500 Processor Family,

Integrated Platform Controller Hub

Onboard Controller

Gigabit Ethernet One I210 Ethernet controller connected on front panel or VPX backplane (user selection)

Watchdog PLD-based, timeout ranging from 4 ms to 510s, IRQ, Reset, dual-stages RTC Separated low power RTC with optional onboard battery

Processor D is equipped with the Turbo Boost technology, which allows increasing the frequency

QM77 platform hub provides numerous Ethernet, SATA, USB and PCIe channels.

TECHNICAL SPECIFICATIONS

DDR4 dual channel memory with ECC, 2133 MT/s over 144 bits, up to 16 Gbytes Integrated dual 10G Ethernet controller PCIe gen3 x8 ports to VPX and XMC

PCI Express* Base Specification, Revision 2.0 support for up to eight ports with transfers up to 5 GT/s Integrated Serial ATA host controllers with independent DMA operation on up to six ports xHCI USB controller provides support for up to 8 USB ports, of which four can be configured as SuperSpeed USB 3.0 ports Two Integrated serial lines

for 1000BASE-T operation 2nd I210 Ethernet controller connected on VPX backplane for 1000BASE-T operation, and optionally to the front panel (user selection) if the I/O profile option for “2nd RJ-45 Ethernet 1000BASE-T to the front option” is selected.

Processor D coupled with single or dual channel DDR4

(*)

, up to 8 GT/s

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VX305x User's Guide - CA.DT.B25-7e

TECHNICAL SPECIFICATIONS

System cPLD Power - on/ off control, Reset control, Local environmental control/monitoring, I2C

interfaces to I2C bus IPMB A/B (rear P0), LEDs control, Serial lines multiplexer, Serial VPD and user memories, User and system GPIOs, Internal registers that allow system management

Memory

System Memory Up to 16 GB dual channel DDR4 SDRAM running at 2133 MT/s, with ECC, soldered Flash (uEFI BIOS) 2x16 MB FLASH, with recovery image and uEFI BIOS settings EEPROM One serial 256 Kbit EEPROM dedicated to system data

One serial 256 Kbit EEPROM dedicated to application data

M.2 SSD option M.2 SSD module option: Type M, 22 mm x 42 mm

Front Interfaces 5HP (1")

USB 1x USB 2.0 port Gigabit Ethernet 1x RJ-45 connector: 10/100/1000BASE-T Ethernet

Note: This port is configurable from the BIOS to be routed to the VPX rear connector instead

HDMI (option) HDMI connector as option. This includes an HDMI front-I/O module and a M.2 mezzanine

for 2D graphics. Remark: HDMI front I/O and XMC

(*)

support are exclusive.

Serial 1x RJ-11 connector: Two EIA-232 interfaces or one EIA-485 interface from CPU, without

hardware flow control LEDs 5 LEDs reporting the board CPU health status and activity Reset Reset push button

Onboard Interfaces

CPU Debug Interface Bottom Debug connector for Port80, Spare x1 PCIe link with clock M.2 module interface Top M.2 slot for a 2D graphic module or a SSD module, compatible with a 12mm stacking

height XMC

(*)

slot. M.2 type M standard pin mapping for SSD module or 2D graphic

module option

Bottom M.2 slot for SSD module.

Supported module: Type M, 22 mm x 42 mm. XMC

(*)

Slot option One x8 PCIe 2 for XMC

X8d+X4s VITA 46.9 XMC

For XMC

(*)

slot option, contact Kontron because of thermal aspects.

(*)

slot option.

(*)

I/O routing, 8 differential pairs plus 4 single ended pins

VPX Interface

Slot Profiles SLT3-PAY-2F2U-14.2.3

SLT3-PAY-1F1F2U-14.2.4

SLT3-PAY-1F1U-14.2.10 Rear I/O via P0/P1/P2 x8 PCIe 3.0, non transparent capability, on P1. Configurable as 1 x8, 2 x4, or 4 x2.

2 SATA 6 Gb/s links on P1, 2 additional SATA 6 Gb/s links on P2

2 USB 2.0 and 1 USB 3.0 port on P1, 1 additional USB 2.0 link on P2

2 serial lines (Rx, Tx only) on P2, for RS-232 or RS-422/485 using dynamic configuration

2 10GBASE-KR as per IEEE802.3 clause 72 or 1000BASE-KX as per IEEE802.3 clause 70 on

VPX P1 (auto negotiation)

1 1000BASE-T on P1, 2nd 1000BASE-T on P2 (both front/rear switchable, onboard

magnetics)

GPIOs on P1: GPIO1, GPIO2/Maskable reset, OpenVPX GDISCRETE1, VBAT, SYSCON. 2x

multiplexed GPIO3/4 or SFI I2C on P0

DVI port on P2 as option when a M.2 mezzanine for 2D graphics is present. Supervisory Functions Non Maskable RESET

NVMRO, Master SMBus and Master/Slave SMBus interfaces for system management.

Compatible with Kontron CMB (Monitoring Board), temperature and voltage sensors on

the board

PCIe optional use of common reference clock feature Power Supplies On P0: VS1=12V; VS2 not used; VS3=5V not used; 3.3V_AUX optional, -12V_AUX for XMC

slot option

OS Support Linux, ask for: Windows, VxWorks Mechnical size 3U x 160 mm, Slot pitch: 1.00 inch according VITA 48.1 (air cooled) and

VITA 48.2 (conduction cooled)

(*)

XMC slot option is on demand only

All the Flash and non volatile memories onboard have a write protect mechanism taking into account the NVMRO (Non Volatile Memory read Only) VPX signal.

www.kontron.com // 4

VX305x User's Guide - CA.DT.B25-7e

4 Software

Kontron is one of the few compact PCI, VME and VPX vendors providing in-house support for most of the industryproven real-time operating systems that are currently available. Due to its close relationship with the software editors, Kontron is able to produce and support BSPs and drivers for the latest operating system revisions thereby taking advantage of the changes in technology.

Finally, Kontron offers to its customers owners of a maintenance agreement a hotline software support and regular software updates. A dedicated web site is also available for online updates and release downloads.

The VX305x-SA is delivered with the UEFI BIOS from AMI.

The VX305x-SA supports Linux distribution. Refer to BSP Software Release Notes.

Contact Kontron for further information regarding other operating systems and software support.

4 Rear Transition Module

The VX305x-SA supports the PB-VX3-400, a 3U VPX Rear Transition Module compliant with the definition of the Rear Transition Module on VPX standard - VITA 46.10.

It offers connectivity on the rear for:

4 4 HP Version

4 one Ethernet SFP+ cage operating at 1 or 10 Gbits/s.

4 one Ethernet 1000BASE-T port

4 two SATA III ports

4 two serial COM ports

4 one USB3 / USB2 port

4 two GPIOs

4 8 HP Version additionnal I/O:

4 1 additionnal USB 2

4 2 additional Sata III

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1.3.2 Block Diagram

Figure 2: VX305x-SA Block Diagram

VX305x User's Guide - CA.DT.B25-7e

1.3.3 Ordering Information

4 Manufacturing Options

4 Processor Type: See Table 1 - Order Codes

4 Processor TDP Up to 45 W

4 DDR4 SDRAM Size: 8 GB

16 GB

4 BOTTOM 22 mmx42 mm M.2 SATA slots: support 2242-S1-M, 2242-S2-M, 2242-S3-M, 2242-D1-M,

2242-D2-M, 2242-D3-M, 2242-D4-M, SATA link up to 6Gb/s.

4 TOP 22 mm x 42 mm M.2 slot: 2242-D4-M module with SM750 16 MB graphic controller

(MODP-GM2-SM750 module code or idem bottom M.2) Support also same storage modules as define above for the bottom slot.

4 Trusted Platform Module: On demand

4 I/O Features: See Table 1 - Order Codes

4 Ruggedization Levels: SA, WA, RA, RC

4 Slot pitch: 1 inch

4 XMC Slot (VITA 61/XMC 2.0 12 mm) XMC slot option is a nonstandard option because of thermal impacts

and product restrictions with XMC slot - On demand only

www.kontron.com // 6

4 Available Order Codes

Table 1: VX305x Order Codes

VX305x User's Guide - CA.DT.B25-7e

ENVIRON

MENTAL

CLASS

SA VX305nSAnmx15y0sz 3U single slot 5 HP (1.0") VPX CPU Blade with Intel® Xeon® D-1500 processor

RC VX305nRCnmx15y0sz 3U single slot 5 HP (1.0") VPX CPU Blade with Intel® Xeon® D-1500 processor

STANDARD ORDER

CODES

DESCRIPTION

series, fully switched x8 PCIe , Air cooled 0 °C to +55 °C

Available options: Product ConFiGuration CFG [n:x]:

CFG n x Description

20 2 0 2-Core D-1508, frequency 2.2 GHz, TDP 25 W

81 8 1 8-Core D-1537, frequency 1.7 GHz, TDP 35 W

82 8 2 8-Core D-1548, frequency 2 GHz, TDP 45 W

Memory size:

m = 8: 8 GB dual bank DDR4 m = F: 16 GB dual bank DDR4

I/O feature option: y = 0: Base I/O y = 1: additional front /rear graphics HDMI

Security option:

s = 0 : no security option s ≠ 0 : on demand only

Other option:

z = 0 : standard z ≠ 0 : on demand only

series, fully switched x8 PCIe 3, conduction cooled up to +85°C.

Available options: Product ConFiGuration CFG [n:x]:

CFG n x Description

40 4 0 4-Core D-1519, frequency 1.5 GHz, TDP 25 W

Vita48.2 plug-in type: Type 2, secondary side retainer Max Op. Temp: 85°C@ card edge

80 8 0 8-Core D-1539, frequency 1.6 GHz, TDP 35 W

Vita48.2 plug-in type: Type 2, secondary side retainer Max Op. Temp: 70°C@ card edge

81 8 1 8-Core D-1539, frequency 1.6 GHz, TDP 35 W

Vita48.2 plug-in type: Type 2, secondary side retainer Max Op. Temp: 85°C@ card edge

Memory size: m = 8: 8 GB dual bank DDR4 m = F: 16 GB dual bank DDR4

I/O feature option: y = 0: Base I/O y = 1: additional rear graphics HDMI

Security option:

s = 0 : no security option s ≠ 0 : on demand

Other option:

z = 0 : standard z ≠ 0 : on demand

Refer also to the product datasheet for the available order code list.

www.kontron.com // 7

1.3.4 I/O Interfaces

4 Front Interfaces (Models without XMC)

Figure 3: VX305x-SA Front Panel I/O Interfaces

1 2 3 4

VX305x User's Guide - CA.DT.B25-7e

1. Optional HDMI

2. Gbe ETH

3. Serial COM

Table 2: Front I/O Interfaces

FUNCTION DESCRIPTION SEE ALSO

Serial Ports

Gigabit Ethernet

USB 2.0 USB 2.0 interface Section 4.1.3 for Pin Assignment

Graphics HDMI (DVI) option Section 4.1.4 for Pin Assignment

Reset Reset push button Figure 3

LEDs 5 LEDs reporting the board CPU health status and activity Section 4.4 for LEDs Description

COM: 2x EIA-232 or 1x EIA-485 UART interface for CPU on RJ-12

connector.

1000BASE-T on RJ-45 connectors: Note: This port is configurable from the BIOS to be routed to the

VPX P1 connector instead of the front connector ETH

4. USB 2.0

5. L1 LED

6. Reset CPU

7. L2, L3, L4, L5 LEDS

Section 4.1.1 for Pin Assignment

Section 4.1.2 for Pin Assignment

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4 Rear Interfaces

Rear interfaces are compliant with the following slot profiles:

4 SLT3-PAY-2F2U-14.2.3

4 SLT3-PAY-1F1F2U-14.2.4

4 SLT3-PAY-1F1U-14.2.10

Figure 4: VX305x-SA Rear I/O Distribution

VX305x User's Guide - CA.DT.B25-7e

12 V, 3 GPIOs, 2 I2C

x8 PCIe, 2 SATA, 3 USB, 3 ETH, 3 GPIOs

2 SATA, 1 USB, 1 DVI Port,

2 Serial Lines, x1 PCIe, ETH1

Table 3: Rear I/O Interfaces

FUNCTION DESCRIPTION SEE ALSO

PCI Express 4 1 x8 gen3 PCIe, non transparent capability, on P1. Optional use of

PCIe common reference clock feature.

4 1 x1 additional PCIe interface, gen2, on P2

SATA Storage 4 2 SATA III links on P1

4 2 additional SATA II links on P2

USB 4 2 USB 2.0 and 1 USB 3.0 links on P1

4 1 additional USB 2.0 links on P2

Gigabit Ethernet 4 2 SerDes 10GBASE-KR or 1000BASE-KX on P1 (auto negotiation)

4 1 1000BASE-T on P1

1000BASE-T on P2

4 2

Serial 4 2 asynchronous EIA-232/EIA-485 RX/TX serial line, on P2 GPIOs 4 3 User GPIOs on P1, including OpenVPX GDISCRETE1, and MASKABLE

RESET

4 3 additional GPIOs on P0, replacing unused JTAG pins

Additional graphics HDMI front/rear

Utilities On P0 and P1: SYSRESET, SYSCON,

Front HDMI/DVI port and one rear DVI port on P2

6 Geographical Addresses

Section 4.3 for VPX Connectors Description

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VX305x User's Guide - CA.DT.B25-7e

1.3.5 Components Layout

Figure 5: VX305x-SA Components Layout (Top view)

4 5

1. Top I/O Module Slot

2. Intel Xeon D

3. P

CIe SW PEX8725

4. DDR4-SDRAM

5. Top M.2 Slot

www.kontron.com // 10

Figure 6: VX305x-SA Components Layout (Bottom view)

VX305x User's Guide - CA.DT.B25-7e

1. MicroSwitchSW2

2. DDR4 SDRAM

3. Bottom M.2 Slot

4. MicroSwitchSW1

www.kontron.com // 11

1.3.6 Technical Specification

Figure 7: VX305x-SA Functional Block Diagram

VX305x User's Guide - CA.DT.B25-7e

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1.3.7 M2 Module List

Table 4: Non-exhaustive M.2 module list, tested on VX305x M.2 slots

VX305x User's Guide - CA.DT.B25-7e

MODULE TYPE CAPACITY MEMORY

TECHNOLOGY

SSD SATA, Type M 120 GB MLC Intel® Pro 1500 Series

SSD SATA, Type M 32 GB SLC Unigen UBM3SMN32H0IS

SSD SATA, Type M 32 GB MLC Transcend TS32GMTS400

MANUFACTURER PART NUMBER NOTE

1-DTC-KF

1.4 Environmental Specifications

Table 5: VX305x-SA Environmental Specifications

SA - Standard Commercial (1" single height passive module heat sink, forced air) - No XMC slot option

Conformal Coating Optional

Airflow TBD

Cooling Method Convection

Operating 0 °C to +55 °C

Storage -45 °C to +85 °C

Vibration Sine (Operating) 2 g / 20-500 Hz

acceleration / frequency range

M2 2242 SATAIII 32GB SLC I-TEMP

Random (Operating) Product withstand vibration as defined below, 1 hour per axis:

Shock (Operating) 20 g / 11 ms

Altitude (Operating) -1,500 to 60,000 ft

Relative Humidity 90 % non-condensing

5 Hz to 100 Hz Power Spectral Density (PSD) = 0.04 g2/Hz

peak accel. / shock duration half sine

1.5 Board Weight

Table 6: VX305x-SA Weight

SA - Standard Commercial

VX3058-SA without optional modules  400 g

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VX305x User's Guide - CA.DT.B25-7e

1.6 MTBF Data

Calculations are made according to the standard MIL-HDBK217F-2 for following types of environment:

4 Ground Benign (GB)

4 Air Inhabited Cargo (AIC)

4 Naval Sheltered (NS),

4 Air Rotary Wing (ARW)

4 VX3058-SA881150000 MTBF Data

Table 7: VX3058SA881150000 MTBF Data

MTBF MILHDBK217F IEC62380

GB (HOURS) NS (HOURS) ARW

(HOURS)

25 °C 40 °C 25 °C 40 °C 55 °C 40 °C

VX3058SA881150000 308 425 209 210 53 545 39 439 6 278 28 356 TBD

AIC

(HOURS)

TYPICAL RAILWAY MISSION

PROFILE

4 VX3058-SA881151000 MTBF Data

Table 8: VX3058SA881151000 MTBF Data

MTBF MILHDBK217F IEC62380

GB (HOURS) NS (HOURS) ARW

(HOURS)

25 °C 40 °C 25 °C 40 °C 55 °C 40 °C

VX3058SA881151000 301 934 206 206 53 346 39 331 6 275 28 300 TBD

AIC

(HOURS)

TYPICAL RAILWAY MISSION

PROFILE

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VX305x User's Guide - CA.DT.B25-7e

1.7 Related Publications

The following publications contain information relating to this product:

Table 9: Related Publications

PRODUCT PUBLICATION

Standard

ANSI/VITA 46.0 VPX Baseline Standard - ANSI/VITA 46.0-2007 [R2013] ANIS/VITA 46.4 PCI Express® on VPX Fabric Connector, Aug 2012 ANSI/VITA 46.6 Gigabit Ethernet Control Plane on VPX, Feb 2013 ANSI/VITA 46.7 Ethernet on VPX Fabric Connector, Mar 2012 ANSI/VITA 46.9 XMC Rear I/O Fabric Signal Mapping on 3U and 6U VPX Modules, Nov 2010 ANSI/VITA 46.10 Rear Transition Module for VPX - ANSI/VITA 46.10-2009 ANSI/VITA 65 OpenVPX™ System Specification ANSI/VITA 65-2010 [R2012] ANSI/VITA 48.1 Mechanical Specification for Microcomputers using REDI Air Cooling ANSI/VITA 48.2 Mechanical Specifications for Microcomputers using REDI Conduction Cooling

Serial ATA Serial ATA 1.0a Specification

Hardware

VX305x-SA Boards VX305x-SA Hardware Release Notes CA.DT.B26

Firmware

VX305x-SA Boards AMI-BIOS User Reference Manual SD.DT.G50

VX305x-SA Boards PBIT User's Guide SD.DT.G51

Software

VX305x-SA Boards VX305x-SA Software Release Notes SD.DT.G53

Applied to VITA VPX

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VX305x User's Guide - CA.DT.B25-7e

2 / Installation

The VX305x-SA has been designed for easy installation. However, the following standard precautions, installation procedures, and general information must be observed to ensure proper installation and to preclude damage to the board, other system components, or injury to personnel.

2.1 Safety Requirements

The following safety precautions must be observed when installing or operating the VX305x-SA. Kontron assumes no responsibility for any damage resulting from failure to comply with these requirements.

Special care shall be taken while handling the board: the heat sink can get very hot during ope ration. Do not touch the heat sink when installing or removing the board.

In addition, the board should not be placed on any surface or in any form of storage container before the board and heat sink have cooled down to room temperature.

This board contains electrostatically sensitive devices. Observe the necessary precautions to avoid damage to your board:

Discharge your clothing before touching the assembly. Tools must be discharged before use.

4 Do not touch components, connector pins or traces.

4 We strongly recommend our customers to work in an environment equipped with anti-static

workbenches with professional discharging equipments.

www.kontron.com // 16

2.2 Board Identification

The VX305x-SA boards are identified by labels fitted to the top side of the board.

The E.C. Level format is "xxxxxLy" where

4 The five digits "xxxxx" indicate the board E.C. Level (PCB revision included)

4 "Ly" indicates the mechanical E.C. Level:

4 letter "L" varies with the environment class ("A" for SA, "B" for WA, "C" for RA and "D" for RC)

4 digit "y" gives the mechanical E.C. Level.

4 Top Side

"Identification" label: Order Code, Serial Number, Variant, E.C. Level

Ethernet MAC addresses

Figure 8: VX305x-SA Identification (Top Side)

VX305x User's Guide - CA.DT.B25-7e

www.kontron.com // 17

2.3 Board Configuration

2.3.1 Microswitches

Figure 9: VX305x-SA Board Configuration (Bottom view)

VX305x User's Guide - CA.DT.B25-7e

Microswitch SW2

Two microswitches are available on the VX305x-SA: SW1 and SW2.

Microswitch SW1

2.3.2 SW1 Microswitch Description

Table 10: SW1 Microswitch Description

FUNCTION DESCRIPTION

1 - Factory Mode off: Normal Mode

on: Factory Mode

2 - Debug Mode off: Normal Mode

on: Debug Mode

3 - VPD Write Protection (VPD and SPD eeprom devices)

4 - User Write Protection (User FRAM device)

www.kontron.com // 18

off: VPD Write protected on: VPD Writes are allowed

off: User FRAM writes are allowed on: User FRAM write protected

VX305x User's Guide - CA.DT.B25-7e

2.3.3 SW2 Microswitch Description

Table 11: SW2 Microswitch Description

FUNCTION DESCRIPTION

1 - System Boot Flash off: Normal Mode

on: Rescue Mode

2 - BIOS Failsafe off: Normal Mode

on: BIOS Failsafe Mode

3 - PCIe Switch Failsafe Mode off: Normal Mode

on: PCIe Switch Failsafe Mode

4 - Force PROCHOT off: Standard Mode

on: Processor PROCHOT force to low state

2.4 Package Content

The VX305x-SA is packaged with several components. The packing contents of the VX305x-SA Series may vary depending on customer requests.

4 CPU Module:

4 Order Code: see section 1.3.3 “Order Code Table” :

4 Processor specifications differ depending on Order Code.

4 Heat sink assembled on the board.

4 Rear Transition Module:

4 Order Code: see section 1.3.3 “Order Code Table”.

2.5 Initial Installation Procedures

The following procedures are applicable only for the initial installation of the VX305x-SA in a system. Procedures for standard removal operations are found in their respective chapters.

To perform an initial installation of the VX305x-SA in a system proceed as follows:

5. Ensure that the safety requirements indicated in section 2.1 page 16 are observed.

CAUTION: Failure to comply with the instruction below may cause damage to the board or result in improper system operation.

6. Ensure that the board is properly configured for operation in accordance with application requirements before installing. For information regarding the configuration of the VX305x-SA see Chapter 5. For the installation of VX305x-SA specific peripheral devices and Rear I/O devices refer to the appropriate sections in current Chapter.

CAUTION: Care must be taken when applying the procedures below to ensure that neither the VX305x-SA nor other system boards are physically damaged by the application of these pro cedures.

7. To install the VX305x-SA perform the following:

1. Ensure that no power is applied to the system before proceeding.

CAUTION: When performing the next step, DO NOT push the board into the backplane connectors. Use the ejector handles to seat the board into the backplane connectors.

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VX305x User's Guide - CA.DT.B25-7e

2. Carefully insert the board into the slot designated by the application requirements for the board until it makes

contact with the backplane connectors.

3. Using the ejector handle, engage the board with the backplane. When the ejector handle is locked, the board is

engaged.

4. Fasten the front panel retaining screws.

5. Connect all external interfacing cables to the board as required.

6. Ensure that the board and all required interfacing cables are properly secured.

The VX305x-SA is now ready for operation. For operation of the VX305x-SA, refer to appropriate VX305x-SA specific software, application, and system documentation.

2.6 Standard Removal Procedure

To remove the board from the chassis proceed as follows:

1. Ensure that the safety requirements indicated in Section 2.1 are observed. Particular attention must be paid to the warning regarding the heat sink!

CAUTION: Care must be taken when applying the procedures below to ensure that neither the VX305x-SA nor system boards are physically damaged by the application of these procedures.

2. Ensure that no power is applied to the system before proceeding.

3. Disconnect any interfacing cables that may be connected to the board.

4. Unscrew the front panel retaining screws.

5. Disengage the board from the backplane by first unlocking the board ejection handles and then by pressing the handles

as required until the board is disengaged.

6. After disengaging the board from the backplane, pull the board out of the slot.

CAUTION: Due care should be exercised when handling the board due to the fact that the heat sink can get very hot. Do not touch the heat sink when changing the board.

7. Dispose of the board as required.

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VX305x User's Guide - CA.DT.B25-7e

2.7 Battery Replacement

The lithium battery must be replaced with an identical battery or a battery type recommended by the manufacturer. The battery is used to run a time of day clock during the absence of power. Operation without the battery is possible but the date and time will not be retained in the absence of power. Alternatively, the VPX VBAT signal on P0 can provide a 3.3V voltage from the backplane to retain the date and time.

To replace the battery, proceed as follows:

4 Turn off the power.

4 Get the battery outside of its holder:

Figure 10: Battery Replacement on VX305x-SA Board

4 Place the new battery in the socket with the plus pole facing upwards.

Danger of explosion when replacing with wrong type of battery. Replace only with the same or equivalent type recommended by the manufacturer. The lithium battery type must be UL recog nized.

Do not dispose of lithium batteries in general trash collection. Dispose of the battery according to the local regulations dealing with the disposal of these special materials, (e.g. to the collecting points for dispose of batteries).

Reference of the battery used on the VX305x-SA: RENATA CR1220 The design of an electronic circuit powered by a component class battery requires the designer to consider two interacting paths that determine a battery’s life: consumption of active electrochemical components and thermal wear-out.

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VX305x User's Guide - CA.DT.B25-7e

2.8 XMC Module Insertion / Removal Instructions

XMC slot option is a nonstandard option because of thermal impacts and product restrictions with XMC slot - on demand only.

4 Mating

These connectors should be mated straight. Align the connectors and when the keys start to enter the keyways, push at the approximate center of the connector into the mating connector until the face of the receptacle cover bottoms on the face of the plug. Because of the asymmetric keying, reverse mating is impossible (the key end of the receptacle cannot be inserted into the non-keyway end of the plug). Both connectors have a lead-in around the perimeter that will allow blind mating.

Figure 11: XMC Module Insertion

4 Unmating

These connectors can be unmated by pulling them straight apart or by “rocking” the connectors from side-to-side while pulling them apart.

Figure 12: XMC Module Removal

www.kontron.com // 22

2.9 M.2 Module Insertion / Removal Instructions

4 M.2 Module Insertion Process

1. Insert the module with angle 25°±5° until module touch HSG ramp.

2. Rotate the module to horizon by hand and make sure the card’s edge touch HSG seating plane.

VX305x User's Guide - CA.DT.B25-7e

Figure 13: M.2 Module Insertion Process

3. Fix the module with PCB by screw by hand.

4 M.2 Module Removal Process

1. Loose the screw by hand and the module will be rotated automatically due to connector contact’s counterforce at the same time.

Figure 14: M.2 Module Removal Process

2. Take away the module by hand.

www.kontron.com // 23

4 M2 Module Mechanical Parts References

M.2 module mounting must be done using the following mechanical parts:

4 Plain washer ISO 7092-2-200 HV-A4

4 Hexalobular socket cheese head screw ISO 14580-M2X4-A4-70

VX305x User's Guide - CA.DT.B25-7e

Screw: ISO 14580-M2X4-A4-70

Washer: ISO 7092-2-200 HV-A4

2.10 Software Installation

The installation of all onboard peripheral drivers is described in detail in the relevant Driver Kit files or Board Support Packages (BSP).

The installation of an operating system is dependent of the OS software and is not addressed in this manual. Refer to appropriate OS software documentation for installation.

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VX305x User's Guide - CA.DT.B25-7e

3 / Additional Board Features

3.1 The Backplane Power Supplies and their Monitoring

The VITA46.0 standard specifies the backplane power supplies VS1 as follows:

4 VS1: 12 V +/- 5 % inclusive of ripple ( 11.4 V to 12.6 V).

At Power On, the VPX VS1 system power supply ramp-up phase must be between 20 and 150 msec. VPX +3.3V_AUX power supply is optional.

To ensure a valid Power Off, VS1 should remain at 0V for at least one second.

The voltage sensor NCT7802Y by Nuvoton is programmed by BIOS to monitor VS1 and asserts the signal PLD_PECI_ALERT_n whenever either voltage gets out of its VITA 46 specified range. This alert is routed to a maskable interrupt in the cPLD. There is no setup or UEFI command to modify the thresholds value in BIOS.

A second voltage sensor, the LTC2913 by Linear Technology monitors these voltages with a 10 % tolerance. The thresholds are set by hardware on the board. Undervoltage and overvoltage conditions on VS1 are reported to the cPLD which in turn shuts down all VX305x-SA internal power supplies. There is no mechanism for masking these alerts.

3.2 RTC, Watchdog, Timers

3.2.1 Real-Time Clock (RTC)

Two Real Time Clocks (RTC) are available on the VX305x-SA: one is embedded in the PCH while the other is a standalone, high-precision, low-power component located on the integrated PCH SMBus (RV8564 by Micro Crystal). The latter is more precise and is powered when the board is off.

4 Standby power supplied to the RV8564 RTC

When the VX305x-SA is powered off, the RTC is powered either by the onboard battery or through the 3.3V_AUX rail or the VBAT rail on the VPX backplane.

To ensure data retention in the RV8564 RTC, VBAT must be set in the range [2.5V - 5.5V]. The maximum current drawn over the -40 °C/+85 °C temperature range is 500 nA (VBAT= 3 V, no I2C activity) or 550 nA (VBAT=5 V, no I2C activity).

The RTC present in the integrated PCH is never powered by the battery.

4 Internal Integrated PCH RTC

The integrated PCH RTC module provides a date and time keeping device with two banks of static RAM with 128 bytes each. The BIOS programs the RTC interrupt on Legacy IRQ8 that is never shared with other interrupts. It is clocked by an external 32.768 KHz oscillator with a parabolic coefficient of 0.4 ppm/°C² and a stability of +/-20 ppm at 25 °C. A 20ppm stability is equivalent to a 10 mn/year drift.

4 Standalone low-power RTC RV8564

The RV8564C2/B RTC by Micro Crystal features an internal oscillator, date and time keeping module with programmable alarm, timer and interrupt functions. It has an ultra low-power consumption in time keeping mode: 250nA, typical and 500 nA, maximum. Its stability is 20 ppm at 25 °C. It is connected to the integrated PCH SMBus

4 RTC management by BIOS and OS

At each startup, the BIOS retrieves the date and time information from the high-precision RV8564 RTC and copies it into the integrated PCH RTC. This is necessary since the integrated PCH RTC is not saved.

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VX305x User's Guide - CA.DT.B25-7e

Any update of date and time in the BIOS settings will be done both in integrated PCH RTC and RV8564 RTC.

Regarding the RTC management by the OS, the OS should use the high-precision RV8564 RTC driver. Failing to do so, the updates will be done only in integrated PCH RTC and will not be saved.

If no power is applied on the RV8564 RTC, the BIOS displays the BIOS build date and time instead of the current date and time.

4 Century flag

For compatibility reasons, the BIOS implements the century flag for the high-precision RTC as follows:

4 Century Flag C = 0 for 1900-1999 years

4 Century Flag C = 1 for 2000-2099 years.

The user should check that the OS driver implements the same convention.

3.2.2 CPLD Watchdog

In addition to the standard watchdog timer included in the integrated PCH, the cPLD implements a hardware watchdog timer that can be used by the operating software to monitor the normal operation of the system.

It is enabled by software, and once enabled must be restarted at regular intervals. If not, its expiration sets off an interrupt (IRQ) to the local processor, a board reset or a board power-cycle.

The watchdog has the following features:

4 timeout programmable from 1 to 511 clock periods, by steps of 2 periods

4 clock periods of 1s or 1ms

4 lock bit: when set, can only refresh (restart) the watchdog, but not change its settings

4 4 modes: timer, reset, interrupt or power-cycle

4 restart counter: can manage the remaining number of resets or power-cycles done by the watchdog before

giving-up.

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VX305x User's Guide - CA.DT.B25-7e

3.3 Battery and Supercap

4 Battery, supercap and VPX VBAT.

The industrial-grade battery RENATA CR1220 is mounted in a socket loacted on the board for air-cooled version.

4 Battery Life at 25°C

The RTC consumption is specified at 500nA in nominal conditions. The Battery nominal capacity is specified at 40mAh. The expected battery duration at 25°C is above 8 years

Figure 15: Battery Socket

4 Supercap

On demand.

Battery Socket

www.kontron.com // 27

VX305x User's Guide - CA.DT.B25-7e

3.4 I2C Structure

The VX305x-SA features three I2C busses.

4 One is attached to the integrated Platform Hub Controller and controls the DDR4 SPD EEPROM and the low-power RTC.

4 The other two are handled by the CPLD device according to Figure 16 “I2C Diagram”.

The I2C addresses shown are 8 bit values which include a read/write bit. Shift one bit to the right to get the 7-bit addresses.

Figure 16: I2C Diagram

4 PCH SMBus (100 KHz)

SLAVE DEVICES ON SOC SMBUS

INTERFACE

cPLD 07H (0x07) System cPLD LTC2945IUD 67H (0x67) VS1 Current Monitoring RV8564C2 51H (0x51) External RTC Device XMC Slot 50H (0x50) To XMC Mezzanine SMBus

SMBUS 7-BIT BASE ADDRESS FEATURES

4 cPLD I2C Bus (100 KHz)

SLAVE DEVICES ON CPLD SMBUS

INTERFACE

NCT7802Y sensor 28H (0x28) Nuvoton Voltage / Temperature Sensor 24FC256-I/SN VPD EEPROM 50H (0x50) 256 Kbits VPE EEPROM 24FC256-I/SN OS EEPROM 50H (0x51) 256 Kbits OS EEPROM FM24V10-G 52H (0x52) 1 Mbits User FRAM

www.kontron.com // 28

SMBUS 7-BIT BASE ADDRESS FEATURES

3.5 CPLD Features

The CPLD manages the following features:

4 Power-on/off control

4 Reset control

4 Local environmental control/monitoring

4 LPC interface to processor

4 I2C interfaces to I2C bus IPMB A/B (rear P0)

4 LEDs control

4 Serial lines multiplexer

4 Serial VPD and user memories

4 User and system GPIOs

4 Internal registers that allow system management

3.5.1 cPLD Registers Definition:

3.5.1.1 Overview

VX305x User's Guide - CA.DT.B25-7e

These registers can be accessed from CPU through LPC bus at I/O address 0x800+offset.

Registers 0x72 to 0x78 can also be accessed from I2C bus 0 (register offset 0 to 6) by an external I2C master on the backplane.

Table 12: cPLD Registers Definition - Overwiew

OFFSET NAME PURPOSE ACCESS

0x72 I2C_BOARD_STATUS Board state (from I2C) RW 0x73 I2C_BOARD_CONTROL Board state and control (from I2C) RW 0x74 I2C_ERROR_STATUS Board error state (from I2C) RW 0x75 I2C_PORT80 PORT80 value (from I2C) RW 0x76 I2C_FAILCODE PEX8725 EEPROM CRC error status (from I2C) RW

0x77 I2C_SCRATCHPAD Not yet defined RW

0x78 I2C_MISC Miscellaneous board information (from I2C) RW

Contact Kontron for a detailed description of the CPLD registers.

3.5.1.2 Detailed Description

4 VX305x-SA VPX I2C interfaces

VX305x-SA implements two I2C buses connected to P0 VPX connector (see P0 pin assignments):

I2C0 : CLK signal on pin P0/B5, DATA signal on pin P0/ A5

I2C1: CLK signal on pin P0/G4, DATA signal on pin P0/ F4

I2C bus 0 is a master/slave interface.

I2C bus 1 is a master only interface.

4 VPX I2C bus 0 / 1 master interfaces:

I2C bus 0/1 master interfaces software tools are described in the Software Relase Notes.

www.kontron.com // 2 9

VX305x User's Guide - CA.DT.B25-7e

4 VPX I2C bus 0 slave interface:

VX305x-SA board I2C bus 0 slave register base address depends on VPX slot ID (slot geographical address):

VPX Slot 1 (syscon): VX305x-SA slave I2C base address is 0x18 (I2C 7bits addressing)

VPX Slot 2: VX305x-SA slave I2C base address is 0x19 (I2C 7bits addressing)

VPX Slot 3: VX305x-SA slave I2C base address is 0x1A (I2C 7bits addressing)

And so on…..

4 I2C bus 0 slave registers definition:

I2C_BOARD_STATUS : This Register can be accessed from I2C0 Slave interface :

4 I2C_SLAVE_ADDR = 7'b0010_111 + GA

4 Register offset (1 byte) = 0

Bits meaning during read access is controlled by bit 3 of register @73.

Table 13: I2C_BOARD_STATUS @0x72

I2C_BOARD_STATUS @0x72

Can also be accessed from I2C0 slave interface with register offset 0 (or 0x10)

Bit# Name Description Reset Type

Power Status

7 Power Status

0: Power Stand By

0 RO

1: Power ON (S0 State)

Root cause of Last Reset Detected

0x00 Internal PSUs power-on 0x01 Watchdog expired 0x10 SYSRESET (from VPX or VME)

6-5 Reset Root

0x11 Local reset :

GPIO2 (maskable reset)

0 RO

reset switch reset from I2C (reg 0x73) reset by software asserting PLD_PLTRST_n

Reset Status Side A

4 Reset Status

0: No PWOK or reset asserted 1: PWOK and reset unasserted

0 RO

Boot Status

0x00: RESET : default hardware value 0x01: BIOS-BOOT : written by BIOS 0x02: BIOS : written by BIOS 0x03: PBIT : written by BIOS 0x04: OS-BOOT : written by BIOS 0x05: OS-RUNNING : to be written by OS at the end of boot 0x06: COMPLETED : to be written by the final application

3-0 Boot Status

when running

0 RW

0x07: SHUTDOWN : to be written by OS when issuing a halt/

shutdown 0x08: REBOOT : to be written by OS when rebooting 0x09 - 0x0B: Reserved 0x0C - 0x0F: Customer defined

These bits are Read Only through I2C Slave Interface and R/W through LPC Interface.

The boot status is also reset at each board reset.

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VX305x User's Guide - CA.DT.B25-7e

I2C_BOARD_CONTROL: This Register can be accessed from I2C0 Slave interface

4 I2C_SLAVE_ADDR = 7'b0010_111 + GA

4 Register offset (1 byte) = 1

Table 14: I2C_BOARD_CONTROL @0x73

I2C_BOARD_CONTROL @0x73

Can also be accessed from I2C0 slave interface with register offset 1 (or 0x11)

Bit# Name Description Reset Type

Board Identification

0001 VX6080 0010 VX6070 0011 VX3030 0100 VM6052/VM6054

7-4 Board Id

0101 VM6050

0 RO 0110 VX6060 0111 VX3035 1000 VX3040 family (VX3042/VX3044)

1001 VX305x family (VX3052/VX3058)

1111 Reserved for non-SBC boards (switches, ...)

3 Reserved RESERVED 0 RW 2 Reserved

1 Reset

RESERVED

0: No Reset 1: Reset Assert

0 RW

Power On/Off Control

0: Power Off (StandBy Mode) 1: Power On

This bit can be used to do a Power OFF or control the Power-On sequence when Standby Power is applied.

The default value is loaded when standby is applied from

0 Power_OnOff

inverted SYSTEM EEPROM offset 0x100 bit 1, if FACTORY mode is not enabled

*. RW

WARNING: Setting this bit to 0 asserts VPX reset (SYSRESET_OUT#) if

bit to 1 is not enough to do a Power-On : VPX PSUs must be switched Off and restarted.

www.kontron.com // 31

VX305x User's Guide - CA.DT.B25-7e

Table 15: I2C_ERROR_STATUS @0x74

I2C_ERROR_STATUS @0x74

Can also be accessed from I2C0 slave interface with register offset 2 (or 0x12)

Bit# Name Description Reset Type

Alert

0: no alert 1: alert pending from PLD_PECI_ALERT#

7 Alert

or PLD_PCHHOT_CPU#

See register ALERT_STATUS@5B bit 0 and 3 for current state on

0 RO

these signals See register SERIRQ_CONTROL@0xF bit 6 and 2 for interrupt

Mask and Status

POST Error

0: no error

6 POST_Error

1: error This bit is set when PBIT has been run with errors (according to

0 RO

reg 0x2) Also set when RTC battery is low (according to reg 0x3 bit 0)

POST RTC

0: POST OK

5 POST RTC

1: POST FAILED (weak or missing battery)

0 RO This bit is a copy of reg 0x3 bit 0 (POST_RTC), that is set when

RTC battery is low

Safety Error status

Bit 4: THERMTRIP# Bit 3: VRVCCIN_VRHOT# Bit 2: VR1V05_VRHOT#

4-0 Error_Status

Bit 1: CATERR#

0 RO Bit 0: PECI_CRIT#

When an unmasked fatal alert occurs, this register is updated, all internal PSUs are switched off and the error status is also reported on the front panel LEDs

3.6 Serial Lines EIA-422/485 Additional Modes

A total of 2 serial lines are available on VX305x-SA product.

EIA-232 serial lines are available on front panel RJ12 and P2 connectors.

See section 4.1.1 page 40 - “Serial Connector” and section 4.3.3 page 52 - “P2 Connector” for more information on pin assignments.

EIA-232 serial lines mode is the default mode, but EIA-422/485 mode can also be set with the following mode:

Table 22: Serial Lines Additional Modes

MODE RJ12 FRONT PANEL

CONNECTOR

Default EIA-232

EIA-422/485 on COM1

The mode EIA-232 or EIA-422/485 is selected in the BIOS by the user. When EIA-422/485 is selected, an optional on board 120 Ohms termination can be activated from the BIOS Menu, as well as a half duplex mode.

EIA-232: COM1, COM2

EIA-422/485: COM1

RJ12 FRONT PIN

ASSIGNMENT

COM1 TXD: pin 3 COM1 RXD: pin 4 COM2 TXD: pin 1 COM2 RXD: pin 6

COM1 TXD+: pin 3 COM1 RXD+: pin 4 COM1 TXD-: pin 1 COM1 RXD-: pin 6

P2 REAR CONNECTOR P2 REAR PIN ASSIGNMENT

COM1 TXD: pin G3 COM1 RXD: pin G7

EIA-232: COM1, COM2

COM2 TXD: pin G11 COM2 RXD: pin G15

COM1 TXD+: pin G3 COM1 RXD+: pin G7

EIA-422/485: COM1

COM1 TXD-: pin G11 COM1 RXD-: pin G15

3.7 GPIOs and GDISCRETE1

3.7.1 GPIOs

The VX305x-SA features 5 GPIOs managed by the CPLD. Refer to the Sofware Release Notes chapter 7.7 for further details on the GPIO driver.

4 3 GPIOs are available on P0 connector: GPIO3, GPIO4 and GPIO5. See section 4.3.1 “P0 Connector” page 50 for detailed

pinout.

4 2 GPIOs are available on P1 connector, GPIO1, GPIO2. See section 4.3.2 “P1 Connector” page 51 for detailed pinout.

GPIO electrical characteristics: The CPLD features LVCMOS33 cells (0-3V3), drive strength = 8 mA (sink or source), a clamp diode which is not 5V tolerant, an hysteresis of 250mV. The CPLD does not implement any internal pull-up or pull-down.

On the VX305x-SA board, a pull-up of 47 kOhms is connected to GPIO1 to GPIO5.

CAUTION: GPIOs are not 5V tolerant. Maximum voltage on GPIOs is 3.6 V. Absolute maximum vol tage is 3.75V and is not suitable for continuous operation. Appropriate voltage reduction (through resistor divider for instance) must be made to avoid permanent damage to the board.

The GPIOs share the same interrupt in the CPLD.

3.7.2 GDISCRETE1

GDISCRETE1 is a bussed open-collector GPIO defined by OpenVPX VITA 65 and available on P1. See section 4.3.2 “P1 Connector” page 51 for detailed pinout.

It is handled by the CPLD and buffered by a SN74LVC1G125 wired as an Open Collector to meet the electrical characte ristics defined in VITA 65.

It has a dedicated interrupt in the CPLD.

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VX305x User's Guide - CA.DT.B25-7e

3.8 Reset

RESET SOURCE RESET ACTION RESET CONTROL RESET STATUS NOTE

Front panel reset push button

VPX Sysreset Platform

VPX maskable reset (GPIO2)

cPLD watchdog reset

Processor watchdog reset

cPLD software reset

VPX SMBus0 slave register

Platform resetreset

resetreset

Platform resetreset

Front push button "I2C_BOARD_STATUS @0x72

VPX P0 / Row B/ Wafer 4 "I2C_BOARD_STATUS @0x72

VPX P1 / Row G/ Wafer 15 "I2C_BOARD_STATUS @0x72

See software release notes "I2C_BOARD_STATUS @0x72

Intel D-15xx watchdog control registers

I2C_BOARD_CONTROL @0x73 "I2C_BOARD_STATUS @0x72

See VPX I2C bus 0 slave interface chapter

Or VPX I2C bus 0 slave interface"

Intel D-15xx watchdog status registers

Or VPX I2C bus 0 slave interface"

"I2C_BOARD_STATUS @0x72 Or VPX I2C bus 0 slave interface"

Reset propagation options and masks available in cPLD registers

"See VPX Vita46.0 standard Reset propagation options and masks available in cPLD registers"

See VPX Vita46.0 standard

See software release notes

See register definition in this user's guide

"VPX P0 I2C Bus 0 signals Base address depends on Board slot number (VPX Geographical address)"

3.9 Write Protect Mode

4 SYS_WP

4 Description:

Write proection at system level

4 Hardware Write Protection:

NVRMO signal is high and SW1[1] is OFF for full protection

4 Write Protect Contol:

PROTECTION SW1[1] NVRMO @09-BIT 2

No OFF 0 0 YES OFF 0 1 YES OFF 1 0 YES OFF 1 1

No ON 0 0 YES ON 0 1

No ON 1 0 YES ON 1 1

4 Protected Devices:

256 Kbits OS EEPROM, cPLD I2C Bus

4 OS EEPROM on CPLD I2C bus @0x51

4 PEX8725 EEPROM

4 XMC EEPROM

www.kontron.com // 3 6

4 USER_WP

4 Description:

Write protection at user level

4 Hardware Write Protection:

NVRMO signal is high and SW1[1] is OFF for full protection

4 Write Protect Contol:

PROTECTION SW1[4] SW1[1] NVRMO @09-BIT 2

No OFF OFF 0 0 YES OFF OFF 0 1 YES OFF OFF 1 0 YES OFF OFF 1 1

No OFF ON 0 0 YES OFF ON 0 1

No OFF ON 1 0 YES ON ON 1 1 YES ON OFF 0 0 YES ON OFF 0 1 YES ON OFF 1 0 YES ON OFF 1 1 YES ON ON 0 0 YES ON ON 0 1 YES ON ON 1 0 YES ON ON 1 1

VX305x User's Guide - CA.DT.B25-7e

4 Protected Devices:

1 Mbits User FRAM, cPLD I2C bus SPI Boot Flash SPI 10GETH Flash

4 FRAM located on CPLD I2C2 bus @0x52

4 SPI Boot Flash memories

4 SPI 10 Gb ETH Flash

www.kontron.com // 37

4 VPD_WP

4 Description:

Write protection at VPD level

4 Hardware Write Protection:

NVRMO signal is high and SW1[3] OFF and SW1[1] is OFF for full protection

4 Write Protect Contol:

PROTECTION SW1[3] SW1[1] NVRMO @09-BIT 1

No OFF OFF 0 0 YES OFF OFF 0 1 YES OFF OFF 1 0 YES OFF OFF 1 1 YES OFF ON 0 0 YES OFF ON 0 1

No OFF ON 1 0

No ON ON 1 1

No ON OFF 0 0

No ON OFF 0 1

No ON OFF 1 0

No ON OFF 1 1

No ON ON 0 0

No ON ON 0 1

No ON ON 1 0

No ON ON 1 1

VX305x User's Guide - CA.DT.B25-7e

4 Protected Devices:

VPD EEPROM, cPLD I2C Bus Memory SPD EEPROM devices Ethernet Controller SPI flashes

4 VPD EEROM on CPLD I2C2 bus @0x50

4 DDR4 SPD

4 SPI flash for ETH0 I210T and ETH2 I210T controllers

4 NVRMO

4 All non volatile devices protected, except cPLD

4 NVMRO signal is high and SW[3] OFF & SW1[1] is OFF for full non volatile devices protection, except cPLD

www.kontron.com // 38

3.10 Graphic Option

MODP-GM2-SM750 M.2 2242 Module

VX305x User's Guide - CA.DT.B25-7e

SM750 2D Graphic Controller

16 MB Embedded Memory

PCIe x1 Interface

VX3058 Carrier

(32 bits)

from SOC

TFP-24-bit

Interface

VX3058

TOP M.2 Connector

Front/Rear

Selection

TFP410-EP

Transmitter

DVI Interface

DVI Link from Top M.2 slot 2D Resolution up to 1280 x 1024

DVI Switch

Front I/O Module (IDVI-VX3058)

DVI Link to Front

I/O Module

DVI Link to VPX Rear Panel

See VPX assignments

www.kontron.com // 39

4 / Physical I/O

4.1 Front Panel Connectors

Figure 17: Location of the Front Panel Connectors

1 2 3 4

VX305x User's Guide - CA.DT.B25-7e

1. Optional HDMI

2. Gbe ETH

3. Serial COM

4. USB 2.0

4.1.1 Serial Connector - COM

The VX305x-SA integrates two serial communication ports, COM1 and COM2 in PC parlance. COM1 and COM2 are available via the VPX P2 connector.

Default serial mode is simplified serial line mode Rx/Tx only, 115200 bauds.

COM1 is also available via the front panel connector.

4 COM1: EIA-232 or EIA-485 (simplified RX/TX) port on RJ-12 front panel connector or on the rear P2 connector

4 COM2: EIA-232 or EIA-485 (simplified RX/TX) port on the rear P2 connector

Each serial port is configurable via the CPLD as EIA-232 or EIA-485. Each port operates in full duplex mode. Fast slew rate is the default mode in EIA-485 mode.

The signaling level of EIA-485 is compatible with EIA-422, so full duplex EIA-485 may also be used for point-to-point communications with an EIA-422 serial port.

See section 4.3.3 “ P2 Connector” page 52 for more information on the serial lines wafer assignment on P2 connector.

4 Pin Assignment

Table 23: Serial Connector Pin Assignment

PIN SIGNAL

1 COM2 TXD / COM1TXD-

Figure 18: Serial Connector

Pin 1 Pin 6

2 Shell

3 COM1 TXD/TXD+

4 COM1 RXD/RXD+

5 GND

6 COM2 RXD/COM1 RXD-

A serial line should only be used via one connector at the same time, either the Serial front panel connector or the P2 connector.

www.kontron.com // 40

Table 24: Serial Connector Signal Description

MNEMONIC DESCRIPTION

VX305x User's Guide - CA.DT.B25-7e

COM2 RXD/COM1 RXD-

COM2 TXD/COM1 TXD-

COM1 RXD/RXD+

COM1 TXD/TXD+

GND

Shell

COM2 Receive Data (EIA-232) / COM1 Receive Data minus (EIA-485)

COM2 Transmit data (EIA-232) / COM1Transmit Data minus (EIA-485)

COM1 Receive Data (EIA-232) / Receive Data plus (EIA-485)

COM1 Transmit Data (EIA-232) / Transmit Data plus (EIA-485)

Ground

Chassis Ground

4 Serial Cable Designation

The Serial cable shall be shielded and shall provide a good shielding continuity between each end.

The Serial cable length should not exceed 10 m.

Final EMC qualification is required at system level, after Kontron product integration and customer cable selection.

Serial cable is:

4 RJ-14 (6 pin, 4 conductor) for a simple EIA-232 without handshake support.

4 RJ-12 (6 pin, 6 conductor) for EIA-232 with handshaking.

A RJ-12 to DB9/DB25 male or DB9/DB25 female adapter is available from multiple sources, such as:

4 Kontron Order Code KIT-2X-RJ12DB9

4 Triangle Cable http://www.trianglecables.com/db9m-rj12.html

Table 25: Serial Cable Pin Assignment

DB9 PIN

CONNECTOR

1 RTS 1

2 TXD 3

3 RXD 4

4 CTS 6

5 GND 5

www.kontron.com // 41

SIGNAL

RJ-12 PIN

CONNECTOR

Figure 19: Serial Cable

RJ12 cable

DB9 female adapter

VX305x User's Guide - CA.DT.B25-7e

4.1.2 Gigabit Ethernet Connector

The Ethernet cable shall be CAT6 compliant.

This Ethernet cable shall be S/FTP type at least (Shielded Foiled Twisted Pair), providing shielding continuity between each end.

The Ethernet transmission should operate using a CAT6 cable with a maximum length of 100 m.

Final EMC qualification is required at system level, after Kontron product integration and customer cable selection.

The Ethernet connectors are available as RJ-45 connectors with tab down. The interfaces provide automatic detection and switching between 10Base-T, 100Base-TX and 1000Base-T data transmission (Auto-Negotiation). Auto-wire swit ching for crossed cables is also supported (Auto-MDI/X).

Table 26: Gigabit Ethernet Connector Pin Assignment

1 O TX+ O TX+ I/O BI_DA+ 2 O TX- O TX- I/O BI_DA3 I RX+ I RX+ I/O BI_DB+ 4 - - - I/O BI_DC+ 5 - - - I/O BI_DC6 I RX- I RX- I/O BI_DB-

7 - - - I/O BI_DD+ 8 - - - I/O BI_DD-

Shell Chassis Ground

10BASE-T 100BASE-TX 1000BASE-T

I/O SIGNAL I/O SIGNAL I/O SIGNAL

4.1.3 USB Connector

USB cable shall be compliant to Universal Serial Bus Specification, Revision 2.0.

This USB cable shall have double shielding.

The USB cable length should not exceed 3 m.

Final EMC qualification is required at system level, after Kontron product integration and customer cable selection.

Figure 20: Ethernet Connector

Table 27: USB Connector Pin Assignment

PIN SIGNAL FUNCTION I/O

1 VCC (+5V Protected) VCC --

2 USB_D- Differential USB- I/O

3 USB_D+ Differential USB+ I/O

4 GND GND --

Figure 21: USB Connector

USB

www.kontron.com // 42

4.1.4 HDMI Port

The HDMI cable shall provide a good shielding continuity between each end.

This HDMI cable shall have double shielding.

The HDMI cable length should not exceed 3 m.

Final EMC qualification is required at system level, after Kontron product integration and customer cable selection.

VX305x User's Guide - CA.DT.B25-7e

Table 28: HDMI Port Pin Assignment

PIN SIGNAL

1 TMDS Data2+ 2 TMDS Data2

Shield

3 TMDS Data2-

4 TMDS Data1+

5 TMDS Data1 Shield 6 TMDS Data17 TMDS Data0+

8 TMDS Data0

Shield

9 TMDS Data0-

10 TMDS Clock+

11 TMDS Clock Shield 12 TMDS Clock13 N.C. 14 N.C. 15 SCL 16 SDA 17 GND 18 +5V 19 Hot Plug Detect

Figure 22: HDMI Port Cable

www.kontron.com // 43

4.2 Onboard Connectors

Figure 23: Onboard Connectors

VX305x User's Guide - CA.DT.B25-7e

1. J4101

2. J15

3 4

3. J16

4. P2801

www.kontron.com // 44

VX305x User's Guide - CA.DT.B25-7e

4.2.1 XMC J15 Connector Pin Assignments

XMC slot option is a nonstandard option because of thermal impacts and product restrictions with XMC slot - on demand only.

The pin assignment of the J15 XMC PCI Express connector is pin compatible with VITA 42.0 and VITA 42.3. This interface is a PCI Express with 8 lanes coming from the CPU.

Table 29: XMC J15 Connector Pin Assignments

PIN ROW A ROW B ROW C ROW D ROW E ROW F

1 PET0p0 PET0n0 3.3V PET0p1 PET0n1 VPWR (1)

2 GND GND TRST# GND GND MRSTI#

3 PET0p2 PET0n2 3.3V PET0p3 PET0n3 VPWR (1)

4 GND GND TCK GND GND NC

5 PET0p4 PET0n4 3.3V PET0p5 PET0n5 VPWR (1)

6 GND GND TMS GND GND +12V

7 PET0p6 PET0n6 3.3V PET0p7 PET0n7 VPWR (1)

8 GND GND TDI GND GND -12V

9 RFU RFU N.C. RFU RFU VPWR (1)

10 GND GND TDO GND GND GA0

11 PER0p0 PER0n0 NC PER0p1 PER0n1 VPWR

12 GND GND GA1 GND GND MPRESENT#

13 PER0p2 PER0n2 3.3V AUX PER0p3 PER0n3 VPWR (1)

14 GND GND GA2 GND GND MSDA

15 PER0p4 PER0n4 N.C. PER0p5 PER0n5 VPWR (1)

16 GND GND NVMRO GND GND MSCL

17 PER0p6 PER0n6 N.C. PER0p7 PER0n7 N.C.

18 GND GND N.C. GND GND N.C.

19 REFCLK+0 REFCLK-0 N.C. Reserved N.C. N.C.

(1) VPWR is connected to +12V via a fuse.

# Signals active when low.

www.kontron.com // 45

VX305x User's Guide - CA.DT.B25-7e

4.2.2 XMC J16 Connector Pin Assignment

XMC slot option is a nonstandard option because of thermal impacts and product restrictions with XMC slot - on demand only.

XMC I/O signals are routed to the VPX P2 connector according VITA 46.9 x8d for differential pairs (8 pairs) and x38s for single ended (4 last signals).

Table 30: XMC J16 Connector Pin Assignment

PIN ROW A ROW B ROW C ROW D ROW E ROW F

1 XMCIO_DP1- XMCIO_DP1+ NC XMCIO_DP2- XMCIO_DP2+ NC 2 GND GND NC GND GND NC 3 XMCIO_DP3- XMCIO_DP3+ NC XMCIO_DP4- XMCIO_DP4+ NC 4 GND GND NC GND GND NC 5 NC NC NC Reserved Reserved NC 6 GND GND NC GND GND NC

7 NC NC NC NC NC NC 8 GND GND NC GND GND NC 9 NC NC NC NC NC NC

10 GND GND NC GND GND NC

11 XMCIO_DP5- XMCIO_DP5+ NC XMCIO_DP6- XMCIO_DP6+ NC 12 GND GND NC GND GND NC 13 XMCIO_DP7- XMCIO_DP7+ NC XMCIO_DP8- XMCIO_DP8+ NC 14 GND GND NC GND GND NC 15 Reserved Reserved NC Reserved Reserved NC 16 GND GND Reserved GND GND Reserved 17 Reserved Reserved Reserved Reserved Reserved Reserved 18 GND GND XMCIO_SE3 GND GND XMCIO_SE4 19 Reserved Reserved XMCIO_SE1 Reserved Reserved XMCIO_SE2

4 XMCIO signals are routed to VPX P2 connector, see VPX P2 pin assignment figure.

4 NC pins are not connected on VX305x-SA board

www.kontron.com // 46

4.2.3 J4101 Connector Pin Assignment

J0401 is dedicated to Front /IO module options.

Table 31: J4101 Connector Pin Assignment

PIN SIGNAL FUNCTION

1 GND 2 GND 3 DVI_SCL Optional Front DVI Port 4 ETH2_MDI3 - Optional 2nd Ethernet MDI Interface 5 DVI_SDA Optional Front DVI Port 6 ETH2_MDI3 + Optional 2nd Ethernet MDI Interface

7 GND 8 GND 9 DVI_C_CLK + Optional Front DVI Port

10 ETH2_MDI2 - Optional 2nd Ethernet MDI Interface 11 DVI_C_CLK - Optional Front DVI Port 12 ETH2_MDI2 + Optional 2nd Ethernet MDI Interface 13 GND 14 GND 15 DVI_C_TMDS0 + Optional Front DVI Port 16 ETH2_MDI1 - Optional 2nd Ethernet MDI Interface 17 DVI_C_TMDS0 - Optional Front DVI Port 18 ETH2_MDI1 + Optional 2nd Ethernet MDI Interface 19 GND

20 GND

21 DVI_C_TMDS1+ Optional Front DVI Port 22 ETH2_MDI0 - Optional 2nd Ethernet MDI Interface 23 DVI_C_TMDS1 - Optional Front DVI Port 24 ETH2_MDI0 + Optional 2nd Ethernet MDI Interface 25 GND 26 GND 27 DVI_C_TMDS2 + Optional Front DVI Port

28 Reserved

29 DVI_C_TMDS2 - Optional Front DVI Port 30 Reserved

31 GND 32 GND 33 DVI_HPD 34 Reserved 35 RST# 36 Reserved 37 Reserved

38 GND

39 Reserved

40 V_FRONTIO

VX305x User's Guide - CA.DT.B25-7e

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4.2.4 P2701/P2801 Connector Pin Assignment

P2701/P2801 are the top/bottom M.2 slot connectors.

Table 32: P2801 Connector Pin Assignment

PIN SIGNAL PIN SIGNAL

1 GND_1 2 3V3_2 3 GND_3 4 3V3_4 5 PER3_N 6 Reserved

7 PER3_P 8 Reserved 9 GND_9 10 DAS/DSS#LED1#

11 PET3_N 12 3V3_12 13 PET3_P 14 3V3_14 15 GND_15 16 3V3_16 17 PER2_N 18 3V3_18 19 PER2_P 20 Reserved

21 GND_21 22 Reserved 23 PET2_N 24 Reserved 25 PET2_P 26 Reserved 27 GND_27 28 Reserved 29 PER1_N 30 Reserved

31 PER1_P 32 UART_RXD 33 GND_33 34 Reserved 35 PET1_N 36 Reserved 37 PET1_P 38 DEVSLP 39 GND_39 40 Reserved

41 PER0_N/SATA-B+ 42 Reserved 43 PER0_P/SATA-B- 44 Reserved 45 GND_45 46 Reserved 47 PET0_N/SATA-A- 48 Reserved 49 PET0_P/SATA-A+ 50 PERST#

51 GND_51 52 CLKREQ# 53 REFCLK_N 54 PEWAKE# 55 REFCLK_P 56 Reserved 57 GND_57 58 Reserved 59 CONNECTOR_KEY_59 60 CONNECTOR_KEY_60

61 CONNECTOR_KEY_61 62 CONNECTOR_KEY_62 63 CONNECTOR_KEY_63 64 CONNECTOR_KEY_64 65 CONNECTOR_KEY_65 66 CONNECTOR_KEY_66 67 NC_67 68 SUSCLK 69 PEDET 70 3V3_70

71 GND_71 72 3V3_72 73 GND_73 74 3V3_74 75 GND_75

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VX305x User's Guide - CA.DT.B25-7e

4.3 Rear Connectors

4 VPX Bus Interface

The complete 3U VPX connectors configuration comprises three connectors named P0 to P2:

4 P0: 8-wafer 7-row connector.

4 P1 - P2: 16-wafer 7-row differential connectors.

Figure 24: VPX Connectors

8 1

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VX305x User's Guide - CA.DT.B25-7e

4.3.1 P0 Connector

Table 33: VPX Connector P0 Wafer Assignment

WAFER ROW G ROW F ROW E ROW D ROW C ROW B ROW A

1 +12V +12V +12V NC NC

(VS2)

2 +12V +12V +12V NC NC

3 NC

(VS3)

4 I2C1 CLK I2C1 DAT GND -12V_AUX GND SYSRESET* NVMRO

5 GAP* GA4* GND 3V3_AUX GND I2C0 CLK I2C0 DAT

6 GA3* GA2* GND NC

7 GPIO5

(TCK)

8 GND REF_CLK- REF_CLK+ GND AUX_CLK- AUX_CLK+ GND

CASE GND

* signal active when low

Table 34: VPX Connector P0 Signal Definition

MNEMONIC SIGNAL DEFINITION

+12V +12 Volts DC power (VS1 VPX supply). NC (+12V) pins are not connected (VS2 VPX supply)

-12V_AUX -12 Volts auxiliary power. Only used to supply XMC if needed.

NVMRO

GAi Geographical address pins GAP Geographical address parity GND Ground

GPIO5* General purpose I/O 5 (handled by CPLD)

GPIO3_10GMCK* General purpose I/O 3 (handled by CPLD) or Ethernet 10G I2C clock for rear SFP+

GPIO4_10GMD* General purpose I/O 4 (handled by CPLD) or Ethernet 10G I2C data for rear SFP+

I2C0 I2C Bus 0 I2C1 I2C Bus 1

REF_CLK+/- The Reference Clock is a bussed differential pair. Output if the VX305x-SA is plugged in the

AUX_CLK+/- 1 PPS (one pulse per second) clock input. Can be programmed as an output on system

PCIe_CLK+/- Optional Common Reference PCI Express Clock input.

SYSRESET* System Reset. Input and open collector output.

(VS3)

GND PCIe_CLK-

Non-Volatile Memory Read Only. When asserted (logical 1), prevents any non-volatile memory from being updated.

system controller slot, input otherwise. It enables the entire system to synchronize to a common time reference if desired. Counter/

timer in the CPLD can use this clock

controller slot. Can be used to phase the CPLD timer/counter clocked by REF_CLK+/-.

(VS3)

(TDO)

NC NC

(+12V_AUX)

PCIe_CLK+

(TDI)

(VS2)

(VS3)

GND GA1* GA0*

GND GPIO3_10GMCK

(VS2)

(VS3)

GPIO4_10GMD

(TMS)

(VS2)

(VS3)

(TRST)

* See section 3.7 - GPIOs and GDISCRETE1 - page 35.

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4.3.2 P1 Connector

Table 35: VPX Connector P1 Wafer Assignment

4 Legend for Table 35:

VX305x User's Guide - CA.DT.B25-7e

P1_VBAT Battery Voltage USB0/1

P1_SYS_CON* System Controller SATA0/1 SATA links 0 and 1 from PCH

PCIe0 LxRX | LxTX x8, 2 x4 or 4 x2 PCI-

Express

USB3

ETHx TX/RX 1000BASE-KX Ethernet controller or 10GBASEKR links 0 and

ETH2 DA/DB/DC/DD 1000BASE-T link from I210IT GbE controllers

USB2 links 1 and 13 from PCH USB3 link 2 from PCH

1 from integrated 10 GbE controller as per VITA 46.7.

WAFER ROW G ROW F ROW E ROW D ROW C ROW B ROW A

1 GDISCRETE1 GND PCIe0 L0-TX- PCIe0 L0-TX+ GND PCIe0 L0-RX- PCIe0 L0-RX+ 2 GND PCIe0 L1-TX- PCIe0 L1-TX+ GND PCIe0 L1-RX- PCIe0 L1-RX+ GND 3 VBAT GND PCIe0 L2-TX- PCIe0 L2-TX+ GND PCIe0 L2-RX- PCIe0 L2-RX+ 4 GND PCIe0 L3-TX- PCIe0 L3-TX+ GND PCIe0 L3-RX- PCIe0 L3-RX+ GND 5 SYS_CON* GND PCIe0 L4-TX- PCIe0 L4-TX+ GND PCIe0 L4-RX- PCIe0 L4-RX+ 6 GND PCIe0 L5-TX- PCIe0 L5-TX+ GND PCIe0 L5-RX- PCIe0 L5-RX+ GND

7 Reserved GND PCIe0 L6-TX- PCIe0 L6-TX+ GND PCIe0 L6-RX- PCIe0 L6-RX+ 8 GND PCIe0 L7-TX- PCIe0 L7-TX+ GND PCIe0 L7-RX- PCIe0 L7-RX- GND 9 USB PWR GND SATA0 TX- SATA0 TX+ GND SATA0 RX- SATA0 RX+

10 GND SATA1 TX- SATA1 TX+ GND SATA1 RX- SATA1 RX+ GND 11 USB PWR GND USB3 TX- USB3 TX+ GND USB3 RX- USB3 RX+ 12 GND USB0 DA- USB0 DA+ GND USB1 DA- USB1 DA+ GND 13 GPIO1 GND ETH2 DB- ETH2 DB+ GND ETH2 DA- ETH2 DA+ 14 GND ETH2 DD- ETH2 DD+ GND ETH2 DC- ETH2 DC+ GND

Maskable Reset*

or GPIO2

GND ETH1 TX- ETH1 TX+ GND ETH1 RX- ETH1 RX+

16 GND ETH0 TX- ETH0 TX+ GND ETH0 RX- ETH0 RX+ GND

CASE GND

* signal active when low

Table 36: VPX Connector P1 Signal Definition

MNEMONIC SIGNAL DEFINITION

P1-REF_CLK_SE Reserved PCIe0 Lx-RX+/- x8 PCI Express Link. Receive +/-, gen1, gen2 or gen3

Can also be used as a 2 x4 links or 4 x2 links

PCIe0 Lx-TX+/- x8 PCI Express Link. Transmit +/-, gen1, gen2 or gen3

Can also be used as a 2 x4 links or 4 x2 links SATAx RX+/- Serial ATA. Receive +/- link x SATAx TX+/- Serial ATA. Transmit +/- link x

USB PWR USB Power

USBx D+/- Differential Data pair of USB link x

USB3 TX+/- RX+/- Differential Data transmit and receive of USB3 link

ETH2 DA+/- Ethernet 1000BASE-T: First pair of transmit/receive data. ETH2 DB+/- Ethernet 1000BASE-T: Second pair of transmit/receive data ETH2 DC+/- Ethernet 1000BASE-T: Third pair of transmit/receive data.

ETH2 DD+/- Ethernet 1000BASE-T: Fourth pair of transmit/receive data

ETHx RX+/- 10GBASE-KR or 1000BASE-KX Ethernet x: Receive data +/- (auto negotiation) ETHx TX+/- 10GBASE-KR or 1000BASE-KX Ethernet x: Transmit data +/- (auto negotiation)

GDISCRETE1 Open VPX GDISCRETE1 signal

GPIO1* General Purpose I/O 1 (handled by the CPLD)

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VX305x User's Guide - CA.DT.B25-7e

SIGNAL DEFINITIONMNEMONIC

Maskable Reset*

or GPIO2

General purpose I/O 2 (handled by CPLD) or Optional reset input (may be left

unconnected if not used).

GND Ground

SYS_CON System Controller Slot Indication

VBAT Battery Voltage Input, 3V. Optional alternated source for RTC backup voltage.

* See section 3.7 - GPIOs and GDISCRETE1 - page 35.

4.3.3 P2 Connector

XMC slot option is a nonstandard option because of thermal impacts and product restrictions with XMC slot - on demand only.

Table 37: VPX Connector P2 Wafer Assignment

4 Legend for Table 37:

COM1/2 Simplified asynchronous serial lines PCIe1_TX/RX Additionnal PCI express x1 link from PCH

USB2/3 USB links 2 and 12 from PCH PCIe1_CLK Additionnal PCI express clock from PCH

SATA2/3 SATA links 2 and 3 from PCH XMCIO_SE1-4 Single ended XMC IO pins C19,F19,C18,F18 according

ETH3 ETH3 from PCH XMCIO_DP1-8 Differential XMC IO pins according VITA46.9 X8d

VITA46.9 X38s

WAFER ROW G ROW F ROW E ROW D ROW C ROW B ROW A

1 NC GND SATA2TX- SATA2TX+ GND SATA2RX- SATA2RX+ 2 GND SATA3TX- SATA3TX+ GND SATA3RX- SATA3RX+ GND 3 COM1 TXD/TXD+ GND USBPWR USBPWR GND USBPWR USBPWR 4 GND USB2DA- USB2DA+ GND NC NC GND 5 NC GND ETH3 DB-- ETH3 DB+ GND ETH3 DA- ETH3 DA+ 6 GND ETH3 DD- ETH3 DD+ GND ETH3 DC- ETH3 DC+ GND

7 COM1RXD/RXD+ GND DVI HPD NC GND NC NC 8 GND DVI TMDS1- DVI TMDS1+ GND DVI TMDS2- DVI TMDS2+ GND 9 NC GND DVI CLK- DVI CLK+ GND DVI TMDS0- DVI TMDS0+

10 GND PCIe1CLK- PCIe1CLK+ GND DVI SDA DVI SCL GND

COM2 TXD/ COM1

TXD-

GND PCIe1TX- PCIe1TX+ GND PCIe1RX- PCIe1RX+

12 GND XMCIO_SE3 XMCIO_SE1 GND XMCIO_SE4 XMCIO_SE2 GND 13 NC GND XMCIO_DP1- XMCIO_DP1+ GND XMCIO_DP2- XMCIO_DP2+ 14 GND XMCIO_DP3- XMCIO_DP3+ GND XMCIO_DP4- XMCIO_DP4+ GND

COM2 RXD/ COM1

RXD-

GND XMCIO_DP5- XMCIO_DP5+ GND XMCIO_DP6- XMCIO_DP6+

16 GND XMCIO_DP7- XMCIO_DP7+ GND XMCIO_DP8- XMCIO_DP8+ GND

CASE GND

* signal active when low

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VX305x User's Guide - CA.DT.B25-7e

Table 38: VPX Connector P2 Signal Definition

MNEMONIC SIGNAL DEFINITION

COMx Serial Lines, EIA-232/EIA-485

USB PWR USB Power

USBx D+/- Differential Data pair of USB link x SATAx RX+/- Serial ATA. Receive +/- link x SATAx TX+/- Serial ATA. Transmit +/- link x

PCIe1 TX/RX Additional PCI-Express x1 link

PCIe1 CLK Common Reference Clock Output for PCIe1

GND Ground XMCIO_SE1-4 Single ended XMC I/O 1,2,3 and 4 according to VITA 46.9 X38s XMCIO_DP1-8 Differential pairs XMC I/O 1 to 8 according to VITA 46.8 X8d

DVI DVI Port

4.4 LEDs

4.4.1 Status LEDs Default Setting

There are five bicolor LEDs (Red/Green) on the front panel of the VX305x-SA 3U VPX board.

Figure 25: LEDs Front panel

4.4.2 LEDs Activity

Table 39: LEDs Description

CPU LED

LED OFF Red LED Green LED Orange LED Red blinking LED Green Blinking LED Orange blinking LED Not blink: Indicates that the corresponding LED gives an additional information if any LED is

blinking at the same time

1. L1 LED 2. Reset CPU 3. L2, L3, L4, L5 LEDS

DESCRIPTION

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VX305x User's Guide - CA.DT.B25-7e

The following table describes the informations that the LED can report:

Table 40: LEDs Activity

L1 L2 L3 L4 L5 MEANING

Permanent system error. Internal VX305x-SA power is off. In this state L2, L3, L4 and L5 do not carry the meaning described in this table but an error code detailed in the ERRORS CODES table.

At least one of the LANSW interfaces link up At least one linked at 1000BASE-T

Blinking when activity on the links

At least one of the LANSW interfaces link up. No linked at 1000BASE-T

Blinking when activity on the links

Not

Blink

Not

Blink

Not

Blink

Not

Blink

F 100BASE-TX/1000BASE-T interfaces are down

F PEX FATAL Error detected

10G Ethernet controller link up.

Blinking when activity on the link

F 10G Ethernet controller off

F Internal power supplies are ON and board reset is asserted.

Internal power supplies are ON and board reset de-asserted (normal operation).

Internal power supplies are ON but PROCPWRGD_PCH not activated

Fast blinking RED (reset asserted) or GREEN (reset de- asserted) when activity to/from backplane I2C/SMBus

Slow blinking GREEN (1 Hz, 50% duty cycle) when internal power supplies are OFF (board in standby)

F Normal operation

F Factory test mode

F CPLD Watchdog expired

: Off blinking when M2 activity on Slot 2

Processor hot event (PROCHOT), supersedes 10G Ethernet

routing information

F ETH1 and ETH2 LANSW links directed on front connector

At least one of ETH1 or ETH2 LANSW link directed on VPX

connector

: Off blinking when M2 activity on Slot 1

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VX305x User's Guide - CA.DT.B25-7e

L1 L2 L3 L4 L5 POWER GOOD ERRORS

F F F F F

PWRGD_VPX

VPXPWRGD_UV

VPXPWRGD_OV

PWRGD_VR5V0

PWRGD_VCCSCFUSESUS

PWRGD_VCCKRHV

PWRGD_VR1V5_PCH

PWRGD_VR1V05

PWRGD_VR2V5_DDR4

PWRGD_VR1V2

PWRGD_VTT

PWRGD_FET1V05

PWRGD_VRPEX

PWRGD_VR3V3

PWRGD_VRVCCIN

RESERVED

WAKE UP ERROR (timeout on SLP_S4# deassertion)

F F F F F

L1 L2 L3 L4 L5 CRITICAL ERRORS

F F F F :

F F F : F

F F : F F

F : F F F

: F F F F

PROCPWRGD ERROR (timeout on PROCPWRGD_PCH assertion)

PLTRST# ERROR (timeout on deassertion S5 To S0)

LPC CLOCK is 48 MHz (Legacy value is 33 MHz)

LPC CLOCK is 25 MHz (Legacy value is 33 MHz)

PECI_CRIT#

CATERR#

VR1V05_VRHOT#

VRVCCIN_VRHOT#

THERMTRIP#

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VX305x User's Guide - CA.DT.B25-7e

5 / Power and Thermal Specifications

5.1 Electrical Specifications

5.1.1 Input Powers Supplies Protection

The input power rails are protected on the VX305x-SA by fuse as described in Table 41.

To prevent safety hazards, the chassis power supply must not exceed the Voltage Rating and Interrupt Rating of the fuse.

Table 41: Input Powers Supplies Protection

POWER RAIL VPX VS1 VPX 3.3 V AUX LOCATION P0 P0 VOLTAGE +12 V +3.3 V PROTECTION Non resettable fuse Non resettable fuse RATED CURRENT 10 A 1.5 A TRIP CURRENT - 2.1 A min @ 85 °C

3.0 A typ @ 23 °C

3.5 A max @ -40 °C

TYPICAL MELT I²T 2.0 - VOLTAGE RATING 24 V 32 V INTERRUPTING RATING 150 A 35 A MANUFACTURER / PN 3216FF10-R 043501.5KR

5.1.2 Output Powers Supplies Protection

On the VX305x-SA, all the output power supplies provided on connectors are protected by fuse or current-limiting devices as described in Table 42.

Table 42: Output Powers Supplies Protection

Worst Case Hold

Port Function Location Voltage Protection

Front Panel USB

Front HDMI

VPX P1 Rear USB Power pins

VPX P2 Rear USB power pins

M2. Slots

USB 2.0 Front

P1 USB power

P2 USB

Power

M2 slot

power supply

Panel

Front Panel

Rear P1 +5 V Non

Rear P2 +5 V Non

On board +3.3 V Non

+5 V Nano

+5 V Non

150F1.5A

resettable

fuse

resettable

fuse

resettable

fuse

resettable

fuse

Rated Current

(Maximum operation

temperature)

1 A 2.2 A @ 60 °C

0.8 A - - Graphic option

1.25 A - -

2.5 A - -

Trip current Characteristics Note

3 A @ 25 °C

3.54 A @ 0 °C

Time to trip:

0.3s @ 8 A @25°C

only

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VX305x User's Guide - CA.DT.B25-7e

5.2 Power Specifications

5.2.1 VX3052 and VX3058 Thermal Power

The following data show total board consumption for different processor configuration and Thermal Design Power. These data help for thermal power dissipation analysis.

All power values in this table are measured in operational conditions on early field Xeon-D parts.

Table 43: Thermal Power: board power based on current measurements

VX3058SA881150000

VX3058 D-1537 @ 1.7 GHz No M.2 module, No GFX option

VX3052SA280150000

VX3058 D-1508* @ 2,2 GHz No M.2 module, No GFX option

VX3058SA882150000

VX3058 D-1548 @ 2 GHz No M.2 module, No GFX option

Power Mode

100 % all cores @ 1.7GHz Max Processor Power package

80 % all cores

Linux Idle Linux "On demand" mode

Max Processor Power package

80 % all cores

Linux Idle Linux "On demand" mode

Max Processor Power package

80 % all cores @ 2GHz

Linux Idle Linux "On demand" mode

Measured

CPU

package

power/Freq

35 W /

1.7 GHz

32 W /

1.7 GHz

10 W /

800 MHz

25 W /

2.2 GHz

23 W /

2.2 GHz

10 W /

800 MHz

45 W /

2 GHz

41 W /

2 GHz

10 W /

800 MHz

Max total

Power

consumption

(W)

62 W

58 W

25 W

50 W

46 W

25 W

75 W

70 W

25 W

Test Condition

Maximum CPU junction temperature Dual bank DDR4-2133 memory configuration full speed LinuxOS with full speed and full load stress tests running on all I/Os I/Os configuration: front panel serial line,one front panel 1Geth, no USB devices, one external SATA hard drives at full speed on rear panel , PCIe x8 and two 10G-KR rear link full speed, LPC/FRAM activity

Maximum CPU junction temperature Dual bank DDR4-2133 memory configuration full speed LinuxOS, no I/Os stress tests

Max Continuous

Power

Consumption (W)

0.5 W

1,32 W

Test condition

VPX +3V3_AUX power rail is present and VPX VS1 power rail not present. VPX +3V3_AUX power rail must support peak current condition at power-on.

Graphic controller at full load. This thermal power is not dissipated on board.

VX3058, VX3052

without VPX VS1 power supply Board in stand-by mode

Graphic option module

Voltage Rail

Name

VPX +3V3_AUX

+3.3 V (generated

internaly)

Max Current

150 mA continuous

(2.5 A peak / 2 ms)

400 mA

continuous

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VX305x User's Guide - CA.DT.B25-7e

5.2.2 VX3052, VX3058 Maximum Current

The following data provide maximum continuous and worst case current values on VPX VS1(12V) power supplies, for SA class. These maximum includes margin to guarantee worst case part behavior.

Table 44: Maximum VS1 Current

VX3058SA881150000

VX3058 D-1537 @ 1.7 GHz, No M.2 module, No GFX option

VX3052SA280150000

VX3058 D-1508 @ 2.2 GHz, No M.2 module, No GFX option

VX3058SA882150000

VX3058 D-1548 @ 2 GHz, No M.2 module, No GFX option

Max VPX VS1

current

6 A

5 A

7 A

Calculated value based on measu rements and for CPU @ 1.25*TDP

Test Condition

5.3 Board Thermal Monitoring

To ensure long-term reliability of the VX305x-SA, onboard components must not operate beyond their specified maximum temperature. The most critical component on the VX305x-SA is the processor. Operating the VX305x-SA above the maximum operating limits will result in permanent damage to the board.

The VX305x-SA includes a temperature sensor (NCT7802Y by Nuvoton) managed by the CPLD through I2C. See Figure 16 “I2C Diagram” page 28.

Figure 26: Temperature Sensor Location

Temperature and Voltage Sensor Part

In addition to monitoring several internal power supplies, the NCT7802Y supports one on-die temperature sensor and can also get the processor temperature directly via the Intel® PECI3.0 interface. The NCT7802Y temperature and voltages monitoring data may be viewed with the Linux "sensors" command.

The NCT7802Y has 3 alarm outputs connected to the CPLD:

4 ALERT#: logged in CPLD to generate a maskable interrupt. The high threshold is set to +85°C by BIOS.

The low threshold is set to -45 °C. High threshold may be modified using the BIOS UEFI command Low threshold may be modified using the BIOS UEFI command VX305x-SA> « kpld -i2cw 2 50 37 1 <value> » The low threshold may also be used as the lower threshold for high temperature hysteresis.

VX305x-SA> kpld -i2cw 2 50 36 1 <value>

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VX305x User's Guide - CA.DT.B25-7e

4 T_CRIT#: logged in CPLD reg @0x74, leads to fatal error with all internal PSUs power supplies being switched off

and the error status is being displayed on the front panel LEDs. The T_CRIT# threshold is set to +95 °C by BIOS. T_CRIT threshold may be modified using the BIOS UEFI command

4 RESET#: not used by CPLD

«kpld -i2cw 2 50 3D 1 <value> »

4 NCT7802Y Key specifications:

4 Voltage monitoring accuracy +-10 mV

4 Temperature Sensor Accuracy

4 On-chip Temperature Sensor Accuracy (25~70 °C) +- 2 °C typ.

4 On-chip Temperature Sensor Resolution 1 °C

4 Operating Temperature Range -40 °C ~ 85 °C

5.4 CPU Thermal Monitoring

All thermal data in the following tables are initial measurements on available Xeon-D processor silicons. These data applies to standard VPX 3U 1'' slot profile.

See VX305x-SA Thermal design guide for more information.

4 CPU Temperature

For a given required air-flow and processor TDP (Thermal Design Power), the following curves show the maximum aut horized operating temperature, not to exceed the maximum specified junction temperature of the processor.

For Xeon-D processors, maximum case temperature (TcMAX) depends on processor part number.

These curves help also to choose customer operating points for a given 1 inch slot environment.

The TJMAX temperature is the temperature not to exceed, to avoid entering the throttling mode.

To ease Xeon D temperature measurements and make sure that processor temperature is within Intel specifications, Intel provide maximum Tcase temperatures (measured at the geometric center of the top surface of the intergated heatspreader).

Figure 27: CPU Location

CPU

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VX305x User's Guide - CA.DT.B25-7e

Intel Power Thermal Utility (PTU) software has been used to force processor TDP during thermal characterization.

All Thermal Design Power (TDP) were measured with Intel Power Thermal Utility (PTU) software.

Figure 28: Standard VX305x-SA Heat Sink without XMC slot option

Table 45: VX305x-SA Functional Points Synthesis

(1)

80 % of CPU load is the recommended processor load for normal applications.

VX3058SA882150000

D-1548 CPU (TDP=45W)

Product CFG=82

Processor Power Dissipation for 80 % CPU load

Processor Junction Temperature all cores

Inlet Air Temperature AT 50 °C 55 °C 55 °C

Minimum Inlet Airflow for 80 % CPU load 

Extra Processor power Dissipation to be added in case of 100 % CPU load

5.5 Intel® Turbo Boost Technology

Intel® Turbo Boost Technology is one of the many exciting features that Intel has built into latest-generation Intel® microarchitecture. It automatically allows processor cores to run faster than the base operating frequency if it's operating below power, current, and temperature specification limits.

Dynamically increasing performance

Intel Turbo Boost Technology 2.0 is activated when the Operating System (OS) requests the highest processor perfor mance state (P0).

The maximum frequency of Intel Turbo Boost Technology 2.0 is dependent on the number of active cores. The amount of time the processor spends in the Intel Turbo Boost Technology 2.0 state depends on the workload and operating environment.

Any of the following can set the upper limit of Intel Turbo Boost Technology 2.0 on a given workload:

4 Number of active cores

4 Estimated current consumption

4 Estimated power consumption

4 Processor temperature

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VX305x User's Guide - CA.DT.B25-7e

When the processor is operating below these limits and the user's workload demands additional performance, the pro cessor frequency will dynamically increase until the upper limit of frequency is reached. Intel Turbo Boost Technology

2.0 has multiple algorithms operating in parallel to manage current, power, and temperature to maximize performance and energy efficiency.

Intel Turbo Boost Technology 2.0 allows the processor to operate at a power level that is higher than its rated upper power limit (TDP) for short durations to maximize performance.

Learn more about Intel Turbo Boost Technology: http://www.intel.com/technology/turboboost/

The Intel Turbo Boost is handled by the BIOS through the Advanced Power Management Configuration menu.

Refer to the AMI BIOS for VX6090 - User Reference Manual, section “IntelRCSetup Menu”.

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VX305x User's Guide - CA.DT.B25-7e

6 / Backplane Suggestions

Kontron can offer for development or deployement of the VX305x-SA the following backplane models:

Figure 29: Single Star x4, 8 SlotsTopology

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Figure 30: Distributed, 2 Slots Topology

VX305x User's Guide - CA.DT.B25-7e

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7 / VX305x-RC Characteristics

Figure 31: VX305x-RC Overview

VX305x User's Guide - CA.DT.B25-7e

Available RC order codes are listed in section 1.3.3 - Ordering Information, page 6.

7.1 VX305x-RC Specificities

Table 46: VX305x-RC Specificities

FUNCTION DESCRIPTION SEE ALSO

Product mass Mass depends on Mechanical E.C. Level See section 7.3

Board Identification Mechanical E.C. Level See section 7.2

Environmental specifications

MTBF MTBF depends on the environmental class See section 7.4

Peripheral connectivity No connector available on the board front panel See section 7.5

Optional Modules Module options See section 7.10

Refer to RC environmental specifications See section 7.3

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VX305x User's Guide - CA.DT.B25-7e

7.2 VX305x-RC Board Identification

The VX305x-RC boards are identified by labels fitted on top and bottom sides. These labels are at the same location and have the same meaning as the VX305x-SA boards (See “Board Identification” Sec

tion).

Figure 32: VX305x-RC Identification (Top Side)

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7.3 VX305x-RC Environmental Specifications

See section 1.3.3 page 6 for product configuration definition (CFG).

Table 47: VX305x-RC Environmental Specifications

VX305x User's Guide - CA.DT.B25-7e

ENVIRONMENTAL

RC PRODUCT CFG=40 RC PRODUCT CFG=80 RC PRODUCT CFG=81

SPECIFICATIONS

Plug-in unit type according Vita48.2

Type 2, secondary side retainers

Conformal Coating Standard Standard Standard

Airflow N.A. N.A. N.A.

Cooling Method Conduction Conduction Conduction

Operating temperature -40°C to +85°C

(1)

-40°C to +70°C

(1)

-40°C to +85°C

(1)

Storage Temperature -45°C to +100°C -45°C to +100°C -45°C to +100°C

Sine vibrations (Operating)

Random vibrations (Operating)

5 g / 22-2,000 Hz

Acceleration / frequency range

5 g / 22-2,000 Hz

Acceleration / frequency range

Product withstand vibration as defined below, 1 hour per axis:

4 5 Hz to 100 Hz PSD increasing at 3 dB/octave

5 g / 22-2,000 Hz

Acceleration / frequency range

4 100 Hz to 1000 Hz PSD = 0.1 g2/Hz

4 1000 Hz to 2000 Hz PSD decreasing at 6 dB/octave

Mechanical shocks (Operating)

40 g / 11 ms

peak accel./shock duration half sine

40 g / 11 ms

peak accel./shock duration half sine

40 g / 11 ms

peak accel./shock duration half sine

Altitude (Operating) -1,500 to 60,000 ft -1,500 to 60,000 ft -1,500 to 60,000 ft

Relative Humidity 95% non-condensing 95% non-condensing 95% non-condensing

Product mass 620 g 620 g TBD

(1)

Maximum temperature measured at card edge in the following conditions: full processor performance, maximum processor TDP without CPU throttling.

7.4 VX305x-RC MTBF Data

Calculations are made according to the standard MIL-HDBK217F-2 for following types of environment:

4 Ground Benign (GB)

4 Air Inhabited Cargo (AIC)

4 Naval Sheltered (NS),

4 Air Rotary Wing (ARW)

Table 48: VX305x-RC MTBF Data

MTBF

GB (HOURS) NS (HOURS)

25 °C 40 °C 25 °C 40 °C 55 °C 40 °C

VX305x-RC Product CFG=40 TBD TBD TBD TBD TBD TBD VX305x-RC Product CFG=80 TBD TBD TBD TBD TBD TBD

VX305x-RC Product CFG=81 TBD TBD TBD TBD TBD TBD

ARW

(HOURS)

AIC (HOURS)

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VX305x User's Guide - CA.DT.B25-7e

7.5 VX305x-RC Peripheral Connectivity

RC product variants do not have front panel I/O connectors. Only LED indicators and rest button are present on RC products front panels. RC variants Rear I/O features are common with SA products.

7.6 VX305x-RC Board Insertion

Running the board at high temperature without tightening the wedgelocks to the cold plate may result in permanent damage to the board.

4 Torque to be applied.

A torque of 0.9 N.m must be applied to the wedgelock screw (Calmark serie 265 ) when mounting the board into the chassis.

Figure 33: VX305x-RC Board Insertion - Wedgelock Screw Location

7.7 VX305x-RC Battery Option

No battery on standard RC product variants. Battery option on demand only.

7.8 VX305x-RC Thermal Performance

4 System Level Thermal Performance: Secondary side retainers to enlarge Thermal

Management Zone.

As per VITA4 8.2, the VX305x-RC features a secondary side attachment to optimize the surface of the Thermal Management Zone between the drain and the cold plate.

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VX305x User's Guide - CA.DT.B25-7e

Figure 34: VX305x-RCThermal Management Zone

Thermal Management Zone

4 Board Level Thermal Performance

The CPU core maximum junction temperature (Tj max) is the maximum temperature allowed before entering into throttling mode. Tj max is 104°C for the Intel Xeon-D1500 series processors.

This core temperature is accessible through the Linux sensors driver. Refer to the Release Notes for BSP (SD.DT.G53) for information about the "sensors" command, RC class specific features, and power management.

Due to the actual accuracy of the processor internal sensors, and to secure processor full-on mode, the maximum tempe rature recommended by Kontron to avoid throttling is not 104°C but 100°C.

The user can modify several parameters to optimize thermal performance:

4 Turbo mode: for a better control of thermal performance, it is advised to disable this mode.

4 Processor load: Kontron advises to keep some margin for real time behavior and stay within 80% of processor load.

4 Wedge lock temperature: this temperature depends on the cold plate temperature and on the board power

consumption. It can be measured by sensors placed in holes located on the sides of the thermal drain.

The following curves give the relationship between processor dissipation and board edge temperature to keep the core temperature below 100°C, depending on RC product configuration (CFG). Exceeding junction temperature will force the pro cessor to enter the throttling mode with reduced performance.

4 RC product CFG=40 and CFG=80 thermal performance

RC PRODUCT CFG=40 AND CFG=80

CPU TDP MEASURED CARD EDGE

TEMPERATURE

20 W 86 °C 25 W 85 °C 30 W 83 °C 35 W 80 °C 42 W 75 °C 45 W 70 °C

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VX305x User's Guide - CA.DT.B25-7e

Figure 35: VX305x-RC Processor TDP versus Card edge Temperature, RC product CFG=40 and CFG=80.

4 RC product CFG=81 thermal performance

TBD

7.9 VX305x-RC BIOS Default Configuration for VX305x-RC

The conduction cooled versions of the VX305x come out of production with different BIOS settings than the air cooled versions. The changes are:

4 Processor C-States disabled.

4 Turbo mode disabled.

4 Double refresh rate mode enabled on DDR4 interface (this setting is mandatory at high temperature).

4 ETH1 and ETH2 routed to rear panel.

7.10 VX305x-RC Optional Modules

See section 2.9 page 23 regarding M.2 module insertion / removal instructions. TBD

7.11 VX305x-RC Covers Removal / Insertion Instructions.

TBD.

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About Kontron

Kontron, a global leader in embedded computing technology and trusted advisor in IoT, works closely with its customers, allowing them to focus on their core competencies by offering a complete and integrated portfolio of hardware, software and services designed to help them make the most of their applications.

With a significant percentage of employees in research and development, Kontron creates many of the standards that drive the world’s embedded computing platforms; bringing to life numerous technologies and applications that touch millions of lives. The result is an accelerated time-to-market, reduced total-cost-of-ownership, product longevity and the best possible overall application with leading-edge, highest reliability embedded technology

VX305x User's Guide - CA.DT.B25-7e

Kontron is a listed company. Its shares are traded in the Prime Standard segment of the Frankfurt Stock Exchange and on other exchanges under the symbol “KBC”. For more information, please visit: www.kontron.com

CORPORATE OFFICES

FRANCE HEAD OFFICE NORTH AMERICA ASIA PACIFIC

150, rue Marcelin Berthelot ZI de Toulon-Est . BP 244 83078 Toulon Cedex 9 - France Tel: +33 4 98 16 34 00 Fax: +33 4 98 16 34 01 sales.KFR@kontron.com

Lise-Meitner-Str. 3-5 86156 Augsburg Germany Tel.: +49 821 4086-0 Fax: +49 821 4086-111 info@kontron.com

14118 Stowe Drive Poway, CA 92064-7147 USA Tel.: +1 888 294 4558 Fax: +1 858 677 0898 info@us.kontron.com

1~2F, 10 Building, No. 8 Liangshuihe 2nd Str. Economical & Technological Develop. Zone, Beijing, 100176, P.R. China Tel.: +86 10 63751188 Fax: +86 10 83682438 info@kontron.cn

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Kontron VX305-RC, VX305-SA, VX3058, VX3052 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

1 / Introduction

1.1 Manual Overview

1.1.1 Objective

1.1.2 Audience

1.1.3 Scope

1.1.4 Structure

1.1.5 Terminology, Definitions and Abbreviations

1.2 VPX Overview

1.3 Board Overview

1.3.1 Main Features

1.3.2 Block Diagram

1.3.3 Ordering Information

1.3.4 I/O Interfaces

1.3.5 Components Layout

1.3.6 Technical Specification

1.3.7 M2 Module List

1.4 Environmental Specifications

1.5 Board Weight

1.6 MTBF Data

1.7 Related Publications

2 / Installation

2.1 Safety Requirements

2.2 Board Identification

2.3 Board Configuration

2.3.1 Microswitches

2.3.2 SW1 Microswitch Description

2.3.3 SW2 Microswitch Description

2.4 Package Content

2.5 Initial Installation Procedures

2.6 Standard Removal Procedure

2.7 Battery Replacement

2.8 XMC Module Insertion / Removal Instructions

2.9 M.2 Module Insertion / Removal Instructions

2.10 Software Installation

3 / Additional Board Features

3.1 The Backplane Power Supplies and their Monitoring

3.2 RTC, Watchdog, Timers

3.2.1 Real-Time Clock (RTC)

3.2.2 CPLD Watchdog

3.3 Battery and Supercap

3.4 I2C Structure

3.5 CPLD Features

3.5.1 cPLD Registers Definition:

3.5.1.1 Overview

3.5.1.2 Detailed Description

3.6 Serial Lines EIA-422/485 Additional Modes

3.7 GPIOs and GDISCRETE1

3.7.1 GPIOs

3.7.2 GDISCRETE1

3.8 Reset

3.9 Write Protect Mode

3.10 Graphic Option

4 / Physical I/O

4.1 Front Panel Connectors

4.1.1 Serial Connector - COM

4.1.2 Gigabit Ethernet Connector

4.1.3 USB Connector

4.1.4 HDMI Port

4.2 Onboard Connectors

4.2.1 XMC J15 Connector Pin Assignments

4.2.2 XMC J16 Connector Pin Assignment

4.2.3 J4101 Connector Pin Assignment

4.2.4 P2701/P2801 Connector Pin Assignment

4.3 Rear Connectors

4.3.1 P0 Connector

4.3.2 P1 Connector

4.3.3 P2 Connector

4.4 LEDs

4.4.1 Status LEDs Default Setting

4.4.2 LEDs Activity

5 / Power and Thermal Specifications

5.1 Electrical Specifications

5.1.1 Input Powers Supplies Protection

5.1.2 Output Powers Supplies Protection

5.2 Power Specifications

5.2.1 VX3052 and VX3058 Thermal Power