Kontron CP605 User Manual

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Page 1

CP605

6U CompactPCI

Pentium 4 Based CPU Board

Manual ID: 25095, Rev. Index 07

October 2004

The product described in this manual is in compliance with all applied CE standards.

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Preface CP605

Revision History

Manual/Product Title: CP605

Manual ID Number: 25095

Rev. Index

01 Initial Issue 00 Sept. 2002

02 Addition of Phoenix BIOS chapter 00 March 2003

03 Addition of CP-RIO6-05X chapter 00 April 2003

04 Update of rear I/O chapter, replacement of rear

05 General update 01 Sept. 2003

06 General update 02 May 2004

07 General update 02 Oct 2004

Brief Description of Changes Board Index

01 July 2003

I/O chapters with CP-RIO6-05 chapter

Date of

Issue

Imprint

Kontron Modular Computers GmbH may be contacted via the following:

MAILING ADDRESS TELEPHONE AND E-MAIL

Kontron Modular Computers GmbH +49 (0) 800-SALESKONTRON

Sudetenstraße 7 sales@kontron.com D - 87600 Kaufbeuren Germany

For further information about other Kontron Modular Computers’ products, please visit our Internet web site: www.kontron.com

Copyright

Copyright © 2004 Kontron Modular Computers GmbH. All rights reserved. This manual may not be copied, photocopied, reproduced, translated or converted to any electronic or machinereadable form in whole or in part without prior written approval of Kontron Modular Computers GmbH.

Disclaimer:

Kontron Modular Computers GmbH rejects any liability for the correctness and completeness of this manual as well as its suitability for any particular purpose.

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CP605 Preface

Revision History .........................................................................................................ii

Imprint ........................................................................................................................ii

Copyright ....................................................................................................................ii

Table of Contents ...................................................................................................... iii

List of Tables .............................................................................................................xi

List of Figures ..........................................................................................................xv

Proprietary Note ..................................................................................................... xvii

Trademarks ............................................................................................................ xvii

Explanation of Symbols ........................................................................................ xviii

For Your Safety .......................................................................................................xix

High Voltage Safety Instructions .........................................................................xix

Special Handling and Unpacking Instructions ....................................................xix

General Instructions on Usage ............................................................................xx

Two Year Warranty .................................................................................................. xxi

Chapter

1. Introduction .................................................................................................. 1 - 3

1.1 System Overview .................................................................................... 1 - 3

1.2 Board Overview ....................................................................................... 1 - 4

1.2.1 Board Introduction .......................................................................... 1 - 4

1.2.2 Board-Specific Information ............................................................. 1 - 5

1.3 System Expansion Capabilities ............................................................... 1 - 6

1.3.1 PMC Modules ................................................................................. 1 - 6

1.3.2 CP-RIO6-05 Rear I/O Module ......................................................... 1 - 6

1.4 System Relevant Information .................................................................. 1 - 6

1.5 Board Diagrams ...................................................................................... 1 - 7

1.5.1 Functional Block Diagram ............................................................... 1 - 7

1.5.2 Front Panels ................................................................................... 1 - 8

1.5.3 Board Layout .................................................................................. 1 - 9

1.6 Technical Specifications ........................................................................ 1 - 11

P R E L I M I N A R Y

1.7 Software Support ................................................................................... 1 - 16

1.7.1 Kontron Support ............................................................................ 1 - 16

1.8 Applied Standards ................................................................................. 1 - 17

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Preface CP605

1.9 Related Publications ..............................................................................1 - 18

1.10 Trademarks ............................................................................................1 - 18

Chapter

2. Functional Description .................................................................................2 - 3

2.1 CPU .........................................................................................................2 - 3

2.2 Memory ....................................................................................................2 - 3

2.3 Chipset .....................................................................................................2 - 4

2.3.1 Graphics and Memory Controller Hub (845GV) ..............................2 - 4

2.3.2 I/O Controller Hub ICH4 ..................................................................2 - 5

2.4 Peripherals ...............................................................................................2 - 5

2.4.1 Timers .............................................................................................2 - 5

2.4.2 Watchdog Timer ..............................................................................2 - 6

2.4.3 Battery .............................................................................................2 - 6

2.4.4 Reset ...............................................................................................2 - 6

2.4.5 Local SMBus Devices .....................................................................2 - 6

2.4.6 Thermal Management / System Monitoring ....................................2 - 6

2.4.7 Serial EEPROM ..............................................................................2 - 7

2.4.8 BIOS FLASH (Firmware Hub) .........................................................2 - 7

2.4.9 User FLASH ....................................................................................2 - 7

2.4.10 Dual BIOS .......................................................................................2 - 7

2.4.11 Network Security Processor ............................................................2 - 8

P R E L I M I N A R Y

2.5 Board Interfaces ......................................................................................2 - 8

2.5.1 General Purpose LED Output .........................................................2 - 8

2.5.2 Keyboard/Mouse Interface ..............................................................2 - 8

2.5.3 USB Interfaces ................................................................................2 - 9

2.5.4 Graphics Controller .......................................................................2 - 11

2.5.4.1 Video Memory Usage ........................................................... 2 - 11

2.5.4.2 Video Resolution ...................................................................2 - 11

2.5.4.3 CRT Interface and Connector CON11 ..................................2 - 12

2.5.5 Serial Port Interfaces COM1 and COM2 .......................................2 - 13

2.5.6 Serial Port Interfaces COM3 and COM4 .......................................2 - 13

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CP605 Preface

2.5.7 Parallel I/O Interface ..................................................................... 2 - 14

2.5.8 Floppy Drive Interface ................................................................... 2 - 14

2.5.9 Gigabit Ethernet ............................................................................ 2 - 14

2.5.10 Gigabit Ethernet LED Status ......................................................... 2 - 15

2.5.11 Fast Ethernet ................................................................................ 2 - 16

2.5.12 Fast Ethernet LED Status ............................................................. 2 - 17

2.5.12.1 CompactFlash Socket .......................................................... 2 - 17

2.5.13 EIDE Interfaces ............................................................................. 2 - 19

2.5.13.1 CON12 — ATA 44-Pin Connector ........................................ 2 - 20

2.5.13.2 CON19 — ATA 40-Pin Connector ........................................ 2 - 21

2.5.14 Fan Power Supply (Optional) ........................................................ 2 - 22

2.5.15 Extension Connector CON15 ....................................................... 2 - 23

2.5.16 PMC Interface ............................................................................... 2 - 24

2.5.17 CompactPCI Interface .................................................................. 2 - 26

2.5.17.1 System Master Configuration ............................................... 2 - 26

2.5.17.2 Peripheral Master Configuration (Passive Mode) ................ 2 - 26

2.5.17.3 Packet Switching Backplane (PICMG 2.16) ......................... 2 - 26

2.5.17.4 Hot Swap Support ................................................................ 2 - 26

2.5.17.5 Power Ramping .................................................................... 2 - 26

2.5.17.6 Precharge ............................................................................. 2 - 27

2.5.17.7 Handle Switch ...................................................................... 2 - 27

2.5.17.8 ENUM# Interrupt .................................................................. 2 - 27

2.5.17.9 Blue LED .............................................................................. 2 - 27

2.5.18 CompactPCI Bus Connector ......................................................... 2 - 28

2.5.18.1 CompactPCI Connector Keying ........................................... 2 - 28

2.5.18.2 CompactPCI Rear I/O Connectors J3-J5 (CON3-CON5) ..... 2 - 33

2.5.18.3 Rear I/O Configuration ......................................................... 2 - 38

2.6 Intelligent Platform Management Interface (IPMI) ................................. 2 - 39

P R E L I M I N A R Y

2.6.1 Technical Background of IPMI ...................................................... 2 - 39

2.6.2 IPMI Implementation on the CP605 .............................................. 2 - 40

2.6.3 Measurement of Onboard Voltages .............................................. 2 - 40

2.6.4 Measurement of Temperatures ..................................................... 2 - 40

2.6.5 Fan Control ................................................................................... 2 - 40

2.6.6 Data Repositories ......................................................................... 2 - 40

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Preface CP605

Chapter

3. Installation ....................................................................................................3 - 3

3.1 Safety Requirements ...............................................................................3 - 3

3.2 CP605 Initial Installation Procedures .......................................................3 - 4

3.3 Standard Removal Procedures ................................................................3 - 5

3.4 Hot Swap Procedures ..............................................................................3 - 5

3.4.1 System Master Hot Swap ................................................................3 - 5

3.4.2 Peripheral Hot Swap Procedure ......................................................3 - 6

3.5 Installation of CP605 Peripheral Devices ................................................3 - 7

3.5.1 CompactFlash Installation ...............................................................3 - 7

3.5.2 USB Device Installation ...................................................................3 - 7

3.5.3 Rear I/O Device Installation .............................................................3 - 7

3.5.4 Battery Replacement .......................................................................3 - 8

3.5.5 Hard Disk Installation ......................................................................3 - 8

3.6 Software Installation ................................................................................3 - 9

Chapter

4. Configuration ................................................................................................4 - 3

4.1 Jumper Description ..................................................................................4 - 3

P R E L I M I N A R Y

4.1.1 Processor Configuration ..................................................................4 - 3

4.1.2 CompactFlash Configuration

4.1.3 Dual BIOS Configuration .................................................................4 - 3

4.1.4 Clearing BIOS CMOS Setup ...........................................................4 - 4

4.1.5 Shorting Chassis GND (Shield) to Logic GND ................................4 - 4

4.1.6 VGA CRT Rear I/O Configuration ...................................................4 - 5

4.1.7 PICMG 2.16 Rear I/O Configuration ...............................................4 - 5

4.1.7.1 PIGMG 2.16 Rear I/O Configuration for Port 1 .......................4 - 5

4.1.7.2 PICMG 2.16 Rear I/O Configuration for Port 2 .......................4 - 6

4.1.8 Serial Port Jumper and Resistor Setting .........................................4 - 6

4.1.8.1 COM1 Jumper and Resistor Setting .......................................4 - 6

.................................................................4 - 3

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CP605 Preface

4.1.8.2 COM2 Jumper and Resistor Setting ...................................... 4 - 7

4.1.9 Reserved Jumpers .......................................................................... 4 - 8

4.2 Interrupts ................................................................................................. 4 - 8

4.3 Onboard PCI Interrupt Routing ............................................................... 4 - 9

4.4 Memory Map ........................................................................................... 4 - 9

4.4.1 Memory Map for the 1st Megabyte ................................................. 4 - 9

4.4.2 I/O Address Map ........................................................................... 4 - 10

4.5 Special Registers Description ............................................................... 4 - 11

4.5.1 Watchdog ...................................................................................... 4 - 11

4.5.2 Watchdog Trigger ......................................................................... 4 - 11

4.5.3 Watchdog Timer .......................................................................... 4 - 12

4.5.4 Watchdog, CompactPCI Interrupt Configuration Register ............ 4 - 13

4.5.5 I/O Status 1 Register ..................................................................... 4 - 14

4.5.6 I/O Status 2 Register ............................................................................4 - 15

4.5.7 I/O Configuration Register ............................................................ 4 - 16

4.5.8 Board Version ............................................................................... 4 - 16

4.5.9 Hardware Index ............................................................................ 4 - 17

4.5.10 Logic Version ................................................................................ 4 - 17

4.5.11 LED Control ................................................................................. 4 - 18

Chapter

5. Phoenix BIOS .............................................................................................. 5 - 3

5.1 The Setup Guide ..................................................................................... 5 - 3

5.1.1 Introduction to Setup ....................................................................... 5 - 3

5.1.2 The Main Menu ............................................................................... 5 - 4

5.1.3 The Menu Bar ................................................................................. 5 - 4

P R E L I M I N A R Y

5.1.4 The Legend Bar .............................................................................. 5 - 5

5.1.5 The Field Help Window ................................................................... 5 - 5

5.1.6 The General Help Window .............................................................. 5 - 6

5.1.7 Main Menu Selections .................................................................... 5 - 7

5.1.8 Master and Slave Sub-Menus ........................................................ 5 - 7

5.1.9 Memory Cache ............................................................................. 5 - 11

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5.1.10 Boot Features ................................................................................5 - 13

5.2 The Advanced Menu ..............................................................................5 - 14

5.2.1 Advanced Chipset Control Menu ...................................................5 - 16

5.2.2 Integrated Device Control Sub-Menu ............................................5 - 17

5.2.3 Advanced Processor Options ........................................................5 - 18

5.2.4 I/O Device Configuration Menu .....................................................5 - 19

5.3 The Power Menu ...................................................................................5 - 21

5.4 Boot Menu .............................................................................................5 - 23

5.5 OEM Features Menu .............................................................................5 - 25

5.5.1 PC Health ......................................................................................5 - 27

5.5.2 Watchdog Settings ........................................................................5 - 28

5.5.3 Temperature Management ............................................................5 - 29

5.5.4 Front-Rear I/O ...............................................................................5 - 30

5.5.5 System Info ...................................................................................5 - 31

5.6 The Exit Menu ........................................................................................5 - 32

5.6.1 Saving Values ...............................................................................5 - 33

5.6.2 Exit Discarding Changes ...............................................................5 - 33

5.6.3 Load Setup Defaults ......................................................................5 - 33

5.6.4 Discard Changes ...........................................................................5 - 33

5.6.5 Save Changes ...............................................................................5 - 34

5.7 Phoenix BIOS Messages .......................................................................5 - 34

5.8 Phoenix Phlash16 ..................................................................................5 - 39

5.8.1 Installation .....................................................................................5 - 39

5.8.2 Create the Crisis Recovery Diskette .............................................5 - 39

P R E L I M I N A R Y

5.8.3 Updating the Crisis Recovery Diskette ..........................................5 - 40

5.8.4 Executing Phoenix Phlash16 ........................................................5 - 40

5.8.4.1 Command Line Mode ...........................................................5 - 40

5.8.5 JRC JUMPtec® Remote Control ...................................................5 - 41

Chapter

6. System Considerations ................................................................................6 - 3

6.1 Thermal Management ..............................................................................6 - 3

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CP605 Preface

6.1.1 Passive Thermal Regulation ........................................................... 6 - 3

6.1.1.1 CPU Internal Thermal Supervision ......................................... 6 - 3

6.1.1.2 CPU External Thermal Supervision ....................................... 6 - 4

6.1.1.3 CPU Emergency Thermal Supervision .................................. 6 - 4

6.1.1.4 Thermal Management Recommendations ............................. 6 - 5

6.1.2 Active Thermal Regulation .............................................................. 6 - 5

6.1.2.1 Heat Sinks .............................................................................. 6 - 5

6.1.2.2 Forced Air Flow ...................................................................... 6 - 5

6.1.2.3 Peripherals ............................................................................. 6 - 8

6.2 System Power ......................................................................................... 6 - 8

6.2.1 CP605 Baseboard .......................................................................... 6 - 8

6.2.2 Backplane ....................................................................................... 6 - 9

6.2.3 Power Supply Units ........................................................................ 6 - 9

6.2.3.1 Start-Up Requirement .......................................................... 6 - 10

6.2.3.2 Power-Up Sequence ............................................................ 6 - 10

6.2.3.3 Tolerance .............................................................................. 6 - 10

6.2.3.4 Regulation ............................................................................ 6 - 11

6.2.3.5 Rise Time Diagram .............................................................. 6 - 11

6.3 Power Consumption .............................................................................. 6 - 12

6.3.1 Power Requirement for the CP605 ............................................... 6 - 14

Annex

A. Rear I/O Module CP-RIO6-05 .....................................................................A - 3

A.1 Introduction .............................................................................................A - 3

A.1.1 Dimensions .....................................................................................A - 3

A.2 Front Panels ............................................................................................A - 4

P R E L I M I N A R Y

A.3 Board Layout Variant 1 ............................................................................A - 5

A.4 Board Layout Variant 2 ............................................................................A - 6

A.5 Overview of Module Interfaces ................................................................A - 7

A.5.1 Overview of Module Interfaces and other Features ........................A - 7

A.5.1.1 Front Panel (Width 4HP) Interfaces and Features .................A - 7

A.5.1.2 Internal Interfaces (Accessible via Onboard Connectors) ......A - 7

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Preface CP605

A.6 Detailed Description of Module Interfaces .............................................. A - 7

A.6.1 Keyboard/Mouse Interface ............................................................. A - 7

A.6.1.1 Keyboard/Mouse Connector CON15 Pinout .......................... A - 8

A.6.2 USB Interfaces ............................................................................... A - 8

A.6.2.1 USB Connectors CON21 and CON22 Pinouts ...................... A - 8

A.6.3 VGA-CRT Interface ........................................................................ A - 9

A.6.3.1 VGA Connector CON23 Pinout ............................................. A - 9

A.6.4 Serial Port Interfaces .................................................................... A - 10

A.6.4.1 Serial Port Connectors CON18 and CON17 Pinout ............ A - 10

A.6.4.2 Serial Port Connectors CON14 and CON13 Pinout .............A - 11

A.6.5 Fast Ethernet Interfaces ................................................................A - 11

A.6.5.1 Fast Ethernet Connectors CON25 Pinout ............................ A - 12

A.6.6 Gigabit Ethernet ........................................................................... A - 12

A.6.6.1 RJ45 Connectors CON26 and CON27 Pinout ..................... A - 12

A.6.7 IPMI Interface (Optional) .............................................................. A - 13

A.6.7.1 IPMI Connector CON20 Pinout ............................................ A - 13

A.6.8 Fan Control Interface ................................................................... A - 14

A.6.8.1 Fan Control Connector Pinouts ........................................... A - 14

A.6.9 EIDE Port ..................................................................................... A - 15

A.6.9.1 EIDE Connectors EIDE1 (CON7) ....................................... A - 15

A.6.10 Floppy Drive Interface .................................................................. A - 16

A.6.10.1 Floppy Drive Connector CON11 Pinout ............................... A - 16

A.6.10.2 Floppy Drive “A+B” Configuration ........................................ A - 16

A.6.11 Parallel I/O Interface .................................................................... A - 17

P R E L I M I N A R Y

A.6.12 Speaker Interface ......................................................................... A - 17

A.6.13 CompactPCI Interface .................................................................. A - 18

A.6.13.1 CompactPCI Connectors J3-J5 (CON3-CON5) Pinouts ...... A - 18

A.6.13.2 COM3 Jumper Setting ......................................................... A - 23

A.6.13.3 COM4 Jumper Setting ......................................................... A - 23

A.6.14 Fan Power Supply Voltage Selection ........................................... A - 23

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CP605 Preface

List of Tables

1-1 System Relevant Information ................................................................... 1 - 6

1-2 CP605 4HP Version Main Specifications ............................................... 1 - 11

1-3 Applied Standards ................................................................................. 1 - 17

1-4 Related Publications .............................................................................. 1 - 18

2-1 Supported Intel Processors on the CP605 ............................................... 2 - 3

2-2 Memory Options Utilizing SODIMM Sockets ........................................... 2 - 4

2-3 SMBus Device Addresses ....................................................................... 2 - 6

2-4 EEPROM Address Map ........................................................................... 2 - 7

2-5 Keyboard Connector CON23 Pinout ........................................................ 2 - 9

2-6 USB Connectors CON7 and CON8 Pinouts .......................................... 2 - 10

2-7 USB Connector CON24 Pinout .............................................................. 2 - 10

2-8 Partial List of Display Modes Supported ................................................ 2 - 11

2-9 CRT Connector CON11 Pinout .............................................................. 2 - 12

2-10 Serial Port Connectors CON9 (COM1) and CON10 (COM2) Pinout ..... 2 - 13

2-11 Pinouts of CON6B and CON6C Based on the Implementation ............. 2 - 15

2-12 RJ45 Connector CON6A Pinout ............................................................ 2 - 16

2-13 CompactFlash Connector CON16 Pinout .............................................. 2 - 18

2-14 Pinout of CON12 .................................................................................... 2 - 20

2-15 Pinout of the ATA 40-pin Connector CON19 .......................................... 2 - 21

2-16 Fan Power Supply Connector CON14 Pinout ........................................ 2 - 22

2-17 PMC Connectors CON20 and CON22 Pinouts ...................................... 2 - 25

2-18 Coding Key Colors ................................................................................. 2 - 28

2-19 CompactPCI Bus Connector J1 (CON1) System Slot Pinout ................ 2 - 29

2-20 CompactPCI Bus Connector J1 (CON1) Peripheral Slot Pinout ............ 2 - 30

2-21 64-bit CompactPCI Bus Connector J2 (CON2) System Slot Pinout ...... 2 - 31

2-22 64-bit CompactPCI Bus Connector J2 (CON2) Peripheral Slot Pinout .. 2 - 32

P R E L I M I N A R Y

2-23 Backplane J3 Pinout .............................................................................. 2 - 33

2-24 Backplane J3 Signal Functions .............................................................. 2 - 34

2-25 Backplane J4 Pinout .............................................................................. 2 - 35

2-26 Backplane J5 Pinout .............................................................................. 2 - 36

4-1 Processor Configuration .......................................................................... 4 - 3

4-2 CompactFlash Configuration ................................................................... 4 - 3

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4-3 Dual BIOS Configuration .......................................................................... 4 - 3

4-4 Clearing BIOS CMOS Setup .................................................................... 4 - 4

4-5 Shorting Chassis GND (Shield) to Logic GND ......................................... 4 - 4

4-6 VGA-CRT Jumper Setting ........................................................................ 4 - 5

4-7 PICMG 2.16 Rear I/O Configuration for Port 1 ......................................... 4 - 5

4-8 PICMG 2.16 Rear I/O Configuration for Port 2 ......................................... 4 - 6

4-9 Resistor Setting to Configure COM1 ........................................................ 4 - 6

4-12 Resistor Setting to Configure COM2 ........................................................ 4 - 7

4-13 Jumper Setting for RS-422 RXD Termination (COM2) ............................. 4 - 7

4-14 Jumper Setting for RS-422 TXD and RS-485 Termination (COM2) ......... 4 - 7

4-10 Jumper Setting for RS-422 RXD Termination (COM1) ............................. 4 - 7

4-11 Jumper Setting for RS-422 TXD and RS-485 Termination (COM1) ......... 4 - 7

4-15 Interrupt Setting ........................................................................................ 4 - 8

4-16 PCI Interrupt Routing ................................................................................ 4 - 9

4-17 Memory Map for the 1st Megabyte ........................................................... 4 - 9

4-18 I/O Address Map .................................................................................... 4 - 10

4-19 Watchdog Timer ..................................................................................... 4 - 12

4-20 Watchdog, CompactPCI Interrupt Configuration Register ...................... 4 - 13

4-21 I/O Status 1 Register .............................................................................. 4 - 14

4-22 I/O Status 2 Register ............................................................................. 4 - 15

4-23 I/O Configuration Register ..................................................................... 4 - 16

4-24 Board ID Register .................................................................................. 4 - 16

4-25 Hardware Index Register ....................................................................... 4 - 17

4-26 Logic Version Register .......................................................................... 4 - 17

P R E L I M I N A R Y

4-27 LED Control Register ............................................................................ 4 - 18

5-1 The Menu Bar ........................................................................................... 5 - 4

5-2 The Legend Bar ........................................................................................ 5 - 5

5-3 Main Menu Selections .............................................................................. 5 - 7

5-4 Master/Slave Sub-Menu Options ............................................................. 5 - 9

5-5 Memory Cache Configuration ................................................................. 5 - 12

5-6 Boot Options ........................................................................................... 5 - 13

5-7 Advanced Menu Options ........................................................................ 5 - 15

5-8 Advanced Chipset Control Options ........................................................ 5 - 16

5-9 USB Device 29 Functions ...................................................................... 5 - 17

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CP605 Preface

5-10 Advanced Processor Options ................................................................ 5 - 18

5-11 I/O Device Configuration Options .......................................................... 5 - 20

5-12 Power Menu Options ............................................................................. 5 - 22

5-13 OEM Features Options .......................................................................... 5 - 26

5-14 Watchdog Settings Options ................................................................... 5 - 29

5-15 Temperature Management Options ....................................................... 5 - 30

5-16 Front-Rear I/O Options .......................................................................... 5 - 31

5-17 System Info Options ............................................................................... 5 - 32

6-1 Maximum Input Power Voltage Limits ...................................................... 6 - 8

6-2 DC Operational Input Voltage Ranges ..................................................... 6 - 9

6-3 Input Voltage Characteristics ................................................................. 6 - 10

6-4 Power Consumption: DOS ..................................................................... 6 - 12

6-5 Power Consumption: Windows® 2000, IDLE Mode .............................. 6 - 12

6-6 Power Consumption: Windows® 2000, 100% CPU Usage ................... 6 - 13

6-7 Power Consumption: Windows® 2000 High Power Tool ....................... 6 - 13

6-8 Power Consumption Table for CP605 Accessories ............................... 6 - 13

6-9 Start-Up Current of the CP605 ............................................................... 6 - 14

A-1 Keyboard Connector CON15 Pinout ........................................................ A - 8

A-2 USB Connector CON21 and CON22 Pinouts .......................................... A - 8

A-3 VGA Connector CON23 ........................................................................... A - 9

A-4 Functions of the Serial Port Interfaces ................................................... A - 10

A-5 Serial Port Connectors CON18 (COM2) and CON17 (COM4) Pinout ... A - 10

A-6 Serial Port Connectors CON14 (COM1) and CON13 (COM3) Pinout ... A - 11

A-7 Fast Ethernet Connectors CON25 Pinout .............................................. A - 12

A-8 Pinouts of CON26 and CON27 Based on the Implementation .............. A - 12

A-9 IPMI Connector CON20 Pinout .............................................................. A - 13

A-10 Fan Control Connector CON 6 Pinout ................................................... A - 14

A-11 Fan Control Connector CON 9 Pinout ................................................... A - 14

P R E L I M I N A R Y

A-12 Fan Control Connector CON 10 (Optional) Pinout ................................. A - 14

A-13 External Cooling Fan CON24 Pinout ..................................................... A - 14

A-14 Pinout of AT Standard Connector EIDE1 (CON7) .................................. A - 15

A-15 Floppy Drive Connector CON11 Pinout ................................................. A - 16

A-16 Parallel I/O Interface Connector CON19 Pinout .................................... A - 17

A-17 Backplane J3 Pin Definitions ................................................................. A - 18

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A-18 Backplane J3 Signal Functions ............................................................. A - 19

A-19 Backplane J4 Pinout .............................................................................. A - 20

A-20 Backplane J5 Pinout .............................................................................. A - 21

A-21 Backplane J5 Signal Functions ............................................................. A - 22

A-22 COM3: RS232 ON/OFF ........................................................................ A - 23

A-23 COM4: RS232 ON/OFF ........................................................................ A - 23

A-24 Fan Power Supply Voltage Setting ........................................................ A - 23

P R E L I M I N A R Y

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List of Figures

1-1 CP605 Functional Block Diagram ............................................................ 1 - 7

1-2 CP605 4HP Front Panels ......................................................................... 1 - 8

1-3 CP605 Board Layout (Front View) ........................................................... 1 - 9

1-4 CP605 Board Layout (Reverse View) .................................................... 1 - 10

2-1 Keyboard Connector CON23 .................................................................. 2 - 9

2-2 USB Connectors CON7, CON8 and CON24 ......................................... 2 - 10

2-3 D-Sub CRT Connector CON11 .............................................................. 2 - 12

2-4 Serial Connectors CON9 (COM1) and CON10 (COM2) ........................ 2 - 13

2-5 Gigabit Ethernet Connectors CON6B and CON6C ................................ 2 - 14

2-6 Fast Ethernet Connector CON6A .......................................................... 2 - 16

2-7 CompactFlash Socket Connector CON16 ............................................. 2 - 17

2-8 EIDE Interface Connectors CON12 and CON19 ................................... 2 - 19

2-9 Fan Power Supply Connector CON14 ................................................... 2 - 22

2-10 Extension Connector CON15 ................................................................. 2 - 23

2-11 PMC Connectors CON20, 21 and 22 ..................................................... 2 - 24

2-12 CompactPCI Connectors J1-J5 (CON1-CON5) ..................................... 2 - 28

2-13 IPMI Functional Block Diagram .............................................................. 2 - 40

5-1 Main Menu — Screen Display ................................................................. 5 - 4

5-2 General Help Window — Screen Display ............................................... 5 - 6

5-3 Master/Slave Sub-Menu — Screen Display ............................................. 5 - 8

5-4 Memory Cache — Screen Display ......................................................... 5 - 11

5-5 Boot Features — Screen Display ........................................................... 5 - 13

5-6 Advanced Menu — Screen Display ....................................................... 5 - 14

5-7 Advanced Chipset Control — Screen Display ...................................... 5 - 16

5-8 Integrated Device Control Sub-Menu — Screen Display ...................... 5 - 17

5-9 Advanced Processor Options — Screen Display .................................. 5 - 18

P R E L I M I N A R Y

5-10 I/O Device Configuration Menu — Screen Display ................................ 5 - 19

5-11 Power Menu — Screen Display ............................................................. 5 - 21

5-12 Boot Menu — Screen Display ................................................................ 5 - 23

5-13 OEM Features Menu — Screen Display ................................................ 5 - 25

5-14 PC Health — Screen Display ................................................................. 5 - 27

5-15 Watchdog Settings — Screen Display .................................................. 5 - 28

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Preface CP605

5-16 Temperature Management — Screen Display ...................................... 5 - 29

5-17 Front-Rear I/O — Screen Display ......................................................... 5 - 30

5-18 System Info — Screen Display .............................................................. 5 - 31

5-19 Exit Menu — Screen Display .................................................................. 5 - 32

6-1 Mobile Pentium 4-M Temperature Vs. Airspeed Graph ............................ 6 - 6

6-2 Desktop Pentium 4 Temperature Vs. Airspeed Graph ............................. 6 - 7

6-3 Start-Up Ramp of the CP3-SVE180 AC Power Supply .......................... 6 - 11

A-1 CP-RIO6-05 Front Panels ....................................................................... A - 4

A-2 CP-RIO6-05 Module Board Layout with 1 Ethernet Port ......................... A - 5

A-3 CP-RIO6-05 Module Board Layout with 3 Ethernet Ports ....................... A - 6

A-4 Keyboard/Mouse Connector .................................................................... A - 7

A-5 USB Connectors CON21 and CON22 ..................................................... A - 8

A-6 D-sub VGA-CRT Connector CON23 ....................................................... A - 9

A-7 Serial Connectors CON13 and CON14 ................................................. A - 10

A-8 Ethernet/Fast Ethernet Connectors ........................................................ A - 11

P R E L I M I N A R Y

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CP605 Preface

Proprietary Note

This document contains information proprietary to Kontron Modular Computers GmbH. It may not be copied or transmitted by any means, disclosed to others, or stored in any retrieval system or media without the prior written consent of Kontron Modular Computers GmbH or one of its authorized agents.

The information contained in this document is, to the best of our knowledge, entirely correct. However, Kontron Modular Computers GmbH cannot accept liability for any inaccuracies or the consequences thereof, or for any liability arising from the use or application of any circuit, product, or example shown in this document.

Kontron Modular Computers GmbH reserves the right to change, modify, or improve this document or the product described herein, as seen fit by Kontron Modular Computers GmbH without further notice.

Trademarks

Kontron Modular Computers GmbH, the PEP logo and, if occurring in this manual, “CXM” are trademarks owned by Kontron Modular Computers GmbH, Kaufbeuren (Germany). In addition, this document may include names, company logos and trademarks, which are registered trademarks and, therefore, proprietary to their respective owners.

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Preface CP605

Explanation of Symbols

CE Conformity

This symbol indicates that the product described in this manual is in compliance with all applied CE standards. Please refer also to the section “Applied Standards” in this manual.

Caution, Electric Shock!

This symbol and title warn of hazards due to electrical shocks (> 60V) when touching products or parts of them. Failure to observe the precautions indicated and/or prescribed by the law may endanger your life/health and/or result in damage to your material.

Please refer also to the section “High Voltage Safety Instructions” on the following page.

Warning, ESD Sensitive Device!

This symbol and title inform that electronic boards and their components are sensitive to static electricity. Therefore, care must be taken during all handling operations and inspections of this product, in order to ensure product integrity at all times.

Please read also the section “Special Handling and Unpacking Instructions” on the following page.

Warning!

This symbol and title emphasize points which, if not fully understood and taken into consideration by the reader, may endanger your health and/or result in damage to your material.

Note ...

This symbol and title emphasize aspects the reader should read through carefully for his or her own advantage.

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CP605 Preface

For Your Safety

Your new Kontron product was developed and tested carefully to provide all features necessary to ensure its compliance with electrical safety requirements. It was also designed for a long fault-free life. However, the life expectancy of your product can be drastically reduced by improper treatment during unpacking and installation. Therefore, in the interest of your own safety and of the correct operation of your new Kontron product, you are requested to conform with the following guidelines.

High Voltage Safety Instructions

Warning!

All operations on this device must be carried out by sufficiently skilled personnel only.

Caution, Electric Shock!

Before installing your new Kontron product into a system always ensure that your mains power is switched off. This applies also to the installation of piggybacks.

Serious electrical shock hazards can exist during all installation, repair and maintenance operations with this product. Therefore, always unplug the power cable and any other cables which provide external voltages before performing work.

Special Handling and Unpacking Instructions

ESD Sensitive Device!

Electronic boards and their components are sensitive to static electricity. Therefore, care must be taken during all handling operations and inspections of this product, in order to ensure product integrity at all times.

• Do not handle this product out of its protective enclosure while it is not used for operational purposes unless it is otherwise protected.

• Whenever possible, unpack or pack this product only at EOS/ESD safe work stations. Where a safe work station is not guaranteed, it is important for the user to be electrically discharged before touching the product with his/her hands or tools. This is most easily done by touching a metal part of your system housing.

• It is particularly important to observe standard anti-static precautions when changing piggybacks, ROM devices, jumper settings etc. If the product contains batteries for RTC or memory backup, ensure that the board is not placed on conductive surfaces, including anti-static plastics or sponges. They can cause short circuits and damage the batteries or conductive circuits on the board.

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Preface CP605

General Instructions on Usage

• In order to maintain Kontron’s product warranty, this product must not be altered or modified in any way. Changes or modifications to the device, which are not explicitly approved by Kontron Modular Computers GmbH and described in this manual or received from Kontron’s Technical Support as a special handling instruction, will void your warranty.

• This device should only be installed in or connected to systems that fulfill all necessary technical and specific environmental requirements. This applies also to the operational temperature range of the specific board version, which must not be exceeded. If batteries are present, their temperature restrictions must be taken into account.

• In performing all necessary installation and application operations, please follow only the instructions supplied by the present manual.

• Keep all the original packaging material for future storage or warranty shipments. If it is necessary to store or ship the board, please re-pack it as nearly as possible in the manner in which it was delivered.

• Special care is necessary when handling or unpacking the product. Please consult the special handling and unpacking instruction on the previous page of this manual.

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CP605 Preface

Two Year Warranty

Kontron Modular Computers GmbH grants the original purchaser of Kontron’s products a TWO

YEAR

LIMITED HARDWARE WARRANTY as described in the following. However, no other warran-

ties that may be granted or implied by anyone on behalf of Kontron are valid unless the consumer has the express written consent of Kontron Modular Computers GmbH.

Kontron Modular Computers GmbH warrants their own products, excluding software, to be free from manufacturing and material defects for a period of 24 consecutive months from the date of purchase. This warranty is not transferable nor extendible to cover any other users or long-term storage of the product. It does not cover products which have been modified, altered or repaired by any other party than Kontron Modular Computers GmbH or their authorized agents. Furthermore, any product which has been, or is suspected of being damaged as a result of negligence, improper use, incorrect handling, servicing or maintenance, or which has been damaged as a result of excessive current/voltage or temperature, or which has had its serial number(s), any other markings or parts thereof altered, defaced or removed will also be excluded from this warranty.

If the customer’s eligibility for warranty has not been voided, in the event of any claim, he may return the product at the earliest possible convenience to the original place of purchase, together with a copy of the original document of purchase, a full description of the application the product is used on and a description of the defect. Pack the product in such a way as to ensure safe transportation (see our safety instructions).

Kontron provides for repair or replacement of any part, assembly or sub-assembly at their own discretion, or to refund the original cost of purchase, if appropriate. In the event of repair, refunding or replacement of any part, the ownership of the removed or replaced parts reverts to Kontron Modular Computers GmbH, and the remaining part of the original guarantee, or any new guarantee to cover the repaired or replaced items, will be transferred to cover the new or repaired items. Any extensions to the original guarantee are considered gestures of goodwill, and will be defined in the “Repair Report” issued by Kontron with the repaired or replaced item.

Kontron Modular Computers GmbH will not accept liability for any further claims resulting directly or indirectly from any warranty claim, other than the above specified repair, replacement or refunding. In particular, all claims for damage to any system or process in which the product was employed, or any loss incurred as a result of the product not functioning at any given time, are excluded. The extent of Kontron Modular Computers GmbH liability to the customer shall not exceed the original purchase price of the item for which the claim exists.

Kontron Modular Computers GmbH issues no warranty or representation, either explicit or implicit, with respect to its products’ reliability, fitness, quality, marketability or ability to fulfil any particular application or purpose. As a result, the products are sold “as is,” and the responsibility to ensure their suitability for any given task remains that of the purchaser. In no event will Kontron be liable for direct, indirect or consequential damages resulting from the use of our hardware or software products, or documentation, even if Kontron were advised of the possibility of such claims prior to the purchase of the product or during any period since the date of its purchase.

Please remember that no Kontron Modular Computers GmbH employee, dealer or agent is authorized to make any modification or addition to the above specified terms, either verbally or in any other form, written or electronically transmitted, without the company’s consent.

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Preface CP605

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CP605 Introduction

Chapter

Introduction

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Introduction CP605

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CP605 Introduction

1. Introduction

1.1 System Overview

The CompactPCI board described in this manual operates with the PCI bus architecture to support additional I/O and memory-mapped devices as required by various industrial applications. For detailed information concerning the CompactPCI standard, please consult the complete Peripheral Component Interconnect (PCI) and CompactPCI Specifications. For further information regarding these standards and their use, visit the home page of the PCI

Industrial Computer Manufacturers Group (PICMG).

Many system-relevant CompactPCI features that are specific to Kontron Modular Computers CompactPCI systems may be found described in the Kontron CompactPCI System Manual. Due to its size, this manual cannot be downloaded via the internet. Please refer to the section “Related Publications” at the end of this chapter for the relevant ordering information.

The CompactPCI System Manual includes the following information:

• Common information that is applicable to all system components, such as safety information, warranty conditions, standard connector pinouts etc.

• All the information necessary to combine Kontron’s racks, boards, backplanes, power supply units and peripheral devices in a customized CompactPCI system, as well as configuration examples.

• Data on rack dimensions and configurations as well as information on mechanical and electrical rack characteristics.

• Information on the distinctive features of Kontron CompactPCI boards, such as functionality, hot swap capability. In addition, an overview is given for all existing Kontron CompactPCI boards with links to the relating data sheets.

• Generic information on the Kontron CompactPCI backplanes, such as the slot assignment, PCB form factor, distinctive features, clocks, power supply connectors and signalling environment, as well as an overview of the Kontron CompactPCI standard backplane family.

• Generic information on the Kontron CompactPCI power supply units, such as the input/output characteristics, redundant operation and distinctive features, as well as an overview of the Kontron CompactPCI standard power supply unit family.

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Introduction CP605

1.2 Board Overview

1.2.1 Board Introduction

The CP605 is an advanced 64-bit / 33 MHz CompactPCI system controller board. It has been

designed to support the latest Intel

Pentium 4

•

Pentium® processors:

• Mobile Pentium

4 Processor-M

Both processors have a 512 KB L2 cache whereby the Pentium 4 comes in the FCPGA2 package (Desktop version) and the Mobile Pentium

4 Processor-M in the µFCPGA package (Mobile

version).

The Pentium

4 Processor-M version has the advantage of very low power consumption, whilst

at the same time providing impressive processor speeds ranging from 1.2 GHz through

2.2 GHz with a PSB running at 400 MHz. The desktop Pentium

4 processor version offers very high processor speeds ranging from 2 GHz through 2.4 GHz with a PSB running at 400 MHz and 533 MHz. The CP605 utilizes the Intel 845GV and ICH4 I/O Controller Hub (ICH4) chipset.

The board includes up to 1 GB of soldered Double Data Rate (DDR) memory. In addition, there is one SODIMM socket (200-pin) available to add up to 1 GB of DDR memory whereby the maximum memory configuration is 2 GB. The memory is operated either at 200 or 266 MHz.

System features include two Gigabit Ethernet ports, one Fast Ethernet port (82559-style), one PMC slot to support further PCI devices, and one optional Network Security processor. The board also includes a built-in Intel 2D/3D Graphics accelerator with up to 64 MB memory for enhanced graphics performance with a VGA CRT-display interface.

The CP605 comes with the following PC interfaces including: five USB 2.0 ports, four COM ports, two EIDE ATA100 interfaces, one CompactFlash socket, one Floppy port, one parallel I/O interface, and the rear I/O CompactPCI bus connectors J3, J4, and J5. In addition, there is an optional Intelligent Platform Management Interface (IPMI) available.

The board supports one configurable 64-bit, 33 MHz, hot swap CompactPCI interface. In the System Master slot the bridge is enabled, and if installed in a peripheral slot, the CP605 is isolated from the CompactPCI bus.

One of the more important features of the CP605 is its support of the PICMG CompactPCI Packet Switching Backplane Specification 2.16. When installed in a backplane which supports packet switching, the CP605 can communicate via both of its Gigabit Ethernet interfaces with other boards which also support packet switching.

Designed for stability, the board fits into all applications situated in industrial environments making it a perfect core technology for long life applications.

The components which make up the CP605 have been carefully selected from embedded technology programs to ensure long-term availability.

The board is compatible with the Microsoft

Windows® 2000, Windows® XP and Windows® XP

Embedded operating systems. However, the performance of CompactPCI can be tailored to

suit real-time applications and operating systems such as Linux

, or VxWorks® which are in-

strumental to the success of CompactPCI in these market sectors.

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CP605 Introduction

1.2.2 Board-Specific Information

The CP605 is a CompactPCI Pentium 4 processor based single-board computer specifically designed for use in highly integrated platforms with solid mechanical interfacing for a wide range of industrial environment applications.

Some of the CP605's outstanding features are:

• Intel microprocessors up to 2.4 GHz available:

•

Pentium 4 Processor up to 2.4 GHz

• Mobile Pentium

• FC-PGA2 and µFCPGA packages respectively

• Up to 512 kB L2 cache on-die running at CPU speed

• 82845GV GMCH and 82801 ICH4 chipset

• 400 MHz and 533 MHz processor system bus

• Up to 2 GB of DDR SDRAM memory running at 200 or 266 MHz

• PCI local bus: 32-bit / 33 MHz

• CompactPCI bus interface: 64-bit / 33 MHz

• Integrated 3D high performance VGA controller

• Analog display support up to 2048 x 1536 pixels at 16 bits and 60 Hz

• Two Gigabit Ethernet interfaces

• 10Base-T, 100Base-TX, and 1000Base-T

• Configurable for front panel or rear I/O / CPCI backplane packet switching (PICMG

2.16, R1.0) interfacing

•

One integrated, configurable Fast Ethernet interface (82559-style), 10Base-T, 100Base-TX

•

PMC interface (32-bit, 5 V signal voltage) with rear I/O support and bezel cutout on front panel

• Two EIDE Ultra ATA/100 interfaces

• Onboard CompactFlash type II socket

• Optional socket for 2.5" hard disk or Flash Disk instead of the PMC interface

• Four serial ports

• Five USB 2.0 ports

• PS/2 keyboard and mouse interface

• Floppy disk interface

• Parallel I/O interface

• Hardware monitor (LM81 and MAX1617)

• Watchdog timer

• Real-time clock

• Two, 1 MB onboard FWHs (1 MB for BIOS and 1 MB for OS)

• I/O extension connector with Low Pin Count interface (LPC)

• 4HP, 6U CompactPCI

• Hot swap capability: as system controller or as peripheral device

• Supports PICMG Packet Switching Backplane Specification

• Rear I/O on J3 and J5; optionally on J4

• IPMI compliant Baseboard Management Controller (optional)

• Network security processor (optional)

• Passive heat sink solution

• Phoenix BIOS

4 Processor-M up to 2.2 GHz or higher*

* subject to availability from Intel

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Introduction CP605

1.3 System Expansion Capabilities

1.3.1 PMC Modules

The CP605 has one, 32-bit, 33 MHz, 5 V signal voltage, rear I/O capable, PMC mezzanine interface. This interface supports a wide range of available PMC modules including all of Kontron’s PMC modules and provides an easy and flexible way to configure the CP605 for various application requirements.

1.3.2 CP-RIO6-05 Rear I/O Module

The CP-RIO6-05 rear I/O module has been designed for use with the CP605 6U CompactPCI board from Kontron Modular Computers. This module provides comprehensive rear I/O functionality and may also be configured for use in other applications.

For further information concerning the CP-RIO6-05 module please refer to Appendix A.

1.4 System Relevant Information

The following system relevant information is general in nature but should still be considered when developing applications using the CP605.

Table 1-1: System Relevant Information

SUBJECT INFORMATION

System Slot / System Master Functionality

Peripheral Slot Functionality When installed in a peripheral slot, the CP605 is electrically isolated for the

Hot Swap Compatibility When operated as a System Master, the CP605 supports individual clocks for

Operating Systems The CP605 can be operated under the following operating systems:

The CP605 is designed to for use as a System Master board whereby it can support up to 7 peripheral boards with 64-bit and 33 MHz.

It may, however, be operated in a peripheral slot in which case it does not support the CompactPCI bus interface.

CompactPCI bus. It receives power from the backplane and supports rear I/O and, if the system supports it, packet switching (in this case up to two channels of Gigabit Ethernet).

each slot and ENUM signal handling is in compliance with the PICMG 2.1 Hot Swap Specification.

When operated in a peripheral slot the CP605 supports basic hot swap.

•Microsoft

• Linux

• VxWorks Please contact Kontron Modular Computers for further information concerning other operating systems.

Windows® 2000

Windows® XP

Windows® XP Embedded

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CP605 Introduction

1.5 Board Diagrams

The following diagrams provide additional information concerning board functionality and component layout.

1.5.1 Functional Block Diagram

Figure 1-1: CP605 Functional Block Diagram

* option al

PC266 DDR

up to 1 GB

soldered

VGA CRT*

* or COM2,

9-pin D-sub Con.

200/266 MHz

Graphic Memory

Controller

Hub

GMCH

845G

PSB 400/533 MHz

Intel®

Pentium 4

(-M)

PC266 DDR

up to 1 GB

SODIMM

Tem p.

Monitor

Reset Clock

Power

Supply

PCI 32-bit

Network *

Security

Processor

Local PMC

32-bit/33 MHz

Gigabit

Ethernet

Gigabit

Ethernet

PCI Bridge

21154

64-bit/33 MHz

SRAM

PMC

Breakout

Ethernet

RJ45

Ethernet

RJ45

Switch

CPCI

J1/J2 CPCI

PMC Rear COM1/2/4 VGA CRT Ethernet 1/2 USB5

IMPI Cont. Parallel Port GPIO

EIDE (sec.) Floppy COM3 USB4 KB/Mouse PICMG 2.16

CPCI 64-bit/33 MHz IPMB Hotswap

Hub Interface

RTC

Serial

EEPROM

EIDE

40-pin

Secondary

CompactFlash

Primary

type I/II

Super

I/O

FDC

Ethernet

RJ45

I/O

Ext.

9-pin D-sub Con.*

15-pin D-sub Con.

ICH4

FWH FW H

BIOS Flash

1 MB

USB 2.0

4-pin

USB 2.0

4-pin

USB 2.0

4-pin

Flash

1 MB

PHY

LPC

IPMI

Contr.

Keyboard

NOTE: Population of the VGA CRT connector or the COM2

port connector is dependent on application requirements.

PLD

Logic

COM2

* or VGA CRT

Onboard ConnectorsBus ConnectorsFront Panel ConnectorsCPU

UART

ISA

16C2850

COM1

9-pin D-sub Con.

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Introduction CP605

1.5.2 Front Panels

Figure 1-2:CP605 4HP Front Panels

Legend:

Left CP605: 4HP VGA version

Right CP605: 4HP COM version

General Purpose (GP) LEDs

WD/GP (green): Watchdog or General Purpose,

when lit during bootup, it indicates that PCI reset is active.

TH/GP (green): Overtemperature Status or

General Purpose, when lit during bootup, it indicates a power failure.

HS (blue): Hot Swap Control

Integrated Fast Ethernet LEDs

ACT (green): Ethernet Link/Activity

SPEED (green): Ethernet Speed: on = 100 MBit

Integrated Gigabit Ethernet LEDs

ACT (green): Ethernet Link/Activity

SPEED (green): Ethernet Speed: on = 1000 MBit

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CP605 Introduction

1.5.3 Board Layout

Figure 1-3: CP605 Board Layout (Front View)

CON24

CON15

CompactFlash

CON18

CON17

CON23

Jn1

Jn2

CON10/

CON11

CON9

GP LEDs

CON8

CON7

CON14 (Optional)

FEC

CON16

DDR-SDRAM

IC14 SODIMM SOCKET

GMCH

voltage key

Battery

ICH4

5 V

signal

Jn4

63 64

3940

CON6A

CON6B

CON6C

HS LED

& RST

Mag.

CON13

GBit

Eth

GBit

Eth

CPU

Bridge

Power Supply

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PCI

Page 32

Introduction CP605

Figure 1-4: CP605 Board Layout (Reverse View)

C107

FLASH

R128

R115

R140

R536 R535

DDR SDRAM

R310 R303R324

R167

R168

R72

C103

R137

R149

R108

R126

R134

R146

R155 R124

R173

R177 R96

R172

R164

R145R154

R153

R171

R170 R163

R152

R143

R142

R176

C175

R133 R131

R130

C114

R107

R95

R106

R123

R122

R105

R92

R91

R103

R121

C104

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CP605 Introduction

1.6 Technical Specifications

Table 1-2: CP605 4HP Version Main Specifications

CP605 SPECIFICATIONS

CPU The CP605 supports one or the other of the following Intel processor types:

Pentium 4 Processor

• Up to 2.4 GHz

• 512 kB L2 on-die cache

• 400 and 533 MHz PSB

• 478-pin FC-PGA2 package

Mobile Pentium 4 Processor-M

• Up to 2.2 or higher GHz

• 512 kB L2 on-die cache

• 400 and 533 MHz PSB

• Supports SpeedStep

• 478-pin µFCPGA package

II for low power mode

Memory Main memory:

• Up to 1 GB soldered DDR SDRAM memory

• Up to 1 GB of additional memory capacity via a 200-pin SODIMM socket

PROCESSOR AND MEMORY

Intel 845GV Chipset 82845GV Graphics Memory Controller Hub (GMCH):

CHIPSET

• Memory frequency: 200 MHz or 266 MHz

Flash memory:

• Two Firmware Hub Flash memory

• 1 MB FWH for BIOS

• 1 MB FWH extension for OS or user

EEPROM:

• Two 256 byte EEPROMs for storing CMOS data when operating without battery

• Two 256 byte EEPROM's for user purposes

• Support for a single Pentium 4 microprocessor

• 64-bit AGTL/AGTL+ based System Bus interface at 400 MHz and 533 MHz

• 64-bit System Memory interface with optimized support for DDR SDRAM memory at 200 MHz or 266 MHz

• Integrated 2D and 3D Graphics Engines with 200 MHz core frequency

• Integrated H/W Motion Compensation Engine

• Integrated 350 MHz DAC

• Integrated Digital Video Out Port

• AGP 1X/2X/4X Controller

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Introduction CP605

Table 1-2: CP605 4HP Version Main Specifications (cont’d)

CP605 SPECIFICATIONS

Intel 845GV Chipset 82801DB I/O Controller Hub (ICH4)

• PCI Rev. 2.2 compliant with support for 32-bit/33 MHz PCI operations

• Power management logic support

• Enhanced DMA controller, interrupt controller, and timer functions

• Integrated IDE controller Ultra ATA/100/66/33

• USB 2.0 host interface with up to five USB ports available on the CP605

• One integrated LAN controller (82559 style)

CHIPSET (cont’d)

CompactPCI Bus Interface

• System Management Bus (SMBus) compatible with most I²C

• Low Pin Count (LPC) interface

• Firmware Hub (FWH) interface support

Compliant with CompactPCI Specification PICMG

• System Master operation

• 64-bit / 33 MHz master interface

• 3.3V / 5.0V compatible (default configuration is 5.0V)

• When the CP605 is operated in a peripheral slot, the CPCI bus is electrically isolated from the CP605.

2.0 R3.0

devices

Serial COM1 and COM2:

• Dual UART, 16C550 compatible

• RS-232, RS-422, or RS-485 configurable

• COM1, 9-pin, D-sub connector on the front panel

• Optionally COM2, 9-pin, D-sub connector on the front panel

Either the COM2 connector is populated or the VGA CRT-display connector, depends on application requirements.

COM3 and COM4:

• 16C550 compatible UARTs

• Rear I/O interfacing only

EXTERNAL INTERFACES

Parallel

USB Interface Five USB 2.0 ports supporting UHCI and EHCI:

• TTL level signals

Multi-Mode

• Standard Mode IBM PC/XT, PC/AT, and PS/2 compatible bidirectional

• TTL level signals

• Rear I/O interfacing only

• Two USB type connectors on the front panel

• Two rear I/O interfaces

• One onboard port connector

™

Parallel I/O Interface

parallel I/O interface

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CP605 Introduction

Table 1-2: CP605 4HP Version Main Specifications (cont’d)

CP605 SPECIFICATIONS

Gigabit Ethernet Two 10/100/1000 MB/s Gigabit Ethernet interfaces based on the Intel 82540EM

(Kenai-32) Ethernet PCI bus controller.

• Two RJ45 connectors on the front panel

• Support for two Gigabit Ethernet channels on packet switching backplane (PICMG

• Any given channel may only be operated at one or the other of the above interfacing points

• Automatic mode recognition

• Automatic cabling configuration recognition

Cabling requirement: Category 5, UTP, four-pair cabling

Fast Ethernet One 10Base-T/100Base-TX Fast Ethernet port integrated within the ICH4

EXTERNAL INTERFACES

controller (82559-style):

• One RJ45 connector on the front panel

• Support for one channel of rear I/O interfacing

• May only be operated at one or the other of the above interfacing points

• Automatic mode recognition

Cabling requirement: Category 5, UTP, two-pair cabling.

2.16, R1.0 compliant)

VGA Interface Built-in Intel 3D Graphics accelerator for enhanced graphics performance.

• Supports resolutions of up to 2048 x 1536 by 16 bit at 60 Hz refresh rate

• Hardware motion compensation for software MPEG2 and MPEG4 decoding

• Flexible allocation of video memory up to 64 MB

• 15-pin D-sub VGA CRT-display connector with analog video signals

Keyboard and Mouse Super I/O support for a keyboard and a mouse:

• Rear I/O interfacing for both keyboard and mouse

• Separate onboard keyboard connector (5-pin), requires adaptor to connect regular keyboard

Mass Storage EIDE Ultra ATA/100/66/33

• Two interfaces

• Up to four devices (hard disks or CD-ROMs)

INTERNAL INTERFACES

• 40-pin, 2.54 mm, male pin row connector (standard)

• Optional 44-pin, 2.0 mm, male pin row connector for mounting a 2.5" disk drive onboard.

CompactFlash:

• CompactFlash type II socket (true IDE mode)

• Supports type I and II CompactFlash cards and Microdrive

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Introduction CP605

Table 1-2: CP605 4HP Version Main Specifications (cont’d)

CP605 SPECIFICATIONS

Mass Storage Floppy Disk:

• Rear I/O interfacing only

• Supports 5.25 or 3.5 inch floppy drives

• 1.44 or 2.88 MB, 3.5 inch floppy disks

LPC I/O extension interface:

• 22-pin, female, pin row connector

• Supports up to two LPC devices

• Designed to support custom, fixed mounted, mezzanine boards

PMC CMC / PMC P1386 / Draft 2.4a compliant mezzanine interface:

• Jn1, Jn2, and Jn4 PCI mezzanine connectors for standard PMC modules

• 32-bit / 33 MHz master interface

• 5.0 V signal voltage (3.3 V on request)

• Rear I/O supported through CompactPCI connector J5

Encryption Optional network security processor:

• 7951 Network Security Processor from HIFN

• High performance data encryption / compression / authentication processor

INTERNAL INTERFACES

Rear I/O To optimize cabling rear I/O is available via the J3, J5, and, optionally, J4 con-

LEDs System status:

• PCI interface

• local SRAM (128 kB) memory

nectors in conjunction with the rear I/O transition module CP-RIO6-05.

• J3: floppy, COM3, keyboard, mouse, USB4, and either one EIDE port or PICMG 2.16 support.

• J5: VGA-CRT, two Ethernet channels without LEDs, USB5, COM1, COM2, COM4, control signals, PMC rear I/O connectivity

• J4: parallel I/O interface, GPIO, IPMI fan control signals

Note: If the CP605 is to be used with a H.110 CompactPCI backplane,

connector J4 must not be populated.

• TH/GP: green: overtemperature status or general purpose, when remains

lit during bootup, it indicates a power failure.

• WD/GP: green: Watchdog or general purpose, when remains lit during

bootup, it indicates that PCI reset is active.

• HS: blue: Hot swap control

Gigabit Ethernet status (1 and 2):

• ACT: green: network activity

• SPEED: green: network speed

MONITOR AND CONROL

Fast Ethernet status:

• ACT: green: network activity

• SPEED: green: network speed

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CP605 Introduction

Table 1-2: CP605 4HP Version Main Specifications (cont’d)

CP605 SPECIFICATIONS

Switches Reset switch (RST):

• Initiates cold restart of CP605

• Recessed to prevent accidental activation

Hot swap switch:

• When activated initiates local interrupt

• Interrupt handling is a function of the CP605 application software

• Integrated as part of the lower ejector handle

Watchdog Software configurable Watchdog generates IRQ, NMI, or hardware reset.

Thermal Management CPU over temperature protection is provided by:

• Internal processor temperature control unit

• CPU shut down via hardware monitor

• Custom designed heat sinks

System Monitor LM81 hardware monitor for supervision of:

• System power voltages: +12V, -12V, +5V, +3.3V, and VCORE

• RTC battery voltage

• Up to two fan speed inputs

CPU Temperature Monitor

MONITOR AND CONTROL

IPMI Optional IPMI compliant Qlogic Zircon Lite Baseboard Management Controller

Hot Swap Compatible The CP605 supports System Master hot swap functionality and application

MAX 1617 hardware monitor for supervision of:

• On-die CPU temperature

• CPU surrounding board temperature

(BMC) for supervision of:

• System power voltages: +12V, -12V, +5V, +3.3V, +2.5V, VCORE, VIO

• CPU surrounding board temperature

• Up to four fan speed inputs

• Up to two fan speed control outputs

• Supports IPMI compliant interfacing via the rear I/O connectors: J1, J3, and J4

dependent hot swap functionality when used in a peripheral slot.

When used as a System Master the CP605 supports individual clocks for each slot and ENUM signal handling is in compliance with the PICMG 2.1 Hot Swap Specification.

Mechanical 6U, 4HP, CompactPCI compliant form factor

Power Consumption See Chapter 5 for details

Temperature Range Operational: 0°C to +60°C Standard (only with designated CPU types)

-25°C to +75°C E1 (optional; only with designated CPU types)

GENERAL

Climatic Humidity 93% RH at 40 °C, non-condensing (acc. to IEC60068-2-78)

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Storage: -55°C to +85°C Without hard disk

-40°C to +65°C With hard disk

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Introduction CP605

Table 1-2: CP605 4HP Version Main Specifications (cont’d)

CP605 SPECIFICATIONS

Dimensions 233.35 mm x 160 mm

Board Weight 546 g (4HP variants with heat sink and without mezzanine boards)

Battery 3.0V lithium battery for RTC with battery socket. Recommended types:

GENERAL

Software BIOS Phoenix BIOS with 1 MB of Flash memory and having the following features:

SOFTWARE

• VARTA CR2025

• PANASONIC BR2020

• QuickBoot

• QuietBoot

• BootBlock

• MultiBoot III

• LAN boot capability for diskless systems

• Boot from USB floppy

• BIOS boot support for USB keyboards

• Software enable/disable function for the rear I/O, Ethernet, and COM port configuration

• Plug & Play capability

• BIOS parameters are saved in the EEPROM

• Board serial number is saved within the EEPROM

• PC Health Monitoring

Operating System Operating systems supported:

•Microsoft

• Linux

• VxWorks

Please contact Kontron Modular Computers for further information concerning other operating systems.

Windows® 2000

Windows® XP

Windows® XP Embedded

1.7 Software Support

As a real-time operating system, VxWorks is supported. The standard PC features supported

by the BIOS also allow for PC operating systems such as Microsoft

dows

XP and Windows® XP Embedded and Linux.

1.7.1 Kontron Support

Kontron is one of the few CompactPCI and VME vendors providing inhouse support for most of the industry-proven real-time operating systems that are currently available. Due to its close relationship with the software manufacturers, Kontron is able to produce and support BSPs and drivers for the latest operating system revisions thereby taking advantage of the changes in technology.

Finally, customers possessing a maintenance agreement with Kontron can be guaranteed hotline software support and are supplied with regular software updates. A dedicated web site is also provided for online updates and release downloads.

Windows® 2000, Win-

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CP605 Introduction

1.8 Applied Standards

The Kontron Modular Computers’ CompactPCI systems comply with the requirements of the following standards:

Table 1-3: Applied Standards

COMPLIANCE TYPE STANDARD

CE Emission EN50081-1, EN55022 --

Immission EN61000-6-2, EN55024 --

Electrical Safety EN60950 --

Mechanical Mechanical Dimensions IEEE 1101.10 --

Environmental

Aspects

Vibration (Sinusoidal) IEC60068-2-6 2g/12-300Hz/10

Permanent Shock IEC60068-2-29 15g/11ms/500/1s

Single Shock IEC60068-2-27 30g/9ms/18/5s

TEST LEVEL

(Ruggedized Version)

acceleration / frequency range / test cycles per axis

peak acceleration / shock duration half sine / number of shocks / recovery time

peak acceleration / shock duration / number of shocks / recovery time in seconds

Climatic Humidity IEC60068-2-78 --

Note ...

The values in the above table are valid for boards which are ordered with the ruggedized service. For more information please contact your local Kontron office.

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Introduction CP605

1.9 Related Publications

The following publications contain information relating to this product.

Table 1-4: Related Publications

PRODUCT PUBLICATION

CompactPCI Systems and Boards

PMC Add-on Modules and Carriers

CompactFlash Cards CF+ and CompactFlash Specification Revision 1.4

CompactPCI Specification 2.0, Rev. 3.0

CompactPCI Packet Switching Backplane Specification PICMG 2.16 Rev. 2.0

CompactPCI System Management Specification PICMG 2.9 Rev. 1.0

CompactPCI Hot Swap Specification PICMG 2.1 Rev. 2.0

Kontron Modular Computers’ CompactPCI System Manual, ID 19954

Draft standard for Common Mezzanine Card Family: P1386, Draft 2.4a

Draft standard for Physical and Environment Layers for PCI Mezzanine Cards: P1386.1, Draft 2.4

1.10 Trademarks

• CompactPCI is a trademark of the PCI industrial Computers Manufacturers Group

• Ethernet is a registered trademark of Xerox Corporation

• IEEE is a registered trademark of the Institute of Electrical and Electronics Engineers Inc.

• VxWorks is a registered trademark of WindRiver Systems Inc.

• Intel is a trademark of Intel Corporation

• Pentium 4 and Pentium 4 Processor-M are trademarks of Intel Corporation

• Microsoft is a trademark of the Microsoft Corporation

• Other trademarks are the property of their respective owners

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CP605 Functional Description

Chapter

Functional Description

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CP605 Functional Description

2. Functional Description

2.1 CPU

The CP605 board is based on the latest Intel Pentium 4 and Mobile Pentium 4 Processor-M in the FCPGA2 (Desktop version) and uFCPGA (Mobile version) packages.

The Intel Mobile Pentium 4 Processor-M supports the enhanced Intel SpeedStep® technology, which enables real-time dynamic switching of the voltage and frequency between two modes, the "Maximum Performance Mode" or the "Battery Optimized Mode". This occurs by switching the bus ratios, core operating voltage, and core processor speeds without resetting the system. The frequency for the Pentium 4-M processor can be selected in the BIOS.

Key performance features of the Intel Pentium 4 Processor include 512 kB on-die L2 Cache and Intel NetBurst™ Micro-Architecture, consisting of a 400 MHz and 533 MHz processor system bus, Hyper Pipelined Technology, new Execution Trace Cache, Rapid Execution Engine, and 144 new Streaming SIMD instruction extensions.

The CP605 is available with a variety of Intel processors as indicated in the following table.

Table 2-1: Supported Intel Processors on the CP605

PROCESSOR PACKAGE SPEED L2 CACHE

Pentium 4 FCPGA2 2 GHz 512 kB 1.5 V 400 MHz

Pentium 4 FCPGA2 2.4 GHz 512 kB 1.5 V 533 MHz

Pentium 4-M uFCPGA 1.2 / 1.7 GHz 512 kB 1.2 V / 1.3 V 400 MHz

Pentium 4-M uFCPGA 1.2 / 2.2 GHz 512 kB 1.2 V / 1.3 V 400 MHz

Plus future Intel Pentium 4 and Mobile Pentium 4 Processor-M microprocessors

Note ...

Use only the processors listed above. Use of unsupported processors can damage the board, the processor, and the power supply.

CORE

VOLTAGE

PROCESSOR

SIDE BUS

2.2 Memory

The CP605 has two locations for installing memory; up to 1 GB may be soldered and a further 1 GB may be added by means of the onboard DDR SODIMM socket. The board supports a maximum of 2 GB. All installed memory will be automatically detected, so there is no need to set any jumpers. The CP605 supports all PC200 and PC266 compliant DDR SDRAMs on 200-pin SODIMMs offered by Kontron Modular Computers. All memory components and SODIMMs used with this board must comply with the following PC DDR SDRAM memory specifications:

• PC DDR SDRAM Memory Specification PC200 and PC266

• PC Serial Presence Detect Specification

Only qualified DDR SDRAMs from Kontron Modular Computers can be used with the CP605.

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Functional Description CP605

Table 2-2: Memory Options Utilizing SODIMM Sockets

ONBOARD SODIMM TOTAL

512 MB * -- 512 MB

512 MB * 512 MB 1 GB

1 GB -- 1 GB

1 GB 1 GB 2 GB

Note ...

The memory options marked with a * are the standard product configuration.

It is recommended to use only DDR memory.

Note ...

When the CP605 is ordered for the extended temperature range E1 (-25 °C to + 75°C), SODIMM DDR SDRAM modules are not supported due to their being unavailable for this temperature range.

2.3 Chipset

The Intel 845GV chipset consists of the following devices:

• 82845GV Graphics and Memory Controller Hub (GMCH) with Accelerated Hub Architecture (AHA) bus

• 82801 I/O Controller Hub 4 (ICH4) with AHA bus

• Firmware Hub (FWH)

The GMCH provides the processor interface for the Pentium 4 microprocessor, the memory bus, the AGP 4x bus in the case of an external graphics controller, and includes a high performance graphics accelerator. The ICH4 is a centralized controller for the boards' I/O peripherals, such as the PCI, USB 2.0, EIDE, LAN and AUDIO ports. The Firmware Hub (FWH) provides the non-volatile storage of the BIOS.

2.3.1 Graphics and Memory Controller Hub (845GV)

The 845GV Graphics Memory Controller Hub (GMCH) is a highly integrated hub that provides the CPU interface, the DDR SDRAM system memory interface, a hub link interface to the ICH4 and an AGP interface for an external VGA controller or high performance internal graphics.

Host Interface

The 845GV is optimized for the Intel Pentium 4 microprocessors. The chipset supports a Processor Side Bus (PSB) frequency of 400 MHz and 533 MHz with AGTL+ signaling. Single ended AGTL termination is supported for single processor configurations. It supports 32 bit host addressing for decoding up to 4 GB memory address space.

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CP605 Functional Description

System Memory Interface

The 845GV integrates a system memory DDR SDRAM controller with a 64 bit wide interface without ECC. The chipset supports PC200 and PC266 Double Data Rate (DDR) SDRAM for system memory.

845GV Graphics Controller

The 845GV includes a highly integrated graphics accelerator and H/W Motion Compensation engines for software MPEG2 decoding, delivering high performance 2D and 3D video capabilities. The internal graphics controller provides interfaces to a standard CRT display. These interfaces are only active when running in internal graphics mode.

2.3.2 I/O Controller Hub ICH4

The ICH4 is a highly integrated multifunctional I/O Controller Hub that provides the interface to the PCI Bus and integrates many of the functions needed in today's PC platforms, for example, Ultra DMA 100/66/33 controller, USB host controller supporting USB 2.0, LPC interface, FWH Flash BIOS interface controller, LAN interface and an AC'97 digital controller. The ICH4 communicates with the host controller over a dedicated hub interface.

I/O Controller Hub Feature set comprises:

• PCI 2.2 interface with eight IRQ inputs

• Bus Master EIDE controller UltraDMA 100/66/33

• Three USB controllers with up to six USB 1.1 or USB 2.0 ports

• Hub interface with 845GV

•FWH interface

• LPC interface

• AC 97 2.1 interface

• Integrated LAN controller, 82559 style

• RTC controller

• Multimedia timer (additional timer)

2.4 Peripherals

The following standard peripherals are available on the CP605 board:

2.4.1 Timers

The CP605 is equipped with the following timers:

• Real-Time Clock

The ICH4 contains a MC146818A-compatible real-time clock with 256 bytes of battery-backed RAM.

The real-time clock performs timekeeping functions and includes 256 bytes of general purpose battery-backed CMOS RAM. Features include an alarm function, programmable periodic interrupt and a 100-year calendar. All battery-backed CMOS RAM data remains stored in an additional EEPROM. This prevents data loss.

• Counter/Timer

Three 8254-style counter/timers are included on the CP605 as defined for the PC/AT.

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Functional Description CP605

2.4.2 Watchdog Timer

The CP605 employs a watchdog timer, which forces either an IRQ5, NMI, or Reset condition (configurable in the watchdog register). The watchdog time can be programmed in 12 steps ranging from 125 msec up to 256 seconds. If the watchdog timer is enabled, it cannot be stopped.

2.4.3 Battery

The CP605 utilizes a 3.0V “coin cell” lithium battery for the RTC.

2.4.4 Reset

The CP605 is automatically cold reset by a precision voltage monitoring circuit that detects a drop in voltage below the acceptable operating limit of 4.725 V for the 5 V line and below 3.0 V for the 3.3 V line, or in the event of a power failure of the DC/DC converter. Other reset sources include the watchdog timer and the local push-button switch. The CP605 responds to any of these sources by initializing local peripherals.

A reset will be generated by the following conditions:

• +5 V supply falls below +4.75 V

• +3.3 V supply falls below +3.0 V

• Power failure of the DC/DC converter for the processor

• Push button "RESET" pressed

• Watchdog timeout

• CompactPCI backplane PRST input

2.4.5 Local SMBus Devices

The CP605 provides a System Management Bus (SMBus) for access to several system

monitoring and configuration functions. The SMBus consists of a two-wire I

C-bus interface and several serial devices. The following table describes the function and address of every onboard SMBus device.

Table 2-3: SMBus Device Addresses

DEVICE SMBUS ADDRESS

Temperature Sensor MAX1617 0011000Xb

Hardware Monitor LM81 0101100Xb

EEPROM 1010XXXXb

2.4.6 Thermal Management / System Monitoring

The LM81 can be used to monitor several critical hardware parameters of the system, including power supply voltages, fan speeds and temperatures; all of which are very important for the proper operation and stability of a high-end computer system. The LM81 provides an I

C serial

bus interface.

The voltages of the onboard power supply, which are: +12 V, -12 V, +5 V, +3.3 V, VCore, and the battery voltage are supervised. Two fan tachometer outputs can be measured using the LM81’s FAN1 and FAN2 inputs.

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CP605 Functional Description

The integrated MAX1617 temperature sensors monitor the CPU temperature and the ambient temperature around the CPU to make sure that the system is operating at a safe temperature level. If the temperature is too high, the sensors automatically reduce the CPU clock frequency, depending on the mode chosen in the BIOS set.

2.4.7 Serial EEPROM

A serial EEPROM is provided, organized into 4 blocks with 256 bytes per block (24LC08). This EEPROM is connected to the I²C-bus provided by the ICH4.

Table 2-4: EEPROM Address Map

ADDRESS FUNCTION

1010000xb Onboard DDR SDRAM memory

1010001xb SODIMM DDR SDRAM memory

1010010xb Reserved

1010011xb Reserved

1010100xb VxWorks® parameter

1010101xb Free for user purposes

1010110xb Free for user purposes

1010111xb CMOS backup and board serial number

Note ...

It is strongly recommended that users access only the two free EEPROM banks.

2.4.8 BIOS FLASH (Firmware Hub)

For simple BIOS updating a standard onboard 1 MB Firmware Hub device is used.

The FWH stores both the system BIOS and video BIOS. It can be updated as new versions of the BIOS become available. You may easily upgrade your BIOS using the Phoenix Phlash16 utility.

2.4.9 User FLASH

For small flash extensions an additional 1 MB Firmware Hub flash memory is available.

2.4.10 Dual BIOS

Dual BIOS means that there are two chips for the BIOS on the CP605 board (BIOS Flash and the User Flash). One chip is intended to act as a backup in the event that the other one gets corrupted. These chips are soldered on to the board.

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Functional Description CP605

If the primary BIOS is corrupted due to physical damage or a faulty flash upgrade, the solder jumper J6 must be set; the system will switch over to the secondary chip and boot with default settings.

Note ...

The Dual BIOS feature cannot be used if the second Flash chip is used for VxWorks® bootup.

2.4.11 Network Security Processor

The CP605 provides an optional network security processor from the company HIFN.

The HIFN 7951 network security processor is a high performance data encryption processor designed for use in a variety of data communication applications. The device supports several data compression, data encryption and data authentication algorithms.

The HIFN 1791 network processor has a PCI interface and a local SRAM memory.

2.5 Board Interfaces

2.5.1 General Purpose LED Output

The CP605 provides two software programmable GP LEDs. After reset, the default configuration for the two front LEDs is Overtemperature and Watchdog status. Additionally, if the TH LED remains on during bootup, it indicates a power failure, and if the WD LED remains on during bootup, it indicates that PCI reset is active. In this case, please check the power supply. If the power supply appears to be functional and this LED remains on, please contact Kontron Support. The LED's can be configured via two onboard registers. For more information please see Chapter 4.

Note ...

If the overtemperature LED flashes on and off at regular intervals it indicates that the processor junction temperature has reached a level beyond which permanent silicon damage may occur. Upon assertion of Thermtrip, the processor will shut off its internal clocks (thus halting program execution) in an attempt to reduce the processor junction temperature.

Once activated, Thermtrip remains latched until a cold restart of the CP605 is undertaken (all power off and then on again).

2.5.2 Keyboard/Mouse Interface

The onboard keyboard controller is 8042 software compatible.

The keyboard and mouse port is routed to the CompactPCI rear I/O interface. There is no front I/O connector available. To connect a keyboard a connector is available. The mouse port is

only available on the CompactPCI rear I/O interface.

The CP605 has a 5-pin male pinrow connector for the keyboard interface.

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CP605 Functional Description

Figure 2-1: Keyboard Connector CON23

CON23

The following table indicates the pinout for the keyboard connector CON23.

Table 2-5: Keyboard Connector CON23 Pinout

PIN NAME FUNCTION IN/OUT

1 KDATA Keyboard data IN/OUT

2-- -- --

3 GND Ground --

4 VCC VCC signal --

5 KCLK Keyboard clock OUT

2.5.3 USB Interfaces

The CP605 supports five USB 2.0 ports (two front I/O, one onboard interface and two on the rear I/O). All five ports are high-speed, full-speed, and low-speed capable. High-speed USB 2.0 allows data transfers of up to 480 Mb/s - 40 times faster than a full-speed USB (USB 1.1).

One USB peripheral may be connected to each port. To connect more than five USB devices an external hub is required.

The USB power supply is protected by a self-resettable 500 mA fuse on each channel (CON7/CON8). Short circuit current 0.9 A per channel.

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Functional Description CP605

Figure 2-2:USB Connectors CON7, CON8 and CON24

CON24

CON8

3412

CON7

The following table indicates the pinout for the USB Connectors CON7 and CON8 (External Connection) and CON24 (Internal Connection).

Table 2-6: USB Connectors CON7 and CON8 Pinouts

PIN SIGNAL FUNCTION IN/OUT

1 VCC VCC signal --

2 UV0- Differential USB- IN/OUT

3 UV0+ Differential USB+ IN/OUT

4 GND GND signal --

Table 2-7: USB Connector CON24 Pinout

PIN SIGNAL FUNCTION IN/OUT

1 VCC VCC signal --

2 UV0- Differential USB- IN/OUT

3 UV0+ Differential USB+ IN/OUT

4 GND GND signal --

Note ...

There is no current limitation circuit for the USB power on CON24. The power line is directly connected to VCC (5V).

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CP605 Functional Description

2.5.4 Graphics Controller

The 845GV chipset includes a highly integrated graphics accelerator delivering high performance 2D and 3D video capabilities. The internal graphics controller provides interfaces to a standard progressive scan monitor.

Integrated 2D/3D Graphics:

• 3D Setup and Render Engine

• High Quality Texture Engine

• 3D Graphics Rasterization Enhancements

• Full 2D hardware acceleration

• Intel 845GV D.V.M. Technology graphics core

Intelligent Memory Management

• Integrated 350 MHz DAC

• Resolution up to 1920x1080 at 85 Hz and 2048x1536 at 60 Hz.

2.5.4.1 Video Memory Usage

The 845GV chipset supports the new Dynamic Video Memory Technology (DVMT). This new technology ensures the most efficient use of all available memory for maximum 3D graphics performance. DVMT dynamically responds to application requirements allocating display and texturing memory resources as required.

The operating system requires up to 1 MB of system memory to support legacy VGA. System properties will display up to 1 MB less than physical system memory available to the operating system.

The graphics driver for the Intel 845GV configuration will request up to 64 MB of memory from the OS. By reallocating memory to the system, memory is freed up for other applications when not needed by the graphics subsystem. Thus, efficient memory usage is ensured for optimal graphics and system memory performance.

2.5.4.2 Video Resolution

The 845GV has an integrated 350 MHz RAMDAC that can directly drive a progressive scan analog monitor up to a resolution of 1920x1080 at 85 Hz and 2048x1536 at 60 Hz.

Table 2-8: Partial List of Display Modes Supported

COLOR RESOLUTION AT FREQUENCY

RESOLUTION

8-BIT 16-BIT 24-BIT

640x480 60, 75, 85,120 60, 75, 85,120 60, 75, 85,120

800x600 60, 75, 85,120 60, 75, 85,120 60, 75, 85,120

1024x768 60, 75, 85,120 60, 75, 85,120 60, 75, 85,100

1280x1024 60, 75, 85,120 60, 75, 85,120 60, 75, 85,100

1600x1200 60, 75, 85,100 60, 75, 85,100 60, 75, 85

1920 x 1440 60, 75 60, 75 --

2048 x 1536 60 60 --

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Functional Description CP605

2.5.4.3 CRT Interface and Connector CON11

Version of board with VGA-CRT interface

Figure 2-3: D-Sub CRT Connector CON11

CON11

The 15-pin female connector CON11 is used to connect a CRT monitor to the CP605 board.

Table 2-9: CRT Connector CON11 Pinout

PIN SIGNAL FUNCTION IN/OUT

1 Red Red video signal output Out

2 Green Green video signal output Out

3 Blue Blue video signal output Out

13 Hsync Horizontal sync. TTL out

14 Vsync Vertical sync. TTL out

12 Sdata I²C data In/Out

15 Sclk I²C clock Out

9 VCC Power +5V 200 mA, no fuse protection Out

5,6,7,8,10 GND Signal ground --

4,11 Free -- --

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CP605 Functional Description

2.5.5 Serial Port Interfaces COM1 and COM2

Figure 2-4: Serial Connectors CON9 (COM1) and CON10 (COM2)

Two PC-compatible serial 9-pin D-sub ports are available, which are fully compatible with the 16550 controller and include a complete set of handshaking and modem control signals, maskable interrupt generation and data transfer of up to 460.8 kB/s.

Serial Ports COM1 and COM2 can be enabled/disabled under SW control. Selection can be made inside the BIOS or via the rear I/O configura-

tion register. The standard software configuration is front I/O.

The two COM interfaces may be configured as either RS-232, RS-422 or RS-485 ports by setting the appropriate solder jumpers. The standard setting of the two COM ports envisages the RS-232 configuration.

RS-422 configuration:

The RS-422 interface uses two differential data lines RX and TX for communication (Full-Duplex)

RS-485 configuration:

The RS-485 interface uses one differential data line. It differs from the RS-422 mode in that it provides the ability to transmit and receive over the same wire. The RTS signal is used to enable the RS-485 transmitter.

The following table indicates the pinout of the Serial Port Connectors CON9 (COM1) and CON10 (COM2). The pinout of the 9-pin D-sub connectors depends on the configuration.

Table 2-10: Serial Port Connectors CON9 (COM1) and CON10 (COM2) Pinout

1 DCD +RXD NC

RS-232

(Standard PC)

RS-422 RS-485

2 RXD NC NC

3 TXD +TXD +TRXD

4 DTR NC NC

5 GND GND GND

6 DSR -RXD NC

7 RTS NC NC

8CTS-TXD-TRXD

9 RIN NC NC

2.5.6 Serial Port Interfaces COM3 and COM4

Additionally, two PC-compatible serial ports with TTL signal level are available. These two COM ports, which are fully compatible with the 16550 controller, include a complete set of handshaking and modem control signals, maskable interrupt generation and data transfer. The COM3 and COM4 ports are only available on the CompactPCI rear I/O interface.

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Functional Description CP605

2.5.7 Parallel I/O Interface

The CP605 is provided with an IEEE1284, ECP/EPP-compatible parallel I/O interface. The parallel I/O interface is only available on the CompactPCI rear I/O.

2.5.8 Floppy Drive Interface

The onboard floppy disk controller supports either 5.25 inch or 3.5 inch (1.44 or 2.88 MB) floppy disks. The floppy disk port is only available on the CompactPCI rear I/O interface.

2.5.9 Gigabit Ethernet

The CP605 board includes two 10Base-T/100Base-TX/1000Base-T Ethernet ports based on the Intel 82540EM Gigabit Ethernet PCI Bus Controller. The Intel 82540EM Gigabit Ethernet Controller architecture is optimized to deliver high performance with the lowest power consumption. The controller's architecture includes independent transmit and receive queues to limit PCI bus traffic, and a PCI interface that maximizes the use of bursts for efficient bus usage.

The Boot from LAN feature is supported. For details please refer to Chapter 5.

Figure 2-5: Gigabit Ethernet Connectors CON6B and CON6C

CON6A

CON6B

CON6C

The Ethernet connectors are realized as RJ45 connectors. The interfaces provide automatic detection and switching between 10Base-T, 100Base-TX and 1000Base-T data transmission. Auto-wire switching for crossed cables is supported. The two Ethernet channels may be configured via solder jumpers for the rear I/O PICMG 2.16 configuration or front I/O.

Note ...

If the Ethernet channel is configured for PICMG 2.16, the front panel Gigabit connector will have no functionality.

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CP605 Functional Description

The CON6B and CON6C connectors supply the 10Base-T, 100Base-TX and 1000Base-T interfaces to the Ethernet controller. The following table indicates the pinout of these connectors.

Table 2-11: Pinouts of CON6B and CON6C Based on the Implementation

MDI / STANDARD ETHERNET CABLE

10BASE-T 100BASE-TX 1000BASE-T 10BASE-T 100BASE-TX 1000BASE-T

MDIX / CROSSED ETHERNET CABLE

I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL

O TX+ O TX+ I/O BI_DA+ 1 I RX+ I RX+ I/O BI_DB+

O TX- O TX- I/O BI_DA- 2 I RX- I RX- I/O BI_DB-

I RX+ I RX+ I/O BI_DB+ 3 O TX+ O TX+ I/O BI_DA+

----I/OBI_DC+4----I/OBI_DD+

----I/OBI_DC-5----I/OBI_DD-

I RX- I RX- I/O BI_DB- 6 O TX- O TX- I/O BI_DA-

----I/OBI_DD+7----I/OBI_DC+

----I/OBI_DD-8----I/OBI_DC-

2.5.10 Gigabit Ethernet LED Status

Green: ACT: This LED monitors network connection and activity. The LED lights up when network packets are sent or received through the RJ45 port. When this LED is not lit it means that either the computer is not sending or receiving network data or that the cable connection is faulty.

Green: SPEED: This LED lights up to indicate a successful 1000Base-T connection. When not lit the connection is operating at 100Base-TX or 10Base-T.

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Functional Description CP605

2.5.11 Fast Ethernet

The CP605 board includes one 10Base-T/100Base-TX Ethernet port integrated within the ICH4 chipset (82559 style).

The Boot from LAN feature is supported; for details please refer to section 5.5, BIOS Features Setup, in chapter 5, CMOS Setup.

Figure 2-6: Fast Ethernet Connector CON6A

CON6A

CON6B

CON6C

The Ethernet connector is realized as an RJ45 connector. The interface provides automatic detection and switching between 10Base-T and 100Base-TX data transmission. The Ethernet channel may be configured via the BIOS setting or the rear I/O Configuration Register for front I/O or rear I/O. The standard software configuration is front I/O.

The CON6A connector supplies the 10Base-T/100Base-TX interfaces to the Ethernet controller. The following table indicates the pinout of the RJ45 Connector CON6A.

Table 2-12: RJ45 Connector CON6A Pinout

PIN SIGNAL FUNCTION IN/OUT

1 TX+ Transmit + Out

2 TX- Transmit - Out

3 RX+ Receive + In

4NC -- --

5NC -- --

6 RX- Receive - In

7NC -- --

8NC -- --

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CP605 Functional Description

2.5.12 Fast Ethernet LED Status

Green: SPEED: This LED lights up to indicate a successful 100Base-TX connection. When not lit the connection is operating at 10Base-T.

2.5.12.1 CompactFlash Socket

To enable flexible flash extension a CompactFlash (CF) type II socket, CON16, is available.

CF is a very small removable mass storage device. It provides true IDE functionality compatible with the 16 bit ATA/ATAPI-4 interface. CF cards are also available for data storage using the Microdrive hard disk.

The primary EIDE port is connected to the onboard CompactFlash socket.

The board supports both CF types (type I and type II). CompactFlash is available in both CF type I and CF type II cards. The Microdrive is a CF type II card.

Figure 2-7: CompactFlash Socket Connector CON16

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Functional Description CP605

Note ...

The CompactFlash can be configured for Master/Slave operating mode.

The CompactFlash can be configured for 5V/3.3V supply voltage; R266 closed for 5V, R274 closed for 3.3V.

Table 2-13: CompactFlash Connector CON16 Pinout

I/O FUNCTION SIGNAL PIN PIN SIGNAL FUNCTION I/O

-- Ground signal GND 1 2 D03 Data 3 I/O

I/O Data 4 D04 3 4 D05 Data 5 I/O

I/O Data 6 D06 5 6 D07 Data 7 I/O

O Chip select 0 IDE_CS0 7 8 GND (A10) -- --

-- -- GND (ATASEL) 9 10 GND (A09) -- --

-- -- GND (A08) 11 12 GND (A07) -- --

-- 5 V power 5 V 13 14 GND (A06) -- --

-- -- GND (A05) 15 16 GND (A04) -- --

-- -- GND (A03) 17 18 A02 Address 2 O

O Address 1 A01 19 20 A00 Address 0 O

I/O Data 0 D00 21 22 D01 Data 1 I/O

I/O Data 2 D02 23 24 NC (IOCS16) -- --

-- -- NC (CD2) 25 26 NC (CD1) -- --

I/O Data 11 D11 27 28 D12 Data 12 I/O

I/O Data 13 D13 29 30 D14 Data 14 I/O

I/O Data 15 D15 31 32 IDE_CS1 Chip select 1 O

-- -- NC (VS1) 33 34 DIOR I/O read O

O I/O write DIOW 35 36 5 V (WE) 5 V power --

I Interrupt INTRQ 37 38 5 V 5 V power --

O Master/Slave

O Reset Reset 41 42 IORDY I/O ready I

CSEL (GND pull-up)

39 40 NC (VS2) -- --

O Acknowledge INPACK 43 44 5 V (REG) 5 V power --

-- -- NC (ACTIVE) 45 46 NC (PDIAG) -- --

I/O Data 08 D08 47 48 D09 Data 09 I/O

I/O Data 10 D10 49 50 GND -- --

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CP605 Functional Description

2.5.13 EIDE Interfaces

The EIDE interface supports the following modes:

• Programmed I/O (PIO): CPU controls data transfer.

• 8237-style DMA: DMA offloads the CPU, supporting transfer rates of up to 16 MB/sec.

• Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates of up to 33 MB/sec.

• ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.

• ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH4 ATA-100 logic can achieve read transfer rates of up to 100 MB/sec and write transfer rates up to 88 MB/sec.

Figure 2-8: EIDE Interface Connectors CON12 and CON19

CON12

CON19

There are two independent EIDE ports available. The primary port is connected to the optional 44-pin, 2-row male connector, CON12, and to the onboard CompactFlash socket, CON16. The secondary EIDE interface is a 40-pin, 2-row male connector, CON19, AT standard interface for an EIDE hard disk. The secondary port is also connected to the CompactPCI rear I/O interface.

If CON19 is connected to an EIDE device, it is not allowed to connect an EIDE device to the REAR I/O connector CON7 at the same time, and vice versa, if an EIDE device is connected to the REAR I/O connector CON7, CON 19 must not be connected to an EIDE device.

Each EIDE interface provides support for two devices (one master and one slave) and the two EIDE interfaces together, therefore, support a maximum of 4 devices. All hard disks can be used in cylinder head sector (CHS) mode with the BIOS also supporting the logical block addressing (LBA48) mode. LBA48 supports hard disks with a capacity greater than 137 GB.

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Functional Description CP605

Note ...

ATA-66 and ATA-100 are faster timings and require a specialized cable which has additional grounding wires to reduce reflections, noise, and inductive coupling. This cable will also support all legacy IDE drives.

The blue end of the ATA-100 cable must be connected to the motherboard, the gray connector to the UltraDMA/100 slave device and the black connector to the UltraDMA/100 master device.

2.5.13.1 CON12 — ATA 44-Pin Connector

A 2.5” hard disk or Flash disk may be mounted directly onto the CP605 board using the optional 44-pin connector CON12.

Table 2-14: Pinout of CON12

I/O FUNCTION SIGNAL PIN PIN SIGNAL FUNCTION I/O

O Reset HD IDERESET 1 2 GND Ground signal --

I/O HD data 7 HD7 3 4 HD8 HD data 8 I/O

I/O HD data 6 HD6 5 6 HD9 HD data 9 I/O

I/O HD data 5 HD5 7 8 HD10 HD data 10 I/O

I/O HD data 4 HD4 9 10 HD11 HD data 11 I/O

I/O HD data 3 HD3 11 12 HD12 HD data 12 I/O

I/O HD data 2 HD2 13 14 HD13 HD data 13 I/O

I/O HD data 1 HD1 15 16 HD14 HD data 14 I/O

I/O HD data 0 HD0 17 18 HD15 HD data 15 I/O

-- Ground signal GND 19 20 N/C -- --

I DMA request IDEDRQ 21 22 GND Ground signal --

O I/O write IOW 23 24 GND Ground signal --

O I/O read IOR 25 26 GND Ground signal --

I I/O channel

ready

O DMA Ack IDEDACKA 29 30 GND Ground signal --

I Interrupt request IDEIRQ 31 32 N/C -- --

O Address 1 A1 33 34 ATA66 Detect ATA66 I

IOCHRDY 27 28 GND Ground signal --

O Address 0 A0 35 36 A2 Address 2 O

O HD select 0 HCS0 37 38 HCS1 HD select 1 O

I LED driving LED 39 40 GND Ground signal --

-- 5V power VCC 41 42 VCC 5V power --

-- Ground signal GND 43 44 N/C -- --

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CP605 Functional Description

2.5.13.2 CON19 — ATA 40-Pin Connector

The following table sets out the pinout of the CON19 connector, giving the corresponding signal names. The maximum length of cable that may be used is 35 cm.

Table 2-15: Pinout of the ATA 40-pin Connector CON19

I/O FUNCTION SIGNAL PIN PIN SIGNAL FUNCTION I/O

O Reset HD IDERESET 1 2 GND Ground signal --

I/O HD data 7 HD7 3 4 HD8 HD data 8 I/O

I/O HD data 6 HD6 5 6 HD9 HD data 9 I/O

I/O HD data 5 HD5 7 8 HD10 HD data 10 I/O

I/O HD data 4 HD4 9 10 HD11 HD data 11 I/O

I/O HD data 3 HD3 11 12 HD12 HD data 12 I/O

I/O HD data 2 HD2 13 14 HD13 HD data 13 I/O

I/O HD data 1 HD1 15 16 HD14 HD data 14 I/O

I/O HD data 0 HD0 17 18 HD15 HD data 15 I/O

-- Ground signal GND 19 20 N/C -- --

I DMA request IDEDRQ 21 22 GND Ground signal --

O I/O write IOW 23 24 GND Ground signal --

O I/O read IOR 25 26 GND Ground signal --

I I/O channel

ready

O DMA Ack IDEDACKA 29 30 GND Ground signal --

I Interrupt request IDEIRQ 31 32 N/C -- --

O Address 1 A1 33 34 ATA66 Detect ATA66 I

O Address 0 A0 35 36 A2 Address 2 O

O HD select 0 HCS0 37 38 HCS1 HD select 1 O

I LED driving LED 39 40 GND Ground signal --

IOCHRDY 27 28 GND Ground signal --

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Functional Description CP605

2.5.14 Fan Power Supply (Optional)

A fan for CPU cooling may be connected via the optional power connector CON14.

Figure 2-9: Fan Power Supply Connector CON14

CON14

The following table indicates the pinout of the fan power supply connector CON14.

Table 2-16: Fan Power Supply Connector CON14 Pinout

PIN SIGNAL FUNCTION IN/OUT

1 GND Signal Ground --

2 +12V Power --

3 Sense input Sense input In

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CP605 Functional Description

2.5.15 Extension Connector CON15

The I/O extension connector provides cost-effective, flexible configuration options. To provide flexible configuration of additional low speed PC devices, e.g. Super I/O, IPMI or CAN controller, the LPC port is connected to the I/O extension connector. The I/O extension interface contains all the signals necessary to connect up to two LPC devices.

Figure 2-10: Extension Connector CON15

CON15

22 2

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Functional Description CP605

2.5.16 PMC Interface

Figure 2-11: PMC Connectors CON20, 21 and 22

CON20 CON22

Jn1

5 V

signal

voltage key

Jn2

64 2

CON21

Jn4

63 64

For flexible and easy configuration one onboard PMC socket is available. The Jn1 and Jn2 connectors provide the signals for the 32-bit PCI Bus. The 64-bit interface for the PMC interface is not implemented. User defined I/O signals are supported (Jn4) and are connected to the CompactPCI rear I/O connector J5.

This interface has been designed to comply with the IEEEP1386.1 specification which defines a PCI electrical interface for the CMC (Common Mezzanine Card) form factor. The CP605 provides a 5V PMC PCI signaling environment.

Note ...

The PMC rear I/O signals from CON21 are routed to CompactPCI connector J5, whose pinout is described later in this chapter.

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CP605 Functional Description

The following table indicates the pinout of the PMC connectors CON20 and CON22.

Table 2-17: PMC Connectors CON20 and CON22 Pinouts

Jn1 (CON20) Jn2 (CON22)

1 Signal -12V 2 1 +12V Signal 2

3 Ground Signal 4 3 Signal Signal 4

5 Signal Signal 6 5 Signal Ground 6

7 BUSMODE1# +5V 8 7 Ground Signal 8

9 Signal Signal 10 9 Signal Signal 10

11 Ground Signal 12 11 BUSMODE2# +3.3V 12

13 Signal Ground 14 13 Signal BUSMODE3# 14

15 Ground Signal 16 15 +3.3V BUSMODE4# 16

17 Signal +5V 18 17 Signal Ground 18

19 V (I/O) Signal 20 19 Signal Signal 20

21 Signal Signal 22 21 Ground Signal 22

23 Signal Ground 24 23 Signal +3.3V 24

25 Ground Signal 26 25 Signal Signal 26

27 Signal Signal 28 27 +3.3V Signal 28

29 Signal +5V 30 29 Signal Ground 30

SIGNAL

NAME

SIGNAL

NAME

PIN PIN

SIGNAL

NAME

SIGNAL

NAME

31 V (I/O) Signal 32 31 Signal Signal 32

33 Signal Ground 34 33 Ground Signal 34

35 Ground Signal 36 35 Signal +3.3V 36

37 Signal +5V 38 37 Ground Signal 38

39 Ground Signal 40 39 Signal Ground 40

41 Signal Signal 42 41 +3.3V Signal 42

43 Signal Ground 44 43 Signal Ground 44

45 V (I/O) Signal 46 45 Signal Signal 46

47 Signal Signal 48 47 Ground Signal 48

49 Signal +5V 50 49 Signal +3.3V 50

51 Ground Signal 52 51 Signal Signal 52

53 Signal Signal 54 53 +3.3V Signal 54

55 Signal Ground 56 55 Signal Ground 56

57 V (I/O) Signal 58 57 Signal Signal 58

59 Signal Signal 60 59 Ground Signal 60

61 Signal +5V 62 61 Signal +3.3V 62

63 Ground Signal 64 63 Ground Signal 64

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Functional Description CP605

2.5.17 CompactPCI Interface

The CP605 supports a flexibly configurable, hot swap CompactPCI interface. In the System Master slot the bridge is in the transparent mode and in the peripheral slot the CompactPCI interface is isolated so that it cannot communicate with the CompactPCI bus. This mode is known as the "passive mode".

2.5.17.1 System Master Configuration

In a system slot, the CP605 can communicate with all other CompactPCI boards through a 64-bit, 33 MHz, transparent, PCI-to-PCI bridge from Intel, the 21154.

The 21154 bridge supports up to seven CompactPCI loads through a passive backplane.

The 21154 is fully compliant with the PCI Local Bus Specification Rev. 2.1. The 64-bit interface interoperates transparently with either 64-bit or 32-bit devices.

2.5.17.2 Peripheral Master Configuration (Passive Mode)

In a peripheral slot, the board receives power but does not communicate on the CompactPCI bus; all CompactPCI signals are isolated.

In this configuration the communication is achieved via the two Gigabit Ethernet ports as defined in the PICMG 2.16 specification. In the passive mode the board may be hot-swapped.

2.5.17.3 Packet Switching Backplane (PICMG 2.16)

The CP605 supports a dual Gigabit Ethernet link port (Node) on the J3 connector in accordance with the CompactPCI Packet Switching Backplane Specification PICMG 2.16, Version

1.0. The two nodes are connected in the chassis via the CompactPCI Packet Switching backplane to the Fabric slots "A" and "B".

The PICMG 2.16 feature can be used in the system slot and in the peripheral slot.

2.5.17.4 Hot Swap Support

To ensure that a board may be removed and replaced in a working bus without disturbing the system it requires the following additional features.

• Power ramping

• Precharge

• Hot swap control and status register bits

• Automatic interrupt generation whenever a board is about to be removed or replaced

• An LED to indicate that the board may be safely removed

2.5.17.5 Power Ramping

On the CP605, a special hot swap controller is used to ramp up the onboard supply voltage. This is done to avoid transients on the +3.3V, +5V, +12V and -12V power supplies from the hot swap system. When the power supply is stable, the hot swap controller generates an onboard reset to put the board into a definite state.

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CP605 Functional Description

2.5.17.6 Precharge

Precharge is provided on the CP605 by a resistor on each signal line (PCI bus), connected to a +1V reference voltage. If the board is configured in the System Master configuration the reference voltage is disabled.

2.5.17.7 Handle Switch

The CP605 can be delivered with or without an IPMI controller. In both cases a microswitch is situated in the extractor handle and routed to CON13 on the board.

If the CP605 does not have an IPMI controller integrated, a local interrupt produced by the onboard logic is generated when the extractor handle is opened. In addition, the status of the microswitch can be read in the I/O Status 2 Register, table 4-23.

If the CP605 does have an IPMI controller integrated, an IPMI event is initiated when the extractor handle is opened or closed. In addition, the status of the microswitch can be read either in the I/O Status 2 Register, table 4-23 or via the IPMI controller.

2.5.17.8 ENUM# Interrupt

The onboard logic generates a low active interrupt signal to indicate that the board is about to be extracted from the system or inserted into the system. This interrupt is only generated in the peripheral master configuration. In System Master configuration the ENUM signal is an input.

2.5.17.9 Blue LED

On the CP605 without IPMI controller, a blue LED can be switched on or off by software. It may be used, for example, to indicate that the shutdown process is finished and the board is ready for extraction. The blue LED may also be used for general purposes. For information concerning switching on and off the blue LED, refer to table 4-28, LED Control Register.

On the CP605 with IPMI controller, the blue LED can be switched on and off only by the IPMI controller. The blue LED cannot be used for general purposes.

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Functional Description CP605

2.5.18 CompactPCI Bus Connector

Figure 2-12: CompactPCI Connectors J1-J5 (CON1-CON5)

The complete CompactPCI connector configuration comprises five connectors named J1 to J5. Their functions are as follows:

• J1/J2: 64-bit CompactPCI interface with PCI bus signals, arbitration, clock and power.

• J3 and J5 has rear I/O interface functionality.

• J4 only has optional rear I/O interface functionality.

The CP605 is designed for a CompactPCI bus architecture. The CompactPCI standard is electrically identical to the PCI local bus. However, these systems are enhanced to operate in rugged industrial environments and to support multiple slots.

2.5.18.1 CompactPCI Connector Keying

CompactPCI connectors support guide lugs to ensure a correct polarized mating. A proper mating is further assured by the use of color coded keys for 3.3V and 5V operation.

Color coded keys prevent inadvertent installation of a 5V peripheral board into a 3.3V slot. The CP605 board is a 5V version. Backplane connectors are always keyed according to the signaling (VIO) level. Coding key colors are defined as follows:

Table 2-18: Coding Key Colors

J5 (CON5)

J4 (CON4)

J3 (CON3)

SIGNALING VOLTAGE KEY COLOR

3.3V Cadmium Yellow

5V Brilliant Blue

Universal board (5V and 3.3V) None

To prevent plugging a 5V CP605 version into a 3.3V VI/O backplane slot, a blue key is installed in J1.

To prevent plugging the CP605 into an H.110 backplane slot, a brown key is installed in J4.

J2 (CON2)

J1 (CON1)

Note: Pinrows

F and Z are

GND pins

DEFCBAZ

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CP605 Functional Description

The CP605 is provided with two 2 mm x 2 mm pitch female CompactPCI bus connectors, J1 and J2. The following table indicates the pinout of these connectors.

Table 2-19: CompactPCI Bus Connector J1 (CON1) System Slot Pinout

PIN ROW Z ROW A ROW B ROW C ROW D ROW E ROW F

25 GND 5V REQ64# ENUM# 3.3V 5V GND

24 GND AD[1] 5V V(I/O) AD[0] ACK64# GND

23 GND 3.3V AD[4] AD[3] 5V AD[2] GND

22 GND AD[7] GND 3.3V AD[6] AD[5] GND

21 GND 3.3V AD[9] AD[8] M66EN# C/BE[0]# GND

20 GND AD[12] GND V(I/O) AD[11] AD[10] GND

19 GND 3.3V AD[15] AD[14] GND AD[13] GND

18 GND SERR# GND 3.3V PAR C/BE[1]# GND

17 GND 3.3V IPMB SCL IPMB SDA GND PERR# GND

16 GND DEVSEL GND V(I/O) STOP# LOCK# GND

15 GND 3.3V FRAME# IRDY# GND TRDY# GND

12-14 Key Area

11 GND AD[18] AD[17] AD[16] GND C/BE[2]# GND

10 GND AD[21] GND 3.3V AD[20] AD[19] GND

9 GND C/BE[3]# NC AD[23] GND AD[22] GND

8 GND AD[26] GND V(I/O) AD[25] AD[24] GND

7 GND AD[30] AD[29] AD[28] GND AD[27] GND

6 GND REQ0# GND 3.3V CLK0 AD[31] GND

5 GND BRSVP1A5 BRSVP1B5 RST# GND GNT0# GND

4 GND IPMB PWR Healthy# V(I/O) INTP INTS GND

3 GND INTA# INTB# INTC# 5V INTD# GND

2 GND TCK 5V TMS TDO TDI GND

1 GND 5V -12V TRST# +12V 5V GND

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Functional Description CP605

Table 2-20: CompactPCI Bus Connector J1 (CON1) Peripheral Slot Pinout

PIN ROW Z ROW A ROW B ROW C ROW D ROW E ROW F

25 GND 5V * ENUM# 3.3V 5V GND

24 GND * 5V V(I/O) * * GND

23 GND 3.3V * * 5V * GND

22 GND * GND 3.3V * * GND

21 GND 3.3V * * M66EN# * GND

20 GND * GND V(I/O) * * GND

19 GND 3.3V * * GND * GND

18 GND * GND 3.3V * * GND

17 GND 3.3V IPMB SCL IPMB SDA GND * GND

16 GND * GND V(I/O) * * GND

15 GND 3.3V * * GND * GND

12-14 Key Area

11 GND * * * GND * GND

10 GND * GND 3.3V * * GND

9GND* NC * GND * GND

8 GND * GND V(I/O) * * GND

7GND***GND*GND

6 GND * GND 3.3V * * GND

5 GND BRSVP1A5 BRSVP1B5 * GND * GND

4 GND IPMB PWR Healthy# V(I/O) INTP INTS GND

3 GND * * * 5V * GND

2 GND TCK 5V TMS TDO TDI GND

1 GND 5V -12V TRST# +12V 5V GND

Note ...

A * indicates that the signal normally present at this pin is disconnected from the CompactPCI bus when the CP605 is inserted in a peripheral slot.

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CP605 Functional Description

Table 2-21: 64-bit CompactPCI Bus Connector J2 (CON2) System Slot Pinout

PIN ROW Z ROW A ROW B ROW C ROW D ROW E ROW F

22 GND GA4 GA3 GA2 GA1 GA0 GND

21 GND CLK6 GND RSV RSV RSV GND

20 GND CLK5 GND RSV GND RSV GND

19 GND GND GND RSV RSV RSV GND

18 GND BRSVP2A18 BRSVP2B18 BRSVP2C18 GND BRSVP2E18 GND

17 GND BRSVP2A17 GND PRST# REQ6# GNT6# GND

16 GND BRSVP2A16 BRSVP2B16 DEG# GND BRSVP2E16 GND

15 GND BRSVP2A15 GND FAL# REQ5# GNT5# GND

14 GND AD[35] AD[34] AD[33] GND AD[32] GND

13 GND AD[38] GND V(I/O) AD[37] AD[36] GND

12 GND AD[42] AD[41] AD[40] GND AD[39] GND

11 GND AD[45] GND V(I/O) AD[44] AD[43] GND

10 GND AD[49] AD[48] AD[47] GND AD[46] GND

9 GND AD[52] GND V(I/O) AD[51] AD[50] GND

8 GND AD[56] AD[55] AD[54] GND AD[53] GND

7 GND AD[59] GND V(I/O) AD[58] AD[57] GND

6 GND AD[63] AD[62] AD[61] GND AD[60] GND

5 GND C/BE[5]#] GND V(I/O) C/BE[4]#] PAR64 GND

4 GND V(I/O) BRSVP2B4 C/BE[7]#] GND C/BE[6]#] GND

3 GND CLK4 GND GNT3# REQ4# GNT4# GND

2 GND CLK2 CLK3 SYSEN# GNT2# REQ3# GND

1 GND CLK1 GND REQ1# GNT1# REQ2# GND

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Functional Description CP605

Table 2-22: 64-bit CompactPCI Bus Connector J2 (CON2) Peripheral Slot Pinout

PIN ROW Z ROW A ROW B ROW C ROW D ROW E ROW F

22 GND GA4 GA3 GA2 GA1 GA0 GND

21 GND * GND RSV RSV RSV GND

20 GND * GND RSV GND RSV GND

19 GND GND GND RSV RSV RSV GND

18 GND BRSVP2A18 BRSVP2B18 BRSVP2C18 GND BRSVP2E18 GND

17 GND BRSVP2A17 GND PRST# * * GND

16 GND BRSVP2A16 BRSVP2B16 DEG# GND BRSVP2E16 GND

15 GND BRSVP2A15 GND FAL# * * GND

14 GND * * * GND * GND

13 GND * GND V(I/O) * * GND

12 GND * * * GND * GND

11 GND * GND V(I/O) * * GND

10 GND * * * GND * GND

9 GND * GND V(I/O) * * GND

8GND***GND*GND

7 GND * GND V(I/O) * * GND

6GND***GND*GND

5 GND * GND V(I/O) * * GND

4 GND V(I/O) BRSVP2B4 * GND * GND

3 GND * GND * * * GND

2 GND * * SYSEN# * * GND

1 GND * GND * * * GND

Note ...

A * indicates that the signal normally present at this pin is disconnected from the CompactPCI bus when the CP605 is inserted in a peripheral slot.

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2.5.18.2 CompactPCI Rear I/O Connectors J3-J5 (CON3-CON5)

The CP605 conducts all I/O signals through the rear I/O connectors J3, J4 and J5. The CP605 board provides optional rear I/O connectivity for peripherals for special compact systems. All standard PC interfaces are implemented and assigned to the front panel and to the rear I/O connectors J3, J4 and J5 (CON3, CON4 and CON5).

When the rear I/O module is used, the signals of some of the main board/front panel connectors are routed to the module interface. Thus the rear I/O module makes it much easier to remove the CPU in the rack as there is practically no cabling on the CPU board.

For the system rear I/O feature a special backplane is necessary. The CP605 with rear I/O is compatible with all standard 6U CompactPCI passive backplanes with rear I/O support on the system slot.

The CP605 conducts all I/O signals through the rear I/O connectors J3, J4 and J5.

The following tables indicates the pinouts of the J3-J5 connectors and their signal descriptions.

Table 2-23: Backplane J3 Pinout

PIN Z A B C D E F

19 GND RIO_+2.5 V reserved reserved reserved SIDEATADET GND

18 GND

17 GND

16 GND

15 GND

14 GND

13 GND

12 GND

11 G ND

10 GND

9GND

8GND

7GND

6GND

LPa_DA+ LPa_DA- GND LPa_DC+ LPa_DC- GND

LPa_DB+ LPa_DB- GND LPa_DD+ LPa_DD- GND

LPb_DA+ LPb_DA- GND LPb_DC+ LPb_DC- GND

LPb_DB+ LPb_DB- reserved LPb_DD+ LPb_DD- GND

reserved reserved reserved reserved reserved GND

IDERST 8) SIDEIRQ 8) SIDEDAK 8) SIDEICHRDY 8) SIDEDRQ 8)

FDDS0 7) FDDENSEL1 7) FDMTR0 7) FDINDEX 7) FDWDATA 7)

FDDS1 7) FDDSKCHG 7) FDMTR1 7) FD.DENSEL0 7) FDRDATA 7)

FDWP 7) FDHDSEL 7) FDDIR 7) FDTRK0 7) FDSTEP 7) GND

FDWGATE 7) SIDED15 8) SIDED14 8) SIDED13 8) USB0+ 2) GND

SIDED12 8) SIDEIOW 8) RIO_VCC SIDEIOR 8) USB0- 2) GND

SIDEA2 8) SIDEA1 8) SIDEA0 8) SIDED0 8) SIDED1 8) GND

SIDED2 8) SIDED3 8) SIDED4 8) SIDED5 8) SIDED6 8) GND

GND

5GND

4GND

3GND

2GND

1GND

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SIDECS0 8) PMDAT 5) SPKR 1) KDAT 5) SIDECS1 8) GND

PRST 1) PMCLK 5) RIO_VCC KCLK 5) S3RXD 3) GND

S3CTS 3) S3RTS 3) S3DSR 3) S3DCD 3) S3TXD 3) GND

SIDED7 8) SIDED8 8) S3RIN 3) S3DTR 3) S4RXD 4) GND

SIDED9 8) SIDED10 8) SIDED11 8) BATT 1) S4TXD 4) GND

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Warning!

The RIO_XXX signals are power supply outputs from the CPU board to supply the RIO board with power and must not be supplied with external power.

Failure to comply with the above may result in damage to your board.

Legend for Backplane J3 Table

Table 2-24: Backplane J3 Signal Functions

SIGNAL DESCRIPTION

CONTROL SIGNALS

SPKR 1) Speaker output signal; TTL level

BATT 1) Battery input signal for RTC; max. 3.3V

PRST 1)

USB PORT 0

Reset input signal; TTL level

USB0+/- 2) USB data differential data signals

SERIAL PORT 3

S3* 3) Serial port signals; TTL level

SERIAL PORT 4

S4* 4) Serial port signals; TTL level

MOUSE + KEYBOARD

KDAT 5), KCLK 5) Keyboard data and clock

PMDAT 5), PMCLK 5) Mouse data and clock

FD* 7)

SIDE*8

LPA* LPB*

reserved

Floppy signals

IDE secondary signals

Gigabit Ethernet Link A Gigabit Ethernet Link B

Reserved for future use

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Table 2-25: Backplane J4 Pinout

PIN Z A B C D E F

25 GND RIO_VCC reserved reserved RIO_+3.3V RIO_VCC GND

24 GND

23 GND RIO_+3.3V

22 GND

21 GND RIO_+3.3V

20 GND

19 GND RIO_+3.3V

18 GND

17 GND RIO_+3.3V

16 GND

15 GND RIO_+3.3V

12-14 GND GND

11 GND

10 GND

9GND

8GND

7GND GND

reserved PD0 1) INIT 1) reserved reserved GND

reserved reserved RIO_VCC reserved GND

reserved PD1 1) reserved reserved reserved GND

reserved AUTOFD 1) reserved J2ALERT 2) GND

reserved PD2 1) SLCTIN 1) J2SCL 2) J2SDA 2) GND

PD3 1) STROBE 1) reserved IPMIGPIO2 2) GND

reserved PD4 1) reserved PWM1 2) PWM0 2) GND

PD5 1) BUSY 1) reserved TACH_IN3 2) GND

reserved PD6 1) reserved TACH_IN2 2) TACH_IN1 2) GND

PD7 1) ACK 1) reserved TACH_IN0 2) GND

reserved IPMI VCC 1) PE 1) reserved

reserved reserved reserved ID_XMIT_EN 2) CONN_ID1 2) GND

reserved IPMI VCC SLCT 1) reserved CONN_ID0 2) GND

reserved GND reserved XMIT_EN 2) UART0_RI 2) GND

reserved ERROR 1) reserved UART0_RTS 2) GND

CONN_ID_DRV

GND

6GND

5 GND GND GND

4GND

3GND

2GND

1 GND RIO_VCC RIO_-12V GND RIO_+12V RIO_VCC GND

reserved reserved reserved UART0_DCD2) UART0_CTS 2) GND

reserved UART0_DOUT 2) UART0_DIN 2) GND

reserved GND reserved GND GND GND

reserved reserved GND reserved reserved GND

Warning!

The RIO_XXX signals are power supply outputs from the CPU board to supply the RIO board with power and must not be supplied with external power.

Failure to comply with the above may result in damage to your board.

Legend for Backplane J4 Table

1) Parallel I/O interface signals

2) IPMI control signals

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Table 2-26: Backplane J5 Pinout

PIN Z A B C D E F

22 GND PMCR4 PMCR3 PMCR2 PMCR1 PMCR0 GND

21 GND

20 GND

19 GND

18 GND

17 GND

16 GND

15 GND

14 GND

13 GND

12 GND

11 GND

10 GND RIO_+3.3V

9 GND reserved reserved

8 GND reserved reserved

7GND

6GND

PMCR9 PMCR8 PMCR7 PMCR6 PMCR5 GND

PMCR14 PMCR13 PMCR12 PMCR11 PMCR10 GND

PMCR19 PMCR18 PMCR17 PMCR16 PMCR15 GND

PMCR24 PMCR23 PMCR22 PMCR21 PMCR20 GND

PMCR29 PMCR28 PMCR27 PMCR26 PMCR25 GND

PMCR34 PMCR33 PMCR32 PMCR31 PMCR30 GND

PMCR39 PMCR38 PMCR37 PMCR36 PMCR35 GND

PMCR44 PMCR43 PMCR42 PMCR41 PMCR40 GND

PMCR49 PMCR48 PMCR47 PMCR46 PMCR45 GND

PMCR54 PMCR53 PMCR52 PMCR51 PMCR50 GND

PMCR59 PMCR58 PMCR57 PMCR56 PMCR55 GND

PMCR63 PMCR62 PMCR61 PMCR60 GND

COM2_ENABLE 1) COM1_ENABLE 1)

S1DTR 4) S1CTS 4) S1DSR 4) S1DCD 4) S1RIN 4) GND

S1RXD 4) TDN1 2) RDN1 2) GND

S1TXD 4) TDP1 2) RDP1 2) GND

S1RTS 4) USB1+ 3) RIO_+3.3V GND

5GND

4GND

3 GND S4DTR 6) S4CTS 6) S4DSR 6) GPLED 1)

2GND

1GND

S2RXD 5) S2TXD 5) S2RTS 5) S2DTR 5) ROUT 8) GND

S2DSR 5) S2DCD 5) S2RIN 5) S2CTS 5) HSYNC 8) GND

S4RTS 6) S4RIN 6)

S4DCD 6) RIOPRESENT 1)

FANSENSE2 7) FANPWM 7) VSYNC 8)

FANSENSE1 7) USB1- 3) GOUT 8)

Warning!

The RIO_XXX signals are power supply outputs from the CPU board to supply the RIO board with power and must not be supplied with external power.

Failure to comply with the above may result in damage to your board.

BOUT 8) GND

GND

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Legend for Backplane J5 Table

Table 2-27: CompactPCI Connector Signal Descriptions

SIGNAL TYPE DESCRIPTION

ETHERNET 1 (SIGNALS FROM ETHERNET CHIP WITHOUT MAGNETICS)

TDP1 2) Ethernet high transmit Data line

TDN1 2) Ethernet low transmit Data line

RDP1 2) Ethernet high receive Data line

RDN1 2) Ethernet low receive Data line

USB PORT

USB1+/- 3) USB data differential data signals

SERIAL PORT 1

S1* 4) Serial port signals; TTL level

SERIAL PORT 2

S2* 5) Serial port signals; TTL level

SERIAL PORT 4

S4* 6) Serial port signals; TTL level

CONTROL SIGNALS

FANPWM 7)

FANSENSE1/2 7)

COM1_ENABLE 1)

COM2_ENABLE 1)

GPLED 1)

RIOPRESENT 1)

VGA CRT SIGNALS

ROUT 8) Red signal

DAC output that can be used to control fan speed; 0V to +1.25V output

Schmitt Trigger fan tachometer inputs; TTL level

Serial port 1 enable signal for front I/O and rear I/O Low = Front I/O High = Rear I/O

Serial port 2 enable signal for front I/O and rear I/O Low = Front I/O High = Rear I/O

General purpose LED output (TH/GP or LED2, depending on configuration, see table 4-24, I/O Configuration Register)

Low = rear I/O module is present High = rear I/O module is not present This signal must be set on the rear I/O module to GND

GOUT 8) Green signal

BOUT 8) Blue signal

HSYNC 8) Horizontal Sync.

VSYNC 8) Vertical Sync.

PMC REAR I/O SIGNALS PMCR0 to PMCR63 (Spec.) carry the signals from PMC rear I/O connector CON21

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2.5.18.3 Rear I/O Configuration

Rear I/O interfaces are only available on the rear I/O version of the board.

Ethernet Interfaces

The Fast Ethernet interface is available on the front panel at CON6A and on the rear I/O interface.

The combination of both front and rear I/O is not supported. The Fast Ethernet channel is decoupled, but enabled separately. It is not possible to operate both the rear and front I/O at the same time. Switching over from front to rear I/O or vice versa is effected under BIOS control without the need to plug/unplug Ethernet cables.

Gigabit Ethernet signals are available on the front panel connector and on the rear I/O interface (PICMG 2.16 pinout). Configuration of the Gigabit Ethernet ports for rear I/O requires the installation of zero ohm resistors on the board in order to connect the signals to the J3 connector.

VGA CRT Interface

The VGA signals are available on both rear I/O and front I/O. In this configuration both interfaces are active. The 75 ohm termination resistor for the red, green and blue video signals are equipped on the CP605

To enable the rear I/O port, the installation of zero ohm resistors is necessary.

Note ...

Both VGA ports are electrically identical and not separated. Do not connect devices at both connectors (front I/O and rear I/O) at the same time.

Serial Interfaces COM1 and COM2

Only one interface may be used (rear I/O or front I/O). If the rear I/O interface is enabled, the RS-232, RS-485, RS-422 drivers for the COM1 and COM2 port on the front I/O must be disabled. The configuration can be accomplished via the BIOS.

Serial Interfaces COM3 and COM4

The serial interfaces COM3 and COM4 are only available via the rear I/O.

Parallel I/O Interface

The Parallel I/O Interface is only available via the rear I/O. In order to use the Parallel I/O Interface as LPT interface, additional termination resistors (pull-up resistors) are required.

Keyboard/Mouse Interface

The keyboard interface is available onboard and via the rear I/O. The combination of the onboard and the rear I/O is not supported. The mouse interface is only available via the rear I/O.

USB Interface

The two USB 1.1 interfaces are available only via the rear I/O.

Secondary EIDE Interface

Only one EIDE connector may be used at any one time through the same port; connecting both EIDE devices to the CP605 baseboard and the rear I/O simultaneously will result in malfunction and data loss.

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Floppy Interface

The floppy interface is only available via the rear I/O.

2.6 Intelligent Platform Management Interface (IPMI)

2.6.1 Technical Background of IPMI

The CP605 has been designed to support the "Intelligent Platform Management Interface" (IPMI) subsystem which is another step in providing high availability platforms. Intelligent Platform Management means monitoring the health of the entire system beyond the confines of the board itself, so that the status of the complete system is available to be used, for example, for control and intervention purposes. A range of variables is monitored on every board, to provide information on the system status, e.g. voltages, temperature, powergood signals, reset signals etc. Additionally, the IPMI Baseboard controller can intervene, regulating the operating status of the system by controlling fans, shutting down systems and generating alarm signals as and when fault conditions occur. These fault conditions are simultaneously logged in non-volatile memory for analysis and for fault recovery. IPMI also defines a protocol (software stack) for exchanging the status messages of the board, so that "IPMI ready" boards/systems from different suppliers can be monitored. In addition, a clear interface (registers, addresses etc.) is defined for guaranteeing that System Management software can work with every compliant IPMI hardware.

The electrical interconnection between IPMI capable boards is an I²C interface (IPMB). On CompactPCI systems, this interface is provided on IPMI prepared backplanes and guarantees the data path between the boards.

The devices which handle the measurements and the protocol stack are microcontrollers which are named Baseboard Management Controller (BMC) and Peripheral Management Controller (PM) depending on their position in a CompactPCI backplane. The IPMI microcontroller which is on the System Master board in a CompactPCI system is called BMC and the IPMI controller which is on a Peripheral board is named PM.

The interface between the system controller CPU’s System Management software and the BaseBoard Management Controller can be realized in two different ways, a keyboard controller style interface (KCS) or a block transfer interface (BT) which can be found in the System Master’s I/O space.

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Figure 2-13: IPMI Functional Block Diagram

Front Panel

IPMB

Status LED’s

Display Module

CompactPCI Backplane

Push Button Inputs

IPMB

BMC

CPU

I/O

I/O Boards

CPU Board

2.6.2 IPMI Implementation on the CP605

System Chassis

Fan Modules

IPMB

Power Supply

On the CP605, the IPMI functionality is realized using the ZIRCON-Lite controller from QLogic, which is an ARM7TDMI core-based IPMI controller. Due to the fact that this controller can act as BMC and as PM on all versions of the CP605, the same controller can be used. All the information collected by the ZIRCON-Lite is then accessible by software through a keyboard-style Interface (see IPMI-Intelligent Platform Management Interface Specification V.1.0 for more information) whose address space is available in the I/O space of the Intel CPU’s address map, or via the IPMB-Bus.

2.6.3 Measurement of Onboard Voltages

On the CP605 all voltages are monitored by the ZIRCON-Lite. This means 5V, 3.3V, 2.5V, VCORE, VIO, 12V and -12V.

2.6.4 Measurement of Temperatures

An onboard sensor measures the temperature in the vicinity of the CPU (positioned below the heat sink).

2.6.5 Fan Control

Four Tacho inputs and two PWM outputs are routed to the rear I/O connector. These make it possible to control the fan speed to regulate system cooling.

2.6.6 Data Repositories

All the data gathered by the BMC is stored in a non-volatile memory providing the possibility to obtain information about working conditions and failure situations.

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Chapter

Installation

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3. Installation

The CP605 has been designed for easy installation. However, the following standard precautions, installation procedures, and general information must be observed to ensure proper installation and to preclude damage to the board, other system components, or injury to personnel.

3.1 Safety Requirements

The following safety precautions must be observed when installing or operating the CP605. Kontron assumes no responsibility for any damage resulting from failure to comply with these requirements.

Warning!

Due care should be exercised when handling the board due to the fact that the heat sink can get very hot. Do not touch the heat sink when installing or removing the board.

In addition, the board should not be placed on any surface or in any form of storage container until such time as the board and heat sink have cooled down to room temperature.

Caution!

If your board type is not specifically qualified as being hot swap capable, switch off the CompactPCI system power before installing the board in a free CompactPCI slot. Failure to do so could endanger your life or health and may damage your board or system.

Note ...

Certain CompactPCI boards require bus master and/or rear I/O capability. If you are in doubt whether such features are required for the board you intend to install, please check your specific board and/or system documentation to make sure that your system is provided with an appropriate free slot in which to insert the board.

ESD Equipment!

This CompactPCI board contains electrostatically sensitive devices. Please observe the necessary precautions to avoid damage to your board:

• Discharge your clothing before touching the assembly. Tools must be discharged before use.

• Do not touch components, connector pins or traces.

• If working at an anti-static workbench with professional discharging equipment, please do not omit to use it.

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3.2 CP605 Initial Installation Procedures

The following procedures are applicable only for the initial installation of the CP605 in a system. Procedures for standard removal and hot swap operations are found in their respective chapters.

To perform an initial installation of the CP605 in a system proceed as follows:

1. Ensure that the safety requirements indicated Chapter 3.1 are observed.

Warning!

Failure to comply with the instruction below may cause damage to the board or result in improper system operation.

2. Ensure that the board is properly configured for operation in accordance with application requirements before installing. For information regarding the configuration of the CP605 refer to Chapter 4. For the installation of CP605 specific peripheral devices and rear I/O devices refer to the appropriate chapters in Chapter 3.

Warning!

Care must be taken when applying the procedures below to ensure that neither the CP605 nor other system boards are physically damaged by the application of these procedures.

3. To install the CP605 perform the following:

1. Ensure that no power is applied to the system before proceeding.

Warning!

When performing the next step, DO NOT push the board into the backplane connectors. Use the ejector handles to seat the board into the backplane connectors.

2. Carefully insert the board into the slot designated by the application requirements for

the board until it makes contact with the backplane connectors.

3. Using both ejector handles, engage the board with the backplane. When the ejector

handles are locked, the board is engaged.

4. Fasten the two front panel retaining screws.

5. Connect all external interfacing cables to the board as required.

6. Ensure that the board and all required interfacing cables are properly secured.

4. The CP605 is now ready for operation. For operation of the CP605, refer to appropriate CP605 specific software, application, and system documentation.

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3.3 Standard Removal Procedures

To remove the board proceed as follows:

1. Ensure that the safety requirements indicated in Chapter 3.1 are observed. Particular attention must be paid to the warning regarding the heat sink!

Warning!

Care must be taken when applying the procedures below to ensure that neither the CP605 nor system boards are physically damaged by the application of these procedures.

2. Ensure that no power is applied to the system before proceeding.

3. Disconnect any interfacing cables that may be connected to the board.

4. Unscrew the front panel retaining screws.

Warning!

Due care should be exercised when handling the board due to the fact that the heat sink can get very hot. Do not touch the heat sink when changing the board.

5. Disengage the board from the backplane by first unlocking the board ejection handles and then by pressing the handles as required until the board is disengaged.

6. After disengaging the board from the backplane, pull the board out of the slot.

7. Dispose of the board as required.

3.4 Hot Swap Procedures

The CP605 is designed for hot swap operation. When installed in the system slot it is capable of supporting peripheral board hot swapping. When installed in a peripheral slot, its hot swap capabilities depend on the type of backplane in use and the system controller’s capabilities. The reason for this being that communications with the system controller requires either front panel Ethernet I/O or use of a packet switching backplane. In any event, hot swap is also a function of the application running on the CP605.

3.4.1 System Master Hot Swap

Hot swapping of the CP605 itself when used as the system controller is possible, but will result in any event in a cold start of the CP605 and consequently a reinitialization of all peripheral boards. Exactly what transpires in such a situation is a function of the application and is not addressed in this manual. The user must refer to appropriate application documentation for applicable procedures for this case. In any event, the safety requirements above must be observed.

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3.4.2 Peripheral Hot Swap Procedure

This procedure assumes that the board to be hot swapped has undergone an initial board installation and is already installed in an operating system, and that the system supports hot swapping of the board.

To hot swap the CP605 proceed as follows:

1. Ensure that the safety requirements indicated in Chapter 3.1 are observed. Particular attention must be paid to the warning regarding the heat sink!

Warning!

Care must be taken when applying the procedures below to ensure that neither the CP605 nor other system boards are physically damaged by the application of these procedures.

2. Unlock both board ejection handles ensuring that the bottom handle has activated the hot swap switch (this occurs with a very small amount of movement of the handle).

Note ...

What transpires at this time is a function of the application. If hot swap is supported by the application, then the blue HS LED should light up after a short time period. This indicates that the system has recognized that the CP605 is to be hot swapped and now indicates to the operator that hot swapping of the CP605 may proceed.

If the blue HS LED does not light up after a short time period, either the system does not support hot swap or a malfunction has occurred. In this event, the application is responsible for handling this situation and must provide the operator with appropriate guidance to remedy the situation.

3. After approximately 1 to 15 seconds, the blue HS LED should light up. If the LED lights up, proceed with the next step of this procedure. If the LED does not light up, refer to appropriate application documentation for further action.

4. Disconnect any interfacing cables that may be connected to the board.

5. Unscrew the front panel retaining screws.

Warning!

Due care should be exercised when handling the board due to the fact that the heat sink can get very hot. Do not touch the heat sink when changing the board.

6. Using the ejector handles, disengage the board from the backplane and carefully remove it from the system.

7. Dispose of the “old” board as required observing the safety requirements indicated in Chapter 3.1.

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8. Obtain the replacement CP605 board.

Warning!

When performing the next step, DO NOT push the board into the backplane connectors. Use the ejector handles to seat the board into the backplane connectors.

9. Carefully insert the “new” board into the “old” board slot until it makes contact with the backplane connectors.

10. Using both ejector handles, engage the board with the backplane. When the ejector handles are locked, the board is engaged.

11. Fasten the front panel retaining screws.

12. Connect all required interfacing cables to the board. Hot swap of the CP605 is now complete.

3.5 Installation of CP605 Peripheral Devices

The CP605 is designed to accommodate a variety of peripheral devices whose installation varies considerably. The following chapters provide information regarding installation aspects and not detailed procedures.

3.5.1 CompactFlash Installation

The CompactFlash socket supports all available CompactFlash ATA cards type I and type II with 3.3V.

Note ...

The CP605 does not support removal and reinsertion of the CompactFlash storage card while the board is in a powered-up state. Connecting the CompactFlash cards while the power is on, which is known as "hot plugging", may damage your system.

3.5.2 USB Device Installation

The CP605 supports all USB Plug & Play computer peripherals (e.g. keyboard, mouse, printer, etc.).

Note ...

All USB devices may be connected or removed while the host or other peripherals are powered up.

3.5.3 Rear I/O Device Installation

To ensure proper functioning of the rear I/O serial interfaces, the drivers for the COM1 and COM2 ports must be disabled via software.

Using the Fast Ethernet port on the Rear I/O the interface can be re-routed via a BIOS software switch.

To ensure proper functioning of the rear I/O VGA interface and the Gigabit Ethernet ports, the solder jumpers on the CP605 must be configured for the rear I/O. See Chapter 4 for configuration details.

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For physical installation of rear I/O devices, refer to the documentation provided with the device itself.

3.5.4 Battery Replacement

The lithium battery must be replaced with an identical battery or a battery type recommended by the manufacturer. Suitable batteries include the VARTA CR2025 and PANASONIC BR2020

Note ...

Care must be taken to ensure that the battery is correctly replaced.

The battery should be replaced only with an identical or equivalent type recommended by the manufacturer.

Dispose of used batteries according to the manufacturer’s instructions.

The typical life expectancy of a 170 mAh battery (VARTA CR2025) is 5 - 6 years with an average on-time of 8 hours per working day at an operating temperature of 30°C. However, this typical value varies considerably because the life expectancy is dependent on the operating temperature and the standby time (shutdown time) of the system in which it operates. To ensure that the lifetime of the battery has not been exceeded it is recommended to exchange the battery after 4 - 5 years.

3.5.5 Hard Disk Installation

The following information pertains to hard disks which may be connected to the CP605 via normal cabling. To install a hard disk, it is necessary to perform the following operations in the given order:

1. Install the hardware.

Warning!

The incorrect connection of power or data cables may damage your hard disk unit and/or CP605 board.

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Note...

The blue end of the ATA-100 cable must connect to the motherboard, the gray connector to the UltraDMA/100 slave device, and the black connector to the UltraDMA/100 master device.

Some symptoms of incorrectly installed HDDs are:

• Hard disk drives are not auto-detected: may be a Master / Slave problem or a bad IDE cable. Contact your vendor.

• Hard Disk Drive Fail message at bootup: may be a bad cable or lack of power going to the drive.

• No video on bootup: usually means the cable is installed backwards.

• Hard drive lights are constantly on: usually means bad IDE cable or defective drives / motherboard. Try another HDD.

• Hard drives do not power up: check power cables and cabling. May also result from a bad power supply or IDE drive.

2. Initialize the software necessary to run the chosen operating system.

3.6 Software Installation

The installation of the Ethernet and all other onboard peripheral drivers is described in detail in the relevant Driver Kit files.

Installation of an operating system is a function of the OS software and is not addressed in this manual. Refer to appropriate OS software documentation for installation.

Note ...

Users working with pre-configured operating system installation images for Plug and Play compliant operating systems, for example Windows® 95/98/ME, Windows® 2000, Windows® XP, Windows® XP Embedded, must take into consideration that the stepping and revision ID of the chipset and/or other onboard PCI devices may change. Thus, a re-configuration of the operating system installation image deployed for a previous chipset stepping or revision ID is in most cases required. The corresponding operating system will detect new devices according to the Plug and Play configuration rules.

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Chapter

Configuration

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4. Configuration

4.1 Jumper Description

4.1.1 Processor Configuration

The CP605 supports all Intel Pentium 4 and Mobile Pentium 4 Processor-M processors. Due to the different core voltages of the two processors the onboard DC/DC converter must be configured via jumper J8.

Table 4-1: Processor Configuration

J8 PROCESSOR TYPE

Open Pentium 4 support

Closed Pentium 4-M support

Note ...

If the jumper setting is incorrect, the board will not function.

4.1.2 CompactFlash Configuration

Table 4-2: CompactFlash Configuration

J100 or R72 DESCRIPTION

Closed Configured for slave

Open Configured for master

The default setting is indicated by using italic bold.

4.1.3 Dual BIOS Configuration

Dual BIOS means that there are two chips for the BIOS on the CP605 board (BIOS Flash and the User Flash). One chip is intended to provide a backup in the event that the other gets corrupted. These chips are soldered to the board.

If the primary BIOS is corrupted due to physical damage or a faulty flash upgrade, the solder jumper J6 should be set and the system switched over to the secondary chip and booted with default settings.

Table 4-3: Dual BIOS Configuration

J6 DESCRIPTION

Open Normal boot from the on-board BIOS

Closed Boot from the second BIOS chip

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The default setting is indicated by using italic bold.

Note ...

The Dual BIOS feature cannot be used if the second Flash chip is used for booting VxWorks®.

4.1.4 Clearing BIOS CMOS Setup

If the system does not boot (due to, for example, the wrong BIOS configuration or incorrect password setting) the CMOS setting may be cleared using jumper J5.

Procedure for clearing CMOS setting:

The system is booted with the jumper in the new, closed position, then powered down again. The jumper is reset back to the normal position, then the system is rebooted.

Table 4-4: Clearing BIOS CMOS Setup

J5 DESCRIPTION

Open Normal boot using the CMOS settings

Closed Clear the CMOS settings and use the default values

The default setting is indicated by using italic bold.

4.1.5 Shorting Chassis GND (Shield) to Logic GND

The front panel and front panel connectors are isolated to the logic ground.

To enable the connection between the chassis GND and logic GND the capacitors must be exchanged with zero ohm resistors.

Table 4-5: Shorting Chassis GND (Shield) to Logic GND

CAPACITOR SETTING DESCRIPTION

C103, C104, C107,

C114

Closed 470pF 2KV capacitors

Closed zero ohm resistors Connectors are connected to logic GND and chassis GND

The default setting is indicated by using italic bold.

Connectors are isolated to logic GND with four 470pF 2KV capacitors

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4.1.6 VGA CRT Rear I/O Configuration

The VGA CRT signals are available on the rear I/O and on the front I/O. To configure the VGA CRT port for rear I/O requires the installation of zero Ohm resistors on the board to connect the signals to the rear I/O connector J3.

Table 4-6: VGA-CRT Jumper Setting

RESISTORS R303, R310, R324 DESCRIPTION

Open Only front I/O

Closed Front I/O and rear I/O

The default setting is indicated by using italic bold.

Note ...

Both VGA ports are electrically identical and not separated. Do not connect devices at both connectors (front I/O and rear I/O) at the same time.

4.1.7 PICMG 2.16 Rear I/O Configuration

The Gigabit Ethernet signals are available on the rear I/O and the front I/O. To configure the two Ethernet ports for rear I/O requires the installation of zero Ohm resistors on the board to connect the signals to the rear I/O connector.

4.1.7.1 PIGMG 2.16 Rear I/O Configuration for Port 1

Table 4-7: PICMG 2.16 Rear I/O Configuration for Port 1

CONFIGURATION FRONT I/O REAR I/O

R95, R106

R123, R133

R145, R154

R164, R172

R96, R107

R124, R134

R146, R155

R173, R177

Note ...

Closed Open

Open Closed

The simultaneous operation of the Gigabit Ethernet Port 1 via the front and rear I/O ports is not supported.

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4.1.7.2 PICMG 2.16 Rear I/O Configuration for Port 2

Table 4-8: PICMG 2.16 Rear I/O Configuration for Port 2

CONFIGURATION FRONT I/O REAR I/O

R91, R103

R121, R130

R142, R152

R163, R170

R92, R105

R122, R131

R143, R153

R171, R176

Closed Open

Open Closed

Note ...

The simultaneous operation of the Gigabit Ethernet Port 2 via the front and rear I/O ports is not supported.

4.1.8 Serial Port Jumper and Resistor Setting

4.1.8.1 COM1 Jumper and Resistor Setting

The serial interfaces CON9 (COM1) and CON11 (COM2) on the CP605 may be configured for either RS-232, RS-422 or RS-485 by setting solder jumpers.

Table 4-9: Resistor Setting to Configure COM1

Resistor RS-232 RS-422 RS-485

R137 Open Closed Closed

R126 Open Open Closed

R108 Closed Closed Open

R149 Open Closed Open

The default setting is indicated by using italic bold.

Note ...

The serial port may be disabled by the BIOS.

RS-422 and RS-485 COM1 Termination

When the CP605 is using the onboard RS-485 interface and is the last device on the RS-422 or RS-485 bus, then the RS-422 or RS-485 interface must provide termination resistance. The purpose of jumpers J1 and J2 is to enable this line termination resistor (120 R).

The default setting is indicated by using italic bold.

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Table 4-10: Jumper Setting for RS-422 RXD Termination (COM1)

TERMINATION J2

ON Closed

OFF Open

Table 4-11: Jumper Setting for RS-422 TXD and RS-485 Termination (COM1)

TERMINATION J1

ON Closed

OFF Open

The default setting is indicated by using italic bold.

4.1.8.2 COM2 Jumper and Resistor Setting

Table 4-12: Resistor Setting to Configure COM2

Resistor RS-232 RS-422 RS-485

R128 Open Closed Closed

R167 Open Open Closed

R168 Closed Closed Open

R115 Open Closed Open

The default setting is indicated by using italic bold.

RS-422 and RS-485 COM2 Termination

When the CP605 is using the onboard RS-485 interface and is the last device on the RS-422 or RS-485 bus, then the RS-422 or RS-485 interface must provide termination resistance. The purpose of jumpers J3 and J4 is to enable this line termination resistor (120 R).

Table 4-13: Jumper Setting for RS-422 RXD Termination (COM2)

TERMINATION J4

ON Closed

OFF Open

The default setting is indicated by using italic bold.

Table 4-14: Jumper Setting for RS-422 TXD and RS-485 Termination (COM2)

TERMINATION J3

ON Closed

OFF Open

The default setting is indicated by using italic bold.

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4.1.9 Reserved Jumpers

The J7 jumper is reserved for future configurations.

4.2 Interrupts

The CP605 board uses the standard AT IRQ routing (8259 controller).

This interrupt routing is the default, but can be modified via the BIOS.

Table 4-15: Interrupt Setting

IRQ PRIORITY STANDARD FUNCTION

IRQ0 1 System Timer

IRQ1 2 Keyboard Controller

IRQ2 -- Input of the second IRQ controller (IRQ8-IRQ15)

IRQ3 11 COM2

IRQ4 12 COM1

IRQ5 13 Watchdog

IRQ6 14 Floppy Disk Controller

IRQ7 15 Free reserved for COM3 or COM4

IRQ8 3 System Real Time Clock

IRQ9 4 PCI or ACPI

IRQ10 5 PCI

IRQ11 6 PCI

IRQ12 7 PCI or PS/2 mouse

IRQ13 8 Coprocessor error

IRQ14 9 Primary hard disk

IRQ15 10 Secondary hard disk

NMI -- Watchdog

Warning!

IRQ5 should normally have only one source enabled, otherwise improper system operation may result.

If more than one source is required to be enabled, contact Kontron’s Technical Support before implementing the IRQs.

For events that are not time critical, such as ENUM, DERATE, etc., polling should be considered instead of using an IRQ.

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4.3 Onboard PCI Interrupt Routing

The ICH4 provides up to 8 PCI interrupt inputs. The table below describes the connection of these IRQ signals:

Table 4-16: PCI Interrupt Routing

ICH4 IRQ INPUT PCI DEVICE FUNCTION INTERNAL ICH4

PIRQA PCI to PCI Bridge IRQA USB 1 controller

PIRQB PCI to PCI Bridge IRQB AC97 + MODEM + SMBUS

PIRQC PCI to PCI Bridge IRQC USB 2 controller

PIRQD PCI to PCI Bridge IRQD USB 3 controller

PIRQE PMC IRQB LAN controller IRQA

PIRQF PMC IRQC + Gigabit Ethernet free

PIRQG PMC IRQD + Gigabit Ethernet free

PIRQH PMC IRQA + Security USB 2.0 controller

For more information please see the INTEL ICH4 data sheet.

4.4 Memory Map

The CP605 board uses the standard AT ISA memory map.

4.4.1 Memory Map for the 1st Megabyte

The following table sets out the memory map for the first megabyte:

Table 4-17: Memory Map for the 1st Megabyte

MEMORY RANGE SIZE FUNCTION

0xE0000 – 0xFFFFF 128 k BIOS implemented in FWH

Reset vector 0xFFFF0

0xD0000 – 0xDFFFF 64 k Free

0xCC000 – 0xCFFFF 16 k Free

0xC0000 – 0xCBFFF 48 k BIOS of the VGA card.

0xA0000 – 0xBFFFF 128 k Normally used as video RAM as follows:

CGA video: 0xB8000-0xBFFFF

Monochrome video: 0xB0000-0xB7FFF

EGA/VGA video: 0xA0000-0xAFFFF

0x000000 – 0x9FFFF 640 k DOS reserved memory space

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4.4.2 I/O Address Map

The following table sets out the memory map for the I/O memory:

Table 4-18: I/O Address Map

ADDRESS DEVICE

000,00F DMA controller #1

020,021 Interrupt controller #1

022,02F Reserved

040,043 Timer

060,063 Keyboard interface

070,071 RTC port

080,08F DMA page register

0A0,0A Interrupt controller #2

0C0,0DF DMA controller #2

0E0,0EF Reserved

0F0,0FF Math coprocessor

170,17F Hard disk secondary

1F0,1FF Hard disk primary

278,27F Parallel port LPT2

280 Watchdog trigger

282 Watchdog timer

284 Watchdog, CPCI IRQ routing

286 I/O status 1

287 I/O configuration

288 Board version

289 Hardware index

28A I/O status 2

28B Logic index

28D LED control

2E8,2EF Serial port COM4

2F8,2FF Serial port COM2

378,37F Parallel printer port LPT1

3BC,3BF Parallel printer port LPT3

3E8,3EF Serial port COM3

3F0,3F7 Floppy Disk + Super-I/O #1 Com.

3F8,3FF Serial port COM1

Note ...

The yellow (shaded on a printout) table cells indicate CP605-specific registers.

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