In compliance with Federal Regulations, following are reproduction of labels on, or inside the product relating to laser
product safety.
Caution : No connection of ground line if disassemble
the unit. Please connect the ground line on
rear panel, PCBs, Chassis and some others.
Con phono socket
(E63-1244-08)
Con phono socket
(E63-1289-08)
Con DIN socket
(E63-1243-08)
KENWOOD Corp. certifies this equipment conforms to DHHS
Regulations No.21 CFR 1040. 10, Chapter 1, subchapter J.
DANGER : Laser radiation when open and interlock defeated.
AVOID DIRECT EXPOSURE TO BEAM.
Con phono socket
(E63-1290-08)
Illustration is DVR-6100K.
* Refer to parts list on page 37.
Wire-MCRDM *
(E30-)
MLD clamp
(J42-0350-08)
*AC Plug Adaptor (1) *
(E03-0115-05)
Use to adapt the plug on the
power cord to the shape of the
wall outlet.
(Accessory only for regions where
use is necessary.)
FM indoor antenna (1)
Loop antenna (1)
Remote control unit (1)
Batteries (R6/AA) (2)
V ideo cord (1)
SCART plug adaptor (1)
(Europe and U.K. only)
(E69-0012-05)
Speaker cords (6)
(T90-0882-08)
(A70-1607-08): KP
(A70-1608-08): YX
(A70-1609-08): ET
(A70-1610-08): MM2H
(E30-7265-08): RED
(E30-7283-08): GREEN
(E30-7284-08): BLUE
(E30-7285-08): VIOLET
(E30-7269-08): GREY
(E30-7286-08): WHITE
(T90-0896-08)
(E30-1427-05)
Caution on condensation
Condensation (of dew) may occur inside the unit when there is
a great difference in temperature between this unit and the outside.
This unit may not function properly if condensation occurs. In
this case, leave the unit for a few hours, and restart the operation after the condensation has dried up.
Be specially cautious against condensation in a following circumstances:
When this unit is carried from one place to another across a large
difference in temperature, when the humidity in the room where
this unit is installed increases, etc.
Stored contents which are
cleared in at least a week after
power plug is unplugged from
power outlet.
Amplifier section
Last input selection
Volume control value
Surround setting
ACTIVE EQ
Tuner section
Receiving band
Frequency
Preset stations
Tuning mode setting
DVD section
Menu setup
Power status
Memory backup function
WARNING NOTICE:
IN MOST CASES IT IS AN INFRINGEMENT OF COPYRIGHT TO MAKE COPIES OF TAPES OR DISCS WITHOUT THE PERMISSION OF THE COPYRIGHT OWNERS. ANYONE WISHING TO COPY COMMERCIALLY
AVAILABLE TAPES OR DISC SHOULD CONTACT THE
MECHANICAL COPYRIGHT PROTECTION SOCIETY
LIMITED OR THE PERFORMING RIGHTS SOCIETY LIMITED.
Note related to transportation and movement
Before transporting or moving this unit, carry out the
following operations.
1 Remove the disc from the unit.
2 Press the 6 key.
3 Wait a few seconds and turn the unit OFF.
Operation to reset
The microcomputer may fall into malfunction (impossibility
to operate, erroneous display, etc.) when the power cord is
unplugged while power is ON or due to an external factor. In
this case, execute the following procedure to reset the
microcomputer and return it to normal condition.
÷ Please note that resetting the microcomputer clears the
contents stored in and returns and to condition when it left
the factory.
Set the POWER switch to ON (set to Standby mode).
Then press the ¢ key, 4 key and STOP key in this
order.
The marking this product has been classified as Class
1. It means that there is no danger of hazardous radiation outside the product.
Location: Back panel
CLASS 1
LASER PRODUCT
The marking of products using lasers
(Except for some areas)
DVR-6100/6100K
CONTENTS / ACCESSORIES / CAUTIONS
Contents
CONTENTS / ACCESSORIES / CAUTIONS............. 2
DISASSEMBLY FOR REPAIR....................................3
1. Pin Description of MPEG Processor IC (DVD Part IC61)
Pin No.Pin NameI/OPin Description
PIOs and communication
1PIO2(5) RGB SEL(BLANK)I/ORGB sel (blank). unused
2PIO2(6) VIDEO MUTEI/OVideo mute control.
3PIO2(7) 16: 9 INDICATORI/O16 : 9 indicator (unused).
6PIO3(0) SCART H (TV/AUX)I/O Unused.
7PIO3(1) I/O Unused.
8PIO3(2) OCSB
✽
✽
9PIO3(3)OSDIN
10PIO3(4) IR REMOCONI/O Unused.
11PIO3(5) OSCLK
12PIO3(6)I/O Unused.
13PIO3(7) DVD RESETI/O Power- on reset of front-end module.
Front-end
16B DATAII2S Data
17B BCLKII2S Bit clock
18B FLAGII2S Error flag
19B SYNCI/O I2S Sector / ABS time
Reserved
20B WCLKI/O Unused.
21B V4I/O Unused.
22NRSS OUTI/O Unused.
23VDD RGB-Supply voltage for RGB (+3.3VA).
24VSS RGB-GND
Video DAC
25,26,27B/G/R (OUT)OB/G/R signal outputs.
28V REF RGIReference voltage input for DAC RGB.
29I REF RGIReference current input for DAC RGB.
30VDD YCC-Supply voltage for YCC (+3.3VA).
31VSS YCC-GND
32~34Y/C/CV (OUT)OY/C/CV signal outputs.
35V REF YCCIReference voltage input for DAC YCC.
36I REF YCCIReference current input for DAC YCC.
48VDD PCM-Supply voltage for PCM (+3V3).
49VSS PCM-Ground for PCM.
51DAC SCLK (BCK)ODAC over sampling clock.
52DAC PCMOUT0 (DATA)ODAC PCM data out 0.
53DAC PCMOUT1ODAC PCM out 1 (unused).
54DAC PCMOUT2ODAC PCM out 2 (unused).
55DAC PCMCLKODAC PCM clock.
56DAC LRCLKODAC PCM Left/Right clock.
57SPDIF OUTOAudio digital data output.
103ADC SCLKI/OADC digital audio port clock.
104ADC LRCLKI/O ADCsample rate clock.
105ADC DATAIADC digital audio data input.
106ADC PCMCLKOCrystal input or master clock input.
JTAG
109TRSTITest reset from emulator module.
110TMSITest mode select.
111TDOOTest data out to emulator module.
112TDIITest data input from emulator module.
113TCKITest clock input from emulator module.
Timers
114PWM2I/O Unused.
115PWM1I/O ROM boot option port (voltage low = emulator booting).
116PWM0I/O Unused.
EMI Interface
117CPU OEI/O Flash ROM output enable
118CPU PRO CLKOSDRAM clock (unused).
Clock & Reset
120PIX CLKI27MHz main clock input.
122VDD PLL-Supply voltage for PLL (+3V3).
123VSS PLL-Ground for PLL.
124RESETIChip reset input.
Interrupt
125IRQ(2)IInterrupt request 2 from front-end module.
126IRQ(1)IUnused.
127IRQ(0)IUnused.
EMI Interface
128CPU BE(0)OBYTE 0 Enable
129CPU BE(1)OBYTE 1 Enable
130CPU RWOUnused.
131CPU WAITIWait state (connected to ground).
132CPU CE(3)OFlash ROM chip select.
133CPU CE(2)OFlash ROM down-load JIG module select.
134CPU CE(1)OUnused
135CPU CE(0)OUnused.
138CPU RAS1I/OUnused.
139CPU CAS0OUnused.
140CPU CAS1OUnused.
141~148CPU DATA(0~7)I/OFlash ROM data input/output (0~7).
151~158CPU DATA(8~15)I/O Flash ROM data input/output (8~15).
161~170CPU ADR(1~10)OFlash ROM address (1~10).
173~183CPU ADR(11~21)OFlash ROM address (11~21).
6
DVR-6100/6100K
CIRCUIT DESCRIPTION
Pin No.Pin NameI/OPin Description
PIOs and communication
186PIO0(0) T STROBEI/O UART0 data
187PIO0(1) MOD SWI/OATAPI RD
188PIO0(2)OUnused.
189PIO0(3) OUnused.
190PIO0(4) OUnused.
191PIO0(5) IUnused.
192
193
194PIO1(0) SDAI/O SSC0 data (MTSR out / MRST in)
195PIO1(1) SCLI/O SSC0 clock
196
197PIO1(3) TXD(JIG)I/OUART2 TXD
200PIO1(4) RXD(JIG)I/O UART2 RXD
201PIO1(5) FRONT TXDII/O UART1 TXD
202TRIGGER INI/O Trigger input from JIG.
203TRIGGER OUTI/O Trigger output from JIG.
204PIO2(0) H/P-Unused.
205PIO2(1) FRONT RXDI/O UART1 RXD
206PIO2(2) IUnused.
207PIO2(3) -Unused.
208PIO2(4) AUDIO MUTEOAudio mute control.
I/O Detection port of slider sensor for DVD mechanism.
I/O Control port of slider (IN) for DVD mechanism.
I/O Control port of slider (OUT) for DVD mechanism.
2. Pin Description of System Microcomputer : CXP82860(Microprocessor IC51)
Pin No.Pin NameI/ODescription
1GRID2OFIP Grid output.
2GRID1OFIP Grid output.
3NC-Connected to VDD.
4POWER DOWNIPower down check.
5RDS CLKIRDS clock input.
6DVD RXIDVD UART interface (RX).
7RDS OPTION-Unused.
8RMCIRemote controller signal input.
9RDS DATAIRDS data input.
10SM7346 CLKOVolume IC (IC11) clock output.
11SM7346 DATAOVolume IC (IC11) data output.
12ENCODER UPIEncoder (1) signal input.
13ENCODER DWIEncoder (2) signal input.
14DVD TXODVD UARTinterface (TX).
15DVD RSTODVD reset signal output.
7
DVR-6100/6100K
CIRCUIT DESCRIPTION
Pin No.Pin NameI/ODescription
16DSP A. BOOSTODSP auto boot.
17H/P CHKIDetection pin of headphones jack.
18CS8415A-CEODIR IC (IC39) chip enable.
19EMPHASISOCS4228 DAC IC emphasis ON/OFF
20TUNEDITuned signal input for tuner.
21DSP INTREQODSP INT request.
224094CEO4049 (IC81)chip enable.
23CS49326 CEOCS49326 DSP IC (IC33) chip enable.
24CS4228 CEOCS4228 DAC IC (IC31) chip enable.
25DSP CLKOCS49326 DSP IC (IC33) clock output.
26CS49326 DATA INICS49326 DSP IC (IC33) data input.
27DSP DA OUTOCS49326 DSP IC (IC33) data output.
28VREFIA/D reference voltage input.
29PROTECTIAMP protection input.
30KEY INIA/D key input.
31EEPROM DATAI/O EEPROM (IC52) data output.
32KEY2 INIA/D key input.
338415 DA INICS8415 DIR IC (IC39) data input.
34DVD OPTIONISetting pin for the destination.
35PLL DATA INIPLL data input.
36STEP OPTIONISetting pin for tuner destination.
37VSS(G)IAnalog ground.
38RSTIReset signal input.
39EXTALICrystal resonator (10MHz) connection.
40XTALOCrystal resonator (10MHz) connection.
41GND-Digital ground.
42NCOUnused.
43GND-GND
44VDDIDigital ground.
45VFDPIPower supply for VFDP.
46STANDBYOControl pin for power relay on/off.
47SPK RELAYOControl pin for speaker relay on/off.
48SUB ON/OFFOGain control for sub woofer.
49CS8415 RSTOCS8415 (IC39) reset signal output.
50PLL CEOPLL chip enable.
51PLL CLKOPLL clock output.
52PLL D OUTOPLL data output.
53A CLKOCommon clock (LC7821,BU4094) output.
54A DATAOCommon data (LC7821,BU4094) output.
55EEPROM CLKOEEPROM (IC52) clock output.
56~59VIDEO (SW1~SW4)OControl pin for video.
604228 RSTOCS4228 (IC31) reset signal output.
61LC7821 CEOLC7821(tuner pack) chip enable.
62SM7346 CEOVolume IC (Main IC11) chip enable.
63T MUTEOTuner mute control.
64S MUTEOMute control pin for surround signal
65C MUTEOMute control pin for center signal.
66F MUTEOMute control pin for front signal.
67W MUTEOMute control pin for sub woofer signal.
68CS49326 RSTOCS49326 DSP IC (IC5) reset signal output.
69~71DSP (A15~A17)ODSP ROM address (SEL 1~3).
72~88SEG (1~17)OFIP segment output.
89VDD-Digital power supply.
90,91SEG18,19OFIP segment output.
92-100GRID (11~3)OFIP Grid output.
8
DVR-6100/6100K
CIRCUIT DESCRIPTION
3. Pin Description of IC’s
3-1 64 Bit SDRAM : HY57V641620HGT (DVD Part IC63)
Pin No.Pin NameI/ODescription
38CLKI
37CKE-
19CS-Enables or disables all inputs except CLK, CKE, and DQM.
20,21BA0,BA1-
22~26
29~35Auto-precharge flag : A10
16,17,18WE,CAS,RAS-WE, CAS and RAS define the operation.
15,39LDQM,UDQMI/O Controls output buffers in read mode and masks input data in write mode.
2,4,5,7,8,10
11,13,42,44
45,47,48,50
51,53
1,3,9,14,27
43,49
6,12,28,41,
46,52,54
36,40NC-Unused.
A0~A11-
DQ0~DQ15I/OMultiplexed data input/output pin.
VCC/VCC Q-Power supply for internal circuits and input buffers.
VSS/VSS Q-Ground terminal.
The system clock input. all other inputs are registered to the SDRAM on
the rising edge of CLK.
Controls internal clock signal and when deactivated, the SDRAM will be one
of the states among power down, suspend or self refresh.
Selects bank to be activated during RAS activity.
Selects bank to be read/written during CAS activity.
Row address : RA0~RA11, Column address : CA0~CA7
3-2 24-bit, 192kHz Stereo DAC : WM8728 (DVD Part IC64)
Pin No.Pin NameI/ODescription
1LRCINI
2DINI
3BCKINIAudio data bit clock input.
4MCLKIMaster clock input.
5ZEROOInfinite zero detect flag.
6DGND-Digital ground supply.
7DVDD-Digital positive supply.
8VOUTRORight channel DAC output.
9AGND-Analog ground supply.
10AVDD-Analog positive supply.
11VOUTLOLeft channel DAC output.
12VMIDOMid rail decoupling point.
13VREFN-DAC negative reference.
14VREFP-DAC positive reference.
15CSBIWLI
16MODEIControl mode selection.
17MUTEB-Mute control. "L" = Mute on, "H" = Mute off
18SDIDEM-
19SCKDSDI
20LAT12SI
DAC sample rate clock input : PCM input mode
Right channel DSD bitstream input : DSD input mode
Serial audio data input : PCM input mode
Left channel DSD bitstream input : DSD input mode
Software mode : 3-wire serial control chip select
Hardware mode : Input word length
Software mode : 3 or 2-wire serial control data input
Hardware mode : De-Emphasis select
Software mode : 3 or 2-wire serial control clock input
Hardware mode : DSD bitstream operation select
Software mode : 3-wire serial control load input
Hardware mode : Input data format selection
9
CIRCUIT DESCRIPTION
BIAS
8 V02
7 PVCC
6 SVCC
5 VIN2
1GND
2VO1
3VCTL
4VIN1
TSD
LOGIC SWITCH
PRE DRIVER
DRIVER OUT
3-3 Flash Memory : SST39VF800A904 (DVD Part IC66)
Pin No.Pin NameI/ODescription
1~8, 16~25,48A0~A18IAddress Inputs
29,31,33,35,38,40
42,44
30,32,34,36,39,41,43DQ8~DQ14I/OData Input/Outputs
45DQ15I/OData Input/Outputs or Address input
26CE-Chip Enable
28QE-Output Enable
11WE-Write Enable
12RP-Reset/Block Temporary Unprotect
15RY/BYOReady/Busy/Output(Unused)
47BYTE-Byte/Word Organization
37VCC-Supply Voltage
27,46VSS-Ground
3-4 HEX Inverter (Single Stage) : M74HCU04 (DVD Part IC67)
1GND-Ground
2VO1OOutput 1
3VCTLIMotor speed control
4VIN1IInput 1
5VIN2IInput 2
6SVCC-Supply voltage (Signal)
7PVCC-Supply voltage (Power)
8VO2OOutput 2
VEE1, VEE2-VEE (-5V)
CrOUT, CbOUT,
YOUT2,YOUT1,
COUT,VOUT
OVideo output
Internal Block Diagram
10
DVR-6100/6100K
CIRCUIT DESCRIPTION
3-7 Stereo Audio ADC : VM8739 (DVD Part IC70) M Type only
Pin No.Pin NameI/OPin Description
1SDINI3-wire MPU data input/2-wire MPU data input.
2SCLKI3-wire MPU clock input/2-wire MPU clock input.
3XTI/MCLKICrystal input or master clock input (MCLK).
4XTOOCrystal output.
5DCVDD-Digital core VDD.
6DGND-Digital GND.
7DBVDD-Digital buffers VDD.
8BCLKI/O Digital audio port clock.
9,10DNC-Unused.
11ADCDATOADC digital audio data output.
12ADCLRCI/O ADC sample rate clock.
13NC-Unused.
14AVDD-Analog VDD.
15AGND-Analog GND.
16VMIDOMid-rail reference decoupling point.
17R INIRight channel line input (AC coupled).
18L INILeft channel line input (AC coupled).
19MODEIControl interface selection, pull up (on power up only).
20CSBI3-wire MPU chip select/2-wire MPU interface address selection.
3-8 Volume Control IC: M62446AFP (Main B' D IC11)
Pin No.Pin NameI/OPin Description
1~4OUT(4~1)OUnused.
5AVDD-Power supply (+7.0V) for analog.
6SWinIVolume input for SW channel.
7,10,12,14GND(S,C,R,L)-Analog ground.
8SRinIVolume input for SR channel.
9SLinIVolume input for SL channel.
11CinIVolume input for center channel.
13RinITone input for FR channel.
15LinITone input for FL channel.
16,17BYPASS(R,L)IInput pin of the volume input selector when bypass.
18,25LTRE/RTRE-Frequency characteristic setting pin in the tone control (Treble).
19,24,20,
23,21,22
26,28CR2/CL2OTone output.
27,29CR1/CL1IInput pin of the main volume.
30AVSS-Power supply (-7.0V) for analog.
31L OUTOOutput pin of the main volume.
32R OUTOOutput pin of the main volume.
33~36C/SL/SR/SW(OUT)OOutput pin of the main volume.
37AGND-Analog ground.
38DGND-Digital ground.
39LATCHILatch input.
40DATAIInput pin of the serial data.
41CLKIClock input.
42DVDD-Power supply (+5.0V) for digital.
LBASS3/RBASS3
LBASS2/RBASS2-Frequency characteristic setting pin in the tone control (Bass).
LBASS1/RBASS1
11
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