Kenwood DVF-R5060, DVF-R5060S Service Manual

70%
MULTIPLE DVD/VCD/CD PLAYER
76
0
POWER
ON OFF
4
¢
DISC SKIP
SEQUENCE
MODE
DISC 1
DISC 2
DISC 3 DISC 4
DISC 5
AUDIO
OUTPUT
VIDEO
OUTPUT
S-VIDEO
AV
OPTICALCOAXIAL
L
R
DVF-R5060/R5060-S
SERVICE MANUAL
© 2002-8 PRINTED IN KOREA B51-5808-00 (K/K) 1348
This manual is available for Europe and Australia markets.
Knob(POWER) * (K27-)
Top cover * (A01-)
Cabinet panel * (A60-)
Con din socket (E68-0018-08)
Crystal Window * (B10-)
Con phono socket (E63-1244-08)
Button * (K29-)
Button * (K27-)
AC power cord bushing (J42-0350-08)
Con scart dual (E40-8779-08)
In compliance with Federal Regulations, following are repro­duction of labels on, or inside the product relating to laser product safety.
Caution : No connection of ground line if disassemble
the unit. Please connect the ground line on
rear panel, PCBs, Chassis and some others.
Con phono socket (E63-1227-08)
Oscillating module (GP1F32T)
KENWOOD Corp. certifies this equipment conforms to DHHS Regulations No.21 CFR 1040. 10, Chapter 1, subchapter J.
DANGER : Laser radiation when open and interlock defeated. AVOID DIRECT EXPOSURE TO BEAM.
AC power cord * (E30-)
* Refer to parts list on page24.
Batteries(R6/AA) ...(2)
Please confirm that the following accessories are present.
Audio video cord (Red, White, Yellow) ...(1) (E30-2990-08)
Remote control unit ...(1) (A70-1570-08)
Coaxial cable ...(1) (E30-7235-08)
DVF-R5060/R5060-S
The marking of products using lasers
(For countries other than U.S.A., U.S.-Military and Canada)
The marking this product has been classified as Class 1. It means that there is no danger of hazardous radiation outside the product. Location: Back panel
CLASS 1
LASER PRODUCT
Operation to reset
÷ Please note that resetting the microprocessor clears the
contents stored in, it returns the microprocessor to the con­dition when it left the factory.
1 In Power ON condition, keep the DISC 3 key and the 4
(Skip) key pressed at the same time.
2 When both keys are pressed, the region code of the unit,
the software version, etc. will be displayed on the dis­play. (When nothing is done, the display of this informa­tion continues.) Example: 72. 14.02:05
3 Press the DISC 4 key and the
44
44
4 key at the same time.
"BYE" will be shown on the display.
4 Press the POWER ON/OFF switch to go to Power OFF. 5 When Power ON is performed with the POWER ON/OFF
switch, the settings become the default factory settings.
The microprocessor may fall into malfunction (impos­sibility to operate erroneous display, etc.) when the power cord is unplugged while power is ON or due to an external factor. In this case, execute the following procedure to reset the microprocessor and return it to normal condition.

CONTENTS / ACCESSORIES / CAUTIONS

Contents

CONTENTS / ACCESSORIES / CAUTIONS............. 2
DISASSEMBLY FOR REPAIR....................................3
BLOCK DIAGRAM ......................................................4
CIRCUIT DESCRIPTION ............................................5
PC BOARD .............................................................. 10

Accessories

SCHEMATIC DIAGRAM .......................................... 16
EXPLODED VIEW ....................................................22
PARTS LIST..............................................................24
SPECIFICATIONS ......................................Back cover

Cautions

2
DVF-R5060/R5060-S
PLASTIC PLATE
2
3
4
4
44
1
POWER SWITCH LEVER

DISASSEMBLY FOR REPAIR

1.How to open the tray if it does not come out. (Fig.1)
1. Remove the plastic plate.
2. Turn the gear fully CCW using a flat driver and so on in the drawing through the hole on the loading chassis bottom.
3. Pull out the tray frontward by hand when it comes just out.
2.How to remove the DVD mechanism. (Fig.2)
1. Remove connectors (1~3) and power switch lever.
2. To separate the DVD mechanism, remove screws (4x4) and pull it out backward.
Fig. 1
Fig. 2
3
AC CORD
+8V ANALOG VCC
-8V ANALOG VCC +5V DIGITAL VCC +3.3V DIGITAL VCC +9V MOTOR VCC 5V FRONT
IC91 FL
M29W800AT
8MBIT
FLASH MEMORY
IC41
HY57V641620HGT
SDRAM-64MBIT
IC31
125MHz
IC21
MPEG
STI5519
IC32
DAC
WM8728
L.P.F
L.P.F
BA4560F
MUTE
JK82
Lch
Rch
MIXED
CVBS-VIDEO
JK83A
JK83B S-VIDEO
Y
JK84
Cr
Cb
RCA 3V
BUFFER COAXIAL
JK81
OPTICAL
IC85
IC51
74HCU04 HEX INVERTER
IC22
EEPROM M24C02
Q31R
Q31L
+12V ANALOG VCC
IC33
TR BUFFER & B.N.F.
Q20S,21S
Q20Y,21Y
TR BUFFER & B.N.F.
& B.N.F.
TR BUFFER
Q20C,21C
Q20R,21R
TR BUFFER & B.N.F.
Q20G,21G
Q20B,21B
TR BUFFER & B.N.F.
& B.N.F.
TR BUFFER
SCART PART
RCA PART
JK71
+5VS
FL AC
FL AC
-27V
ADDR+
F-WE
F-DE
F-RESET
ADDR+
D-RAS0-
RDNOTWR
DATA +
D-CAS0-
D-CAS1-
F-CE
F-OE(DRAM OE)
VFD DATA OUT
VFD DATA IN
+5V6S
IR REMOCON
IRQ2
+3V3-RESET
EXIT-DATA
EXIT-BCLK
EXIT-DATAVALID
EXT-PSTART/ERROR
F/E SDATA
+9V MOTOR VCC
+3.3V DIGITAL VCC
+5V DIGITAL VCC
F/E SCL
PCM1748E-DATA
PCM1748-CS
PCM1748-CLK
PCMCLK
LRCLK
BCK
AUDIO MUTE
CVBS-OUT
Y-OUT
C-OUT
GND
SPDIF
VIDEO MUTE
PIXCLK-27MHz
SDA SCL
L AUDIO
R AUDIO
F-OE(DRAM OE)
DATA +
VFD CLK
POWER CTL
VFD STB
SLIDER-OUT(DRAWER-CW-CTRL)
SLIDER-OPEN/CLOSE(POWER-POSITION-P1)
SLIDER-IN(DRAWER-CCW-CTRL)
C-OUT
Y-OUT
CVBS-OUT
G(Y)-OUT
B(Cb)-OUT
R(Cr)-OUT
G(Y)-OUT
B(Cb)-OUT
R(Cr)-OUT
Rch OUT
CVBS-OUT
BLUE-OUT
RED-OUT
GREEN-OUT
Lch OUT
SMPS
TVM MECHA F/E & MECHA
DVF-R5060
4
DVF-R5060/R5060-S

BLOCK DIAGRAM

DVF-R5060/R5060-S

CIRCUIT DESCRIPTION

1. Pin Description of MPEG Processor IC (Main, IC21)

Pin No. Pin Name I/O Pin Description
PIOs and communication
1 PIO2(5) RGB SEL(BLANK) I/O RGB sel (blank). E/T type only 2 PIO2(6) VIDEO MUTE I/O Video mute control. 3 PIO2(7) 16: 9 INDICATOR I/O 16 : 9 indicator (E/T type only) 6 PIO3(0) SCART H (TV/AUX) I/O RGB sel (blank). E/T type only 7 PIO3(1) I/O Unused. 8 PIO3(2) CSB O Unused.
9 PIO3(3) SDIN O Unused. 10 PIO3(4) IR REMOCON I/O Unused. 11 PIO3(5) SCLK O Unused. 12 PIO3(6) I/O Unused. 13 PIO3(7) DVD RESET I/O Power- on reset of front-end module.
Front-end
16 B DATA I I2S Data 17 B BCLK I I2S Bit clock 18 B FLAG I I2S Error flag 19 B SYNC I/O I2S Sector / ABS time
Reserved
20 B WCLK I/O Unused. 21 B V4 I/O Unused. 22 NRSS OUT I/O Unused. 23 VDD RGB - Supply voltage for RGB (+2.5VA). 24 VSS RGB - GND
Video DAC
25,26,27 B/G/R (OUT) O B/G/R signal outputs.
28 V REF RG I Reference voltage input for DAC RGB. 29 I REF RG I Reference current input for DAC RGB. 30 VDD YCC - Supply voltage for YCC (+2.5VA). 31 VSS YCC - GND
32~34 Y/C/CV (OUT) O Y/C/CV signal outputs.
35 V REF YCC I Reference voltage input for DAC YCC. 36 I REF YCC I Reference current input for DAC YCC.
PIOs and communication
39 PIO4(0)HP MUTE - Unused. 40 PIO4(1) - Unused. 41 PIO4(2) DAC SCKDSD O DAC system clock output. 42 PIO4(3) DAC SDIDEM O DAC data output. 43 PIO4(4) DAC MUTEB O DAC mute control. 44 PIO4(5) DAC LAT12S O DAC latch output. 45 PIO4(6) DAC CSBIWL O DAC chip select. 46 PIO4(7) ZERO I/O Zero data flag.
Audio DAC
48 VDD PCM - Supply voltage for PCM (+2V5). 49 VSS PCM - Ground for PCM. 51 DAC SCLK (BCK) O DAC over sampling clock. 52 DAC PCMOUT0 (DATA) O DAC PCM data out 0. 53 DAC PCMOUT1 O DAC PCM out 1 (unused). 54 DAC PCMOUT2 O DAC PCM out 2 (unused). 55 DAC PCMCLK O DAC PCM clock. 56 DAC LRCLK O DAC PCM Left/Right clock. 57 SPDIF OUT O Audio digital data output.
Shared memory interface
58~63 SMI ADR(4~9) O SDRAM address bus. 66~69 SMI ADR(3~0) O SDRAM address bus.
5
DVF-R5060/R5060-S
CIRCUIT DESCRIPTION
Pin No. Pin Name I/O Pin Description
70~73 SMI ADR(10~13) O SDRAM address bus.
74 SMI CS(0) O Chip select bank 0. 75 SMI CS(1) - Unused. 76 SMI RAS O SDRAM RAS 77 SMI CAS O SDRAM CAS 78 SMI WE O SDRAM write enable 79 SMI DQML O DQ MASK enable low. 80 SMI DQMU O DQ MASK enable up. 82 SMI CLKIN I SDRAM clock input.
84~93 SMI DATA(0~9) I/O SDRAM data bus.
95 SMI CLKOUT O SDRAM clock out.
97~102 SMI DATA(10~15) I/O SDRAM data bus.
Reserved
103 ADC SCLK I/O Unused. 104 ADC LRCLK I/O Unused. 105 ADC DATA I Unused. 106 ADC PCMCLK O Unused.
JTAG
109 TRST4 I Test reset from emulator module. 110 TMS I Test mode select. 111 TDO O Test data out to emulator module. 112 TDI I Test data input from emulator module. 113 TCK I Test clock input from emulator module.
Timers
114 PWM2 I/O Unused. 115 PWM1 I/O ROM boot option port (voltage low = emulator booting). 116 PWM0 I/O Unused.
EMI Interface
117 CPU OE I/O Flash ROM output enable. 118 CPU PRO CLK O SDRAM clock (unused).
Clock & Reset
120 PIX CLK I 27MHz main clock input. 122 VDD PLL - Supply voltage for PLL (+2V5). 123 VSS PLL - Ground for PLL. 124 RESET I Chip reset input.
Interrupt
125 IRQ(2) I Interrupt request 2 from front-end module. 126 IRQ(1) I Unused. 127 IRQ(0) I Unused.
EMI Interface
128 CPU BE(0) O BYTE 0 Enable 129 CPU BE(1) O BYTE 1 Enable 130 CPU RW O Unused. 131 CPU WAIT I Wait state (connected to ground). 132 CPU CE(3) O Flash ROM chip select. 133 CPU CE(2) O Flash ROM down-load JIG module select. 134 CPU CE(1) O Unused. 135 CPU CE(0) O Unused. 138 CPU RAS1 I/O Unused. 139 CPU CAS0 O Unused.
140 CPU CAS1 O Unused. 141~148 CPU DATA(0~7) I/O Flash ROM data input/output (0~7). 151~158 CPU DATA(8~15) I/O Flash ROM data input/output (8~15). 161~170 CPU ADR(1~10) O Flash ROM address (1~10). 173~183 CPU ADR(11~21) O Flash ROM address (11~21).
6
DVF-R5060/R5060-S
CIRCUIT DESCRIPTION
Pin No. Pin Name I/O Pin Description
PIOs and communication
186 PIO0(0) T STROBE I/O UART0 data 187 PIO0(1) MOD SW I/O ATAPI RD 188 PIO0(2) O VFD strobe output. 189 PIO0(3) O VFD clock output. 190 PIO0(4) O VFD data output. 191 PIO0(5) I Data input from VFD.
PIO0(6) SLIDER SENSOR
192
193
194 PIO1(0) SDA I/O SSC0 data (MTSR out / MRST in) 195 PIO1(1) SCL I/O SSC0 clock
196
197 PIO1(3) TXD(JIG) I/O UART2 TXD 200 PIO1(4) RXD(JIG) I/O UART2 RXD 201 PIO1(5) FRONT TXDI I/O UART1 TXD 202 TRIGGER IN I/O Trigger input from JIG. 203 TRIGGER OUT I/O Trigger output from JIG. 204 PIO2(0) - Unused. 205 PIO2(1) FRONT RXD I/O UART1 RXD 206 PIO2(2) I Unused. 207 PIO2(3) - Unused. 208 PIO2(4) AUDIO MUTE O Audio mute control.
Power supply
4,47,81,107
136,159,184
14,37,64,94
119,149,171
198
5,15,38,50,65
83,96,108,121
137,150,160 172,185,199
OPEN/CLOSE (DRAWER POSITION ) PIO0(7) SLIDER IN (DRAWER CCW/CTRL)
PIO1(2) SLIDER OUT (DRAWER CW CTRL)
VDD3 3 - 3.3V Power supply.
VDD2 5 - 2.5V Power supply.
VSS - GND
I/O Detection port of slider sensor for DVD mechanism.
I/O Control port of slider (IN) for DVD mechanism.
I/O Control port of slider (OUT) for DVD mechanism.
7
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