Jvc XV-SA72-SL Service Manual

XV-SA70BK/XV-SA72SL

SERVICE MANUAL

DVD AUDIO/VIDEO PLAYER

XV-SA70BK / XV-SA72SL

EN ------- Northern Europe UJ ----------- USA Military

Area Suffix

(XV-SA70BK)

Contents

Area Suffix

(XV-SA72SL)

B -------------------------- U.K. E --- Continental Europe EN ---- Northern Europe

(For only Europe)

(This illustration is version EN)

VIDEO CD

(For only Asia)

EE - Russian Federation US ------------- Singapore UW -- Brazil,Mexico,Peru

Each difference point

Model XV-SA70BK XV-SA72SL

Body color

Black Silver

Safety precautions ------------------------ 1-2 Preventing static electricity ------------- 1-3 Precautions for service ------------------ 1-4 Important for laser products ------------ 1-5

This service manual is printed on 100% recycled paper.

Disassembly method -------------------- 1-6 Adjustment method ---------------------- 1-15 Troubleshooting -------------------------- 1-19 Description of major ICs ---------------- 1-23 Glossary of term and abbreviations -- 1-44

No.A0022

Oct. 2001

XV-SA70BK/XV-SA72SL

1. This design of this product contains special hardware and many circuits and components specially for safety purposes. For continued protection, no changes should be made to the original design unless authorized in writing by the manufacturer. Replacement parts must be identical to those used in the original circuits. Services should be performed by qualified personnel only.

2. Alterations of the design or circuitry of the product should not be made. Any design alterations of the product should not be made. Any design alterations or additions will void the manufacturer`s warranty and will further relieve the manufacture of responsibility for personal injury or property damage resulting therefrom.

3. Many electrical and mechanical parts in the products have special safety-related characteristics. These

characteristics are often not evident from visual inspection nor can the protection afforded by them necessarily be obtained by using replacement components rated for higher voltage, wattage, etc. Replacement parts which have these special safety characteristics are identified in the Parts List of Service Manual. Electrical components having such features are identified by shading on the schematics and by ( ) on the Parts List in the Service Manual. The use of a substitute replacement which does not have the same safety characteristics as the recommended replacement parts shown in the Parts List of Service Manual may create shock, fire, or other hazards.

4. The leads in the products are routed and dressed with ties, clamps, tubings, barriers and the like to be separated from live parts, high temperature parts, moving parts and/or sharp edges for the prevention of electric shock and fire hazard. When service is required, the original lead routing and dress should be observed, and it should be confirmed that they have been returned to normal, after re-assembling.

5. Leakage current check (Electrical shock hazard testing) After re-assembling the product, always perform an isolation check on the exposed metal parts of the product (antenna terminals, knobs, metal cabinet, screw heads, headphone jack, control shafts, etc.) to be sure the product is safe to operate without danger of electrical shock. Do not use a line isolation transformer during this check.

Plug the AC line cord directly into the AC outlet. Using a "Leakage Current Tester", measure the leakage current from each exposed metal parts of the cabinet, particularly any exposed metal part having a return path to the chassis, to a known good earth ground. Any leakage current must not exceed 0.5mA AC (r.m.s.).

Alternate check method Plug the AC line cord directly into the AC outlet. Use an AC voltmeter having, 1,000 ohms per volt or more sensitivity in the following manner. Connect a 1,500 10W resistor paralleled by a 0.15 F AC-type capacitor between an exposed metal part and a known good earth ground. Measure the AC voltage across the resistor with the AC voltmeter. Move the resistor connection to each exposed metal part, particularly any exposed metal part having a return path to the chassis, and measure the AC voltage across the resistor. Now, reverse the plug in the AC outlet and repeat each measurement. Voltage measured any must not exceed 0.75 V AC (r.m.s.). This corresponds to 0.5 mA AC (r.m.s.).

0.15 F AC TYPE

1500 10W

Good earth ground

AC VOLTMETER (Having 1000 ohms/volts, or more sensitivity)

Place this probe on each exposed metal part.

!

1. This equipment has been designed and manufactured to meet international safety standards.

2. It is the legal responsibility of the repairer to ensure that these safety standards are maintained.

3. Repairs must be made in accordance with the relevant safety standards.

4. It is essential that safety critical components are replaced by approved parts.

5. If mains voltage selector is provided, check setting for local voltage.

Burrs formed during molding may be left over on some parts of the chassis. Therefore, pay attention to such burrs in the case of preforming repair of this system.

In regard with component parts appearing on the silk-screen printed side (parts side) of the PWB diagrams, the parts that are printed over with black such as the resistor ( ), diode ( ) and ICP ( ) or identified by the " " mark nearby are critical for safety. When replacing them, be sure to use the parts of the same type and rating as specified by the manufacturer. (Except the J and C version)

1-2

XV-SA70BK/XV-SA72SL

Preventing static electricity

Electrostatic discharge (ESD), which occurs when static electricity stored in the body, fabric, etc. is discharged, can destroy the laser diode in the traverse unit (optical pickup). Take care to prevent this when performing repairs.

1.1. Grounding to prevent damage by static electricity

Static electricity in the work area can destroy the optical pickup (laser diode) in devices such as DVD players. Be careful to use proper grounding in the area where repairs are being performed.

1.1.1. Ground the workbench

1. Ground the workbench by laying conductive material (such as a conductive sheet) or an iron plate over it before placing the traverse unit (optical pickup) on it.

1.1.2. Ground yourself

1. Use an anti-static wrist strap to release any static electricity built up in your body.

(caption) Anti-static wrist strap

Conductive material (conductive sheet) or iron plate

1.1.3. Handling the optical pickup

1. In order to maintain quality during transport and before installation, both sides of the laser diode on the replacement optical pickup are shorted. After replacement, return the shorted parts to their original condition. (Refer to the text.)

2. Do not use a tester to check the condition of the laser diode in the optical pickup. The tester's internal power source can easily destroy the laser diode.

1.2. Handling the traverse unit (optical pickup)

1. Do not subject the traverse unit (optical pickup) to strong shocks, as it is a sensitive, complex unit.

2. Cut off the shorted part of the flexible cable using nippers, etc. after replacing the optical pickup. For specific details, refer to the replacement procedure in the text. Remove the anti-static pin when replacing the traverse unit. Be careful not to take too long a time when attaching it to the connector.

3. Handle the flexible cable carefully as it may break when subjected to strong force.

4. It is not possible to adjust the semi-fixed resistor that adjusts the laser power. Do not turn it

1-3

XV-SA70BK/XV-SA72SL

Precautions for Service

Handling of Traverse Unit and Laser Pickup

1. Do not touch any peripheral element of the pickup or the actuator.

2. The traverse unit and the pickup are precision devices and therefore must not be subjected to strong shock.

3. Do not use a tester to examine the laser diode. (The diode can easily be destroyed by the internal power supply of the tester.)

4. To replace the traverse unit, pull out the metal short pin for protection from charging.

5. When replacing the pickup, after mounting a new pickup, remove the solder on the short land which is provided at the center of the flexible wire to open the circuit.

6. Half-fixed resistors for laser power adjustment are adjusted in pairs at shipment to match the characteristics of the optical block. Do not change the setting of these half-fixed resistors for laser power adjustment.

Destruction of Traverse Unit and Laser Pickup by Static Electricity

Laser diodes are easily destroyed by static electricity charged on clothing

or the human body. Before repairing peripheral elements of the traverse unit or pickup, be sure to take the following electrostatic protection:

1. Wear an antistatic wrist wrap.

2. With a conductive sheet or a steel plate on the workbench on which the traverse unit or the pick up is to be repaired, ground the sheet or the plate.

3. After removing the flexible wire from the connector (CN101), short-circuit the flexible wire by the metal clip.

4. Short-circuit the laser diode by soldering the land which is provided at the center of the flexible wire for the pickup. After completing the repair, remove the solder

to open the circuit.

Please refer to "Fig.5" of "Disassembly method" for details.

Short circuit

Servo control board

1-4

Important for Laser Products

XV-SA70BK/XV-SA72SL

1.CLASS 1 LASER PRODUCT

2.DANGER : Invisible laser radiation when open and inter

lock failed or defeated. Avoid direct exposure to beam.

3.CAUTION : There are no serviceable parts inside the Laser Unit. Do not disassemble the Laser Unit. Replace the complete Laser Unit if it malfunctions.

4.CAUTION : The compact disc player uses invisible laser radiation and is equipped with safety switches which prevent emission of radiation when the drawer is open and the safety interlocks have failed or are de feated. It is dangerous to defeat the safety switches.

5.CAUTION : If safety switches malfunction, the laser is able to function.

6.CAUTION : Use of controls, adjustments or performance of procedures other than those specified herein may result in hazardous radiation exposure.

!

Please use enough caution not to see the beam directly or touch it in case of an adjustment or operation check.

REPRODUCTION AND POSITION OF LABEL and PRINT

WARNING LABEL and PRINT

CAUTION: Invisible laser

radiation when open and interlock failed or defeated. AVOID DIRECT EXPOSURE TO BEAM. (e)

VARNING: Osynlig laserstrålning när denna del är öppnad och spärren är urkopplad. Betrakta ej strålen. (s)

ADVARSEL: Usynlig laserstråling ved åbning, når sikkerhedsafbrydere er ude af funktion. Undgå udsættelse for stråling (d)

VARO: Avattaessa ja suojalukitus ohitettaessa olet alttiina näkymättömälle lasersäteilylle. Älä katso säteeseen. (f)

RIGHT LEFTSUBWOOFER

CENTER

REAR

RIGHT

AUDIO OUT

VIDEO

LEFT

FRONT

S-VIDEO

PCM / STREAM

COAXIALOPTICAL

COMPONENT

YP

VIDEO OUTDIGITAL OUT

BPR

CLASS 1 LASER PRODUCT

VIDEO OUT

SELECT

NTSC PAL

AV COMPU LINK

AC IN

1-5

XV-SA70BK/XV-SA72SL

CN711

CN3

JT202 JT102

Surround

audio board

Part a

Disassembly method

Removing the top cover (see Fig.1)

1. Remove the two screws A attaching the top cover on both sides of the body.

2. Remove the three screws B attaching the top cover on the back of body.

3. Remove the top cover from the body by lifting the rear panel of top cover.

ATTENTION : Do not break the front panel tab

fitted to the top cover.

Removing the surround audio board (see Fig.1,2)

*Prior to performing the following procedure, remove

the top cover.

1. Disconnect the card wire from connector CN711 on the

surround audio board.

2. Remove the three screws C attaching the surround audio

board on the rear panel.

A x 2

audio board

B

CN3

CN711

Surround

D

B

C

FastenerFastener

Fig.1

JT202 JT102

Fig.2

D

3. The surround audio board is removed while picking up the

point of the fastener in two places.

Removing the mechanism assembly (see Fig.3,4)

*Prior to performing the following procedure, remove

the top cover.

*There is no need to remove the front panel assembly.

1.Remove the three screws D attaching the mechanism

assembly on the bottom chassis.

2.The servo control board is removed from the connector

CN512 and CN513 connected with the main board respectively.

3.Remove the mechanism assembly by lifting the rear part

of the mechanism assembly.

Removing the servo control board (see Fig.5)

*Prior to performing the following procedure, remove

the top cover and mechanism assembly.

1.Disconnect the card wire from connector CN201 and

CN202 on the servo control board respectively.

2.Disconnect the flexible wire from connector CN101

on the servo control board from pick-up.

Main board

Hook b

CN3

CN201

Mechanism

assembly

CN513

JT202

JT102

D

Fig.3

Fig.4

Part a

CN512

Servo control

board

CN202

Hook b

ATTENTION At this time, please extract the wire after short-circuited of two places on the wire in part a with solder. Please remove the solder two places of part a after connecting the wire with CN101 when reassembling.

3.Two places in hook b are removed, the servo control

board is lifted, and it is removed.

1-6

Servo control board

CN101

Fig.5

Removing the rear panel (see Fig.6)

*Prior to performing the following procedure, remove the top cover.

1.Remove the twelve screws E attaching the rear panel on the back of body.

XV-SA70BK/XV-SA72SL

E

for Asia

E

for Europe

E

Removing the front panel assembly (see Fig.7,8)

* Prior to performing the following procedure, remove the top cover. * There is no need to remove the mechanism assembly.

1.Remove the one screw F attaching the front panel assembly on the bottom chassis.

2.Remove the four screws G attaching the foot on the bottom chassis.

3.Disconnect the wire from CN3, JT102 and JT202 on the main board respectively.

4.Hook c and d are removed respectively, and the front panel assembly is removed.

E

Hook d

G

Hook c

Foot

CN3

E

Fig.6

Foot

F

E

G

Hook d

Fig.7

JT202 JT102

Removing the main board (see Fig.9)

* Prior to performing the following procedure, remove the top cover, surround audio board, mechanism assembly and rear panel.

1.Disconnect the wire from CN3, JT102 and JT202 and on the main board respectively.

2.Remove the four screws H attaching the main board on the bottom chassis.

Fig.8

H

CN3

H

Fig.9

JT102 JT202

H

1-7

XV-SA70BK/XV-SA72SL

Removing the clamper assembly

(See Fig.1)

1.

Remove the four screws A attaching the clamper assembly.

2.

Move the clamper in the direction of the arrow to release the two joints a on both sides.

ATTENTION:

When reattaching, fit the clamper to the two joints a.

Removing the tray (See Fig.2 and 3)

Prior to performing the following procedure, remove the clamper assembly.

1.

Push b of the slide cam into the slot on the left side of the loading base until it stops.

2.

Draw out the tray toward the front.

Joint a

A

Joint a

A

AA

Fig.1

ATTENTION:

Before reattaching the tray, slide the part c of the slide cam to the right as shown in Fig.3.

Clamper base

Push

Tray

b

Fig.2

Part c

Slide cam

Fig.3

1-8

Removing the traverse mechanism assembly (See Fig.4 and 5)

XV-SA70BK/XV-SA72SL

Prior to performing the following procedure, remove the clamper assembly and the tray.

1.

Remove the four screws B attaching the traverse mechanism assembly.

ATTENTION:

Before reattaching the traverse mechanism assembly, pass the card wire extending from the spindle motor board through the notch d of the elevator.

Removing the elevator (See Fig.6 and 7)

Prior to performing the following procedure, remove the clamper assembly, the tray and the traverse mechanism assembly.

1.

Extend each bar e inside of the loading base outward and detach the elevator shaft.

B

Traverse mechanism assembly

B

BB

Fig.4

Traverse mechanism assembly

BB

Elevator

Notch d

ATTENTION:

Elevator

When reattaching, first fit the two shafts on the front of the elevator to the slots f of the slide cam.

Shafts

Slide cam

Elevator

Fig.5

e

Elevator

Loading base

Slots f

e

Fig.6Fig.7

1-9

XV-SA70BK/XV-SA72SL

Removing the motor assembly

(See Fig.8 and 9)

Prior to performing the following procedure, remove the clamper assembly, the tray, the traverse mechanism assembly and the elevator.

1.

Remove the belt from the pulley.

2.

Remove the screw C attaching the motor assembly.

3.

Turn over the body and remove the screw D attaching the motor assembly.

4.

Release the two tabs g retaining the motor board.

Belt

C

Motor assembly

Fig.8

Tabs g

Motor assembly

D

Loading base

Fig.9

1-10

XV-SA70BK/XV-SA72SL

Pulley gear

Pulley gear bracket

Motor assembly

Pulley gear bracket

E

Idle gear

Fig.10

Idle gear

Pulley gear

Tads h

Pulley gear

Removing the Idle gear / pulley gear / middle gear / slide cam (See Fig.10 to 12)

Prior to performing the following procedure, remove the clamper assembly, the tray, the traverse mechanism assembly, the elevator and the motor assembly.

1.

Press the two tabs h inward and pull out the idle gear.

2.

Remove the screw E attaching the pulley gear bracket. Slide the pulley gear bracket in the direction of the arrow and pull out the pulley gear.

3.

Slide the slide cam in the direction of the arrow to release the two joints i and remove upward.

4.

Remove the middle gear.

Slide cam

Joint i

Slide cam

Middle gear

Joint i

Fig.11

Middle gear

Fig.12

Loading base

1-11

XV-SA70BK/XV-SA72SL

Removing the feed motor assembly

(See Fig.13)

1.

Unsolder the two soldering j on the spindle motor board.

2.

Remove the two screws F attaching the feed motor assembly.

Removing the feed motor

(See Fig.13 to 15)

Prior to performing the following procedure, remove the feed motor assembly.

1.

Remove the screw G attaching the thrust spring.

Feed motor assembly

F

Notch k

Soldering j

Spindle motor board

Pickup

Spindle motor

Fig.13

Feed gear (M)

Thrust spring

ATTENTION:

2.

Remove the feed gear (M).

3.

Pull out the feed gear (E) and the lead screw.

4.

Remove the two screws H attaching the feed motor.

ATTENTION:

When reattaching the thrust spring, make sure that the thrust spring presses the feed gear (M) and the feed gear (E) reasonably.

When reattaching, pass the two cables extending from the feed motor through the notch k of the feed holder as shown in Fig.13.

G

Lead screw

Feed gear (E)

Fig.14

Feed motor

1-12

Feed holder

H

Fig.15

XV-SA70BK/XV-SA72SL

Removing the pickup (See Fig.16 and 17)

1.

Remove the screw I attaching the T spring (S) and the shaft holder. Remove also the plate.

ATTENTION:

2.

Pull out the part l of the shaft upward. Move the part m in the direction of the arrow and detach from the spindle base.

3.

Disengage the joint n of the pickup and the shaft in the direction of the arrow.

4.

Pull out the shaft from the pickup.

5.

Remove the two screws J attaching the actuator.

6.

Disengage the joint of the actuator and the lead spring. Pull out the lead spring.

When reattaching, make sure that the T spring (S) presses the shaft.

Shaft holder

I

Plate

T spring (S)

Lead spring

Pickup

Joint n

Part m

Part l

Fig.16

Actuator

J

Actuator

Lead spring

Shaft

Spring

The spring must be under the shaft when you install pick-up.

Removing the shaft holder / shaft

(See Fig.18)

1.

Remove the screw K attaching the shaft holder.

2.

Remove the shaft.

Pick-up

Pickup

K

Shaft

Fig.17

Shaft

Shaft holder

Fig.18

1-13

XV-SA70BK/XV-SA72SL

Removing the spindle motor assembly

(See Fig.19 to 21)

1.

Remove the three screws L attaching the spindle motor on the bottom of the mechanism base.

ATTENTION:

2.

Remove the three screws M attaching the spindle base.

When reattaching, pass the card wire extending from the spindle motor board through the notch of the spindle base.

L

Spindle motor assembly

Spindle motor

Fig.19

Spindle base

L

Fig.20

M

Spindle base

Mechanism base

Fig.21

1-14

XV-SA70BK/XV-SA72SL

Adjustment method

(1) Test mode setting method

1)Take out the disc and close the tray.

2)Unplug the power plug.

3)Insert power plug into outlet while pressing both "PLAY" button and "STOP" button of the main body.

4)The player displays "TEST " on the FL display. " " means the player version.

5)When the power supply is turned off, test mode is released. The mode changes as follows whenever the "CHOICE" button of remote controller is pushed in test mode.

TEST_ _ -----------------------

---------

_ _ _ ------------

CHECK ---------------------------------

FL display becomes all lighting ---

--------------------

Becomes test mode

Device key index

Version of microcomputer

Check mode

Confirmation of FL display

Not use mode

(2) Initialization method

Please initialize according to the following procedures when microprocessor or pick-up is exchanged and when the up-grade is done.

1)Makes to test mode.

2)After "FORWARD SKIP" button ( ) of the main body is pushed, "PAUSE" button is pushed.

3)DVD AUDIO indicator lights when about ten seconds pass. Then, it is initialization completion.

(3) Method of displaying device key index

1)Makes to test mode and initializes.

2)When "CHOICE" button of remote controller is pushed once, the device key index is displayed on the

FL display as follows.

FL Display

is a figure or an alphabet.

(4) Method of displaying version of microcomputer

1)Makes to test mode and initializes

2)When "CHOICE" button of remote controller is pushed twice, the figure is displayed on the FL display as follows.

FL Display

FL Display microcomputer (IC2) Front end microcomputer (IC401)

BACK SKIP Button

(display of current value)

TOP MENU Button

(laser ON)

CURSOR UP Button (firmware upgrade)

CHOICE Button (switch of mode)

27_09_27_FC

POWER

Button

DVD AUDIO

Indicator

(for initialize)

FL Display

PLAY Button

(for test mode or

display of jitter value)

Microcode of decoder Decoder part (IC509)

FORWARD SKIP

Button

(for initialize)

(automatic adjustment or initialize)

STOP

Button

(for test mode)

PAUSE Button

1-15

XV-SA70BK/XV-SA72SL

(5) Display of current value of laser

1)Makes to test mode and initializes

2)When "CHOICE" button of remote controller is pushed three times, It is displayed on the FL display, "CHECK".

3)The display of FL display changes from "CHECK" into "LD_ON" if the "TOP MENU" button of remote controller is pushed.

4)The laser is turned on if the "BACK SKIP" button ( ) of remote controller is pushed in the state, and the current value of the laser is displayed on the FL display.

FL Display

LD_0034

As for the current value of the laser, the figure displayed on the FL display becomes a current value as it is by "mA" unit. becomes 34mA if displayed as 34.

5)The laser changes from CD into DVD if 3) and 4) of the above-mentioned procedures are done after the tray is opened and closed pushing the "OPEN/CLOSE" button of the main body. (The laser changes whenever this is done. Moreover, the value displayed first is a laser electric current of DVD)

If the laser current value is 64mA or less, it is roughly good. There is a possibility to which pick-up is deteriorated, and exchange pick-up, please when there are 65mA or more laser current value.

(6) Display of jitter value

1)Makes to test mode and initializes

2)When "CHOICE" button of remote controller is pushed three times, It is displayed on the FL display, "CHECK".

3)The automatic adjustment starts when test disk (VT-501) is inserted, and "PAUSE" button of the main body is pushed.

4)When the display of the FL display changes into "CHECK OK", the "PLAY" button of the main body is pushed.

5)The jitter value is displayed on the FL display as follows. FL Display

JIT_3978

If the indication value is 11% or less, it can be judged by this simple checking method that the signal read precision of the set is satisfactory. Please do "Flap adjustment of the pick-up guide shaft" when you replace the pick-up and the spindle motor when there are 11% or more jitter value.

The jitter value is displayed by the hexadecimal number and refer to the conversion table of following, please.

1-16

Jitter value

FL display FL display

3818 3828 3838 3848 3858 3868 3878 3888 3898 38A8 38b8 38c8 38d8 38E8 38F8 3918 3928 3938 3948 3958 3968 3978 3988

Conversion value(%)

4.7

4.8

4.9

5.1

5.2

5.3

5.4

5.5

5.7

5.8

5.9

6.0

6.1

6.3

6.4

6.6

6.7

6.9

7.0

7.1

7.2

7.3

7.5

3998 39A8 39B8 39C8 39D8 39E8 39F8 3A18 3A28 3A38 3A48 3A58 3A68 3A78 3A88 3A98 3AA8 3AB8 3AC8 3AD8 3AE8 3AF8

Conversion value(%)

7.6

7.7

7.8

7.9

8.1

8.2

8.3

8.5

8.7

8.8

8.9

9.0

9.1

9.3

9.4

9.5

9.6

9.7

9.9

10.0

10.1

10.2

FL display FL display

3B18 3B28 3B38 3B48 3B58 3B68 3B78 3B88 3B98 3BA8 3BB8 3BC8 3BD8 3BE8 3BF8 3C18 3C28 3C38 3C48 3C58 3C68 3C78 3C88

Conversion value(%)

10.5

10.6

10.7

10.8

10.9

11.1

11.2

11.3

11.4

11.5

11.7

11.8

11.9

12.0

12.1

12.4

12.5

12.7

12.9

13.0

13.1

13.2

3C98 3CA8 3CB8 3CC8 3CD8 3CE8 3CF8 3D18 3D28 3D38 3D48 3D58 3D68 3D78 3D88 3D98 3DA8 3DB8 3DC8 3DD8 3DE8 3DF8

Conversion value(%)

13.3

13.5

13.6

13.7

13.8

13.9

14.1

14.3

14.4

14.5

14.7

14.8

14.9

15.0

15.1

15.3

15.4

15.5

15.6

15.7

15.9

16.0

(7) Flap adjustment of the pick-up guide shaft

Stud (four pieces set)

Parts No. : JIGXVS40

Extension cord set (two cord and two board)

Parts No. : EXTXVS40CB

Hex wrench for adjustment

Off-the-shelf (1.3mm)

Test disc

VT-501 or VT-502

Assistance board

(Connect to main board)

XV-S40

MAIN CONNECT

Extension

cord

XV-SA70BK/XV-SA72SL

XV-S40 CONTROL CONNECT

Assistance board

(Connect to servo control board)

One is not used though it is one

set which consists of four units.

Stud

1.The mechanism assembly is made in the state from the main body from which is detached referring to the disassembly method.

2.Three studs are installed in the mechanism assembly respectively.

3.The servo control board is removed from the mechanism assembly, and puts into the state set up as shown in figure. (Each wire connected by the servo control board this time leaves the connection maintained.) Between shaft and hook of mechanism assembly of figure Board is put And, the board is inclined in the direction of the arrow on figure as much as possible.

4.The extension cord is inserted in the connector of the assistance board respectively. The main board is connected with the servo control board as shown in figure.

Hook

Mechanism assembly

Extension

Assistance

board

cord

Servo control board

Stud

Mechanism assembly

Stud

Servo control board

Shaft

Assistance

Main board

board

1.Puts into the state to display the jitter value on the FL display referring to "Display of the jitter value".

2.The adjustment screw under the traverse mechanism is turned with hex wrench, and matches so that the jitter value displayed on the FL display may become minimum value.

Adjustment screw a Adjustment screw b

<POINT>

1.turns in the forward or the opposite direction, and makes to the position where the jitter value is good the half rotation of adjustment screw a and b(180 degrees) respectively.

Adjustment screw c

2.Afterwards, adjustment screw b and c are turned in the same way, and makes to the best position.

1-17

XV-SA70BK/XV-SA72SL

(8) Upgrading of firmware

Please do the up-grade of the firmware after exchanging IC509,IC512,IC513.

1)The power supply is turned on pushing the "POWER" button.

2)The up-grade disk is inserted.

3)When FL display of the main body changes from "READING" into "UPGRADE", cursor UP button ( ) of remote controller is pushed.

4)The up-grade starts if the entire screen becomes blue and it is displayed, "Upgrade progress".

5)The tray opens automatically, the up-grade disk is removed.

6)The up-grade ends if the tray closes automatically, and the screen returns to the normal screen.

7)Please confirm the version of the microcomputer after makes to test mode and initializes.

Upgrade progress...

Upgrading (blue screen)After inserting the up-grade disk

When up-grade is completed

The disk for the up-grade is usually one piece. The disk becomes two pieces according to the version. In that case, please note the undermentioned content.

* The up-grade is done by using the STEP1 disk according to "1)" and "4)" of the above-mentioned procedure. * The tray opens automatically after a few seconds and exchange for the disk of STEP2, please. * The tray closes automatically. There is only about five second time that the tray opens this time, and replace the disk quickly between those, please.

ATTENTION

When the tray shuts with the STEP1 disk left for the tray

The up-grade starts again and exchange for the STEP2 disk, please when the tray opens automatically.

When the tray closes with there no disk in the tray

The tray opens automatically and turn off the power supply once, please pushing the "POWER" button in the state. When the STANDBY indicator lights, the STEP2 disk is putting in the tray and "POWER" button is pushed.

* After the up-grade ends, the STEP2 disk is removed because the tray opens automatically. * Afterwards, it is the same as 6),7) of the above-mentioned procedures.

1-18

Troubleshooting

Servo volume

Press OPEN /CLOSE key

XV-SA70BK/XV-SA72SL

Is tray

operation

Confirmation of tray drive circuit

N

and circuit in surrounding

correct?

Y

Is the traverse moving along the innermost

N

perimeter for SW detection?

Y

"NO DISC" message appears

Y

immediately after vertical movement of the pick-up lens

N

The state that DISC does not rotate continues for several seconds, and becomes NO DISC or an error display afterwards. The rotation of DISC becomes high-speed and abnormal, and becomes NO DISC or an error display afterwards.

N

Is focus retraction OK?

FE

OFF Even when it retracts correctly, if it is out of focus and makes repeated retries with a clicking sound, it is in error.

ON

See "(4) Focus ON error"

N

in "Check points for individual errors"

Y

Is tracking retraction OK?

See "(3) Traverse movement error" in "Check points for individual errors"

See "(2) Disk detection, distinction error" in "Check points for individual errors"

Y

See "(1) Spindle startup error" in "Check points for individual errors"

Is the inter-layer jump OK?

FE

LO LI

A

Two layers of DVD only.

N

(8) Inter-layer

jump error

Y

TE

OFF

If TE waveform reappears or fails to converge after the TE retraction, it is in error.

ON

Y

Is the spindle servo

locked correctly?

Is the RF OUT waveform

locked correctly?

Y

A

See "(5) Tracking ON error"

N

in "Check points for individual errors"

See "(6) Spindle CLV error"

N

in "Check points for individual errors"

Has the disc information

been collected?

Stop will result

Y

Is playback

N

possible?

Y

OK !

N

(7) Address read

error

Check (9),(10),(11), and (12) items in "Check points for individual errors"

1-19

XV-SA70BK/XV-SA72SL

Check points for each error

(1) Spindle start error

1.Defective spindle motor

*Are there several ohms resistance between each pin of CN201 "5-6","6-7","5-7"? (The power supply is turned off and measured.)

*Is the sign wave of about 100mVp-p in the voltage had from each terminal? [ CN201"9"(H1-),"10"(H1+),"11"(H2-),"12"(H2+),"13"(H3-),"14"(H3+) ]

2.Defective spindle motor driver (IC251)

*Has motor drive voltage of a sine wave or a rectangular wave gone out to each terminal(SM1~3) of CN201"5,6,7" and IC251"2,4,7"?

*Is FG pulse output from the terminal of IC251"24"(FG) according to the rotation of the motor?

*Is it "L(about 0.9V)" while terminal of IC251"15"(VH) is rotating the motor?

3.Has the control signal come from servo IC or the microcomputer?

*Is it "L" while the terminal of IC251"18"(SBRK) is operating? Is it "H" while the terminal of IC251"23"(/SPMUTE) is operating?

*Is the control signal input to the terminal of IC251"22"(EC)? (changes from VHALF voltage while the motor is working.)

*Is the VHALF voltage input to the terminal of IC251"21"(ECR)?

4.Is the FG signal input to the servo IC?

*Is FG pulse input to the terminal of IC201"53"(FG) according to the rotation of the motor?

(2) Disc Detection, Distinction error (no disc, no RFENV)

* Laser is defective. * Front End Processor is defective (IC101). * APC circuit is defective. --- Q101,Q102. * Pattern is defective. --- Lines for CN101 - All patterns which relate to pick-up and patterns between IC101 * Servo IC is defective (IC201). * IC101 --- For signal from IC101 to IC201, is signal output from IC101 "20" (ASOUT) and IC101 "41"(RFENV) and IC101 "22" (FEOUT)?

1-20

(3) Traverse movement NG

1.Defective traverse driver *Has the voltage come between terminal of CN101 "1" and "2" ?

2.Defective BTL driver (IC271) *Has the motor drive voltage gone out to IC271"17" or "18"?

3.Has the control signal come from servo IC or the microcomputer? *Is it "H" while the terminal of IC271"9"(STBY1) ? *TRSDRV Is the signal input? (IC201 "51")

4.TRVSW is the signal input from microcomputer? (IC401 "50")

(4) Focus ON NG

* Is FE output ? --- Pattern, IC101 * Is FODRV signal sent ? (R279) --- Pattern, IC201 "5" * Is driving voltage sent ?

IC271 "13", "14" --- If NG, pattern, driver, mechanical unit .

* Mechanical unit is defective.

(5) Tracking ON NG

XV-SA70BK/XV-SA72SL

* When the tracking loop cannot be drawn in, TE shape of waves does not settle. * Mechanical unit is defective.

Because the self adjustment cannot be normally adjusted, the thing which cannot be normally drawn in is thought. * Periphery of driver (IC271)

Constant or IC it self is defective. * Servo IC (IC201)

When improperly adjusted due to defective IC.

(6) Spindle CLV NG

* IC101 -- "35"(RF OUT), "30"(ARF-), "31(ARF+). * Does not the input or the output of driver's spindle signal do the grip? * Has the tracking been turned on? * Spindle motor and driver is defective. * Additionally, "IC101 and IC201" and "Mechanism is defective(jitter)", etc. are thought.

(7) Address read NG

* Besides, the undermentioned cause is thought though specific of the cause is difficult because various factors are thought.

Mechanism is defective. (jitter)

IC201, IC301, IC401.

The disc is dirty or the wound has adhered.

(8) Between layers jump NG (double-layer disc only)

Mechanism defective Defect of driver's IC(IC271) Defect of servo control IC(IC201)

1-21

XV-SA70BK/XV-SA72SL

(9) Neither picture nor sound is output

1.It is not possible to search *Has the tracking been turned on? *To

"(5) Tracking ON NG" in "Check points for each error"

*Is the feed operation normal? To "(3) traverse movement NG" in "Check points for each error" when it is not normal. Are not there caught of the feeding mechanism etc?

(10) Picture is distorted or abnormal sound occurs at intervals of several seconds.

Is the feed operation normal? Are not there caught of the feeding mechanism etc?

(11) Others

The image is sometimes blocked, and the image stops. The image is blocked when going to outer though it is normal in surroundings in the disk and the stopping symptom increases.

when the tracking is not normal.

There is a possibility with bad jitter value for such a symptom.

(12) CD During normal playback operation

a) Is TOC reading normal? Displays total time for CD-DA. Shifts to double-speed mode for V-CD.

YES

NO

b)Playback possible?

*--:-- is displayed during FL search. According to [It is not possible to search ] for DVD(9), check the feed and tracking systems. *No sound is output although the time is displayed.(CA-DA) DAC, etc, other than servo. *The passage of time is not stable, or picture is abnormal.(V-CD) *The wound of the disc and dirt are confirmed.

1-22

Description of major ICs

AK93C65AF-X(IC403):EEPROM

1.Pin layout

XV-SA70BK/XV-SA72SL

PE

VCC

CS

SK

1

2

3

4

2.Block diagram

DI

CS

8

7

6

5

INSTRUCTION

REGISTER

NC

GND

DO

DI

INSTRUCTION

DECODE,

CONTROL

AND

CLOCK

GENERATION

DATA

REGISTER

ADD.

BUFFERS

16

R/W AMPS

AND

AUTO ERASE

DECODER

DO

16

EEPROM

4096bit

256 x 16

SK

PE

3.Pin function

Pin No.

1 2 3 4 5 6 7 8

Symbol

PE

VCC

CS SK

DI

DO

GND

NC

Program enable (Resistance with built-in pull-up) Power supply terminal Chip select Serial clock input Serial data input Serial data output Connect to ground Non connect

Description

Attention : Resistors of pin No.1(PE) are 2.5M ohm.

VREF

VPP SW

VPP

GENERATOR

1-23

XV-SA70BK/XV-SA72SL

AN8702FH(IC101):Frontend processor

1.Pin layout

HDTYPE

VIN12

VIN11

GND1

VIN4

VIN3

VIN2

VIN1

VREF1

VCC1

VIN10

VIN9

VIN8

VIN7

646362616059585756555453525150

VIN6

VIN5 49

2.Pin function

Pin No.

1 2 3 4 5 6 7 8 9

10

11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33

Symbol

PC1

PC01

PC2

PC02

TGBAL

TBAL FBAL

POFLT

DTRD

IDGT

STANDBY

SEN SCK

STDI RSEL JLINE

TEN

TEOUT

ASN

ASOUT

FEN

FEOUT

VSS

TG

VDD

GND2

VREF2

VCC2

VHALF DFLTON DFLTOP

DSFLT

GND3

1

PC1

2

PC01

3

PC2

4

PC02

5

TGBAL

6

TBAL

7

FBAL

8

POFLT

9

DTRD

10

IDGT

SEN SCK

STDI RSEL JLINE

11 12 13 14 15 16

171819202122232425262728293031

TEN

TEOUT

STANDBY

I/O Description

Laser input terminal (DVD)

I

O

Laser drive signal output terminal (DVD)

I

Laser input terminal (CD)

O

Laser drive signal output terminal (CD)

I

Tangential phase balance control terminal

I

Tracking balance control terminal

I

Focus balance control terminal

O

Track detection threshold level terminal

I

Data slice part data read signal input terminal (For RAM)

I

Data slice part address part gate signal input terminal( For RAM)

I

Standby mode control terminal

I

SEN(Serial data input terminal)

I

SCK(Serial data input terminal)

I

STDI(Serial data input terminal)

I

Standard electric current terminal

I

Electric current setting terminal of JLine

Reversing input terminal of tracking error output AMP.

I

Tracking error signal output terminal

O

Offset adjusting terminal 1

I

Full adder signal output terminal

O

Focus error output amplifier reversing input terminal

I

Focus error signal output terminal

O

Connect to GND

-

Tangential phase error signal output terminal

O

Power supply terminal 3V

-

Connect to GND

-

VREF2 voltage output terminal

O

Power supply terminal 5V

-

VHALF voltage output terminal

O

Reversing output terminal of filter AMP.

O

Filter AMP. output terminal

O

Capacity connection terminal for filter output

I

Connect to GND

-

AN8702FH

FEN

ASN

FEOUT

ASOUT

VSS

48

RFINN RFINP

47

TESTSG

46

AGCO

45

AGCG

44

PEAK

43 42

BOTTOM

41

RFENV

40

BDO

39

OFTR

38

DCRF

37

RFC

36

VCC3

35

RFOUT

34

RFDIFO

33

GND3

32

TG

VDD

VCC2

GND2

VREF2

Pin No.

Symbol I/O Description

34

RFDIFO

35

RFOUT 36 37 38 39 40 41

RFENV 42

BOTTOM 43 44

AGCG

45

AGCO

46

TESTSG

47

RFINP

48

RFINN 49 50 51 52 53 54 55 56

VREF1

57

58

59

60

61 62 63 64

HDTYPE

VHALF

VCC3

RFC DCRF OFTR

BDO

PEAK

VIN5 VIN6 VIN7 VIN8

VIN9 VIN10 VCC1

VIN1

VIN2

VIN3

VIN4

GND1 VIN11 VIN12

DSFLT

DFLTOP

DFLTON

Radial differential motion output terminal

O

Connect to TP101

-

Power supply terminal 5V

-

Filter for RF delay correction AMP.

O

All addition amplifier capacitor terminal

O

OFTR output terminal

O

BDO output terminal

O

RF envelope output terminal

O

Bottom envelope detection filter terminal

O

Peak envelope detection filter terminal

O

AGC amplifier gain control terminal

O

AGC amplifier level control terminal

O

TEST signal input terminal

I

RF signal positive input terminal

I

RF signal negative input terminal

I

Focus input of external division into two terminal

I

Focus input of external division into two terminal

I

Non connect

-

Non connect

-

Focus input of external division into two terminal

I

Focus input of external division into two terminal

I

Power supply terminal 5V

-

VREF1 voltage output terminal

O

External division into four (DVD/CD) RF input

I

terminal 1 External division into four (DVD/CD) RF input

I

terminal 2 External division into four (DVD/CD) RF input

I

terminal 3 External division into four (DVD/CD) RF input

I

terminal 4 Connect to GND

-

3 beam sub input terminal 2 (CD)

I

3 beam sub input terminal 1 (CD)

I

Connect to ground

-

1-24

BA5983FM-X (IC271) : 4CH Driver

1.Block diagram

27

26

25

28

Vcc

10k

24

20k

23 22

10k

20k

21

STAND BY CH4

20

Vcc

19

10k

18

Level Shift

XV-SA70BK/XV-SA72SL

17 16

10k

15

10k

Level Shift

10k

1

2

3

5

4

6

7

2.Pin function

Pin No. Pin No.

Symbol Symbol

1

BIAS IN

2

OPIN1(+)

3

OPIN1(-)

4

OPOUT1

5

OPIN2(+)

6

OPIN2(-)

7

OPOUT2

8

9 10 11 12 13 14

GND

STBY1

PowVcc1

VO2(-)

VO2(+)

VO1(-)

VO1(+)

I/O I/O

Input for Bias-amplifier

I

Non inverting input for CH1 OP-AMP

I

Inverting input for CH1 OP-AMP

I

Output for CH1 OP-AMP

O

Non inverting input for CH2 OP-AMP

I

Inverting input for CH2 OP-AMP

I

Output for CH2 OP-AMP

O

Substrate ground

Input for CH1/2/3 stand by control

I

Vcc for CH1/2 power block

Inverted output of CH2

O

Non inverted output of CH2

O

Inverted output of CH1

O

Non inverted output of CH1

O

Description

15 16 17 18 19 20 21 22 23 24 25 26 27 28

STAND BY CH1/2/3

89

VO4(+) VO4(-) VO3(+) VO3(-)

PowVcc2

STBY2

GND OPOUT3 OPIN3(-)

OPIN3(+) OPOUT4

OPIN4(-)

OPIN4(+)

PreVcc

Level Shift

10k

Vcc

10

10k

11

12

10k

13

Description

O

Non inverted output of CH4

O

Inverted output of CH4

O

Non inverted output of CH3

O

Inverted output of CH3

-

Vcc for CH3/4 power block

I

Input for Ch4 stand by control

-

Substrate ground

O

Output for CH3 OP-AMP

I

Inverting input for CH3 OP-AMP

I

Non inverting input for CH3 OP-AMP

O

Output for CH4 OP-AMP

I

Inverting input for CH4 OP-AMP

I

Non inverting input for CH4 OP-AMP

-

Vcc for pre block

10k

14

74LCX373MTC-X(IC512,IC513)

1.Pin layout

1

OE

2

Q0

3

D0

4

D1

5

Q1

6

Q2

7

D2

8

D3

9

Q3

10

GND

20 19 18 17 16 15 14 13 12 11

2.Pin function

VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 LE

Symbol Description

D0~D7

LE

OE

Q0~Q7

Data inputs Latch enable input Output enable input 3-State latch outputs

3.Truth table

INPUTS OUTPUTS

LE

X

H

OE

H L L

L

Dn

X

L H X

H = HIGH Voltage level L = LOW Voltage level Z = High impedance X = Immaterial Q0 = Previous Q0 before HIGH to LOW transition of latch enable

Qn

Z L H

Q0

1-25

XV-SA70BK/XV-SA72SL

BA6664FM-X(IC251):Spindle motor driver

1.Pin layout

1

NC

A3

NC

A2 NC NC

A1

29

GND

H1+

10

H1-

11

H2+

12

H2-

13

H3+

14

H3-

2.Pin function

28 2 3 4 5 6 7

8 9

RNF

27

VM

26

GSW

25

VCC

24

FG

23

PS

22

EC 30 21

ECR 20

FR 19

FG2 18

SB 17

CNF 16

BR 15

VH

Pin No.

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

Symbol

NC

A3

NC

A2 NC NC

A1

GND

H1+

H1-

H2+

H2-

H3+

H3-

VH BR

CNF

SB

FG2

FR

ECR

EC PS FG

VCC

GSW

VM

RNF

I/O

-

O

-

O

-

O

I I I I I I I

-

O

-

I

I O O

-

O

-

O

-

Description Non connect Output 3 for spindle motor Non connect Output 2 for spindle motor Non connect Non connect Output 1 for spindle motor Connect to ground Positive input for hall input AMP 1 Negative input for hall input AMP 2 Positive input for hall input AMP 2 Negative input for hall input AMP 2 Positive input for hall input AMP 3 Negative input for hall input AMP 3 Hall bias terminal Non connect Capacitor connection pin for phase compensation Short brake terminal Non connect Non connect Torque control standard voltage input terminal Torque control voltage input terminal Start/stop switch (power save terminal) FG signal output terminal Power supply for signal division Gain switch Power supply for driver division Resistance connection pin for output current sense Connect to ground Connect to ground

1-26

JCV8005-3(IC701):CPPM (Content protection for pre-recorded media)

1.Pin layout

80 51

81

50

XV-SA70BK/XV-SA72SL

100

1 30

2.Pin function

Pin No. I/O

1 2

3~10

11 12

13~20

21 22 23 24 25 26 27 28 29 30 31 32

33~36

37

38~41

42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58

31

Symbol

VDD GND

HDATA0~7

VDD GND

HADDR0~7

VDD GND NCS

NRD NWR NIRQ WAIT

NRESET

VDD

GND

VDD

GND

STD7~4_OUT

GND

STD3~0_OUT

VDD

GND

REQ_IN

DACK_OUT

STCLK_OUT

SYNC_OUT STERROUT

VDD

GND

VDD

GND

G_NRD

G_NWR

G_WITODC

G_CSDEC

G_WITDEC

VDD

I/O

O O

O

O O O

JCV8005-3 1/2

Description

-

I

-

I I I

I

-

I

-

I I I I I

-

Power supply Connect to ground Data input/output terminal (both by 8 bits) Power supply Connect to ground 8 bit address bus to internal address (connect to host) Power supply Connect to ground Chip select signal from host Data read signal from host Data write signal from host Interrupt of request to host Wait demand to host Reset signal from host Power supply Connect to ground Power supply Connect to ground Data output to DVD decoder (8 bits) Connect to ground Data output to DVD decoder (8 bits) Power supply Connect to ground Request signal for forwarding control by decoder Output signal to decoder which shows effective data Data strobe signal to decoder Sector sink signal to decoder Non connect Power supply Connect to ground Power supply Connect to ground Glue logic input signal from host Glue logic input signal from host Glue logic input signal from front end Glue logic input signal from host Glue logic input signal from decoder Power supply

1-27

XV-SA70BK/XV-SA72SL

2.Pin function

Pin No. I/O

59 60 61 62 63 64 65

66,67

68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89

90~93

94

95~98

99

100

Symbol

GND WAIT1 WAIT2

WAITIN

VDD

GND

TEST_IN

NC

VDD

GND

CLKOCTL

NC

OSCI

OSCO

NC

VDD

GND

33OUT

169OUT

VDD

GND

VDD

GND

STERR_IN

SYNC_IN

STCLK_IN

DACK_IN

REQ_OUT

VDD

GND

STD0~3_IN

GND

STD4~7_IN

VDD

GND

JCV8005-3 2/2

Description

-

O

I

-

I

-

I

O

-

O O

-

I I I I

O

-

I

-

I

-

Connect to ground Glue logic output signal to host Non connect Glue logic input signal (connect to 27 pin) Power supply Connect to ground Connect to ground Non connect Power supply Connect to ground Input terminal for crystal-oscillator circuit on/off control Non connect Crystal oscillation terminal (input side) Crystal oscillation terminal (output side) Non connect Power supply Connect to ground Oscillation output terminal Oscillation output terminal Power supply Connect to ground Power supply Connect to ground Presence of data error from front end Sector sink signal from front end Data clock signal from front end Signal which shows effective data from front end Request signal for forwarding control to front end Power supply Connect to ground Data input from front end (8 bits) Connect to ground Data input from front end (8 bits) Power supply Connect to ground

1-28

K4S643232E-TC70(IC505):DRAM

1.Block diagram

Bank select

XV-SA70BK/XV-SA72SL

I/O control

LWE

Data input register

LDQM

refresh counter

Row buffer

Address register

CLK

Row decoder

512K x 32 512K x 32 512K x 32 512K x 32

ADD

LCBR

LRAS

Col. buffer

Column decoder

Latency & burst length

LCKE

LRAS

LCBR LWE

LCAS LWCBR

Programming register

Timing register

CLK CKE CS RAS CAS WE DQM

2.Pin function

Symbol Description Symbol Description

CLK

CS

CKE

A0~A10

BA0,1

RAS CAS

WE

System clock signal input Chip select input Clock enable Address Bank select address Row address strobe Column address strobe Write enable

DQM0~3

DQ0~31

VDD

VSS VDDQ VSSQ

NC

Data input/output mask Data input/output Power supply terminal Connect to ground Power supply terminal Connect to ground Non connect

Sense AMP

Output buffer

DQI

LDQM

1-29

XV-SA70BK/XV-SA72SL

MN102L25GGT3(IC401):Unit CPU

Pin function

Pin No. Pin No.

Symbol Symbol

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

WAIT

RE

SPMUTE

WEN

LMMUTE

CS1 CS2 CS3

DRVMUTE

SPKICK

LSIRST

WORD

A0 A1 A2 A3

VDD

SYSCLK

VSS

XI

XO

VDD

OSCI

OSCO

MODE

A4 A5 A6 A7 A8

A9 A10 A11

VDD

A12 A13 A14 A15 A16 A17 A18 A19

VSS

A20

TXSEL

HAGUP

TCLOSE

TOPEN HMFON TRVSW

I/O I/O

Micon wait signal input

I

Read enable

O

Spindle muting output to IC251

O

Write enable

O

Loading motor standby control

O

Chip select for ODC

O

Chip select for CPPM

O

Non connect

Driver mute

O

Spin kick (Non connect)

O

LSI reset

O

Bus selection input

O

Address bus 0 for CPU

O

Address bus 1 for CPU

O

Address bus 2 for CPU

O

Address bus 3 for CPU

O

Power supply

Connect to TP169

Ground

Not use (Connect to vss)

Connect to TP170

Power supply

Clock signal input

I

Clock signal output

O

CPU Mode selection input

I

Address bus 4 for CPU

O

Address bus 5 for CPU

O

Address bus 6 for CPU

O

Address bus 7 for CPU

O

Address bus 8 for CPU

O

Address bus 9 for CPU

O

Address bus 10 for CPU

O

Address bus 11 for CPU

O

Power supply

Address bus 12 for CPU

O

Address bus 13 for CPU

O

Address bus 14 for CPU

O

Address bus 15 for CPU

O

Address bus 16 for CPU

O

Address bus 17 for CPU

O

Non connect

Ground

Non connect

Connect to TP910

-

O

Tray close signal

I/O

Tray open signal

I/O

Detection switch of traverse

I

inside

Function

51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99

100

SWUPDN SWOPEN

ADSCEN

VDD FEPEN SLEEP

BUSY

REQ

CIRCEN

-

VSS

EPCS EPSK

DPDI

EPDO

VDD SCLKO S2UDT U2SDT

CPSCK

SDIN

SDOUT

-

NMI

ADSCIRQ

ODCIRQ

DECIRQ CSSIRQ

ODCIRQ2

ADSEP

RST

VDD

TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 TEST8

VSS

D0 D1 D2 D3 D4 D5 D6 D7

Function

Elevator UP/DOWN switch detect

I

Tray OPEN/CLOSE switch detect

I

Serial enable signal for ADSC

O

Power supply

Serial enable signal for FEP

O

Standby signal for FEP

O

Non connect

Communication Request

O

CIRC command select

O

Non connect

Ground

EEPROM chip select

O

EEPROM clock

O

EEPROM data input

I

EEPROM data output

O

Power supply

Communication clock

I

Communication input data

I

Communication output data

O

Clock for ADSC serial

O

ADSC serial data input

I

ADSC serial data output

O

Not use

Interrupt input of ADSC

I

Interrupt input of ODC

I

Interrupt input of ZIVA

I

Not use

Interruption of system control

I

Address data selection input

I

Reset input

I

Power supply

Test signal 1 input

I

Test signal 2 input

I

Test signal 3 input

I

Test signal 4 input

I

Test signal 5 input

I

Test signal 6 input

I

Test signal 7 input

I

Test signal 8 input

I

Ground

Data bus 0 of CPU

I/O

Data bus 1 of CPU

I/O

Data bus 2 of CPU

I/O

Data bus 3 of CPU

I/O

Data bus 4 of CPU

I/O

Data bus 5 of CPU

I/O

Data bus 6 of CPU

I/O

Data bus 7 of CPU

I/O

1-30

MN103S13BDA(IC301):Optical disc controller

1.Pin layout

DMARQ

NIOWR

VSS

NIORD

IORDY

NDMACK

VDD

INTRQ

NIOCS16

DA1

VSS

NPDIAG

DA0

DA2

VDD

NCS1FX

144

143

142

141

140

139

138

137

136

135

134

133

132

131

130

HDD15

HDD0

HDD14

VDD

HDD1

HDD13

HDD2

VSS

HDD12

VDD

HDD3

HDD11

HDD4

HDD10

VDD HDD5 HDD9

VSS HDD6 HDD8 HDD7 VDDH

NRESET MASTER

NINT0 NINT1

WAITDOC

NMRST

DASPST

VDD

OSCO2

OSCI2

UATASEL

VSS

PVSSDRAM

PVDDDRAM

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

3738394041424344454647484950515253545556575859606162636465666768697071

129

MN103S13BDA

NCS3FX

NDASP

NTRYCL

128

127

126

VDD

NEJECT

125

124

VSS

123

MONI0

MONI1

122

121

MONI2

MONI3

120

119

SDATA

SCLOCK

118

117

VDD

116

DAT0

115

DAT1

114

DAT2

113

DAT3

CHCK40

112

111

NCLDCK

SUBC

110

109

108 107 106 105 104 103 102 101 100

99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73

72

SBCK VSS P0 P1 PVDD PVSS VDD OSCO1 OSCI1 VSS LRCK BLKCK IPFLAG DACCLK DACLRCK DA C DATA NTRON LG JMPINH IDHOLD SBCK/PLLOK CLKOUT2 VDD NRST MMOD VSS CPDET1 CPDET2 BDO IDGT DTRD TEHLD VDD CLKOUT1 CPUDT0 CPUDT1

XV-SA70BK/XV-SA72SL

2.Block diagram

DVD-ROM Formatter

CGEN

MODE

CPUADR17

CPUADR16

VSS

CPUADR15

CPUADR14

CPUADR13

CD-PRE

Instruction memory (40KB)

DATA

MEMORY

(6KB)

VDD

CPUADR9

CPUADR8

CPUADR11

CPUADR10

CPUADR7

CPUADR12

Formatter

General purpose IO bus

CPUADR6

CPUADR5

CPUADR4

CPUADR3

CPUADR2

i /t

High speed IO bus

32 bit

CPU core

GCAL

CPUADR1

VSS

CPUADR0

NCS

NWR

ECC

NRD

VDD

CPUDT7

CPUDT6

PVPPDRAM

PTESTDRAM

Host i / f

MPEG i / t

DMA

BCU

DRAMC

CPUDT5

CPUDT4

PVSSDRAM

PVDDDRAM

VSS

CPUDT3

CPUDT2

ATAPI

4Mbit

DRAM

WDT

16 bit

timer x 2

SYSTEM

i / f

INTC

1-31

XV-SA70BK/XV-SA72SL

3.Pin function (1/3)

Pin No.

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

Symbol

HDD15

HDD0

HDD14

VDD

HDD1

HDD13

HDD2

VSS

HDD12

VDD

HDD3

HDD11

HDD4

HDD10

VDD HDD5 HDD9

VSS HDD6 HDD8 HDD7

VDDH

NRESET

MASTER

NINT0 NINT1

WAITDOC

NMRST

DASPST

VDD

OSCO2

OSCI2

UATASEL

VSS

PVSSDRAM

PVDDDRAM

CPUADR17 CPUADR16

VSS

CPUADR15 CPUADR14 CPUADR13 CPUADR12

VDD

CPUADR11 CPUADR10

CPUADR9 CPUADR8 CPUADR7 CPUADR6

I/O I/O I/O I/O

I/O I/O I/O

I/O

I/O I/O I/O I/O

I/O I/O

I/O I/O I/O

I

I/O

O O O O

I

-

O

I I

-

I I

-

I I I I

-

I I I I I I

MN103S13BDA

Description ATAPI Data ATAPI Data ATAPI Data Power supply 3V ATAPI Data ATAPI Data ATAPI Data Connect to GND ATAPI Data Power supply 2.7V ATAPI Data ATAPI Data ATAPI Data ATAPI Data Power supply 3V ATAPI Data ATAPI Data Connect to GND ATAPI Data ATAPI Data ATAPI Data

ATAPI Reset input ATAPI Master/slave select Interruption of system control 0 Interruption of system control 1 Wait control of system control Reset of system control (Connect to TP302) Setting of initial value of DASP signal Power supply 3V Non connect Non connect Connect to VSS Connect to GND Connect to VSS Connect to VDD(2.7V) System control address System control address Connect to GND System control address System control address System control address System control address Power supply 2.7V System control address System control address System control address System control address System control address System control address

1-32

XV-SA70BK/XV-SA72SL

3.Pin function (2/3)

Pin No.

51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99

100

Symbol CPUADR5 CPUADR4 CPUADR3 CPUADR2 CPUADR1

VSS

CPUADR0

NCS

NWR

NRD

VDD CPUDT7 CPUDT6

PVPPDRAM

PTESTDRAM

PVDDDRAM

PVSSDRAM

CPUDT5 CPUDT4 CPUDT3

VSS CPUDT2 CPUDT1 CPUDT0

CLKOUT1

VDD

TEHLD

DTRD

IDGT

BDO CPDET2 CPDET1

VSS

MMOD

NRST

VDD

CLKOUT2

SBCK/PLLOK

IDOHOLD

JMPINH

LG

NTRON

DA CD ATA

DACLRCK

DACCLK

IPFLAG

BLKCK

LRCK

VSS

OSCI1

I/O

I/O I/O

O

I/O I/O I/O

O

O O O

O O O O O

O O

Description

System control address

I

System control address

I

System control address

I

System control address

I

System control address

I

Connect to GND

System control address

I

System control chip select

I

Writing system control

I

Reading system control

I

Power supply 3V

System control data System control data Connect to VSS Connect to VSS

I

Connect to VDD(2.7V) Connect to VSS System control data System control data System control data Connect to GND

System control data System control data System control data Clock signal output (16.9/11.2/8.45MHz) Power supply 3V

Mirror gate (Connect to TP141) Data frequency control switch (Connect to TP304) CAPA switch RF Dropout/BCA data

I

Outer capacity detection

I

Inner capacity detection

I

Connect to GND

Connect to VSS

I

System reset

I

Power supply 3V

Clock 16.9MHz Flame mark detection ID gate for tracking holding Jump prohibition Land/group switch Tracking ON

I

Serial data output (Connect to TP148) Identification signal of L and R (Connect to TP149) Clock for serial data output

I

Input of IP flag

I

Sub code/block/input clock

I

Identification signal of L and R (Connect to VSS)

I

Connect to GND

Oscillation input terminal 16.9MHz

I

MN103S13BDA

1-33

XV-SA70BK/XV-SA72SL

3.Pin function (3/3)

Pin No.

101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144

Symbol OSCO1

VDD

PVSS

PVDD

P1 P0

VSS SBCK SUBC

NCLDCK CHCK40

DAT3 DAT2 DAT1 DAT0

VDD

SCLOCK

S DATA MONI3 MONI2 MONI1 MONI0

VSS

NEJECT

VDD

NTRYCL

NDASP NCS3FX NCS1FX

VDD

DA2 DA0

NPDIAG

VSS

DA1

NIOCS16

INTRQ

VDD

NDMACK

IORDY

NIORD

VSS

NIOWR

DMARQ

I/O

O

-

I/O I/O

-

O

I I I I I I I

I/O I/O

O O O O

-

I

-

I

I/O

I I

I/O I/O I/O

I/O

O O

-

I

O

I

I/O

O

MN103S13BDA

Description Oscillation output terminal 16.9MHz Power supply 3V Connect to GND Power supply 3V Terminal master polarity switch input CIRC-RAM,OVER/UNDER Interruption Connect to GND Clock output for sub code,serial input Sub code,serial input Sub code,flame clock input Clock is read to DAT3~0 (Output of division frequency from ADSC) Data is read from disc (Going side by side output from ADSC) Data is read from disc (Going side by side output from ADSC) Data is read from disc (Going side by side output from ADSC) Data is read from disc (Going side by side output from ADSC) Power supply 3V Debug serial clock (270 ohm pull up) Debug serial data (270 ohm pull up) Internal good title monitor (Connect to TP150) Internal good title monitor (Connect to TP151) Internal good title monitor (Connect to TP152) Internal good title monitor (Connect to TP153) Connect to GND Eject detection Power supply 2.7V Non connect (Tray close detection) ATAPI drive active / slave connect I/O Non connect (ATAPI host chip select) Non connect (ATAPI host chip select) Power supply 3V ATAPI host address Non connect (ATAPI host address) ATAPI Slave master diagnosis input Connect to GND Non connect (ATAPI host address) Output of selection of width of ATAPI host data bus ATAPI Host interruption output Power supply 3V Non connect (ATAPI Host DMA characteristic) ATAPI Host ready output (Connect to TP157) Non connect (ATAPI host read) Connect to GND ATAPI Host write ATAPI Host DMA request (Connect to TP159)

1-34

MN67706ZY (IC201) : Auto digital servo controller

1.Pin layout

33VDD

33VSS

TEST

MINTEST

NCLDCK/JUMP

SUBC

IPFLAG

DACCLK

NTRON

DACDATA/LG

DACLRCK/JMPINH

IDHOLD

SBCK/PLLOK

BLKCK/CPDET1

LRCK/CPDET2

IDGT/TEMUTE

DTRD

25VDD

25VSS

TILTN

75747372717069686766656463626160595857565554535251

CHCK40

DAT3 DAT2 DAT1 DAT0

33VSS

33VDD

XRESET

ENS

ENC

CPUIRQ

CPUCLK

CPUDTIN

CPUDTOUT

MONA

MONB

MONC

25VSS

25VDD

LDCUR(AD6)

TDOFS(AD5)

TG(AD4)

RFENV(AD3)

TX

NC

76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99

100

123456789

MN67706ZY

101112131415161718192021222324

TILT

TILTPFGSPDRV

TRSDRV

50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26

25

TSTSG BDO SYSCLK OFTR 33VDD 33VSS FBAL TBAL TGBAL AVSS ROUT LOUT AVDD JLINE DBALO VCOF TRCRS CMPIN LPFOUT LPFIN AVSS HPFOUT HPFIN AVDD VFOSHORT

XV-SA70BK/XV-SA72SL

TE(AD1)

FE(AD0)

AS(AD2)

AVSS

AVDD

TRDRV(DA0)

FODRV(DA1)

ARF

NARF

IREF1

IREF2

DSLF1

AVDD

DSLF2

PLPG

VHALF

PLFG

VREFH

2.Pin functions (1/3)

Pin No. Symbol I/O Description

I

AS : Full adder signal (FEP)

I

Phase difference/3 beam tracking error (FEP)

I

Focus error (FEP) Apply 3.3V (For analog circuit) Focus drive (DRVIC) Tracking drive (DRVIC) Ground (For analog circuit)

I

Equivalence RF+ (FEP)

I

Equivalence RF- (FEP)

I

Reference current1 (For DBAL)

I

Reference current2 (For DBAL) Connect to capacitor1 for DSL Connect to capacitor2 for DSL Apply 3.3V (For analog circuit)

I

Reference voltage 1.65+-0.1V (FEP) Not use (PLL phase gain setting resistor terminal) Not use (PLL frequency gain setting resistor terminal)

I

Reference voltage 2.2V+-0.1V (FEP) Connect to resistor for VREFH reference current source Ground (For analog circuit) Connect to capacitor1 for PLL Connect to capacitor2 for PLL Output for jitter signal monitor

I

Not use Pull-up to VHALF

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

1 2 3 4 5 6 7 8 9

AS(AD2) TE(AD1) FE(AD0) AVDD FODRV(DA1) TRDRV(DA0) AVSS ARF NARF IREF1 IREF2 DSLF1 DSLF2 AVDD VHALF PLPG PLFG VREFH RVI AVSS PLFLT1 PLFLT2 JITOUT RFDIF CSLFL1

O O

-

I/O I/O

-

I/O

O O

I/O

RVI

AVSS

PLFLT1

RFDIF

JITOUT

PLFLT2

CSLFL1

1-35

XV-SA70BK/XV-SA72SL

2.Pin function (2/3)

Pin No. Symbol I/O Description

26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

VFOSHORT

IDGT/TEMUTE LRCK/CPDET2

BLKCK/CPDET1

SBCK/PLLOK

DACLRCK/JMPINH

DACDATA/LG

NCLDCK/JUMP

AVDD

HPFIN

HPFOUT

AVSS

LPFIN

LPFOUT

CMPIN

TRCRS

VCOF

DBALO

JLINE AVDD LOUT

ROUT

AVSS

TGBAL

TBAL

FBAL 33VSS 33VDD

OFTR

SYSCLK

BDO

TSTSG

TRSDRV

SPDRV

FG

TILTP

TILT

TILTN 25VSS 25VDD

DTRD

IDHOLD

NTRON

DACCLK

IPFLAG

SUBC

MINTEST

TEST 33VSS 33VDD

CHCK40

DAT3 DAT2 DAT1 DAT0

O

I/O

O O

O O O

O O

O O O O O

VFO short output

I

I I

-

I I I

I

-

I I

I I I I

I I

-

Apply 3.3V (For analog circuit) Pull-up to VHALF Connect to TP208 Ground (For analog circuit) Pull-up to VHALF Not use Connect to TP210 Input signal for track cross formation JFVCO control voltage DSL balance adjust output J-line setting output (FEP) Apply 3.3V (For analog circuit) Connect to TP203 (Analog audio left output) Connect to TP204 (Analog audio right output) Ground (For analog circuit) Tangential balance adjust (FEP) Tracking balance adjust (FEP) Focus balance adjust (FEP) Ground (For I/O) Apply 3.3V (For I/O) Off track signal

16.9344MHz system clock input (ODC) Drop out (FEP) Calibration signal (FEP) Traverse drive (DRVIC) Spindle drive output (DRVIC) FG signal input (Spindle motor driver) Connect to TP205 Connect to TP206 Connect to TP207 Ground (For internal core) Apply 2.5V (For internal core) Data read control signal (ODC) Pull-down to Ground LR channel data strobe (ODC)/ CD sub code synchronous signal (ODC)/ CD sub code data shift clock (ODC)/PLL pull-in OK signal input Pull-down to Ground 1bit DAC-LR channel data strobe (ODC)/ CD 1bit DAC channel data (ODC) L : Tracking ON (ODC) 1bit DAC channel data shift clock (ODC) CIRC error flag (ODC) CD sub code (ODC) CD sub code data frame clock (ODC)/DVD JUMP signal (ODC) Pull-down to Ground (For MINTEST) Pull-down to Ground (For TEST) Ground (For I/O) Apply 3.3V (For I/O) Clock for SRDATA (ODC) SRDATA3 (ODC) SRDATA2 (ODC) SRDATA1 (ODC) SRDATA0 (ODC)

MN67706ZY

1-36

XV-SA70BK/XV-SA72SL

2.Pin function (3/3)

Pin No. Symbol I/O Description

-

81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99

100

33VSS 33VDD TX XRESET ENS ENC CPUIRQ CPUCLK CPUDTIN CPUDTOUT MONA MONB MONC NC 25VSS 25VDD LDCUR(AD6) TDOFS(AD5) TG(AD4) RFENV(AD3)

O

O O O O O

Ground(For I/O)

-

Apply 3.3V(For I/O) Digital audio interface

I

Reset input (System control)

I

Servo DSC serial I/F chip select (System control)

I

CIRC serial I/F chip select (System control) Interrupt request (System control)

I

Syscon serial I/F clock (System control)

I

Syscon serial I/F data input (System control) Syscon serial I/F data output (System control) Connect to TP226 (Monitor terminal A) Connect to TP225 (Monitor terminal A) Connect to TP224 (Monitor terminal A) Connect to TP211

-

Ground(For internal core)

-

Apply 2.5V(For internal core) I I I

Tangential phase difference(FEP) I

RF envelope input(FEP)

MN67706ZY

1-37

XV-SA70BK/XV-SA72SL

NDV8601VWA-BB(IC501):AV Decoder

1.Pin layout

240 181

1

180

60

61 120

2.Block diagram

digital audio

serial

peripherals

DVD data

3.Pin function (1/4)

Pin No.

1

2,3

4 5 6

7~9

10 11

12,13

14

15,16

17 18 19

20,21

22 23 24

25,26

27 28 29

Symbol

VDDio

MD10,11

VDD

MD12

VSSio

MD13~15

VDDio DQM1 MA9,8 VSSio MA7,6

VSS

MA5 VDDio MA4,3 MCLK VSSio

CKE MA2,1 VDDio

MA0

MA10

121

audio DAC

Serial

port

controller

I/O

-

I/O

-

I/O

-

I/O

O O

O

O O

digital audio

Audio

output

processor

DVD,A/V

port

+

CSS

Audio

DSP

Demux

engine

Power supply terminal 3.3V SDRAM Data bus terminal Power supply terminal 1.8V SDRAM Data bus terminal Connect to ground SDRAM Data bus terminal Power supply terminal 3.3V SDRAM Data byte enable SDRAM Address bus terminal Connect to ground SDRAM Address bus terminal Connect to ground SDRAM Address bus terminal Power supply terminal 3.3V SDRAM Address bus terminal SDRAM Clock output Connect to ground SDRAM Clock enable output SDRAM Address bus terminal Power supply terminal 3.3V SDRAM Address bus terminal SDRAM Address bus terminal

MPEG

Video

decoder

SDRAM

controller

SDRAM

Description

Video I/O port

Video

output

processor

RISC

uProcessor

+ cache

NTSC

PA L

SCART

encoder

XBUS

controller

Video

XBUS

1-38

3.Pin function (NDV8601VWA-BB 2/4)

XV-SA70BK/XV-SA72SL

Pin No.

30 31

32,33

34 35 36 37 38 39 40 41 42 43 44

45,46

47 48 49

50~52

53

54~56

57

58~61

62

63,64

65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81

82 83 84 85 86 87 88 89 90

Symbol

MA11 VSSio

MA12,13

VDD

CS0

VDDio

RAS CAS

WE

VSSio DQM0 DQM2

MD16 VDDio

MD17,18

VSS MD19 VSSio

MD20~22

VDDio

MD23~25

VSSio

MD26~29

VDDio

MD30,31

DQM3

CS1 VSSD

SPDIF

VSSio

AIN AOUT3 AOUT2 AOUT1 AOUT0

VDDio

PCMCLK

VDD

ACLK

LRCLK

SRST RSTP

VSSio RXD1

SSPIN1

VSS

SSPOUT1

SSPCLK1 SSPCLK0

VDD

SSPIN0

I/O

Non connect

Connect to ground

SDRAM Address bus, reserved for terminal compatibility with 64Mb SDRAM

O

Power supply terminal 1.8V

SDRAM Primary bank chip select

O

Power supply terminal 3.3V

SDRAM Command bit

O

SDRAM Command bit

O

SDRAM Command bit

O

Connect to ground

SDRAM Data byte enable

O

SDRAM Data byte enable

O

SDRAM Data bus terminal

I/O

Power supply terminal 3.3V

SDRAM Data bus terminal

I/O

Connect to ground

SDRAM Data bus terminal

I/O

Connect to ground

SDRAM Data bus terminal

I/O

Power supply terminal 3.3V

SDRAM Data bus terminal

I/O

Connect to ground

SDRAM Data bus terminal

I/O

Power supply terminal 3.3V

SDRAM Data bus terminal

I/O

SDRAM Data byte enable

O

SDRAM Extension bank chip select

O

Connect to ground

S/PDIF Digital audio output terminal

O

Connect to ground

Digital audio input for digital micro; can be used as GPIO

I

Serial audio output data to audio DAC for left and right channels for down-mix

O

Serial audio output data to audio DAC for surround left and right channels

O

Serial audio output data to audio DAC for center and LFE channels

O

Serial audio output data to audio DAC for left and right channels

O

Power supply terminal 3.3V

Audio DAC PCM sampling clock frequency, common clock for DACs and ADC

O

Power supply terminal 1.8V

Audio interface serial data clock, common clock for DACs and AD converter

O

Left / right channel clock, common clock for DACs and ADC

O

Active low RESET signal for peripheral reset

O

RESET_Power : from system, used to reset frequency synthesizer and rest

I

Description

of chip Connect to ground

UART1 Serial data input from external serial device, used for IR receiver

I

SSP1 Data in or 16X clock for USART function in UART1

I/O

Connect to ground

SSP1 Data out or UART1 data-terminal-ready signal

I/O

SSP1 Clock or UART1 clear-to -send signal

I/O

SSP0 Clock or request-to-send function in UART1

I/O

Power supply terminal 1.8V

SSP0 Data in or 16X clock for USART function in UART0

I/O

1-39

XV-SA70BK/XV-SA72SL

3.Pin function (NDV8601VWA-BB 3/4)

1-40

Pin No.

91 92 93 94 95 96 97 98

99 100 101 102 103 104 105 106 107 108 109 110 111

112

113 114 115 116 117 118 119 120 121 122 123 124 125

126~131

132

133,134

135

136~139

140

141~144

145 146 147

148~153

154 155 156

157,158

159

Symbol

VDDio

SSPOUT0

TXD0 RXD0 CTS0

RTS0

VSSio

CXI

CXO

OSCVSS

OSCVDD

MVCKVDD

SCEN

MVCKVSS

ACLKVSS

SCMD

ACLKVDD

VDDDAK

VSSDAC

Cr/R IOM

C/Cb/B

VAA3

Y/G VSSA VREF

VAA

CVBS/C

RSET

COMP

VSS

VCLK

VSYNC HSYNC

VDDio

VI07~02

VSSio

VI01,00

VDD

AD31~28

VDDio

AD27~24

PWE3

AD23

VSSio

AD22~17

VDDio

AD16

PWE2

AD15,14

VDD

I/O

I/O I/O

I I/O I/O

-

I

O

-

I

-

I

-

O O

O

-

O O O

-

I/O

-

I/O I/O I/O

-

I/O

-

I/O I/O I/O

-

Description Power supply terminal 3.3V SSP0 Data out or UART0 data-terminal-ready signal UART0 Serial data output to an external serial device UART0 Serial data input from external serial device UART0 Clear-to-send signal UART0 Request-to-send signal Connect to ground Crystal input terminal for on-chip oscillator or system input clock Crystal output terminal for on-chip oscillator Connect to ground for oscillator Power supply terminal for oscillator 1.8V Power supply terminal for main and video clock PLL 3.3V Scan chain test enable Connect to ground for main and video clock PLL Connect to ground for audio clock PLL Scan chain test mode Power supply terminal for audio clock PLL 3.3V Power supply terminal for DAC digital 1.8V Connect to ground for DAC digital Video signal output (Cr output : composite/component Red output) Cascaded DAC differential output used to dump current into external resistor for power Video signal output (Chrominance output for NTSC/PAL S-Video Cb output for component Blue output) Power supply terminal for DAC analog 3.3V Video signal output (Luminance for S-Video and component Green output) Connect to ground for DAC analog Non connect

Video signal output (Composite video Chrominance output for S-Video) Current setting resistor of output DACs Compensation capacitor connection Connect to ground Non connect Non connect Non connect Power supply terminal 3.3V Non connect Connect to ground Non connect Power supply terminal 1.8V Multiplexed address / data bus terminal Power supply terminal Multiplexed address / data bus terminal Byte write enable for FLASH,EEPROM,SRAM or peripherals terminal Multiplexed address / data bus terminal Connect to ground Multiplexed address / data bus terminal Power supply terminal 3.3V Multiplexed address / data bus terminal Byte write enable for FLASH,EEPROM,SRAM or peripherals terminal Multiplexed address / data bus terminal Power supply terminal 1.8V

3.Pin function (NDV8601VWA-BB 4/4)

XV-SA70BK/XV-SA72SL

Pin No.

160 161 162

163~168

169 170 171

172~176

177

178~180

181 182 183

184~187

188 189 190 191 192 193

194,195

196

197~200

201

202,203

204 205

206~209

210 211 212 213 214 215 216 217 218

219~223

224

225,226

227 228 229 230

231,232

233

234~236

237

238~240

Symbol

SCLK

ACK

VSSio

AD13~8

VDDio PWE1

VSS

AD7~3

VSSio

AD2~0

VDDio PWE0

ALE LA0~3 VSSio

RD

LHLDA

LHLD

VDD

PCS0

XI01,02

VDDio

XI03~06

VSS

XI07,08

VSSio

XI09

XID10~13

VDDio XID14

VDD

DSYNC

DREQ

DCLK DSTB

DVD0

VSSio

DVD1~5

VDDio

DVD6,7

MD0

VSSio

MD1

VSS MD2,3 VDDio

MD4~6

VSSio

MD7~9

I/O

External bus clock used for programmable host peripherals

O

Programmable WAIT/ACK/RDY control

I/O

Connect to ground

Multiplexed address / data bus terminal

I/O

Power supply terminal 3.3V

Byte write enable for FLASH,EEPROM,SRAM or peripherals terminal

I/O

Connect to ground

Multiplexed address / data bus terminal

I/O

Connect to ground

Multiplexed address / data bus terminal

I/O

Power supply terminal 3.3V

Byte write enable for FLASH,EEPROM,SRAM or peripherals terminal

I/O

Address latch enable

I/O

Latched address 0~3

I/O

Connect to ground

Read terminal

I/O

Bus hold acknowledge in slave mode

O

Bus hold request from external master in slave mode

I

Power supply terminal 1.8V

Peripheral chip select 0, generally used for enabling the program store

O

ROM/FLASH Programmable general purpose external input/output

I/O

Power supply terminal 3.3V