(1) This design of this product contains special hardware and
many circuits and components specially for safety purposes.
For continued protection, no changes sho uld be made to the
original design unless authorized in writing by the manufacturer. Replacement parts must be identical to those
used in the original circuits. Services should be performed by qualified personnel only.
(2) Alterations of the design or circuitry of the product should
not be made. Any design alterations of the product should
not be made. Any design alterations or additions will void
the manufacturers warranty and will further relieve the
manufacture of responsibility for personal injury or property
damage resulting therefrom.
(3) Many electrical and mechanical parts in the products have
special safety-related characteristics. These characteristics are often not evident from v isual inspecti on nor can th e
protection afforded by them necessarily be obtained by using replacement components rated for highe r voltage, w a tt age, etc. Replacement parts which have these special safety
characteristics are identified in the Parts List of Service Manual. Electrical components having such features are identified by shading on the schematics and by ( ) on the
Parts List in the Service Manual. The use of a substitute replacement which does not have the same safety characteristics as the recommended replacement parts shown in the
Parts List of Service Manual may create shock , fire, or other hazards.
(4) The leads in the products are routed and dressed with ties,
clamps, tubings, barriers and the like to be separated from
live parts, high temperature parts, moving parts and/or
sharp edges for the prevention of electric shock and fire
hazard. When service is required, the original lead routing
and dress should be observed, and it should be confirmed
that they have been returned to normal, after reassembling.
(5) Leakage shock hazard testing)
After reassembling the product, always perform an isolat ion
check on the exposed metal parts of the product (antenna
terminals, knobs, metal cabinet, screw heads, headphone
jack, control shafts, etc.) to be sure the product is safe to
operate without danger of electrical shock.
Do not use a line isolation transformer during this check.
• Plug the AC line cord directly into the AC outlet. Using a
"Leakage Current Tester", measure the leakage current
from each exposed metal parts of the cabinet, partic ularly any exposed metal part having a return path to the
chassis, to a known good earth ground . Any leakage current must not exceed 0.5mA AC (r.m.s.).
• Alternate check method
Plug the AC line cord directly into the AC outlet. Use an AC
voltmeter having, 1,000 ohms per volt or more sensitivity in
the following manner. Connect a 1,500 ohm 10W resistor
paralleled by a 0.15 µF AC-type capacitor between an
SECTION 1
exposed metal part and a known good earth ground.
Measure the AC voltage across the resistor with the AC
voltmeter.
Move the resistor connection to each exposed meta l part,
particularly any exposed metal part having a return path to
the chassis, and measure the AC voltage across the resistor.
Now, reverse the plug in the AC outlet and repeat each
measurement. Voltage measured any must not exceed 0.75
V AC (r.m.s.). This corresponds to 0.5 mA AC (r.m.s.).
1.2 Warning
(1) This equipment has been designed and manufactured to
meet international safety standards.
(2) It is the legal responsibility of the repairer to ensure that
these safety standards are maintained.
(3) Repairs must be made in accordance with the relevant
safety standards.
(4) It is essential that safety critical components are replaced
by approved parts.
(5) If mains voltage selector is provided, check setting for local
voltage.
1.3 Caution
Burrs formed during molding may be left over on some parts
of the chassis.
Therefore, pay attention to such burrs in the case of preforming repair of this system.
1.4 Critical parts for safety
In regard with component parts appearing on the silk-screen
printed side (parts side) of the PWB diagrams, t he p arts th at are
printed over with black such as the resistor ( ), diode ( )
and ICP ( ) or identified by the " " mark nearby are critical
for safety.
When replacing them, be sure to use the parts of the same type
and rating as specified by the manufacturer. (Except the JC version)
1-2 (No.22009)
Page 3
TH-A75
1.5 Preventing static electricity
Electrostatic discharge (ESD), which occurs when static electricity stored in the body, fabric, etc. is discharged,
can destroy the laser diode in the traverse unit (optical pickup). Take care to prevent this when performing repairs.
1.5.1 Grounding to prevent damage by static electricity
Static electricity in the work area can destroy the optical pickup (laser diode) in devices such as DVD players.
Be careful to use proper grounding in the area where repairs are being performed.
(1) Ground the workbench
Ground the workbench by laying conductive material (such as a conductive sheet) or an iron plate over it before placing the
traverse unit (optical pickup) on it.
(2) Ground yourself
Use an anti-static wrist strap to release any static electricity built up in your body.
(3) Handling the optical pickup
• In order to maintain quality during transport and before installation, both sides of the laser diode on the replacement optical
pickup are shorted. After replacement, return the shorted parts to their original condition.
(Refer to the text.)
• Do not use a tester to check the condition of the laser diode in the optical pic kup. The tester's internal powe r source can easily
destroy the laser diode.
1.6 Handling the traverse unit (optical pickup)
(1) Do not subject the traverse unit (optical pickup) to strong shocks, as it is a sensitive, complex unit.
(2) Cut off the shorted part of the flexible cable using nippers, etc. after replacing the optical pickup. For specific details, re f e r t o the replace-
ment procedure in the text. Remove the anti-static pin when replacing the traverse unit. Be careful not to take too long a time
when attaching it to the connector.
(3) Handle the flexible ca ble carefully as it may break when subjected to strong force.
(4) I t is not possible to adjust the semi-fixed resistor that adjusts the laser power. Do not turn it.
1.7 Attention when traverse unit is decomposed
*Please refer to "Disassembly method" in the text for the DVD pickup unit.
• Apply solder to the short land sections before the flexible wire is disconnected from the connector CN101 on the DVD servo board.
(If the flexible wire is disconnected without applying solder, the DVD pickup may be destroyed by static electricity.)
• In the assembly, be sure to remove solder from the short land sections after connecting the flexible wire.
DVD servo board
Flexible wire
Short land sections
DVD mechanism assembly
CN101
(No.22009)1-3
Page 4
TH-A75
1.8 Important for laser products
(1) CLASS 1 LASER PRODUCT
(2) DANGER : Invisible laser radiation when open and inter
lock failed or defeated. Avoid direct exposure to beam.
(3) CAUTION : There are no serviceable parts inside the
Laser Unit. Do not disassemble the Laser Unit. Replace the
complete Laser Unit if it malfunctions.
(4) CAUTION : The compact disc player uses invisible laser
radiation and is equipped with safety switches which
prevent emission of radiation when the drawer is open and
the safety interlocks have failed or are de feated.
It is dangerous to defeat the safety switches.
(5) CAUTION : If safety switches malfunction, the laser is able
to function.
(6) CAUTION : Use of controls, adjustments or performance of
procedures other than those specified herein may result in
hazardous radiation exposure.
CAUTION
Please use enough caution not to see the beam directly
or touch it in case of anadjustment or operation check.
VARNING
Osynlig laserstrålning är denna del är öppnad och spårren är
urkopplad. Betrakta ej strålen.
VARO
Avattaessa ja suojalukitus ohitettaessa olet alttiina näkymättömälle lasersäteilylle. Älä katso säteeseen.
REPRODUCTION AND POSITION OF LABELS
CLASS 1
LASER PRODUCT
ADVARSEL
Usynlig laserstråling ved åbning, når sikkerhedsafbrydere er
ude af funktion. Undgå udsasttelse for stråling.
ADVARSEL
Usynlig laserstråling ved åpning, når sikkerhetsbryt eren er avslott. unngå utsettelse for stråling.
WARNING LABEL
1-4 (No.22009)
Page 5
SECTION 2
r
Disassembly method
2.1 Main body section
2.1.1 Removing the top cover (See Figs.1 to 4.)
(1) From the right and left sides of the main body, remove the
four screws A attaching the top cover. (See Figs.1 and 2.)
(2) From the back side of the main body, remove the two
screws B attaching the top cover. (See Fig.3.)
(3) Lift the rear section of the top cover, slide the top cover
slightly in the direction of the arrow. (See Fig.4.)
(4) Disengage the engagement sections a of the top cover
from the main body. (See Fig.4.)
Top cover
TH-A75
B
Top cove
Rear panel
Fig.3
a
A
A
Fig.1
Top cover
Top cover
Fig.4
Fig.2
(No.22009)1-5
Page 6
TH-A75
2.1.2 Removing the front panel assembly (See Figs.5 to 8.)
• Remove the top cove r.
(1) From the left side of the main body, push the section b of
the slide cam using the screw driver, etc. (See Fig.5.)
(2) Pull out the tray. (See Fig.5.)
(3) Push the tray fitting assembly of the tray in the direction of
the arrow and then remove the tray fitting assembly. (See
Fig.6.)
(4) Return the tray into the DVD mechanism assembly.
(5) From the bottom side of the main body, remove the four
screws C attaching the front panel assembly. (See Fig.7.)
(6) From the top side of the main body, remove the two screws
D attaching the front panel assembly. (See Fig.8.)
(7) Disconnect the card wires from the connectors CN206 and
CN207 on the main board. (See Fig.8.)
(8) Remove the screw E attaching the lug wire. (See Fig.8.)
(9) While opening the hooks c to the right and left sides of the
front panel assembly in the direction of the arrow 1, remove
the front panel assembly i n the direction of the arrow 2.
(See Fig.8.)
Reference:
In the assembly, through the card wire in the barrier and
then hold the card wire to the sections d of the barrier.
(See Fig.8.)
Front panel assembly
Tray
C
Barrier
Chassis base
Front panel assembly
Fig.7
Main board
CN207
Slide cam
Front panel assembly
Tray
Fig.5
Fig.6
b
Tray fitting assembly
CN206
d
1
Hook c
Front panel assembly
2
Fig.8
Lug wire
1
Hook c
D E
1-6 (No.22009)
Page 7
TH-A75
2.1.3 Removing the DVD mechanism assembly ( See Fig.9.)
• Remove the top cove r.
• Remove the front panel assembly.
(1) From the top side of the main body, remove the barrier.
(2) Disconnect the card wires from the connectors CN208 and
CN209 on the main board.
(3) Remove the three screws F attaching the DVD mechanism
assembly.
(4) Take out the DVD mechanism assembly from the chassis
base.
Main board
Card wire
F
CN209 CN208
Card wire
Barrier
DVD
mechanism
assembly
F
Chassis base
Fig.9
2.1.4 Removing the DSP board (See Figs.10 and 11.)
• Remove the top cover.
(1) From the top side of the main body, disconnect the card
wires from the connectors CN591 and CN592 on the DSP
board. (See Fig.10.)
(2) From the back side of the main body, remove the three
screws G attaching the DSP board. (See Fig.11.)
(3) Remove the DSP board from the section e of the barrier,
take out the DSP board. (See Fig.10.)
Reference:
When attaching the DSP board, hang the DSP board to
the section e of the ba rrier. (See Fig.10.)
2.1.5 Removing the tuner (See Figs.10 and 11.)
• Remove the top cover.
(1) From the top side of the main body, disconnect the card
wire from the connector CN1 on the tuner. (See Fig.10.)
(2) From the back side of the main body, remove the two
screws H attaching the tuner. (See Fig.11.)
CN592
DSP board
e
Barrier
Card wires
Card wire
Rear panel
CN591
Fig.10
Fig.11
CN1
Tuner
H
G
(No.22009)1-7
Page 8
TH-A75
2.1.6 Removing the main board (See Figs.12 and 13.)
• Remove the top cove r.
• Remove the DSP board.
• Remove the tune r.
(1) From the top side of the main body, disconnect the card
wires from the connectors (CN201, CN202, CN204,
CN206-CN209) on the main board. (See Fig.12.)
(2) Remove the screw J and two screws K attaching the main
board. (See Fig.12.)
(3) From the back side of the main body, remove the five
screws L attaching the main board. (See Fig.13.)
Card wires
J
CN207
CN202
CN201
CN204
CN208
CN209
K
K
Card wires
Main board
Fig.12
CN206
2.1.7 Removing the amplifier board (See Figs.14 to 16.)
• Remove the top cover.
(1) From the top side of the main body, disconnect the card
wires from the connectors CN701 and CN702 on the amplifier board (See Fig.14.)
(2) Remove the three screws M attaching the amplifier board.
(See Fig.14.)
(3) From the back side of the main body, remove the four
screws N attaching the amplifier board. (See Fig.15.)
(4) Disconnect the connector CN703 on the amplifier board,
take out the amplifier board. (See Fig.14.)
(5) Remove the six screws P attaching the heat sink t o the am-
plifier board. (See Fig.16.)
M
Amplifier board
CN703
M
Rear panel
Fig.13
L
N
P
CN702CN701
Fig.14
Rear panel
Fig.15
Heat sink
PP
Amplifier board
Fig.16
1-8 (No.22009)
Page 9
TH-A75
t
2.1.8 Removing the fan motor (See Figs.17 and 18.)
• Remove the top cove r.
• Remove the amplifier board.
(1) From the top side of the main body, remove the fan cover.
(See Fig.17.)
(2) Remove the tie band banding the fan motor wire and then
disconnect the fan motor wire from the connector CN174
on the power board. (See Fig.17.)
(3) Remove the screw Q and screw R attaching the fan brack-
et. (See Fig.17.)
(4) Remove the two screws S attaching the fan motor to the
fan bracket. (See Fig.18.)
Reference:
When attaching the screw Q, attach the lug wire of the
front panel assembly at the same time.
Fan motor
Front panel assembly
Fan bracket
Q
Lug wire
Fan cover
R
2.1.9 Removing the power board (See Fig.19.)
• Remove the top cover.
• Remove the amplifier board.
(1) From the top side of the main body, disconnect the card
wires from the connectors CN172 and CN173 on the power
board.
(2) Remove the tie band banding the fan motor wire and then
disconnect the fan motor wire from the connector CN174
on the power board.
(3) Disconnect the power cord from the connector CN101 on
the power board.
(4) Remove the screw T and three screws U attaching the
power board.
Fan motor wire
Tie band
CN174
CN173
CN172
T
Power board
U
U
Fan motor wire
Tie band
CN174
Power board
Fig.17
S
Fig.18
Fan motor
Fan bracke
CN101
Power cord
Fig.19
Card wires
(No.22009)1-9
Page 10
TH-A75
V
2.2 Front panel assembly section
• Remove the top cove r.
• Remove the front panel assembly.
2.2.1 Removing the jack board (See Fig.1.)
(1) From the inside of the front panel assembly, disconnect the
wire from the connector CN403 on the switch board.
(2) Remove the two screws V attaching the jack holder, take
out the jack board together the jack holder.
Jack board
Wire
Jack holder
2.2.2 Removing the switch board (See Figs.2 and 3.)
(1) From the inside of the front panel assembly, disconnect the
wire from the connector CN403 on the switch board. (See
Fig.2.)
(2) Remove the eight screws W attaching the switch board,
take out the switch board. (See Fig.2.)
Reference:
In the assembly, attach the switch board after attaching
the push buttons and light lens as before. (See Fig.3.)
CN403
W
Switch board
Front panel assembly
Fig.1
Switch board
2.3 DVD mechanism section
• Remove the top cover.
• Remove the DVD mechanism assembly.
2.3.1 Removing the tray (See Figs.1 and 2.)
(1) From the left side of the DVD mechanism assembly, push
the slide cam in th e direction o f the arrow 1 and then pull
out the tray in the direction of the arrow 2. (See Fig.1.)
(2) Push the tray stoppers a in the direction of the arrow 3, pull
out the tray in the direction of the arrow 4. (See Fig.2.)
2.3.2 Attaching the tray (See Fig.2.)
When attaching the tray, insert the tray to the rail of the DVD
mechanism assembly and then pus h the tr ay in th e DVD mechanism assembly.
Tray
2
1
Slide cam
Fig.1
Tray stoppers a
3
4
Wire
CN403
Front panel assembly
W
Fig.2
Push buttonPush button
Light lens
Fig.3
2.2.3 Removing the standby board (See Fig.4.)
From the inside of the front panel assembly, remove the two
screws X attaching the standby board.
X
Front panel assembly
Tray
DVD mechanism assembly
Fig.2
1-10 (No.22009)
Standby board
Fig.4
Page 11
TH-A75
2.3.3 Removing the tray (See Fig.3.)
(1) From the bottom side of the DVD mechanism assembly,
disconnect the card wires from the connectors CN201 and
CN202 on the DVD servo board.
Caution:
Be sure to solder the short land sections b on th e flexible
wire before disconnecting the flexible wire from connector CN101 on the DVD servo board.
If the flexible wire is disconnected without attaching solder, the DVD pickup unit may be destroyed by static
electricity.
(2) Release the locks of the connector CN101 (in the direction
of the arrow 1) on the DVD servo board, disconnect the
flexible wire.
(3) Release the locks of the connector CN101 on the DVD ser-
vo board in the direction of the arro w 1, disconnect the flexible wire.
Caution:
In the assembly, be sure to remove solders from the
short land sections b after connecting the flexib le wire to
the connector CN101 on the DVD servo board.
(4) While pushing the claw c of the DVD mechanism assembly
in the direction of the arrow 2, remove the DVD servo board
in an upward direction.
Flexible wire
Short land sections b
DVD mechanism assembly
Card wire
2.3.4 Removing the clamper base (See Fig.4.)
(1) From the top side of the DVD mechanism assembly, re-
move the four screws A attaching the clamper base.
(2) Remove the clamper base from the bosses d of the loading
base in an upward direction, remove the clamper base
from the sections e while sliding it in the direc tion of th e arrow.
DVD mechanism assembly
Boss d
Boss d
2.3.5 Removing the tray drive board (See Fig.5.)
• Remove the clamper base.
(1) From the bottom side of the DVD mechanism assembly, re-
move the solders from the soldered sections f on the tray
drive board.
(2) Remove the screw B attaching the tray drive board to the
DVD mechanism assembly.
Soldered sections f
Clamper base
AA
AA
Fig.4
Tray drive board
Section e
Loading base
Section e
CN201
Claw c
DVD servo board
222
11
CN101
Fig.3
Card wire
CN202
Claw c
Motor
B
DVD mechanism assembly
Fig.5
(No.22009)1-11
Page 12
TH-A75
2.3.6 Removing the motor (See Fig.6.)
• Remove the clamper base.
• Remove the tray drive board.
(1) From the top side of the DVD mechanism assembly, re-
move the belt of the pulley gear.
Note:
Take care not to attach grease on the belt.
(2) Remove the screw C attaching the motor to the DVD mech-
anism assembly.
DVD mechanism assembly
Pulley gear
Belt
C
Motor
Fig.6
2.3.7 Removing the DVD traverse mechanism assembly
(See Figs.7.)
• Remove the DVD servo board.
• Remove the clamper base.
(1) From the top side of the DVD mechanism assembly, re-
move the four screws D attaching the DVD traverse mechanism assembly to the loading base.
(2) Take out the DVD traverse mechanism assembly from the
loading base.
DVD traverse mechanism assembly
2.3.8 Removing the DVD pickup unit (See Figs.8 to 10.)
• Remove the DVD servo board.
• Remove the clamper base.
• Remove the DVD traverse mechanism assembly.
(1) From the top side of the DVD traverse mechanism assem-
bly, remove the screw E a ttaching the plate and torsion
spring. (See Fig.8.)
(2) Remove the shaft from the section g and then remove the
shaft from the section h. (See Fig.9.)
(3) Disengage the section i of the DVD pickup unit and then re-
move the DVD pickup unit with the shaft.
(4) Pull the shaft out of the DVD pickup unit.
(5) Remove the two screws F attaching the SW. actuator.
2.3.9 Attaching the DVD pickup unit (See Figs.8,10 to 12)
Reference:
Refer to the explanation of "Removing the DVD pickup unit" on
the preceding page.
(1) Attach the SW. actuator and shaft to the DVD pickup unit.
(See Fig.10.)
(2) Engage the section i of the DVD pickup unit to the shaft of
the DVD traverse mechanism assembly first, and set the
both ends of the shaft of the DVD pickup unit in the sections
g and h of the DVD traverse mechanism assembly. (See
Fig.11.)
(3) Slide the DVD pickup unit all the way in the direction of the
arrow. (See Fig.12.)
(4) Mesh the lead screw to the section j of DVD pickup unit and
then set the end of the lead screw to the section k. (See
Fig.12.)
(5) Attach the torsion spring. (See Fig.8.)
(6) Attach the plate. (See Fig.8.)
E
Plate
Torsion spring
DVD pickup unit
1-12 (No.22009)
DD
DD
Fig.7
Loading base
DVD traverse mechanism assembly
Fig.8
Page 13
TH-A75
t
w
DVD pickup unit
Section i
SW. actuator
Shaft
Fig.9
Section h
Section g
F
DVD pickup unit
Shaf
Section
Shaft
Section
i
Section h
DVD traverse mechanism assembly
Fig.11
Section k
Fig.10
Section j
Lead scre
DVD pickup unit
Fig.12
(No.22009)1-13
Page 14
TH-A75
r
2.3.10 Removing the spindle motor board (See Figs.13 and
14.)
• Remove the DVD servo board.
• Remove the clamper base.
• Remove the DVD traverse mechanism assembly.
(1) From the top side of the DVD traverse mechanism assem-
bly, remove the feed motor wire that is soldered to the spi ndle motor board. (See Fig.13.)
(2) From the bottom side of the DVD traverse mechanism as-
sembly, remove the three screws G attaching the spindle
motor board. (See Fig.14.)
Spindle motor board
Remove the solders.
Feed moto
wire
2.3.11 Removing the feed motor (See Figs.15 to 17.)
• Remove the DVD servo board.
• Remove the clamper base.
• Remove the DVD traverse mechanism assembly.
(1) From the top side of the DVD traverse mechanism assem-
bly, remove the feed motor wire that is soldered to the spi ndle motor board. (See Fig.15.)
(2) Remove the screws H attaching the feed holder assembly
and then take out the feed holder assembly. (See Fig.15.)
(3) Remove the screw J attaching the thrust spring. (See
Fig.16.)
(4) Remove the feed gear and lead screw in the direction of the
arrow. (See Fig.16.)
(5) Remove the two screws K attaching the feed motor. (See
Fig.17.)
Spindle motor board
Remove the solders.
Feed holder assembly
H
Feed motor
wire
Feed motor
DVD traverse mechanism assembly
Fig.13
G
DVD traverse mechanism assembly
Fig.14
H
DVD traverse mechanism assembly
Fig.15
G
Feed holder assembly
Lead screw
Feed motor
Feed gear
Thrust spring
J
Fig.16
Feed holder assembly
1-14 (No.22009)
K
Fig.17
Page 15
SECTION 3
Adjustment
3.1 Test mode
(1) The AC cord is connected after pushing the STOP key and the EJECT key of a main body.
(2) Change to test mode, FL indicate "TEST ??". (?? is version)
At this time, TV monitor indicate the firm number " ".
(3) Press PAUSE key of the main body, EEPROM initialize is start.
FL indicate "RDS", EEPROM initialize is complete.
(4) Release the test mode by power to off.
3.2 Up grade
3.2.1 How to UPGRADE
(1) Power to on then mode to DVD.
(2) Set the recorded disc.
(Down loaded the up grade program "TH-A75 -Firmware Update Procedure" from Audio Products DIV.
Technological Material of JS-Net .)
(3) FL indicate "UPGRADE", press cursol key of the remote controller.
(4) TV monitor indication the UPGRADE condition.
(5) Upgrade is complete, disc is automatically eject then finish the upgrade.
TH-A75
3.2.2 After UPGRADE
After upgrade, it is should done the EEPROM initialize and confirm the firm number.
(1) Tray close then release the AC cord.
(2) The AC cord is connected after pushing the STOP key and the EJECT key of a main body.
(3) Change to test mode, FL indicate "TEST ??". (?? is version)
In this time, confrim the TV monitor indicate the firm number "114".
(4) EEPROM initialize start by press the PAUSE key of main body.
FL indicate "RDS", EEPROM initialize is complete.
(5) Release the test mode by power to off.
(No.22009)1-15
Page 16
TH-A75
4.1 UPD784215AGC194 (IC531) : CPU
• Pin layout
75 ~ 51
SECTION 4
Description of major ICs
76
~
100
1 ~ 25
• Pin function
Pin No.SymbolI/OFunction
1~8-- Not use
9VDD-+3.0V
10X2I Main system clock input
11X1I Main system clock input
12VSS- GND
13XT2- OPEN
14XT1I Connect to VSS
15RESETI Reset for Flash write
16-- Not use
17INT0I Error input0 (detect UNLOCK)
18INT1I Error input1 (detect Non Audio)
19DZFI GND
20~22-- Not use
23AVDD- The same potential as VDD
24AV REF0- The same potential as VSS
25-- Not use
26CS1I Chip select input port
27CS2I Chip select input port
28CS3I Chip select input port
29CS4I Chip select input port
30~32-- Not use
33AVSS- The same potential as VSS
34, 35-- Not use
36AV REF1- The same potential as VDD
37RXO For flash write
38TXO For flash write
39-- Not use
40DSP_COMI Command (serial 1)
41DSP_STSO Status (Serial 1)
42DSP_CLKI Clock (Serial 1)
43DSP_RDYI Ready
44-- Not use
45MIDIO_INI Data in (Serial 0)
46MIDIO_OUTO Data out (Serial 0)
47MICKO Clock (Serial 0)
50
~
26
Pin No.SymbolI/OFunction
48HREQI HREQ
49SSO Sla ve select
50,51-- Not use
52DSP_RSTO DSP RESET
53-- Not use
54DA_CSO Chip select output
55-- Not use
56PD/DAO Power down output (RESET)
57PDO Power down output (RESET)
58~63-- Not use
64CODEC_D-OUT O Data out
65CODEC_D-INI Data in
66CODEC_CLKO Clock
67CODEC_CSO Chip select output
68DEBUG1O Debug out port
69DEBUG2O Debug out port
70DEBUG3O Debug out port
71GEBUG4O Debug out port
72GND- GND
73~75-- Not use
76EQO EQ
77CTR_TONEO Center tone
783DO 3D-Phonic
79, 80-- Not use
81VDD- +3.0V
82, 83-- Not use
84ANA/T.TUNEO ANALOG./T.TONE
85LFE.MIXO LFE MIX CONTROL
86LEF_OUTO LFE OUT CONTROL
87-- Not use
88S.MUTEO S.MUTE
EXTCLKIExternal master clock input pin
3TVDD-Output buffer power supply pin, 2.7V~5.5V
4VDSS-Digital Ground pin, 0V
5DVDD-Digital pow er supp ly pin, 4.5V~5 .5V
6TXO Transmit channel (through data) output pin
7MCKOO Master clock outp ut pin
8LRCKI/O Input/Output channel clock pin
9BICKI/O Audio serial data clock pin
10SDTOO Audio serial data output pin
11SDTI1IDAC1 audio serial data input pin
12SDTI2IDAC2 audio serial data input pin
13SDTI3IDAC3 audio serial data input pin
14INT0O Interrupt 0 pin
15INT2O Interrupt 1 pin
16CDTOO Control data output pin in 4-wire serial control mode
CAD1IChip address 1 pin in I2C bus control mode
17CDTIIControl data input pin in 4-wire serial control mode
SDAI/O Control data input/output pin in I2C bus control mode
18CCLKIControl data clock pin in 4-wire serial control mode
SCLIControl data clock pin in I2C bus control mode
19CSNIChip select pin in 4-wire serial control mode
CAD0IChip address 0 pin in I2C bus control mode
20DZF2O Zero input detect 2 pin
OVFO Analog input ove rflow detect pin
21AVSS-Analog ground pin, 0V
22AVDD-Analog power supply pin, 4.5V~5.5V
23VREFHIPositive voltage reference input pin, AVDD
24VCOMO Common voltage output pin, AVDD/2
25DZF1O Zero input detect 1 pin
26LOUT3O DAC3 Lch analog output pin
27ROUT3O DAC3 Rch analog output pin
28LOUT2O DAC2 Lch analog output
29ROUT2O DAC2 Rch analog output pin
30LOUT1O DAC1 Lch analog output pin
31ROUT1O DAC1 Rch analog output pin
32LINILch analog input pin
33RINIRch analog input pin
34PCDD-PLL power supply pin, 4.5V~5.5V
35R-External resistor pin
36PVSS-Pll ground pin, 0V
37RX4IReceiver channel 4 pin (internal biased pin)
38SLAVEISlave mode pin
39RX3IReceiver channel 3 pin (internal biased pin)
40TSTITest pin
41RX2IReceiver channel 2 pin (internal biased pin)
42I2CIControl mode select pin
43RX1IReceiver channel 1 pin (internal biased pin)
44PDNIPower-Down & Reset pin
VFOSHORT
6TBALI Tracking balance control terminal
7FBALI Focus balance control terminal
8POFLTO Track detection threshold level terminal
9DTRDI Data slice part data read signal input ter-
10IDGTI Data slice part address part gate signal
11STANDBYI Standby mo de control te rm in al
12SENI SEN(Serial data input terminal)
13SCKI SCK(Ser ial data input terminal)
14STDII STDI(Serial data input terminal)
15RSCLI Standard electric current terminal
16JLINEI Electric curr ent setting terminal of JLine
17TENI Reversing input terminal of tracking error
18TEOUTO Tracking error signal output terminal
19AGCBALI Offset adjusting terminal 1
20AS OUTO Full adder signal output terminal
21FENI Focus error output amplifier reversing in-
22FEOUTO Focus error signal output terminal
23AGCOFSTI Offset adjusting terminal 2
24MON- Non connect
25AGCLVLO Output amplitude adjustment for DRC
26GND2- Connect to GND
27VREF2O VREF2 voltage output termina l
28VCC2- Power supply terminal 5V
29VHALFO VHALF voltage output termina l
30DFLTONO Reversing output terminal of filter AMP.
31DFLTOPO Filter AMP. output terminal
32DCFLTI Capacity connection terminal for filter
I VFOSHORT control terminal
minal(For RAM)
input terminal( For RAM)
output AMP.
put terminal
output
Pin No.
SymbolI/ODescription
33GND3- Connect to GND
34RFDIFO- Non connect
35RFOUT- Connect to TP103
36VCC3- Power supply terminal 3.3V
37RFCO Filter for RF delay correction AMP.
38DCRFO All addition amplifier capacitor terminal
39OFTRO OFTR output terminal
40BDOO BDO output terminal
41RFENVO RF envelope output terminal
42BOTTOMO Bottom envelope detection filter terminal
43PEAKO Peak envelope detection filter terminal
44AGCGO AGC amplifier gain control terminal
45AGCOO AGC amplifier level control terminal
46TESTSGI TEST signal input terminal
47RFINPI RF signal positive input terminal
48RFINNI RF signal negative input terminal
49VIN5I Internal four-partition (CD) RF input 1
50VIN6I Internal four-partition (CD) RF input 2
51VIN7- Internal four-partition (CD) RF input 3
52VIN8- Internal four-partition (CD) RF input 4
53V I N9I External two-partition (DVD) RF input 2
54VIN10I External two-partition (DVD) RF input 1
55VCC1- Power supply terminal 5V
56VREF1O VREF1 voltage output terminal
57VIN1I Internal four-partition (DVD) RF input 1
58VIN2I Internal four-partition (DVD) RF input 2
59VIN3I Internal four-partition (DVD) RF input 3
60VIN4I Internal four-partition (DVD) RF input 4
61GND1- Connect to GND
62VIN11I 3 beam sub input terminal 2 (CD)
63VIN12I 3 beam sub input terminal 1 (CD)
64HDTYPEO HD Type selection
(No.22009)1-23
Page 24
TH-A75
4.9 BA6664FM-X (IC251) : Motor driver
• Pin layout
1
NC
2
A3
3
NC
4
A2
5
NC
6
NC
7
A1
2930
8
GND
9
H1+
10
H1-
11
H2+
12
H2-
13
H3+
14
H3-
•Block diagram
RNF
28
VM
27
GSW
26
Vcc
25
FG
24
PS
23
EC
22
ECR
21
FR
20
FG2
19
SB
18
CNF
17
BR
16
VH-
15
GND
H1+
H1-
H2+
H2-
H3+
H3-
R
NF
28
VM
27
26
25
24
23
22
21
20
19
18
17
16
15
GSW
VCC
FG
PS
EC
ECR
FR
FG2
SB
CNF
BR
VH
TL
DRIVER
GAIN
CONTROL
CURRENT
SENSE AMP
TSD
GAIN
SWITCH
VCC
+ -
A3
2
A2
4
A1
7
8
9
10
11
12
13
HALL AMP
+
-
+
-
+
+
-
+
+
-
R
D Q
CK Q
PS
TOROUE
SENSE AMP
+
-
VCC
VCC
SHORT BRAKE
BRAKE MODE
14
Hall Bias
1-24 (No.22009)
Page 25
• Pin function
Pin No.SymbolI/ODescription
1NC-Non connect
2A3O Output 3 for spindle motor
3NC-Non connect
4A2O Output 2 for spindle motor
5NC-Non connect
6NC-Non connect
7A1O Output 1 for spindle motor
8GND-Connect to ground
9H1+IPositive input for hall input AMP 1
10H1-INegative input for hall input AMP 1
11H2+IPositive input for hall input AMP 2
12H2-INegative input for hall input AMP 2
13H3+IPositive input for hall input AMP 3
14H3-INegative input for hall input AMP 3
15VHIHall bias terminal
16BR-Non connect
17CNF-Capacitor connection pin for phase compensation
18SBIShort brake terminal
19FG2-Non connect
20FR-Non connect
21ECRITorque control standard voltage input terminal
22ECITorque control voltage input terminal
23PSO Start/stop switch (power save terminal)
24FGO FG signal output terminal
25VCC-Power supply for signal division
26GSWO Gain switch
27VM-Power supply for driver division
28RNFO Resistance connection pin for output current sense
29-Connect to ground
30-Connect to ground
1BIAS INIInput for Bias-amplifier
2OPIN1(+)I Non inverting input for CH1 OP-AMP
3OPIN1(-)IInverting input for CH1 OP-AMP
4OPOUT1 O Output for CH1 OP-AMP
5OPIN2(+)I Non inverting input for CH2 OP-AMP
6OPIN2(-)IInverting input for CH2 OP-AMP
7OPOUT2 O Output for CH2 OP-AMP
8GND-Substrate ground
9STBY1IInput for CH1/2/3 stand by control
10PowVcc1-Vcc for CH1/2 power block
11VO2(-)O Inverted output of CH2
12VO2(+)O Non inverted output of CH2
13VO1(-)O Inverted output of CH1
14VO1(+)O Non inverted output of CH1
15VO4(+)O Non inverted output of CH4
Level Shift
10k
10k
Level Shift
10k
10k
10k
10k
10k
10k
10k
STAND BY
CH1/2/3
729 891011121314
Vcc
Pin No. SymbolI/ODescription
16VO4(-)O Inverted output of CH4
17VO3(+)O Non inverted output of CH3
18VO3(-)O Inverted output of CH3
19PowVcc2-Vcc for CH3/4 power block
20STBY2IInput for Ch4 stand by control
21GND-Substrate ground
22OPOUT3 O Output for CH3 OP-AMP
23OPIN3(-)IInverting input for CH3 OP-AMP
24OPIN3(+)I Non inverting input for CH3 OP-AMP
25OPOUT4 O Output for CH4 OP-AMP
26OPIN4(-)IInverting input for CH4 OP-AMP
27OPIN4(+)I Non inverting input for CH4 OP-AMP
28PreVcc-Vcc for pre block
29- Connect to ground
30- Connect to ground
(No.22009)1-27
Page 28
TH-A75
4.12 DSPC56367PV150 (IC521) : DSP
• Pin layout
144109~
1~36
3772~
•Block diagram
1
TRIPLE
TMER
(SPDIF Tx)
INTER-FA
INTERNAL
2
DAX
CE
GENERATION
SIX CHANNELS
DATA
BUS
INTER-
ADDRESS
UNIT
DMA UNIT
16
HOST
FACE
108~73
8
ESAI
INTER-
FACE
ESAI_1
PERIPHERAL
EXPANSION AREA
PIO_EB
4
6
24-BIT
DSP56300
Core
SHI
INTER-
FACE
5
MEMORY EXPANSION AREA
PROGRAM
RAM
/INSTR.
CACHE
3K x 24
PROGRAM
ROM
40K x 24
Bootstrap
DDB
YDB
XDB
PDB
GDB
PM_EB
YAB
XAB
PAB
DAB
X MEMORY
RAM
13K x 24
ROM
32K x 24
XM_EB
Y MEMORY
RAM
7K x 24
ROM
8K x 24
YM_EB
EXTERNAL
ADDRESS
SWITCH
DRAM &
SRAM BUS
INTERFACE
I-CACHE
EXTERNAL
DATA BUS
SWITCH
BUS
&
18
ADDRESS
10
CONTROL
24
DATA
1-28 (No.22009)
PLL
CLOCL
GENERAT
EXTAL
RESET
PINT/NMT
PROGRAM
INTERRUPT
CONTOROLLER
PROGRAM
DECODE
CONTOROLLE
MODA/IRQA
MODB/IRQB
MODC/IRQC
MODD/IRQD
PROGRAM
ADDRESS
GEBERATOR
DATA ALU
24X24+56>56BIBT MAC
TWO 56BIT ACCUMULATORS
BARREL SHIFTER
24 BITS BUS
POWER
GNGMNT
JTAG
OnCE
4
TW
Page 29
• Pin function
Pin NoSymbolI/OFunction
1SCK/SCLI/O SPI serial clock / I2C serial clock
2SS
3HREQ
4SDO0/SDO0_1O Serial data output 0
5SDO1/SDO1_1O Serial data output 1
6SDO2/SDI3/SDO2_1/SDI3_1O Serial data output 2 / Serial data input 3
7SDO3/SDI2/SDO3_1/SDI2_1O Serial data output 3 / Serial data input 2
8VCCS-SHI,ESAI,ESAI_1,DAX and Timer power
9GNDS-SHI,ESAI,ESAI_1,DAX and Timer ground
10SDO4/SDI1O Serial data output 4 / Serial data input 1
11SDO5/SDI0O Serial data output 5 / Serial data input 0
12FSTI/O Frame sync for transmitter
13FSRI/O Frame sync for receiver
14SCKTI/O Transmitter serial clock
15SCKRI/O Receiver serial clock
16HCKTI/O High frequency clock for transmitter
17HCKRI/O High frequency clock for receiver
18VCCQL-Quite core (Low) power
19GNDQ-Quite ground
20VCCQH-Quite external (High) power
21HDS/HWRIHost data strobe / Host write data
22HRW/HRDIHost read write / Host read data
23HACK/HRRQIHost acknowledge / Receive host request
24HOREQ/HTRQO Host request / Transmit host request
25VCCS-SHI,ESAI,ESAI_1,DAX and Timer power
26GNDS-SHI,ESAI,ESAI_1,DAX and Timer ground
27ADOO Digital audio data output
28ACIIAudio clock input
29TIO0I/O Timer 0 schmitt-trigger input/output
30HCS/HA10IHost chip select / Host address 10
31HA9/HA2IHost address 9 / Host address input 2
32HA8/HA1IHost address 8 / Host address input 1
33HAS/HA0IHost address strobe / Host address input 0
34~37HAD7~HAD4I/O Host address/Data
38VCCH-Host power
39GNDH-Host ground
40~43HAD3~HAD0I/O Host address/Data
44RESET
45VCCP-PLL power
46PCAPIPLL capacitor
47GNDP-PLL ground
48SDO5_1/SDI0_1I/O Serial data output 5_1 / Serial data input 0_1
49VCCQH-Quite external (High) power
50FST_1I/O Frame sync for transmitter
51AA2O Address attribute or Row address strobe
52CAS
53SCKT_1I/O Transmitter serial clock_1
54GNDQ-Quite ground
55EXTALIExternal clock input
56VCCQL-Quite core (Low) power
57VCCC-Bus control power
58GNDC-Bus control ground
/HA2ISPI slave select / I2C slave address 2
I/O Host request
IReset
O Column address strobe
TH-A75
(No.22009)1-29
Page 30
TH-A75
Pin NoSymbolI/OFunction
59FSR_1I/O Frame sync for receiver
60SCKR_1I/O Receiver serial clock_1
61PINIT/NMI
62TA
63BR
64BB
65VCCC-Bus control power
66GNDC-Bus control ground
67WRO Write enable
68RD
69,70AA1,AA0O Address attribute or row address strobe
71BG
72,73A0,A1O Data bus
74VCCA-Address bus power
75GNDA-Address bus ground
76~79A2~A5O Data bus
80VCCA-Address bus power
81GNDA-Address bus ground
82~85A6~A9O Data bus
86VCCA-Address bus power
87GNDA-Address bus ground
88,89A10,A11O Data bus
90GNDQ-Quite ground
91VCCQL-Quite core (Low) power
92~94A12~A14O Data bus
95VCCQH-Quite core (High) power
96GNDA-Address bus ground
97~99A15~A17O Data bus
100~102D0~D2I/O Data bus
103VCCD-Data bus power
104GNDD-Data bus ground
105~110D3,D8I/O Data bus
111VCCD-Data bus power
112GNDD-Data bus ground
113~118D9~D14I/O Data bus
119VCCD-Data bus power
120GNDD-Data bus ground
121~125D15~D19I/O Data bus
126VCCQL-Quite core (Low) power
127GNDQL-Quite core (Low) ground
128D20I/O Data bus
129VCCD-Data bus power
130GNDD-Data bus ground
131~133D21~D23I/O Data bus
134MODD/IRQD
135MODC/IRQC
136MODB/IRQB
137MODA/IRQA
138SDO4_1/SDI1_1I/O Serial data output 4_1 / Serial data input 1_1
139~142TDO,TDI,TCK,TMSO/I Test data output,Test data input,Test clock,Test mode select
143MOSI/HA0I/O SPI master-out-sleve-in / I2C slave address 0
144MISO/SDAI/O SPI master-in-slave-out / I2C data and acknowkedge
IMode select D / External interrupt request D
IMode select C / External interrupt request C
IMode select B / External interrupt request B
IMode select A / External interrupt request A
1-30 (No.22009)
Page 31
4.13 BA7603F-X (IC211/IC221) : Video signal switcher
• Pin layout & Block diagram
IN1a
GND
IN2b
Vcc
OUTb
IN1b
GND
IN1c
16 15 14 13 12 11 10 9
SWa
SWb
12345678
SWc
TH-A75
CTLOUTPUT
HIN2
LIN1
SWa,SWb,SWc: Clamp inputs
IN2a
CTLa
GND
OUTa
OUTb
OUTc
CTLc
IN2c
4.14 BD4740G-W (IC272) : Reset
• Pin layout• Block diagram
54
VccVout
NCSUBGND
123
Vref
Vcc
5
3
GND
4
Vout
(No.22009)1-31
Page 32
TH-A75
A
4.15 K4S643232E-TC60 (IC505) : 512K x 32 bit x 4 banks synchronous DRAM
• Pin layout
1
86
•Block diagram
43
CLK
DD
Address Register
LCKE
44
Bank Select
Row Buffer
Refresh Counter
LRAS
LCBR
LRAS LCBR LWE
CLK CKECS
LCAS
Row Decoder
Col. Buffer
Timing Register
RAS CAS
Data Input Register
512K x 32
512K x 32
512K x 32
512K x 32
Column Decoder
Latency & Burst Length
Programming Register
LWCBR
WEDQM
Sense AMP
LDQM
LWE
LDQM
I/O Control
DQi
Output Buffer
1-32 (No.22009)
Page 33
• Pin function
Pin No.SymbolFunction
1VDDPower for the input buffers and core logic.
2DQ0Data input/output are multiplexed on the same pin.
3VDDQIsolated power supply for the output buffers to provide improved noise immunity.
4,5DQ1,DQ2Data inputs/outputs are multiplexed on the same pins.
6VSSQIsolated ground for the output buffers to provide improved noise immunity.
7,8DQ3,DQ4Data inputs/outputs are multiplexed on the same pins.
9VDDQIsolated power supply for the output buffers to provide improved noise immunity.
10,11DQ5,DQ6Data inputs/outputs are multiplexed on the same pins.
12VSSQIsolated ground for the output buffers to provide improved noise immunity.
13DQ7Data input/output are multiplexed on the same pin.
14N.CThis pin is recommended to be left no connection on the device.
15VDDPower for the input buffers and core logic.
16DQM0Makes data output Hi-Z, tSHZ after the clock and masks the output.
Blocks data input when DQM active.
17WE
18CAS
19RAS
20CS
21N.CThis pin is recommended to be left no connection on the device.
22,23BA0,BA1Selects bank to be activated during row address latch time.
24,25~27A10,A0 - A2Row/column addresses are multiplexed on the same pins.
28DQM2Makes data output Hi-Z, tSHZ after the clock and masks the output.
29VDDPower for the input buffers and core logic.
30N.CThis pin is recommended to be left no connection on the device.
31DQ16Data input/output are multiplexed on the same pin.
32VSSQIsolated ground for the output buffers to provide improved noise immunity.
33,34DQ17,DQ18Data inputs/outputs are multiplexed on the same pins.
35VDDQIsolated power supply for the output buffers to provide improved noise immunity.
36,37DQ19,DQ20Data inputs/outputs are multiplexed on the same pins.
38VSSQIsolated ground for the output buffers to provide improved noise immunity.
39,40DQ21,DQ22Data inputs/outputs are multiplexed on the same pins.
41VDDQIsolated power supply for the output buffers to provide improved noise immunity.
42DQ23Data input/output are multiplexed on the same pin.
43VDDPower for the input buffers and core logic.
44VSSGround for the input buffers and core logic.
45DQ24Data input/output are multiplexed on the same pin.
46VSSQIsolated ground for the output buffers to provide improved noise immunity.
47,48DQ25,DQ26Data inputs/outputs are multiplexed on the same pins.
49VDDQIsolated power supply for the output buffers to provide improved noise immunity.
50,51DQ27,DQ28Data inputs/outputs are multiplexed on the same pins.
52VSSQIsolated ground for the output buffers to provide improved noise immunity.
Enables write operation and row precharge.
Latches data in starting from CAS, WE active.
Latches column addresses on the positive going edge of the CLK with CAS low.
Enables column access.
Latches row addresses on the positive going edge of the CLK with RAS low.
Enables row access & precharge.
Disables or enables device operation by masking or enabling all inputs except CLK, CKE and DQM.
Selects bank for read/write during column address latch time.
53,54DQ29,DQ30Data inputs/outputs are multiplexed on the same pins.
55VDDQIsolated power supply for the output buffers to provide improved noise immunity.
56DQ31Data input/output are multiplexed on the same pin.
57N.CThis pin is recommended to be left no connection on the device.
58VSSGround for the input buffers and core logic.
59DQM3Makes data output Hi-Z, tSHZ after the clock and masks the output.
Blocks data input when DQM active.
60~66A3 - A9Row/column addresses are multiplexed on the same pins.
67CKEMasks system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one cycle prior to new command.
Disables input buffers for power down mode.
68CLKActive on the positive going edge to sample all inputs.
69,70N.CThis pin is recommended to be left no connection on the device.
71DQM1Makes data output Hi-Z, tSHZ after the clock and masks the output.
Blocks data input when DQM active.
72VSSGround for the input buffers and core logic.
73N.CThis pin is recommended to be left no connection on the device.
74DQ8Data input/output are multiplexed on the same pin.
75VDDQIsolated power supply for the output buffers to provide improved noise immunity.
76,77DQ9,DQ10Data inputs/outputs are multiplexed on the same pins.
78VSSQIsolated ground for the output buffers to provide improved noise immunity.
79,80DQ11,DQ12Data inputs/outputs are multiplexed on the same pins.
81VDDQIsolated power supply for the output buffers to provide improved noise immunity.
82,83DQ13,DQ14Data inputs/outputs are multiplexed on the same pins.
84VSSQIsolated ground for the output buffers to provide improved noise immunity.
85DQ15Data input/output are multiplexed on the same pin.
86VSSGround for the input buffers and core logic.
1-34 (No.22009)
Page 35
4.16 GP1FA351RZ (J5521) : Fiber optic receiver
• Pin layout
4.17 GP1UM271XK (IC402) : IR detecting unit for remote control
1VCC1-V CC except for 75ohm driver
2COMPOSITE.INIInput composite
3SQUEEZE.SWISelecting squeeze mode
4LETTER-BOX.SWISelecting letter-box mode
5MUTE-SW-1IComposite/S signal mute selection
6C-INIInput Chroma signal
7GND11-Composite/S GND except for 75ohm driver
8Y-IN-1IInput Y signal
9YC-MIX.SWISelecting of doing Y/C-MIX or not
10SIGNAL-IN.SWISelection of a kind of signal
11Y-IN-2IInput component Y or baseband signal
12MUTE-SW-2IComponent signal mute selection
13LPF.SWISelection of a kind of component LPF
14CB.INIInput component or baseband signal
15AMP.SW-2ISelecting amplifier gain for component signal
16CR.INIInput component or baseband signal
17GND12-Component GND except for 75ohm driver
18REGOCapacitor terminal for regulator
19DRIVE.SW-2I2drive/1drive select for component signal
20GND26-CR-GND for 75ohm driver
21CR.OUTO75ohm driver output of pin16 input
22GND25-CB-OUT for 75ohm driver
23CB.OUTO75ohm driver output of pin14 input
24VCC22-Component Vcc for 75ohm driver
25Y-OUT-2O75ohm driver output of pin11 input
26GND24-Component Y out for 75ohm driver
27GND23-Y out for 75ohm driver
28Y-OUT-1O75ohm driver output of pin8 input
29GND22-Chroma out for 75ohm driver
30C-DC.OUTODC voltage output for S1,S2
31C-OUTO75ohm driver output of pin6 input
32GND21-Composite out for 75ohm driver
33COMPOSITE-OUTO75ohm driver output of pin2 input
34VCC21-Composite/S Vcc for 75ohm driver
35DRIVE.SW-1I2drive/1drive select for composite/S signal
36AMP.SW-1ISelecting amplifier gain for composite/S signal
6SubSubstrate pin, The 6pin must be connected to GND.
7VINInput pin
(No.22009)1-41
Page 42
TH-A75
4.24 MN101C49GKR (IC271) : System micom
• Pin layout
100 76
1
75
25
51
26 50
• Pin function
Pin No.SymbolI/OFunction
1VREF--Connect to ground
2NTSEL(RGB--SEL)INTSC/PAL discrimination (RGB/YC switching discrimination) signal
3VCR-S/CIVCR S/Composite detection signal
4DBS-S/CIDBS S/Composite detection signal
5TH-DETIHeat sink temp. detection
6SAFETY1IShort det ection signal
7VERSIONIVersion select switch signal
8KEY-IN1IKey input1 (AD)
17GND-Ground
18DI-DOO Panel serial communication data output
19NC-Not used
20DI-CKO Panel serial communica tion clock output
21S2UDT/TX (DATA OUT)O Serial communication data output for PANTERA
22S2UDT/RX (DATA IN)ISerial communication data input for PANTERA
23SCLK/CLKISerial communication clock for PANTERA
24INTPO Transmit request for PANTERA communication
25CPU-RESETO Reset signal for PANTERA
26CSIReceive request for PANTE RA communication (Interruption)
27REMOCONIRemote control signal input (interruption)
28PROTECTISpeaker protect detection
29RDS STIRDS communication strobe (Interruption)
30NC-Not used
31GND-Ground
32VDD2/FLASH-VDD-VDD for Flash write
33RESET-IN/RSTISystem control micom reset input
34DSP-RSTO DSP micom reset signal output
35DSP-RDYO DSP micom ready signal
36AVC-OUTO AV compulink signal output
37AVC-INIAV compulink signal input
38~40NC-Not used
41VPP/FLASH-VSS-VPP for Flash write
42DSP-COMO DSP serial communication data output
43DSP-STATIDSP serial communication data input
44DSP-CLKO DSP serial communication clock
45VOL-DATAO VOLUME serial communication data output
46VOL-LATCHO VOLUME serial communication strobe
47VOL-CLKO VOLUME serial communication clock
1-42 (No.22009)
Page 43
Pin No.SymbolI/OFunction
48NC-Not used
49INT/PROGO Video driver filter select
50RELAT-CTLO Speaker control
51BASSO Bass boost control
52,53NC-Not used
54VIDEO-MUTE1O Video driver mute1 control
55VIDEO-MUTE2O Video driver mute2 control
56VIDEO-YCMIXO Video driver YCMIX control
57VIDEO-RGBO Video driver RGB control
58NC-Not used
59INHIAC cut of detection
60NC-Not used
61HPIHeadphone input detection
62S-PONO System power supply control
63AMP-PONO Power amp. power supply cont rol
64DVD-PONO DVD power supply control
65TU-PONO TUNER power supply control
66--Not used
67RDS-DATAO RDS communication data
68RDS-CLKO RDS communication clock
69NC-Not use
70TU-DIITUNER serial communication data input
71NC-Not use
72TU-DOO TUNER serial communication data output
73TU-CLKO TUNER serial communication clock
74TU-CEO TUNER serial communication CE
75AM-BEATO AM beat cut switching
76S-MUTEO System mute
77,78VS1,VS3O E version SLOW switch control
79FAN-ON/OFFO Fan ON/OFF control
80FAN-CTLO Fan speed control
81STBY-LEDO STANDBY LED control
82DISC-SETO Read start signal output for Frontend
83DISC-STOPIReceive eject permission signal from Frontend
84SAFETY2IShort detection2
85,86NC-Not used
87VIDEO-SW1O Video select output1
88VIDEO-SW2O Video select output2
89VIDEO-SW3O Video select output3
90BLANK-CTLO E version BLANKING select
91DI-RSTO Panel micom reset output
92DI-CSO Panel micom serial communication chip select
93NC-Not used
94TOPENO Mechanism open output
95DAVSS-Ground
96TCLOSEO Mechanism close output
97LMMUTEO Loader mute output
98SWOPENIMechanism switch open detection
99SWUPDNIMechanism switch close detection
1NC-Not connect
2DATAINIFL driver communication data input
3CLOCKIFL driver communication clock input
4NC-Not connect
5INITIALIFL driver communication CS(INITIAL)
6,7NC-Not connect
8B5V-VDD(B5V)
9OSC2O 8MHz main clock output
10OSC1I8MHz main clock input
11,12GND-Ground
13NC-Not connect
14~23GND-Ground
24VREF+-Reference voltage
25NC-Not connect
26RESETIFL reset input
27PROG_LEDO PROGRAM LED switching signal
28NCO Not connect
29ILUMI_LEDO Illumi LED swi tching signal
30~32NC-Not connect
33~38GND-Ground
39PROG_DMO Program LED dimmer select
40ILUMI_DIMO Illumi LED dimmer select
41~46NC-Not connect
47G1O Grid signal outputs
48~59G2~G13O Grid signal outputs
60G14O Grid signal outputs
61~64NC-Not connect
65~99S1~S35O Segment signal outputs
100-VPP-VPP
1-44 (No.22009)
Page 45
4.27 MN102L62GLF3 (IC401) : Unit CPU
• Pin layout
100 76
1
75
TH-A75
25
51
26 50
• Pin function
Pin No.SymbolI/OFunction
1WAITI Micro computer wait signal input
2REO Read enable
3/SPMUTEO Spindle muting output to IC251
4WENO Write enable
5/LMMUTE- Not connect
6CS1OChip select for ODC
7CS2- Chip select for ZIVA
(Not connect.)
8HDTYPEO HD TYPE selection
9/DRVMUTEO Driver mute
10SBRKO SP motor brake control
11LSIRSTO LSI reset
12WOR0O Bus selection input
13-16A0-A3O Address bus (0-3) for CPU
17VDD- Power supply
18SYSCLK- System clock signal output
(Not connect.)
19VSS- Ground
20XI- Not use (Connect to VSS)
21XO- Not connect
22VDD- Power supply
23OSCII Clock signal input (13.5MHz)
24OSCOO Clock signal output (13.5MHz)
(Not connect.)
25MODEI CPU mode selection input
26-33A4-A11O Address bus (4-11) for CPU
34VDD- Power supply
35-40A12-A17O Address bus (12-17) for CPU
41A18- Address bus 18 for CPU
(Not connect.)
42A19- Address bus 19 for CPU
(Not connect.)
43VSS- Ground
44A20- Address bus 20 for CPU
( Not connect.)
45DISCSTPO DISC STOP control
46HAGUPO H/A gain control
47TCLOSE- Not connect.
48WOBBLEFIL- Not connect.
49/HFMONI HF monitor
50TRVSWI Detection switch of traverse in-
side
Pin No.SymbolI/OFunction
51SWUPDN- Not connect.
52MECHA_H/VI Disc detection
53DISCSETO Serial enable signal for ADSC
54VDD- Power supply
55FEPENO Serial enable signal for FEP
56SLEEPO Standby signal for FEP
57BUSY- Not connect.
58REQO Communication request
59- Connect to TP405 (REQ)
60- Not connect.
61VSS- Ground
62EPCSO EEPROM chip select
63EPSKO EEPROM clock
64EPDII EEPROM data input
65EPDOO EEPROM data output
66VDD- Power supply
67SCLKOI Communication clock
68S2UTDI Communication input data
69U2SDTO Communication output data
70CPSCKO Clock for ADSC serial
71P74/SBI1- Connect to VSS
72SDOUTO ADSC serial data output
73- Not use.
(Pull-up to power supply)
74- Not use.
(Pull-up to power supply)
75NMI- Not use.
(Pull-up to power supply)
76ADSCIRQI Interrupt input of ADSC
77ODCIRQI Interrupt input of ODC
78DECIRQI Interrupt input of ZIVA
79CSSIRQI Interrupt input of SODC
80ODCIRQ2I Interruption of system control
81ADSEPI Address data selection input
(Pull-up to power supply)
82RSTI Reset input
83VDD- Power supply
1NINT0O System control interruption 0
2NINT1O System control interruption 1
3VDD3-Power supply (3.3V)
4VSS-Ground
5NINT2O System control interruption 2
6WAITODCO System control wait control
7NMRST-System control reset (Not connect.)
8DASPST-DASP signal initializing
9~17CPUADR17 - 9ISystem control address
18VDD18-Power supply (1.8V)
19VSS-Ground
20DRAMVDD18-Connect to VDD18
21DRAMVSS-Connect to VSS
22~30CPUADR8 - 0ISystem control address
31VDD3-Power supply (3.3V)
32VSS-Ground
33DRAMVDD3-Connect to VDD3
34NCSISystem control chip select
35NWRISystem control write
36NRDISystem control read
37~44CPUDT7 - 0I/O System control data
45CLKOUT1-Not connect.
46MMODIConnect to VSS
47NRSTISystem reset
48MSTPOLIMaster terminal polarity switch input (Connect to VSS.)
49SCLOCK-Not connect.
50SDATA-Not connect.
51OFTRIOff track signal input
52BDOIRF dropout/BCA data of making to binary
53~56PWM1 - 4-Not connect.
57VDD3-Power supply (3.3V)
58DRAMVDD18-Connect to VDD18
59DRAMVSS-Connect to VSS
60VSS-Ground
71TILT-Not connect.
72TILTN-Not connect.
73TX-Not connect.
74DTRD-Not connect.
75IDGT-Not connect.
76VDD18-Power supply (1.8V)
77VSS-Ground
78VDD3-Power supply (1.8V)
79OSCI1I16.9MHz clock input
80OSCO1-Not connect.
81VSS-Ground
82TSTSGO Calibration signal
83VFOSHORTO VFO short output
84JLINEO J-line setting output
85AVSS-Analog ground
86ROUT-Not connect.
87LOUT-Not connect.
88AVDD-Analog power supply
89VCOFIJFVCO control voltage
90TRCRSIInput signal for track cross formation
91CMPIN-Not connect.
92LPFOUT-Not connect.
93LPFINIPull-up to VHALF
94AVSS-Analog ground
95HPFOUT-Not connect.
96HPFINIHPF input
97CSLFLTIPull-up to VHALF
98RFOIF-Not connect.
99AVDD-Analog power supply
100PLFLT2IConnect to capacitor 2 for PLL
101PLFLT1IConnect to capacitor 1 for PLL
102AVSS-Analog ground
103RVIIConnect to resistor for VREF reference current source
104VREFHIReference voltage input (2.2V)
105PLPG-Not connect.
106VHALFIReference voltage input (1.65V)
107DSLF2IConnect to capacitor 2 for DSL
108DSLF1IConnect to capacitor 1 for DSL
109AVDD-Analog power supply
110NARFIEquivalence RF111ARFIEquivalence RF+
112JITOUTO Output for jitter signal monitor
113AVSS-Analog ground
114DAC0O Tracking drive output
115DAC1O Focus drive output
116AVDD-Analog power supply
117AD0IFocus error input
118AD1IPhase difference/3 beams tracking error
TH-A75
(No.22009)1-47
Page 48
TH-A75
Pin No.SymbolI/OFunction
119AD2IAS: Full adder signal
120AD3IRF envelope input
121AD4IDVD laser current control terminal
122AD5ITracking drive IC input offset
123AD6ICD laser current control terminal
124TECAPA-Not connect.
125VDD3-Power supply (3.3V)
126VSS-Ground
127~130MONI0 - 3O Internal goods title monitor (Connect to TP306 - TP309)
27VDDio-Power supply terminal 3.3V
28MA0O SDRAM Address bus terminal
29MA10O SDRAM Address bus terminal
30MA11-Non connect
31VSSio-Connect to ground
32,33MA12,13O SDRAM Address bus, reserved for terminal compatibility with 64Mb SDRAM
34VDD-Power supply terminal 1.8V
35CS0O SDRAM Primary bank chip select
36VDDio-Power supply terminal 3.3V
37RASO SDRAM Command bit
38CASO SDRAM Command bit
39WEO SDRAM Command bit
40VSSio-Connect to ground
41DQM0O SDRAM Data byte enable
42DQM2O SDRAM Data byte enable
43MD16I/O SDRAM Data bus terminal
44VDDio-Power supply terminal 3.3V
45,46MD17,18I/O SDRAM Data bus terminal
47VSS-Connect to ground
48MD19I/O SDRAM Data bus terminal
49VSSio-Connect to ground
50~52MD20~22I/O SDRAM Data bus terminal
53VDDio-Power supply terminal 3.3V
54~56MD23~25I/O SDRAM Data bus terminal
57VSSio-Connect to ground
58~61MD26~29I/O SDRAM Data bus terminal
62VDDio-Power supply terminal 3.3V
63,64MD30,31I/O SDRAM Data bus terminal
65DQM3O SDRAM Data byte enable
66CS1O SDRAM Extension ba nk chip select
67VSSD-Connect to ground
68SPDIFO S/PDIF Digital audio output terminal
69VSSio-Connect to ground
70AINIDigital audio input for digital micro; can be used as GPIO
71AOUT3O Serial audio output data to audio DAC for left and right channels for down-mix
72AOUT2O Serial audio output data to audio DAC for surround left and right channels
73AOUT1O Serial audio output data to audio DAC for center and LFE channels
74AOUT0O Serial audio output data to audio DAC for left and right channels
75VDDio-Power supply terminal 3.3V
76PCMCLKO Audio DAC PCM sampling clock frequency, common clock for DACs and ADC
77VDD-Power supply terminal 1.8V
78ACLKO Audio interface serial data clock, common clock for DACs and AD converter
79LRCLKO Left / right channel clock, common clock for DACs and ADC
80SRSTO Active low RESET signal for peripheral reset
81RSTPIRESET_Power : from system, used to reset frequency synthesizer and rest of chip
TH-A75
(No.22009)1-51
Page 52
TH-A75
Pin No.SymbolDescription
82VSSio-Connect to ground
83RXD1IUART1 Serial data input from external serial device, used for IR receiver
84SSPIN1I/O SSP1 Data in or 16X clock for USART function in UART1
85VSS-Connect to ground
86SSPOUT1I/O SSP1 Data out or UART1 data-terminal-ready signal
87SSPCLK1I/O SSP1 Clock or UART1 clear-to -send signal
88SSPCLK0I/O SSP0 Clock or request-to-send function in UART1
89VDD-Power supply terminal 1.8V
90SSPIN0I/O SSP0 Data in or 16X clock for USART function in UART0
91VDDio-Power supply terminal 3.3V
92SSPOUT0I/O SSP0 Data out or UART0 data-terminal-ready signal
93TXD0I/O UART0 Serial data output to an external serial device
94RXD0IUART0 Serial data input from external serial device
95CTS0I/O UART0 Clear-to-send signal
96RTS0I/O UART0 Request-to-s end signal
97VSSio-Connect to ground
98CXIICrystal input terminal for on-chip oscillator or system input clock
99CXOO Crystal output terminal for on-chip oscillator
100OSCVSS-Connect to ground for oscillator
101OSCVDD-Power supply terminal for oscillator 1.8V
102MVCKVDD-Power supply terminal for main and video clock PLL 3.3V
103SCENIScan chain test enable
104MVCKVSS-Connect to ground for main and video clock PLL
105ACLKVSS-Connect to ground for audio clock PLL
106SCMDIScan chain test mode
107ACLKVDD-Power supply terminal for audio clock PLL 3.3V
108VDDDAK-Power supply terminal for DAC digital 1.8V
109VSSDAC-Connect to ground for DAC digital
110Cr/RO Video signal output (Cr output : composite/component Red output)
111IOMO Cascaded DAC differential output used to dump current into external resistor for power
112C/Cb/BO Video signal output (Chrominance output for NTSC/PAL S-Video
113VAA3-Cb output for comp onent Blue output)
114Y/GO Power supply terminal for DAC analog 3.3V
115VSSA-Video signal output (Luminance for S-Video and component Green output)
116VREF-Connect to ground for DAC analog
117VAA-Non connect
118CVBS/CO Video signal output (Composite video Chrominance output for S-Video)
119RSETO Current setting resistor of output DACs
120COMPO Compensation capacitor connection
121VSS-Connect to ground
122VCLK-Non connect
123VSYNC-Non connect
124HSYNC-Non connect
125VDDio-Power supply terminal 3.3V
126~131VI07~02-Non connect
132VSSio-Connect to ground
1-52 (No.22009)
Page 53
Pin No.SymbolDescription
133,134VI01,00-Non connect
135VDD-Power supply terminal 1.8V
136~139AD31~28I/O Multiplexed address / data bus terminal
140VDDio-Power supply terminal
141~144AD27~24I/O Multiplexed address / data bus terminal
145PWE3I/O Byte write enable for FLASH,EEPROM,SRAM or peripherals terminal
146AD23I/O Multiplexed address / data bus terminal
147VSSio-Connect to ground
148~153AD22~17I/O Multiplexed address / data bus terminal
154VDDio-Power supply terminal 3.3V
155AD16I/O Multiplexed address / data bus terminal
156PWE2I/O Byte write enable for FLASH,EEPROM,SRAM or peripherals terminal
157,158AD15,14I/O Multiplexed address / data bus terminal
159VDD-Power supply terminal 1.8V
160SCLKO External bus clock used for programmable host peripherals
161ACKI/O Programmable WAIT/ACK/RDY control
162VSSio-Connect to ground
163~168AD13~8I/O Multiplexed address / data bus terminal
169VDDio-Power supply terminal 3.3V
170PWE1I/O Byte write enable for FLASH,EEPROM,SRAM or peripherals terminal
171VSS-Connect to ground
172~176AD7~3I/O Multiplexed address / data bus terminal
177VSSio-Connect to ground
178~180AD2~0I/O Multiplexed address / data bus terminal
181VDDio-Power supply terminal 3.3V
182PWE0I/O Byte write enable for FLASH,EEPROM,SRAM or peripherals terminal
183ALEI/O Address latch enable
184~187LA0~3I/O Latched address 0~3
188VSSio-Connect to ground
189RDI/O Read terminal
190LHLDAO Bus hold acknowledge in slave mode
191LHLDIBus hold request from external master in slave mode
192VDD-Power supply terminal 1.8V
193PCS0O Peripheral chip select 0, generally used for enabling the program store ROM/FLASH
194,195XI01,02I/O Programmable general purpose external input/output
196VDDio-Power supply terminal 3.3V
197~200XI03~06I/O Programmable general purpose external input/output
201VSS-Connect to ground
202,203XI07,08I/O Programmable general purpose external input/output
204VSSio-Connect to ground
205XI09I/O Programmable general purpose external input/output
206~209XID10~13I/O Programmable general purpose external input/output
214DREQO DVD Parallel mode data request
215DCLKIData sampling clock
216DSTBIParallel mode data valid, serial mode left/right clock
217DVD0IDVD Drive parallel data port
218VSSio-Connect to ground
219~223DVD1~5IDVD Drive parallel data port
224VDDio-Power supply terminal 3.3V
225,226DVD6,7IDVD Drive parallel data port
227MD0I/O SDRAM Data bus terminal
228VSSio-Connect to ground
229MD1I/O SDRAM Data bus terminal
230VSS-Connect to ground
1-9A15-A8,A19I Address inputs : To provide memory addresses.
10NC- No connection : Unconnected pins
11WE#I Write Enable : To control the Write operations
12-15NC- No connection : Unconnected pins
16-25A18,A17,A7-A0I Address inputs : To provide memory addresses.
26CE#I Chip Enable : To activate the device when CE# is low.
27VSS- Ground
28OE#I Output Enable : To gate the data output buffers
29-36DQ0,DQ8,DQ1
37VDD- Power supply : To provide power supply voltage (2.7-3.6V)
38-45 DQ4,DQ12,DQ5
46VSS- Ground
47NC- No connection : Unconnected pins
48A16I Address input : To provide memory address.
SymbolI/OFunction
During Sector-Erase A19-A11 address lines will select the sector.
During Block-Erase, A19-A15 address line will select the block.
During Sector-Erase A19-A11 address lines will select the sector.
During Block-Erase, A19-A15 address line will select the block.
I/O Data input/output : To output data during Read cycles and receive input data during write cycles.
DQ9,DQ2,DQ10
DQ3,DQ11
DQ13,DQ6,DQ14
DQ7,DQ15
Data is internally latched during a write cycle.
The outputs are in tri-state when OE# or CE# is high.
I/O Data input/output : To output data during Read cycles and receive input data during write cycles.
Data is internally latched during a write cycle.
The outputs are in tri-state when OE# or CE# is high.
During Sector-Erase A19-A11 address lines will select the sector.
During Block-Erase, A19-A15 address line will select the block.
TH-A75
(No.22009)1-59
Page 60
TH-A75
4.40 STK404-130 (IC701) : Power ampli fier
• Pin layout
113
•Block diagram
R1
TR1 TR2
R2C1
PT1
IN1NFGND BIAS +12V
TR3TR4
SUB
12345
PRE
-Vcc
TR7
TR8
C3
NC-VCC +VCC -OUT +OUT
D1
TR6
R4
R5
C2
TR5
R3 R6
678910111213
1-60 (No.22009)
Page 61
4.41 STR-G6651 (IC121) : Switching reg ulator
• Block diagram
VIN
4
TH-A75
1
D
START
REG
T.S.D
O.V.P
LATCH
O.S.C
Comp.2
Vth(2)
DRIVE
Comp.1
2
S
Vth(1)
5
O.C.P/F.B
3
GND
• Pin function
Pin No. SymbolDescriptionFunction
1DDrain terminalMOS FET drain
2SSource terminalMOS FET source
3GNDGround terminalGround
4VinPower supply terminalInput of power supply for control circuit
5O.C.P/F.B Over current / Feedback terminal In put of over current detection signal and constant voltage control signal
AV & MULTIMEDIA COMPANY 10-1,1chome,Ohwatari-machi,Maebashi-city,371-8543,Japan
(No.22009)
Printed in Japan
200302WPC
Page 65
SCHEMATIC DIAGRAMS
DVD DIGITAL CINEMA SYSTEM
TH-A75
CD-ROM No.SML200302
Area suffix
TH-A75
SP-WA75
VCR/DBS
FM/AM
AUDIO
ANGLE
TOP MENU
MENU
DSP
SURROUN D
CONTRO L
VCR
123
+
S.WF R
–
TV
456
SLEEP
789
+
SURR-L
SETTING
–
10
TV RETURN
ADJUST
ON
SCREEN
ENTER
CHOIC E
CHANNEL/ZOOM
TV/VIDEO1MUTING
/REW
PLAY
TUNING
DOWNU P
O.T.
STOP
REPL AY
REC
MEMORY
DIMMER
RM–STH A7 5 U
DVD CINEM A SYSTEM
TV AUD I O
DVD
SUBTITL E
RETURN DIGEST
OFF
CENTER
S-BAC K
0
FM MODE
US ---------------------- Singapore
UP ---------------------------- Korea
UT --------------------------- Taiwan
UX ------------------- Saudi Arabia
VCR 1
VCR
DECODE
SOUND
EFFEC T
+
TEST
–
+
+
SURR- R
–
–
+10
100+
AUDIO/
TV/VCR
CATV/DB S
VFP
PROGRESSIVE
VOLUMETV VO L
¡
FF/
PAUSE
STROB E
STANDB Y
COMPACT
DIGITAL•EX
SUPER VIDEO
PRO LOGI C
SP-XSA75
DVD DIGITAL CINEMA SYSTEM
PROGRESSIV E
SP-XCA75
SOURCE
VOLUM E +
PHONES
XV-THA75
Contents
Block diagrams
Standard schematic diagrams
Printed circuit boards
COPYRIGHT 2003 VICTOR COMPANY OF JAPAN, LTD.
2-1
2-4
2-15~21
No.22009SCH
2003/02
Page 66
TH-A75
In regard with component parts appearing on the silk-screen printed side (parts side) of the PWB diagrams, the
parts that are printed over with black such as the resistor ( ), diode ( ) and ICP ( ) or identified by the " "
mark nearby are critical for safety.
(This regulation does not correspond to J and C version.)
2-20
Page 67
Block diagrams
Overall block diagram
TH-A75
System control section
TU-R
TU-L
RDS
FLINT
LVA10375-A1
CN205
8
6
10
4
3
2
1
CN208
14
16
17
18
19
21
23
25
27
28
X2701
OSC
8MHz
IC201
RDS DECODER
X2071
OSC
70,72-74
21-26
82,83
98,99
13
8,9,1016
29
67,68
IC271
SYSTEM MICOM
Q2801
Q2802
S-MUTE
DRIVER
76
34,35
42-47
51
87-89
90
49,56,57
J701
J702
FROM/TO
TUNER UNIT
5
&
LOW VOLTAGE
DSP
IC531
CN703
DETECTOR
CN702
IC540
IC544
MICOM
CN204
STB/DBS
J5531
IC546
IC548
IC511
CODEC
&VCR
L/R IN
AMP.
IC557
DAC
IC512
STB/DBS
DIGITAL IN
J5521
B/E/EN/EV
version
only
TU-DTO
TU-CKJ
TU-DTI
TU-CE
FROM/TO
CN503 OF
LVA10298-C1
(DVD servo)
SPDIF
DISKSTP
SSPCLK1B
SSPOUT1B
SSPIN1A
FLCS-
CPURST
SWUPDN
SWOPEN
AMP.
IC721
IC701
WOOFER
MAIN AMP.
CN701
LVA10379-A1
Amplifier board
J2402
COMPONENT
VIDEO OUT
Cb
Cr
J2401
S-VIDEO OUT
Y
Y
C
J2401
COMPOSITE VIDEO OUT
J2201
S-VIDEO IN1/IN2
J2201
C
Y
COMPOSITE VIDEO IN1/IN2
AV COMPULINK2
J2891
CN205
FROM/TO
TUNER UNIT
CN592
IC560
4
SW2
IC221
VIDEO
IC525
IC526
IC527
SRAM
IC231
VIDEO
DRIVER
IC211
VIDEO
SW1
B/E/EN/EV
version only
RDS
IC201
DSP board
LVA10377-A1
IC524
F-ROM
IC562
IC564
IC551
DSP
IC521
CN591
CN203
AMP.
IC566
8CH
VOLUME
PROTECTOR
3
Main board
54
IC271
MICOM
SYSTEM
LVA10375-A1
Main board
IC509
FLASH
CN209
CN502
ROM
CN503
CN208
CN171CN173 CN172
CN202 CN201
F1,F2
CN207
CN401
D5V
-VDISP
IC501
2
IC451
EEPROM
IC505
DRAM
IC401
UNIT CPU
PANTERA-2
IC301
SODC
CN101
LVB10378-A1
Power board
T101
REG.
T121
Trans.
CN174
Fan
motor
LVA10376-A1
Switch board
IC401
DISPLAY
IC402
DI401
MICOM
FL DISPLAY
REMOCON
AC IN
CN101
DVD servo board
LVA10298-C1
IC101
FRONT END
IC201
PROCESSOR
CN201
DRIVER
CN202
IC251
MOTOR
SPINDLE
DRIVER
CN403
CN206
CN402
LVA10378-A3
Power key board
LVA10378-A4
Headphone board
POWER
W401
switch
J401
LED
STANDBY
HEADPHONE
FROM/TO
CN401 OF
LVA10376-A1
(FL display)
DI-RESET
DI-CS
DI-DATA
DI-CLOCK
KEY1
KEY2
REMOCON
HP
HP-R
HP-L
CN207
19
18
17
16
15
14
13
10
9
7
LVA10378-A3
Power key board
POWER
STANDBY
8,9,18,20
61,91,92
27
81
Q2861
STBY
LED
CTL
CN206CN402
4
4
1
1
79
80
6
33
55
3
4
36
2
59 62-64
75
IC272
Q2702
RESET
HP AMP.
Q2701
BACKUP
Q2821
SAFETY1
DETECT
Q2703
IC251
CN203
TU-R
17
TU-L
18
S-MUTING
11
IEC958
29
12
HP-R
13
HP-L
BASS
9
VOL_CLK
8
VOL_LATCH
7
VOL_ DATA
6
DSP-CLK
5
DSP-STAT
4
DSP-COM
3
DSP-RDY
2
DSP-RST
1
D5V
26
D5V
25
SW1-SELECT1
SW1-SELECT2
SW1-SELECT
BLANK-CTL
VIDEO-LPF
VIDEO-YCMIX
VIDEO-RGB
VIDEO-MUTE1
VIDEO-MUTE2
VCR-S/C
DBS-S/C
AVVLR
PAL/NTSC
CN202
D5V
5
CN201
S-PON
6
DVD-PON
7
BEAT CUT
8
AMP-PON
9
2
B5V
+12V
17
12
-12V
FAN-ON/OFF
11
10
FAN-CTL
FROM/TO
CN591 OF
LVA10377-A1
(DSP)
FROM/TO
CN173 OF
LVB10378-A1
(Power supply)
FROM/TO
CN172 OF
LVB10378-A1
(Power supply)
TO
Video
input/output
1
DVD traverse
mechanism
mechanism
DVD loader
mechanism
DVD traverse
AB CDEFG
2-1
Page 68
TH-A75
TH-A75
Video input/output section
IC231
VIDEO
DRIVER
Main board
23
21
25
33
31
28
J2891
AV COMPULINK
J2402
Cb
Cr
Y
J2401
CV
S/COMPOSITE
VIDEO OUT
C
Y
LVA10375-A1
AVVLR
S2401
11
14
9
8
16
1
VIDEO
PAL/NTSC
SW
IC221
SW2
14
16
14
11
9
5
6
3
8
16
1
5
6
3
IC211
VIDEO
SW1
11
2
6
8
PAL/NTSC
TO
5
System
control
S/COMPOSITE
VIDEO IN 1
Cb
Cr
C
Y
J2201
C
Y
CV
4
C
TO
System
control
S/COMPOSITE
VIDEO IN 2
VIDEO-SW1/SW3
VIDEO-MUTE1/MUTE2
VIDEO-Y/C-MIX
Y
CV
VIDEO-SW2
VIDEO-RGB
VIDEO-LPF
3
DVD servo section
M9V
D3.3V
D3.3V
FROM/TO
CN209 OF
LVA10375-A1
M9V
(System control)
4
3
CN502
DVD servo board
M9V
D5V
6
D5V
S5V
8
S5V
11
S3.3V
14
12
S3.3V
D3.3V
COUT
YOU T
151719
CbOUT
CrOUT
21
OSC
X571
OSC
X301
79
S1OUT(NC)
TOPE N
TCLOSE
/LMMUTE
24
272628
98
27MHz
16.9MHz
STD0-7
6
47
114
118
IC501
112
110
PANTERA-2
IC512
IC513
16M
IC505
FROM/TO
CN208 OF
LVA10375-A1
Latch
SDRAM
DDATA(NC)
DCLK(NC)
(System control)
25
27
CN503
IC521-2/4
ROM
IC509
FLASH
WAITDEC
LSI RST
M5V
DISCSTP
SPDIF
141312
15
M5V
IC521-4/4
IC522-4/4
1
11
SSPCLK1B
SSPOUT1B
10
IC522-3/4
IC521-3/4
23
DISCSET
SSPIN1A
FLINT
9
8
11
65
4
IC510
EEPROM
OSC
X401
FLCS-
CPURST
SWUPDN(SW3)
6
4
2
IC521-1/4
IC523
IC522-1/4
13.5MHz
SWOPEN(SW2)
1
IC522-2/4
FL display section
FROM/TO
CN207 OF
LVA10375-A1
(System control)
REMOCON
INITIAL
DATA IN
2
CLOCK
RESET
-VDISP
1
LVA10376-A1
CN401
7
Remocon
receiver
2
3
4
1
B5V
8
12V
14
D5VD5V
16
17
F2
18
F1
19
KEY1
5
KEY2
6
HP-R
11
HP-L
13
HP
10
IC402
B5V
12V
S402-S410
, , , , ,SOURCE
VOL-,VOL+,
X401
OSC
8MHz
2,3,5,26
100
9,10
62
IC401
DISPLAY MICOM
1
DI401
FL DISPLAY
G1-G14
P1-P35
27
39
29
40
CN403
Q403
Q405
PROG/RGB
LED&DIMMER
Q404
Q406
ILLUMI
LED&DIMMER
3
1
4
Switch board
LVA10378-A4
Headphone board
W401
3
1
4
D401
D402
D403
J401
HEADPHONE
IC101
49,50
53,54
57-60
LVA10298-C1
CN101
FRONT END
PROCESSOR
LD
62,63
DVD traverse
mechanism
11,12
T+/-
IC301
IC201
13,14
F+/-
SODC
DRIVER
17,18
15,16
FM+/-
CN201
CPUD0-7
CPUA0-17
H1+/-
H2+/-
H3+/-
DVD traverse
IC251
MOTOR
SPINDEL
9-14
2,4,7
SM1-3
mechanism
DRIVER
TRVSW
50
IC401
UNIT CPU
CN202
LM+/-
Loader
mechanism
IC451
EEPROM
2-2
HAB CDE FG
Page 69
TH-A75
4
3
5
Audio input/output section
TO CN203 OF
LVA10375-A1
(System control)
TUNER_R
S_MUTING
TUNER_L
HP_L
HP_R
S_BASS
CN591
12
13
17
18
19
21
IC557
Amp.
IN_L
IN_R
OUT_L-
OUT_L+
OUT_R-
OUT_R+
IC540
Amp.
IC544
Amp.
OUT_SL
OUT_SR
IC546
FROM/TO
DSP
OUT_C
Amp.
OUT_SB
IC548
Amp.
OUT_LFE
MUTING
VOL_ DAT
VOL_STB
VOL_CLK
Q5701
Q5702
Mute control
DIGITAL_I/O
DSP section
Q5711
Mute control
Q5712
Mute control
Q5713
Mute control
Q5714
Mute control
4
62
9
16
IC551
10
8CH
15
VOLUME
12
11
13
262527
74-77
69-72
31
38
32
37
34
33
35
DSP board
Q5731
Mute control
Q5732
Mute control
Q5733
Mute control
Q5734
Mute control
Q5661-Q5663
BASS BOOST
LVA10377-A1
J5531
IC560
Amp.
IC562
Amp.
IC564
Amp.
IC566
Amp.
CN592
J5521
L
STB/DBS IN
R
L
VCR IN
R
TO CN701 OF
LVA10379-A1
(Power amplifier)
7
OUT4_L
OUT4_R
8
OUT4_SL
4
3
OUT4_SR
OUT4_C
6
OUT4_SB
2
1
OUT4_LFE
STB/DBS
DUGITAL
IN
Power supply section
AC IN
Power board
CN101
2
1
F101
L103
D101
L101
L102
IC101
SWITCH
REG.
IC121
SWITCH
REG.
CN171
5
6
7
8
11
12
13
14
4
2
1
CN172
1
2
5
6
7
8
9
10
11
12
13
14
15
16
CN173
2
3
4
6
7
8
CN174
1
+37V
+37V
+22V
+22V
-22V
-22V
-37V
-37V
+12V
-12V
PROTECT
+12V
+7V
-7V
-12V
FAN-ON/OFF
FAN-CTL
AMP-PON
BEAT CUT
DVD-PON
SYS-PON
F2
F1
-VDSP
B5V
DVD3.3V
DVD3.3V
DVD 5V
D5V
M9V
M9V
TO CN703 OF
LVA10379-A1
(Power amplifier)
TO CN201 OF
LVA10375-A1
(System control)
TO CN202 OF
LVA10375-A1
(System control)
TO
FAN MOTOR
LVA10378-A1
T101
IC102
-IC104
T121
IC122
IC123
9
15
11
10
7
8
9
12
13
16
14
Q178
Q181,Q182
Q187
Q188
Q172
REG.
Q171
REG.
Q161
REG.
Q162
REG.
Q163
Q164
4
IC171
REG.
Q165
REG.
Q166
REG.
Q183
REG.
21
Q174
Q175
Q176
Q177
2
3
4
3
POWER
TRANS.
5
6
PHOTO
COUPLER
4
1
5
1
POWER
TRANS.
3
PHOTO
COUPLER
4
Q184-Q186
Q532
LVA10377-A1
IC532
2
1
4
FROM/TO
Audio
input/output
MUTING
OUT_SR
OUT_SL
OUT_LFE
OUT_C
OUT_SB
DIGITAL_I/O
IN_L
IN_R
OUT_L+
OUT_LOUT_R+
OUT_RVOL_ DAT
VOL_STB
VOL_CLK