Area suffix
B -------------------------- U.K.
E ------ Continental Europe
EN ------- Northern Europe
EV --------- Eastern Europe
EE ---- Russian Federation
VCR
ON
TV/VIDEO
COMPACT
DIGITAL VIDEO
STANDBY
STANDBY/ON
AUDIO/FM MODE
DSP
VOLUMESOURCE
SP-XCA5SP-XSA5SP-XSA5
DIGITAL
DVD DIGITAL CINEMA SYSTEM TH-A5R
SURROUND
DIGITAL
XV-THA5RSP-WA5
Contents
Safety precautions
Important for laser products
Preventing static electricity
Disassembly method
1-2
1-4
1-5
Wiring connection
Adjustment method
Description of major ICs
1-6
COPYRIGHT 2001 VICTOR COMPANY OF JAPAN, LTD.
1-13
1-14
1-16~34
No.21046
Dec. 2001
Page 2
TH-A5R
1. This design of this product contains special hardware and many circuits and components specially for safety
purposes. For continued protection, no changes should be made to the original design unless authorized in
writing by the manufacturer. Replacement parts must be identical to those used in the original circuits. Services
should be performed by qualified personnel only.
2. Alterations of the design or circuitry of the product should not be made. Any design alterations of the product
should not be made. Any design alterations or additions will void the manufacturer`s warranty and will further
relieve the manufacture of responsibility for personal injury or property damage resulting therefrom.
3. Many electrical and mechanical parts in the products have special safety-related characteristics. These
characteristics are often not evident from visual inspection nor can the protection afforded by them necessarily
be obtained by using replacement components rated for higher voltage, wattage, etc. Replacement parts which
have these special safety characteristics are identified in the Parts List of Service Manual. Electrical
components having such features are identified by shading on the schematics and by ( ) on the Parts List in
the Service Manual. The use of a substitute replacement which does not have the same safety characteristics
as the recommended replacement parts shown in the Parts List of Service Manual may create shock, fire, or
other hazards.
4. The leads in the products are routed and dressed with ties, clamps, tubings, barriers and the like to be
separated from live parts, high temperature parts, moving parts and/or sharp edges for the prevention of
electric shock and fire hazard. When service is required, the original lead routing and dress should be
observed, and it should be confirmed that they have been returned to normal, after re-assembling.
5. Leakage currnet check (Electrical shock hazard testing)
After re-assembling the product, always perform an isolation check on the exposed metal parts of the product
(antenna terminals, knobs, metal cabinet, screw heads, headphone jack, control shafts, etc.) to be sure the
product is safe to operate without danger of electrical shock.
Do not use a line isolation transformer during this check.
Plug the AC line cord directly into the AC outlet. Using a "Leakage Current Tester", measure the leakage
current from each exposed metal parts of the cabinet, particularly any exposed metal part having a return
path to the chassis, to a known good earth ground. Any leakage current must not exceed 0.5mA AC (r.m.s.).
Alternate check method
Plug the AC line cord directly into the AC outlet. Use an AC voltmeter having, 1,000 ohms per volt or more
sensitivity in the following manner. Connect a 1,500 10W resistor paralleled by a 0.15 F AC-type capacitor
between an exposed metal part and a known good earth ground.
Measure the AC voltage across the resistor with the AC
voltmeter.
Move the resistor connection to each exposed metal part,
particularly any exposed metal part having a return path to
the chassis, and meausre the AC voltage across the resistor.
Now, reverse the plug in the AC outlet and repeat each
measurement. Voltage measured any must not exceed 0.75 V
AC (r.m.s.). This corresponds to 0.5 mA AC (r.m.s.).
0.15 F AC TYPE
1500 10W
Good earth ground
AC VOLTMETER
(Having 1000
ohms/volts,
or more sensitivity)
Place this
probe on
each exposed
metal part.
!
1. This equipment has been designed and manufactured to meet international safety standards.
2. It is the legal responsibility of the repairer to ensure that these safety standards are maintained.
3. Repairs must be made in accordance with the relevant safety standards.
4. It is essential that safety critical components are replaced by approved parts.
5. If mains voltage selector is provided, check setting for local voltage.
Burrs formed during molding may
be left over on some parts of the
chassis. Therefore, pay attention to
such burrs in the case of
preforming repair of this system.
In regard with component parts appearing on the silk-screen printed side (parts side) of the PWB diagrams, the
parts that are printed over with black such as the resistor ( ), diode ( ) and ICP ( ) or identified by the " "
mark nearby are critical for safety.
(This regulation does not correspond to J and C version.)
1-2
Page 3
TH-A5R
(U.K only)
1. This design of this product contains special hardware and many circuits and components specially
for safety purposes. For continued protection, no changes should be made to the original
design unless authorized in writing by the manufacturer. Replacement parts must be identical to
those used in the original circuits.
2. Any unauthorised design alterations or additions will void the manufacturer's guarantee ; furthermore the
manufacturer cannot accept responsibility for personal injury or property damage resulting therefrom.
3. Essential safety critical components are identified by ( ) on the Parts List and by shading on the
schematics, and must never be replaced by parts other than those listed in the manual. Please note
however that many electrical and mechanical parts in the product have special safety related
characteristics. These characteristics are often not evident from visual inspection. Parts other than
specified by the manufacturer may not have the same safety characteristics as the recommended
replacement parts shown in the Parts List of the Service Manual and may create shock, fire, or
other hazards.
4. The leads in the products are routed and dressed with ties, clamps, tubings, barriers and the
like to be separated from live parts, high temperature parts, moving parts and/or sharp edges
for the prevention of electric shock and fire hazard. When service is required, the original lead
routing and dress should be observed, and it should be confirmed that they have been returned
to normal, after re-assembling.
1. Service should be performed by qualified personnel only.
2. This equipment has been designed and manufactured to meet international safety standards.
3. It is the legal responsibility of the repairer to ensure that these safety standards are maintained.
4. Repairs must be made in accordance with the relevant safety standards.
5. It is essential that safety critical components are replaced by approved parts.
6. If mains voltage selector is provided, check setting for local voltage.
!
Burrs formed during molding may be left over on some parts of the chassis. Therefore,
pay attention to such burrs in the case of preforming repair of this system.
1-3
Page 4
TH-A5R
Important for laser products
1.CLASS 1 LASER PRODUCT
2.DANGER : Invisible laser radiation when open and inter
lock failed or defeated. Avoid direct exposure to beam.
3.CAUTION : There are no serviceable parts inside the
Laser Unit. Do not disassemble the Laser Unit. Replace
the complete Laser Unit if it malfunctions.
4.CAUTION : The compact disc player uses invisible
laserradiation and is equipped with safety switches
whichprevent emission of radiation when the drawer is
open and the safety interlocks have failed or are de
feated. It is dangerous to defeat the safety switches.
5.CAUTION : If safety switches malfunction, the laser is able
to function.
6.CAUTION : Use of controls, adjustments or performance of
procedures other than those specified herein may result in
hazardous radiation exposure.
!
Please use enough caution not to
see the beam directly or touch it
in case of an adjustment or operation
check.
REPRODUCTION AND POSITION OF LABELS
CLASS 1
LASER PRODUCT
WARNING LABEL
1-4
Page 5
Preventing static electricity
1.Grounding to prevent damage by static electricity
Electrostatic discharge (ESD), which occurs when static electricity stored in the body, fabric, etc. is discharged,
can destroy the laser diode in the traverse unit (optical pickup). Take care to prevent this when performing repairs.
TH-A5R
2.About the earth processing for the destruction prevention by static electricity
Static electricity in the work area can destroy the optical pickup (laser diode) in devices such as CD players.
Be careful to use proper grounding in the area where repairs are being performed.
2-1 Ground the workbench
Ground the workbench by laying conductive material (such as a conductive sheet) or an iron plate over
it before placing the traverse unit (optical pickup) on it.
2-2 Ground yourself
Use an anti-static wrist strap to release any static electricity built up in your body.
(caption)
Anti-static wrist strap
Conductive material
(conductive sheet) or iron plate
3. Handling the optical pickup
1. In order to maintain quality during transport and before installation, both sides of the laser diode on the
replacement optical pickup are shorted. After replacement, return the shorted parts to their original condition.
(Refer to the text.)
2. Do not use a tester to check the condition of the laser diode in the optical pickup. The tester's internal power
source can easily destroy the laser diode.
4.Handling the traverse unit (optical pickup)
1. Do not subject the traverse unit (optical pickup) to strong shocks, as it is a sensitive, complex unit.
2. Cut off the shorted part of the flexible cable using nippers, etc. after replacing the optical pickup. For specific
details, refer to the replacement procedure in the text. Remove the anti-static pin when replacing the traverse
unit. Be careful not to take too long a time when attaching it to the connector.
3. Handle the flexible cable carefully as it may break when subjected to strong force.
4. It is not possible to adjust the semi-fixed resistor that adjusts the laser power. Do not turn it.
Attention when traverse unit is decomposed
*Please refer to "Disassembly method" in the text for pick-up and how to detach the substrate.
Solder is put up before the card
1.
wire is removed from connector
on the pick up board as shown in
Figure.
(When the wire is removed
without putting up solder, the CD
pick-up assembly might destroy.)
Please remove solder after
2.
connecting the card wire with
when you install picking up
in the substrate.
DVD mechanism assembly (bottom side)
DVD loading
mechanism
Pick up board
Card wire
Short land
(These two points are
soldered respectively,
and are made to
short-circuit)
Connector
DVD loader board
1-5
Page 6
TH-A5R
Disassembly method
Removing the top cover (See Fig.1)
1.
Remove the four screws A attaching the top cover
on the both sides of the body.
2.
Remove the two screws B on the back of the body.
3.
Remove the top cover from behind in the direction of
the arrow while pulling both sides outward.
Removing the front panel assembly
(See Fig.2A, 2B and 3)
Prior to performing the following procedure, remove
the top cover.
1.
Remove the one screw a and remove the earth wier.
2.
Remove the three screws C attaching the front panel
assembly on the bottom of the body.
Top cover
Claw1
(bottom side)
B
A 2
Fig.1
Front panel assembly
CC
3.
Remove the two screws D attaching the front panel
assembly on the both sides of the body.
4.
Remove the claw1, claw2 and claw3, and detach the
front panel assembly toward the front.
5.
Disconnect the card wire from the connector DW20
on the DSP board.
Removing the power cord (See Fig.4)
Prior to performing the following procedure, remove
the top cover.
1.
Cut off the tie band, if needed.
2.
Disconnect the power cord from the connector CW1
on the main board and pull up the cord stopper
upward.
Notes: The power cord is exchangeable.
Power cord
CW1
Tie band
Claw2 (both side)
D
(both side)
DSP board
Fig.2A
Front panel
assembly
a
(fixing the earth wire)
Fig.2B
Claw3
1-6
Rear panel
Fig.4
Power cord
stopper
DW20
Front panel assembly
(Inner side)
Display board
Fig.3
Page 7
TH-A5R
Removing the DVD mechanism assembly
(See Fig.5 and 6)
Prior to performing the following procedure, remove
the top cover.
1.
Disconnect the card wire from the connector J14 and
J21 on the DVD MPEG board.
2.
Remove the two screws E attaching the DVD
mechanism assembly and pull up with drawing out.
3.
Disconnect the harness from the connector J2 on the
DVD loader board.
Removing the rear panel (See Fig.7 and 8)
Prior to performing the following procedure, remove
the top cover and power cord.
1.
Disconnect the harness from the connector NW11 on
the DSP board.
2.
Remove the two screws F, four screws G, and five
screws I attaching the each boards to the rear panel.
Rear panel
DVD mechanism assembly
DVD
MPEG
board
J14
E
J21
Fig.5
DVD mechanism
assembly
3.
Remove the three screws J attaching the rear panel
on the back of the body.
Removing the tuner pack (See Fig.7 and 8)
Prior to performing the following procedure, remove
the top cover.
1.
Disconnect the card wire from the connector CON01
on the tuner pack.
2.
Remove the two screws F attaching the tuner pack
to the rear panel.
Removing the jack board (See Fig.7 and 8)
Prior to performing the following procedure, remove
the top cover.
1.
Disconnect the card wire from the connector VW2 on
the jack board.
2.
Remove the four screws G attaching the jack board
to the rear panel.
3.
Disconnect the connector VW1 on the jack board
and pull up the jack board.
DVD loader board
J2
Fan motor
JJJ
DSP board
H
I
Fig.6
Rear panel
G
F
Fig.7
CON01
Removing the fan motor (See Fig.7 and 8)
Prior to performing the following procedures, remove
the top cover .
1.
Disconnect the harness from the connector NW11 on
the DSP board .
2.
Removing the two screws H attaching the fan motor
on the rear panel.
Rear panel
NW11
(on the
DSP board)
VW1
Fig.8
Jack
board
VW2
Tuner pack
1-7
Page 8
TH-A5R
Removing the DSP board (See Fig.9)
Prior to performing the following procedure, remove
the top cover, front panel assembly and jack board.
1.
Untied the harness band and disconnect the harness
from the connector CW2 on the main board.
2.
Disconnect the harness from the connector NW11 on
the DSP board.
3.
Disconnect the card wire from the connector VW12
on the DSP board.
4.
Pull up the DSP board from the front side upwards
disconnecting the connector DW10, DW13, DW14
and DW15.
Removing the main board (See Fig.10)
Prior to performing the following procedure, remove
the top cover, front panel assembly, DVD
mechanism assembly, jack board and DSP board.
1.
Disconnect the card wire from the connector CW4
and CW8 on the main board.
DSP board
(Front panel side)
Main board
CW8
K2
VW12
Harness band
DW14DW15
Fig.9
K1
DW10DW13
Main board
CW2
NW11
(Rear panel side)
Heart sink
(to which
power
transistor
is attached)
2.
Disconnect the harness from the connector CW3 on
the main board.
3.
Remove the five screws I attaching the speaker
terminals and jack to the rear panel (see fig.7).
4.
Remove the six screws K1 (short) and one screw K2
(long) attaching the main board.
5.
When the rear panel is not removed, pull up the
main board from front side.
Removing the power transistor & power IC
(See Fig.10 and 11)
Prior to performing the following procedure, remove
the top cover, front panel assembly, DVD
mechanism assembly, jack board, DSP board and
main board.
1.
After removing the solder part soldered to the main
board, remove each screw and remove the heat sink
from Power transistor.
2.
After removing the solder part soldered to the main
board, remove each screw and remove the heat sink
from Power IC.
CW4
Fig.10
(Each power transistor is fixed)
Solder part
Solder part Solder part
Heart sink
(to which power IC is attached)
Fig.11
K1
CW3 Power ICs
Main board
(Reverse side )
Solder part
(Power IC is fixed)
1-8
Page 9
TH-A5R
Removing the DVD power board
(See Fig.12)
Prior to performing the following procedure, remove
the top cover, front panel assembly and DSP board.
1.
Disconnect the harness and card wire from the
connector PW1, PW2 and PW5 on the DVD power
board.
2.
Remove the one screw L1 (short) and two screws L2
(long) attaching the DVD power board.
L1
PW5
PW2
DVD
power
board
Removing the power transformer
(See Fig.12)
Prior to performing the following procedure, remove
the top cover.
1.
Cut off the tie band fixing the harness, if needed.
2.
Disconnect the harness from the connector CW2 on
the main board (see fig.9) and PW1, PW2 on the
DVD power board.
3.
Remove the four screws M attaching the power
transformer.
PW1
Tie band
L2
Power
transformer
M
Fig.12
<Front panel assembly section>
Removing the display board & switch
board (See Fig.1 and 2)
Prior to performing the following procedure, remove
the top cover and the front panel assembly.
1.
Disconnect the card wire from the connector FW1 on
the display board.
2.
Remove the five screws A attaching the display
board on the inner of the front panel assembly.
3.
Remove the four screws B attaching the switch
board on the inner of the front panel assembly.
4.
Disconnect the harness from connector FW2 on the
display board, if needed.
Removing the front window
(See Fig.2 and 3)
Prior to performing the following procedure, remove
the top cover, front panel assembly, display board
and switch board.
Display board
FW1
A
Front panel assembly
Switch board
FW2
Fig.1
Switch button
(inner side)
B
CCC
Claw
Fig.2
Front panel assembly (front side)
Remove the switch buttons, if needed.
1.
Remove the three screws C attaching the front
2.
window on the front panel.
Remove the eight claws fixing the front window on
3.
the front panel.
Front window
Fig.3
1-9
Page 10
TH-A5R
y
)
y
)
y
)
<DVD mechanism assembly section>
Removing the DVD loader board
(See Fig.1 to 3)
Prior to performing the following procedure, remove
the top cover and DVD mechanism assembly.
1.
Disconnect the card wire from the connector J6 on
the DVD MPEG board.
2.
Disconnect the harness from the connector on the
motor board.
3.
Disconnect the harness from the connector J5 on the
DVD loader board.
4.
Remove the four screws A attaching the DVD loader
board to DVD mechanism assembly.
CAUTION!! (see fig.3)
Before removing the card wire which
connects the pickup board and DVD loader
board, solder the two soldering parts and
make it short-circuit.
Moreover, while having removed the card
wire, don't remove these solder.
DVD MPEG board
DVD loader board
A
U9
J5
J6
DVD mechanism assembl
Fig.1
DVD mechanism assembl
Motor board
Connector
Fig.2
(top side
(bottom side
5.
Disconnect the card wire from the connector U9 on
the DVD loader board.
ONE POINT
How to eject the DVD tray manually
(see fig.2)
The white lever of the mark is moved in
the direction of the arrow. Then, the tray will
be opened.
Moreover, the tray is separable from a DVD
mechanism assembly by removing two
screws of the mark (see fig.1) and drawing
out the tray.
Removing the DVD loading mechanism
(See Fig.4)
Prior to performing the following procedure, remove
the top cover, DVD mechanism assembly and DVD
loader board.
1.
Remove the two screws B and remove the bracket.
2.
Remove the one screw C fixing the DVD loading
mechanism.
Pick up
board
Lever
Soldering parts
X
Motor board
Fig.3
DVD mechanism assembl
B
DVD loading
mechanism
(bottom side
Bracket
DVD loading
mechanism
3.
Move the lever in the direction of the arrow X.
4.
Remove the DVD loading mechanism from the DVD
mechanism assembly by moving it in the direction of
the arrow Y.
1-10
Y
C
Fig.4
Page 11
TH-A5R
Removing the DVD traverse mechanism
(See Fig.5)
Prior to performing the following procedure, remove
the top cover, DVD mechanism assembly, DVD
loader board and DVD loading mechanism.
1.
Remove the four screws D attaching the DVD
traverse mechanism to DVD loading mechanism.
Removing the holder & DVD MPEG board
(See Fig.6 and 7)
Prior to performing the following procedure, remove
the top cover, DVD mechanism assembly and DVD
loader board.
1.
Remove the two claws1, and remove the holder from
the DVD mechanism assembly as it is pushed down.
DVD traverse
mechanism
Claw1
D
Holder
DVD loading mechanism
(top side)
D
Fig.5
Notes: When removing only the DVD MPEG board, it is not
necessary to remove this holder.
2.
Remove the four claws2 and remove the DVD
MPEG board from the holder.
ONE POINT
When inserting DVD MPEG board in
holder. (see fig.8)
Holder
Holder
DVD mechanism assembly
Fig.6
DVD MPEG board
Fig.7
DVD MPEG board
(bottom side)
Claw2
Insert in after uniting with a lower claws,
when inserting DVD MPEG board in holder.
Fig.8
1-11
Page 12
TH-A5R
<Speaker section>
[SP-XSA5 / Satellite speaker]
It is exchange in a unit.
[SP-XCA5 / Center speaker]
It is exchange in a unit.
[SP-WA5 / Woofer]
Removing the speaker unit
(See Fig.1 to 3)
1.
Remove the four bosses and remove the net
assembly.
Notes: It will be good to use the tool with a flat tip, since it
is hard to remove. Please take care not to damage the
cabinet at this time.
2.
Remove the eight screws A attaching the speaker
unit to cabinet.
3.
Disconnect the code from the two terminals of the
speaker unit.
Net assembly
Boss
Fig.1
Speaker unit
A
A
Cabinet
Fig.2
Terminals
red
Speaker unit (reverse side)
Fig.3
Code
black
1-12
Page 13
TH-A5R
Wiring connection
J6
J14
2
0
J21
3809-001273
DVD MPEG
BOARD
3809-001295
9
AH39-00368A
0
0
3809-001294
J3
DVD LOADER BOARD
J4
9
Color codes are shown below.
1 Brown
2Red
3Orange
4Yellow
5Green
CON01
TUNER PACK
U9
JACK BOARD (V-OUT)
3809-001274
J5
0
9
3809-001224
J2
VW2
VW1
6Blue
7Violet
8Gray
9White
0Black
0
9
SWITCH BOARD
3809-001296
FW3
AH39-00176A
0
9
FW2
DISPLAY BOARD
0
6
1
AH39-50001K
9
DW20
PW1
PW3
BOARD
3
DW15
0
DVD
POWER
4
9
5
PW4
0
6
PW5
PW2
1
VW11
2
8
AH39-00104A
AH39-00291A
DSP1 BOARD
9
0
4
DW14
DW32
0
2
DW12
DW23
DW13
DSP2 BOARD
3809-001283
8
0
DW10
DW31
4
0
NW11
DW11
CW4
2
CW7
RE3
CW6
CW8
0
2
CW1
CW2
1
C
FU1
FU3
PT1
CW5
FW1
0
POWER TRANCE
6
1
2
6
5
3
1
4
0
9
2
0
CW3
MAIN BOARD
1-13
Page 14
TH-A5R
Adjustment method
1. Tuner
*Adjustment Location of Tuner PCB
ITEAM
Received FREQ.
Adjustment
point
Output1~7.0V
AM(MW) OSC
Adjustment
522~1629 KHz
MO
AM(MW) RF
Adjustment
603 KHz
MA
Maximum
Output(Fig1-1)
MAIN
PCB
VTGND
Fig 1-4 OSC Voltage Fig 1-4 OSC Voltage Fig 1-4 OSC Voltage Fig 1-1 OSC Voltage
TESTER
1-14
Page 15
FM THD Adjustment
SSG FREQ.
98 MHz
Adjustment
point
FM DETECTOR COIL
(FD)
Output
60 dB
Minumum Distortion (0.4% below)
(Figure 1-2)
FM Search Level Adjustment
SSG FREQ.
98 MHz
Output
Output
Output
Output
GND
GND
GND
GND
FM S.S.G
FM
Antenna
Terminal
Te
T
Speaker
Terminal
Te
T
SET
SET
SET
SET
Input
output
output
output
output
Distortion Meter
Figure1-2 IF CENTER and THD Adjustment
28 dB
FM Antenna
Oscilloscope
Input
Input
Input
Input
TH-A5R
Adjustment
point
(SVR3)
Output
BEACON
SENSITIVITY
SEMI-VR(20K )
28 dB(
dB)
Adjust SVR1 so that “TUNED” of FL T
is lighted (Figure 1-3)
*Adjust FM S.S.G level to 28dB
AM(MW) I.F Adjustment
SSG FREQ.
Frequency
450 kHz
522 kHz
Adjustment
point
AA
Maximum output (Figure 1-4)
SET
GND
GND
GND
FM S.S.G
GND
FM IN
Figure1-3 FM Auto Search Level Adjustment
60cm
OUTPUT
AM SSG
450KHZ
INPUT
AM ANT
IN
Speaker Terminal
OUTPUT
20 k
AM IF
VTVMOscilloscope
Figure1-4 AM I.F Adjustment
Notes: This set is a non-adjusted set fundamentally. It is adjusted when the tuner pack is exchanged.
Active Low Reset. Assert for at least 5-milliseconds in the presence of
I
clock to reset the entire chip.
VCLK
XOUT
105
138
Video clock that outputs 27 MHz.
I/O
Crystal output. When the internal DCXO is used, a 13.5 MHz crystal
O
should be con-nected between this pin and the XIN pin.
XIN/bypass clk_216
139
Crystal input. When the internal DCXO is used, a 13.5 MHz crystal should
I
be con-nected between this pin and the XOUT pin. When an external
oscillator or VCXO is used, its output should be connected to this pin.
System Services
When configured for an external bypass clock, a 216 MHz clock should be
connected to this pin. The frequency of an external VCXO can be either 27
or 13.5 MHz.
1. I - input, O - output, OD - open drain, PU - requires external pull-up resistor.
1. I - input, O - output, OD - open drain, PU - requires external pull-up resistor.
12, 20, 111, 152, 167, 181, 196
32, 44, 55, 63, 74, 87, 98, 104
13, 21, 112, 153, 166, 180, 195, 208
31, 43, 54, 61, 72, 85, 96, 103
Pin No.
189
140
30, 80, 145, 173, 205
118, 121, 124, 127, 130
133
142, 143
134
29, 79, 146, 172, 204
132
141, 144
136
137
190-192
193, 192
206, 207, 2
3-11, 14-19, 22
23
24
25
26
27
203
50, 49
52
51
97, 86, 73, 62
46, 45, 33-42
102-99, 95-88, 84-81,
78-75, 71-64, 60-57
53
56
47, 48
116
105
106-110, 113-115
184
Type
Power
Power
Power
Power
Power
Power
Power
Ground
Ground
Ground
Ground
Ground
Ground
Ground
O
I
I/O
I/O
I/OD
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I/O
O
O
O
I/O
I/O
I/O
I/O
1
Description
5-V supply voltage for 5V-tolerant I/O signals.
3.3-V supply voltage for I/O signals
3.3-V supply voltage for SDRAM I/O signals
3.3V Crystal infterface power
1.8-V suply voltage for core logic
Analog Video DAC Power
3.3V Digital supply for 5 DACs
3.3-V Analog PLL Power
3.3V Analog Video Reference Voltage
Ground for I/O signals
Ground for core logic
Ground for SDRAM I/O signals
Digital VSS for DACs
Analog PLL Ground
Video Analog Ground
Crystal interface ground
Host chip select. Host asserts HCS to select the controller for a read or
write opera-tion. The falling edge of this signal triggers the read or write
operation. General Purpose I/Os 41, 42, and 43, respectively.
Host chip select. Host asserts HCS to select the controller for a read or
write opera-tion. The falling edge of this signal triggers the read or write
operation.
Host (muxed address) address bus. 3-bit address bus selects one of eight
host inter-face registers. These signals are not muxed in ATAPI master
mode.
HA[15:0] is the 16-bit (muxed address and data) bi-directional host data
bus through which the host writes data to the decoder Code FIFO. MSB of
the 32-bit word is writ-ten first. The host also reads and writes the decoder
internal registers and local SDRAM/ROM via HA[7:0]. These signals are
not muxed for ATAPI master mode.
Host Data Transfer Acknowledge.
Host interrupt. Open drain signal, must be pulled-up via 4.7k to 3.3 volts.
Driven high for 10 ns before tristate.
Host Upper Data Strobe. Host high byte data, HA[15:8], is valid when this
pin is active.
Host Lower Data Strobe. Host low byte data, HA[7:0], is valid when this pin
is active.
Read/write strobe
Address latch enable
Memory chip select.
Active LOW SDRAM Column Address Strobe.
Active LOW SDRAM Row Address Strobe.
These pins are the bytes masks corresponding to MD[7:0], [15:8], [23:16]
and [31:24]. They allow for byte reads/writes to SDRAM.
SDRAM Address
SDRAM Data
SDRAM Write Enable. Specifies transaction to SDRAM: read (=1) or
write (=0)
SDRAM Clock
SDRAM bank select
Horizontal sync. The decoder begins outputting pixel data for a new
horizontal line after the falling (active) edge of HSYNC.
Host Interrupt Request 2
General Purpose I/O 9
Video clock. Clocks out data on input. VDATA[7:0].
Clock is typically 27 MHz.
Video data bus. Byte serial CbYCrY data synchronous with VCLK. At
powerup, the decoder does not drive VDATA. During boot-up, the
decoder uses configuration parameters to drive or 3-state VDATA.
General Purpose I/Os [1:7]
Vertical sync. Bi-directional, the decoder outputs the top border of a new
field on the first HSYNC after the falling edge of VSYNC. VSYNC can
accept vertical synchroni-zation or top/bottom field notification from an
external source. (VSYNC HIGH = bot-tom field. VSYNC LOW = Top field)
Active Low Host Interrupt Pin
General Purpose I/O 36
Analog O
Analog O
Analog O
Analog O
Analog O
Analog O
Analog I
I/O
O
O
O
I/O
O
I
I
I
1
Description
Compressed data from DVD DSP. Bit 7. In parallel mode, bit 7 is the first
(earliest in time) bit in the bitstream, while bit 0 is the last bit.
Video Data Bus 2, Bit 7
Host DMA Request
General Purpose I/O 24
Compressed data from DVD DSP. Bit 6.
Video Data Bus 2, Bit 6
ATAPI Transceiver Enable
General Purpose I/O 25
Compressed data from DVD DSP. Bit 5.
Video Data Bus 2, Bit 5
Host DMA Acknowledge
General Purpose I/O 26
Compressed data from DVD DSP. Bit 4.
Video Data Bus 2, Bit 4
General Purpose I/O 27
Compressed data from DVD DSP. Bit 3.
Video Data Bus 2, Bit 3
General Purpose I/O 28
Compressed data from DVD DSP. Bit 2.
Video Data Bus 2, Bit 2
General Purpose I/O 29
Compressed data from DVD DSP. Bit 1.
Video Data Bus 2, Bit 1
General Purpose I/O 30
In serial mode, bit 0 should be used as the input, with the unused bits
either used as GPIOs or tied to ground.
Video Data Bus 2, Bit 0
General Purpose I/O 31
Data clock. The maximum frequency is 25 MHz for parallel mode, and
???? MHz for serial mode. The polarity of this signal is programmable.
Error in input data. This signal carries the error bit associated with the
channel data type (if set, the byte is ccorrupted).
Data enable. Assertion indicates that data on SDDATA[7:0] is valid.
The polarity ofthis signal is programmable.
General Purpose I/O [33]
Bitstream request. controller asserts SDREQ to indicate that the bitstream
input buffer has available space.
General Purpose I/O 32
Video DAC Bias Bits[4:0]
DAC video output format: R, V, C, or CVBS. Macrovision encoded.
DAC video output format: B, U, C, or CVBS. Macrovision encoded.
DAC video output format: G or Y. Macrovision encoded.
DAC video output format: C. Macrovision encoded.
DAC video output format: CVBS or Y. Macrovision encoded.
Video DACs Reference Resistor. Connecting to pin 136 through
a 1.18K+/- 1% resis-tor is required.
System clock that drives internal PLLs. ZiVA-5 27-MHz TTL oscillator.
(See descrip-tion of VCLK for Digital Video Output.) Also optional video
clock for internal PLLs or external encoder.
PCM Data Out. Eight channels. Serial audio samples relative to BCK
and LRCK. General Purpose I/Os [4:1]
PCM Bit Clock. BCK can be either 48 or 32 times the sampling frequency
PCM Left Clock. Identifies the channel for each sample. The polarity is
programma-ble.
Audio External Frequency clock input or output. BCK and LRCK are
derived from this clock.
PCM data out (IEC-958 format ) or compressed data out
(IEC-1937 format). General Purpose I/O [14]
PCM data input.
General Purpose I/O [15]
PCM input bit clock.
BYPASS_SYSCLK: Alternate function TBS.
General Purpose I/O [16]
PCM left/right clock.
IEC958 input bypass
General Purpose I/O [17]
1. I - input, O - output, OD - open drain, PU - requires external pull-up resistor.
1-18
Page 19
2. Pin function (4/4)
1
Name
IRRX1/GPIO0
IR
IDC_CL/GPIO18
IDC
IDC_DA/GPIO19
RTS1/GPIO20
RXD1/GPIO21
TXD1/GPIO22
UART1UART2JTAG
CTS1/GPIO23
RTS2/SPI_CLK/
GPIO37
RXD2/SPI_MISO/
GPIO38
TXD2/SPI_MOSI/
GPIO39
CTS2/SPI_CS/
GPIO40
TRST
TDO
TDI/GPI0
TMS/GPI1
TCK
1. I - input, O - output, OD - open drain, PU - requires external pull-up resistor.
Pin No.
28
160
161
162
163
164
165
185
186
187
188
197
198
199
200
201
Type
Description
IR Remote Receive. This input connects to an integrated (photo diode,
I
band pass, demodulator) IR receiver. General Purpose I/O 0
Serial clock signal for IDC data transfer. It should be pulled up to the
I/O
positive supply voltage, depending on the device) using an external
pull-up resistor. General Purpose I/O [18]
Serial data signal for IDC data transfer. It should be pulled up to the supply
voltage using an external pull-up resistor. General Purpose I/O [19]
Ready to send, UART1
O
General Purpose I/O [20]
Receive data, UART1
I
General Purpose I/O [21]
Transmit data, UART1
O
General Purpose I/O [22]
Clear to send, UART1
I
General Purpose I/O [23]
Ready to send, UART2
O
Serial Peripheral Interface Clock
General Purpose I/O [37]
Receive data, UART2
I
Serial Peripheral Interface - Master Input/Slave Output
General Purpose I/O [38]
Transmit data, UART2
O
Serial Peripheral Interface - Master Output/Slave Input
General Purpose I/O [39]
Clear to send, UART2
I
Serial Peripheral Interface ????
General Purpose I/O [40]
Test reset. BST reset - resets the TAP controller.
I
This signal must be pulled low.
Test data Out. BST serial data output.
O
Test data In. BST serial data chain input.
I
General Purpose Input pin 0.
Test mode select. Controls state of test access port (TAP) controller.
I
General Purpose Input pin 1.
Test clock. Boundary scan test (BST) serial data clock.
Function
Digital Positive Supply
Digital Supply Ground
SPDIF Transmitter Output, Digital Audio Output 3
Host write strobe or Host data strobe or External Memory write enable or
General purpose input& output Number 10
Host Parallel Output Enable or Host Parallel R/W or External Memory Output
Enable or General Purpose Input & Output Number11
Host Address Bit One or SPI Serial Control Data Input
Host Parallel Address Bit Zero or Serial Control Port Clock
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Host Parallel Chip Select, Host Serial SPI Chip Select
Serial Control Port Data Input and Output, Parallel Port Type Select
Control Port Interrupt Request, Automatic Boot Enable
External Memory Chip Select or General Purpose Input & Output Number 8
PCM Audio Data Input Number One
PCM Audio Input Bit Clock
PCM Audio Input Sample Rata Clock
PCM Audio Data Input Number Tow
PCM Audio Input bit Clock
PCM Audio Input Sample Rate Clock
Master Clock Input
DSP Clock Select
Phase Locked Loop Filter
Phase-Locked Loop Filter
Analog Positive Supply
Analog Supply Ground
Master Reset Input
Reserved
Reserved
Digital Audio Output 2
Digital Audio Output 1
Digital Audio Output 0
Audio Output Sample Rate Clock
Audio Output Bit Clock
Audio Master Clock
RF Signal Inputs. Differential RF signal attenuator input pins.
I
CD Photo detector Interface Inputs. Inputs from the CD photo detector error outputs.
I
Photo Detector Interface Inputs. AC coupled inputs for the DPD from
I
the main beam Photo detector matrix outputs.
Differential Phase tracking LPF pin. An external capacitance is
connected between this pin and the CN pin.
Differential Phase tracking LPF pin. An external capacitance is
connected between this pin and the CP pin.
Photo Detector Interface Inputs. Inputs from the main beam Photo
I
detector matrix outputs.
CD tracking Error Inputs. Inputs from the CD photo detector error outputs.
I
CD Tracking. E-F Opamp output for feedback.
Reference Voltage input. DC bias voltage input for the servo input reference.
No Connect.
Ground. Ground pin for the servo block.
APC Input. DVD APC input pin from the monitor photo diode.
I
APC output. DVD APC output pin to control the laser power.
O
APC Input. DVD APC input pin from the monitor photo diode.
I
APC output. DVD APC output pin to control the laser power.
O
APC output. on/off. APC output control pin. A low level activates the
I
LD output. (open high)
Reference Voltage output. This pin provides the internal DC bias
reference voltage (+2.5+ fix). Output impedance is less than 50 ohms.
Reference Voltage input. DC bias voltage input for the servo input reference.
MIRR signal Peak hold pin. An external capacitance is connected to
between this pin and VPB.
MIRR signal Bottom hold pin. An external capacitance is connected to
between this pin and VPB.
Low Impedance Enable. A TTL compatible input pin that activates the FDCHG switches.
I
A low level activates the switches and the falling edge of the internal FDCHG triggers
the fast decay for the NIRR bottom hold circuit. (open high)
MIRR signal LPF pin. An external capacitance is connected between this pin and VPB.
-
~
33
1-22
Page 23
2.Pin function (2/2)
Pin No.
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Symbol
MEVO
MIN
PI
DFT
TPH
MEV
MEI
TE
FE
CE
LCN
LCP
SCLK
S DATA
SDEN
HOLD1
VNA
FNN
FNP
DIP
DIN
RX
BYP
SIGO
VPA
AIP
AIN
ATO N
ATO P
CDRF
CDRFDC
I/O
SIGO Bottom Envelope Output. Bottom envelope for Mirror detection.
O
RF signal Input for Mirror. AC coupled inputs for the mirror detection
I
circuit from the pull-in signal output. (PI)
Pull-in Signal Output. The summing signal output of A,B,C,D or PD1,
O
PD2 for mirror detection. Reference to VCI.
Defect Output. Pseudo CMOS output. When a defect is detected, the
O
DFT output goes high. Also the servo AGC output can be monitored at
this pin, When CAR bits 7-4 are '0011'.
PI Top Hold pin. An external capacitance is connected between this pin and VPB.
SIGO Bottom Envelope pin. An external capacitance is connected
between this pin and VPB.
Mirror Envelope Input. The SIGO envelope input pin.
I
Tracking Error Signal Output. Tracking error output reference to VCI.
O
Focusing Error Signal Output. Focus error output reference to VCI.
O
Center Error Signal Output. Center error out put reference to VCI.
O
Center Error LPF pin. An external capacitance is connected between
this pin and the LCP pin.
Center Error LPF pin. An external capacitance is connected between
this pin and the LCN pin.
Serial Clock. Serial Clock CMOS input. The clock applied to this pin
I
is synchronized with the data applied to SDATA. (Not to be left open).
Serial Data. Serial data bi-directional CMOS pin. NRZ programming
I/O
data for the internal registers is applied to this input. (Not to be left open)
Serial Data Enable. Serial enable CMOS input. A high level input
I
enables the serial port. (Not to be left open)
Hold Control. ATTL compatible control pin which, when pulled high, disables the RF AFC
I
charge pump and holds the RE AGC amplifier gain at its present value. (open high)
Ground. Ground pin for the RF block and serial port.
Differential Normal Output. Filter normal outputs.
O
Differential Normal Output. Filter normal outputs.
O
Analog inputs for RF Single Buffer. Differential analog inputs to the RF single-ended
I
output buffer and full wave rectifier.
Analog inputs for RF Single Buffer. Differential analog inputs to the RF single-ended
I
output buffer and full wave rectifier.
Reference Resistor Input. An external 8.2 kohm, 1% resistor is
connected from this pin to ground to establish a precise PTAT
(proportional to absolute temperature) reference current for the filter.
The RF AGC integration capacitor CBYP, is connected between BYP and VPA.
I/O
Single Ended Normal Output. SIngle-ended RF output.
O
Power. Power supply pin for the RF block and serial port.
To provide memory addresses. During Sector-Erase AMS-A11 address lines will
select the sector. During Block-Erase AMS-A15 address lines will select the block.
To output data during Read cycles and receive input data during Write cycles. Data is
internally latched during a Write cycle. The outputs are in tri-state when OE# or CE# is
high.
To activate the device when CE# is low.
To gate the data output buffers.
To control the Write operations.
To provide power supply voltage: 2.7-3.6V
Driver block power supply connection. (Both pins must be connected.)
-
Logic block power supply connection. Provide a voltage between 4.5 and 5.5V.
-
Power supply connection. Connect to the ground.
-
Oscillator connection. An oscillator circuit is formed by connecting an external resistor
I
and capacitor to these pins.
O
Display off contort input.
BLK = Low (Vss)...Display off.(S1 toS43 and G1 to G11 at VFL level.)
I
BLK = High (VDD)...Display on.
Note that serial data can be transferred while the display is turned off.
Serial data transfer inputs. These pins must be connected to the system microcontroller.
CL: Synchronization clock
I
DI: Transfer data
CE: Chip enable
Digit outputs. These pins are P-channel open drain outputs with pull-down resistors.
O
Segment outputs for displaying the display data transferred by serial data input. These pin
O
are P-channel open drain outputs with pull-down resistors.
Function
CLOCK
GENERATOR
GENERATOR
DI
DIMMRE
TIMING
SHIFT REGISTER
ADDRESS
DETECTOR
CL
CE
Vss
VDD
1-29
Page 30
TH-A5R
74VHCT244A (DIC12) : Buffer/Line driver
1. Pin layout
1
OE1
I0
O4
I1
O5
I2
O6
I3
O7
GND
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Vcc
OE2
O0
I4
O1
I5
O2
I6
O3
I7
74LVT573 (U10, U11, U12) : Latch
2. Pin function
Symbol
OE1,OE2
I0-I7
O0-O7
Function
3-STATE Output Enable Inputs
Inputs
3-STATE Outputs
3. Truth table
Inputs
OE1
L
L
H
Inputs
OE2
L
L
H
H:HIGH Voltage Level
L:LOW Voltage Level
I:Immaterial
Z:High Impedance
In
L
H
X
In
L
H
X
Outputs
(Pins12,14,16,18)
L
H
Z
Outputs
(Pins3,5,7,9)
L
H
Z
1. Pin layout2. Pin function
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Vcc
O0
O1
O2
O3
O4
O5
O6
O7
LE
Symbol
D0-D7
LE
OE
O0-O7
MM74HCT245 (U15) : Transceiver
1. Pin layout
ENABLE
Vcc G B1 B2 B3 B4 B5 B6 B7 B8
20 19 18 17 16 15 14 13 12 11
Function
Data Inputs
Latch Enable Input
Output Enable Input
3-STATE Latch Outputs
2. Truth table
Control
Inputs
G
DIR
L
L
H
H=HIGH Level
L=LOW Level
X=Irrelevant
Operation
L
B data to A bus
H
A data to B bus
X
245
isolation
3. Truth table
InputsOutputs
LE
X
H
H
L
H:HIGH Voltage Level
L:LOW Voltage Level
Z:High Impedance
X:Immaterial
O0:Previous O0 before HIGH to LOW transition of Latch Enable
OE
H
L
L
L
Dn
X
L
H
X
On
Z
L
H
O0
1 2 3 4 5 6 7 8 9 10
DIR A1 A2 A3 A4 A5 A6 A7 A8 GND
1-30
Page 31
CS8415A (DIC14) : Digital audio receiver
TH-A5R
1. Pin layout
SDA/CDOUT
AD0/CS
EMPH
RXP0
RXN0
VA+
AGND
FILT
RST
RMCK
RERR
RXP1
RXP2
RXP3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SCL/CCLK
AD1/CDIN
RXP6
RXP5
H/S
VD+
DGND
OMCK
U
INT
SDOUT
OLRCK
OSCLK
RXP4
2. Pin function
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12,13
14,15
25,26
16
17
18
19
20
21
22
23
24
27
28
Symbol
SDA/CDOUT
AD0/CS
EMPH
AGND
RMCK
RERR
RXP1,RXP2
RXP3,RXP4
RXP5,RXP6
OSCLK
OLRCK
SDOUT
OMCK
DGND
AD1/CDIN
SCL/CCLK
RXP0
RXN0
VA+
FILT
RST
INT
U
VD+
H/S
I/O
Serial Control Data I/O(I2C) / Data Out(SPI)
I/O
Address Bit 0(I2C) / Control Port Chip Select(SPI)
SUB
CENTER
SR
SL
FR
FL
AGND
VA
AINL+
AINLFILT
AINRAINR+
MUTEC
2. Pin function
Pin No.
1,2,3
4
5
6
7
8
9
10
11
12
13
14
15
16,17
19,20
18
21
22
23,24,25
26,27,28
SUB,CENTER
Symbol
SDIN1
SDIN2
SDIN3
SDOUT
SCLK
LRCK
DGND
VD
VL
MCLK
SCL/CCLK
SDA/CDIN
ADO/CS
RST
MUTEC
AINR+,AINR-
AINL+,AINL-
FILT
VA
AGND
FR,FL,SR,SL
Function
Serial Audio Data In
Serial Audio Data Out
Serial Clock
Left/Right Clock
Digital Ground
Digital Power
Digital Interface Power
Master Clock
Serial Control Interface Clock
Serial Control Data I/O
Address Bit 0/ Chip Select
Reset
Mute Control
Differential Analog Inputs
Internal Voltage Filter
Analog Power
Analog Ground
Analog Outputs
74LCX244 (DIC13) : Bus buffer
1. Pin layout
20
19
18
17
16
15
14
13
12
11
Vcc
2G
1Y
2A
1Y
2A
1Y
2A
1Y
2A
Yn
1
4
2
3
3
2
4
1
L
H
Z
1
1G
1
2
1A
2Y
4
3
1A
2
4
2Y
3
5
1A
3
6
2Y
2
7
1A
4
8
2Y
1
9
GND
10
3. Truth table
INPUTOUTPUT
G
L
L
H
X:"H"or"L"
Z:High impedance
An
L
H
X
2. Pin function
Pin No.
1
2,4,6,8
9,7,5,3
11,13,15
17
18,16,14
12
19
10
20
Symbol
1G
1A1 to 1A4
2Y1 to 2Y4
2A1 to 2A4
1Y1 to 1Y4
2G
GND
Vcc
Function
Output Enable Input
Data Inputs
Data Outputs
Data Inputs
Data Outputs
Outputs Enable Input
Ground(0V)
Positive Supply Voltage
1-33
Page 34
TH-A5R
BA5983FM (U6) : 4CH driver
1.Block diagram
27
28
Vcc
1
2
25
26
10k
10k
3
20k
10k
4
24
5
2322
10k
10k
6
20k
10k
7
2.Pin function
Pin No.Pin No.
SymbolSymbol
1
BLAS IN
2
OPIN1(+)
3
OPIN1(-)
4
OPOUT1
5
OPIN2(+)
6
OPIN2(-)
7
OPOUT2
8
9
10
11
12
13
14
GND
STBY1
PowVcc1
VO2(-)
VO2(+)
VO1(-)
VO1(+)
I/OI/O
Input for Bias-amplifier
I
Non inverting input for CH1 OP-AMP
I
Inverting input for CH1 OP-AMP
I
Output for CH1 OP-AMP
O
Non inverting input for CH2 OP-AMP
I
Inverting input for CH2 OP-AMP
I
Output for CH2 OP-AMP
O
Substrate ground
-
Input for CH1/2/3 stand by control
I
Vcc for CH1/2 power block
-
Inverted output of CH2
O
Non inverted outpur of CH2
O
Inverted output of CH1
O
Non inverted outpur of CH1
O
Function
15
16
17
18
19
20
21
22
23
24
25
26
27
28
21
20
STAND BY
CH4
STAND BY
CH1/2/3
89
VO4(+)
VO4(-)
VO3(+)
VO3(-)
PowVcc2
STBY2
GND
OPOUT3
OPIN3(-)
OPIN3(+)
OPOUT4
OPIN4(-)
OPIN4(+)
PreVcc
1716
18
19
Vcc
Vcc
10
10k
10k
10k
10k
11
Level Shift
Level Shift
10k
10k
10k
10k
Level Shift
Level Shift
10k
10k
10k
10k
12
13
Function
O
Non inverted output of CH4
O
Inverted output of CH4
O
Non inverted output of CH3
O
Inverted output of CH3
-
Vcc for CH3/4 power block
I
Input for Ch4 stand by control
-
Substrate ground
O
Output for CH3 OP-AMP
I
Inverting input for CH3 OP-AMP
I
Non inverting input for CH3 OP-AMP
O
Output for CH4 OP-AMP
I
Inverting input for CH4 OP-AMP
I
Non inverting input for CH4 OP-AMP
-
Vcc for pre block
15
10k
10k
10k
10k
14
1-34
Page 35
< MEMO >
TH-A5R
1-35
Page 36
TH-A5R
VICTOR COMPANY OF JAPAN, LIMITED
AUDIO & COMMUNICATION BUSINESS DIVISION
PERSONAL & MOBILE NETWORK BUSINESS UNIT. 10-1,1chome,Ohwatari-machi,Maebashi-city,371-8543,Japan
(No.21046)
200112(V)
Page 37
TH-A5R
Block diagrams
Main section
AUX
L R
5
TUNER
VFD
(MIC OPTION)
LC86P6548
KEY
MIC
LPF
CLK
4
LPF
AUX L
TUN L
DVD L
GND
DI
CE
CL
LC75725E
CL CE DI
POWER
AMP
3ohm
(60W)
TDA7440
POWER
AMP
6ohm
(35W)
CS49326
DPS
AUX R
TUN R
DVD R
LPF
LPF
3
A/D IN
A/D IN
FL
DIGITAL
OPTICAL
(Only J/C/JPN)
2
DIGI IN
EXT
DIGI IN
DVD
CS8415
DIR
CS4228A
CODEC
FR
RL
RR
C
W
LPF
TDA7440
LPF
LPF
POWER
AMP
POWER
AMP
LPF
POWER
AMP
LPF
F_C_R_S/W
Lt_Rt
TDA7440
WM8720
LPF
POWER
AMP
DVD PACK
6ohm
(35W)
6ohm
(35W)
6ohm
(35W)
6ohm
(35W)
1
AB CDEFG
LPF
2-1
Page 38
TH-A5RTH-A5R
DVD mecha block section
RF AGC
DECK ASS’Y
5
&EQ
CONTROL
FOCUS OK
DETECT DEFECT
DETECT MIRROR
GEN
PICK UP
FOCUS
SERVO
LOOP
DISC
MOTOR
& I/V AMP
FEED
MOTOR
4
DISC
MOTOR
DRIVER
ACTUATOR
MOTOR
DRIVER
MICOM DATA INTERFACE
LOGIC DECODER
RF AMP SP3721
TRACKING
ERROR
I/V AMP
APC.LASER
CONTROL&
LPC
TRACKING
SERVO
LOOP
HARDWARE
LOGIC
EFM
COMPARATOR
RF&FOCUS
ERROR
I/V AMP
SPINDLE
SERVO LPF
MICOM
M6759
DATA
SEPARATOR
DIGITAL
SERVO
M5701
DVD ROM
CONTROLLER
BCA
DVD-DSP
CD-DSP
4M DRAM
416C256
RAM
ARBITER
TARGET
SEARCH
Parallel/serial
DVD Interface
ATAPI
&
MPEG
I/F
C3 ECC
EDP
MCU I/F
3
HOST
SDRAM CONTROLLER
MEMORY
SST39VF800A
Track Buffer
Processor
Audio
Input Unit
Decryption
-------ZIVA
A/V CORE
Graphics
Engine
Interlaced/
Progressive
Video
Encoder
Digital Video
Five 10-bit
Video
DACs
Analog
Video
Output
64M SDRAM
W986432DH-7
BUFFER
SIGNAL
KSA812
SWITCHING
BUFFER
7612
VIDEO OUT
2
System Control Bus
Optical
Output
SPARC
Microprocessor
Audio
Output
Audio
Output
System Control Bus
Phase
Lock
1
ASYNC BUS/IR/GPIO/SPI/UART1&2/ATAPI/IDC
Loop
JTAG
Interface
MPEG
DECODER
IC LOGIC
74HCT245
OPICAL OUT
AMP PARTS
Parallel/serial
DVD Interface
ATAPI 40PIN
13.5MHZ Crystal
2-2
ZIVA5
HAB CDE FG
Page 39
TH-A5R
Standard schematic diagrams
FL display & System control section / Power supply section
5
Sheet 2/6
Sheet 5/6
4
Sheet 4/6
Sheet 4/6
3
2
SHEET
NUMBER
1
CIRCUIT DESCRIPTION
FL display & System control / Power supply
1/6
Main
2/6
Video signal output
3/6
DSP
4/6
DVD loader
5/6
DVD MPEG
6/6
Parts are safety assurance parts.
When replacing those parts, make
sure to use the specified parts.
* All printed circuit boards and its assemblies are not available as service parts.
TH-A5R
Area suffix
B ------------------------------- U.K.
E ----------- Continental Europe
EN ------------ Northern Europe
EV -------------- Eastern Europe
EE ------------------------- Russia
- Contents -
Exploded view of general assembly and parts list (Block No.M1)XV-THA5
Exploded view of general assembly and parts list (Block No.M2)SP-WA5
DVD mechanism assembly and parts list (Block No.MJ)
Electrical parts list (Block No.01~06)
Packing materials and accessories parts list (Block No.M3,M5)
C41FR 2203-001554CHIP CAPACITOR
C41RL 2203-001554CHIP CAPACITOR
C41RR 2203-001554CHIP CAPACITOR
C41W2203-000062CHIP CAPACITOR
C43C2401-000909E.CAPACITOR
C43FL 2401-000909E.CAPACITOR
C43FR 2401-000909E.CAPACITOR
C43RL 2401-000909E.CAPACITOR
C43RR 2401-000909E.CAPACITOR
C43W2401-001502E.CAPACITOR
C44C2203-000704CHIP CAPACITOR
C44FL 2203-000704CHIP CAPACITOR
C44FR 2203-000704CHIP CAPACITOR
C44RL 2203-000704CHIP CAPACITOR
C44RR 2203-000704CHIP CAPACITOR
C44W2203-000280CHIP CAPACITOR
C47C2301-000375M.CAPACITOR
C47FL 2301-000375M.CAPACITOR
C47FR 2301-000375M.CAPACITOR
C47RL 2301-000375M.CAPASITOR
C47RR 2301-000375M.CAPASITOR
C47W2301-000375M.CAPACITOR
C52201-000546C.CAPASITOR
C522401-001975E.CAPACITOR
C542401-001975E.CAPACITOR
C552401-001975E.CAPACITOR
C72401-001538E.CAPACITOR
C70FL 2203-000062CHIP CAPACITOR
C70FR 2203-000062CHIP CAPACITOR
C71C2203-000062CHIP CAPACITOR
C71RL 2203-000062CHIP CAPACITOR
C71RR 2203-000062CHIP CAPACITOR
C71W2203-000062CHIP CAPACITOR
C82401-000438E.CAPACITOR
C92401-001413E.CAPACITOR
D10402-000127DIODE
D100401-001090DIODE
D110402-000127DIODE
D120401-001090DIODE
D130401-001090DIODE
D140401-001090DIODE
D150401-001090DIODE
D160401-001090DIODE
D170401-001090DIODE
D20402-000127DIODE
D200401-001090DIODE
D2010401-001090D I O D E
D2020401-001090D I O D E
D2030401-001090D I O D E
D2040401-001090D I O D E
D2050401-001090D I O D E
D2060401-001090D I O D E
D2070401-001090D I O D E
D2080403-001376ZENER DIODE
D2090401-001090D I O D E
D210401-001090DIODE
D2100401-001090D I O D E
D2110401-001090D I O D E
D2120401-001090D I O D E
D2130401-001090D I O D E
D2140401-001090D I O D E
D2150401-001090D I O D E
D2160401-001090D I O D E
P 1AH69-00532A
P 2AH69-00533A
P 3AH69-00581A
P 4AH69-00552C
P 5AH69-10081H
P 6AH69-00525B
P 7AH69-00665A
P 8AH69-00664C
P 985-000-327-71
P 1080-000-474-01
P 1180-000-474-11
P 1285-000-353-51
P 1385-000-434-01
P 1480-000-475-01
P 1580-000-475-11
P 1683-000-447-11
Parts numberParts nameArea
AH69-00552D
AH69-00552A
CUSHION-SIDE,L
CUSHION-SIDE,R
CUSHION-PAD
PACKING-CASE
PACKING-CASE
PACKING-CASE
PE BAG-SET
PE BAG-I/B
PAD-ROLL
MASTER-CARTON
POLY BAG
TOP CUSHION
BOTTOM CUSHION
MIRROR MAT
POLY BAG
TOP CUSHION
BOTTOM CUSHION
CARTON
Q'ty
1
1
2
1
1
1
DW-1 YEL
1
1
1
1
5
SP-XSA5K,SP-XCA5K
1
SP-XSA5K,SP-XCA5K
1
SP-XSA5K,SP-XCA5K
1
SP-WA5
1
SP-WA5
1
SP-WA5
1
SP-WA5
1
SPEAKER
TH-A5R
Block No. M3MM
Description
B
E,EN,EV
B
EE
EE
EE
B,E,EN,EV
Item
A
A 1AH68-01011E
A 2AH68-00415D
A 3AH68-00415C
A 4AH38-10001A
A 5AH42-20001P
A 6--------------A 7AH39-40001V
A 8AH59-00129B
A 9AH39-00375A
A 10AH39-00376A
A 11SP-XSA5K
A 12SP-XCA5K
A 1390-000-053-01
A 1490-000-053-11
Block No. M5MM
Parts numberParts nameArea
INST.BOOK
INST.BOOK
INST.BOOK
AH68-01011K
AH68-01011G
AH68-01011D
AH68-00415F
INST.BOOK
INST.BOOK
INST.BOOK
GAURANTY CARD
GAURANTY CARD
IMPORTANT CARD
FM-ANT
AM-ANT
BATTERY SET
RCA-CABLE
REMOCON
SPEAKER CORD
SPEAKER CORD
SPK.BOX
SPK.BOX
FOOT
FOOT
Q'ty
1
GER FRE DUT
1
GER FRE SPA ITA
1
RUS
1
POL HUN CZE
1
1
ENG
1
1
1
1
1
1
1
1
4
SHORT
2
LONG
4
1
3
SP-XCA5K
12
SP-XSA5K
Description
E
EN
EE
EV
B
B,E,EN,EE
EV
B
3-29
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