JVC GZ-MG50U Diagram
SCHEMATIC DIAGRAMS
HARD DISK CAMCORDER
YF05320048
GZ-MG40US, GZ-MG50US
CD-ROM No.SML200509
GZ-MG40US[M5E327],
GZ-MG50US[M5E329]
Lead free solder used in the board (material : Sn-Ag-Cu, melting point : 219 Centigrade)
COPYRIGHT © 2005 Victor Company of Japan, Limited
No.YF109SCH
2005/9
CHARTS AND DIAGRAMS
NOTES OF SCHEMATIC DIAGRAM
Safety precautions
The Components indentified by the symbol are
critical for safety. For continued safety, replace safety
critical components only with manufacturer's recommended parts.
1. Units of components on the schematic diagram
Unless otherwise specified.
1) All resistance values are in ohm. 1/6 W, 1/8 W (refer to
parts list).
Chip resistors are 1/16 W.
K: KΩ(1000Ω), M: MΩ (1000KΩ)
2) All capacitance values are in µF, (P: PF).
3) All inductance values are in µH, (m: mH).
4) All diodes are 1SS133, MA165 or 1N4148M (refer to parts
list).
Note: The Parts Number, value and rated voltage etc. in
the Schematic Diagram are for references only.
When replacing the parts, refer to the Parts List.
2. Indications of control voltage
AUX : Active at high.
AUX or AUX(L) : Active at low.
!
4. Voltage measurement
1) Regulator (DC/DC CONV) circuits
REC : Colour bar signal.
PB : Alignment tape (Colour bar).
— : Unmeasurable or unnecessary to measure.
2) Indication on schematic diagram
Voltage indications for REC and PB mode on the schematic diagram are as shown below.
REC mode
12 3
2.5
(5.0)
PB mode
1.8
PB and REC modes
(Voltage of PB and REC modes
are the same)
Note: If the voltages are not indicated on the schematic
diagram, refer to the voltage charts.
5. Signal path Symbols
The arrows indicate the signal path as follows.
NOTE : The arrow is DVC unique object.
Playback signal path
Playback and recording signal path
3. Interpreting Connector indications
1
2
Removable connector
3
1
2
Wire soldered directly on board
3
1
Non-removable Board connector
2
3
1
2
4
Board to Board
3
Connected pattern on board
The arrows indicate signal path
Note: For the destination of each signal and further line
connections that are cut off from the diagram,
refer to "BOARD INTERCONNECTIONS"
Recording signal path
(including E-E signal path)
Capstan servo path
Drum servo path
(Example)
R-Y
Playback R-Y signal path
Y
Recording Y signal path
6. Indication of the parts for adjustments
The parts for the adjustments are surrounded with the circle
as shown below.
7. Indication of the parts not mounted on the circuit board
“OPEN” is indicated by the parts not mounted on the circuit
board.
R216
2-1(No.YF109)
OPEN
CIRCUIT BOARD NOTES
1. Foil and Component sides
1) Foil side (B side) :
Parts on the foil side seen from foil face (pattern face)
are indicated.
2) Component side (A side) :
Parts on the component side seen from component face
(parts face) indicated.
rts location are indicated by guide scale on the circuit board.
2. Parts location guides
Parts location are indicated by guide scale on the circuit board.
LOCATION
IC
Category : IC
Horizontal “A” zone
Vertical “6” zone
(A : Component side)
D : Discrete component)
B : Foil side
C : Chip component
REF No.
IC101 B C 6 A
Note: For general information in service manual, please
refer to the Service Manual of GENERAL INFORMATION Edition 4 No. 82054D (January 1994).
(No.YF109)2-2
SDR DQ13
SDR DQ13
30
16
N
REG 1 5V
W
e
BOARD INTERCONNECTION
(Page2-29) (Page2-30)
YTU94074-22
YTU94077-22
ZOOM04
123456789
CN106
ZOOM02
ZOOM03
MON_R
REG_4.8V
REG_2.5V
REG_3.1V
GND
ZOOM01
S_SHUT
INT_L
INT_R
INT_GND
SPKSPK+
REG_1.5V
REG_2.5V
REG_3.1V
GND
PMA0
XPMWAIT
MON_B
MON_G
F_LED
F_PTR_AD
FOCUS02
FOCUS03
FOCUS04
FOCUS01
10111213141516171819202122
REG_3.1V
REG_4.8V
M_REG4.8
GND
CLK4M5
AIBD
AOBD
AIOBCK
BUZZER
AOMCLK
AIOLRCK
PMD14
PMD11
PMD12
PMD15
PMD13
XPMOE
XPMWE
VI2
VI1
MPGVSYNC
VI0
MPGFLD
MPGHSYNC
HRP
VDCVF
HDCVF
ASPECT
V_OUT
Y_OUT
C_OUT
F_VCC
OP_THRMO
GND
FOCUS03
FOCUS04
FOCUS02
HDIRS
LENS_LED
CAM_VD
F/Z_CS
PD_L
L_MUTE
A_MUTE
AUDIO_CS
AUDIO
(Page2-9)
PMD9
PMD8
PMD7
PMD10
VI4
VI3
VI5
VI6
VI1
VI0
VI2
VI3
V I/O
(Page2-13)
DV2OUT0
DV2OUT2
DV2OUT1
HGVCC+IS
DRIVE-IS
DRIVE+IS
F_VCC
ZOOM03
ZOOM04
ZOOM02
FOCUS01
F/Z_RST
CLK1M0
VDIRS
IRIS_PS
PMD6
PMD3
PMD5
PMD2
PMD4
MPEG2
(Page2-11)
AIOBCK
AIBD
AIOLRCK
VI7
VI6
VI7
VI4
VI5
MPGHSYNC
DV2OUT4
DV2OUT5
DV2OUT6
DV2OUT7
DV2OUT3
OP BLOCK
HGVSS-IS
Z_PTR_AD
HGOUT-IS
HGOUT+IS
ZOOM01
HGVSS-IS
HGOUT-IS
HGOUT+IS
HGVCC+IS
OP DRV
(Page2-23)
CAM_IN
IRIS_CS
PMA9
PMD1
PMD0
PMA11
PMA10
AOBD
AOMCLK
MPGFLD
ANA_CLK
ANA_OUT
MPGVSYNC
ANA_CS
ANA_RST
ANA_IN
Z_LED
Z_VCC
DRIVE-IS
AU_SIG/L
AU_SIG/R
ANA_CLK
ANA_OUT
REG_4.8V
REG_3.1V
PMA8
OSD_CS
Z_LED
DRIVE+IS
GND
PMA6
PMA7
DV2CKOUT
OSD_VD
PSCTL
CAM_OUT
CAM_CLK
IR_OUT
ASPECT
PMA5
PMA4
PMA3
DV2CKOUT
REG+CCD
DSP_RST
OUTV2
PMA2
PMA1
CLK27B
XCACK
PMA15
XCREQ
PMA12
PMA13
PMA14
DV1IN0
DV1IN1
DV1IN2
DV1IN3
DV1IN4
DV1IN5
DV1IN6
DV1IN7
DV1CLKIN
XVOEN
XPMCS0
MPEG_RST
PLLSTOP
YTU94074-24
YTU94077-24
XCINT
GND
Vout
7
8
10
Vdd
GND
11121314
SUB
V1
VL
123456
H2
H1
CN5001
CN105
V4V3V2
TEST
CCD_CTL
REG_+15V
REG_-7.5V
CCD_OUTV1SUBH1V2V3V4
123456789
REG+CCD/REG_+15V
REG-CCD/REG_-7.5V
REG+CCD/REG_+15V
REG-CCD/REG_-7.5V
123456789
G_RST
P_GYAMP
CLK4M5
F/Z_CS
CAM_VD
LENS_LED
HDIRS
VDIRS
CLK1M0
F/Z_RST
IRIS_PS
IRIS_CS
CAM_IN
XCREQ
XCACK
CLK27B
OUTV2
Z_PTR_AD
F_PTR_AD
OP_THRMO
LAMP_ON
PMA1
PMA4
PMA2
PMA0
PMA3
XPMWAIT
CCD133
RG
GND
H2
101112131415161718192021222324
CCD_CTL
GND
GND
GND
CCD_OUT
GND
GNDRGGND
101112131415161718192021222324
REG+CCD
REG-CCD
CAM_3.1V
(Page2-25)
REG_4.8V
GND
TG_VD
MCLKI
REG_4.8V
GND
CAM_3.1V
CAM_CLK
CAM_OUT
ACHI0
CCD_OUT
TG_ID
MCLKI
TG_CS
TG_VD
TG_HD
CAM_CLK
CAM_OUT
PMA5
S_SHUT
PMD2
PMD0
PMD1
PMA10
PMA6
PMA8
PMA11
PMA9
PMA7
REG_3.1V
G_RST
P_GYAMP
H2H1RG
TG_ID
TG_HD
TG_CS
TG2_RST
CDS
(Page2-17)
ACHI2
ACHI3
ACHI4
ACHI1
ACHI5
P.PRCS
(Page2-21)
PMD7
PMD5
PMD8
PMD4
PMD6
V1
RG
ACHI6
PMD9
v2
H1
CAM_CLK
ACHI7
PMD10
V3V4SUB
H2
CAM_OUT
ACHI8
PMD11
GND
SUB
ACHI9
PMD12
GYRO_CCD
TG133
PMD3
V2
V1
CDS_CS
PMD13
GND
PMD14
20
CCD
CDS_3V
CDS_3V
ACHI1
ACHI0
SYSSEL0
SYSSEL1
CCD_CTL
ACHI3
ACHI2
EEPRM_CK
EEPRM_CS
YTU94128A-4
(Page2-27)
G_RST
Y_GYAMP
GYRO
ACHI5
ACHI7
ACHI6
ACHI8
ACHI4
Y_GYAMP
REG_3.1V
REG_1.5V
DMABREQ
DMASREQ
XPMBLS1
XPMBLS0
SCPU_CS
V27_OUT
TVSEL
EEPRM_DI
EEPRM_DO
REG_3.1V
ACHI9
CDS_CS
GND
PPRD0
PPRO1
PPRO2
PPRO3
PPRO4
PPRO5
PPRO6
PPRO7
PPRO8
PPRO9
PPRO10
PPRO11
VLD_PIX
SOF
VCLK
SSGFLD
DMACLR
XPMCS1
PMINT
FLDCPU
VDCPU
ID_LAT
CLK27A
SCPU_SI
SCPU_SCK
G_RST
P_GYAMP
REG_3.1V
V3
V4
CCD__CTL
ADCLK
PBLK
SHD
SHP
OBCLP
SHP
SHD
PBLK
ADCLK
OBCLP
SDWP
XPMOE
PMD15
XPMWE
AFE_RST
GND
SCPU_SO
CN107
INT MIC
INT_GND
INT_L9INT_R
4
IR_OUT
SDWP
FLSH_RST
REG_3.1V
GND
SDR_DQ30
SDR_DQ31
SDR_DQ31
SDR_DQ30
SDWP
CCD_CTL
PPRO0
PPRO1
PPRO2
PPRO3
PPRO4
PPRO5
PPRO6
PPRO7
PPRO8
PPRO9
PPRO10
PPRO11
VLD_PIX
SOF
VCLK
SSGFLD
DMACLR
DMABREQ
DMASREQ
XPMBLS1
XPMBLS0
XPMCS1
PMINT
FLDCPU
VDCPU
ID_LAT
CLK27A
DV2CKOUT
DSP_RST
INT_GND
123
SDR_DQ28
SDR_DQ29
SDR_DQ27
SDR_DQ29
SDR_DQ27
SDR_DQ28
LITHIUM
SDR_DQ25
SDR_DQ24
SDR_DQ26
SDR_DQ26
SDR_DQ24
SDR_DQ25
CN109
SDR_DQ22
SDR_DQ23
SDR_DQ21
SDR_DQ22
SDR_DQ23
SDR_DQ21
SPEAKER
SPK-
2
BL_POWER
MAI
(Pag
SDR_DQ20
SDR_DQ19
SDR_DQ17
SDR_DQ18
SDR_DQ17
SDR_DQ20
SDR_DQ18
SDR_DQ19
SPK+
1
SDR_DQ16
SDR_DQ15
SDR_DQ16
SDR_DQ15
GND
SDR_DQ14
SDR_DQ14
23
REG_3.1V
HRP
BL_GND/GND
ANA_CLK
DRV
GND
ANA_OUT
VFB
GND
GND
GND
LCD_CS
MON_R
M_RVS/LCD_RVS
101112
C21P
C21N
VDDA
24252627282930
LAMP_ON
GND
GND
GND
23242526272829
LCD HINGE
YTU94074-12
YTU94077-12
NON_G
MON_B
CN7602
10111213141516171819202122232425262728293031323334353637383940
C22N
C23P
C22P
C23N
RESET_SW/SJIG_RST
VGL
YTU94105-40
YTU94077-40
OPE IF
YTU94074-12
YTU94077-12
(Page2-37)
CN7603
GDA
GCS
CN401
(Page2-31)
CN402
123456789
REG_4.8V
123456789
CN7601
HWRESETZ
VSSD
NPC
GCL
ANA_CLK
ANA_OUT
LCD_RVS
LCD_CS
LCD_CTL
1234567
HRP
VDCVF/VD
HDCVF/HD
REG_3.1V
REG_3.1V
VDD
POLVSHSDEVC[B]
39404142434445
HDCVF
VDCVF
REG_3.1V
38
MON_R
8
SIG_GND/GND
REG_4.8V
VB[G]
VA[R]
31323334353637
MON_B
MON_G
BL_POWER[15V]
REG_3.1V
REG_4.8V[BL/LED]
REG_4.8V[BL/LED]
REG_4.8V[SIG]
9
10111213141516171819202122
101112131415161718192021222324
BL_GND/GND
BL_REG/BL_POWER
LCD_CTL
SIG_GND/GND
SIG_GND/GND
SIG_GND/GND
BL_REG/BL_POWER
123456789
101112
NC
VDD1
VDDNCVSS
PDO
VCOIN
VSS1
LCD MODULE
NOTE: The number of patch cords ( ) are indicated by interconnected.
2-3(No.YF109)
P_MEDIA
LCD_OPEN
KEY_A
SET_SW
KEY_C
INFO_SW
31323334353637
30
OPERATION
40
YTU94074-24
YTU94077-24
REV
SW
JP7601
M_RVS
JP7602
REG_3.1V
VGH
C31P
C41P
C31N
VCL
C41N
ACES_LED
CHRG_LED
JP7603
SIG_GND
123456789
VCOML
VCOMH
10111213141516171819202122
PLAY_SW
REC_SW
8
9
Y_OUT
POFF_SW
LITHIUM
39404142434445
38
60
CN7701
1234567
AU_SIG/L
AU_SIG/R
C_OUT
V_OUT
S_DET
P_DET
MONI-BL
6
LCD_BLKNCBL_REGA
LCD_BLK
NC
B/L(LED)SMS
CN101
LCD
OPEN
SW
12345
BL_REGA
LED LIGHT
YTU94074-6
YTU94077-6
OFF
VIDEO
TRASH
SW
CN103
CN6001
PLAY
DSC
MENU
123456789
BL_POWER
UNREGCHK
45
LED RED
POW/CHRG
REC
LIGHT
SW
SW
DECK OPERATION
I_MTR
10111213141516171819202122232425262728
V_BATT
REG_2.5V
REG_2.5V
CLK_OUT
AL_3.1V
AL_3.1V
REG_CS
DRV_3.3V
DRV_3.3V
DRV_3.3V
DC_CHEK
REG_1.2V
32333435363738394041424344
31
LED BLUE
ACCESS
A/V JACK
LITHIUM
(Page2-33)
INFO
SW
S JACK
REG_1.2V
REG_1.2V
30
D_BATT
29
GND
GND
GND
GND
REG_1.5V
GND
GND
GND
GND
GND
T_BATT
17181920212223242526272829
TRIG S
SDR
DQ24
ZOOM UNIT
CN104
DIOR-
DIOW-
DMACK-
DRV_3.3V
RMC
AL_3.1V
(Page2-19)
SDR_A9
SDR_CLK
SDR_A8
SDR_A6
SDR_A10
SDR_A7
SDR_A6
SDR_A9
SDR_A8
SDR_A7
SDR_A10
SDR_CLK
DSP
(Page2-28)
WT
ZOOM_SW
ZOOM_SW
GND
GND
REG_3.1V
REG_3.1V
12345
6
3.3V
CFRDY
DMARQ
CFBVD1
CFBVD2
XCFWAIT
W/B
SDR_A0
SDR_A5
SDR_A5
SDR_A4
SDR_A4
SDR_A3
SDR_A3
SDR_A2
SDR_A2
SDR_A1
SDR_A1
SDR_A0
SDR_A12
SDR_A11
SDR_A12
SDR_A11
PMA16
XPMCS7
PMA16
XPMCS7
PMA17
PMA17
PMA18
PMA18
PMA19
PMA19
PMA20
PMA20
YTU94074-6
YTU94077-6
9
1
2
3
4
5
6
7
8
111213
SDR_VDD
PMA1
PMA21
PMA1
PMA21
SDR_VDD
ٕ
SD CARD
PMA4
PMA2
PMA3
PMA2
PMA3
PMA4
MAIN
10
YTU94105-40
YTU94077-40
CN102
1
2
DRV_3.3V
3
4
CFBVD2
5
XCFCE1
6
XCFCE0
7
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
8
9
CFA2
CFA0
CFBVD1
CFA1
CFRDY
GND
XCFWAIT
GND
XCFIORD
GND
GND
GND
CFD15
CFD0
CFD14
CFD1
CFD13
CFD2
CFD12
CFD3
CFD11
CFD4
CFD10
CFD5
CFD9
CFD6
CFD8
CFD7
GND
CFRESET
DMACK-
DMARQ
8MB
SD
JVC
LOCK
10
PMA6
PMA5
PMA5
PMA6
CU-SD008U
CN111
14
PMA12
PMA13
PMA14
PMA15
REG_2.5V
PMD12
PMD4
PMD3
PMA9
PMD1
PMA7
PMA8
PMA10
PMD0
PMA11
PMA8
PMA9
PMA7
PMA10
PMA11
PMD8
PMA2
PMD5
PMD6
PMD7
PMD7
PMD3
PMD2
PMD6
PMD4
PMD8
PMD1
PMD0
PMD5
XPMOE
PMD11
PMD15
PMD14
PMD10
XPMWE
PMD13
PMD9
PMD9
PMD11
PMD10
PMD12
PMD13
PMD14
PMD15
XPMWE
XPMOE
PMA14
PMA15
DV1IN0
DV1IN1
DV1IN2
DV1IN3
DV1IN4
DV1IN5
DV1IN6
DV1IN7
DV1CLKIN
XCINT
XVOEN
XPMCS0
MPEG_RST
PLLSTOP
DV2OUT7
DV2OUT6
DV2OUT5
DV2OUT4
DV2OUT3
DV2OUT2
DV2OUT1
DV2OUT0
PMA13
PMA12
/NC
/GROUND
/GROUND
/GROUND
/GROUND
/GROUND
/RESET-
/DASP-
/PDIAG-
/INTRQ
/IOROY
/DIOR-
/DIOW-
/DD15
/DD14
/DD13
/DD12
/DD11
/DD10
40
39
/3.3V
38
37
36
/CS1-
35
/CS0-
34
/DA2
33
/DA0
32
31
/DA1
30
29
28
27
26
25
24
23
22
HDD
21
20
19
/DD0
18
17
/DD1
16
15
/DD2
14
13
/DD3
12
11
/DD4
10
9
/DD5
8
/DD9
7
/DD6
6
/DD8
5
/DD7
4
3
2
/NC
1
/NC
SPEAKER
SPK-
SPK+
1
2
CN109
SDCD
SDCLK
USBDP
USBDN
SDCMD
SDDAT0
SDDAT1
SDDAT2
LITHIUM
BL_POWER
MAIN_IF
(Page2-5)
M_REG4.8
REG+CCD
GND
REG_3.1V
SDDAT3
3AAZEROG
IR_RMC
LIT_3V
PS_ZEROG
XCFIORD
XCFIOWR
XUSB_DET
USB
DSP MEM
_
SDR_DQ22
SDR_DQ23
SDR_DQ17
SDR_DQ20
SDR_DQ19
SDR_DQ18
SDR_DQ21
SDR_DQ18
SDR_DQ23
SDR_DQ21
SDR_DQ24
SDR_DQ22
SDR_DQ20
SDR_DQ17
SDR_DQ19
SDR_DQ14
SDR_DQ15
SDR_DQ16
SDR_DQ16
SDR_DQ15
SDR_DQ14
SDR_DQ13
SDR_DQ11
SDR_DQ12
SDR_DQ11
SDR_DQ13
SDR_DQ12
SDR_DQ9
SDR_DQ10
SDR_DQ9
SDR_DQ10
SDR_DQ8
SDR_DQ7
SDR_DQ7
SDR_DQ8
SDR_DQ6
SDR_DQ5
SDR_DQ5
SDR_DQ6
SDR_DQ3
SDR_DQ4
SDR_DQ3
SDR_DQ4
SDR_DQ1
SDR_DQ2
SDR_DQ2
SDR_DQ1
SDR_DQ0
SDR_DQM3
SDR_DQ0
SDR_DQM3
SDR_DQM2
SDR_DQM0
SDR_DQM1
SDR_DQM2
SDR_DQM1
SDR_DQM0
SDR_WE
SDR_CAS
SDR_WE
SDR_CAS
SDR_CSO
SDR_RAS
SDR_RAS
SDR_CSO
SDR_CKE
SDR_BA0
SDR_BA1
SDR_BA1
SDR_CKE
SDR_BAO
(Page2-15)
222324252627282930
GND
REG_1.5V
GND
GND
GND
GND
GND
T_BATT
TRIG SW
CFD15
XCFCE0
XCFIOWR
XCFIORD
XCFCE1
CFA2
32333435363738394041424344
31
REG_1.5V
REG_1.5V
ADP_L
DC JACK
50
REAR IF
OPE REG
CFA1
CFA0
REG_4.8V
REG_4.8V
REAR
CFD13
CFD0
CFD1
CFD14
REG_4.8V
CHRG_EVR
CAM_3.1V
CAM_3.1V
101112131415161718192021222324
-+TD
BATT_TERM
(Page2-34)
(Page2-35)
CFD12
CFD2
DATA_OUT
REG_3.1V
CFD3
CFD11
REG_3.1V
REG_3.1V
CFD10
CFD4
SJIG_RST
CFD9
CFD5
45
REG-CCD
KEY_B
123456789
REG_3.1V
REG_1.2V
REG_4.8V
VPP
V_BATT
SJIG_TX
I_MTR
ZEROG_H
WORD
SJIG_RX
PS_ZEROG
3AAZEROG
UNREGCHK
LIT_3V
IR_RMC
AL_3.1V
REG_3.1V
ZOOM_SW
GND
CN110
1
ARMTDO
16
ARMTCK
2
ARMTMS
17
ARMTDI
3
XARMTRST
18
XJRESET
4
REG_3.1V
19
NU_RX
5
NU_TX
20
AL_3.1V
6
SJIG_TX
21
SJIG_RX
7
MOD0
22
SJIG_RST
NC
8
23
GND
9
MON_B
24
HRP
10
MON_R
25
GND
11
GND
MON_G
NC
26
12
VDCVF
27
NC
13
NC
28
ZGH_OUT
14
ZGH_THRU
29
SBD5
15
SBT5
30
WORD
JIG CONNECTOR
ARMTCK
ARMTDO
ARMTMS
ARMTDI
BUZZER
KEY_A
L_MUTE
AUDIO_CS
P_MEDIA
LCD_OPEN
PD_L
A_MUTE
LCD_RVS
LCD_CS
LCD_CTL
ZEROG_H
DATA_OUT
KEY_B
XARMTRST
XJRESET
NU_RX
SJIG_RST
CHRG_EVR
ADP_L
MOD0
NU_TX
ZGH_OUT
ZGH_THRU
T_BATT
D_BATT
SBD5
REG_CS
DC_CHEK
SBT5
CLK_OUT
SDCMD
SDCLK
XUSB_DET
CFBVD2
CFD8
CFD7
CFD6
CFRESET
CFRDY
CFBVD1
XCFWAIT
SCPU_CS
ANA_RST
ANA_IN
ANA_CS
OSD_CS
OSD_VD
PSCTL
FLSH_RST
TG2_RST
SCPU_SI
SCPU_SCK
SDDAT3
V27_OUT
SCPU_SO
TVSEL
EEPRM_DO
SDDAT0
SDDAT1
EEPRM_DI
EEPRM_CS
EEPRM_CK
SDDAT2
SYSSEL0
P_DET
SDCD
USBDP
SYSSEL1
S_DET
USBDN
AFE_RST
PLAY_SW
POFF_SW
XCFIORD
XCFIOWR
ANA_CLK
DSP_RST
ANA_OUT
SUB CPU
ACES_LED
KEY_C
CHRG_LED
REC_SW
PMA0
XPMWAIT
(Page2-7)
INFO_SW
SET_SW
y10569001a_rev0.1
(No.YF109)2-4
L
MAIN(MAIN IF) SCHEMATIC DIAGRAM
MAIN(MAIN IF)
10
L171
W/B
Q171
RPM-22PB
RMC
R172
1.5k
IC171
KSM-2003LN2E
OUT2GND3VCC
1
T
NQR0129-002X
C172
10/6.3
T
R171
0Ω
C171
10/6.3
REG_4.8V
IR_OUT
GND
REG_3.1V
GND
IR_RMC
TO OP DRV
TO SUB CPU
TO SPEAKER
12
SPK-
SPK+
TO AUDIO
CN109
QGA1001F1-02X
1mm_ML
TO DSP
TO DSP,P.PRCS
TO ZOOM UNIT
TELE
1
234
REG_3.1V
SDDAT2
SDDAT3
SDCMD
SDCLK
SDDAT0
SDDAT1
SDCD
SDWP
WIDE
56
CN104
QGF0508F1-06X
0.5mm_FPC_BOTTOM
GND
ZOOM_SW
TO SUB CPU
47k
R141 47k
R142
R143 47k
L141
NQR0129-002X
R145 47k
R147 10k
R144 47k
R146 47k
5
TO SUB CPU
PS_ZEROG
TO CN103,
CN110,
SUB CPU
AL_3.1V
3AAZEROG
TO AUDIO
INT_GND
INT_L
TO INT MIC
GND
INT_R
CN107
QGA1001F1-04X
1mm_ML
1234
L121
SHORT
C121
OPEN
[2125]
C122
0.1
12
13
14
15
23
11
NC
GND
VREF
AVCC
DVCC
IC121
NAL0035-001X
GND2Tout3AGND4AOZ5AOY21NC
1
TO DSP
REG_3.1V
NU_RX
XARMTRST
ARMTDI
XJRESET
0Ω0Ω0Ω
R197
STBYB
22NC
10NC
9NC
8NC
7NC
6AOX
TO CN103,SUB CPU
TO DSP
TO DSP
TO CN101,CN103,SUB CPU
TO SUB CPU
NU_TX
AL_3.1V
SJIG_TX
MOD0
SJIG_RX
SJIG_RST
R198
GND
MON_B
HRP
TO CN101,V I/O
MON_R
MON_G
VDCVF
16 GND
17 GND
18 GND
19 ZeroG
20 DGND
24 NC
ARMTDO
ARMTCK
ARMTMS
R196
1162173184195206217228239241025112612271328142915
TO JIG CONNECTOR
ZGH_OUT
ZGH_THRU
TO SUB CPU
WORD
SBD5
SBT5
CN110
QGB0512L1-30X
0.5mm_BtoB
30
REG_3.1V
GND
SYMBOL NO. 101~
LAST NO.
CN 111
101
J
SYMBOL NO. 161~
LAST NO.
Q 162
169
R
162
C
SYMBOL NO. 191~
191
198DR
VACANT NO.
105,106,108
VACANT NO.
166Ω168
VACANT NO.LAST NO.
192Ω195
C141
10/6.3
T
TO SUB CPU
1
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-5(No.YF109)
6X
OTTOM
TO HDD
3.3V23.3V33.3V4DASP-5CS1-6CS0-7DA28DA09PDIAG-10DA111INTRQ12DMACK-13GROUND14IORDY15GROUND16DIOR-17DIOW-18GROUND19DMARQ20GROUND21GROUND22DD1523DD024DD1425DD126DD1327DD228DD1229DD330DD1131DD432DD1033DD534DD935DD636DD837DD738GROUND39GROUND40RESET-
1
R111 1k
R112 47k
R113 47k
R114 47k
R115 47k
CFBVD2
TO DSP
XCFCE1
XCFCE0
C111
47/6.3
T
CFA2
SHORT
CFA0
L111
[2125]
CFBVD1
CFA1
CFRDY
0Ω
R116
XCFWAIT
0Ω
R117
XCFIORD
XCFIOWR
DRV_3.3V
GND
TL111
CFD0
CFD15
TO CN103
CFD14
CFD1
CFD13
CFD2
CFD12
CFD3
CFD11
CFD4
CFD10
TO DSP
CFD5
CFD9
TO CN101,CN103
R148 22
R149 22
C142 0.1
R150 22
R151 22
45
45
9 SD_DATA2
1 SD_DATA3
2 SD_CMD
3 VSS(GND)
4 VDD(DSC_3V)
5 SD_CLK
6 VSS2
7 SD_DATA0
8 SD_DATA1
10 CARD_DET
11 TERMINAL
12 WP_SW
13 GND 14GND
TO SD
CN111
NNZ0134-001X
CFD6
CFD8
CFD7
CFRESET
BL_POWER
GND
CN102
QGF0508F1-40X
0.5mm_FPC_BOTTOM
R165
R161
OPEN
OPEN
R162
OPEN
TO DSP
TO DSP
R164
OPEN
Q161
OPEN
5
C161
OPEN
[2125]
63
41
R163
OPEN
USBDN
USBDP
GND
REG_3.1V
XUSB_DET
2
Q162
OPEN
C162
OPEN
R169
0Ω
NQR0506-002X
R131
47k
L131
43
1
2
Q131
DTC144EE-X
TO V I/O,TG133
REG+CCD
J101
QNZ0497-001
7
5
4
3
2
1
6
C141
10/6.3
SUB CPU
123
LIT_3V
D141
OPEN
123
D142
OPEN
2
RB715W-X
D191
!
!
R191
1k
3
AL_3.1V
1
TO CN103,CN110,SUB CPU
TO CN103,CDS,TG133
TO SUB CPU,AUDIO,V I/O
TO AUDIO
TO SUB CPU
TO V I/O
TO SUB CPU
TO V I/O
TO SUB CPU
TO P.PRCS
TO CN110,V I/O
TO CN103
TO CN110,V I/O
TO V I/O
TO CN110,V I/O
TO SUB CPU
TO SUB CPU
AU_SIG/L
AU_SIG/R
P_DET
V_OUT
C_OUT
S_DET
Y_OUT
POFF_SW
PLAY_SW
REC_SW
CHRG_LED
ACES_LED
KEY_C
INFO_SW
SET_SW
KEY_A
P_MEDIA
LCD_OPEN
SJIG_RST
LAMP_ON
GND
HRP
REG_3.1V
CAM_3.1V
REG_4.8V
BL_POWER
MON_B
MON_G
MON_R
HDCVF
VDCVF
LCD_CTL
ANA_CLK
ANA_OUT
LCD_CS
LCD_RVS
R166 OPEN
R167
0Ω
TO OPERATION
(CN401)
CN101
QGF0547C2-45X
0.5mm_FPC_VERTICAL
1 AU_SIG/L
2 AU_SIG/R
3 P_DET
4 V_OUT
5 C_OUT
6 S_DET
7 Y_OUT
8 LITHIUM
9 POFF_SW
10 PLAY_SW
11 REC_SW
12 CHRG_LED
13 ACES_LED
14 KEY_C
15 INFO_SW
16 SET_SW
17 KEY_A
18 P_MEDIA
19 LCD_OPEN
20 RESET_SW
21 LAMP_ON
22 GND(BL/LED)
23 GND(BL/LED)
24 GND(BL/LED)
25 GND
26 GND
27 GND
28 GND
29 HRP
30 REG_3.1V
31 REG_3.1V
32 REG_4.8V(SIG)
33 REG_4.8V(BL/LED)
34 REG_4.8V(BL/LED)
35 BL_POWER
36
MON_B
37
MON_G
38
MON_R
39
HDCVF
40
VDCVF
41
LCD_CTL
42
ANA_CLK
43
ANA_OUT
44
LCD_CS
45
LCD_RVS
TO CN101
TO SUB CPU
TO MPEG2,V I/O,
DSP MEM
TO SUB CPU
TO CN110,SUB CPU
TO SUB CPU
TO CN102
TO SUB CPU
TO DSP
TO SUB CPU
TO SUB CPU
TO MPEG2,P.PRCS
TO SUB CPU
TO OP DRV
TO SUB CPU
TO CN101,CDS,TG133
TO SUB CPU
TO CN101,110,SUB CPU
TO CN105,TG133
TO SUB CPU
BL_POWER
UNREGCHK
I_MTR
V_BATT
REG_2.5V
CLK_OUT
AL_3.1V
REG_CS
DRV_3.3V
DC_CHEK
REG_1.2V
D_BATT
GND
T_BATT
REG_1.5V
ADP_L
REG_4.8V
M_REG4.8
CHRG_EVR
CAM_3.1V
DATA_OUT
REG_3.1V
SJIG_RST
REG-CCD
L161
NQL38DK-100X
TO REAR
(CN6001)
CN103
QGF0508F1-45X
0.5mm_FPC_BOTTOM
1 BL_POWER
2 UNREGCHK
3 I_MTR
4 V_BATT
5 REG_2.5V
6 REG_2.5V
7 CLK_OUT
8 AL_3.1V
9 AL_3.1V
10 REG_CS
11 DRV_3.3V
12 DRV_3.3V
13 DRV_3.3V
14 DC_CHEK
15 REG_1.2V
16 REG_1.2V
17 REG_1.2V
18 D_BATT
19 GND
20 GND
21 GND
22 GND
23 GND
24 GND
25 GND
26 GND
27 GND
28 T_BATT
29 REG_1.5V
30 REG_1.5V
31 REG_1.5V
32 ADP_L
33 REG_4.8V
34 REG_4.8V
35 REG_4.8V
36
CHRG_EVR
37
CAM_3.1V
38
CAM_3.1V
39
DATA_OUT
40
REG_3.1V
41
REG_3.1V
42
REG_3.1V
43
SJIG_RST
44
REG-CCD
45
KEY_BKEY_B
ONS".
y10558001a_rev0.1
(No.YF109)2-6
G
1
MAIN(SUB CPU) SCHEMATIC DIAGRAM
MAIN(SUB CPU)
10
L1001
R1063
2.2K
R1064 1k
2.2K
R1003
NQR0129-002x
L1002
47k
DC_CHEK
CHRG_EVR
R1005
R1004
UNREGCHK
ZGH_THRU
ZGH_OUT
10u
REG_CS
2.2K
DBATT
V_BATT
T_BATT
I_MTR
ADP_L
SBD5
SBT5
R1009
680
C1004
T
C1005
0.1
Q1003
DTA124EE-X
10/6.3
IC1003
S-80827CNNB-G-W
AUDIO_CS
3AAZEROG
PS_ZEROG
34
R1016
ANA_CLK
ANA_OUT
LCD_CS
LCD_CTL
ANA_CLK
ANA_OUT
L_MUTE
A_MUTE
PD_L
CHRGLED
R1001
100k
1
OUT2DET
C1025
0.1
VSS
2.2k
Q1002
2SC4617/QR/-X
R1055
10k
R1056
4.7k
TO MAIN IF
(CN101)
TO MAIN IF
(CN103,110)
TO MAIN IF(CN103)
TO MAIN IF(CN103)
TO MAIN IF(CN103)
TO MAIN IF
(CN110)
TO MAIN IF
(CN101,CN103,CN110)
TO MAIN IF
(CN110)
TO MAIN IF(CN103)
TO MAIN IF(CN101),
AUDIO,V I/O
TO MAIN IF
(CN101)
TO MAIN IF(CN101),
AUDIO,V I/O
TO AUDIO
TO MAIN IF
(CN101)
TO MAIN IF(IC121)
LIT_3V
REG_3.1V
AL_3.1V
D_BATT
V_BATT
T_BATT
I_MTR
DC_CHEK
ADP_L
CHRG_EVR
REG_CS
CLK_OUT
UNREGCHK
SBD5
SBT5
ZGH_THRU
ZGH_OUT
SJIG_RST
SJIG_RX
SJIG_TX
WORD
DATA_OUT
ANA_CLK
ANA_OUT
LCD_CS
LCD_CTL
ANA_CLK
ANA_OUT
AUDIO_CS
L_MUTE
A_MUTE
PD_L
BUZZER
CHRG_LED
3AAZEROG
PS_ZEROG
GND
1
CS
2
CLK
3
SIO
R1014
OPEN
Q1004
2SC5658/
QRS/-X
Q1001
DTC124EE-X
IC1002
RS5C314-X
D1002
1SS376-X
R1053
150k
D1003
OPEN
8
VDD
NAX0564-001X
7
XIN
X1002
6
XOUT
INTR4VSS
R1006
4.7k
R1054
47k
5
123
IC1004
SN74AHC1G08DC-X
74AHC1G08GW-X
0.1
C1026
45
IC1005
SN74AHC1G04DC-X
74AHC1G04GW-X
R1051
2.7k
R1052
18k
C1031
1
R1007
3
1
C1006
8p
4.7k
D1001
DA221-X
45
123
2
ANA_CLK
EEPRM_CS
SCPU_SO
SCPU_SI
SCPU_SCK
SCPU_CS
REG_CS
OSD_CS
EEPRM_DI
EEPRM_DO
EEPRM_CK
ANA_CS
ANA_RST
TG2_RST
LCD_CS
LCDRVS
PSCTL
C1046
FLSH_RST
27
FLSH_RST
DBATT
TL1088
95
49
KENTO
D_BATT
S_DET31DIAL_PB32DIAL_OFF
89
DIAL_REC
30 5
88
P_DET
CHRG_EVR35DC_CHEK42MODE_SW/P_MEDIA12WORD82RESET
ANA_IN
ANA_OUT
R1036
OPEN
71
70
55
56
97 EEP_CS
51 SCPU_IN
52 SCPU_OUT
50 SCPU_CLK
68 DATA_IN
69 DATA_OUT
67 CLK_OUT
79 SCPU_CS
22 VDD
28 RTC_CS
1 REG_CS
39 OSD_CS
14 EEP_IN
15 EEP_OUT
13 EEP_CLK
9 ANA_CS
93 BZ_FREQ
94 BZ_ENV
90 ANA_RST
10 SYTG_RST
2 LCD_CS
17
VDD
6 LCD_RVS
84 PS_CTL
72
ANA_IN
ANA_OUT
LCD_BL
91
ANA_CLK
RXD
TXD
OPEN
R1015
C1044
0.01
0.1
PDET
SBT5
SBD5
73
74
SBT5
SBD5
IC100
MN102H60
TO MAIN IF(CN101)
TO MAIN IF(CN104)
TO MAIN IF
(CN101)
TO MAIN IF
(CN103)
TO MAIN IF
(CN101)
TO MAIN IF(RMC)
LCD_OPEN
LCD_RVS
ACES_LED
PLAY_SW
POFF_SW
REC_SW
P_MEDIA
SET_SW
ZOOM_SW
KEY_A
KEY_B
KEY_C
INFO_SW
IR_RMC
R1017
R1018
R1020
R1022
R1023
R1024
R1025
R1019
R1028
R1029
R1030
R1031
R1008
R1057 100k
R1058 100k
1k
1k
1K
1k
1k
1k
1k
1k
1k
1k
1k
1k
1K
R1083 100k
R1082 100k
R1061 100k
MONI_SW
LCDRVS
ACESLED
DIAL_PB
DIAL_OFF
DIAL_REC
PMEDIA
SETSW
ZOOMSW
KEY_ACH
KEY_BCH
KEY_CCH
INFOSW
IR_RMC
LCD_CTL
PMEDIA
DC_CHEK
CHRG_EVR
DIAL_REC
DIAL_OFF
DIAL_PB
SDET
R1059 100k
R1060 100k
R1062 100k
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-7(No.YF109)
R1072
R1073
R1074
82k
100k
R1075
62k
100k
R1076
OUT5VDD
C1034 0.01
IC1007
[-]2VSS3[+]
TC75S56FU-X
1
R1077
1M
R1070 100k
R1069 100k
4
10k
T_BATT
SBT5
SBD5
25
92
73
74
VSS
SBT5
SBD5
IC1001
MN102H60GJA
MODE_SW/P_MEDIA12WORD82RESET19VSS20XI21XO24OSCO23OSCI40AUDIO_CS86A_MUTE87RESERVED
42
MODE
ZGH_OUT
100
ZGH_OUT
AVREF_OF
PS_ZEROG
98
99
PS_ZEROG
AVREF_OF
37
18
RESERVED
TL1031
ZGH_THRU
11
ZDH_THRU
RESERVED
BATT_H
SYSSEL0
SYSSEL1
R1085 0R0
R1084 0R0
8
RESERVED
V27_OUT
59
7
RESERVED
SETSW
57
SET_SW
V27_OUT
C1043
34
66
61
VDD
AVSS
AVDD
L_MUTE4FAN_CTL241PD_L3FAN_CTL1
85
0.01
43
S
D
54
VREF-
R1046
OPEN
3
Q1005
1
2SJ347-X
0.01
C1045
VREF+
UNREGCHK
R1037
TO MAIN IF(CN101)
1k
AVREF_OF
G
2
C1013 0.01
C1015 0.01
C1020 0.01
C1017 0.01
C1014 0.01
C1018 0.01
45I_MTR
46KEY_C
64KEY_B
63KEY_A
47ZOOM_SW
62
44T_BATT
65V_BATT
96RTC_INT
48NT_PAL
16AFE_RST
29DSP_RST
26ZEROG_H
81CHRGLED
60ACESLED
58REMOTE
C1001
0.1
83VDD
533AAZEROG
77ZEROZINT
78OSD_VD
36ADP_L
80BATT_H
33LCD_OPEN
38INFO_SW
76JLIP_INT
75NMI
C1008 0.01
C1016 0.01
R1086
0R0
R1066 1k
R1065
I_MTR
KEY_CCH
KEY_BCH
KEY_ACH
ZOOMSW
UNREGCHK
T_BATT
1k
V_BATT
R1043
100k
TVSEL
ZEROG_H
CHRGLED
ACESLED
IR_RMC
OSD_CS
3AAZEROG
ADP_L
BATT_H
MONI_SW
INFOSW
R1068
R1071
100k
100k
PDET
SDET
SYSSEL0
SYSSEL1
TVSEL
SCPU_CS
SCPU_SCK
SCPU_SO
SCPU_SI
EEPRM_CS
EEPRM_CK
EEPRM_DO
EEPRM_DI
V27_OUT
TG2_RST
FLSH_RST
R1045
1k
ANA_RST
ANA_CS
ANA_CLK
ANA_OUT
ANA_IN
PSCTL
P_DET
S_DET
TO P.PRCS
SYSSEL0
SYSSEL1
TVSEL
SCPU_CS
SCPU_SCK
SCPU_SO
SCPU_SI
EEPRM_CS
EEPRM_CK
EEPRM_DO
EEPRM_DI
AFE_RST
V27_OUT
TO TG133
TG2_RST
TO DSP MEM
FLSH_RST
TO DSP
ZEROG_H
TO V I/O,DSP
DSP_RST
TO V I/O
OSD_CS
OSD_VD
TO V I/O
ANA_RST
ANA_CS
ANA_CLK
ANA_OUT
ANA_IN
PSCTL
TO MAIN IF
(CN101),
V I/O,
AUDIO
TO V I/O
PMEDIA
ONS".
X1001
NAX0784-001X
123
PD_L
A_MUTE
AUDIO_CS
L_MUTE
y10563001a_rev0.1
(No.YF109)2-8
MAIN(AUDIO) SCHEMATIC DIAGRAM
MAIN(AUDIO)
10
Q2401
2SC4617/QR/-X
R2401
4.7k
TO INT MIC
(CN107)
INT_R
INT_GND
INT_GND
INT_L
L2603
NQR0269-013X
L2602
NQR0269-013X
L2601
NQR0269-013X
C2602
OPEN
C2601
OPEN
R2602
2.2k
R2601
2.2k
C2401
10/6.3
R2408
OPEN
T
R2202
560k
0.1
0.1
C2224
1
1
C2202
C2405
0.1
31
32
AVDD
VCOM
IC2201
AK4660VQ
39k
36
BEEP1
SPK+2MUTE3SPK-4PDN5SVDD6SGND7BCLK18MCLK19LRCK110CDTI
1
C2203
150k
1
R2204
33
34
35
MIN
BEEP2
MOUT
1
C2204
C2205
28
29
30
AGND
HVCM
MUTET
27
HVDD
C2612
C2611
C2223
R2203
C2624
10p
R2610
22k
0.022
R2609
22k
C2623
10p
37 PREOR
38 PRENR
39 EXTR
40 INTR
41 MGND
42 MVDD
43 MPWR
44 MRF
45 INTL
46 EXTL
47 PRENL
48 PREOL
R2608
1
2.2k
C2656
0.047
C2606
0.0047
C2605
0.0047
R2607
1
2.2k
C2613
C2604
1
C2603
0.022
C2655
0.047
TO SPEAKER
(CN109)
SPK+
SPK-
R2212
R2213
2.7
C2218
0.1
C2403
10/6.3
2.7
C2217
0.1
C2235
C2233
OPEN
OPEN
L2402
T
10u
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-9(No.YF109)
Q2403
2
2SC4617/QR/-X
R2402
4.7k
L2401
10u
REG_4.8V
REG_3.1V
GND
R2233
560k
R2234
C2402
10/6.3
560k
T
5
36
14
2
Q2202
UMX18N-W
R2235
3.3k
R2241
100k
TO P.PRCS
S_SHUT
TO MAIN IF(CN101)
AU_SIG/R
AU_SIG/L
TO MPEG2
AIBD
AOBD
AIOLRCK
AOMCLK
AIOBCK
C2404
10/6.3
1
C2205
25
26
27
28
9
HPL
HPR
MUTET
HVDD
C2214
24RIN1
23ROUT1
22LIN1
21LOUT1
20DVSS
19DVDD
18LRCK2
17MCLK2
16BCLK2
15SDTI2
14SDTO1/SDTO2
13SDTI1
1
C2210
C2213
C2209
T
C2406
10/6.3
R2217
C2229
OPEN
R2207
1
33k
1
R2206
1
10
R2407
33k
10
R2209
HVCM
MCLK19LRCK110CDTI11CSN12CCLK
8
22k
R2208
22k
R2403
18k
T
R2211
820
R2210
820
C2233
OPEN
02
u
ONS".
y20385001a_rev0.1
TO SUB CPU
BUZZER
TO MAIN IF(CN101),
ANA_CLK
SUB CPU,V I/O
AUDIO_CS
TO SUB CPU
TO MAIN IF(CN101),
ANA_OUT
SUB CPU,V I/O
L_MUTE
PD_L
TO SUB CPU
A_MUTE
(No.YF109)2-10
7
N
1
1
N
MAIN(MPEG2) SCHEMATIC DIAGRAM
TO P.PRCS
CLK27B
R3039
0Ω
R3030
R3029
4.7k
4.7k
R303
OPE
R303
OPE
TO MAIN IF(CN103),
V I/O,DSP MEM
TO MAIN IF(CN103),
P.PRCS
TO V I/O,DSP
TO DSP
MPEG_RST
PLLSTOP
REG_3.1V
REG_2.5V
REG_1.5V
TO V I/O
MPGFLD
MPGHSYNC
MPGVSYNC
TO DSP
DV1IN0
DV1IN1
DV1IN2
DV1IN3
DV1IN4
DV1IN5
DV1IN6
DV1IN7
DV1CLKIN
XVOEN
DV2CKOUT
R3034 4.7k
182
110
GPIO0
GPIO133GPIO2
[OPEN]
SIREQ23SICLK/SISTB
174
R3033 4.7k
114
37
NDI/JTDI
NDO/JTDO
[4.7kPup]
[4.7kPup]
[GND]
[GND]
SISYNC27SIVLD
173
R3031 4.7k
R3032 47k
115
116
NCLK/JTCLK
XNRST/XJTRST
[4.7kPup]
[4.7kPup]
[47kPup]
[GND]
[GND]
SI0
101
172
209
38
JMOD
NMOD/JTMS
[GND]
[GND]
SI124SI2
102
PSTOP
[GND]
SI325SI4
42
72
210
PWM
STCLK
PCICLK
[GND]
[GND]
[GND]
[GND]
SI526SI6
103
C3014
C3013
C3016
C3015
0.1
0.01
232
226
224
158
156
255
262
268
VDD1
VI477VI5
150
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
[GND]
[GND]
[GND]
VI678VI7
VIHSYNC
VIVSYNC74VIFLD/VIVLD
VICLK67VO0
151
211
148
152
217 VDDR
273 VDDR
219 VDDR
221 VDDR
222 VDDR
225 VDDR
227 VDDR
230 VDDR
169 VDDR
199 VDDH
256 VDDH
254 VDDH
252 VDDH
248 VDDH
246 VDDH
249 GND
61 GND
62 GND
201 GND
202 GND
214 GND
215 GND
263 GND
267 GND
236 GND
231 GND
180 GND
184 GND
181 GND
260 GND
266 GND
258 GND
218 GND
223 GND
250 GND
229 GND
244 GND
238 GND
235 GND
272 GND
155 GND
220 GND
160 GND
163 GND
228 GND
168 GND
170 GND
259 GND
200 GND
257 GND
253 GND
185 GND
208 GND
71 GND
79 GND
212 GND
178 GND
147 PVDD
73 PVDD
146 PGND
145 PGND
183 CSCLK
40 CSDI
41 CSDO
[10kPup]
[10kPup]
[OPEN]
0.1
271
216
265
VDD1
VDD1
VDD1
VI075VI1
VI276VI3
213
149
L3001
NQR0129-002X
C3002
OPEN
[2125]
L3002
NQR0154-003X
C3001
OPEN
[2125]
C3005
0.1
C3006
0.01
C3003
OPEN
NQR0006-001X
R3047
0Ω
L3005
[2125]
C3004
10/6.3
T
GND
MPGFLD
MPGHSYNC
MPGVSYNC
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
RA3001
100
RA3002
100
R3040 100
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
VO0
1
8
VO1
2
7
VO2
3
6
VO3
4
5
VO4
1
8
VO5
2
7
VO6
3
6
VO7
4
5
VOCLK
XVOEN
C3007
C3008
0.01
0.1
C3009
R3001
R3002
0.1
10k
10k
C3012
0.01
0.1
264
269
270
198
247
251
242
239
234
171
VDD1
VDD1
VDD1
VO168VO2
206
207
VDD3
VDD3
VDD3
VDD1
VDD1
VDD1
VDD1
VO3
VO469VO5
VO670VO7
VOCLK66XVOEN
142
143
141
C3011
0.01
261
VDD3
[10kPup]
VOHSYNC
140
233
VDD3
[10kPup]
VOVSYNC
205
C3010
0.1
10k
R3035
R3036 10k
179
111
112
243
241
240
237
VDD3
VDD3
VDD3
VDD3
GPIO334GPIO4
GPIO5
IC3001
UPD61152F1-A03
[10kPup]
[10kPup]
[GND]
[10kPup]
AILRCK
AIBCK65AIBD
AIOLRCK64AIOBCK
AIOBD
ATX
138
204
0Ω
0Ω
AIMCLK63AOMCLK
203
137
136
139
0Ω
R3010
R3011
R3006
R3042 10
R304310R3044 10
R3045 10
TL3001
10k
R3007 10k
R3008 10k
R3009
TO AUDIO
AIOLRCK
AIOBCK
AOBD
AOMCLK
VO0
VO1
VO2
VO3
VO4
VO5
VO6
VO7
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
MPGHSYNC
MPGVSYNC
MPGFLD
AIBD
VOCLK
R3003
XVOEN
R3004
10k
10k
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-11(No.YF109)
R3030
R3032 47k
R3029
4.7k
4.7k
R3038
OPEN
R3037
OPEN
R3031 4.7k
42
72
210
209
38
115
116
114
PWM
JMOD
STCLK
PSTOP
NMOD/JTMS
NCLK/JTCLK
XNRST/XJTRST
[4.7kPup]
[4.7kPup]
[47kPup]
[GND]
[GND]
[GND]
[GND]
[GND]
[GND]
[GND]
SIVLD
SI0
SI124SI2
SI325SI4
27
SI526SI6
101
172
102
103
R3027 10k
R3028 10k
117
134
186
XPME
PCICLK
XCLKRUN
[OPEN]
[GND]
[10kPup]
[GND]
[GND]
[GND]
SI732XSOREQ28SOCLK/SOSTB31SOSYNC
104
43
XGNT
[10kPup]
[OPEN]
C3018
121
189
XREQ
IDSEL
[GND]
[OPEN]
[OPEN]
[OPEN]
SOVLD/SORDY
109
175
OPEN
R3026 10k
[10kPup]
R3041
192
XCBE3
[OPEN]
SO0
106
0Ω
R3025 10k
XCBE2
[10kPup]
[OPEN]
SO129SO2
195
R3024 10k
R3023 10k
56
XCBE1
[10kPup]
[OPEN]
107
144
XCBE0
[10kPup]
[OPEN]
SO330SO4
R3022 10k
127
XRESET
[OPEN]
177
CB16
[Pup]
SO5
245
[OPEN]
108
0Ω
R3020
XCINT
SO6
194
[OPEN]
176
R3016 10k
R3017 10k
126
XCACK1
[OPEN]
SO7
105
XCREQ1
[OPEN]
XSOEN86MA08MA187MA2
R3018 OPEN
193
R3019 OPEN
51
XCACK0
52
XCREQ0
125
XCWAIT
159
50
XCRE
MA389MA4
39
XCWE
161
R3021
4.7k
128
XCCS
MA511MA690MA7
196
CD1453CD15
CD13
MA812MA99MA1091MA11
162
C3017 OPEN
129
55
CD10
CD1154CD12
130CD9
197CD8
131CD7
57CD6
58CD5
132CD4
59CD3
133CD2
60CD1
135CD0
118CA15
187CA14
44CA13
119CA12
45CA11
188CA10
120CA9
46CA8
47CA7
122CA6
48CA5
190CA4
123CA3
191CA2
49CA1
124CA0
36HMODE2
113HMODE1
35HMODE0
94MDQM
15MWE
164MCAS
93MRAS
92MCS
13MCLKE
14MCLK
7MD31
85MD30
157MD29
6MD28
84MD27
5MD26
83MD25
4MD24
81MD23
80MD22
1MD21
2MD20
154MD19
153MD18
3MD17
82MD16
100MD15
22MD14
99MD13
21MD12
20MD11
98MD10
19MD9
97MD8
16MD7
165MD6
95MD5
17MD4
166MD3
96MD2
18MD1
167MD0
10MA13
88MA12
R3013 100
MDQM
XMWE
XMCAS
XMRAS
XMCS
MMCLKE
MMCLK
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MA13
MA12
C3022
C3023
0.01
0.001
0.1
46 VDD
75 DQO
5 VDDQ
58 DQ1
90 DQ2
3 VSSQ
73 DQ3
89 DQ4
11 VDDQ
72 DQ5
57 DQ6
4 VSSQ
71 DQ7
56 VDD
85 DQMO
70 WE_
55 CAS_
84 RAS_
69 CS_
54 BA0
68 BA1
52 A10/AP
67 A0
82 A1
51 A2
36 A3
60 VDD
81 VDD
65 DQ16
29 VDDQ
49 DQ17
64 DQ18
32 VSSQ
77 DQ19
63 DQ20
59 VDDQ
76 DQ21
48 DQ22
44 VSSQ
61 DQ23
87 VDDQ
66 DQM2
40 NC
50 NC
88 VDDQ 86VSSQ
TL3002
MD0
C3020
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MDQM
TL3003
XMWE
TL3004
XMCAS
TL3005
XMRAS
TL3006
XMCS
TL3007
MA13
MA12
TL3008
MA10
TL3009
MA0
MA1
MA2
MA3
MD9
MD8
MD7
MD16
MD6
MD5
MD17
MD4
MD18
MD3
MD19
MD2
MD20
MD1
MD0
MD21
MD22
MD23
MDQM
MAIN(MPEG2)
10
0Ω
R3014
R3015
0Ω
IC3002
K4S28323LF-HN75
6VSS
30DQ15
12VSSQ
43DQ14
15DQ13
17VDDQ
28DQ12
14DQ11
13VSSQ
27DQ10
42DQ9
47VDDQ
26DQ8
31VSS
25NC
10DQM1
9CLK
24CKE
38NC
83A11
39A9
23A8
8A7
37A6
22A5
7A4
45VSS
41VSS
20DQ31
62VSSQ
34DQ30
19DQ29
78VDDQ
2DQ28
18DQ27
74VSSQ
1DQ26
33DQ25
79VDDQ
16DQ24
80VSSQ
35NC
21DQM3
53NC
C3021 0.1
C3024 0.01
MD15
MD14
MD13
MD12
MD11
MD10
MDQM
MMCLK
MMCLKE
MA11
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MDQM
TO DSP
XCINT
XCACK
TO P.PRCS
XCREQ
TO DSP,P.PRCS
XPMWAIT
XPMOE
TO P.PRCS,DSP,DSP MEM
XPMWE
XPMCS0
TO DSP
PMD15
PMD14
PMD13
PMD12
PMD11
PMD10
PMD9
TO DSP,DSP MEM,P.PRCS
PMD8
PMD7
PMD6
PMD5
PMD4
PMD3
PMD2
PMD1
PMD0
PMA15
PMA14
TO DSP,DSP MEM
PMA13
PMA12
PMA11
PMA10
PMA9
PMA8
PMA7
PMA6
TO DSP,DSP MEM,P.PRCS
PMA5
PMA4
PMA3
PMA2
PMA1
PMA0
TO DSP,P.PRCS
MD9
MD8
MA9
MA8
MA7
MA6
MA5
MA4
ONS".
R3012
10k
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
L3006
OPEN
C3019
47/4
T
IC 3002
L 3007
R 3047
RA
C
L3007
NQR0129-002X
VACANT NO.LAST NO.
3003,3004
3005,3046
3002
3024
[128M FBGA]
y10562001a_rev0.1
(No.YF109)2-12
C3216 0 1
MAIN(V I/O) SCHEMATIC DIAGRAM
TO DSP
DV2OUT0
DV2OUT1
DV2OUT2
DV2OUT3
DV2OUT4
DV2OUT5
DV2OUT6
DV2OUT7
TO MPEG2, DSP
TO MAIN IF(CN101),
SUB CPU,AUDIO
TO SUB CPU
TO SUB CPU,DSP
TO SUB CPU
DV2CKOUT
TO MPEG2
MPGFLD
MPGVSYNC
MPGHSYNC
TO P.PRCS
OUTV2
TO SUB CPU
ANA_RST
ANA_IN
ANA_OUT
ANA_CLK
ANA_CS
OSD_CS
OSD_VD
DSP_RST
PSCTL
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
IC3202
MB90099PFV137EX
1 SCLK
20
HD
2CS
19
VD
18
3SIN
VC0
17
4 RST
VC1
16
5 VDD
VC2
15
6 SDR
7NC
8 EXD
9 TEST
10 GND
BLKA
14
VC3
13
BLKB
12
TSTO
11
BLKC
C3219
0.1
R3220
0Ω
0.01
C3218
46
157
129
158
47
92
48
93
130
49
131
50
159
132
96
160
176
177
178
179
180
NC2
NC2
NC2
NC2
NC2
VCCQ
NC126NC127NC128NC1
106
VDD(I/O)
107
VDD(I/O)
CSYNC
SCANMODE65SCANEN16ADDATEST
140
TL3203
1 NC1
2 NC1
13 NC1
14 NC1
TL3201
54 VSS
0Ω
3 RST
97 CSO0
55 CSO1
133 CSO2
99 CSO3
4 YSO0
98 YSO1
134 YSO2
56 YSO3
5 VDD(I/O)
100 OUTH
135 OUTV
6 OUTH2
57 OUTV2
(L:OUTV,OUTH=HiZ)
101 ZCNT
0Ω
7 SDOUT
58 VDD(CORE)
102 VSS
136 CLK
0Ω
8 SDIN
0Ω
59 SCLK
0Ω
103 CS
9 VC0
60 VC1
137 VC2
104 VC3
10 BLK1
61 BLK2
138 BLK3
11 HDOUT
62 VDOUT
105 CLKOSD
139 HDCVF
12 VDCVF
63 VSS
161 NC2
162 NC2
163 NC2
164 NC2
165 NC2
15
1
8
2
7
3
6
RA3201
10
4
5
1
8
2
7
RA3202
3
6
10
4
5
R3209
0Ω
R3201
C3201 0.01
R3202
0Ω
TL3202
R3203
0Ω
R3204
C3202 0.01
R3205
R3206
R3207
R3208 100
YSI651YSI7
VSSQ
VCC66IPTEST17VDD(I/O)
141
C3203 0.01
YSI495YSI5
VCCQ
HRP167HRP218VDD(CORE)
108
C3204 0.01
YSI294YSI3
VSSQ
WYSI0
142
109
YSI0
YSI1
VDD(CORE)
WYSI119WYSI268WYSI3
VSS
IC3201
MONI1
143
VCC
JCP8075
MONI220VDD(CORE)69VSS
110
VDD(I/O)
VSS
VDD(CORE)
WCLK21WCSI070WCSI1
144
0.1C3217
87
124
125
155
43
126
89
44
127
156
90
128
91
INV
INH
WCSI271WCSI322WINV
111
VSS
CSI4
CSI5
CSI645CSI7
VSSQ
VDD(CORE)
WINH
SDR_ONH23VDD(I/O)
VSS72VDD(CORE)25RESVD24RESHD73AMUTE
112
145
146
C3205 0.1
VDD(I/O)
0Ω
R3210
VCCQ
0Ω
R3211
CSI042CSI1
CSI288CSI3
VSSQ
SCANI1
SCANI274VSS
113
114
L3201
NQR0129-002X
C3220
4.7
R3221
C3227
IC3204
R1100D251C-X
VOUT2VDD3GND
1
C3225
1
1
R3222
33
[1608]
100
Q3202
2SC4617/QR/-X
L3203
SHORT
C3224
1
SYMBOL NO. 3201~
LAST NO.
IC 3204
Q 3202
3206
L
3222
R
3202
RA
C
3230
VACANT NO.
3203
3202,3204,3205
3221Ω3223,3226,3228,3229
SYMBOL NO. 3701~
LAST NO.
IC 3701
3701
Q
L 3702
3707
C
3710
VACANT NO.
3701R
TO MAIN IF,
TG133(CN105)
TO MAIN IF(CN103),
MPEG2,DSP MEM
TO OP DRV
ASPECT
REG+CCD
REG_4.8V
REG_3.1V
REG_2.5V
GND
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-13(No.YF109)
SYMBOL NO. 7801
LAST NO.
Q 7803
L
R
C
7801
7817
7806
N
(
155
43
126
CSI4
VCCQ
VDD(I/O)
VSS72VDD(CORE)25RESVD24RESHD73AMUTE
146
0Ω
0Ω
R3211
R3210
MAIN(V I/O)
10
C3216 0.1
53
154
87
124
125
CSI288CSI3
VSSQ
SCANI1
113
114
SCANI274VSS
NC164NC175NC186NC1
CSI042CSI1
VCCQ
NC2
NC2
166
167
175NC2
174NC2
173NC2
172NC2
171NC2
85VSS
38VSS(8AD)
123VDD(8AD)
C3215
OPEN
84CIN
37VRH
153VRL
122VRM
36VDD(8AD)
83VSS(8AD)
121VYIN
82CLPY
35IREF1
152YCOUT
120ABAR1
34COMP1
81YSOUT
151VREF1
80VSS(10DA)
33VDD(10DA)
119NC
150NC
32NC
79NC
118VSS(8DA)
149VDD(8DA)
31IREF2
78CROUT
117ABAR2
148COMP2
77CBOUT
116VREF2
147COUT
115VDD(8DA)
30VSS(8DA)
29SCANI3
76VDD(CORE)
52NC1
41NC1
40NC1
39NC2
NC2
NC2
NC2
168
169
170
C3212 SHORT
R3215 2.7k
C3211 1
C3210 0.1
C3209 0.1
C3208 1
R3212
18k
_0.5%
R3214
_0.5%
C3214
OPEN
C3213
OPEN
2.7k
C3207
R3213
_0.5%
_0.5%
0.01
C3206
0.1
12k
R3218
1.5k
2635
R3216
820
_0.5%
R3219
1.5k
Q3201
UMT1N-W
41
R3217
_0.5%
C3707
C3706
1
0.01
C3708
1
6
7
820
L3701
10µ
L3702
10µ
C3701
10/6.3
T
C3709
10/6.3
T
8
GND
C3702
IC3701
LA73076V-X
2.2
C3703
Y-IN
RIP-FIL
-VCC10ND9CLK-OUT
12
11
4.7
5
C-IN
VCC_NVG
C3704
0.1
4
C-MUTE-CTL
R3707
3
C-OUT
2
2.2k
C3710
0.1
2
13
P-SAV-CTL
46
R3706
1.2k
1
S_CTL
A-GND15Y-OUT14VCC_A13MIX-OUT
16
5
Q3701
BC847PN-X
C3705
R3704
0.01
68
_0.5%
R3705
R3703
R3702
10k
68
_0.5%
68
_0.5%
TO MAIN IF(CN101)
C_OUT
Y_OUT
V_OUT
C3204
100D251C-X
VDD3GND
2
5
ONS".
SYMBOL NO. 7801~
Q 7803
7801
L
7817
7806
C
L7851
L7801
SHORT
C7801
OPEN
L3206
SHORT
7806,7811,7816R
C3230
OPEN
[1608]
VACANT NO.LAST NO.
SYMBOL NO. 7851~
LAST NO.
L
7851
7859
C
7852 7851
7852,7855,7858R
VACANT NO.
C7802
1/16
R7801
R7802
8.2k
R7805
12k
_0.5% _0.5%
36k
2145
R7804
2.2k
_0.5%
R7803
620
_0.5%
36
Q7801
UMX1N-W
C7804
1/16
R7807
8.2k
R7810
12k
2145
R7809
2.2k
_0.5%
R7808
620
_0.5%
36
Q7802
UMX1N-W
C7805
1/16
R7812
8.2k
C7803
1
R7815
12k
_0.5%
2145
R7814
2.2k
_0.5%
R7813
620
_0.5%
36
R7817
8.2k
C7806
SHORT
Q7803
UMX1N-W
1/16
C7852
0.01
R7854
R7851
33k
33k
_0.5%
_0.5%
R7856
R7853
36k
36k
_0.5%
_0.5%
y10564001a_rev0.1
R7857
33k
_0.5%
R7859
36k
_0.5%
TO MAIN IF
(CN101,110)
MON_G
MON_R
MON_B
HRP
VDCVF
HDCVF
TO MAIN IF
(CN101)
(No.YF109)2-14
SDR A3
L
S
N
MAIN(DSP) SCHEMATIC DIAGRAM
TO P.PRCS
TO MAIN IF(CN102)
TO MPEG2
PLLSTOP
SSGFLD
TO MPEG2
MPEG_RST
XCFWAIT
CFRESET
CFRDY
XCFIOWR
XCFIORD
CFD10
CFD11
CFD12
CFD13
CFD14
CFD15
XCFCE0
XCFCE1
CFBVD1
CFBVD2
SDR_DQ12
SDR_DQ9
SDR_DQ10
240
287
SDRAM_D10
SDR_DQ10
SDR_DQ11
SDR_DQ8
185
SDRAM_D8
SDRAM_D9
SDR_DQ9
SDR_DQ7
SDR_DQ6
51
122
SDRAM_D7
TO DSP MEM
SDR_DQ7
SDR_DQ8
SDR_DQ4
SDR_DQ5
241
288
SDRAM_D5
SDRAM_D6
SDR_DQ6
SDR_DQ5
SDR_DQ4
SDR_DQ3
SDR_DQ2
123
186
SDRAM_D2
SDRAM_D3
SDRAM_D4
SDRAM Interface
SDR_DQ3
SDR_DQ1
SDR_DQ0
289
SDR_DQ2
SDR_DQ1
SDR_DQM3
231
DQM3
SDRAM_D052SDRAM_D1
SDR_DQ0
SDR_DQM2
SDR_DQM1
112
SDR_DQM2
SDR_DQM3
SDR_DQM0
175
DQM0
DQM141DQM2
SDR_DQM1
SDR_WE
SDR_CAS
279
42
XMWE
SDR_DQM0
SDR_WE
SDR_CS0
SDR_RAS
40
232
XRAS
XCAS
SDR_CAS
SDR_RAS
SDR_BA1
176
XMCS0
SDRAMBS1
SDR_CS0
SDR_BA0
113
SDRAMBS0
SDR_BA1
R4038
R4039
50
SDRAMCLKR
SDR_BA0
SDR_A12
SDR_CLK
82
47
235
49
SDRAMCLK
SDR_A12
SDR_CKE
SDR_CLK
SDR_A11
SDR_A10
45
282
SDRAM_A10
SDRAM_A11
SDRAM_A12
SDR_A9
116
SDR_A10
SDR_A11
SDR_A8
179
SDRAM_A8
SDRAM_A9
SDR_A9
SDR_A8
SDR_A7
SDR_A6
SDR_A5
SDR_A4
TO MPEG2
TO P.PRCS
TO MAIN IF
(CN110)
TO P.PRCS
PPRO6
AFED6
PPRO0
PPRO2
PPRO1
PPRO4
PPRO3
PPRO5
SDR_CKE
TL4020
37
300
255
202
141
256
AFED0
AFED1
AFED2
AFED372AFED4
AFED5
SDR_DQ31
180
MCKE
SDRAM_D31
SDR_DQ30
117
SDRAM_D30
SDR_DQ30
SDR_DQ31
SDR_DQ29
SDR_DQ28
283
46
SDRAM_D28
SDRAM_D29
SDR_DQ29
SDR_DQ27
181
236
SDRAM_D27
SDR_DQ28
SDR_DQ27
SDR_DQ26
SDR_DQ25
118
SDRAM_D25
SDRAM_D26
SDR_DQ26
SDR_DQ25
SDR_DQ24
SDR_DQ23
SDR_DQ22
237
284
47
SDRAM_D23
SDRAM_D24
IC4001
SIP1280ISD-DVA2
SDR_DQ23
SDR_DQ22
SDR_DQ24
SDR_DQ21
SDR_DQ20
119
182
SDRAM_D20
SDRAM_D21
SDRAM_D22
SDR_DQ21
SDR_DQ19
SDR_DQ18
285
48
SDRAM_D19
SDR_DQ20
SDR_DQ19
SDR_DQ17
SDR_DQ16
183
238
SDRAM_D17
SDRAM_D18
SDR_DQ18
SDR_DQ17
SDR_DQ15
SDR_DQ14
239
286
SDRAM_D15
SDRAM_D16
SDR_DQ16
SDR_DQ15
SDR_DQ13
SDR_DQ12
121
184
SDRAM_D13
SDRAM_D14
SDR_DQ14
SDR_DQ13
SDR_DQ11
326
SDRAM_D11
SDRAM_D12
PPRO10
VCLK
VDCPU
MOD0
SOF
TL4023
TL4022
TL4021
71
140
201
GPIO677GPIO275GPIO3
AFESOF
DV1 ITU-R601 16bit OUT
VLD_PIX
0Ω
0Ω
R4041
R4040
254
299
AFECLK
AFEVPIX
3CCDCLK
AFE Parallel Interface
PPRO11
143
PPRO9
PPRO8
PPRO7
203
142
204
AFED773AFED8
AFED9
AFED1074AFED11
ID_LAT
PMINT
XCINT
R4043
47k
R4042
47k
144
2 GPIO7
298 GPIO26
139 GPIO28
200 GPIO25
253 GPIO27
70 GPIO29
132 CFWP
195 XCFWE
128 XCFWAIT
187 CFRESET
58 XCFREG
134 CFRDY
292 XCFOE
133 XCFIOWR
248 XCFIORD
242 CFCSEL
193 CFD0
246 CFD1
291 CFD2
62 CFD3
131 CFD4
192 CFD5
245 CFD6
290 CFD7
61 CFD8
130 CFD9
191 CFD10
244 CFD11
60 CFD12
129 CFD13
190 CFD14
59 CFD15
194 XCFCE0
247 XCFCE1
64 XCFCD1
293 XCFCD2
63 CFBVD1
57 CFBVD2
56 CFA0
127 CFA1
55 CFA2
126 CFA3
189 CFA4
54 CFA5
125 CFA6
188 CFA7
243 CFA8
53 CFA9
124 CFA10
226 PWM0
169 PWM1
276 PWM2
168 PWM3
145
GPIO4
GPIO5
AFE Serial
AFE SSG
NuCORE
/GPIO14
/GPIO55
/DVCLK
/GPIO15
/GPIO53
/GPIO52
/GPIO51
/GPIO(option)
/DVVSYNC
/DVHSYNC
/GPIO56
/GPIO57
/GPIO58
/GPIO59
/GPIO60
/GPIO61
/GPIO62
/GPIO63
/DVINOUTY0
/DVINOUTY1
/DVINOUTY2
/DVINOUTY3
/DVINOUTY4
/DVINOUTY5
/DVINOUTY6
/DVINOUTY7
/GPIO48
/GPIO49
/GPIO47
/DV_SOF
/GPIO46
/DVFIELD
/DVINOUTUV0
/DVINOUTUV1
/DVINOUTUV2
/DVINOUTUV3
/DVINOUTUV4
/DVINOUTUV5
/DVINOUTUV6
/DVINOUTUV7
/DVDACK
/DVUVSEL
/DVVLD
R4044
47k
R4045
0Ω
0Ω
R4046
TL4024
0Ω
R4047
R4048 47k
R4049 47k
R4050 22
R4051 22
R4052 47k
R4053 22
R4054 47k
R4055 47k
CFD0
CFD1
CFD2
CFD3
CFD4
CFD5
CFD6
CFD7
CFD8
CFD9
CFA0
CFA1
CFA2
R4056 220
R4057 220
R4058 220
R4059 220
R4060 220
R4061 220
R4062 220
R4063 220
R4064 220
R4065 220
R4066 220
R4067 220
R4068 220
R4069 220
R4070 220
R4071 220
R4072
R4073 22
R4074 47k
R4075 47k
R4076 22
R4077 22
R4078 22
TL4025
TL4026
TL4027
TL4028
TL4029
TL4030
TL4031
TL4032
TL4033
TL4034
TL4035
TL4036
22
TO TG133
CCD_CTL
R4079
47k
TL4037
R4080
86 GPIO31
13 NC3
89 NC4
214 GPIO39
R4001
100
DBETRST
DBETDO
MCLKIN44NC31AMBACLKIN
115
R4002
3.3k
TO SUB CPU,
Operating
Mode
XRESET15XRESETPERH12SCANE87TESTSCAN
217
TL4001
R4005
47k
C4034
0.1
V I/O
DSP_RST
TO SUB CPU
R4003
0Ω
XJRESET
ETM Minimum
TRACESYNC
157
153
R4006
47k
R4004
OPEN
PortSCANTEST
TRACECLK
DBGRQ
263
212
TO MPEG2,
DBQACK
PMA0
269
PMA0
P.PRCS
220
TL4002
PMA1
PMA298PMA325PMA4
163
PMA1
PMA2
PMA5
PMA6
PMA799PMA826PMA9
270
221
164
PMA3
PMA4
PMA7
PMA5
PMA8
PMA6
TO MPEG2,DSP MEM
P.PRCS
271
PMA9
PMA10
PMA11
222
165
PMA11
PMA10
TO MPEG2,
PMA12
PMA1327PMA14
100
PMA13
PMA12
DSP MEM
272
PMA14
PMA15
PMA16
PMA17
223
166
101
PMA16
PMA15
PMA17
TO DSP MEM
External Memory Bus
PMA1828PMA19
PMA20
273
224
PMA19
PMA20
PMA18
PMA2119PMD020PMD194PMD221PMD3
TL4003
PMA21
PMD495PMD522PMD6
PMD7
160
218
161
PMD6
PMD0
PMD1
PMD2
PMD7
PMD4
PMD3
PMD5
TO MPEG2,DSP MEM,P.PRCS
PMD896PMD923PMD10
PMD9
PMD8
PMD10
PMD11
PMD12
PMD1397PMD1424PMD1517XPMCS793XPMCS118XPMCS091XPMWE16XPMOE
268
219
162
PMD12
PMD13
PMD14
PMD11
0Ω
0Ω
R4008
R4007
PMD15
XPMCS1
XPMCS7
TO P.PRCS
TO DSP MEM
0Ω0Ω0Ω
R4010
R4009
R4011
XPMWE
XPMCS0
TO MPEG2
TO MPEG2,
XPMBLS092XPMBLS188XPMWAIT
159
0Ω0Ω0Ω
R4012
XPMOE
XPMBLS0
P.PRCS,
DSP MEM
TO P.PRCS
0Ω
R4014
R4013
XPMBLS1
XPMWAIT
TO MPEG2,
XARMTRST90TCK14TMS
215
0Ω
R4015
ARMTCK
XARMTRST
TO MAIN IF
(CN110)
P.PRCS
216
ARMTMS
TDI
156
ARMTDI
AMBATDO1SIO076SIO1
TL4004
1k
R4016
10k
R4017
ARMTDO
TL4005
R4018 47k
R4020
47k
XVOEN
TO MPEG2
DMAJTAG
GPIO24
DMASREQ
69
30
275
R4019 47k
DMASREQ
TO P.PRCS
DMABREQ
DMACLR
103
0Ω
R4022
DMACLR
DMABREQ
R4021
47k
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-15(No.YF109)
L4006
SHORT
L4007
OPEN
C4006
OPEN
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